Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Driver for Digigram miXart soundcards | |
3 | * | |
4 | * low level interface with interrupt handling and mail box implementation | |
5 | * | |
6 | * Copyright (c) 2003 by Digigram <alsa@digigram.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | */ | |
22 | ||
1da177e4 | 23 | #include <linux/interrupt.h> |
62932df8 | 24 | #include <linux/mutex.h> |
6414e35d | 25 | #include <linux/pci.h> |
62932df8 | 26 | |
1da177e4 LT |
27 | #include <asm/io.h> |
28 | #include <sound/core.h> | |
29 | #include "mixart.h" | |
30 | #include "mixart_hwdep.h" | |
31 | #include "mixart_core.h" | |
32 | ||
33 | ||
34 | #define MSG_TIMEOUT_JIFFIES (400 * HZ) / 1000 /* 400 ms */ | |
35 | ||
36 | #define MSG_DESCRIPTOR_SIZE 0x24 | |
37 | #define MSG_HEADER_SIZE (MSG_DESCRIPTOR_SIZE + 4) | |
38 | ||
39 | #define MSG_DEFAULT_SIZE 512 | |
40 | ||
41 | #define MSG_TYPE_MASK 0x00000003 /* mask for following types */ | |
42 | #define MSG_TYPE_NOTIFY 0 /* embedded -> driver (only notification, do not get_msg() !) */ | |
43 | #define MSG_TYPE_COMMAND 1 /* driver <-> embedded (a command has no answer) */ | |
44 | #define MSG_TYPE_REQUEST 2 /* driver -> embedded (request will get an answer back) */ | |
45 | #define MSG_TYPE_ANSWER 3 /* embedded -> driver */ | |
46 | #define MSG_CANCEL_NOTIFY_MASK 0x80000000 /* this bit is set for a notification that has been canceled */ | |
47 | ||
48 | ||
67b48b88 | 49 | static int retrieve_msg_frame(struct mixart_mgr *mgr, u32 *msg_frame) |
1da177e4 LT |
50 | { |
51 | /* read the message frame fifo */ | |
52 | u32 headptr, tailptr; | |
53 | ||
54 | tailptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_POST_TAIL)); | |
55 | headptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_POST_HEAD)); | |
56 | ||
57 | if (tailptr == headptr) | |
58 | return 0; /* no message posted */ | |
59 | ||
da3cec35 TI |
60 | if (tailptr < MSG_OUTBOUND_POST_STACK) |
61 | return 0; /* error */ | |
62 | if (tailptr >= MSG_OUTBOUND_POST_STACK + MSG_BOUND_STACK_SIZE) | |
63 | return 0; /* error */ | |
1da177e4 LT |
64 | |
65 | *msg_frame = readl_be(MIXART_MEM(mgr, tailptr)); | |
66 | ||
67 | /* increment the tail index */ | |
68 | tailptr += 4; | |
69 | if( tailptr >= (MSG_OUTBOUND_POST_STACK+MSG_BOUND_STACK_SIZE) ) | |
70 | tailptr = MSG_OUTBOUND_POST_STACK; | |
71 | writel_be(tailptr, MIXART_MEM(mgr, MSG_OUTBOUND_POST_TAIL)); | |
72 | ||
73 | return 1; | |
74 | } | |
75 | ||
67b48b88 TI |
76 | static int get_msg(struct mixart_mgr *mgr, struct mixart_msg *resp, |
77 | u32 msg_frame_address ) | |
1da177e4 LT |
78 | { |
79 | unsigned long flags; | |
80 | u32 headptr; | |
81 | u32 size; | |
82 | int err; | |
83 | #ifndef __BIG_ENDIAN | |
84 | unsigned int i; | |
85 | #endif | |
86 | ||
87 | spin_lock_irqsave(&mgr->msg_lock, flags); | |
88 | err = 0; | |
89 | ||
90 | /* copy message descriptor from miXart to driver */ | |
91 | size = readl_be(MIXART_MEM(mgr, msg_frame_address)); /* size of descriptor + response */ | |
92 | resp->message_id = readl_be(MIXART_MEM(mgr, msg_frame_address + 4)); /* dwMessageID */ | |
93 | resp->uid.object_id = readl_be(MIXART_MEM(mgr, msg_frame_address + 8)); /* uidDest */ | |
94 | resp->uid.desc = readl_be(MIXART_MEM(mgr, msg_frame_address + 12)); /* */ | |
95 | ||
96 | if( (size < MSG_DESCRIPTOR_SIZE) || (resp->size < (size - MSG_DESCRIPTOR_SIZE))) { | |
97 | err = -EINVAL; | |
6414e35d TI |
98 | dev_err(&mgr->pci->dev, |
99 | "problem with response size = %d\n", size); | |
1da177e4 LT |
100 | goto _clean_exit; |
101 | } | |
102 | size -= MSG_DESCRIPTOR_SIZE; | |
103 | ||
104 | memcpy_fromio(resp->data, MIXART_MEM(mgr, msg_frame_address + MSG_HEADER_SIZE ), size); | |
105 | resp->size = size; | |
106 | ||
107 | /* swap if necessary */ | |
108 | #ifndef __BIG_ENDIAN | |
109 | size /= 4; /* u32 size */ | |
110 | for(i=0; i < size; i++) { | |
111 | ((u32*)resp->data)[i] = be32_to_cpu(((u32*)resp->data)[i]); | |
112 | } | |
113 | #endif | |
114 | ||
115 | /* | |
116 | * free message frame address | |
117 | */ | |
118 | headptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_FREE_HEAD)); | |
119 | ||
120 | if( (headptr < MSG_OUTBOUND_FREE_STACK) || ( headptr >= (MSG_OUTBOUND_FREE_STACK+MSG_BOUND_STACK_SIZE))) { | |
121 | err = -EINVAL; | |
122 | goto _clean_exit; | |
123 | } | |
124 | ||
125 | /* give address back to outbound fifo */ | |
126 | writel_be(msg_frame_address, MIXART_MEM(mgr, headptr)); | |
127 | ||
128 | /* increment the outbound free head */ | |
129 | headptr += 4; | |
130 | if( headptr >= (MSG_OUTBOUND_FREE_STACK+MSG_BOUND_STACK_SIZE) ) | |
131 | headptr = MSG_OUTBOUND_FREE_STACK; | |
132 | ||
133 | writel_be(headptr, MIXART_MEM(mgr, MSG_OUTBOUND_FREE_HEAD)); | |
134 | ||
135 | _clean_exit: | |
136 | spin_unlock_irqrestore(&mgr->msg_lock, flags); | |
137 | ||
138 | return err; | |
139 | } | |
140 | ||
141 | ||
142 | /* | |
143 | * send a message to miXart. return: the msg_frame used for this message | |
144 | */ | |
145 | /* call with mgr->msg_lock held! */ | |
67b48b88 TI |
146 | static int send_msg( struct mixart_mgr *mgr, |
147 | struct mixart_msg *msg, | |
1da177e4 LT |
148 | int max_answersize, |
149 | int mark_pending, | |
150 | u32 *msg_event) | |
151 | { | |
152 | u32 headptr, tailptr; | |
153 | u32 msg_frame_address; | |
154 | int err, i; | |
155 | ||
da3cec35 TI |
156 | if (snd_BUG_ON(msg->size % 4)) |
157 | return -EINVAL; | |
1da177e4 LT |
158 | |
159 | err = 0; | |
160 | ||
161 | /* get message frame address */ | |
162 | tailptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_FREE_TAIL)); | |
163 | headptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_FREE_HEAD)); | |
164 | ||
165 | if (tailptr == headptr) { | |
6414e35d | 166 | dev_err(&mgr->pci->dev, "error: no message frame available\n"); |
1da177e4 LT |
167 | return -EBUSY; |
168 | } | |
169 | ||
170 | if( (tailptr < MSG_INBOUND_FREE_STACK) || (tailptr >= (MSG_INBOUND_FREE_STACK+MSG_BOUND_STACK_SIZE))) { | |
171 | return -EINVAL; | |
172 | } | |
173 | ||
174 | msg_frame_address = readl_be(MIXART_MEM(mgr, tailptr)); | |
175 | writel(0, MIXART_MEM(mgr, tailptr)); /* set address to zero on this fifo position */ | |
176 | ||
177 | /* increment the inbound free tail */ | |
178 | tailptr += 4; | |
179 | if( tailptr >= (MSG_INBOUND_FREE_STACK+MSG_BOUND_STACK_SIZE) ) | |
180 | tailptr = MSG_INBOUND_FREE_STACK; | |
181 | ||
182 | writel_be(tailptr, MIXART_MEM(mgr, MSG_INBOUND_FREE_TAIL)); | |
183 | ||
184 | /* TODO : use memcpy_toio() with intermediate buffer to copy the message */ | |
185 | ||
186 | /* copy message descriptor to card memory */ | |
187 | writel_be( msg->size + MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address) ); /* size of descriptor + request */ | |
188 | writel_be( msg->message_id , MIXART_MEM(mgr, msg_frame_address + 4) ); /* dwMessageID */ | |
189 | writel_be( msg->uid.object_id, MIXART_MEM(mgr, msg_frame_address + 8) ); /* uidDest */ | |
190 | writel_be( msg->uid.desc, MIXART_MEM(mgr, msg_frame_address + 12) ); /* */ | |
191 | writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 16) ); /* SizeHeader */ | |
192 | writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 20) ); /* OffsetDLL_T16 */ | |
193 | writel_be( msg->size, MIXART_MEM(mgr, msg_frame_address + 24) ); /* SizeDLL_T16 */ | |
194 | writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 28) ); /* OffsetDLL_DRV */ | |
195 | writel_be( 0, MIXART_MEM(mgr, msg_frame_address + 32) ); /* SizeDLL_DRV */ | |
196 | writel_be( MSG_DESCRIPTOR_SIZE + max_answersize, MIXART_MEM(mgr, msg_frame_address + 36) ); /* dwExpectedAnswerSize */ | |
197 | ||
198 | /* copy message data to card memory */ | |
199 | for( i=0; i < msg->size; i+=4 ) { | |
200 | writel_be( *(u32*)(msg->data + i), MIXART_MEM(mgr, MSG_HEADER_SIZE + msg_frame_address + i) ); | |
201 | } | |
202 | ||
203 | if( mark_pending ) { | |
204 | if( *msg_event ) { | |
205 | /* the pending event is the notification we wait for ! */ | |
206 | mgr->pending_event = *msg_event; | |
207 | } | |
208 | else { | |
209 | /* the pending event is the answer we wait for (same address than the request)! */ | |
210 | mgr->pending_event = msg_frame_address; | |
211 | ||
212 | /* copy address back to caller */ | |
213 | *msg_event = msg_frame_address; | |
214 | } | |
215 | } | |
216 | ||
217 | /* mark the frame as a request (will have an answer) */ | |
218 | msg_frame_address |= MSG_TYPE_REQUEST; | |
219 | ||
220 | /* post the frame */ | |
221 | headptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_POST_HEAD)); | |
222 | ||
223 | if( (headptr < MSG_INBOUND_POST_STACK) || (headptr >= (MSG_INBOUND_POST_STACK+MSG_BOUND_STACK_SIZE))) { | |
224 | return -EINVAL; | |
225 | } | |
226 | ||
227 | writel_be(msg_frame_address, MIXART_MEM(mgr, headptr)); | |
228 | ||
229 | /* increment the inbound post head */ | |
230 | headptr += 4; | |
231 | if( headptr >= (MSG_INBOUND_POST_STACK+MSG_BOUND_STACK_SIZE) ) | |
232 | headptr = MSG_INBOUND_POST_STACK; | |
233 | ||
234 | writel_be(headptr, MIXART_MEM(mgr, MSG_INBOUND_POST_HEAD)); | |
235 | ||
236 | return 0; | |
237 | } | |
238 | ||
239 | ||
67b48b88 | 240 | int snd_mixart_send_msg(struct mixart_mgr *mgr, struct mixart_msg *request, int max_resp_size, void *resp_data) |
1da177e4 | 241 | { |
67b48b88 | 242 | struct mixart_msg resp; |
1da177e4 LT |
243 | u32 msg_frame = 0; /* set to 0, so it's no notification to wait for, but the answer */ |
244 | int err; | |
245 | wait_queue_t wait; | |
246 | long timeout; | |
247 | ||
62932df8 | 248 | mutex_lock(&mgr->msg_mutex); |
1da177e4 LT |
249 | |
250 | init_waitqueue_entry(&wait, current); | |
251 | ||
252 | spin_lock_irq(&mgr->msg_lock); | |
253 | /* send the message */ | |
254 | err = send_msg(mgr, request, max_resp_size, 1, &msg_frame); /* send and mark the answer pending */ | |
255 | if (err) { | |
256 | spin_unlock_irq(&mgr->msg_lock); | |
62932df8 | 257 | mutex_unlock(&mgr->msg_mutex); |
1da177e4 LT |
258 | return err; |
259 | } | |
260 | ||
261 | set_current_state(TASK_UNINTERRUPTIBLE); | |
262 | add_wait_queue(&mgr->msg_sleep, &wait); | |
263 | spin_unlock_irq(&mgr->msg_lock); | |
264 | timeout = schedule_timeout(MSG_TIMEOUT_JIFFIES); | |
265 | remove_wait_queue(&mgr->msg_sleep, &wait); | |
266 | ||
267 | if (! timeout) { | |
268 | /* error - no ack */ | |
62932df8 | 269 | mutex_unlock(&mgr->msg_mutex); |
6414e35d TI |
270 | dev_err(&mgr->pci->dev, |
271 | "error: no response on msg %x\n", msg_frame); | |
1da177e4 LT |
272 | return -EIO; |
273 | } | |
274 | ||
67b48b88 | 275 | /* retrieve the answer into the same struct mixart_msg */ |
1da177e4 | 276 | resp.message_id = 0; |
67b48b88 | 277 | resp.uid = (struct mixart_uid){0,0}; |
1da177e4 LT |
278 | resp.data = resp_data; |
279 | resp.size = max_resp_size; | |
280 | ||
281 | err = get_msg(mgr, &resp, msg_frame); | |
282 | ||
283 | if( request->message_id != resp.message_id ) | |
6414e35d | 284 | dev_err(&mgr->pci->dev, "RESPONSE ERROR!\n"); |
1da177e4 | 285 | |
62932df8 | 286 | mutex_unlock(&mgr->msg_mutex); |
1da177e4 LT |
287 | return err; |
288 | } | |
289 | ||
290 | ||
67b48b88 TI |
291 | int snd_mixart_send_msg_wait_notif(struct mixart_mgr *mgr, |
292 | struct mixart_msg *request, u32 notif_event) | |
1da177e4 LT |
293 | { |
294 | int err; | |
295 | wait_queue_t wait; | |
296 | long timeout; | |
297 | ||
da3cec35 TI |
298 | if (snd_BUG_ON(!notif_event)) |
299 | return -EINVAL; | |
300 | if (snd_BUG_ON((notif_event & MSG_TYPE_MASK) != MSG_TYPE_NOTIFY)) | |
301 | return -EINVAL; | |
302 | if (snd_BUG_ON(notif_event & MSG_CANCEL_NOTIFY_MASK)) | |
303 | return -EINVAL; | |
1da177e4 | 304 | |
62932df8 | 305 | mutex_lock(&mgr->msg_mutex); |
1da177e4 LT |
306 | |
307 | init_waitqueue_entry(&wait, current); | |
308 | ||
309 | spin_lock_irq(&mgr->msg_lock); | |
310 | /* send the message */ | |
311 | err = send_msg(mgr, request, MSG_DEFAULT_SIZE, 1, ¬if_event); /* send and mark the notification event pending */ | |
312 | if(err) { | |
313 | spin_unlock_irq(&mgr->msg_lock); | |
62932df8 | 314 | mutex_unlock(&mgr->msg_mutex); |
1da177e4 LT |
315 | return err; |
316 | } | |
317 | ||
318 | set_current_state(TASK_UNINTERRUPTIBLE); | |
319 | add_wait_queue(&mgr->msg_sleep, &wait); | |
320 | spin_unlock_irq(&mgr->msg_lock); | |
321 | timeout = schedule_timeout(MSG_TIMEOUT_JIFFIES); | |
322 | remove_wait_queue(&mgr->msg_sleep, &wait); | |
323 | ||
324 | if (! timeout) { | |
325 | /* error - no ack */ | |
62932df8 | 326 | mutex_unlock(&mgr->msg_mutex); |
6414e35d TI |
327 | dev_err(&mgr->pci->dev, |
328 | "error: notification %x not received\n", notif_event); | |
1da177e4 LT |
329 | return -EIO; |
330 | } | |
331 | ||
62932df8 | 332 | mutex_unlock(&mgr->msg_mutex); |
1da177e4 LT |
333 | return 0; |
334 | } | |
335 | ||
336 | ||
67b48b88 | 337 | int snd_mixart_send_msg_nonblock(struct mixart_mgr *mgr, struct mixart_msg *request) |
1da177e4 LT |
338 | { |
339 | u32 message_frame; | |
340 | unsigned long flags; | |
341 | int err; | |
342 | ||
343 | /* just send the message (do not mark it as a pending one) */ | |
344 | spin_lock_irqsave(&mgr->msg_lock, flags); | |
345 | err = send_msg(mgr, request, MSG_DEFAULT_SIZE, 0, &message_frame); | |
346 | spin_unlock_irqrestore(&mgr->msg_lock, flags); | |
347 | ||
67b48b88 | 348 | /* the answer will be handled by snd_struct mixart_msgasklet() */ |
1da177e4 LT |
349 | atomic_inc(&mgr->msg_processed); |
350 | ||
351 | return err; | |
352 | } | |
353 | ||
354 | ||
355 | /* common buffer of tasklet and interrupt to send/receive messages */ | |
356 | static u32 mixart_msg_data[MSG_DEFAULT_SIZE / 4]; | |
357 | ||
358 | ||
67b48b88 | 359 | void snd_mixart_msg_tasklet(unsigned long arg) |
1da177e4 | 360 | { |
67b48b88 TI |
361 | struct mixart_mgr *mgr = ( struct mixart_mgr*)(arg); |
362 | struct mixart_msg resp; | |
1da177e4 LT |
363 | u32 msg, addr, type; |
364 | int err; | |
365 | ||
366 | spin_lock(&mgr->lock); | |
367 | ||
368 | while (mgr->msg_fifo_readptr != mgr->msg_fifo_writeptr) { | |
369 | msg = mgr->msg_fifo[mgr->msg_fifo_readptr]; | |
370 | mgr->msg_fifo_readptr++; | |
371 | mgr->msg_fifo_readptr %= MSG_FIFO_SIZE; | |
372 | ||
373 | /* process the message ... */ | |
374 | addr = msg & ~MSG_TYPE_MASK; | |
375 | type = msg & MSG_TYPE_MASK; | |
376 | ||
377 | switch (type) { | |
378 | case MSG_TYPE_ANSWER: | |
379 | /* answer to a message on that we did not wait for (send_msg_nonblock) */ | |
380 | resp.message_id = 0; | |
381 | resp.data = mixart_msg_data; | |
382 | resp.size = sizeof(mixart_msg_data); | |
383 | err = get_msg(mgr, &resp, addr); | |
384 | if( err < 0 ) { | |
6414e35d TI |
385 | dev_err(&mgr->pci->dev, |
386 | "tasklet: error(%d) reading mf %x\n", | |
387 | err, msg); | |
1da177e4 LT |
388 | break; |
389 | } | |
390 | ||
391 | switch(resp.message_id) { | |
392 | case MSG_STREAM_START_INPUT_STAGE_PACKET: | |
393 | case MSG_STREAM_START_OUTPUT_STAGE_PACKET: | |
394 | case MSG_STREAM_STOP_INPUT_STAGE_PACKET: | |
395 | case MSG_STREAM_STOP_OUTPUT_STAGE_PACKET: | |
396 | if(mixart_msg_data[0]) | |
6414e35d TI |
397 | dev_err(&mgr->pci->dev, |
398 | "tasklet : error MSG_STREAM_ST***_***PUT_STAGE_PACKET status=%x\n", | |
399 | mixart_msg_data[0]); | |
1da177e4 LT |
400 | break; |
401 | default: | |
6414e35d TI |
402 | dev_dbg(&mgr->pci->dev, |
403 | "tasklet received mf(%x) : msg_id(%x) uid(%x, %x) size(%zd)\n", | |
1da177e4 LT |
404 | msg, resp.message_id, resp.uid.object_id, resp.uid.desc, resp.size); |
405 | break; | |
406 | } | |
407 | break; | |
408 | case MSG_TYPE_NOTIFY: | |
409 | /* msg contains no address ! do not get_msg() ! */ | |
410 | case MSG_TYPE_COMMAND: | |
411 | /* get_msg() necessary */ | |
412 | default: | |
6414e35d TI |
413 | dev_err(&mgr->pci->dev, |
414 | "tasklet doesn't know what to do with message %x\n", | |
415 | msg); | |
1da177e4 LT |
416 | } /* switch type */ |
417 | ||
418 | /* decrement counter */ | |
419 | atomic_dec(&mgr->msg_processed); | |
420 | ||
421 | } /* while there is a msg in fifo */ | |
422 | ||
423 | spin_unlock(&mgr->lock); | |
424 | } | |
425 | ||
426 | ||
7d12e780 | 427 | irqreturn_t snd_mixart_interrupt(int irq, void *dev_id) |
1da177e4 | 428 | { |
67b48b88 | 429 | struct mixart_mgr *mgr = dev_id; |
1da177e4 | 430 | int err; |
67b48b88 | 431 | struct mixart_msg resp; |
1da177e4 LT |
432 | |
433 | u32 msg; | |
434 | u32 it_reg; | |
435 | ||
436 | spin_lock(&mgr->lock); | |
437 | ||
438 | it_reg = readl_le(MIXART_REG(mgr, MIXART_PCI_OMISR_OFFSET)); | |
439 | if( !(it_reg & MIXART_OIDI) ) { | |
440 | /* this device did not cause the interrupt */ | |
441 | spin_unlock(&mgr->lock); | |
442 | return IRQ_NONE; | |
443 | } | |
444 | ||
445 | /* mask all interrupts */ | |
446 | writel_le(MIXART_HOST_ALL_INTERRUPT_MASKED, MIXART_REG(mgr, MIXART_PCI_OMIMR_OFFSET)); | |
447 | ||
448 | /* outdoorbell register clear */ | |
449 | it_reg = readl(MIXART_REG(mgr, MIXART_PCI_ODBR_OFFSET)); | |
450 | writel(it_reg, MIXART_REG(mgr, MIXART_PCI_ODBR_OFFSET)); | |
451 | ||
452 | /* clear interrupt */ | |
453 | writel_le( MIXART_OIDI, MIXART_REG(mgr, MIXART_PCI_OMISR_OFFSET) ); | |
454 | ||
455 | /* process interrupt */ | |
456 | while (retrieve_msg_frame(mgr, &msg)) { | |
457 | ||
458 | switch (msg & MSG_TYPE_MASK) { | |
459 | case MSG_TYPE_COMMAND: | |
460 | resp.message_id = 0; | |
461 | resp.data = mixart_msg_data; | |
462 | resp.size = sizeof(mixart_msg_data); | |
463 | err = get_msg(mgr, &resp, msg & ~MSG_TYPE_MASK); | |
464 | if( err < 0 ) { | |
6414e35d TI |
465 | dev_err(&mgr->pci->dev, |
466 | "interrupt: error(%d) reading mf %x\n", | |
467 | err, msg); | |
1da177e4 LT |
468 | break; |
469 | } | |
470 | ||
471 | if(resp.message_id == MSG_SERVICES_TIMER_NOTIFY) { | |
472 | int i; | |
67b48b88 TI |
473 | struct mixart_timer_notify *notify; |
474 | notify = (struct mixart_timer_notify *)mixart_msg_data; | |
1da177e4 LT |
475 | |
476 | for(i=0; i<notify->stream_count; i++) { | |
477 | ||
478 | u32 buffer_id = notify->streams[i].buffer_id; | |
479 | unsigned int chip_number = (buffer_id & MIXART_NOTIFY_CARD_MASK) >> MIXART_NOTIFY_CARD_OFFSET; /* card0 to 3 */ | |
480 | unsigned int pcm_number = (buffer_id & MIXART_NOTIFY_PCM_MASK ) >> MIXART_NOTIFY_PCM_OFFSET; /* pcm0 to 3 */ | |
481 | unsigned int sub_number = buffer_id & MIXART_NOTIFY_SUBS_MASK; /* 0 to MIXART_PLAYBACK_STREAMS */ | |
482 | unsigned int is_capture = ((buffer_id & MIXART_NOTIFY_CAPT_MASK) != 0); /* playback == 0 / capture == 1 */ | |
483 | ||
67b48b88 TI |
484 | struct snd_mixart *chip = mgr->chip[chip_number]; |
485 | struct mixart_stream *stream; | |
1da177e4 LT |
486 | |
487 | if ((chip_number >= mgr->num_cards) || (pcm_number >= MIXART_PCM_TOTAL) || (sub_number >= MIXART_PLAYBACK_STREAMS)) { | |
6414e35d TI |
488 | dev_err(&mgr->pci->dev, |
489 | "error MSG_SERVICES_TIMER_NOTIFY buffer_id (%x) pos(%d)\n", | |
1da177e4 LT |
490 | buffer_id, notify->streams[i].sample_pos_low_part); |
491 | break; | |
492 | } | |
493 | ||
494 | if (is_capture) | |
495 | stream = &chip->capture_stream[pcm_number]; | |
496 | else | |
497 | stream = &chip->playback_stream[pcm_number][sub_number]; | |
498 | ||
499 | if (stream->substream && (stream->status == MIXART_STREAM_STATUS_RUNNING)) { | |
67b48b88 | 500 | struct snd_pcm_runtime *runtime = stream->substream->runtime; |
1da177e4 LT |
501 | int elapsed = 0; |
502 | u64 sample_count = ((u64)notify->streams[i].sample_pos_high_part) << 32; | |
503 | sample_count |= notify->streams[i].sample_pos_low_part; | |
504 | ||
505 | while (1) { | |
506 | u64 new_elapse_pos = stream->abs_period_elapsed + runtime->period_size; | |
507 | ||
508 | if (new_elapse_pos > sample_count) { | |
509 | break; /* while */ | |
510 | } | |
511 | else { | |
512 | elapsed = 1; | |
513 | stream->buf_periods++; | |
514 | if (stream->buf_periods >= runtime->periods) | |
515 | stream->buf_periods = 0; | |
516 | ||
517 | stream->abs_period_elapsed = new_elapse_pos; | |
518 | } | |
519 | } | |
520 | stream->buf_period_frag = (u32)( sample_count - stream->abs_period_elapsed ); | |
521 | ||
522 | if(elapsed) { | |
523 | spin_unlock(&mgr->lock); | |
524 | snd_pcm_period_elapsed(stream->substream); | |
525 | spin_lock(&mgr->lock); | |
526 | } | |
527 | } | |
528 | } | |
529 | break; | |
530 | } | |
531 | if(resp.message_id == MSG_SERVICES_REPORT_TRACES) { | |
532 | if(resp.size > 1) { | |
533 | #ifndef __BIG_ENDIAN | |
534 | /* Traces are text: the swapped msg_data has to be swapped back ! */ | |
535 | int i; | |
536 | for(i=0; i<(resp.size/4); i++) { | |
537 | (mixart_msg_data)[i] = cpu_to_be32((mixart_msg_data)[i]); | |
538 | } | |
539 | #endif | |
540 | ((char*)mixart_msg_data)[resp.size - 1] = 0; | |
6414e35d TI |
541 | dev_dbg(&mgr->pci->dev, |
542 | "MIXART TRACE : %s\n", | |
543 | (char *)mixart_msg_data); | |
1da177e4 LT |
544 | } |
545 | break; | |
546 | } | |
547 | ||
6414e35d TI |
548 | dev_dbg(&mgr->pci->dev, "command %x not handled\n", |
549 | resp.message_id); | |
1da177e4 LT |
550 | break; |
551 | ||
552 | case MSG_TYPE_NOTIFY: | |
553 | if(msg & MSG_CANCEL_NOTIFY_MASK) { | |
554 | msg &= ~MSG_CANCEL_NOTIFY_MASK; | |
6414e35d TI |
555 | dev_err(&mgr->pci->dev, |
556 | "canceled notification %x !\n", msg); | |
1da177e4 LT |
557 | } |
558 | /* no break, continue ! */ | |
559 | case MSG_TYPE_ANSWER: | |
560 | /* answer or notification to a message we are waiting for*/ | |
561 | spin_lock(&mgr->msg_lock); | |
562 | if( (msg & ~MSG_TYPE_MASK) == mgr->pending_event ) { | |
563 | wake_up(&mgr->msg_sleep); | |
564 | mgr->pending_event = 0; | |
565 | } | |
566 | /* answer to a message we did't want to wait for */ | |
567 | else { | |
568 | mgr->msg_fifo[mgr->msg_fifo_writeptr] = msg; | |
569 | mgr->msg_fifo_writeptr++; | |
570 | mgr->msg_fifo_writeptr %= MSG_FIFO_SIZE; | |
1f04128a | 571 | tasklet_schedule(&mgr->msg_taskq); |
1da177e4 LT |
572 | } |
573 | spin_unlock(&mgr->msg_lock); | |
574 | break; | |
575 | case MSG_TYPE_REQUEST: | |
576 | default: | |
6414e35d TI |
577 | dev_dbg(&mgr->pci->dev, |
578 | "interrupt received request %x\n", msg); | |
1da177e4 LT |
579 | /* TODO : are there things to do here ? */ |
580 | break; | |
581 | } /* switch on msg type */ | |
582 | } /* while there are msgs */ | |
583 | ||
584 | /* allow interrupt again */ | |
585 | writel_le( MIXART_ALLOW_OUTBOUND_DOORBELL, MIXART_REG( mgr, MIXART_PCI_OMIMR_OFFSET)); | |
586 | ||
587 | spin_unlock(&mgr->lock); | |
588 | ||
589 | return IRQ_HANDLED; | |
590 | } | |
591 | ||
592 | ||
67b48b88 | 593 | void snd_mixart_init_mailbox(struct mixart_mgr *mgr) |
1da177e4 LT |
594 | { |
595 | writel( 0, MIXART_MEM( mgr, MSG_HOST_RSC_PROTECTION ) ); | |
596 | writel( 0, MIXART_MEM( mgr, MSG_AGENT_RSC_PROTECTION ) ); | |
597 | ||
598 | /* allow outbound messagebox to generate interrupts */ | |
599 | if(mgr->irq >= 0) { | |
600 | writel_le( MIXART_ALLOW_OUTBOUND_DOORBELL, MIXART_REG( mgr, MIXART_PCI_OMIMR_OFFSET)); | |
601 | } | |
602 | return; | |
603 | } | |
604 | ||
67b48b88 | 605 | void snd_mixart_exit_mailbox(struct mixart_mgr *mgr) |
1da177e4 LT |
606 | { |
607 | /* no more interrupts on outbound messagebox */ | |
608 | writel_le( MIXART_HOST_ALL_INTERRUPT_MASKED, MIXART_REG( mgr, MIXART_PCI_OMIMR_OFFSET)); | |
609 | return; | |
610 | } | |
611 | ||
67b48b88 | 612 | void snd_mixart_reset_board(struct mixart_mgr *mgr) |
1da177e4 LT |
613 | { |
614 | /* reset miXart */ | |
615 | writel_be( 1, MIXART_REG(mgr, MIXART_BA1_BRUTAL_RESET_OFFSET) ); | |
616 | return; | |
617 | } |