ALSA: hda - Add PCI ID for Kabylake
[linux-2.6-block.git] / sound / pci / mixart / mixart_core.c
CommitLineData
1da177e4
LT
1/*
2 * Driver for Digigram miXart soundcards
3 *
4 * low level interface with interrupt handling and mail box implementation
5 *
6 * Copyright (c) 2003 by Digigram <alsa@digigram.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
1da177e4 23#include <linux/interrupt.h>
62932df8 24#include <linux/mutex.h>
6414e35d 25#include <linux/pci.h>
6cbbfe1c 26#include <linux/io.h>
62932df8 27
1da177e4
LT
28#include <sound/core.h>
29#include "mixart.h"
30#include "mixart_hwdep.h"
31#include "mixart_core.h"
32
33
34#define MSG_TIMEOUT_JIFFIES (400 * HZ) / 1000 /* 400 ms */
35
36#define MSG_DESCRIPTOR_SIZE 0x24
37#define MSG_HEADER_SIZE (MSG_DESCRIPTOR_SIZE + 4)
38
39#define MSG_DEFAULT_SIZE 512
40
41#define MSG_TYPE_MASK 0x00000003 /* mask for following types */
42#define MSG_TYPE_NOTIFY 0 /* embedded -> driver (only notification, do not get_msg() !) */
43#define MSG_TYPE_COMMAND 1 /* driver <-> embedded (a command has no answer) */
44#define MSG_TYPE_REQUEST 2 /* driver -> embedded (request will get an answer back) */
45#define MSG_TYPE_ANSWER 3 /* embedded -> driver */
46#define MSG_CANCEL_NOTIFY_MASK 0x80000000 /* this bit is set for a notification that has been canceled */
47
48
67b48b88 49static int retrieve_msg_frame(struct mixart_mgr *mgr, u32 *msg_frame)
1da177e4
LT
50{
51 /* read the message frame fifo */
52 u32 headptr, tailptr;
53
54 tailptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_POST_TAIL));
55 headptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_POST_HEAD));
56
57 if (tailptr == headptr)
58 return 0; /* no message posted */
59
da3cec35
TI
60 if (tailptr < MSG_OUTBOUND_POST_STACK)
61 return 0; /* error */
62 if (tailptr >= MSG_OUTBOUND_POST_STACK + MSG_BOUND_STACK_SIZE)
63 return 0; /* error */
1da177e4
LT
64
65 *msg_frame = readl_be(MIXART_MEM(mgr, tailptr));
66
67 /* increment the tail index */
68 tailptr += 4;
69 if( tailptr >= (MSG_OUTBOUND_POST_STACK+MSG_BOUND_STACK_SIZE) )
70 tailptr = MSG_OUTBOUND_POST_STACK;
71 writel_be(tailptr, MIXART_MEM(mgr, MSG_OUTBOUND_POST_TAIL));
72
73 return 1;
74}
75
67b48b88
TI
76static int get_msg(struct mixart_mgr *mgr, struct mixart_msg *resp,
77 u32 msg_frame_address )
1da177e4 78{
1da177e4
LT
79 u32 headptr;
80 u32 size;
81 int err;
82#ifndef __BIG_ENDIAN
83 unsigned int i;
84#endif
85
8d3a8b5c 86 mutex_lock(&mgr->msg_lock);
1da177e4
LT
87 err = 0;
88
89 /* copy message descriptor from miXart to driver */
90 size = readl_be(MIXART_MEM(mgr, msg_frame_address)); /* size of descriptor + response */
91 resp->message_id = readl_be(MIXART_MEM(mgr, msg_frame_address + 4)); /* dwMessageID */
92 resp->uid.object_id = readl_be(MIXART_MEM(mgr, msg_frame_address + 8)); /* uidDest */
93 resp->uid.desc = readl_be(MIXART_MEM(mgr, msg_frame_address + 12)); /* */
94
95 if( (size < MSG_DESCRIPTOR_SIZE) || (resp->size < (size - MSG_DESCRIPTOR_SIZE))) {
96 err = -EINVAL;
6414e35d
TI
97 dev_err(&mgr->pci->dev,
98 "problem with response size = %d\n", size);
1da177e4
LT
99 goto _clean_exit;
100 }
101 size -= MSG_DESCRIPTOR_SIZE;
102
103 memcpy_fromio(resp->data, MIXART_MEM(mgr, msg_frame_address + MSG_HEADER_SIZE ), size);
104 resp->size = size;
105
106 /* swap if necessary */
107#ifndef __BIG_ENDIAN
108 size /= 4; /* u32 size */
109 for(i=0; i < size; i++) {
110 ((u32*)resp->data)[i] = be32_to_cpu(((u32*)resp->data)[i]);
111 }
112#endif
113
114 /*
115 * free message frame address
116 */
117 headptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_FREE_HEAD));
118
119 if( (headptr < MSG_OUTBOUND_FREE_STACK) || ( headptr >= (MSG_OUTBOUND_FREE_STACK+MSG_BOUND_STACK_SIZE))) {
120 err = -EINVAL;
121 goto _clean_exit;
122 }
123
124 /* give address back to outbound fifo */
125 writel_be(msg_frame_address, MIXART_MEM(mgr, headptr));
126
127 /* increment the outbound free head */
128 headptr += 4;
129 if( headptr >= (MSG_OUTBOUND_FREE_STACK+MSG_BOUND_STACK_SIZE) )
130 headptr = MSG_OUTBOUND_FREE_STACK;
131
132 writel_be(headptr, MIXART_MEM(mgr, MSG_OUTBOUND_FREE_HEAD));
133
134 _clean_exit:
8d3a8b5c 135 mutex_unlock(&mgr->msg_lock);
1da177e4
LT
136
137 return err;
138}
139
140
141/*
142 * send a message to miXart. return: the msg_frame used for this message
143 */
144/* call with mgr->msg_lock held! */
67b48b88
TI
145static int send_msg( struct mixart_mgr *mgr,
146 struct mixart_msg *msg,
1da177e4
LT
147 int max_answersize,
148 int mark_pending,
149 u32 *msg_event)
150{
151 u32 headptr, tailptr;
152 u32 msg_frame_address;
330fb10d 153 int i;
1da177e4 154
da3cec35
TI
155 if (snd_BUG_ON(msg->size % 4))
156 return -EINVAL;
1da177e4 157
1da177e4
LT
158 /* get message frame address */
159 tailptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_FREE_TAIL));
160 headptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_FREE_HEAD));
161
162 if (tailptr == headptr) {
6414e35d 163 dev_err(&mgr->pci->dev, "error: no message frame available\n");
1da177e4
LT
164 return -EBUSY;
165 }
166
167 if( (tailptr < MSG_INBOUND_FREE_STACK) || (tailptr >= (MSG_INBOUND_FREE_STACK+MSG_BOUND_STACK_SIZE))) {
168 return -EINVAL;
169 }
170
171 msg_frame_address = readl_be(MIXART_MEM(mgr, tailptr));
172 writel(0, MIXART_MEM(mgr, tailptr)); /* set address to zero on this fifo position */
173
174 /* increment the inbound free tail */
175 tailptr += 4;
176 if( tailptr >= (MSG_INBOUND_FREE_STACK+MSG_BOUND_STACK_SIZE) )
177 tailptr = MSG_INBOUND_FREE_STACK;
178
179 writel_be(tailptr, MIXART_MEM(mgr, MSG_INBOUND_FREE_TAIL));
180
181 /* TODO : use memcpy_toio() with intermediate buffer to copy the message */
182
183 /* copy message descriptor to card memory */
184 writel_be( msg->size + MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address) ); /* size of descriptor + request */
185 writel_be( msg->message_id , MIXART_MEM(mgr, msg_frame_address + 4) ); /* dwMessageID */
186 writel_be( msg->uid.object_id, MIXART_MEM(mgr, msg_frame_address + 8) ); /* uidDest */
187 writel_be( msg->uid.desc, MIXART_MEM(mgr, msg_frame_address + 12) ); /* */
188 writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 16) ); /* SizeHeader */
189 writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 20) ); /* OffsetDLL_T16 */
190 writel_be( msg->size, MIXART_MEM(mgr, msg_frame_address + 24) ); /* SizeDLL_T16 */
191 writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 28) ); /* OffsetDLL_DRV */
192 writel_be( 0, MIXART_MEM(mgr, msg_frame_address + 32) ); /* SizeDLL_DRV */
193 writel_be( MSG_DESCRIPTOR_SIZE + max_answersize, MIXART_MEM(mgr, msg_frame_address + 36) ); /* dwExpectedAnswerSize */
194
195 /* copy message data to card memory */
196 for( i=0; i < msg->size; i+=4 ) {
197 writel_be( *(u32*)(msg->data + i), MIXART_MEM(mgr, MSG_HEADER_SIZE + msg_frame_address + i) );
198 }
199
200 if( mark_pending ) {
201 if( *msg_event ) {
202 /* the pending event is the notification we wait for ! */
203 mgr->pending_event = *msg_event;
204 }
205 else {
206 /* the pending event is the answer we wait for (same address than the request)! */
207 mgr->pending_event = msg_frame_address;
208
209 /* copy address back to caller */
210 *msg_event = msg_frame_address;
211 }
212 }
213
214 /* mark the frame as a request (will have an answer) */
215 msg_frame_address |= MSG_TYPE_REQUEST;
216
217 /* post the frame */
218 headptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_POST_HEAD));
219
220 if( (headptr < MSG_INBOUND_POST_STACK) || (headptr >= (MSG_INBOUND_POST_STACK+MSG_BOUND_STACK_SIZE))) {
221 return -EINVAL;
222 }
223
224 writel_be(msg_frame_address, MIXART_MEM(mgr, headptr));
225
226 /* increment the inbound post head */
227 headptr += 4;
228 if( headptr >= (MSG_INBOUND_POST_STACK+MSG_BOUND_STACK_SIZE) )
229 headptr = MSG_INBOUND_POST_STACK;
230
231 writel_be(headptr, MIXART_MEM(mgr, MSG_INBOUND_POST_HEAD));
232
233 return 0;
234}
235
236
67b48b88 237int snd_mixart_send_msg(struct mixart_mgr *mgr, struct mixart_msg *request, int max_resp_size, void *resp_data)
1da177e4 238{
67b48b88 239 struct mixart_msg resp;
1da177e4
LT
240 u32 msg_frame = 0; /* set to 0, so it's no notification to wait for, but the answer */
241 int err;
242 wait_queue_t wait;
243 long timeout;
244
1da177e4
LT
245 init_waitqueue_entry(&wait, current);
246
8d3a8b5c 247 mutex_lock(&mgr->msg_lock);
1da177e4
LT
248 /* send the message */
249 err = send_msg(mgr, request, max_resp_size, 1, &msg_frame); /* send and mark the answer pending */
250 if (err) {
8d3a8b5c 251 mutex_unlock(&mgr->msg_lock);
1da177e4
LT
252 return err;
253 }
254
255 set_current_state(TASK_UNINTERRUPTIBLE);
256 add_wait_queue(&mgr->msg_sleep, &wait);
8d3a8b5c 257 mutex_unlock(&mgr->msg_lock);
1da177e4
LT
258 timeout = schedule_timeout(MSG_TIMEOUT_JIFFIES);
259 remove_wait_queue(&mgr->msg_sleep, &wait);
260
261 if (! timeout) {
262 /* error - no ack */
6414e35d
TI
263 dev_err(&mgr->pci->dev,
264 "error: no response on msg %x\n", msg_frame);
1da177e4
LT
265 return -EIO;
266 }
267
67b48b88 268 /* retrieve the answer into the same struct mixart_msg */
1da177e4 269 resp.message_id = 0;
67b48b88 270 resp.uid = (struct mixart_uid){0,0};
1da177e4
LT
271 resp.data = resp_data;
272 resp.size = max_resp_size;
273
274 err = get_msg(mgr, &resp, msg_frame);
275
276 if( request->message_id != resp.message_id )
6414e35d 277 dev_err(&mgr->pci->dev, "RESPONSE ERROR!\n");
1da177e4 278
1da177e4
LT
279 return err;
280}
281
282
67b48b88
TI
283int snd_mixart_send_msg_wait_notif(struct mixart_mgr *mgr,
284 struct mixart_msg *request, u32 notif_event)
1da177e4
LT
285{
286 int err;
287 wait_queue_t wait;
288 long timeout;
289
da3cec35
TI
290 if (snd_BUG_ON(!notif_event))
291 return -EINVAL;
292 if (snd_BUG_ON((notif_event & MSG_TYPE_MASK) != MSG_TYPE_NOTIFY))
293 return -EINVAL;
294 if (snd_BUG_ON(notif_event & MSG_CANCEL_NOTIFY_MASK))
295 return -EINVAL;
1da177e4 296
1da177e4
LT
297 init_waitqueue_entry(&wait, current);
298
8d3a8b5c 299 mutex_lock(&mgr->msg_lock);
1da177e4
LT
300 /* send the message */
301 err = send_msg(mgr, request, MSG_DEFAULT_SIZE, 1, &notif_event); /* send and mark the notification event pending */
302 if(err) {
8d3a8b5c 303 mutex_unlock(&mgr->msg_lock);
1da177e4
LT
304 return err;
305 }
306
307 set_current_state(TASK_UNINTERRUPTIBLE);
308 add_wait_queue(&mgr->msg_sleep, &wait);
8d3a8b5c 309 mutex_unlock(&mgr->msg_lock);
1da177e4
LT
310 timeout = schedule_timeout(MSG_TIMEOUT_JIFFIES);
311 remove_wait_queue(&mgr->msg_sleep, &wait);
312
313 if (! timeout) {
314 /* error - no ack */
6414e35d
TI
315 dev_err(&mgr->pci->dev,
316 "error: notification %x not received\n", notif_event);
1da177e4
LT
317 return -EIO;
318 }
319
1da177e4
LT
320 return 0;
321}
322
323
67b48b88 324int snd_mixart_send_msg_nonblock(struct mixart_mgr *mgr, struct mixart_msg *request)
1da177e4
LT
325{
326 u32 message_frame;
1da177e4
LT
327 int err;
328
329 /* just send the message (do not mark it as a pending one) */
8d3a8b5c 330 mutex_lock(&mgr->msg_lock);
1da177e4 331 err = send_msg(mgr, request, MSG_DEFAULT_SIZE, 0, &message_frame);
8d3a8b5c 332 mutex_unlock(&mgr->msg_lock);
1da177e4 333
67b48b88 334 /* the answer will be handled by snd_struct mixart_msgasklet() */
1da177e4
LT
335 atomic_inc(&mgr->msg_processed);
336
337 return err;
338}
339
340
8d3a8b5c 341/* common buffer of interrupt to send/receive messages */
1da177e4
LT
342static u32 mixart_msg_data[MSG_DEFAULT_SIZE / 4];
343
344
8d3a8b5c 345static void snd_mixart_process_msg(struct mixart_mgr *mgr)
1da177e4 346{
67b48b88 347 struct mixart_msg resp;
1da177e4
LT
348 u32 msg, addr, type;
349 int err;
350
1da177e4
LT
351 while (mgr->msg_fifo_readptr != mgr->msg_fifo_writeptr) {
352 msg = mgr->msg_fifo[mgr->msg_fifo_readptr];
353 mgr->msg_fifo_readptr++;
354 mgr->msg_fifo_readptr %= MSG_FIFO_SIZE;
355
356 /* process the message ... */
357 addr = msg & ~MSG_TYPE_MASK;
358 type = msg & MSG_TYPE_MASK;
359
360 switch (type) {
361 case MSG_TYPE_ANSWER:
362 /* answer to a message on that we did not wait for (send_msg_nonblock) */
363 resp.message_id = 0;
364 resp.data = mixart_msg_data;
365 resp.size = sizeof(mixart_msg_data);
366 err = get_msg(mgr, &resp, addr);
367 if( err < 0 ) {
6414e35d 368 dev_err(&mgr->pci->dev,
8d3a8b5c 369 "error(%d) reading mf %x\n",
6414e35d 370 err, msg);
1da177e4
LT
371 break;
372 }
373
374 switch(resp.message_id) {
375 case MSG_STREAM_START_INPUT_STAGE_PACKET:
376 case MSG_STREAM_START_OUTPUT_STAGE_PACKET:
377 case MSG_STREAM_STOP_INPUT_STAGE_PACKET:
378 case MSG_STREAM_STOP_OUTPUT_STAGE_PACKET:
379 if(mixart_msg_data[0])
6414e35d 380 dev_err(&mgr->pci->dev,
8d3a8b5c 381 "error MSG_STREAM_ST***_***PUT_STAGE_PACKET status=%x\n",
6414e35d 382 mixart_msg_data[0]);
1da177e4
LT
383 break;
384 default:
6414e35d 385 dev_dbg(&mgr->pci->dev,
8d3a8b5c 386 "received mf(%x) : msg_id(%x) uid(%x, %x) size(%zd)\n",
1da177e4
LT
387 msg, resp.message_id, resp.uid.object_id, resp.uid.desc, resp.size);
388 break;
389 }
390 break;
391 case MSG_TYPE_NOTIFY:
392 /* msg contains no address ! do not get_msg() ! */
393 case MSG_TYPE_COMMAND:
394 /* get_msg() necessary */
395 default:
6414e35d 396 dev_err(&mgr->pci->dev,
8d3a8b5c 397 "doesn't know what to do with message %x\n",
6414e35d 398 msg);
1da177e4
LT
399 } /* switch type */
400
401 /* decrement counter */
402 atomic_dec(&mgr->msg_processed);
403
404 } /* while there is a msg in fifo */
1da177e4
LT
405}
406
407
7d12e780 408irqreturn_t snd_mixart_interrupt(int irq, void *dev_id)
1da177e4 409{
67b48b88 410 struct mixart_mgr *mgr = dev_id;
1da177e4
LT
411 u32 it_reg;
412
1da177e4
LT
413 it_reg = readl_le(MIXART_REG(mgr, MIXART_PCI_OMISR_OFFSET));
414 if( !(it_reg & MIXART_OIDI) ) {
415 /* this device did not cause the interrupt */
1da177e4
LT
416 return IRQ_NONE;
417 }
418
419 /* mask all interrupts */
420 writel_le(MIXART_HOST_ALL_INTERRUPT_MASKED, MIXART_REG(mgr, MIXART_PCI_OMIMR_OFFSET));
421
422 /* outdoorbell register clear */
423 it_reg = readl(MIXART_REG(mgr, MIXART_PCI_ODBR_OFFSET));
424 writel(it_reg, MIXART_REG(mgr, MIXART_PCI_ODBR_OFFSET));
425
426 /* clear interrupt */
427 writel_le( MIXART_OIDI, MIXART_REG(mgr, MIXART_PCI_OMISR_OFFSET) );
428
8d3a8b5c
TI
429 return IRQ_WAKE_THREAD;
430}
431
432irqreturn_t snd_mixart_threaded_irq(int irq, void *dev_id)
433{
434 struct mixart_mgr *mgr = dev_id;
435 int err;
436 struct mixart_msg resp;
437 u32 msg;
438
439 mutex_lock(&mgr->lock);
1da177e4
LT
440 /* process interrupt */
441 while (retrieve_msg_frame(mgr, &msg)) {
442
443 switch (msg & MSG_TYPE_MASK) {
444 case MSG_TYPE_COMMAND:
445 resp.message_id = 0;
446 resp.data = mixart_msg_data;
447 resp.size = sizeof(mixart_msg_data);
448 err = get_msg(mgr, &resp, msg & ~MSG_TYPE_MASK);
449 if( err < 0 ) {
6414e35d
TI
450 dev_err(&mgr->pci->dev,
451 "interrupt: error(%d) reading mf %x\n",
452 err, msg);
1da177e4
LT
453 break;
454 }
455
456 if(resp.message_id == MSG_SERVICES_TIMER_NOTIFY) {
457 int i;
67b48b88
TI
458 struct mixart_timer_notify *notify;
459 notify = (struct mixart_timer_notify *)mixart_msg_data;
1da177e4
LT
460
461 for(i=0; i<notify->stream_count; i++) {
462
463 u32 buffer_id = notify->streams[i].buffer_id;
464 unsigned int chip_number = (buffer_id & MIXART_NOTIFY_CARD_MASK) >> MIXART_NOTIFY_CARD_OFFSET; /* card0 to 3 */
465 unsigned int pcm_number = (buffer_id & MIXART_NOTIFY_PCM_MASK ) >> MIXART_NOTIFY_PCM_OFFSET; /* pcm0 to 3 */
466 unsigned int sub_number = buffer_id & MIXART_NOTIFY_SUBS_MASK; /* 0 to MIXART_PLAYBACK_STREAMS */
467 unsigned int is_capture = ((buffer_id & MIXART_NOTIFY_CAPT_MASK) != 0); /* playback == 0 / capture == 1 */
468
67b48b88
TI
469 struct snd_mixart *chip = mgr->chip[chip_number];
470 struct mixart_stream *stream;
1da177e4
LT
471
472 if ((chip_number >= mgr->num_cards) || (pcm_number >= MIXART_PCM_TOTAL) || (sub_number >= MIXART_PLAYBACK_STREAMS)) {
6414e35d
TI
473 dev_err(&mgr->pci->dev,
474 "error MSG_SERVICES_TIMER_NOTIFY buffer_id (%x) pos(%d)\n",
1da177e4
LT
475 buffer_id, notify->streams[i].sample_pos_low_part);
476 break;
477 }
478
479 if (is_capture)
480 stream = &chip->capture_stream[pcm_number];
481 else
482 stream = &chip->playback_stream[pcm_number][sub_number];
483
484 if (stream->substream && (stream->status == MIXART_STREAM_STATUS_RUNNING)) {
67b48b88 485 struct snd_pcm_runtime *runtime = stream->substream->runtime;
1da177e4
LT
486 int elapsed = 0;
487 u64 sample_count = ((u64)notify->streams[i].sample_pos_high_part) << 32;
488 sample_count |= notify->streams[i].sample_pos_low_part;
489
490 while (1) {
491 u64 new_elapse_pos = stream->abs_period_elapsed + runtime->period_size;
492
493 if (new_elapse_pos > sample_count) {
494 break; /* while */
495 }
496 else {
497 elapsed = 1;
498 stream->buf_periods++;
499 if (stream->buf_periods >= runtime->periods)
500 stream->buf_periods = 0;
501
502 stream->abs_period_elapsed = new_elapse_pos;
503 }
504 }
505 stream->buf_period_frag = (u32)( sample_count - stream->abs_period_elapsed );
506
507 if(elapsed) {
8d3a8b5c 508 mutex_unlock(&mgr->lock);
1da177e4 509 snd_pcm_period_elapsed(stream->substream);
8d3a8b5c 510 mutex_lock(&mgr->lock);
1da177e4
LT
511 }
512 }
513 }
514 break;
515 }
516 if(resp.message_id == MSG_SERVICES_REPORT_TRACES) {
517 if(resp.size > 1) {
518#ifndef __BIG_ENDIAN
519 /* Traces are text: the swapped msg_data has to be swapped back ! */
520 int i;
521 for(i=0; i<(resp.size/4); i++) {
522 (mixart_msg_data)[i] = cpu_to_be32((mixart_msg_data)[i]);
523 }
524#endif
525 ((char*)mixart_msg_data)[resp.size - 1] = 0;
6414e35d
TI
526 dev_dbg(&mgr->pci->dev,
527 "MIXART TRACE : %s\n",
528 (char *)mixart_msg_data);
1da177e4
LT
529 }
530 break;
531 }
532
6414e35d
TI
533 dev_dbg(&mgr->pci->dev, "command %x not handled\n",
534 resp.message_id);
1da177e4
LT
535 break;
536
537 case MSG_TYPE_NOTIFY:
538 if(msg & MSG_CANCEL_NOTIFY_MASK) {
539 msg &= ~MSG_CANCEL_NOTIFY_MASK;
6414e35d
TI
540 dev_err(&mgr->pci->dev,
541 "canceled notification %x !\n", msg);
1da177e4
LT
542 }
543 /* no break, continue ! */
544 case MSG_TYPE_ANSWER:
545 /* answer or notification to a message we are waiting for*/
8d3a8b5c 546 mutex_lock(&mgr->msg_lock);
1da177e4
LT
547 if( (msg & ~MSG_TYPE_MASK) == mgr->pending_event ) {
548 wake_up(&mgr->msg_sleep);
549 mgr->pending_event = 0;
550 }
551 /* answer to a message we did't want to wait for */
552 else {
553 mgr->msg_fifo[mgr->msg_fifo_writeptr] = msg;
554 mgr->msg_fifo_writeptr++;
555 mgr->msg_fifo_writeptr %= MSG_FIFO_SIZE;
8d3a8b5c 556 snd_mixart_process_msg(mgr);
1da177e4 557 }
8d3a8b5c 558 mutex_unlock(&mgr->msg_lock);
1da177e4
LT
559 break;
560 case MSG_TYPE_REQUEST:
561 default:
6414e35d
TI
562 dev_dbg(&mgr->pci->dev,
563 "interrupt received request %x\n", msg);
1da177e4
LT
564 /* TODO : are there things to do here ? */
565 break;
566 } /* switch on msg type */
567 } /* while there are msgs */
568
569 /* allow interrupt again */
570 writel_le( MIXART_ALLOW_OUTBOUND_DOORBELL, MIXART_REG( mgr, MIXART_PCI_OMIMR_OFFSET));
571
8d3a8b5c 572 mutex_unlock(&mgr->lock);
1da177e4
LT
573
574 return IRQ_HANDLED;
575}
576
577
67b48b88 578void snd_mixart_init_mailbox(struct mixart_mgr *mgr)
1da177e4
LT
579{
580 writel( 0, MIXART_MEM( mgr, MSG_HOST_RSC_PROTECTION ) );
581 writel( 0, MIXART_MEM( mgr, MSG_AGENT_RSC_PROTECTION ) );
582
583 /* allow outbound messagebox to generate interrupts */
584 if(mgr->irq >= 0) {
585 writel_le( MIXART_ALLOW_OUTBOUND_DOORBELL, MIXART_REG( mgr, MIXART_PCI_OMIMR_OFFSET));
586 }
587 return;
588}
589
67b48b88 590void snd_mixart_exit_mailbox(struct mixart_mgr *mgr)
1da177e4
LT
591{
592 /* no more interrupts on outbound messagebox */
593 writel_le( MIXART_HOST_ALL_INTERRUPT_MASKED, MIXART_REG( mgr, MIXART_PCI_OMIMR_OFFSET));
594 return;
595}
596
67b48b88 597void snd_mixart_reset_board(struct mixart_mgr *mgr)
1da177e4
LT
598{
599 /* reset miXart */
600 writel_be( 1, MIXART_REG(mgr, MIXART_BA1_BRUTAL_RESET_OFFSET) );
601 return;
602}