[linux-2.6-block.git] / sound / pci / ice1712 / phase.h

#ifndef __SOUND_PHASE_H
#define __SOUND_PHASE_H

/*
 *   ALSA driver for ICEnsemble ICE1712 (Envy24)
 *
 *   Lowlevel functions for Terratec PHASE 22
 *
 *	Copyright (c) 2005 Misha Zhilin <misha@epiphan.com>
 *
 *   This program is free software; you can redistribute it and/or modify
 *   it under the terms of the GNU General Public License as published by
 *   the Free Software Foundation; either version 2 of the License, or
 *   (at your option) any later version.
 *
 *   This program is distributed in the hope that it will be useful,
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *   GNU General Public License for more details.
 *
 *   You should have received a copy of the GNU General Public License
 *   along with this program; if not, write to the Free Software
 *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 *
 */

#define PHASE_DEVICE_DESC	"{Terratec,Phase 22},"\
				"{Terratec,Phase 28},"\
				"{Terrasoniq,TS22},"

#define VT1724_SUBDEVICE_PHASE22	0x3b155011
#define VT1724_SUBDEVICE_PHASE28	0x3b154911
#define VT1724_SUBDEVICE_TS22		0x3b157b11

/* entry point */
extern struct snd_ice1712_card_info snd_vt1724_phase_cards[];

/* PHASE28 GPIO bits */
#define PHASE28_SPI_MISO	(1 << 21)
#define PHASE28_WM_RESET	(1 << 20)
#define PHASE28_SPI_CLK		(1 << 19)
#define PHASE28_SPI_MOSI	(1 << 18)
#define PHASE28_WM_RW		(1 << 17)
#define PHASE28_AC97_RESET	(1 << 16)
#define PHASE28_DIGITAL_SEL1	(1 << 15)
#define PHASE28_HP_SEL		(1 << 14)
#define PHASE28_WM_CS		(1 << 12)
#define PHASE28_AC97_COMMIT	(1 << 11)
#define PHASE28_AC97_ADDR	(1 << 10)
#define PHASE28_AC97_DATA_LOW	(1 << 9)
#define PHASE28_AC97_DATA_HIGH	(1 << 8)
#define PHASE28_AC97_DATA_MASK	0xFF
#endif /* __SOUND_PHASE */
Commit	Line	Data
1da177e4 LT	1	#ifndef __SOUND_PHASE_H
	2	#define __SOUND_PHASE_H
	3
	4	/*
	5	* ALSA driver for ICEnsemble ICE1712 (Envy24)
	6	*
	7	* Lowlevel functions for Terratec PHASE 22
	8	*
	9	* Copyright (c) 2005 Misha Zhilin <misha@epiphan.com>
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License as published by
	13	* the Free Software Foundation; either version 2 of the License, or
	14	* (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	24	*
cc67b7f7	25	*/
1da177e4	26
cc67b7f7 VM	27	#define PHASE_DEVICE_DESC "{Terratec,Phase 22},"\
	28	"{Terratec,Phase 28},"\
	29	"{Terrasoniq,TS22},"
1da177e4 LT	30
1da177e4 LT	31	#define VT1724_SUBDEVICE_PHASE22 0x3b155011
aed058e8	32	#define VT1724_SUBDEVICE_PHASE28 0x3b154911
740dc9c4	33	#define VT1724_SUBDEVICE_TS22 0x3b157b11
1da177e4 LT	34
1da177e4 LT	35	/* entry point */
1b60f6b0	36	extern struct snd_ice1712_card_info snd_vt1724_phase_cards[];
1da177e4	37
aed058e8 SZ	38	/* PHASE28 GPIO bits */
	39	#define PHASE28_SPI_MISO (1 << 21)
	40	#define PHASE28_WM_RESET (1 << 20)
	41	#define PHASE28_SPI_CLK (1 << 19)
	42	#define PHASE28_SPI_MOSI (1 << 18)
	43	#define PHASE28_WM_RW (1 << 17)
	44	#define PHASE28_AC97_RESET (1 << 16)
	45	#define PHASE28_DIGITAL_SEL1 (1 << 15)
	46	#define PHASE28_HP_SEL (1 << 14)
	47	#define PHASE28_WM_CS (1 << 12)
	48	#define PHASE28_AC97_COMMIT (1 << 11)
	49	#define PHASE28_AC97_ADDR (1 << 10)
	50	#define PHASE28_AC97_DATA_LOW (1 << 9)
	51	#define PHASE28_AC97_DATA_HIGH (1 << 8)
	52	#define PHASE28_AC97_DATA_MASK 0xFF
1da177e4	53	#endif /* __SOUND_PHASE */