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Merge tag 'v5.19-rc6' into usb-linus
[linux-block.git] / sound / pci / ice1712 / juli.c
CommitLineData
1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT		 2/*
3 * ALSA driver for ICEnsemble VT1724 (Envy24HT)
4 *
5 * Lowlevel functions for ESI Juli@ cards
6 *
c1017a4c 7 * Copyright (c) 2004 Jaroslav Kysela <perex@perex.cz>
d16be8ed 8 * 2008 Pavel Hofman <dustin@seznam.cz>
cc67b7f7 9 */
1da177e4 10
1da177e4
LT		 11#include <linux/delay.h>
12#include <linux/interrupt.h>
13#include <linux/init.h>
14#include <linux/slab.h>
338e17d3 15#include <linux/string.h>
1da177e4 16#include <sound/core.h>
d16be8ed 17#include <sound/tlv.h>
1da177e4
LT		 18
19#include "ice1712.h"
20#include "envy24ht.h"
21#include "juli.h"
cc67b7f7 22
7cda8ba9
TI		 23struct juli_spec {
24 struct ak4114 *ak4114;
cc67b7f7 25 unsigned int analog:1;
7cda8ba9
TI		 26};
27
1da177e4
LT		 28/*
29 * chip addresses on I2C bus
30 */
31#define AK4114_ADDR 0x20 /* S/PDIF receiver */
32#define AK4358_ADDR 0x22 /* DAC */
33
d16be8ed
PH		 34/*
35 * Juli does not use the standard ICE1724 clock scheme. Juli's ice1724 chip is
36 * supplied by external clock provided by Xilinx array and MK73-1 PLL frequency
37 * multiplier. Actual frequency is set by ice1724 GPIOs hooked to the Xilinx.
38 *
39 * The clock circuitry is supplied by the two ice1724 crystals. This
40 * arrangement allows to generate independent clock signal for AK4114's input
41 * rate detection circuit. As a result, Juli, unlike most other
42 * ice1724+ak4114-based cards, detects spdif input rate correctly.
43 * This fact is applied in the driver, allowing to modify PCM stream rate
44 * parameter according to the actual input rate.
45 *
46 * Juli uses the remaining three stereo-channels of its DAC to optionally
47 * monitor analog input, digital input, and digital output. The corresponding
48 * I2S signals are routed by Xilinx, controlled by GPIOs.
49 *
50 * The master mute is implemented using output muting transistors (GPIO) in
51 * combination with smuting the DAC.
52 *
53 * The card itself has no HW master volume control, implemented using the
54 * vmaster control.
55 *
56 * TODO:
57 * researching and fixing the input monitors
58 */
59
1da177e4
LT		 60/*
61 * GPIO pins
62 */
63#define GPIO_FREQ_MASK (3<<0)
64#define GPIO_FREQ_32KHZ (0<<0)
65#define GPIO_FREQ_44KHZ (1<<0)
66#define GPIO_FREQ_48KHZ (2<<0)
67#define GPIO_MULTI_MASK (3<<2)
68#define GPIO_MULTI_4X (0<<2)
69#define GPIO_MULTI_2X (1<<2)
70#define GPIO_MULTI_1X (2<<2) /* also external */
71#define GPIO_MULTI_HALF (3<<2)
d16be8ed
PH		 72#define GPIO_INTERNAL_CLOCK (1<<4) /* 0 = external, 1 = internal */
73#define GPIO_CLOCK_MASK (1<<4)
1da177e4
LT		 74#define GPIO_ANALOG_PRESENT (1<<5) /* RO only: 0 = present */
75#define GPIO_RXMCLK_SEL (1<<7) /* must be 0 */
76#define GPIO_AK5385A_CKS0 (1<<8)
d16be8ed
PH		 77#define GPIO_AK5385A_DFS1 (1<<9)
78#define GPIO_AK5385A_DFS0 (1<<10)
1da177e4
LT		 79#define GPIO_DIGOUT_MONITOR (1<<11) /* 1 = active */
80#define GPIO_DIGIN_MONITOR (1<<12) /* 1 = active */
81#define GPIO_ANAIN_MONITOR (1<<13) /* 1 = active */
d16be8ed
PH		 82#define GPIO_AK5385A_CKS1 (1<<14) /* must be 0 */
83#define GPIO_MUTE_CONTROL (1<<15) /* output mute, 1 = muted */
84
85#define GPIO_RATE_MASK (GPIO_FREQ_MASK | GPIO_MULTI_MASK | \
86 GPIO_CLOCK_MASK)
87#define GPIO_AK5385A_MASK (GPIO_AK5385A_CKS0 | GPIO_AK5385A_DFS0 | \
88 GPIO_AK5385A_DFS1 | GPIO_AK5385A_CKS1)
89
90#define JULI_PCM_RATE (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
91 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
92 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
93 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \
94 SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
95
96#define GPIO_RATE_16000 (GPIO_FREQ_32KHZ | GPIO_MULTI_HALF | \
97 GPIO_INTERNAL_CLOCK)
98#define GPIO_RATE_22050 (GPIO_FREQ_44KHZ | GPIO_MULTI_HALF | \
99 GPIO_INTERNAL_CLOCK)
100#define GPIO_RATE_24000 (GPIO_FREQ_48KHZ | GPIO_MULTI_HALF | \
101 GPIO_INTERNAL_CLOCK)
102#define GPIO_RATE_32000 (GPIO_FREQ_32KHZ | GPIO_MULTI_1X | \
103 GPIO_INTERNAL_CLOCK)
104#define GPIO_RATE_44100 (GPIO_FREQ_44KHZ | GPIO_MULTI_1X | \
105 GPIO_INTERNAL_CLOCK)
106#define GPIO_RATE_48000 (GPIO_FREQ_48KHZ | GPIO_MULTI_1X | \
107 GPIO_INTERNAL_CLOCK)
108#define GPIO_RATE_64000 (GPIO_FREQ_32KHZ | GPIO_MULTI_2X | \
109 GPIO_INTERNAL_CLOCK)
110#define GPIO_RATE_88200 (GPIO_FREQ_44KHZ | GPIO_MULTI_2X | \
111 GPIO_INTERNAL_CLOCK)
112#define GPIO_RATE_96000 (GPIO_FREQ_48KHZ | GPIO_MULTI_2X | \
113 GPIO_INTERNAL_CLOCK)
114#define GPIO_RATE_176400 (GPIO_FREQ_44KHZ | GPIO_MULTI_4X | \
115 GPIO_INTERNAL_CLOCK)
116#define GPIO_RATE_192000 (GPIO_FREQ_48KHZ | GPIO_MULTI_4X | \
117 GPIO_INTERNAL_CLOCK)
118
119/*
120 * Initial setup of the conversion array GPIO <-> rate
121 */
965f19be 122static const unsigned int juli_rates[] = {
d16be8ed
PH		 123 16000, 22050, 24000, 32000,
124 44100, 48000, 64000, 88200,
125 96000, 176400, 192000,
126};
127
965f19be 128static const unsigned int gpio_vals[] = {
d16be8ed
PH		 129 GPIO_RATE_16000, GPIO_RATE_22050, GPIO_RATE_24000, GPIO_RATE_32000,
130 GPIO_RATE_44100, GPIO_RATE_48000, GPIO_RATE_64000, GPIO_RATE_88200,
131 GPIO_RATE_96000, GPIO_RATE_176400, GPIO_RATE_192000,
132};
133
965f19be 134static const struct snd_pcm_hw_constraint_list juli_rates_info = {
d16be8ed
PH		 135 .count = ARRAY_SIZE(juli_rates),
136 .list = juli_rates,
137 .mask = 0,
138};
139
140static int get_gpio_val(int rate)
141{
142 int i;
143 for (i = 0; i < ARRAY_SIZE(juli_rates); i++)
144 if (juli_rates[i] == rate)
145 return gpio_vals[i];
146 return 0;
147}
1da177e4 148
cc67b7f7
VM		 149static void juli_ak4114_write(void *private_data, unsigned char reg,
150 unsigned char val)
1da177e4 151{
cc67b7f7
VM		 152 snd_vt1724_write_i2c((struct snd_ice1712 *)private_data, AK4114_ADDR,
153 reg, val);
1da177e4 154}
cc67b7f7 155
1da177e4
LT		 156static unsigned char juli_ak4114_read(void *private_data, unsigned char reg)
157{
cc67b7f7
VM		 158 return snd_vt1724_read_i2c((struct snd_ice1712 *)private_data,
159 AK4114_ADDR, reg);
1da177e4
LT		 160}
161
d16be8ed
PH		 162/*
163 * If SPDIF capture and slaved to SPDIF-IN, setting runtime rate
164 * to the external rate
165 */
c93f5a1e 166static void juli_spdif_in_open(struct snd_ice1712 *ice,
cc67b7f7 167 struct snd_pcm_substream *substream)
c93f5a1e
TI		 168{
169 struct juli_spec *spec = ice->spec;
170 struct snd_pcm_runtime *runtime = substream->runtime;
171 int rate;
172
d16be8ed
PH		 173 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ||
174 !ice->is_spdif_master(ice))
c93f5a1e
TI		 175 return;
176 rate = snd_ak4114_external_rate(spec->ak4114);
177 if (rate >= runtime->hw.rate_min && rate <= runtime->hw.rate_max) {
178 runtime->hw.rate_min = rate;
179 runtime->hw.rate_max = rate;
180 }
181}
182
1da177e4
LT		 183/*
184 * AK4358 section
185 */
186
ab0c7d72 187static void juli_akm_lock(struct snd_akm4xxx *ak, int chip)
1da177e4
LT		 188{
189}
190
ab0c7d72 191static void juli_akm_unlock(struct snd_akm4xxx *ak, int chip)
1da177e4
LT		 192{
193}
194
ab0c7d72 195static void juli_akm_write(struct snd_akm4xxx *ak, int chip,
1da177e4
LT		 196 unsigned char addr, unsigned char data)
197{
ab0c7d72 198 struct snd_ice1712 *ice = ak->private_data[0];
1da177e4 199
da3cec35
TI		 200 if (snd_BUG_ON(chip))
201 return;
1da177e4
LT		 202 snd_vt1724_write_i2c(ice, AK4358_ADDR, addr, data);
203}
204
205/*
d16be8ed 206 * change the rate of envy24HT, AK4358, AK5385
1da177e4 207 */
ab0c7d72 208static void juli_akm_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
1da177e4 209{
d16be8ed
PH		 210 unsigned char old, tmp, ak4358_dfs;
211 unsigned int ak5385_pins, old_gpio, new_gpio;
212 struct snd_ice1712 *ice = ak->private_data[0];
213 struct juli_spec *spec = ice->spec;
1da177e4 214
d16be8ed
PH		 215 if (rate == 0) /* no hint - S/PDIF input is master or the new spdif
216 input rate undetected, simply return */
1da177e4 217 return;
d16be8ed 218
1da177e4 219 /* adjust DFS on codecs */
d16be8ed
PH		 220 if (rate > 96000) {
221 ak4358_dfs = 2;
222 ak5385_pins = GPIO_AK5385A_DFS1 | GPIO_AK5385A_CKS0;
223 } else if (rate > 48000) {
224 ak4358_dfs = 1;
225 ak5385_pins = GPIO_AK5385A_DFS0;
226 } else {
227 ak4358_dfs = 0;
228 ak5385_pins = 0;
229 }
230 /* AK5385 first, since it requires cold reset affecting both codecs */
231 old_gpio = ice->gpio.get_data(ice);
232 new_gpio = (old_gpio & ~GPIO_AK5385A_MASK) | ak5385_pins;
6dfb5aff 233 /* dev_dbg(ice->card->dev, "JULI - ak5385 set_rate_val: new gpio 0x%x\n",
d16be8ed
PH		 234 new_gpio); */
235 ice->gpio.set_data(ice, new_gpio);
236
237 /* cold reset */
238 old = inb(ICEMT1724(ice, AC97_CMD));
239 outb(old | VT1724_AC97_COLD, ICEMT1724(ice, AC97_CMD));
240 udelay(1);
241 outb(old & ~VT1724_AC97_COLD, ICEMT1724(ice, AC97_CMD));
242
243 /* AK4358 */
244 /* set new value, reset DFS */
1da177e4 245 tmp = snd_akm4xxx_get(ak, 0, 2);
1da177e4
LT		 246 snd_akm4xxx_reset(ak, 1);
247 tmp = snd_akm4xxx_get(ak, 0, 2);
248 tmp &= ~(0x03 << 4);
d16be8ed 249 tmp |= ak4358_dfs << 4;
1da177e4
LT		 250 snd_akm4xxx_set(ak, 0, 2, tmp);
251 snd_akm4xxx_reset(ak, 0);
d16be8ed
PH		 252
253 /* reinit ak4114 */
254 snd_ak4114_reinit(spec->ak4114);
1da177e4
LT		 255}
256
d16be8ed
PH		 257#define AK_DAC(xname, xch) { .name = xname, .num_channels = xch }
258#define PCM_VOLUME "PCM Playback Volume"
259#define MONITOR_AN_IN_VOLUME "Monitor Analog In Volume"
260#define MONITOR_DIG_IN_VOLUME "Monitor Digital In Volume"
261#define MONITOR_DIG_OUT_VOLUME "Monitor Digital Out Volume"
262
263static const struct snd_akm4xxx_dac_channel juli_dac[] = {
264 AK_DAC(PCM_VOLUME, 2),
265 AK_DAC(MONITOR_AN_IN_VOLUME, 2),
266 AK_DAC(MONITOR_DIG_OUT_VOLUME, 2),
267 AK_DAC(MONITOR_DIG_IN_VOLUME, 2),
268};
269
270
3135432e 271static const struct snd_akm4xxx akm_juli_dac = {
1da177e4 272 .type = SND_AK4358,
d16be8ed
PH		 273 .num_dacs = 8, /* DAC1 - analog out
274 DAC2 - analog in monitor
275 DAC3 - digital out monitor
276 DAC4 - digital in monitor
277 */
1da177e4
LT		 278 .ops = {
279 .lock = juli_akm_lock,
280 .unlock = juli_akm_unlock,
281 .write = juli_akm_write,
282 .set_rate_val = juli_akm_set_rate_val
d16be8ed
PH		 283 },
284 .dac_info = juli_dac,
285};
286
287#define juli_mute_info snd_ctl_boolean_mono_info
288
289static int juli_mute_get(struct snd_kcontrol *kcontrol,
290 struct snd_ctl_elem_value *ucontrol)
291{
292 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
293 unsigned int val;
294 val = ice->gpio.get_data(ice) & (unsigned int) kcontrol->private_value;
295 if (kcontrol->private_value == GPIO_MUTE_CONTROL)
296 /* val 0 = signal on */
297 ucontrol->value.integer.value[0] = (val) ? 0 : 1;
298 else
299 /* val 1 = signal on */
300 ucontrol->value.integer.value[0] = (val) ? 1 : 0;
301 return 0;
302}
303
304static int juli_mute_put(struct snd_kcontrol *kcontrol,
305 struct snd_ctl_elem_value *ucontrol)
306{
307 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
308 unsigned int old_gpio, new_gpio;
309 old_gpio = ice->gpio.get_data(ice);
310 if (ucontrol->value.integer.value[0]) {
311 /* unmute */
312 if (kcontrol->private_value == GPIO_MUTE_CONTROL) {
313 /* 0 = signal on */
314 new_gpio = old_gpio & ~GPIO_MUTE_CONTROL;
315 /* un-smuting DAC */
316 snd_akm4xxx_write(ice->akm, 0, 0x01, 0x01);
317 } else
318 /* 1 = signal on */
319 new_gpio = old_gpio |
320 (unsigned int) kcontrol->private_value;
321 } else {
322 /* mute */
323 if (kcontrol->private_value == GPIO_MUTE_CONTROL) {
324 /* 1 = signal off */
325 new_gpio = old_gpio | GPIO_MUTE_CONTROL;
326 /* smuting DAC */
327 snd_akm4xxx_write(ice->akm, 0, 0x01, 0x03);
328 } else
329 /* 0 = signal off */
330 new_gpio = old_gpio &
331 ~((unsigned int) kcontrol->private_value);
332 }
6dfb5aff 333 /* dev_dbg(ice->card->dev,
e2ea7cfc
TI		 334 "JULI - mute/unmute: control_value: 0x%x, old_gpio: 0x%x, "
335 "new_gpio 0x%x\n",
d16be8ed
PH		 336 (unsigned int)ucontrol->value.integer.value[0], old_gpio,
337 new_gpio); */
338 if (old_gpio != new_gpio) {
339 ice->gpio.set_data(ice, new_gpio);
340 return 1;
341 }
342 /* no change */
343 return 0;
344}
345
b4e5e707 346static const struct snd_kcontrol_new juli_mute_controls[] = {
d16be8ed
PH		 347 {
348 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
349 .name = "Master Playback Switch",
350 .info = juli_mute_info,
351 .get = juli_mute_get,
352 .put = juli_mute_put,
353 .private_value = GPIO_MUTE_CONTROL,
354 },
355 /* Although the following functionality respects the succint NDA'd
356 * documentation from the card manufacturer, and the same way of
357 * operation is coded in OSS Juli driver, only Digital Out monitor
358 * seems to work. Surprisingly, Analog input monitor outputs Digital
359 * output data. The two are independent, as enabling both doubles
360 * volume of the monitor sound.
361 *
362 * Checking traces on the board suggests the functionality described
363 * by the manufacturer is correct - I2S from ADC and AK4114
364 * go to ICE as well as to Xilinx, I2S inputs of DAC2,3,4 (the monitor
365 * inputs) are fed from Xilinx.
366 *
367 * I even checked traces on board and coded a support in driver for
06fe9fb4 368 * an alternative possibility - the unused I2S ICE output channels
d16be8ed
PH		 369 * switched to HW-IN/SPDIF-IN and providing the monitoring signal to
370 * the DAC - to no avail. The I2S outputs seem to be unconnected.
371 *
372 * The windows driver supports the monitoring correctly.
373 */
374 {
375 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
376 .name = "Monitor Analog In Switch",
377 .info = juli_mute_info,
378 .get = juli_mute_get,
379 .put = juli_mute_put,
380 .private_value = GPIO_ANAIN_MONITOR,
381 },
382 {
383 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
384 .name = "Monitor Digital Out Switch",
385 .info = juli_mute_info,
386 .get = juli_mute_get,
387 .put = juli_mute_put,
388 .private_value = GPIO_DIGOUT_MONITOR,
389 },
390 {
391 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
392 .name = "Monitor Digital In Switch",
393 .info = juli_mute_info,
394 .get = juli_mute_get,
395 .put = juli_mute_put,
396 .private_value = GPIO_DIGIN_MONITOR,
397 },
398};
399
9ab0cb30 400static const char * const follower_vols[] = {
d16be8ed
PH		 401 PCM_VOLUME,
402 MONITOR_AN_IN_VOLUME,
403 MONITOR_DIG_IN_VOLUME,
404 MONITOR_DIG_OUT_VOLUME,
405 NULL
1da177e4
LT		 406};
407
e23e7a14 408static
d16be8ed
PH		 409DECLARE_TLV_DB_SCALE(juli_master_db_scale, -6350, 50, 1);
410
e23e7a14
BP		 411static struct snd_kcontrol *ctl_find(struct snd_card *card,
412 const char *name)
d16be8ed 413{
338e17d3
JP		 414 struct snd_ctl_elem_id sid = {0};
415
75b1a8f9 416 strscpy(sid.name, name, sizeof(sid.name));
d16be8ed
PH		 417 sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
418 return snd_ctl_find_id(card, &sid);
419}
420
9ab0cb30
TI		 421static void add_followers(struct snd_card *card,
422 struct snd_kcontrol *master,
423 const char * const *list)
d16be8ed
PH		 424{
425 for (; *list; list++) {
9ab0cb30
TI		 426 struct snd_kcontrol *follower = ctl_find(card, *list);
427 /* dev_dbg(card->dev, "add_followers - %s\n", *list); */
428 if (follower) {
429 /* dev_dbg(card->dev, "follower %s found\n", *list); */
430 snd_ctl_add_follower(master, follower);
d16be8ed
PH		 431 }
432 }
433}
434
e23e7a14 435static int juli_add_controls(struct snd_ice1712 *ice)
1da177e4 436{
7cda8ba9 437 struct juli_spec *spec = ice->spec;
fdd4bb49 438 int err;
d16be8ed
PH		 439 unsigned int i;
440 struct snd_kcontrol *vmaster;
441
fdd4bb49
TI		 442 err = snd_ice1712_akm4xxx_build_controls(ice);
443 if (err < 0)
444 return err;
d16be8ed
PH		 445
446 for (i = 0; i < ARRAY_SIZE(juli_mute_controls); i++) {
447 err = snd_ctl_add(ice->card,
448 snd_ctl_new1(&juli_mute_controls[i], ice));
449 if (err < 0)
450 return err;
451 }
452 /* Create virtual master control */
453 vmaster = snd_ctl_make_virtual_master("Master Playback Volume",
454 juli_master_db_scale);
455 if (!vmaster)
456 return -ENOMEM;
9ab0cb30 457 add_followers(ice->card, vmaster, follower_vols);
d16be8ed
PH		 458 err = snd_ctl_add(ice->card, vmaster);
459 if (err < 0)
460 return err;
461
fdd4bb49 462 /* only capture SPDIF over AK4114 */
387417b5 463 return snd_ak4114_build(spec->ak4114, NULL,
d16be8ed 464 ice->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1da177e4
LT		 465}
466
50d40f18
AK		 467/*
468 * suspend/resume
469 * */
470
c7561cd8 471#ifdef CONFIG_PM_SLEEP
50d40f18
AK		 472static int juli_resume(struct snd_ice1712 *ice)
473{
474 struct snd_akm4xxx *ak = ice->akm;
475 struct juli_spec *spec = ice->spec;
476 /* akm4358 un-reset, un-mute */
477 snd_akm4xxx_reset(ak, 0);
478 /* reinit ak4114 */
1293617c 479 snd_ak4114_resume(spec->ak4114);
50d40f18
AK		 480 return 0;
481}
482
483static int juli_suspend(struct snd_ice1712 *ice)
484{
485 struct snd_akm4xxx *ak = ice->akm;
1293617c 486 struct juli_spec *spec = ice->spec;
50d40f18
AK		 487 /* akm4358 reset and soft-mute */
488 snd_akm4xxx_reset(ak, 1);
1293617c 489 snd_ak4114_suspend(spec->ak4114);
50d40f18
AK		 490 return 0;
491}
492#endif
493
1da177e4
LT		 494/*
495 * initialize the chip
496 */
d16be8ed
PH		 497
498static inline int juli_is_spdif_master(struct snd_ice1712 *ice)
499{
500 return (ice->gpio.get_data(ice) & GPIO_INTERNAL_CLOCK) ? 0 : 1;
501}
502
503static unsigned int juli_get_rate(struct snd_ice1712 *ice)
504{
505 int i;
506 unsigned char result;
507
508 result = ice->gpio.get_data(ice) & GPIO_RATE_MASK;
509 for (i = 0; i < ARRAY_SIZE(gpio_vals); i++)
510 if (gpio_vals[i] == result)
511 return juli_rates[i];
512 return 0;
513}
514
515/* setting new rate */
516static void juli_set_rate(struct snd_ice1712 *ice, unsigned int rate)
517{
518 unsigned int old, new;
519 unsigned char val;
520
521 old = ice->gpio.get_data(ice);
522 new = (old & ~GPIO_RATE_MASK) | get_gpio_val(rate);
6dfb5aff 523 /* dev_dbg(ice->card->dev, "JULI - set_rate: old %x, new %x\n",
d16be8ed
PH		 524 old & GPIO_RATE_MASK,
525 new & GPIO_RATE_MASK); */
526
527 ice->gpio.set_data(ice, new);
528 /* switching to external clock - supplied by external circuits */
529 val = inb(ICEMT1724(ice, RATE));
530 outb(val | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
531}
532
533static inline unsigned char juli_set_mclk(struct snd_ice1712 *ice,
534 unsigned int rate)
535{
536 /* no change in master clock */
537 return 0;
538}
539
540/* setting clock to external - SPDIF */
1ff97cb9 541static int juli_set_spdif_clock(struct snd_ice1712 *ice, int type)
d16be8ed
PH		 542{
543 unsigned int old;
544 old = ice->gpio.get_data(ice);
545 /* external clock (= 0), multiply 1x, 48kHz */
546 ice->gpio.set_data(ice, (old & ~GPIO_RATE_MASK) | GPIO_MULTI_1X |
547 GPIO_FREQ_48KHZ);
1ff97cb9 548 return 0;
d16be8ed
PH		 549}
550
551/* Called when ak4114 detects change in the input SPDIF stream */
552static void juli_ak4114_change(struct ak4114 *ak4114, unsigned char c0,
553 unsigned char c1)
554{
555 struct snd_ice1712 *ice = ak4114->change_callback_private;
556 int rate;
557 if (ice->is_spdif_master(ice) && c1) {
558 /* only for SPDIF master mode, rate was changed */
559 rate = snd_ak4114_external_rate(ak4114);
6dfb5aff 560 /* dev_dbg(ice->card->dev, "ak4114 - input rate changed to %d\n",
d16be8ed
PH		 561 rate); */
562 juli_akm_set_rate_val(ice->akm, rate);
563 }
564}
565
e23e7a14 566static int juli_init(struct snd_ice1712 *ice)
1da177e4 567{
517400cb 568 static const unsigned char ak4114_init_vals[] = {
cc67b7f7
VM		 569 /* AK4117_REG_PWRDN */ AK4114_RST | AK4114_PWN |
570 AK4114_OCKS0 | AK4114_OCKS1,
1da177e4
LT		 571 /* AK4114_REQ_FORMAT */ AK4114_DIF_I24I2S,
572 /* AK4114_REG_IO0 */ AK4114_TX1E,
cc67b7f7
VM		 573 /* AK4114_REG_IO1 */ AK4114_EFH_1024 | AK4114_DIT |
574 AK4114_IPS(1),
1da177e4
LT		 575 /* AK4114_REG_INT0_MASK */ 0,
576 /* AK4114_REG_INT1_MASK */ 0
577 };
517400cb 578 static const unsigned char ak4114_init_txcsb[] = {
1da177e4
LT		 579 0x41, 0x02, 0x2c, 0x00, 0x00
580 };
581 int err;
7cda8ba9 582 struct juli_spec *spec;
ab0c7d72 583 struct snd_akm4xxx *ak;
1da177e4 584
7cda8ba9
TI		 585 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
586 if (!spec)
587 return -ENOMEM;
588 ice->spec = spec;
589
1da177e4
LT		 590 err = snd_ak4114_create(ice->card,
591 juli_ak4114_read,
592 juli_ak4114_write,
593 ak4114_init_vals, ak4114_init_txcsb,
7cda8ba9 594 ice, &spec->ak4114);
1da177e4
LT		 595 if (err < 0)
596 return err;
d16be8ed
PH		 597 /* callback for codecs rate setting */
598 spec->ak4114->change_callback = juli_ak4114_change;
599 spec->ak4114->change_callback_private = ice;
600 /* AK4114 in Juli can detect external rate correctly */
601 spec->ak4114->check_flags = 0;
1da177e4 602
fd6715e5 603#if 0
cc67b7f7
VM		 604/*
605 * it seems that the analog doughter board detection does not work reliably, so
606 * force the analog flag; it should be very rare (if ever) to come at Juli@
607 * used without the analog daughter board
608 */
7cda8ba9 609 spec->analog = (ice->gpio.get_data(ice) & GPIO_ANALOG_PRESENT) ? 0 : 1;
fd6715e5 610#else
cc67b7f7 611 spec->analog = 1;
fd6715e5 612#endif
1da177e4 613
7cda8ba9 614 if (spec->analog) {
6dfb5aff 615 dev_info(ice->card->dev, "juli@: analog I/O detected\n");
1da177e4
LT		 616 ice->num_total_dacs = 2;
617 ice->num_total_adcs = 2;
618
cc67b7f7
VM		 619 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
620 ak = ice->akm;
621 if (!ak)
1da177e4
LT		 622 return -ENOMEM;
623 ice->akm_codecs = 1;
cc67b7f7
VM		 624 err = snd_ice1712_akm4xxx_init(ak, &akm_juli_dac, NULL, ice);
625 if (err < 0)
1da177e4
LT		 626 return err;
627 }
cc67b7f7 628
d16be8ed
PH		 629 /* juli is clocked by Xilinx array */
630 ice->hw_rates = &juli_rates_info;
631 ice->is_spdif_master = juli_is_spdif_master;
632 ice->get_rate = juli_get_rate;
633 ice->set_rate = juli_set_rate;
634 ice->set_mclk = juli_set_mclk;
635 ice->set_spdif_clock = juli_set_spdif_clock;
636
c93f5a1e 637 ice->spdif.ops.open = juli_spdif_in_open;
50d40f18 638
c7561cd8 639#ifdef CONFIG_PM_SLEEP
50d40f18
AK		 640 ice->pm_resume = juli_resume;
641 ice->pm_suspend = juli_suspend;
642 ice->pm_suspend_enabled = 1;
643#endif
644
1da177e4
LT		 645 return 0;
646}
647
648
649/*
650 * Juli@ boards don't provide the EEPROM data except for the vendor IDs.
651 * hence the driver needs to sets up it properly.
652 */
653
f16a4e96 654static const unsigned char juli_eeprom[] = {
d16be8ed
PH		 655 [ICE_EEP2_SYSCONF] = 0x2b, /* clock 512, mpu401, 1xADC, 1xDACs,
656 SPDIF in */
189bc171
TI		 657 [ICE_EEP2_ACLINK] = 0x80, /* I2S */
658 [ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */
659 [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
d16be8ed 660 [ICE_EEP2_GPIO_DIR] = 0x9f, /* 5, 6:inputs; 7, 4-0 outputs*/
189bc171
TI		 661 [ICE_EEP2_GPIO_DIR1] = 0xff,
662 [ICE_EEP2_GPIO_DIR2] = 0x7f,
d16be8ed
PH		 663 [ICE_EEP2_GPIO_MASK] = 0x60, /* 5, 6: locked; 7, 4-0 writable */
664 [ICE_EEP2_GPIO_MASK1] = 0x00, /* 0-7 writable */
189bc171 665 [ICE_EEP2_GPIO_MASK2] = 0x7f,
d16be8ed
PH		 666 [ICE_EEP2_GPIO_STATE] = GPIO_FREQ_48KHZ | GPIO_MULTI_1X |
667 GPIO_INTERNAL_CLOCK, /* internal clock, multiple 1x, 48kHz*/
668 [ICE_EEP2_GPIO_STATE1] = 0x00, /* unmuted */
189bc171 669 [ICE_EEP2_GPIO_STATE2] = 0x00,
1da177e4
LT		 670};
671
672/* entry point */
e23e7a14 673struct snd_ice1712_card_info snd_vt1724_juli_cards[] = {
1da177e4
LT		 674 {
675 .subvendor = VT1724_SUBDEVICE_JULI,
676 .name = "ESI Juli@",
677 .model = "juli",
678 .chip_init = juli_init,
679 .build_controls = juli_add_controls,
680 .eeprom_size = sizeof(juli_eeprom),
681 .eeprom_data = juli_eeprom,
682 },
683 { } /* terminator */
684};
Linux 6.x block layer and io_uring tree(s)