[linux-2.6-block.git] / sound / pci / ice1712 / hoontech.c

/*
 *   ALSA driver for ICEnsemble ICE1712 (Envy24)
 *
 *   Lowlevel functions for Hoontech STDSP24
 *
 *	Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
 *
 *   This program is free software; you can redistribute it and/or modify
 *   it under the terms of the GNU General Public License as published by
 *   the Free Software Foundation; either version 2 of the License, or
 *   (at your option) any later version.
 *
 *   This program is distributed in the hope that it will be useful,
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *   GNU General Public License for more details.
 *
 *   You should have received a copy of the GNU General Public License
 *   along with this program; if not, write to the Free Software
 *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 *
 */      

#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/mutex.h>

#include <sound/core.h>

#include "ice1712.h"
#include "hoontech.h"

/* Hoontech-specific setting */
struct hoontech_spec {
	unsigned char boxbits[4];
	unsigned int config;
	unsigned short boxconfig[4];
};

static void snd_ice1712_stdsp24_gpio_write(struct snd_ice1712 *ice, unsigned char byte)
{
	byte |= ICE1712_STDSP24_CLOCK_BIT;
	udelay(100);
	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
	byte &= ~ICE1712_STDSP24_CLOCK_BIT;
	udelay(100);
	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
	byte |= ICE1712_STDSP24_CLOCK_BIT;
	udelay(100);
	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
}

static void snd_ice1712_stdsp24_darear(struct snd_ice1712 *ice, int activate)
{
	struct hoontech_spec *spec = ice->spec;
	mutex_lock(&ice->gpio_mutex);
	ICE1712_STDSP24_0_DAREAR(spec->boxbits, activate);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
	mutex_unlock(&ice->gpio_mutex);
}

static void snd_ice1712_stdsp24_mute(struct snd_ice1712 *ice, int activate)
{
	struct hoontech_spec *spec = ice->spec;
	mutex_lock(&ice->gpio_mutex);
	ICE1712_STDSP24_3_MUTE(spec->boxbits, activate);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
	mutex_unlock(&ice->gpio_mutex);
}

static void snd_ice1712_stdsp24_insel(struct snd_ice1712 *ice, int activate)
{
	struct hoontech_spec *spec = ice->spec;
	mutex_lock(&ice->gpio_mutex);
	ICE1712_STDSP24_3_INSEL(spec->boxbits, activate);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
	mutex_unlock(&ice->gpio_mutex);
}

static void snd_ice1712_stdsp24_box_channel(struct snd_ice1712 *ice, int box, int chn, int activate)
{
	struct hoontech_spec *spec = ice->spec;

	mutex_lock(&ice->gpio_mutex);

	/* select box */
	ICE1712_STDSP24_0_BOX(spec->boxbits, box);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);

	/* prepare for write */
	if (chn == 3)
		ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
	ICE1712_STDSP24_2_MIDI1(spec->boxbits, activate);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);

	ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
	ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
	ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
	ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
	udelay(100);
	if (chn == 3) {
		ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
		snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
	} else {
		switch (chn) {
		case 0:	ICE1712_STDSP24_1_CHN1(spec->boxbits, 0); break;
		case 1:	ICE1712_STDSP24_1_CHN2(spec->boxbits, 0); break;
		case 2:	ICE1712_STDSP24_1_CHN3(spec->boxbits, 0); break;
		}
		snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
	}
	udelay(100);
	ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
	ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
	ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
	ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
	udelay(100);

	ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);

	mutex_unlock(&ice->gpio_mutex);
}

static void snd_ice1712_stdsp24_box_midi(struct snd_ice1712 *ice, int box, int master)
{
	struct hoontech_spec *spec = ice->spec;

	mutex_lock(&ice->gpio_mutex);

	/* select box */
	ICE1712_STDSP24_0_BOX(spec->boxbits, box);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);

	ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
	ICE1712_STDSP24_2_MIDI1(spec->boxbits, master);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);

	udelay(100);
	
	ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 0);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
	
	mdelay(10);
	
	ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);

	mutex_unlock(&ice->gpio_mutex);
}

static void snd_ice1712_stdsp24_midi2(struct snd_ice1712 *ice, int activate)
{
	struct hoontech_spec *spec = ice->spec;
	mutex_lock(&ice->gpio_mutex);
	ICE1712_STDSP24_3_MIDI2(spec->boxbits, activate);
	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
	mutex_unlock(&ice->gpio_mutex);
}

static int snd_ice1712_hoontech_init(struct snd_ice1712 *ice)
{
	struct hoontech_spec *spec;
	int box, chn;

	ice->num_total_dacs = 8;
	ice->num_total_adcs = 8;

	spec = kzalloc(sizeof(*spec), GFP_KERNEL);
	if (!spec)
		return -ENOMEM;
	ice->spec = spec;

	ICE1712_STDSP24_SET_ADDR(spec->boxbits, 0);
	ICE1712_STDSP24_CLOCK(spec->boxbits, 0, 1);
	ICE1712_STDSP24_0_BOX(spec->boxbits, 0);
	ICE1712_STDSP24_0_DAREAR(spec->boxbits, 0);

	ICE1712_STDSP24_SET_ADDR(spec->boxbits, 1);
	ICE1712_STDSP24_CLOCK(spec->boxbits, 1, 1);
	ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
	ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
	ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
	
	ICE1712_STDSP24_SET_ADDR(spec->boxbits, 2);
	ICE1712_STDSP24_CLOCK(spec->boxbits, 2, 1);
	ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
	ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
	ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);

	ICE1712_STDSP24_SET_ADDR(spec->boxbits, 3);
	ICE1712_STDSP24_CLOCK(spec->boxbits, 3, 1);
	ICE1712_STDSP24_3_MIDI2(spec->boxbits, 0);
	ICE1712_STDSP24_3_MUTE(spec->boxbits, 1);
	ICE1712_STDSP24_3_INSEL(spec->boxbits, 0);

	/* let's go - activate only functions in first box */
	spec->config = 0;
			    /* ICE1712_STDSP24_MUTE |
			       ICE1712_STDSP24_INSEL |
			       ICE1712_STDSP24_DAREAR; */
	/*  These boxconfigs have caused problems in the past.
	 *  The code is not optimal, but should now enable a working config to
	 *  be achieved.
	 *  ** MIDI IN can only be configured on one box **
	 *  ICE1712_STDSP24_BOX_MIDI1 needs to be set for that box.
	 *  Tests on a ADAC2000 box suggest the box config flags do not
	 *  work as would be expected, and the inputs are crossed.
	 *  Setting ICE1712_STDSP24_BOX_MIDI1 and ICE1712_STDSP24_BOX_MIDI2
	 *  on the same box connects MIDI-In to both 401 uarts; both outputs
	 *  are then active on all boxes.
	 *  The default config here sets up everything on the first box.
	 *  Alan Horstmann  5.2.2008
	 */
	spec->boxconfig[0] = ICE1712_STDSP24_BOX_CHN1 |
				     ICE1712_STDSP24_BOX_CHN2 |
				     ICE1712_STDSP24_BOX_CHN3 |
				     ICE1712_STDSP24_BOX_CHN4 |
				     ICE1712_STDSP24_BOX_MIDI1 |
				     ICE1712_STDSP24_BOX_MIDI2;
	spec->boxconfig[1] = 
	spec->boxconfig[2] = 
	spec->boxconfig[3] = 0;
	snd_ice1712_stdsp24_darear(ice,
		(spec->config & ICE1712_STDSP24_DAREAR) ? 1 : 0);
	snd_ice1712_stdsp24_mute(ice,
		(spec->config & ICE1712_STDSP24_MUTE) ? 1 : 0);
	snd_ice1712_stdsp24_insel(ice,
		(spec->config & ICE1712_STDSP24_INSEL) ? 1 : 0);
	for (box = 0; box < 4; box++) {
		if (spec->boxconfig[box] & ICE1712_STDSP24_BOX_MIDI2)
                        snd_ice1712_stdsp24_midi2(ice, 1);
		for (chn = 0; chn < 4; chn++)
			snd_ice1712_stdsp24_box_channel(ice, box, chn,
				(spec->boxconfig[box] & (1 << chn)) ? 1 : 0);
		if (spec->boxconfig[box] & ICE1712_STDSP24_BOX_MIDI1)
			snd_ice1712_stdsp24_box_midi(ice, box, 1);
	}

	return 0;
}

/*
 * AK4524 access
 */

/* start callback for STDSP24 with modified hardware */
static void stdsp24_ak4524_lock(struct snd_akm4xxx *ak, int chip)
{
	struct snd_ice1712 *ice = ak->private_data[0];
	unsigned char tmp;
	snd_ice1712_save_gpio_status(ice);
	tmp =	ICE1712_STDSP24_SERIAL_DATA |
		ICE1712_STDSP24_SERIAL_CLOCK |
		ICE1712_STDSP24_AK4524_CS;
	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
			  ice->gpio.direction | tmp);
	snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp);
}

static int snd_ice1712_value_init(struct snd_ice1712 *ice)
{
	/* Hoontech STDSP24 with modified hardware */
	static struct snd_akm4xxx akm_stdsp24_mv = {
		.num_adcs = 2,
		.num_dacs = 2,
		.type = SND_AK4524,
		.ops = {
			.lock = stdsp24_ak4524_lock
		}
	};

	static struct snd_ak4xxx_private akm_stdsp24_mv_priv = {
		.caddr = 2,
		.cif = 1, /* CIF high */
		.data_mask = ICE1712_STDSP24_SERIAL_DATA,
		.clk_mask = ICE1712_STDSP24_SERIAL_CLOCK,
		.cs_mask = ICE1712_STDSP24_AK4524_CS,
		.cs_addr = ICE1712_STDSP24_AK4524_CS,
		.cs_none = 0,
		.add_flags = 0,
	};

	int err;
	struct snd_akm4xxx *ak;

	/* set the analog DACs */
	ice->num_total_dacs = 2;

	/* set the analog ADCs */
	ice->num_total_adcs = 2;
	
	/* analog section */
	ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
	if (! ak)
		return -ENOMEM;
	ice->akm_codecs = 1;

	err = snd_ice1712_akm4xxx_init(ak, &akm_stdsp24_mv, &akm_stdsp24_mv_priv, ice);
	if (err < 0)
		return err;

	/* ak4524 controls */
	return snd_ice1712_akm4xxx_build_controls(ice);
}

static int snd_ice1712_ez8_init(struct snd_ice1712 *ice)
{
	ice->gpio.write_mask = ice->eeprom.gpiomask;
	ice->gpio.direction = ice->eeprom.gpiodir;
	snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ice->eeprom.gpiomask);
	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->eeprom.gpiodir);
	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, ice->eeprom.gpiostate);
	return 0;
}


/* entry point */
struct snd_ice1712_card_info snd_ice1712_hoontech_cards[] = {
	{
		.subvendor = ICE1712_SUBDEVICE_STDSP24,
		.name = "Hoontech SoundTrack Audio DSP24",
		.model = "dsp24",
		.chip_init = snd_ice1712_hoontech_init,
		.mpu401_1_name = "MIDI-1 Hoontech/STA DSP24",
		.mpu401_2_name = "MIDI-2 Hoontech/STA DSP24",
	},
	{
		.subvendor = ICE1712_SUBDEVICE_STDSP24_VALUE,	/* a dummy id */
		.name = "Hoontech SoundTrack Audio DSP24 Value",
		.model = "dsp24_value",
		.chip_init = snd_ice1712_value_init,
	},
	{
		.subvendor = ICE1712_SUBDEVICE_STDSP24_MEDIA7_1,
		.name = "Hoontech STA DSP24 Media 7.1",
		.model = "dsp24_71",
		.chip_init = snd_ice1712_hoontech_init,
	},
	{
		.subvendor = ICE1712_SUBDEVICE_EVENT_EZ8,	/* a dummy id */
		.name = "Event Electronics EZ8",
		.model = "ez8",
		.chip_init = snd_ice1712_ez8_init,
	},
	{ } /* terminator */
};
Commit	Line	Data
1da177e4 LT	1	/*
	2	* ALSA driver for ICEnsemble ICE1712 (Envy24)
	3	*
	4	* Lowlevel functions for Hoontech STDSP24
	5	*
c1017a4c	6	* Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
1da177e4 LT	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	21	*
	22	*/
	23
1da177e4 LT	24	#include <linux/delay.h>
	25	#include <linux/interrupt.h>
	26	#include <linux/init.h>
	27	#include <linux/slab.h>
62932df8 IM	28	#include <linux/mutex.h>
62932df8 IM	29
1da177e4 LT	30	#include <sound/core.h>
	31
	32	#include "ice1712.h"
	33	#include "hoontech.h"
	34
7cda8ba9 TI	35	/* Hoontech-specific setting */
	36	struct hoontech_spec {
	37	unsigned char boxbits[4];
	38	unsigned int config;
	39	unsigned short boxconfig[4];
	40	};
1da177e4	41
e23e7a14	42	static void snd_ice1712_stdsp24_gpio_write(struct snd_ice1712 *ice, unsigned char byte)
1da177e4 LT	43	{
	44	byte \|= ICE1712_STDSP24_CLOCK_BIT;
	45	udelay(100);
	46	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
	47	byte &= ~ICE1712_STDSP24_CLOCK_BIT;
	48	udelay(100);
	49	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
	50	byte \|= ICE1712_STDSP24_CLOCK_BIT;
	51	udelay(100);
	52	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
	53	}
	54
e23e7a14	55	static void snd_ice1712_stdsp24_darear(struct snd_ice1712 *ice, int activate)
1da177e4	56	{
7cda8ba9	57	struct hoontech_spec *spec = ice->spec;
62932df8	58	mutex_lock(&ice->gpio_mutex);
7cda8ba9 TI	59	ICE1712_STDSP24_0_DAREAR(spec->boxbits, activate);
7cda8ba9 TI	60	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
62932df8	61	mutex_unlock(&ice->gpio_mutex);
1da177e4 LT	62	}
1da177e4 LT	63
e23e7a14	64	static void snd_ice1712_stdsp24_mute(struct snd_ice1712 *ice, int activate)
1da177e4	65	{
7cda8ba9	66	struct hoontech_spec *spec = ice->spec;
62932df8	67	mutex_lock(&ice->gpio_mutex);
7cda8ba9 TI	68	ICE1712_STDSP24_3_MUTE(spec->boxbits, activate);
7cda8ba9 TI	69	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
62932df8	70	mutex_unlock(&ice->gpio_mutex);
1da177e4 LT	71	}
1da177e4 LT	72
e23e7a14	73	static void snd_ice1712_stdsp24_insel(struct snd_ice1712 *ice, int activate)
1da177e4	74	{
7cda8ba9	75	struct hoontech_spec *spec = ice->spec;
62932df8	76	mutex_lock(&ice->gpio_mutex);
7cda8ba9 TI	77	ICE1712_STDSP24_3_INSEL(spec->boxbits, activate);
7cda8ba9 TI	78	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
62932df8	79	mutex_unlock(&ice->gpio_mutex);
1da177e4 LT	80	}
1da177e4 LT	81
e23e7a14	82	static void snd_ice1712_stdsp24_box_channel(struct snd_ice1712 *ice, int box, int chn, int activate)
1da177e4	83	{
7cda8ba9 TI	84	struct hoontech_spec *spec = ice->spec;
7cda8ba9 TI	85
62932df8	86	mutex_lock(&ice->gpio_mutex);
1da177e4 LT	87
1da177e4 LT	88	/* select box */
7cda8ba9 TI	89	ICE1712_STDSP24_0_BOX(spec->boxbits, box);
7cda8ba9 TI	90	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
1da177e4 LT	91
	92	/* prepare for write */
	93	if (chn == 3)
7cda8ba9 TI	94	ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
	95	ICE1712_STDSP24_2_MIDI1(spec->boxbits, activate);
	96	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
	97	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
	98
	99	ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
	100	ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
	101	ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
	102	ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
	103	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
	104	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
1da177e4 LT	105	udelay(100);
1da177e4 LT	106	if (chn == 3) {
7cda8ba9 TI	107	ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
7cda8ba9 TI	108	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
1da177e4 LT	109	} else {
1da177e4 LT	110	switch (chn) {
7cda8ba9 TI	111	case 0: ICE1712_STDSP24_1_CHN1(spec->boxbits, 0); break;
	112	case 1: ICE1712_STDSP24_1_CHN2(spec->boxbits, 0); break;
	113	case 2: ICE1712_STDSP24_1_CHN3(spec->boxbits, 0); break;
1da177e4	114	}
7cda8ba9	115	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
1da177e4 LT	116	}
1da177e4 LT	117	udelay(100);
7cda8ba9 TI	118	ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
	119	ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
	120	ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
	121	ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
	122	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
	123	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
1da177e4 LT	124	udelay(100);
1da177e4 LT	125
7cda8ba9 TI	126	ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
7cda8ba9 TI	127	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
1da177e4	128
62932df8	129	mutex_unlock(&ice->gpio_mutex);
1da177e4 LT	130	}
1da177e4 LT	131
e23e7a14	132	static void snd_ice1712_stdsp24_box_midi(struct snd_ice1712 *ice, int box, int master)
1da177e4	133	{
7cda8ba9 TI	134	struct hoontech_spec *spec = ice->spec;
7cda8ba9 TI	135
62932df8	136	mutex_lock(&ice->gpio_mutex);
1da177e4 LT	137
1da177e4 LT	138	/* select box */
7cda8ba9 TI	139	ICE1712_STDSP24_0_BOX(spec->boxbits, box);
7cda8ba9 TI	140	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
1da177e4	141
7cda8ba9 TI	142	ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
	143	ICE1712_STDSP24_2_MIDI1(spec->boxbits, master);
	144	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
	145	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
1da177e4 LT	146
	147	udelay(100);
	148
7cda8ba9 TI	149	ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 0);
7cda8ba9 TI	150	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
1da177e4 LT	151
	152	mdelay(10);
	153
7cda8ba9 TI	154	ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
7cda8ba9 TI	155	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
1da177e4	156
62932df8	157	mutex_unlock(&ice->gpio_mutex);
1da177e4 LT	158	}
1da177e4 LT	159
e23e7a14	160	static void snd_ice1712_stdsp24_midi2(struct snd_ice1712 *ice, int activate)
1da177e4	161	{
7cda8ba9	162	struct hoontech_spec *spec = ice->spec;
62932df8	163	mutex_lock(&ice->gpio_mutex);
7cda8ba9 TI	164	ICE1712_STDSP24_3_MIDI2(spec->boxbits, activate);
7cda8ba9 TI	165	snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
62932df8	166	mutex_unlock(&ice->gpio_mutex);
1da177e4 LT	167	}
1da177e4 LT	168
e23e7a14	169	static int snd_ice1712_hoontech_init(struct snd_ice1712 *ice)
1da177e4	170	{
7cda8ba9	171	struct hoontech_spec *spec;
1da177e4 LT	172	int box, chn;
	173
	174	ice->num_total_dacs = 8;
	175	ice->num_total_adcs = 8;
	176
7cda8ba9 TI	177	spec = kzalloc(sizeof(*spec), GFP_KERNEL);
	178	if (!spec)
	179	return -ENOMEM;
	180	ice->spec = spec;
	181
	182	ICE1712_STDSP24_SET_ADDR(spec->boxbits, 0);
	183	ICE1712_STDSP24_CLOCK(spec->boxbits, 0, 1);
	184	ICE1712_STDSP24_0_BOX(spec->boxbits, 0);
	185	ICE1712_STDSP24_0_DAREAR(spec->boxbits, 0);
	186
	187	ICE1712_STDSP24_SET_ADDR(spec->boxbits, 1);
	188	ICE1712_STDSP24_CLOCK(spec->boxbits, 1, 1);
	189	ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
	190	ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
	191	ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
1da177e4	192
7cda8ba9 TI	193	ICE1712_STDSP24_SET_ADDR(spec->boxbits, 2);
	194	ICE1712_STDSP24_CLOCK(spec->boxbits, 2, 1);
	195	ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
	196	ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
	197	ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
	198
	199	ICE1712_STDSP24_SET_ADDR(spec->boxbits, 3);
	200	ICE1712_STDSP24_CLOCK(spec->boxbits, 3, 1);
	201	ICE1712_STDSP24_3_MIDI2(spec->boxbits, 0);
	202	ICE1712_STDSP24_3_MUTE(spec->boxbits, 1);
	203	ICE1712_STDSP24_3_INSEL(spec->boxbits, 0);
1da177e4 LT	204
1da177e4 LT	205	/* let's go - activate only functions in first box */
7cda8ba9	206	spec->config = 0;
1da177e4 LT	207	/* ICE1712_STDSP24_MUTE \|
	208	ICE1712_STDSP24_INSEL \|
	209	ICE1712_STDSP24_DAREAR; */
d043143d AH	210	/* These boxconfigs have caused problems in the past.
	211	* The code is not optimal, but should now enable a working config to
	212	* be achieved.
	213	* MIDI IN can only be configured on one box
	214	* ICE1712_STDSP24_BOX_MIDI1 needs to be set for that box.
	215	* Tests on a ADAC2000 box suggest the box config flags do not
	216	* work as would be expected, and the inputs are crossed.
	217	* Setting ICE1712_STDSP24_BOX_MIDI1 and ICE1712_STDSP24_BOX_MIDI2
	218	* on the same box connects MIDI-In to both 401 uarts; both outputs
	219	* are then active on all boxes.
	220	* The default config here sets up everything on the first box.
	221	* Alan Horstmann 5.2.2008
	222	*/
7cda8ba9	223	spec->boxconfig[0] = ICE1712_STDSP24_BOX_CHN1 \|
1da177e4 LT	224	ICE1712_STDSP24_BOX_CHN2 \|
	225	ICE1712_STDSP24_BOX_CHN3 \|
	226	ICE1712_STDSP24_BOX_CHN4 \|
	227	ICE1712_STDSP24_BOX_MIDI1 \|
	228	ICE1712_STDSP24_BOX_MIDI2;
7cda8ba9 TI	229	spec->boxconfig[1] =
	230	spec->boxconfig[2] =
	231	spec->boxconfig[3] = 0;
	232	snd_ice1712_stdsp24_darear(ice,
	233	(spec->config & ICE1712_STDSP24_DAREAR) ? 1 : 0);
	234	snd_ice1712_stdsp24_mute(ice,
	235	(spec->config & ICE1712_STDSP24_MUTE) ? 1 : 0);
	236	snd_ice1712_stdsp24_insel(ice,
	237	(spec->config & ICE1712_STDSP24_INSEL) ? 1 : 0);
d043143d	238	for (box = 0; box < 4; box++) {
7cda8ba9	239	if (spec->boxconfig[box] & ICE1712_STDSP24_BOX_MIDI2)
b8c5b53e	240	snd_ice1712_stdsp24_midi2(ice, 1);
1da177e4	241	for (chn = 0; chn < 4; chn++)
7cda8ba9 TI	242	snd_ice1712_stdsp24_box_channel(ice, box, chn,
7cda8ba9 TI	243	(spec->boxconfig[box] & (1 << chn)) ? 1 : 0);
d043143d AH	244	if (spec->boxconfig[box] & ICE1712_STDSP24_BOX_MIDI1)
d043143d AH	245	snd_ice1712_stdsp24_box_midi(ice, box, 1);
1da177e4 LT	246	}
	247
	248	return 0;
	249	}
	250
	251	/*
	252	* AK4524 access
	253	*/
	254
	255	/* start callback for STDSP24 with modified hardware */
6ca308d4	256	static void stdsp24_ak4524_lock(struct snd_akm4xxx *ak, int chip)
1da177e4	257	{
6ca308d4	258	struct snd_ice1712 *ice = ak->private_data[0];
1da177e4 LT	259	unsigned char tmp;
	260	snd_ice1712_save_gpio_status(ice);
	261	tmp = ICE1712_STDSP24_SERIAL_DATA \|
	262	ICE1712_STDSP24_SERIAL_CLOCK \|
	263	ICE1712_STDSP24_AK4524_CS;
	264	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
	265	ice->gpio.direction \| tmp);
	266	snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp);
	267	}
	268
e23e7a14	269	static int snd_ice1712_value_init(struct snd_ice1712 *ice)
1da177e4 LT	270	{
1da177e4 LT	271	/* Hoontech STDSP24 with modified hardware */
e23e7a14	272	static struct snd_akm4xxx akm_stdsp24_mv = {
1da177e4 LT	273	.num_adcs = 2,
	274	.num_dacs = 2,
	275	.type = SND_AK4524,
	276	.ops = {
	277	.lock = stdsp24_ak4524_lock
	278	}
	279	};
	280
e23e7a14	281	static struct snd_ak4xxx_private akm_stdsp24_mv_priv = {
1da177e4 LT	282	.caddr = 2,
	283	.cif = 1, /* CIF high */
	284	.data_mask = ICE1712_STDSP24_SERIAL_DATA,
	285	.clk_mask = ICE1712_STDSP24_SERIAL_CLOCK,
	286	.cs_mask = ICE1712_STDSP24_AK4524_CS,
	287	.cs_addr = ICE1712_STDSP24_AK4524_CS,
	288	.cs_none = 0,
	289	.add_flags = 0,
	290	};
	291
	292	int err;
6ca308d4	293	struct snd_akm4xxx *ak;
1da177e4 LT	294
	295	/* set the analog DACs */
	296	ice->num_total_dacs = 2;
	297
	298	/* set the analog ADCs */
	299	ice->num_total_adcs = 2;
	300
	301	/* analog section */
6ca308d4	302	ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
1da177e4 LT	303	if (! ak)
	304	return -ENOMEM;
	305	ice->akm_codecs = 1;
	306
	307	err = snd_ice1712_akm4xxx_init(ak, &akm_stdsp24_mv, &akm_stdsp24_mv_priv, ice);
	308	if (err < 0)
	309	return err;
	310
	311	/* ak4524 controls */
387417b5	312	return snd_ice1712_akm4xxx_build_controls(ice);
1da177e4 LT	313	}
1da177e4 LT	314
e23e7a14	315	static int snd_ice1712_ez8_init(struct snd_ice1712 *ice)
1da177e4 LT	316	{
	317	ice->gpio.write_mask = ice->eeprom.gpiomask;
	318	ice->gpio.direction = ice->eeprom.gpiodir;
	319	snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ice->eeprom.gpiomask);
	320	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->eeprom.gpiodir);
	321	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, ice->eeprom.gpiostate);
	322	return 0;
	323	}
	324
	325
	326	/* entry point */
e23e7a14	327	struct snd_ice1712_card_info snd_ice1712_hoontech_cards[] = {
1da177e4 LT	328	{
	329	.subvendor = ICE1712_SUBDEVICE_STDSP24,
	330	.name = "Hoontech SoundTrack Audio DSP24",
	331	.model = "dsp24",
	332	.chip_init = snd_ice1712_hoontech_init,
d043143d AH	333	.mpu401_1_name = "MIDI-1 Hoontech/STA DSP24",
d043143d AH	334	.mpu401_2_name = "MIDI-2 Hoontech/STA DSP24",
1da177e4 LT	335	},
	336	{
	337	.subvendor = ICE1712_SUBDEVICE_STDSP24_VALUE, /* a dummy id */
	338	.name = "Hoontech SoundTrack Audio DSP24 Value",
	339	.model = "dsp24_value",
	340	.chip_init = snd_ice1712_value_init,
	341	},
	342	{
	343	.subvendor = ICE1712_SUBDEVICE_STDSP24_MEDIA7_1,
	344	.name = "Hoontech STA DSP24 Media 7.1",
	345	.model = "dsp24_71",
	346	.chip_init = snd_ice1712_hoontech_init,
	347	},
	348	{
	349	.subvendor = ICE1712_SUBDEVICE_EVENT_EZ8, /* a dummy id */
	350	.name = "Event Electronics EZ8",
	351	.model = "ez8",
	352	.chip_init = snd_ice1712_ez8_init,
	353	},
	354	{ } /* terminator */
	355	};