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ALSA: ASoC: Check for machine type in GTA01 machine driver
[linux-block.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
4e55096e 38#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 39#define STAC_PWR_EVENT 0x20
40#define STAC_HP_EVENT 0x30
4e55096e 41
f5fcc13c
TI		 42enum {
43 STAC_REF,
bf277785 44 STAC_9200_OQO,
dfe495d0
TI		 45 STAC_9200_DELL_D21,
46 STAC_9200_DELL_D22,
47 STAC_9200_DELL_D23,
48 STAC_9200_DELL_M21,
49 STAC_9200_DELL_M22,
50 STAC_9200_DELL_M23,
51 STAC_9200_DELL_M24,
52 STAC_9200_DELL_M25,
53 STAC_9200_DELL_M26,
54 STAC_9200_DELL_M27,
1194b5b7 55 STAC_9200_GATEWAY,
117f257d 56 STAC_9200_PANASONIC,
f5fcc13c
TI		 57 STAC_9200_MODELS
58};
59
60enum {
61 STAC_9205_REF,
dfe495d0 62 STAC_9205_DELL_M42,
ae0a8ed8
TD		 63 STAC_9205_DELL_M43,
64 STAC_9205_DELL_M44,
f5fcc13c
TI		 65 STAC_9205_MODELS
66};
67
e1f0d669
MR		 68enum {
69 STAC_92HD73XX_REF,
a7662640 70 STAC_DELL_M6,
e1f0d669
MR		 71 STAC_92HD73XX_MODELS
72};
73
d0513fc6
MR		 74enum {
75 STAC_92HD83XXX_REF,
76 STAC_92HD83XXX_MODELS
77};
78
e035b841
MR		 79enum {
80 STAC_92HD71BXX_REF,
a7662640
MR		 81 STAC_DELL_M4_1,
82 STAC_DELL_M4_2,
6a14f585 83 STAC_HP_M4,
e035b841
MR		 84 STAC_92HD71BXX_MODELS
85};
86
8e21c34c
TD		 87enum {
88 STAC_925x_REF,
89 STAC_M2_2,
90 STAC_MA6,
2c11f955 91 STAC_PA6,
8e21c34c
TD		 92 STAC_925x_MODELS
93};
94
f5fcc13c
TI		 95enum {
96 STAC_D945_REF,
97 STAC_D945GTP3,
98 STAC_D945GTP5,
5d5d3bc3
IZ		 99 STAC_INTEL_MAC_V1,
100 STAC_INTEL_MAC_V2,
101 STAC_INTEL_MAC_V3,
102 STAC_INTEL_MAC_V4,
103 STAC_INTEL_MAC_V5,
536319af
NB		 104 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
105 * is given, one of the above models will be
106 * chosen according to the subsystem id. */
dfe495d0 107 /* for backward compatibility */
f5fcc13c 108 STAC_MACMINI,
3fc24d85 109 STAC_MACBOOK,
6f0778d8
NB		 110 STAC_MACBOOK_PRO_V1,
111 STAC_MACBOOK_PRO_V2,
f16928fb 112 STAC_IMAC_INTEL,
0dae0f83 113 STAC_IMAC_INTEL_20,
8c650087 114 STAC_ECS_202,
dfe495d0
TI		 115 STAC_922X_DELL_D81,
116 STAC_922X_DELL_D82,
117 STAC_922X_DELL_M81,
118 STAC_922X_DELL_M82,
f5fcc13c
TI		 119 STAC_922X_MODELS
120};
121
122enum {
123 STAC_D965_REF,
124 STAC_D965_3ST,
125 STAC_D965_5ST,
4ff076e5 126 STAC_DELL_3ST,
8e9068b1 127 STAC_DELL_BIOS,
f5fcc13c
TI		 128 STAC_927X_MODELS
129};
403d1944 130
2f2f4251 131struct sigmatel_spec {
c8b6bf9b 132 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 133 unsigned int num_mixers;
134
403d1944 135 int board_config;
c7d4b2fa 136 unsigned int surr_switch: 1;
403d1944
MP		 137 unsigned int line_switch: 1;
138 unsigned int mic_switch: 1;
3cc08dc6 139 unsigned int alt_switch: 1;
82bc955f 140 unsigned int hp_detect: 1;
00ef50c2 141 unsigned int spdif_mute: 1;
c7d4b2fa 142
4fe5195c 143 /* gpio lines */
0fc9dec4 144 unsigned int eapd_mask;
4fe5195c
MR		 145 unsigned int gpio_mask;
146 unsigned int gpio_dir;
147 unsigned int gpio_data;
148 unsigned int gpio_mute;
149
8daaaa97
MR		 150 /* stream */
151 unsigned int stream_delay;
152
4fe5195c 153 /* analog loopback */
e1f0d669
MR		 154 unsigned char aloopback_mask;
155 unsigned char aloopback_shift;
8259980e 156
a64135a2
MR		 157 /* power management */
158 unsigned int num_pwrs;
d0513fc6 159 unsigned int *pwr_mapping;
a64135a2 160 hda_nid_t *pwr_nids;
b76c850f 161 hda_nid_t *dac_list;
a64135a2 162
2f2f4251 163 /* playback */
b22b4821 164 struct hda_input_mux *mono_mux;
89385035 165 struct hda_input_mux *amp_mux;
b22b4821 166 unsigned int cur_mmux;
2f2f4251 167 struct hda_multi_out multiout;
3cc08dc6 168 hda_nid_t dac_nids[5];
2f2f4251
M		 169
170 /* capture */
171 hda_nid_t *adc_nids;
2f2f4251 172 unsigned int num_adcs;
dabbed6f
M		 173 hda_nid_t *mux_nids;
174 unsigned int num_muxes;
8b65727b
MP		 175 hda_nid_t *dmic_nids;
176 unsigned int num_dmics;
e1f0d669 177 hda_nid_t *dmux_nids;
1697055e 178 unsigned int num_dmuxes;
d9737751
MR		 179 hda_nid_t *smux_nids;
180 unsigned int num_smuxes;
65973632 181 const char **spdif_labels;
d9737751 182
dabbed6f 183 hda_nid_t dig_in_nid;
b22b4821 184 hda_nid_t mono_nid;
1cd2224c
MR		 185 hda_nid_t anabeep_nid;
186 hda_nid_t digbeep_nid;
2f2f4251 187
2f2f4251
M		 188 /* pin widgets */
189 hda_nid_t *pin_nids;
190 unsigned int num_pins;
2f2f4251 191 unsigned int *pin_configs;
11b44bbd 192 unsigned int *bios_pin_configs;
2f2f4251
M		 193
194 /* codec specific stuff */
195 struct hda_verb *init;
c8b6bf9b 196 struct snd_kcontrol_new *mixer;
2f2f4251
M		 197
198 /* capture source */
8b65727b 199 struct hda_input_mux *dinput_mux;
e1f0d669 200 unsigned int cur_dmux[2];
c7d4b2fa 201 struct hda_input_mux *input_mux;
3cc08dc6 202 unsigned int cur_mux[3];
d9737751
MR		 203 struct hda_input_mux *sinput_mux;
204 unsigned int cur_smux[2];
2a9c7816
MR		 205 unsigned int cur_amux;
206 hda_nid_t *amp_nids;
207 unsigned int num_amps;
8daaaa97 208 unsigned int powerdown_adcs;
2f2f4251 209
403d1944
MP		 210 /* i/o switches */
211 unsigned int io_switch[2];
0fb87bb4 212 unsigned int clfe_swap;
7c2ba97b 213 unsigned int hp_switch;
5f10c4a9 214 unsigned int aloopback;
2f2f4251 215
c7d4b2fa
M		 216 struct hda_pcm pcm_rec[2]; /* PCM information */
217
218 /* dynamic controls and input_mux */
219 struct auto_pin_cfg autocfg;
220 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 221 struct snd_kcontrol_new *kctl_alloc;
8b65727b 222 struct hda_input_mux private_dimux;
c7d4b2fa 223 struct hda_input_mux private_imux;
d9737751 224 struct hda_input_mux private_smux;
89385035 225 struct hda_input_mux private_amp_mux;
b22b4821 226 struct hda_input_mux private_mono_mux;
2f2f4251
M		 227};
228
229static hda_nid_t stac9200_adc_nids[1] = {
230 0x03,
231};
232
233static hda_nid_t stac9200_mux_nids[1] = {
234 0x0c,
235};
236
237static hda_nid_t stac9200_dac_nids[1] = {
238 0x02,
239};
240
a64135a2
MR		 241static hda_nid_t stac92hd73xx_pwr_nids[8] = {
242 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
243 0x0f, 0x10, 0x11
244};
245
0ffa9807
MR		 246static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
247 0x26, 0,
248};
249
e1f0d669
MR		 250static hda_nid_t stac92hd73xx_adc_nids[2] = {
251 0x1a, 0x1b
252};
253
2a9c7816
MR		 254#define DELL_M6_AMP 2
255static hda_nid_t stac92hd73xx_amp_nids[3] = {
256 0x0b, 0x0c, 0x0e
89385035
MR		 257};
258
e1f0d669
MR		 259#define STAC92HD73XX_NUM_DMICS 2
260static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
261 0x13, 0x14, 0
262};
263
264#define STAC92HD73_DAC_COUNT 5
265static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
266 0x15, 0x16, 0x17, 0x18, 0x19,
267};
268
269static hda_nid_t stac92hd73xx_mux_nids[4] = {
270 0x28, 0x29, 0x2a, 0x2b,
271};
272
273static hda_nid_t stac92hd73xx_dmux_nids[2] = {
274 0x20, 0x21,
275};
276
d9737751
MR		 277static hda_nid_t stac92hd73xx_smux_nids[2] = {
278 0x22, 0x23,
279};
280
d0513fc6
MR		 281#define STAC92HD83XXX_NUM_DMICS 2
282static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
283 0x11, 0x12, 0
284};
285
286#define STAC92HD81_DAC_COUNT 2
287#define STAC92HD83_DAC_COUNT 3
288static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
289 0x13, 0x14, 0x22,
290};
291
292static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
293 0x17, 0x18,
294};
295
296static hda_nid_t stac92hd83xxx_adc_nids[2] = {
297 0x15, 0x16,
298};
299
300static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
301 0xa, 0xb, 0xd, 0xe,
302};
303
0ffa9807
MR		 304static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
305 0x1e, 0,
306};
307
d0513fc6
MR		 308static unsigned int stac92hd83xxx_pwr_mapping[4] = {
309 0x03, 0x0c, 0x10, 0x40,
310};
311
a64135a2
MR		 312static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
313 0x0a, 0x0d, 0x0f
314};
315
e035b841
MR		 316static hda_nid_t stac92hd71bxx_adc_nids[2] = {
317 0x12, 0x13,
318};
319
320static hda_nid_t stac92hd71bxx_mux_nids[2] = {
321 0x1a, 0x1b
322};
323
e1f0d669
MR		 324static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
325 0x1c,
326};
327
d9737751
MR		 328static hda_nid_t stac92hd71bxx_smux_nids[2] = {
329 0x24, 0x25,
330};
331
aea7bb0a 332static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 333 0x10, /*0x11, */
334};
335
336#define STAC92HD71BXX_NUM_DMICS 2
337static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
338 0x18, 0x19, 0
339};
340
0ffa9807
MR		 341static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
342 0x22, 0
343};
344
8e21c34c
TD		 345static hda_nid_t stac925x_adc_nids[1] = {
346 0x03,
347};
348
349static hda_nid_t stac925x_mux_nids[1] = {
350 0x0f,
351};
352
353static hda_nid_t stac925x_dac_nids[1] = {
354 0x02,
355};
356
f6e9852a
TI		 357#define STAC925X_NUM_DMICS 1
358static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
359 0x15, 0
2c11f955
TD		 360};
361
1697055e
TI		 362static hda_nid_t stac925x_dmux_nids[1] = {
363 0x14,
364};
365
2f2f4251
M		 366static hda_nid_t stac922x_adc_nids[2] = {
367 0x06, 0x07,
368};
369
370static hda_nid_t stac922x_mux_nids[2] = {
371 0x12, 0x13,
372};
373
3cc08dc6
MP		 374static hda_nid_t stac927x_adc_nids[3] = {
375 0x07, 0x08, 0x09
376};
377
378static hda_nid_t stac927x_mux_nids[3] = {
379 0x15, 0x16, 0x17
380};
381
d9737751
MR		 382static hda_nid_t stac927x_smux_nids[1] = {
383 0x21,
384};
385
b76c850f
MR		 386static hda_nid_t stac927x_dac_nids[6] = {
387 0x02, 0x03, 0x04, 0x05, 0x06, 0
388};
389
e1f0d669
MR		 390static hda_nid_t stac927x_dmux_nids[1] = {
391 0x1b,
392};
393
7f16859a
MR		 394#define STAC927X_NUM_DMICS 2
395static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
396 0x13, 0x14, 0
397};
398
65973632
MR		 399static const char *stac927x_spdif_labels[5] = {
400 "Digital Playback", "ADAT", "Analog Mux 1",
401 "Analog Mux 2", "Analog Mux 3"
402};
403
f3302a59
MP		 404static hda_nid_t stac9205_adc_nids[2] = {
405 0x12, 0x13
406};
407
408static hda_nid_t stac9205_mux_nids[2] = {
409 0x19, 0x1a
410};
411
e1f0d669 412static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 413 0x1d,
e1f0d669
MR		 414};
415
d9737751
MR		 416static hda_nid_t stac9205_smux_nids[1] = {
417 0x21,
418};
419
f6e9852a
TI		 420#define STAC9205_NUM_DMICS 2
421static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
422 0x17, 0x18, 0
8b65727b
MP		 423};
424
c7d4b2fa 425static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 426 0x08, 0x09, 0x0d, 0x0e,
427 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 428};
429
8e21c34c
TD		 430static hda_nid_t stac925x_pin_nids[8] = {
431 0x07, 0x08, 0x0a, 0x0b,
432 0x0c, 0x0d, 0x10, 0x11,
433};
434
2f2f4251
M		 435static hda_nid_t stac922x_pin_nids[10] = {
436 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
437 0x0f, 0x10, 0x11, 0x15, 0x1b,
438};
439
a7662640 440static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 441 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
442 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 443 0x14, 0x22, 0x23
e1f0d669
MR		 444};
445
d0513fc6
MR		 446static hda_nid_t stac92hd83xxx_pin_nids[14] = {
447 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
448 0x0f, 0x10, 0x11, 0x12, 0x13,
449 0x1d, 0x1e, 0x1f, 0x20
450};
0ffa9807 451static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 452 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
453 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 454 0x1f,
e035b841
MR		 455};
456
3cc08dc6
MP		 457static hda_nid_t stac927x_pin_nids[14] = {
458 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
459 0x0f, 0x10, 0x11, 0x12, 0x13,
460 0x14, 0x21, 0x22, 0x23,
461};
462
f3302a59
MP		 463static hda_nid_t stac9205_pin_nids[12] = {
464 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
465 0x0f, 0x14, 0x16, 0x17, 0x18,
466 0x21, 0x22,
f3302a59
MP		 467};
468
89385035
MR		 469#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
470
471static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
472 struct snd_ctl_elem_value *ucontrol)
473{
474 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
475 struct sigmatel_spec *spec = codec->spec;
476 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
477
478 kcontrol->private_value ^= get_amp_nid(kcontrol);
479 kcontrol->private_value |= nid;
480
481 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
482}
483
484static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
485 struct snd_ctl_elem_value *ucontrol)
486{
487 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
488 struct sigmatel_spec *spec = codec->spec;
489 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
490
491 kcontrol->private_value ^= get_amp_nid(kcontrol);
492 kcontrol->private_value |= nid;
493
494 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
495}
496
8b65727b
MP		 497static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
498 struct snd_ctl_elem_info *uinfo)
499{
500 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
501 struct sigmatel_spec *spec = codec->spec;
502 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
503}
504
505static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
506 struct snd_ctl_elem_value *ucontrol)
507{
508 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
509 struct sigmatel_spec *spec = codec->spec;
e1f0d669 510 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 511
e1f0d669 512 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 513 return 0;
514}
515
516static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
517 struct snd_ctl_elem_value *ucontrol)
518{
519 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
520 struct sigmatel_spec *spec = codec->spec;
e1f0d669 521 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 522
523 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 524 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 525}
526
d9737751
MR		 527static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
528 struct snd_ctl_elem_info *uinfo)
529{
530 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
531 struct sigmatel_spec *spec = codec->spec;
532 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
533}
534
535static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
536 struct snd_ctl_elem_value *ucontrol)
537{
538 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
539 struct sigmatel_spec *spec = codec->spec;
540 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
541
542 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
543 return 0;
544}
545
546static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
547 struct snd_ctl_elem_value *ucontrol)
548{
549 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
550 struct sigmatel_spec *spec = codec->spec;
00ef50c2 551 struct hda_input_mux *smux = &spec->private_smux;
d9737751 552 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 553 int err, val;
554 hda_nid_t nid;
d9737751 555
00ef50c2 556 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 557 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 558 if (err < 0)
559 return err;
560
561 if (spec->spdif_mute) {
562 if (smux_idx == 0)
563 nid = spec->multiout.dig_out_nid;
564 else
565 nid = codec->slave_dig_outs[smux_idx - 1];
566 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
567 val = AMP_OUT_MUTE;
568 if (smux_idx == 0)
569 nid = spec->multiout.dig_out_nid;
570 else
571 nid = codec->slave_dig_outs[smux_idx - 1];
572 /* un/mute SPDIF out */
573 snd_hda_codec_write_cache(codec, nid, 0,
574 AC_VERB_SET_AMP_GAIN_MUTE, val);
575 }
576 return 0;
d9737751
MR		 577}
578
c8b6bf9b 579static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 580{
581 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
582 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 583 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 584}
585
c8b6bf9b 586static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 587{
588 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
589 struct sigmatel_spec *spec = codec->spec;
590 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
591
592 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
593 return 0;
594}
595
c8b6bf9b 596static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 597{
598 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
599 struct sigmatel_spec *spec = codec->spec;
600 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
601
c7d4b2fa 602 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 603 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
604}
605
b22b4821
MR		 606static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
607 struct snd_ctl_elem_info *uinfo)
608{
609 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
610 struct sigmatel_spec *spec = codec->spec;
611 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
612}
613
614static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
615 struct snd_ctl_elem_value *ucontrol)
616{
617 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
618 struct sigmatel_spec *spec = codec->spec;
619
620 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
621 return 0;
622}
623
624static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
625 struct snd_ctl_elem_value *ucontrol)
626{
627 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
628 struct sigmatel_spec *spec = codec->spec;
629
630 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
631 spec->mono_nid, &spec->cur_mmux);
632}
633
89385035
MR		 634static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
635 struct snd_ctl_elem_info *uinfo)
636{
637 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
638 struct sigmatel_spec *spec = codec->spec;
639 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
640}
641
642static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
643 struct snd_ctl_elem_value *ucontrol)
644{
645 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
646 struct sigmatel_spec *spec = codec->spec;
647
648 ucontrol->value.enumerated.item[0] = spec->cur_amux;
649 return 0;
650}
651
652static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
653 struct snd_ctl_elem_value *ucontrol)
654{
655 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
656 struct sigmatel_spec *spec = codec->spec;
657 struct snd_kcontrol *ctl =
658 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
659 if (!ctl)
660 return -EINVAL;
661
662 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
663 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
664
665 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
666 0, &spec->cur_amux);
667}
668
5f10c4a9
ML		 669#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
670
671static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
672 struct snd_ctl_elem_value *ucontrol)
673{
674 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 675 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 676 struct sigmatel_spec *spec = codec->spec;
677
e1f0d669
MR		 678 ucontrol->value.integer.value[0] = !!(spec->aloopback &
679 (spec->aloopback_mask << idx));
5f10c4a9
ML		 680 return 0;
681}
682
683static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
684 struct snd_ctl_elem_value *ucontrol)
685{
686 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
687 struct sigmatel_spec *spec = codec->spec;
e1f0d669 688 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 689 unsigned int dac_mode;
e1f0d669 690 unsigned int val, idx_val;
5f10c4a9 691
e1f0d669
MR		 692 idx_val = spec->aloopback_mask << idx;
693 if (ucontrol->value.integer.value[0])
694 val = spec->aloopback | idx_val;
695 else
696 val = spec->aloopback & ~idx_val;
68ea7b2f 697 if (spec->aloopback == val)
5f10c4a9
ML		 698 return 0;
699
68ea7b2f 700 spec->aloopback = val;
5f10c4a9 701
e1f0d669
MR		 702 /* Only return the bits defined by the shift value of the
703 * first two bytes of the mask
704 */
5f10c4a9 705 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 706 kcontrol->private_value & 0xFFFF, 0x0);
707 dac_mode >>= spec->aloopback_shift;
5f10c4a9 708
e1f0d669 709 if (spec->aloopback & idx_val) {
5f10c4a9 710 snd_hda_power_up(codec);
e1f0d669 711 dac_mode |= idx_val;
5f10c4a9
ML		 712 } else {
713 snd_hda_power_down(codec);
e1f0d669 714 dac_mode &= ~idx_val;
5f10c4a9
ML		 715 }
716
717 snd_hda_codec_write_cache(codec, codec->afg, 0,
718 kcontrol->private_value >> 16, dac_mode);
719
720 return 1;
721}
722
c7d4b2fa 723static struct hda_verb stac9200_core_init[] = {
2f2f4251 724 /* set dac0mux for dac converter */
c7d4b2fa 725 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 726 {}
727};
728
1194b5b7
TI		 729static struct hda_verb stac9200_eapd_init[] = {
730 /* set dac0mux for dac converter */
731 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
732 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
733 {}
734};
735
e1f0d669
MR		 736static struct hda_verb stac92hd73xx_6ch_core_init[] = {
737 /* set master volume and direct control */
738 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
739 /* setup audio connections */
740 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
741 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
742 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
743 /* setup adcs to point to mixer */
744 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
745 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 746 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
747 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
748 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
749 /* setup import muxs */
750 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
751 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
752 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
753 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
754 {}
755};
756
d654a660
MR		 757static struct hda_verb dell_eq_core_init[] = {
758 /* set master volume to max value without distortion
759 * and direct control */
760 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
761 /* setup audio connections */
762 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 763 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
764 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 765 /* setup adcs to point to mixer */
766 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
767 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
768 /* setup import muxs */
769 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
770 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
771 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
772 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
773 {}
774};
775
52fe0f9d 776static struct hda_verb dell_m6_core_init[] = {
20f5f95d
MR		 777 /* set master volume to max value without distortion
778 * and direct control */
779 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
52fe0f9d 780 /* setup audio connections */
7747ecce
MR		 781 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
782 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 783 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
784 /* setup adcs to point to mixer */
785 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
786 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
787 /* setup import muxs */
788 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
789 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
790 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
791 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
792 {}
793};
794
e1f0d669
MR		 795static struct hda_verb stac92hd73xx_8ch_core_init[] = {
796 /* set master volume and direct control */
797 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
798 /* setup audio connections */
799 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
800 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
801 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
802 /* connect hp ports to dac3 */
803 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
804 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
805 /* setup adcs to point to mixer */
806 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
807 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 808 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
809 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
810 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
811 /* setup import muxs */
812 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
813 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
814 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
815 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
816 {}
817};
818
819static struct hda_verb stac92hd73xx_10ch_core_init[] = {
820 /* set master volume and direct control */
821 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
822 /* setup audio connections */
823 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
824 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
825 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
826 /* dac3 is connected to import3 mux */
827 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
828 /* connect hp ports to dac4 */
829 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
830 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
831 /* setup adcs to point to mixer */
832 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
833 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 834 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
835 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
836 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
837 /* setup import muxs */
838 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
839 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
840 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
841 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
842 {}
843};
844
d0513fc6
MR		 845static struct hda_verb stac92hd83xxx_core_init[] = {
846 /* start of config #1 */
847 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
848
849 /* start of config #2 */
850 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
851 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
852 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
853
854 /* power state controls amps */
855 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
856};
857
e035b841 858static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 859 /* set master volume and direct control */
860 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
861 /* connect headphone jack to dac1 */
862 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
863 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
864 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
865 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
866 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
867 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 868};
869
aafc4412 870#define HD_DISABLE_PORTF 3
541eee87 871static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 872 /* start of config #1 */
873
874 /* connect port 0f to audio mixer */
875 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
876 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
877 /* unmute right and left channels for node 0x0f */
878 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
879 /* start of config #2 */
880
e035b841
MR		 881 /* set master volume and direct control */
882 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
883 /* connect headphone jack to dac1 */
884 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 885 /* connect port 0d to audio mixer */
9b35947f 886 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
9b35947f
MR		 887 /* unmute dac0 input in audio mixer */
888 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
aafc4412 889 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 890 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
891 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 892 {}
893};
894
8e21c34c
TD		 895static struct hda_verb stac925x_core_init[] = {
896 /* set dac0mux for dac converter */
897 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
898 {}
899};
900
c7d4b2fa 901static struct hda_verb stac922x_core_init[] = {
2f2f4251 902 /* set master volume and direct control */
c7d4b2fa 903 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 904 {}
905};
906
93ed1503 907static struct hda_verb d965_core_init[] = {
19039bd0 908 /* set master volume and direct control */
93ed1503 909 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 910 /* unmute node 0x1b */
911 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
912 /* select node 0x03 as DAC */
913 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
914 {}
915};
916
3cc08dc6
MP		 917static struct hda_verb stac927x_core_init[] = {
918 /* set master volume and direct control */
919 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 920 /* enable analog pc beep path */
921 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 922 {}
923};
924
f3302a59
MP		 925static struct hda_verb stac9205_core_init[] = {
926 /* set master volume and direct control */
927 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 928 /* enable analog pc beep path */
929 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 930 {}
931};
932
b22b4821
MR		 933#define STAC_MONO_MUX \
934 { \
935 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
936 .name = "Mono Mux", \
937 .count = 1, \
938 .info = stac92xx_mono_mux_enum_info, \
939 .get = stac92xx_mono_mux_enum_get, \
940 .put = stac92xx_mono_mux_enum_put, \
941 }
942
89385035
MR		 943#define STAC_AMP_MUX \
944 { \
945 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
946 .name = "Amp Selector Capture Switch", \
947 .count = 1, \
948 .info = stac92xx_amp_mux_enum_info, \
949 .get = stac92xx_amp_mux_enum_get, \
950 .put = stac92xx_amp_mux_enum_put, \
951 }
952
953#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
954 { \
955 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
956 .name = xname, \
957 .index = 0, \
958 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
959 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
960 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
961 .info = stac92xx_amp_volume_info, \
962 .get = stac92xx_amp_volume_get, \
963 .put = stac92xx_amp_volume_put, \
964 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
965 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
966 }
967
9e05b7a3 968#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 969 { \
970 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
971 .name = "Input Source", \
9e05b7a3 972 .count = cnt, \
ca7c5a8b
ML		 973 .info = stac92xx_mux_enum_info, \
974 .get = stac92xx_mux_enum_get, \
975 .put = stac92xx_mux_enum_put, \
976 }
977
e1f0d669 978#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 979 { \
980 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
981 .name = "Analog Loopback", \
e1f0d669 982 .count = cnt, \
5f10c4a9
ML		 983 .info = stac92xx_aloopback_info, \
984 .get = stac92xx_aloopback_get, \
985 .put = stac92xx_aloopback_put, \
986 .private_value = verb_read | (verb_write << 16), \
987 }
988
c8b6bf9b 989static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 990 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
991 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 992 STAC_INPUT_SOURCE(1),
2f2f4251
M		 993 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
994 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 995 { } /* end */
996};
997
2a9c7816 998#define DELL_M6_MIXER 6
e1f0d669 999static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 1000 /* start of config #1 */
e1f0d669
MR		 1001 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1002 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1003
e1f0d669
MR		 1004 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1005 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1006
2a9c7816
MR		 1007 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1008 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1009
1010 /* start of config #2 */
1011 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1012 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1013
e1f0d669
MR		 1014 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1015 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1016
2a9c7816
MR		 1017 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1018
1019 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1020 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1021
1022 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1023 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1024
e1f0d669
MR		 1025 { } /* end */
1026};
1027
1028static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1029 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1030
e1f0d669
MR		 1031 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1032 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1033
1034 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1035 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1036
1037 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1038 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1039
1040 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1041 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1042
1043 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1044 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1045
1046 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1047 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1048
1049 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1050 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1051 { } /* end */
1052};
1053
1054static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1055 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1056
e1f0d669
MR		 1057 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1058 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1059
1060 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1061 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1062
1063 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1064 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1065
1066 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1067 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1068
1069 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1070 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1071
1072 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1073 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1074
1075 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1076 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1077 { } /* end */
1078};
1079
d0513fc6
MR		 1080
1081static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1082 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1083 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1084
1085 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1086 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1087
1088 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1089 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1090
1091 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1092 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1093
1094 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1095 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1096
1097 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1098 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1099
1100 /*
1101 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1102 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1103 */
1104 { } /* end */
1105};
1106
541eee87 1107static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1108 STAC_INPUT_SOURCE(2),
e035b841 1109
9b35947f
MR		 1110 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1111 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1112
1113 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1114 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1115 /* analog pc-beep replaced with digital beep support */
1116 /*
f7c5dda2
MR		 1117 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1118 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1119 */
f7c5dda2 1120
9b35947f
MR		 1121 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
1122 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1123 { } /* end */
1124};
1125
541eee87 1126static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1127 STAC_INPUT_SOURCE(2),
1128 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1129
541eee87
MR		 1130 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1131 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1132
1133 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1134 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1135 { } /* end */
1136};
1137
8e21c34c 1138static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1139 STAC_INPUT_SOURCE(1),
8e21c34c 1140 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1141 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1142 { } /* end */
1143};
1144
9e05b7a3 1145static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1146 STAC_INPUT_SOURCE(2),
e1f0d669 1147 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1148
1149 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1150 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1151
1152 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1153 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1154 { } /* end */
1155};
1156
19039bd0 1157/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1158static struct snd_kcontrol_new stac922x_mixer[] = {
1159 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1160 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1161 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1162
1163 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1164 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1165 { } /* end */
1166};
1167
9e05b7a3 1168
d1d985f0 1169static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1170 STAC_INPUT_SOURCE(3),
e1f0d669 1171 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1172
9e05b7a3
ML		 1173 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1174 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1175
1176 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1177 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1178
1179 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1180 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1181 { } /* end */
1182};
1183
1697055e
TI		 1184static struct snd_kcontrol_new stac_dmux_mixer = {
1185 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1186 .name = "Digital Input Source",
1187 /* count set later */
1188 .info = stac92xx_dmux_enum_info,
1189 .get = stac92xx_dmux_enum_get,
1190 .put = stac92xx_dmux_enum_put,
1191};
1192
d9737751
MR		 1193static struct snd_kcontrol_new stac_smux_mixer = {
1194 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1195 .name = "IEC958 Playback Source",
d9737751
MR		 1196 /* count set later */
1197 .info = stac92xx_smux_enum_info,
1198 .get = stac92xx_smux_enum_get,
1199 .put = stac92xx_smux_enum_put,
1200};
1201
2134ea4f
TI		 1202static const char *slave_vols[] = {
1203 "Front Playback Volume",
1204 "Surround Playback Volume",
1205 "Center Playback Volume",
1206 "LFE Playback Volume",
1207 "Side Playback Volume",
1208 "Headphone Playback Volume",
1209 "Headphone Playback Volume",
1210 "Speaker Playback Volume",
1211 "External Speaker Playback Volume",
1212 "Speaker2 Playback Volume",
1213 NULL
1214};
1215
1216static const char *slave_sws[] = {
1217 "Front Playback Switch",
1218 "Surround Playback Switch",
1219 "Center Playback Switch",
1220 "LFE Playback Switch",
1221 "Side Playback Switch",
1222 "Headphone Playback Switch",
1223 "Headphone Playback Switch",
1224 "Speaker Playback Switch",
1225 "External Speaker Playback Switch",
1226 "Speaker2 Playback Switch",
edb54a55 1227 "IEC958 Playback Switch",
2134ea4f
TI		 1228 NULL
1229};
1230
2f2f4251
M		 1231static int stac92xx_build_controls(struct hda_codec *codec)
1232{
1233 struct sigmatel_spec *spec = codec->spec;
1234 int err;
c7d4b2fa 1235 int i;
2f2f4251
M		 1236
1237 err = snd_hda_add_new_ctls(codec, spec->mixer);
1238 if (err < 0)
1239 return err;
c7d4b2fa
M		 1240
1241 for (i = 0; i < spec->num_mixers; i++) {
1242 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1243 if (err < 0)
1244 return err;
1245 }
1697055e
TI		 1246 if (spec->num_dmuxes > 0) {
1247 stac_dmux_mixer.count = spec->num_dmuxes;
1248 err = snd_ctl_add(codec->bus->card,
1249 snd_ctl_new1(&stac_dmux_mixer, codec));
1250 if (err < 0)
1251 return err;
1252 }
d9737751 1253 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1254 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1255 struct hda_input_mux *smux = &spec->private_smux;
1256 /* check for mute support on SPDIF out */
1257 if (wcaps & AC_WCAP_OUT_AMP) {
1258 smux->items[smux->num_items].label = "Off";
1259 smux->items[smux->num_items].index = 0;
1260 smux->num_items++;
1261 spec->spdif_mute = 1;
1262 }
d9737751
MR		 1263 stac_smux_mixer.count = spec->num_smuxes;
1264 err = snd_ctl_add(codec->bus->card,
1265 snd_ctl_new1(&stac_smux_mixer, codec));
1266 if (err < 0)
1267 return err;
1268 }
c7d4b2fa 1269
dabbed6f
M		 1270 if (spec->multiout.dig_out_nid) {
1271 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1272 if (err < 0)
1273 return err;
9a08160b
TI		 1274 err = snd_hda_create_spdif_share_sw(codec,
1275 &spec->multiout);
1276 if (err < 0)
1277 return err;
1278 spec->multiout.share_spdif = 1;
dabbed6f 1279 }
b2c4f4d7 1280 if (spec->dig_in_nid && (!spec->gpio_dir & 0x01)) {
dabbed6f
M		 1281 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1282 if (err < 0)
1283 return err;
1284 }
2134ea4f
TI		 1285
1286 /* if we have no master control, let's create it */
1287 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1288 unsigned int vmaster_tlv[4];
2134ea4f 1289 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1290 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1291 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1292 vmaster_tlv, slave_vols);
2134ea4f
TI		 1293 if (err < 0)
1294 return err;
1295 }
1296 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1297 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1298 NULL, slave_sws);
1299 if (err < 0)
1300 return err;
1301 }
1302
dabbed6f 1303 return 0;
2f2f4251
M		 1304}
1305
403d1944 1306static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1307 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1308 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1309};
1310
dfe495d0
TI		 1311/*
1312 STAC 9200 pin configs for
1313 102801A8
1314 102801DE
1315 102801E8
1316*/
1317static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1318 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1319 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1320};
1321
1322/*
1323 STAC 9200 pin configs for
1324 102801C0
1325 102801C1
1326*/
1327static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1328 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1329 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1330};
1331
1332/*
1333 STAC 9200 pin configs for
1334 102801C4 (Dell Dimension E310)
1335 102801C5
1336 102801C7
1337 102801D9
1338 102801DA
1339 102801E3
1340*/
1341static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1342 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1343 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1344};
1345
1346
1347/*
1348 STAC 9200-32 pin configs for
1349 102801B5 (Dell Inspiron 630m)
1350 102801D8 (Dell Inspiron 640m)
1351*/
1352static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1353 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1354 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1355};
1356
1357/*
1358 STAC 9200-32 pin configs for
1359 102801C2 (Dell Latitude D620)
1360 102801C8
1361 102801CC (Dell Latitude D820)
1362 102801D4
1363 102801D6
1364*/
1365static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1366 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1367 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1368};
1369
1370/*
1371 STAC 9200-32 pin configs for
1372 102801CE (Dell XPS M1710)
1373 102801CF (Dell Precision M90)
1374*/
1375static unsigned int dell9200_m23_pin_configs[8] = {
1376 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1377 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1378};
1379
1380/*
1381 STAC 9200-32 pin configs for
1382 102801C9
1383 102801CA
1384 102801CB (Dell Latitude 120L)
1385 102801D3
1386*/
1387static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1388 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1389 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1390};
1391
1392/*
1393 STAC 9200-32 pin configs for
1394 102801BD (Dell Inspiron E1505n)
1395 102801EE
1396 102801EF
1397*/
1398static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1399 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1400 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1401};
1402
1403/*
1404 STAC 9200-32 pin configs for
1405 102801F5 (Dell Inspiron 1501)
1406 102801F6
1407*/
1408static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1409 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1410 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1411};
1412
1413/*
1414 STAC 9200-32
1415 102801CD (Dell Inspiron E1705/9400)
1416*/
1417static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1418 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1419 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1420};
1421
bf277785
TD		 1422static unsigned int oqo9200_pin_configs[8] = {
1423 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1424 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1425};
1426
dfe495d0 1427
f5fcc13c
TI		 1428static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1429 [STAC_REF] = ref9200_pin_configs,
bf277785 1430 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1431 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1432 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1433 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1434 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1435 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1436 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1437 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1438 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1439 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1440 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1441 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1442};
1443
f5fcc13c
TI		 1444static const char *stac9200_models[STAC_9200_MODELS] = {
1445 [STAC_REF] = "ref",
bf277785 1446 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1447 [STAC_9200_DELL_D21] = "dell-d21",
1448 [STAC_9200_DELL_D22] = "dell-d22",
1449 [STAC_9200_DELL_D23] = "dell-d23",
1450 [STAC_9200_DELL_M21] = "dell-m21",
1451 [STAC_9200_DELL_M22] = "dell-m22",
1452 [STAC_9200_DELL_M23] = "dell-m23",
1453 [STAC_9200_DELL_M24] = "dell-m24",
1454 [STAC_9200_DELL_M25] = "dell-m25",
1455 [STAC_9200_DELL_M26] = "dell-m26",
1456 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1457 [STAC_9200_GATEWAY] = "gateway",
117f257d 1458 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1459};
1460
1461static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1462 /* SigmaTel reference board */
1463 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1464 "DFI LanParty", STAC_REF),
e7377071 1465 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1466 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1467 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1468 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1469 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1470 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1471 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1472 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1473 "unknown Dell", STAC_9200_DELL_D22),
1474 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1475 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1477 "Dell Latitude D620", STAC_9200_DELL_M22),
1478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1479 "unknown Dell", STAC_9200_DELL_D23),
1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1481 "unknown Dell", STAC_9200_DELL_D23),
1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1483 "unknown Dell", STAC_9200_DELL_M22),
1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1485 "unknown Dell", STAC_9200_DELL_M24),
1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1487 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1489 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1491 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1493 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1495 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1497 "Dell Precision M90", STAC_9200_DELL_M23),
1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1499 "unknown Dell", STAC_9200_DELL_M22),
1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1501 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1503 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1505 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1507 "unknown Dell", STAC_9200_DELL_D23),
1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1509 "unknown Dell", STAC_9200_DELL_D23),
1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1511 "unknown Dell", STAC_9200_DELL_D21),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1513 "unknown Dell", STAC_9200_DELL_D23),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1515 "unknown Dell", STAC_9200_DELL_D21),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1517 "unknown Dell", STAC_9200_DELL_M25),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1519 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1521 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1523 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1524 /* Panasonic */
117f257d 1525 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1526 /* Gateway machines needs EAPD to be set on resume */
1527 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1528 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1529 STAC_9200_GATEWAY),
1530 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1531 STAC_9200_GATEWAY),
bf277785
TD		 1532 /* OQO Mobile */
1533 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1534 {} /* terminator */
1535};
1536
8e21c34c
TD		 1537static unsigned int ref925x_pin_configs[8] = {
1538 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1539 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1540};
1541
1542static unsigned int stac925x_MA6_pin_configs[8] = {
1543 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1544 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1545};
1546
2c11f955
TD		 1547static unsigned int stac925x_PA6_pin_configs[8] = {
1548 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1549 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1550};
1551
8e21c34c 1552static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1553 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1554 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1555};
1556
1557static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1558 [STAC_REF] = ref925x_pin_configs,
1559 [STAC_M2_2] = stac925xM2_2_pin_configs,
1560 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1561 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1562};
1563
1564static const char *stac925x_models[STAC_925x_MODELS] = {
1565 [STAC_REF] = "ref",
1566 [STAC_M2_2] = "m2-2",
1567 [STAC_MA6] = "m6",
2c11f955 1568 [STAC_PA6] = "pa6",
8e21c34c
TD		 1569};
1570
1571static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1572 /* SigmaTel reference board */
1573 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1574 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1575 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1576 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1577 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1578 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1579 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1580 {} /* terminator */
1581};
1582
a7662640 1583static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1584 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1585 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1586 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1587 0x01452050,
1588};
1589
1590static unsigned int dell_m6_pin_configs[13] = {
1591 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1592 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1593 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1594 0x4f0000f0,
e1f0d669
MR		 1595};
1596
1597static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1598 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1599 [STAC_DELL_M6] = dell_m6_pin_configs,
e1f0d669
MR		 1600};
1601
1602static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1603 [STAC_92HD73XX_REF] = "ref",
a7662640 1604 [STAC_DELL_M6] = "dell-m6",
e1f0d669
MR		 1605};
1606
1607static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1608 /* SigmaTel reference board */
1609 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1610 "DFI LanParty", STAC_92HD73XX_REF),
1611 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1612 "unknown Dell", STAC_DELL_M6),
1613 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1614 "unknown Dell", STAC_DELL_M6),
1615 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1616 "unknown Dell", STAC_DELL_M6),
1617 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1618 "unknown Dell", STAC_DELL_M6),
1619 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1620 "unknown Dell", STAC_DELL_M6),
1621 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1622 "unknown Dell", STAC_DELL_M6),
1623 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1624 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1625 {} /* terminator */
1626};
1627
d0513fc6
MR		 1628static unsigned int ref92hd83xxx_pin_configs[14] = {
1629 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1630 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1631 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1632 0x01451160, 0x98560170,
1633};
1634
1635static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1636 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1637};
1638
1639static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1640 [STAC_92HD83XXX_REF] = "ref",
1641};
1642
1643static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1644 /* SigmaTel reference board */
1645 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1646 "DFI LanParty", STAC_92HD71BXX_REF),
1647};
1648
0ffa9807 1649static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1650 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1651 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
0ffa9807 1652 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1653};
1654
0ffa9807 1655static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1656 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1657 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1658 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1659};
1660
0ffa9807 1661static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1662 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1663 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1664 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1665};
1666
e035b841
MR		 1667static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1668 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1669 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1670 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
6a14f585 1671 [STAC_HP_M4] = NULL,
e035b841
MR		 1672};
1673
1674static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1675 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1676 [STAC_DELL_M4_1] = "dell-m4-1",
1677 [STAC_DELL_M4_2] = "dell-m4-2",
6a14f585 1678 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1679};
1680
1681static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1682 /* SigmaTel reference board */
1683 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1684 "DFI LanParty", STAC_92HD71BXX_REF),
9a9e2359
MR		 1685 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1686 "unknown HP", STAC_HP_M4),
a7662640
MR		 1687 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1688 "unknown Dell", STAC_DELL_M4_1),
1689 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1690 "unknown Dell", STAC_DELL_M4_1),
1691 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1692 "unknown Dell", STAC_DELL_M4_1),
1693 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1694 "unknown Dell", STAC_DELL_M4_1),
1695 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1696 "unknown Dell", STAC_DELL_M4_1),
1697 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1698 "unknown Dell", STAC_DELL_M4_1),
1699 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1700 "unknown Dell", STAC_DELL_M4_1),
1701 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1702 "unknown Dell", STAC_DELL_M4_2),
1703 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1704 "unknown Dell", STAC_DELL_M4_2),
1705 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1706 "unknown Dell", STAC_DELL_M4_2),
1707 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1708 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1709 {} /* terminator */
1710};
1711
403d1944
MP		 1712static unsigned int ref922x_pin_configs[10] = {
1713 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1714 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1715 0x40000100, 0x40000100,
1716};
1717
dfe495d0
TI		 1718/*
1719 STAC 922X pin configs for
1720 102801A7
1721 102801AB
1722 102801A9
1723 102801D1
1724 102801D2
1725*/
1726static unsigned int dell_922x_d81_pin_configs[10] = {
1727 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1728 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1729 0x01813122, 0x400001f2,
1730};
1731
1732/*
1733 STAC 922X pin configs for
1734 102801AC
1735 102801D0
1736*/
1737static unsigned int dell_922x_d82_pin_configs[10] = {
1738 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1739 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1740 0x01813122, 0x400001f1,
1741};
1742
1743/*
1744 STAC 922X pin configs for
1745 102801BF
1746*/
1747static unsigned int dell_922x_m81_pin_configs[10] = {
1748 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1749 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1750 0x40C003f1, 0x405003f0,
1751};
1752
1753/*
1754 STAC 9221 A1 pin configs for
1755 102801D7 (Dell XPS M1210)
1756*/
1757static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1758 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1759 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1760 0x508003f3, 0x405003f4,
1761};
1762
403d1944 1763static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1764 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1765 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1766 0x02a19120, 0x40000100,
1767};
1768
1769static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1770 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1771 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1772 0x02a19320, 0x40000100,
1773};
1774
5d5d3bc3
IZ		 1775static unsigned int intel_mac_v1_pin_configs[10] = {
1776 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1777 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1778 0x400000fc, 0x400000fb,
1779};
1780
1781static unsigned int intel_mac_v2_pin_configs[10] = {
1782 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1783 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1784 0x400000fc, 0x400000fb,
6f0778d8
NB		 1785};
1786
5d5d3bc3
IZ		 1787static unsigned int intel_mac_v3_pin_configs[10] = {
1788 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1789 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1790 0x400000fc, 0x400000fb,
1791};
1792
5d5d3bc3
IZ		 1793static unsigned int intel_mac_v4_pin_configs[10] = {
1794 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1795 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1796 0x400000fc, 0x400000fb,
1797};
1798
5d5d3bc3
IZ		 1799static unsigned int intel_mac_v5_pin_configs[10] = {
1800 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1801 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1802 0x400000fc, 0x400000fb,
0dae0f83
TI		 1803};
1804
8c650087
MCC		 1805static unsigned int ecs202_pin_configs[10] = {
1806 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1807 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1808 0x9037012e, 0x40e000f2,
1809};
76c08828 1810
19039bd0 1811static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1812 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1813 [STAC_D945GTP3] = d945gtp3_pin_configs,
1814 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1815 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1816 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1817 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1818 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1819 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1820 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1821 /* for backward compatibility */
5d5d3bc3
IZ		 1822 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1823 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1824 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1825 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1826 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1827 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1828 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1829 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1830 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1831 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1832 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1833};
1834
f5fcc13c
TI		 1835static const char *stac922x_models[STAC_922X_MODELS] = {
1836 [STAC_D945_REF] = "ref",
1837 [STAC_D945GTP5] = "5stack",
1838 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1839 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1840 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1841 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1842 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1843 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1844 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1845 /* for backward compatibility */
f5fcc13c 1846 [STAC_MACMINI] = "macmini",
3fc24d85 1847 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1848 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1849 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1850 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1851 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1852 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1853 [STAC_922X_DELL_D81] = "dell-d81",
1854 [STAC_922X_DELL_D82] = "dell-d82",
1855 [STAC_922X_DELL_M81] = "dell-m81",
1856 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1857};
1858
1859static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1860 /* SigmaTel reference board */
1861 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1862 "DFI LanParty", STAC_D945_REF),
1863 /* Intel 945G based systems */
1864 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1865 "Intel D945G", STAC_D945GTP3),
1866 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1867 "Intel D945G", STAC_D945GTP3),
1868 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1869 "Intel D945G", STAC_D945GTP3),
1870 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1871 "Intel D945G", STAC_D945GTP3),
1872 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1873 "Intel D945G", STAC_D945GTP3),
1874 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1875 "Intel D945G", STAC_D945GTP3),
1876 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1877 "Intel D945G", STAC_D945GTP3),
1878 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1879 "Intel D945G", STAC_D945GTP3),
1880 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1881 "Intel D945G", STAC_D945GTP3),
1882 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1883 "Intel D945G", STAC_D945GTP3),
1884 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1885 "Intel D945G", STAC_D945GTP3),
1886 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1887 "Intel D945G", STAC_D945GTP3),
1888 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1889 "Intel D945G", STAC_D945GTP3),
1890 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1891 "Intel D945G", STAC_D945GTP3),
1892 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1893 "Intel D945G", STAC_D945GTP3),
1894 /* Intel D945G 5-stack systems */
1895 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1896 "Intel D945G", STAC_D945GTP5),
1897 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1898 "Intel D945G", STAC_D945GTP5),
1899 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1900 "Intel D945G", STAC_D945GTP5),
1901 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1902 "Intel D945G", STAC_D945GTP5),
1903 /* Intel 945P based systems */
1904 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1905 "Intel D945P", STAC_D945GTP3),
1906 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1907 "Intel D945P", STAC_D945GTP3),
1908 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1909 "Intel D945P", STAC_D945GTP3),
1910 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1911 "Intel D945P", STAC_D945GTP3),
1912 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1913 "Intel D945P", STAC_D945GTP3),
1914 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1915 "Intel D945P", STAC_D945GTP5),
1916 /* other systems */
536319af 1917 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1918 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1919 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1920 /* Dell systems */
1921 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1922 "unknown Dell", STAC_922X_DELL_D81),
1923 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1924 "unknown Dell", STAC_922X_DELL_D81),
1925 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1926 "unknown Dell", STAC_922X_DELL_D81),
1927 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1928 "unknown Dell", STAC_922X_DELL_D82),
1929 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1930 "unknown Dell", STAC_922X_DELL_M81),
1931 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1932 "unknown Dell", STAC_922X_DELL_D82),
1933 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1934 "unknown Dell", STAC_922X_DELL_D81),
1935 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1936 "unknown Dell", STAC_922X_DELL_D81),
1937 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1938 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 1939 /* ECS/PC Chips boards */
1940 SND_PCI_QUIRK(0x1019, 0x2144,
1941 "ECS/PC chips", STAC_ECS_202),
1942 SND_PCI_QUIRK(0x1019, 0x2608,
1943 "ECS/PC chips", STAC_ECS_202),
1944 SND_PCI_QUIRK(0x1019, 0x2633,
1945 "ECS/PC chips P17G/1333", STAC_ECS_202),
1946 SND_PCI_QUIRK(0x1019, 0x2811,
1947 "ECS/PC chips", STAC_ECS_202),
1948 SND_PCI_QUIRK(0x1019, 0x2812,
1949 "ECS/PC chips", STAC_ECS_202),
1950 SND_PCI_QUIRK(0x1019, 0x2813,
1951 "ECS/PC chips", STAC_ECS_202),
1952 SND_PCI_QUIRK(0x1019, 0x2814,
1953 "ECS/PC chips", STAC_ECS_202),
1954 SND_PCI_QUIRK(0x1019, 0x2815,
1955 "ECS/PC chips", STAC_ECS_202),
1956 SND_PCI_QUIRK(0x1019, 0x2816,
1957 "ECS/PC chips", STAC_ECS_202),
1958 SND_PCI_QUIRK(0x1019, 0x2817,
1959 "ECS/PC chips", STAC_ECS_202),
1960 SND_PCI_QUIRK(0x1019, 0x2818,
1961 "ECS/PC chips", STAC_ECS_202),
1962 SND_PCI_QUIRK(0x1019, 0x2819,
1963 "ECS/PC chips", STAC_ECS_202),
1964 SND_PCI_QUIRK(0x1019, 0x2820,
1965 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 1966 {} /* terminator */
1967};
1968
3cc08dc6 1969static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1970 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1971 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1972 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1973 0x01c42190, 0x40000100,
3cc08dc6
MP		 1974};
1975
93ed1503 1976static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1977 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1978 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1979 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1980 0x40000100, 0x40000100
1981};
1982
93ed1503
TD		 1983static unsigned int d965_5st_pin_configs[14] = {
1984 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1985 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1986 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1987 0x40000100, 0x40000100
1988};
1989
4ff076e5
TD		 1990static unsigned int dell_3st_pin_configs[14] = {
1991 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1992 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1993 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1994 0x40c003fc, 0x40000100
1995};
1996
93ed1503 1997static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1998 [STAC_D965_REF] = ref927x_pin_configs,
1999 [STAC_D965_3ST] = d965_3st_pin_configs,
2000 [STAC_D965_5ST] = d965_5st_pin_configs,
2001 [STAC_DELL_3ST] = dell_3st_pin_configs,
2002 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2003};
2004
f5fcc13c 2005static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 2006 [STAC_D965_REF] = "ref",
2007 [STAC_D965_3ST] = "3stack",
2008 [STAC_D965_5ST] = "5stack",
2009 [STAC_DELL_3ST] = "dell-3stack",
2010 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2011};
2012
2013static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2014 /* SigmaTel reference board */
2015 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2016 "DFI LanParty", STAC_D965_REF),
81d3dbde 2017 /* Intel 946 based systems */
f5fcc13c
TI		 2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2019 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2020 /* 965 based 3 stack systems */
f5fcc13c
TI		 2021 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2023 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2028 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2029 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2031 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2033 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2035 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2037 /* Dell 3 stack systems */
8e9068b1 2038 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2039 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2040 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2041 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2042 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2043 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2044 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2045 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2046 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2047 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2048 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2050 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2051 /* 965 based 5 stack systems */
f5fcc13c
TI		 2052 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2054 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2056 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2058 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2060 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2061 {} /* terminator */
2062};
2063
f3302a59
MP		 2064static unsigned int ref9205_pin_configs[12] = {
2065 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2066 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2067 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2068};
2069
dfe495d0
TI		 2070/*
2071 STAC 9205 pin configs for
2072 102801F1
2073 102801F2
2074 102801FC
2075 102801FD
2076 10280204
2077 1028021F
3fa2ef74 2078 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2079*/
2080static unsigned int dell_9205_m42_pin_configs[12] = {
2081 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2082 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2083 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2084};
2085
2086/*
2087 STAC 9205 pin configs for
2088 102801F9
2089 102801FA
2090 102801FE
2091 102801FF (Dell Precision M4300)
2092 10280206
2093 10280200
2094 10280201
2095*/
2096static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2097 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2098 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2099 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2100};
2101
dfe495d0 2102static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2103 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2104 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2105 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2106};
2107
f5fcc13c 2108static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2109 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2110 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2111 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2112 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2113};
2114
f5fcc13c
TI		 2115static const char *stac9205_models[STAC_9205_MODELS] = {
2116 [STAC_9205_REF] = "ref",
dfe495d0 2117 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2118 [STAC_9205_DELL_M43] = "dell-m43",
2119 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2120};
2121
2122static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2123 /* SigmaTel reference board */
2124 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2125 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2126 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2127 "unknown Dell", STAC_9205_DELL_M42),
2128 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2129 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2130 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2131 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2132 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2133 "Dell Precision", STAC_9205_DELL_M43),
2134 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2135 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2136 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2137 "unknown Dell", STAC_9205_DELL_M42),
2138 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2139 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2140 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2141 "Dell Precision", STAC_9205_DELL_M43),
2142 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2143 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2144 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2145 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2146 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2147 "Dell Precision", STAC_9205_DELL_M43),
2148 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2149 "Dell Precision", STAC_9205_DELL_M43),
2150 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2151 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2152 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2153 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2154 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2155 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2156 {} /* terminator */
2157};
2158
11b44bbd
RF		 2159static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2160{
2161 int i;
2162 struct sigmatel_spec *spec = codec->spec;
2163
2164 if (! spec->bios_pin_configs) {
2165 spec->bios_pin_configs = kcalloc(spec->num_pins,
2166 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
2167 if (! spec->bios_pin_configs)
2168 return -ENOMEM;
2169 }
2170
2171 for (i = 0; i < spec->num_pins; i++) {
2172 hda_nid_t nid = spec->pin_nids[i];
2173 unsigned int pin_cfg;
2174
2175 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2176 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2177 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2178 nid, pin_cfg);
2179 spec->bios_pin_configs[i] = pin_cfg;
2180 }
2181
2182 return 0;
2183}
2184
87d48363
MR		 2185static void stac92xx_set_config_reg(struct hda_codec *codec,
2186 hda_nid_t pin_nid, unsigned int pin_config)
2187{
2188 int i;
2189 snd_hda_codec_write(codec, pin_nid, 0,
2190 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2191 pin_config & 0x000000ff);
2192 snd_hda_codec_write(codec, pin_nid, 0,
2193 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2194 (pin_config & 0x0000ff00) >> 8);
2195 snd_hda_codec_write(codec, pin_nid, 0,
2196 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2197 (pin_config & 0x00ff0000) >> 16);
2198 snd_hda_codec_write(codec, pin_nid, 0,
2199 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2200 pin_config >> 24);
2201 i = snd_hda_codec_read(codec, pin_nid, 0,
2202 AC_VERB_GET_CONFIG_DEFAULT,
2203 0x00);
2204 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2205 pin_nid, i);
2206}
2207
2f2f4251
M		 2208static void stac92xx_set_config_regs(struct hda_codec *codec)
2209{
2210 int i;
2211 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2212
87d48363
MR		 2213 if (!spec->pin_configs)
2214 return;
11b44bbd 2215
87d48363
MR		 2216 for (i = 0; i < spec->num_pins; i++)
2217 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2218 spec->pin_configs[i]);
2f2f4251 2219}
2f2f4251 2220
dabbed6f 2221/*
c7d4b2fa 2222 * Analog playback callbacks
dabbed6f 2223 */
c7d4b2fa
M		 2224static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2225 struct hda_codec *codec,
c8b6bf9b 2226 struct snd_pcm_substream *substream)
2f2f4251 2227{
dabbed6f 2228 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2229 if (spec->stream_delay)
2230 msleep(spec->stream_delay);
9a08160b
TI		 2231 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2232 hinfo);
2f2f4251
M		 2233}
2234
2f2f4251
M		 2235static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2236 struct hda_codec *codec,
2237 unsigned int stream_tag,
2238 unsigned int format,
c8b6bf9b 2239 struct snd_pcm_substream *substream)
2f2f4251
M		 2240{
2241 struct sigmatel_spec *spec = codec->spec;
403d1944 2242 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2243}
2244
2245static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2246 struct hda_codec *codec,
c8b6bf9b 2247 struct snd_pcm_substream *substream)
2f2f4251
M		 2248{
2249 struct sigmatel_spec *spec = codec->spec;
2250 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2251}
2252
dabbed6f
M		 2253/*
2254 * Digital playback callbacks
2255 */
2256static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2257 struct hda_codec *codec,
c8b6bf9b 2258 struct snd_pcm_substream *substream)
dabbed6f
M		 2259{
2260 struct sigmatel_spec *spec = codec->spec;
2261 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2262}
2263
2264static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2265 struct hda_codec *codec,
c8b6bf9b 2266 struct snd_pcm_substream *substream)
dabbed6f
M		 2267{
2268 struct sigmatel_spec *spec = codec->spec;
2269 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2270}
2271
6b97eb45
TI		 2272static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2273 struct hda_codec *codec,
2274 unsigned int stream_tag,
2275 unsigned int format,
2276 struct snd_pcm_substream *substream)
2277{
2278 struct sigmatel_spec *spec = codec->spec;
2279 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2280 stream_tag, format, substream);
2281}
2282
dabbed6f 2283
2f2f4251
M		 2284/*
2285 * Analog capture callbacks
2286 */
2287static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2288 struct hda_codec *codec,
2289 unsigned int stream_tag,
2290 unsigned int format,
c8b6bf9b 2291 struct snd_pcm_substream *substream)
2f2f4251
M		 2292{
2293 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2294 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2295
8daaaa97
MR		 2296 if (spec->powerdown_adcs) {
2297 msleep(40);
2298 snd_hda_codec_write_cache(codec, nid, 0,
2299 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2300 }
2301 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2302 return 0;
2303}
2304
2305static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2306 struct hda_codec *codec,
c8b6bf9b 2307 struct snd_pcm_substream *substream)
2f2f4251
M		 2308{
2309 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2310 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2311
8daaaa97
MR		 2312 snd_hda_codec_cleanup_stream(codec, nid);
2313 if (spec->powerdown_adcs)
2314 snd_hda_codec_write_cache(codec, nid, 0,
2315 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2316 return 0;
2317}
2318
dabbed6f
M		 2319static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2320 .substreams = 1,
2321 .channels_min = 2,
2322 .channels_max = 2,
2323 /* NID is set in stac92xx_build_pcms */
2324 .ops = {
2325 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2326 .close = stac92xx_dig_playback_pcm_close,
2327 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2328 },
2329};
2330
2331static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2332 .substreams = 1,
2333 .channels_min = 2,
2334 .channels_max = 2,
2335 /* NID is set in stac92xx_build_pcms */
2336};
2337
2f2f4251
M		 2338static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2339 .substreams = 1,
2340 .channels_min = 2,
c7d4b2fa 2341 .channels_max = 8,
2f2f4251
M		 2342 .nid = 0x02, /* NID to query formats and rates */
2343 .ops = {
2344 .open = stac92xx_playback_pcm_open,
2345 .prepare = stac92xx_playback_pcm_prepare,
2346 .cleanup = stac92xx_playback_pcm_cleanup
2347 },
2348};
2349
3cc08dc6
MP		 2350static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2351 .substreams = 1,
2352 .channels_min = 2,
2353 .channels_max = 2,
2354 .nid = 0x06, /* NID to query formats and rates */
2355 .ops = {
2356 .open = stac92xx_playback_pcm_open,
2357 .prepare = stac92xx_playback_pcm_prepare,
2358 .cleanup = stac92xx_playback_pcm_cleanup
2359 },
2360};
2361
2f2f4251 2362static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2363 .channels_min = 2,
2364 .channels_max = 2,
9e05b7a3 2365 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2366 .ops = {
2367 .prepare = stac92xx_capture_pcm_prepare,
2368 .cleanup = stac92xx_capture_pcm_cleanup
2369 },
2370};
2371
2372static int stac92xx_build_pcms(struct hda_codec *codec)
2373{
2374 struct sigmatel_spec *spec = codec->spec;
2375 struct hda_pcm *info = spec->pcm_rec;
2376
2377 codec->num_pcms = 1;
2378 codec->pcm_info = info;
2379
c7d4b2fa 2380 info->name = "STAC92xx Analog";
2f2f4251 2381 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2382 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2383 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2384 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2385
2386 if (spec->alt_switch) {
2387 codec->num_pcms++;
2388 info++;
2389 info->name = "STAC92xx Analog Alt";
2390 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2391 }
2f2f4251 2392
dabbed6f
M		 2393 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2394 codec->num_pcms++;
2395 info++;
2396 info->name = "STAC92xx Digital";
7ba72ba1 2397 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2398 if (spec->multiout.dig_out_nid) {
2399 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2400 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2401 }
2402 if (spec->dig_in_nid) {
2403 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2404 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2405 }
2406 }
2407
2f2f4251
M		 2408 return 0;
2409}
2410
c960a03b
TI		 2411static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2412{
2413 unsigned int pincap = snd_hda_param_read(codec, nid,
2414 AC_PAR_PIN_CAP);
2415 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2416 if (pincap & AC_PINCAP_VREF_100)
2417 return AC_PINCTL_VREF_100;
2418 if (pincap & AC_PINCAP_VREF_80)
2419 return AC_PINCTL_VREF_80;
2420 if (pincap & AC_PINCAP_VREF_50)
2421 return AC_PINCTL_VREF_50;
2422 if (pincap & AC_PINCAP_VREF_GRD)
2423 return AC_PINCTL_VREF_GRD;
2424 return 0;
2425}
2426
403d1944
MP		 2427static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2428
2429{
82beb8fd
TI		 2430 snd_hda_codec_write_cache(codec, nid, 0,
2431 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2432}
2433
7c2ba97b
MR		 2434#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2435
2436static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2437 struct snd_ctl_elem_value *ucontrol)
2438{
2439 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2440 struct sigmatel_spec *spec = codec->spec;
2441
2442 ucontrol->value.integer.value[0] = spec->hp_switch;
2443 return 0;
2444}
2445
2446static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2447 struct snd_ctl_elem_value *ucontrol)
2448{
2449 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2450 struct sigmatel_spec *spec = codec->spec;
2451
2452 spec->hp_switch = ucontrol->value.integer.value[0];
2453
2454 /* check to be sure that the ports are upto date with
2455 * switch changes
2456 */
2457 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2458
2459 return 1;
2460}
2461
a5ce8890 2462#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2463
2464static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2465{
2466 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2467 struct sigmatel_spec *spec = codec->spec;
2468 int io_idx = kcontrol-> private_value & 0xff;
2469
2470 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2471 return 0;
2472}
2473
2474static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2475{
2476 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2477 struct sigmatel_spec *spec = codec->spec;
2478 hda_nid_t nid = kcontrol->private_value >> 8;
2479 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2480 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2481
2482 spec->io_switch[io_idx] = val;
2483
2484 if (val)
2485 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2486 else {
2487 unsigned int pinctl = AC_PINCTL_IN_EN;
2488 if (io_idx) /* set VREF for mic */
2489 pinctl |= stac92xx_get_vref(codec, nid);
2490 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2491 }
40c1d308
JZ		 2492
2493 /* check the auto-mute again: we need to mute/unmute the speaker
2494 * appropriately according to the pin direction
2495 */
2496 if (spec->hp_detect)
2497 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2498
403d1944
MP		 2499 return 1;
2500}
2501
0fb87bb4
ML		 2502#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2503
2504static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2505 struct snd_ctl_elem_value *ucontrol)
2506{
2507 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2508 struct sigmatel_spec *spec = codec->spec;
2509
2510 ucontrol->value.integer.value[0] = spec->clfe_swap;
2511 return 0;
2512}
2513
2514static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2515 struct snd_ctl_elem_value *ucontrol)
2516{
2517 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2518 struct sigmatel_spec *spec = codec->spec;
2519 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2520 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2521
68ea7b2f 2522 if (spec->clfe_swap == val)
0fb87bb4
ML		 2523 return 0;
2524
68ea7b2f 2525 spec->clfe_swap = val;
0fb87bb4
ML		 2526
2527 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2528 spec->clfe_swap ? 0x4 : 0x0);
2529
2530 return 1;
2531}
2532
7c2ba97b
MR		 2533#define STAC_CODEC_HP_SWITCH(xname) \
2534 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2535 .name = xname, \
2536 .index = 0, \
2537 .info = stac92xx_hp_switch_info, \
2538 .get = stac92xx_hp_switch_get, \
2539 .put = stac92xx_hp_switch_put, \
2540 }
2541
403d1944
MP		 2542#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2543 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2544 .name = xname, \
2545 .index = 0, \
2546 .info = stac92xx_io_switch_info, \
2547 .get = stac92xx_io_switch_get, \
2548 .put = stac92xx_io_switch_put, \
2549 .private_value = xpval, \
2550 }
2551
0fb87bb4
ML		 2552#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2553 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2554 .name = xname, \
2555 .index = 0, \
2556 .info = stac92xx_clfe_switch_info, \
2557 .get = stac92xx_clfe_switch_get, \
2558 .put = stac92xx_clfe_switch_put, \
2559 .private_value = xpval, \
2560 }
403d1944 2561
c7d4b2fa
M		 2562enum {
2563 STAC_CTL_WIDGET_VOL,
2564 STAC_CTL_WIDGET_MUTE,
09a99959 2565 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2566 STAC_CTL_WIDGET_AMP_MUX,
2567 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2568 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2569 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2570 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2571};
2572
c8b6bf9b 2573static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2574 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2575 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2576 STAC_MONO_MUX,
89385035
MR		 2577 STAC_AMP_MUX,
2578 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2579 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2580 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2581 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2582};
2583
2584/* add dynamic controls */
4682eee0
MR		 2585static int stac92xx_add_control_idx(struct sigmatel_spec *spec, int type,
2586 int idx, const char *name, unsigned long val)
c7d4b2fa 2587{
c8b6bf9b 2588 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2589
2590 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2591 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2592
2593 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2594 if (! knew)
2595 return -ENOMEM;
2596 if (spec->kctl_alloc) {
2597 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2598 kfree(spec->kctl_alloc);
2599 }
2600 spec->kctl_alloc = knew;
2601 spec->num_kctl_alloc = num;
2602 }
2603
2604 knew = &spec->kctl_alloc[spec->num_kctl_used];
2605 *knew = stac92xx_control_templates[type];
4682eee0 2606 knew->index = idx;
82fe0c58 2607 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2608 if (! knew->name)
2609 return -ENOMEM;
2610 knew->private_value = val;
2611 spec->num_kctl_used++;
2612 return 0;
2613}
2614
4682eee0
MR		 2615
2616/* add dynamic controls */
2617static int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2618 const char *name, unsigned long val)
2619{
2620 return stac92xx_add_control_idx(spec, type, 0, name, val);
2621}
2622
403d1944
MP		 2623/* flag inputs as additional dynamic lineouts */
2624static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2625{
2626 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2627 unsigned int wcaps, wtype;
2628 int i, num_dacs = 0;
2629
2630 /* use the wcaps cache to count all DACs available for line-outs */
2631 for (i = 0; i < codec->num_nodes; i++) {
2632 wcaps = codec->wcaps[i];
2633 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2634
7b043899
SL		 2635 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2636 num_dacs++;
2637 }
403d1944 2638
7b043899
SL		 2639 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2640
403d1944
MP		 2641 switch (cfg->line_outs) {
2642 case 3:
2643 /* add line-in as side */
7b043899 2644 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2645 cfg->line_out_pins[cfg->line_outs] =
2646 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2647 spec->line_switch = 1;
2648 cfg->line_outs++;
2649 }
2650 break;
2651 case 2:
2652 /* add line-in as clfe and mic as side */
7b043899 2653 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2654 cfg->line_out_pins[cfg->line_outs] =
2655 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2656 spec->line_switch = 1;
2657 cfg->line_outs++;
2658 }
7b043899 2659 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2660 cfg->line_out_pins[cfg->line_outs] =
2661 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2662 spec->mic_switch = 1;
2663 cfg->line_outs++;
2664 }
2665 break;
2666 case 1:
2667 /* add line-in as surr and mic as clfe */
7b043899 2668 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2669 cfg->line_out_pins[cfg->line_outs] =
2670 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2671 spec->line_switch = 1;
2672 cfg->line_outs++;
2673 }
7b043899 2674 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2675 cfg->line_out_pins[cfg->line_outs] =
2676 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2677 spec->mic_switch = 1;
2678 cfg->line_outs++;
2679 }
2680 break;
2681 }
2682
2683 return 0;
2684}
2685
7b043899
SL		 2686
2687static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2688{
2689 int i;
2690
2691 for (i = 0; i < spec->multiout.num_dacs; i++) {
2692 if (spec->multiout.dac_nids[i] == nid)
2693 return 1;
2694 }
2695
2696 return 0;
2697}
2698
3cc08dc6 2699/*
7b043899
SL		 2700 * Fill in the dac_nids table from the parsed pin configuration
2701 * This function only works when every pin in line_out_pins[]
2702 * contains atleast one DAC in its connection list. Some 92xx
2703 * codecs are not connected directly to a DAC, such as the 9200
2704 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2705 */
19039bd0 2706static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2707 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2708{
2709 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2710 int i, j, conn_len = 0;
2711 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2712 unsigned int wcaps, wtype;
2713
c7d4b2fa
M		 2714 for (i = 0; i < cfg->line_outs; i++) {
2715 nid = cfg->line_out_pins[i];
7b043899
SL		 2716 conn_len = snd_hda_get_connections(codec, nid, conn,
2717 HDA_MAX_CONNECTIONS);
2718 for (j = 0; j < conn_len; j++) {
2719 wcaps = snd_hda_param_read(codec, conn[j],
2720 AC_PAR_AUDIO_WIDGET_CAP);
2721 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2722 if (wtype != AC_WID_AUD_OUT ||
2723 (wcaps & AC_WCAP_DIGITAL))
2724 continue;
2725 /* conn[j] is a DAC routed to this line-out */
2726 if (!is_in_dac_nids(spec, conn[j]))
2727 break;
2728 }
2729
2730 if (j == conn_len) {
df802952
TI		 2731 if (spec->multiout.num_dacs > 0) {
2732 /* we have already working output pins,
2733 * so let's drop the broken ones again
2734 */
2735 cfg->line_outs = spec->multiout.num_dacs;
2736 break;
2737 }
7b043899
SL		 2738 /* error out, no available DAC found */
2739 snd_printk(KERN_ERR
2740 "%s: No available DAC for pin 0x%x\n",
2741 __func__, nid);
2742 return -ENODEV;
2743 }
2744
2745 spec->multiout.dac_nids[i] = conn[j];
2746 spec->multiout.num_dacs++;
2747 if (conn_len > 1) {
2748 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2749 snd_hda_codec_write_cache(codec, nid, 0,
2750 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2751
7b043899
SL		 2752 }
2753 }
c7d4b2fa 2754
7b043899
SL		 2755 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2756 spec->multiout.num_dacs,
2757 spec->multiout.dac_nids[0],
2758 spec->multiout.dac_nids[1],
2759 spec->multiout.dac_nids[2],
2760 spec->multiout.dac_nids[3],
2761 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2762 return 0;
2763}
2764
eb06ed8f
TI		 2765/* create volume control/switch for the given prefx type */
2766static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2767{
2768 char name[32];
2769 int err;
2770
2771 sprintf(name, "%s Playback Volume", pfx);
2772 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2773 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2774 if (err < 0)
2775 return err;
2776 sprintf(name, "%s Playback Switch", pfx);
2777 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2778 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2779 if (err < 0)
2780 return err;
2781 return 0;
2782}
2783
ae0afd81
MR		 2784static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2785{
2786 if (!spec->multiout.hp_nid)
2787 spec->multiout.hp_nid = nid;
2788 else if (spec->multiout.num_dacs > 4) {
2789 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2790 return 1;
2791 } else {
2792 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2793 spec->multiout.num_dacs++;
2794 }
2795 return 0;
2796}
2797
2798static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2799{
2800 if (is_in_dac_nids(spec, nid))
2801 return 1;
2802 if (spec->multiout.hp_nid == nid)
2803 return 1;
2804 return 0;
2805}
2806
c7d4b2fa 2807/* add playback controls from the parsed DAC table */
0fb87bb4 2808static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2809 const struct auto_pin_cfg *cfg)
c7d4b2fa 2810{
19039bd0
TI		 2811 static const char *chname[4] = {
2812 "Front", "Surround", NULL /*CLFE*/, "Side"
2813 };
c7d4b2fa
M		 2814 hda_nid_t nid;
2815 int i, err;
2816
0fb87bb4 2817 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2818 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2819
2820
40ac8c4f 2821 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2822 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2823 continue;
2824
2825 nid = spec->multiout.dac_nids[i];
2826
2827 if (i == 2) {
2828 /* Center/LFE */
eb06ed8f
TI		 2829 err = create_controls(spec, "Center", nid, 1);
2830 if (err < 0)
c7d4b2fa 2831 return err;
eb06ed8f
TI		 2832 err = create_controls(spec, "LFE", nid, 2);
2833 if (err < 0)
c7d4b2fa 2834 return err;
0fb87bb4
ML		 2835
2836 wid_caps = get_wcaps(codec, nid);
2837
2838 if (wid_caps & AC_WCAP_LR_SWAP) {
2839 err = stac92xx_add_control(spec,
2840 STAC_CTL_WIDGET_CLFE_SWITCH,
2841 "Swap Center/LFE Playback Switch", nid);
2842
2843 if (err < 0)
2844 return err;
2845 }
2846
c7d4b2fa 2847 } else {
eb06ed8f
TI		 2848 err = create_controls(spec, chname[i], nid, 3);
2849 if (err < 0)
c7d4b2fa
M		 2850 return err;
2851 }
2852 }
2853
fedb7569
MR		 2854 if ((spec->multiout.num_dacs - cfg->line_outs) > 0 &&
2855 cfg->hp_outs && !spec->multiout.hp_nid)
2856 spec->multiout.hp_nid = nid;
2857
7c2ba97b
MR		 2858 if (cfg->hp_outs > 1) {
2859 err = stac92xx_add_control(spec,
2860 STAC_CTL_WIDGET_HP_SWITCH,
2861 "Headphone as Line Out Switch", 0);
2862 if (err < 0)
2863 return err;
2864 }
2865
b5895dc8
MR		 2866 if (spec->line_switch) {
2867 nid = cfg->input_pins[AUTO_PIN_LINE];
2868 pincap = snd_hda_param_read(codec, nid,
2869 AC_PAR_PIN_CAP);
2870 if (pincap & AC_PINCAP_OUT) {
2871 err = stac92xx_add_control(spec,
2872 STAC_CTL_WIDGET_IO_SWITCH,
2873 "Line In as Output Switch", nid << 8);
2874 if (err < 0)
2875 return err;
2876 }
2877 }
403d1944 2878
b5895dc8 2879 if (spec->mic_switch) {
cace16f1 2880 unsigned int def_conf;
ae0afd81
MR		 2881 unsigned int mic_pin = AUTO_PIN_MIC;
2882again:
2883 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2884 def_conf = snd_hda_codec_read(codec, nid, 0,
2885 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2886 /* some laptops have an internal analog microphone
2887 * which can't be used as a output */
2888 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2889 pincap = snd_hda_param_read(codec, nid,
2890 AC_PAR_PIN_CAP);
2891 if (pincap & AC_PINCAP_OUT) {
2892 err = stac92xx_add_control(spec,
2893 STAC_CTL_WIDGET_IO_SWITCH,
2894 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2895 nid = snd_hda_codec_read(codec, nid, 0,
2896 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2897 if (!check_in_dac_nids(spec, nid))
2898 add_spec_dacs(spec, nid);
cace16f1
MR		 2899 if (err < 0)
2900 return err;
2901 }
ae0afd81
MR		 2902 } else if (mic_pin == AUTO_PIN_MIC) {
2903 mic_pin = AUTO_PIN_FRONT_MIC;
2904 goto again;
b5895dc8
MR		 2905 }
2906 }
403d1944 2907
c7d4b2fa
M		 2908 return 0;
2909}
2910
eb06ed8f
TI		 2911/* add playback controls for Speaker and HP outputs */
2912static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2913 struct auto_pin_cfg *cfg)
2914{
2915 struct sigmatel_spec *spec = codec->spec;
2916 hda_nid_t nid;
2917 int i, old_num_dacs, err;
2918
2919 old_num_dacs = spec->multiout.num_dacs;
2920 for (i = 0; i < cfg->hp_outs; i++) {
2921 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2922 if (wid_caps & AC_WCAP_UNSOL_CAP)
2923 spec->hp_detect = 1;
2924 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2925 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2926 if (check_in_dac_nids(spec, nid))
2927 nid = 0;
2928 if (! nid)
c7d4b2fa 2929 continue;
eb06ed8f
TI		 2930 add_spec_dacs(spec, nid);
2931 }
2932 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2933 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2934 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2935 if (check_in_dac_nids(spec, nid))
2936 nid = 0;
eb06ed8f
TI		 2937 if (! nid)
2938 continue;
2939 add_spec_dacs(spec, nid);
c7d4b2fa 2940 }
1b290a51
MR		 2941 for (i = 0; i < cfg->line_outs; i++) {
2942 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2943 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2944 if (check_in_dac_nids(spec, nid))
2945 nid = 0;
2946 if (! nid)
2947 continue;
2948 add_spec_dacs(spec, nid);
2949 }
eb06ed8f
TI		 2950 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2951 static const char *pfxs[] = {
2952 "Speaker", "External Speaker", "Speaker2",
2953 };
2954 err = create_controls(spec, pfxs[i - old_num_dacs],
2955 spec->multiout.dac_nids[i], 3);
2956 if (err < 0)
2957 return err;
2958 }
2959 if (spec->multiout.hp_nid) {
2626a263
TI		 2960 err = create_controls(spec, "Headphone",
2961 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 2962 if (err < 0)
2963 return err;
2964 }
c7d4b2fa
M		 2965
2966 return 0;
2967}
2968
b22b4821 2969/* labels for mono mux outputs */
d0513fc6
MR		 2970static const char *stac92xx_mono_labels[4] = {
2971 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 2972};
2973
2974/* create mono mux for mono out on capable codecs */
2975static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2976{
2977 struct sigmatel_spec *spec = codec->spec;
2978 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2979 int i, num_cons;
2980 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2981
2982 num_cons = snd_hda_get_connections(codec,
2983 spec->mono_nid,
2984 con_lst,
2985 HDA_MAX_NUM_INPUTS);
2986 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2987 return -EINVAL;
2988
2989 for (i = 0; i < num_cons; i++) {
2990 mono_mux->items[mono_mux->num_items].label =
2991 stac92xx_mono_labels[i];
2992 mono_mux->items[mono_mux->num_items].index = i;
2993 mono_mux->num_items++;
2994 }
09a99959
MR		 2995
2996 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2997 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2998}
2999
89385035
MR		 3000/* labels for amp mux outputs */
3001static const char *stac92xx_amp_labels[3] = {
3002 "Front Microphone", "Microphone", "Line In"
3003};
3004
3005/* create amp out controls mux on capable codecs */
3006static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3007{
3008 struct sigmatel_spec *spec = codec->spec;
3009 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3010 int i, err;
3011
2a9c7816 3012 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3013 amp_mux->items[amp_mux->num_items].label =
3014 stac92xx_amp_labels[i];
3015 amp_mux->items[amp_mux->num_items].index = i;
3016 amp_mux->num_items++;
3017 }
3018
2a9c7816
MR		 3019 if (spec->num_amps > 1) {
3020 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3021 "Amp Selector Capture Switch", 0);
3022 if (err < 0)
3023 return err;
3024 }
89385035
MR		 3025 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3026 "Amp Capture Volume",
3027 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3028}
3029
3030
1cd2224c
MR		 3031/* create PC beep volume controls */
3032static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3033 hda_nid_t nid)
3034{
3035 struct sigmatel_spec *spec = codec->spec;
3036 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3037 int err;
3038
3039 /* check for mute support for the the amp */
3040 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3041 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3042 "PC Beep Playback Switch",
3043 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3044 if (err < 0)
3045 return err;
3046 }
3047
3048 /* check to see if there is volume support for the amp */
3049 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3050 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3051 "PC Beep Playback Volume",
3052 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3053 if (err < 0)
3054 return err;
3055 }
3056 return 0;
3057}
3058
4682eee0
MR		 3059static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3060{
3061 struct sigmatel_spec *spec = codec->spec;
3062 int wcaps, nid, i, err = 0;
3063
3064 for (i = 0; i < spec->num_muxes; i++) {
3065 nid = spec->mux_nids[i];
3066 wcaps = get_wcaps(codec, nid);
3067
3068 if (wcaps & AC_WCAP_OUT_AMP) {
3069 err = stac92xx_add_control_idx(spec,
3070 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3071 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3072 if (err < 0)
3073 return err;
3074 }
3075 }
3076 return 0;
3077};
3078
d9737751 3079static const char *stac92xx_spdif_labels[3] = {
65973632 3080 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3081};
3082
3083static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3084{
3085 struct sigmatel_spec *spec = codec->spec;
3086 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3087 const char **labels = spec->spdif_labels;
d9737751 3088 int i, num_cons;
65973632 3089 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3090
3091 num_cons = snd_hda_get_connections(codec,
3092 spec->smux_nids[0],
3093 con_lst,
3094 HDA_MAX_NUM_INPUTS);
65973632 3095 if (!num_cons)
d9737751
MR		 3096 return -EINVAL;
3097
65973632
MR		 3098 if (!labels)
3099 labels = stac92xx_spdif_labels;
3100
d9737751 3101 for (i = 0; i < num_cons; i++) {
65973632 3102 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3103 spdif_mux->items[spdif_mux->num_items].index = i;
3104 spdif_mux->num_items++;
3105 }
3106
3107 return 0;
3108}
3109
8b65727b 3110/* labels for dmic mux inputs */
ddc2cec4 3111static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3112 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3113 "Digital Mic 3", "Digital Mic 4"
3114};
3115
3116/* create playback/capture controls for input pins on dmic capable codecs */
3117static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3118 const struct auto_pin_cfg *cfg)
3119{
3120 struct sigmatel_spec *spec = codec->spec;
3121 struct hda_input_mux *dimux = &spec->private_dimux;
3122 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3123 int err, i, j;
3124 char name[32];
8b65727b
MP		 3125
3126 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3127 dimux->items[dimux->num_items].index = 0;
3128 dimux->num_items++;
3129
3130 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3131 hda_nid_t nid;
8b65727b
MP		 3132 int index;
3133 int num_cons;
0678accd 3134 unsigned int wcaps;
8b65727b
MP		 3135 unsigned int def_conf;
3136
3137 def_conf = snd_hda_codec_read(codec,
3138 spec->dmic_nids[i],
3139 0,
3140 AC_VERB_GET_CONFIG_DEFAULT,
3141 0);
3142 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3143 continue;
3144
0678accd 3145 nid = spec->dmic_nids[i];
8b65727b 3146 num_cons = snd_hda_get_connections(codec,
e1f0d669 3147 spec->dmux_nids[0],
8b65727b
MP		 3148 con_lst,
3149 HDA_MAX_NUM_INPUTS);
3150 for (j = 0; j < num_cons; j++)
0678accd 3151 if (con_lst[j] == nid) {
8b65727b
MP		 3152 index = j;
3153 goto found;
3154 }
3155 continue;
3156found:
d0513fc6
MR		 3157 wcaps = get_wcaps(codec, nid) &
3158 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3159
d0513fc6 3160 if (wcaps) {
0678accd
MR		 3161 sprintf(name, "%s Capture Volume",
3162 stac92xx_dmic_labels[dimux->num_items]);
3163
3164 err = stac92xx_add_control(spec,
3165 STAC_CTL_WIDGET_VOL,
3166 name,
d0513fc6
MR		 3167 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3168 (wcaps & AC_WCAP_OUT_AMP) ?
3169 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3170 if (err < 0)
3171 return err;
3172 }
3173
8b65727b
MP		 3174 dimux->items[dimux->num_items].label =
3175 stac92xx_dmic_labels[dimux->num_items];
3176 dimux->items[dimux->num_items].index = index;
3177 dimux->num_items++;
3178 }
3179
3180 return 0;
3181}
3182
c7d4b2fa
M		 3183/* create playback/capture controls for input pins */
3184static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3185{
3186 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3187 struct hda_input_mux *imux = &spec->private_imux;
3188 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3189 int i, j, k;
3190
3191 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3192 int index;
3193
3194 if (!cfg->input_pins[i])
3195 continue;
3196 index = -1;
3197 for (j = 0; j < spec->num_muxes; j++) {
3198 int num_cons;
3199 num_cons = snd_hda_get_connections(codec,
3200 spec->mux_nids[j],
3201 con_lst,
3202 HDA_MAX_NUM_INPUTS);
3203 for (k = 0; k < num_cons; k++)
3204 if (con_lst[k] == cfg->input_pins[i]) {
3205 index = k;
3206 goto found;
3207 }
c7d4b2fa 3208 }
314634bc
TI		 3209 continue;
3210 found:
3211 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3212 imux->items[imux->num_items].index = index;
3213 imux->num_items++;
c7d4b2fa
M		 3214 }
3215
7b043899 3216 if (imux->num_items) {
62fe78e9
SR		 3217 /*
3218 * Set the current input for the muxes.
3219 * The STAC9221 has two input muxes with identical source
3220 * NID lists. Hopefully this won't get confused.
3221 */
3222 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3223 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3224 AC_VERB_SET_CONNECT_SEL,
3225 imux->items[0].index);
62fe78e9
SR		 3226 }
3227 }
3228
c7d4b2fa
M		 3229 return 0;
3230}
3231
c7d4b2fa
M		 3232static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3233{
3234 struct sigmatel_spec *spec = codec->spec;
3235 int i;
3236
3237 for (i = 0; i < spec->autocfg.line_outs; i++) {
3238 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3239 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3240 }
3241}
3242
3243static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3244{
3245 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3246 int i;
c7d4b2fa 3247
eb06ed8f
TI		 3248 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3249 hda_nid_t pin;
3250 pin = spec->autocfg.hp_pins[i];
3251 if (pin) /* connect to front */
3252 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3253 }
3254 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3255 hda_nid_t pin;
3256 pin = spec->autocfg.speaker_pins[i];
3257 if (pin) /* connect to front */
3258 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3259 }
c7d4b2fa
M		 3260}
3261
3cc08dc6 3262static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3263{
3264 struct sigmatel_spec *spec = codec->spec;
3265 int err;
bcecd9bd 3266 int hp_speaker_swap = 0;
c7d4b2fa 3267
8b65727b
MP		 3268 if ((err = snd_hda_parse_pin_def_config(codec,
3269 &spec->autocfg,
3270 spec->dmic_nids)) < 0)
c7d4b2fa 3271 return err;
82bc955f 3272 if (! spec->autocfg.line_outs)
869264c4 3273 return 0; /* can't find valid pin config */
19039bd0 3274
bcecd9bd
JZ		 3275 /* If we have no real line-out pin and multiple hp-outs, HPs should
3276 * be set up as multi-channel outputs.
3277 */
3278 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3279 spec->autocfg.hp_outs > 1) {
3280 /* Copy hp_outs to line_outs, backup line_outs in
3281 * speaker_outs so that the following routines can handle
3282 * HP pins as primary outputs.
3283 */
3284 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3285 sizeof(spec->autocfg.line_out_pins));
3286 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3287 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3288 sizeof(spec->autocfg.hp_pins));
3289 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3290 hp_speaker_swap = 1;
3291 }
09a99959 3292 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3293 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3294 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3295 u32 caps = query_amp_caps(codec,
3296 spec->autocfg.mono_out_pin, dir);
3297 hda_nid_t conn_list[1];
3298
3299 /* get the mixer node and then the mono mux if it exists */
3300 if (snd_hda_get_connections(codec,
3301 spec->autocfg.mono_out_pin, conn_list, 1) &&
3302 snd_hda_get_connections(codec, conn_list[0],
3303 conn_list, 1)) {
3304
3305 int wcaps = get_wcaps(codec, conn_list[0]);
3306 int wid_type = (wcaps & AC_WCAP_TYPE)
3307 >> AC_WCAP_TYPE_SHIFT;
3308 /* LR swap check, some stac925x have a mux that
3309 * changes the DACs output path instead of the
3310 * mono-mux path.
3311 */
3312 if (wid_type == AC_WID_AUD_SEL &&
3313 !(wcaps & AC_WCAP_LR_SWAP))
3314 spec->mono_nid = conn_list[0];
3315 }
d0513fc6
MR		 3316 if (dir) {
3317 hda_nid_t nid = spec->autocfg.mono_out_pin;
3318
3319 /* most mono outs have a least a mute/unmute switch */
3320 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3321 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3322 "Mono Playback Switch",
3323 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3324 if (err < 0)
3325 return err;
d0513fc6
MR		 3326 /* check for volume support for the amp */
3327 if ((caps & AC_AMPCAP_NUM_STEPS)
3328 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3329 err = stac92xx_add_control(spec,
3330 STAC_CTL_WIDGET_VOL,
3331 "Mono Playback Volume",
3332 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3333 if (err < 0)
3334 return err;
3335 }
09a99959
MR		 3336 }
3337
3338 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3339 AC_PINCTL_OUT_EN);
3340 }
bcecd9bd 3341
403d1944
MP		 3342 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3343 return err;
19039bd0
TI		 3344 if (spec->multiout.num_dacs == 0)
3345 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3346 return err;
c7d4b2fa 3347
0fb87bb4
ML		 3348 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3349
3350 if (err < 0)
3351 return err;
3352
1cd2224c
MR		 3353 /* setup analog beep controls */
3354 if (spec->anabeep_nid > 0) {
3355 err = stac92xx_auto_create_beep_ctls(codec,
3356 spec->anabeep_nid);
3357 if (err < 0)
3358 return err;
3359 }
3360
3361 /* setup digital beep controls and input device */
3362#ifdef CONFIG_SND_HDA_INPUT_BEEP
3363 if (spec->digbeep_nid > 0) {
3364 hda_nid_t nid = spec->digbeep_nid;
3365
3366 err = stac92xx_auto_create_beep_ctls(codec, nid);
3367 if (err < 0)
3368 return err;
3369 err = snd_hda_attach_beep_device(codec, nid);
3370 if (err < 0)
3371 return err;
3372 }
3373#endif
3374
bcecd9bd
JZ		 3375 if (hp_speaker_swap == 1) {
3376 /* Restore the hp_outs and line_outs */
3377 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3378 sizeof(spec->autocfg.line_out_pins));
3379 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3380 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3381 sizeof(spec->autocfg.speaker_pins));
3382 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3383 memset(spec->autocfg.speaker_pins, 0,
3384 sizeof(spec->autocfg.speaker_pins));
3385 spec->autocfg.speaker_outs = 0;
3386 }
3387
0fb87bb4
ML		 3388 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3389
3390 if (err < 0)
3391 return err;
3392
3393 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3394
3395 if (err < 0)
c7d4b2fa
M		 3396 return err;
3397
b22b4821
MR		 3398 if (spec->mono_nid > 0) {
3399 err = stac92xx_auto_create_mono_output_ctls(codec);
3400 if (err < 0)
3401 return err;
3402 }
2a9c7816 3403 if (spec->num_amps > 0) {
89385035
MR		 3404 err = stac92xx_auto_create_amp_output_ctls(codec);
3405 if (err < 0)
3406 return err;
3407 }
2a9c7816 3408 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3409 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3410 &spec->autocfg)) < 0)
3411 return err;
4682eee0
MR		 3412 if (spec->num_muxes > 0) {
3413 err = stac92xx_auto_create_mux_input_ctls(codec);
3414 if (err < 0)
3415 return err;
3416 }
d9737751
MR		 3417 if (spec->num_smuxes > 0) {
3418 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3419 if (err < 0)
3420 return err;
3421 }
8b65727b 3422
c7d4b2fa 3423 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3424 if (spec->multiout.max_channels > 2)
c7d4b2fa 3425 spec->surr_switch = 1;
c7d4b2fa 3426
82bc955f 3427 if (spec->autocfg.dig_out_pin)
3cc08dc6 3428 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3429 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3430 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 3431
3432 if (spec->kctl_alloc)
3433 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3434
3435 spec->input_mux = &spec->private_imux;
2a9c7816 3436 spec->dinput_mux = &spec->private_dimux;
d9737751 3437 spec->sinput_mux = &spec->private_smux;
b22b4821 3438 spec->mono_mux = &spec->private_mono_mux;
89385035 3439 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3440 return 1;
3441}
3442
82bc955f
TI		 3443/* add playback controls for HP output */
3444static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3445 struct auto_pin_cfg *cfg)
3446{
3447 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3448 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3449 unsigned int wid_caps;
3450
3451 if (! pin)
3452 return 0;
3453
3454 wid_caps = get_wcaps(codec, pin);
505cb341 3455 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3456 spec->hp_detect = 1;
82bc955f
TI		 3457
3458 return 0;
3459}
3460
160ea0dc
RF		 3461/* add playback controls for LFE output */
3462static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3463 struct auto_pin_cfg *cfg)
3464{
3465 struct sigmatel_spec *spec = codec->spec;
3466 int err;
3467 hda_nid_t lfe_pin = 0x0;
3468 int i;
3469
3470 /*
3471 * search speaker outs and line outs for a mono speaker pin
3472 * with an amp. If one is found, add LFE controls
3473 * for it.
3474 */
3475 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3476 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3477 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3478 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3479 if (wcaps == AC_WCAP_OUT_AMP)
3480 /* found a mono speaker with an amp, must be lfe */
3481 lfe_pin = pin;
3482 }
3483
3484 /* if speaker_outs is 0, then speakers may be in line_outs */
3485 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3486 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3487 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3488 unsigned int defcfg;
8b551785 3489 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3490 AC_VERB_GET_CONFIG_DEFAULT,
3491 0x00);
8b551785 3492 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3493 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3494 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3495 if (wcaps == AC_WCAP_OUT_AMP)
3496 /* found a mono speaker with an amp,
3497 must be lfe */
3498 lfe_pin = pin;
3499 }
3500 }
3501 }
3502
3503 if (lfe_pin) {
eb06ed8f 3504 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3505 if (err < 0)
3506 return err;
3507 }
3508
3509 return 0;
3510}
3511
c7d4b2fa
M		 3512static int stac9200_parse_auto_config(struct hda_codec *codec)
3513{
3514 struct sigmatel_spec *spec = codec->spec;
3515 int err;
3516
df694daa 3517 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3518 return err;
3519
3520 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3521 return err;
3522
82bc955f
TI		 3523 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3524 return err;
3525
160ea0dc
RF		 3526 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3527 return err;
3528
82bc955f 3529 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3530 spec->multiout.dig_out_nid = 0x05;
82bc955f 3531 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3532 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 3533
3534 if (spec->kctl_alloc)
3535 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3536
3537 spec->input_mux = &spec->private_imux;
8b65727b 3538 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3539
3540 return 1;
3541}
3542
62fe78e9
SR		 3543/*
3544 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3545 * funky external mute control using GPIO pins.
3546 */
3547
76e1ddfb 3548static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3549 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3550{
3551 unsigned int gpiostate, gpiomask, gpiodir;
3552
3553 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3554 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3555 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3556
3557 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3558 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3559 gpiomask |= mask;
62fe78e9
SR		 3560
3561 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3562 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3563 gpiodir |= dir_mask;
62fe78e9 3564
76e1ddfb 3565 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3566 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3567
3568 snd_hda_codec_write(codec, codec->afg, 0,
3569 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3570 snd_hda_codec_read(codec, codec->afg, 0,
3571 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3572
3573 msleep(1);
3574
76e1ddfb
TI		 3575 snd_hda_codec_read(codec, codec->afg, 0,
3576 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3577}
3578
314634bc
TI		 3579static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3580 unsigned int event)
3581{
3582 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3583 snd_hda_codec_write_cache(codec, nid, 0,
3584 AC_VERB_SET_UNSOLICITED_ENABLE,
3585 (AC_USRSP_EN | event));
314634bc
TI		 3586}
3587
a64135a2
MR		 3588static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3589{
3590 int i;
3591 for (i = 0; i < cfg->hp_outs; i++)
3592 if (cfg->hp_pins[i] == nid)
3593 return 1; /* nid is a HP-Out */
3594
3595 return 0; /* nid is not a HP-Out */
3596};
3597
b76c850f
MR		 3598static void stac92xx_power_down(struct hda_codec *codec)
3599{
3600 struct sigmatel_spec *spec = codec->spec;
3601
3602 /* power down inactive DACs */
3603 hda_nid_t *dac;
3604 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3605 if (!is_in_dac_nids(spec, *dac) &&
3606 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3607 snd_hda_codec_write_cache(codec, *dac, 0,
3608 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3609}
3610
c7d4b2fa
M		 3611static int stac92xx_init(struct hda_codec *codec)
3612{
3613 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3614 struct auto_pin_cfg *cfg = &spec->autocfg;
3615 int i;
c7d4b2fa 3616
c7d4b2fa
M		 3617 snd_hda_sequence_write(codec, spec->init);
3618
8daaaa97
MR		 3619 /* power down adcs initially */
3620 if (spec->powerdown_adcs)
3621 for (i = 0; i < spec->num_adcs; i++)
3622 snd_hda_codec_write_cache(codec,
3623 spec->adc_nids[i], 0,
3624 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
82bc955f
TI		 3625 /* set up pins */
3626 if (spec->hp_detect) {
505cb341 3627 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3628 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3629 enable_pin_detect(codec, cfg->hp_pins[i],
3630 STAC_HP_EVENT);
0a07acaf
TI		 3631 /* force to enable the first line-out; the others are set up
3632 * in unsol_event
3633 */
3634 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3635 AC_PINCTL_OUT_EN);
eb995a8c 3636 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3637 /* fake event to set up pins */
3638 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3639 } else {
3640 stac92xx_auto_init_multi_out(codec);
3641 stac92xx_auto_init_hp_out(codec);
3642 }
3643 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3644 hda_nid_t nid = cfg->input_pins[i];
3645 if (nid) {
3646 unsigned int pinctl = AC_PINCTL_IN_EN;
3647 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3648 pinctl |= stac92xx_get_vref(codec, nid);
3649 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3650 }
82bc955f 3651 }
a64135a2
MR		 3652 for (i = 0; i < spec->num_dmics; i++)
3653 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3654 AC_PINCTL_IN_EN);
3655 for (i = 0; i < spec->num_pwrs; i++) {
3656 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3657 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3658 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3659 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3660 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3661 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
aafc4412 3662 def_conf = get_defcfg_connect(def_conf);
a64135a2
MR		 3663 /* outputs are only ports capable of power management
3664 * any attempts on powering down a input port cause the
3665 * referenced VREF to act quirky.
3666 */
3667 if (pinctl & AC_PINCTL_IN_EN)
3668 continue;
aafc4412
MR		 3669 /* skip any ports that don't have jacks since presence
3670 * detection is useless */
3671 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
bce6c2b5 3672 continue;
a64135a2
MR		 3673 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3674 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3675 }
b76c850f
MR		 3676 if (spec->dac_list)
3677 stac92xx_power_down(codec);
82bc955f
TI		 3678 if (cfg->dig_out_pin)
3679 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3680 AC_PINCTL_OUT_EN);
3681 if (cfg->dig_in_pin)
3682 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3683 AC_PINCTL_IN_EN);
3684
4fe5195c
MR		 3685 stac_gpio_set(codec, spec->gpio_mask,
3686 spec->gpio_dir, spec->gpio_data);
62fe78e9 3687
c7d4b2fa
M		 3688 return 0;
3689}
3690
2f2f4251
M		 3691static void stac92xx_free(struct hda_codec *codec)
3692{
c7d4b2fa
M		 3693 struct sigmatel_spec *spec = codec->spec;
3694 int i;
3695
3696 if (! spec)
3697 return;
3698
3699 if (spec->kctl_alloc) {
3700 for (i = 0; i < spec->num_kctl_used; i++)
3701 kfree(spec->kctl_alloc[i].name);
3702 kfree(spec->kctl_alloc);
3703 }
3704
11b44bbd
RF		 3705 if (spec->bios_pin_configs)
3706 kfree(spec->bios_pin_configs);
3707
c7d4b2fa 3708 kfree(spec);
1cd2224c 3709 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3710}
3711
4e55096e
M		 3712static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3713 unsigned int flag)
3714{
3715 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3716 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3717
f9acba43
TI		 3718 if (pin_ctl & AC_PINCTL_IN_EN) {
3719 /*
3720 * we need to check the current set-up direction of
3721 * shared input pins since they can be switched via
3722 * "xxx as Output" mixer switch
3723 */
3724 struct sigmatel_spec *spec = codec->spec;
3725 struct auto_pin_cfg *cfg = &spec->autocfg;
3726 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3727 spec->line_switch) ||
3728 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3729 spec->mic_switch))
3730 return;
3731 }
3732
7b043899
SL		 3733 /* if setting pin direction bits, clear the current
3734 direction bits first */
3735 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3736 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3737
82beb8fd 3738 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3739 AC_VERB_SET_PIN_WIDGET_CONTROL,
3740 pin_ctl | flag);
3741}
3742
3743static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3744 unsigned int flag)
3745{
3746 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3747 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3748 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3749 AC_VERB_SET_PIN_WIDGET_CONTROL,
3750 pin_ctl & ~flag);
3751}
3752
40c1d308 3753static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3754{
3755 if (!nid)
3756 return 0;
3757 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3758 & (1 << 31)) {
3759 unsigned int pinctl;
3760 pinctl = snd_hda_codec_read(codec, nid, 0,
3761 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3762 if (pinctl & AC_PINCTL_IN_EN)
3763 return 0; /* mic- or line-input */
3764 else
3765 return 1; /* HP-output */
3766 }
314634bc
TI		 3767 return 0;
3768}
3769
3770static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3771{
3772 struct sigmatel_spec *spec = codec->spec;
3773 struct auto_pin_cfg *cfg = &spec->autocfg;
7c2ba97b 3774 int nid = cfg->hp_pins[cfg->hp_outs - 1];
4e55096e
M		 3775 int i, presence;
3776
eb06ed8f 3777 presence = 0;
4fe5195c
MR		 3778 if (spec->gpio_mute)
3779 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3780 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3781
eb06ed8f 3782 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3783 if (presence)
3784 break;
7c2ba97b
MR		 3785 if (spec->hp_switch && cfg->hp_pins[i] == nid)
3786 break;
4fe5195c 3787 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3788 }
4e55096e
M		 3789
3790 if (presence) {
3791 /* disable lineouts, enable hp */
7c2ba97b
MR		 3792 if (spec->hp_switch)
3793 stac92xx_reset_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3794 for (i = 0; i < cfg->line_outs; i++)
3795 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3796 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3797 for (i = 0; i < cfg->speaker_outs; i++)
3798 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3799 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3800 if (spec->eapd_mask)
3801 stac_gpio_set(codec, spec->gpio_mask,
3802 spec->gpio_dir, spec->gpio_data &
3803 ~spec->eapd_mask);
4e55096e
M		 3804 } else {
3805 /* enable lineouts, disable hp */
7c2ba97b
MR		 3806 if (spec->hp_switch)
3807 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3808 for (i = 0; i < cfg->line_outs; i++)
3809 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3810 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3811 for (i = 0; i < cfg->speaker_outs; i++)
3812 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3813 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3814 if (spec->eapd_mask)
3815 stac_gpio_set(codec, spec->gpio_mask,
3816 spec->gpio_dir, spec->gpio_data |
3817 spec->eapd_mask);
4e55096e 3818 }
7c2ba97b
MR		 3819 if (!spec->hp_switch && cfg->hp_outs > 1 && presence)
3820 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3821}
3822
a64135a2
MR		 3823static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3824{
3825 struct sigmatel_spec *spec = codec->spec;
3826 hda_nid_t nid = spec->pwr_nids[idx];
3827 int presence, val;
3828 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3829 & 0x000000ff;
3830 presence = get_hp_pin_presence(codec, nid);
d0513fc6
MR		 3831
3832 /* several codecs have two power down bits */
3833 if (spec->pwr_mapping)
3834 idx = spec->pwr_mapping[idx];
3835 else
3836 idx = 1 << idx;
a64135a2
MR		 3837
3838 if (presence)
3839 val &= ~idx;
3840 else
3841 val |= idx;
3842
3843 /* power down unused output ports */
3844 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3845};
3846
314634bc
TI		 3847static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3848{
a64135a2
MR		 3849 struct sigmatel_spec *spec = codec->spec;
3850 int idx = res >> 26 & 0x0f;
3851
3852 switch ((res >> 26) & 0x30) {
314634bc
TI		 3853 case STAC_HP_EVENT:
3854 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3855 /* fallthru */
3856 case STAC_PWR_EVENT:
3857 if (spec->num_pwrs > 0)
3858 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3859 }
3860}
3861
cb53c626 3862#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3863static int stac92xx_resume(struct hda_codec *codec)
3864{
dc81bed1
TI		 3865 struct sigmatel_spec *spec = codec->spec;
3866
11b44bbd 3867 stac92xx_set_config_regs(codec);
dc81bed1 3868 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3869 stac_gpio_set(codec, spec->gpio_mask,
3870 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3871 snd_hda_codec_resume_amp(codec);
3872 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3873 /* power down inactive DACs */
3874 if (spec->dac_list)
3875 stac92xx_power_down(codec);
dc81bed1
TI		 3876 /* invoke unsolicited event to reset the HP state */
3877 if (spec->hp_detect)
3878 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3879 return 0;
3880}
3881#endif
3882
2f2f4251
M		 3883static struct hda_codec_ops stac92xx_patch_ops = {
3884 .build_controls = stac92xx_build_controls,
3885 .build_pcms = stac92xx_build_pcms,
3886 .init = stac92xx_init,
3887 .free = stac92xx_free,
4e55096e 3888 .unsol_event = stac92xx_unsol_event,
cb53c626 3889#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3890 .resume = stac92xx_resume,
3891#endif
2f2f4251
M		 3892};
3893
3894static int patch_stac9200(struct hda_codec *codec)
3895{
3896 struct sigmatel_spec *spec;
c7d4b2fa 3897 int err;
2f2f4251 3898
e560d8d8 3899 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3900 if (spec == NULL)
3901 return -ENOMEM;
3902
3903 codec->spec = spec;
a4eed138 3904 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3905 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3906 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3907 stac9200_models,
3908 stac9200_cfg_tbl);
11b44bbd
RF		 3909 if (spec->board_config < 0) {
3910 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3911 err = stac92xx_save_bios_config_regs(codec);
3912 if (err < 0) {
3913 stac92xx_free(codec);
3914 return err;
3915 }
3916 spec->pin_configs = spec->bios_pin_configs;
3917 } else {
403d1944
MP		 3918 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3919 stac92xx_set_config_regs(codec);
3920 }
2f2f4251
M		 3921
3922 spec->multiout.max_channels = 2;
3923 spec->multiout.num_dacs = 1;
3924 spec->multiout.dac_nids = stac9200_dac_nids;
3925 spec->adc_nids = stac9200_adc_nids;
3926 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3927 spec->num_muxes = 1;
8b65727b 3928 spec->num_dmics = 0;
9e05b7a3 3929 spec->num_adcs = 1;
a64135a2 3930 spec->num_pwrs = 0;
c7d4b2fa 3931
bf277785
TD		 3932 if (spec->board_config == STAC_9200_GATEWAY ||
3933 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3934 spec->init = stac9200_eapd_init;
3935 else
3936 spec->init = stac9200_core_init;
2f2f4251 3937 spec->mixer = stac9200_mixer;
c7d4b2fa 3938
117f257d
TI		 3939 if (spec->board_config == STAC_9200_PANASONIC) {
3940 spec->gpio_mask = spec->gpio_dir = 0x09;
3941 spec->gpio_data = 0x00;
3942 }
3943
c7d4b2fa
M		 3944 err = stac9200_parse_auto_config(codec);
3945 if (err < 0) {
3946 stac92xx_free(codec);
3947 return err;
3948 }
2f2f4251
M		 3949
3950 codec->patch_ops = stac92xx_patch_ops;
3951
3952 return 0;
3953}
3954
8e21c34c
TD		 3955static int patch_stac925x(struct hda_codec *codec)
3956{
3957 struct sigmatel_spec *spec;
3958 int err;
3959
3960 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3961 if (spec == NULL)
3962 return -ENOMEM;
3963
3964 codec->spec = spec;
a4eed138 3965 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3966 spec->pin_nids = stac925x_pin_nids;
3967 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3968 stac925x_models,
3969 stac925x_cfg_tbl);
9e507abd 3970 again:
8e21c34c 3971 if (spec->board_config < 0) {
2c11f955
TD		 3972 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3973 "using BIOS defaults\n");
8e21c34c
TD		 3974 err = stac92xx_save_bios_config_regs(codec);
3975 if (err < 0) {
3976 stac92xx_free(codec);
3977 return err;
3978 }
3979 spec->pin_configs = spec->bios_pin_configs;
3980 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3981 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3982 stac92xx_set_config_regs(codec);
3983 }
3984
3985 spec->multiout.max_channels = 2;
3986 spec->multiout.num_dacs = 1;
3987 spec->multiout.dac_nids = stac925x_dac_nids;
3988 spec->adc_nids = stac925x_adc_nids;
3989 spec->mux_nids = stac925x_mux_nids;
3990 spec->num_muxes = 1;
9e05b7a3 3991 spec->num_adcs = 1;
a64135a2 3992 spec->num_pwrs = 0;
2c11f955
TD		 3993 switch (codec->vendor_id) {
3994 case 0x83847632: /* STAC9202 */
3995 case 0x83847633: /* STAC9202D */
3996 case 0x83847636: /* STAC9251 */
3997 case 0x83847637: /* STAC9251D */
f6e9852a 3998 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3999 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4000 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4001 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4002 break;
4003 default:
4004 spec->num_dmics = 0;
4005 break;
4006 }
8e21c34c
TD		 4007
4008 spec->init = stac925x_core_init;
4009 spec->mixer = stac925x_mixer;
4010
4011 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4012 if (!err) {
4013 if (spec->board_config < 0) {
4014 printk(KERN_WARNING "hda_codec: No auto-config is "
4015 "available, default to model=ref\n");
4016 spec->board_config = STAC_925x_REF;
4017 goto again;
4018 }
4019 err = -EINVAL;
4020 }
8e21c34c
TD		 4021 if (err < 0) {
4022 stac92xx_free(codec);
4023 return err;
4024 }
4025
4026 codec->patch_ops = stac92xx_patch_ops;
4027
4028 return 0;
4029}
4030
e1f0d669
MR		 4031static struct hda_input_mux stac92hd73xx_dmux = {
4032 .num_items = 4,
4033 .items = {
4034 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4035 { "Digital Mic 1", 0x09 },
4036 { "Digital Mic 2", 0x0a },
2a9c7816 4037 { "CD", 0x08 },
e1f0d669
MR		 4038 }
4039};
4040
4041static int patch_stac92hd73xx(struct hda_codec *codec)
4042{
4043 struct sigmatel_spec *spec;
4044 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4045 int err = 0;
4046
4047 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4048 if (spec == NULL)
4049 return -ENOMEM;
4050
4051 codec->spec = spec;
e99d32b3 4052 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4053 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4054 spec->pin_nids = stac92hd73xx_pin_nids;
4055 spec->board_config = snd_hda_check_board_config(codec,
4056 STAC_92HD73XX_MODELS,
4057 stac92hd73xx_models,
4058 stac92hd73xx_cfg_tbl);
4059again:
4060 if (spec->board_config < 0) {
4061 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4062 " STAC92HD73XX, using BIOS defaults\n");
4063 err = stac92xx_save_bios_config_regs(codec);
4064 if (err < 0) {
4065 stac92xx_free(codec);
4066 return err;
4067 }
4068 spec->pin_configs = spec->bios_pin_configs;
4069 } else {
4070 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
4071 stac92xx_set_config_regs(codec);
4072 }
4073
4074 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4075 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4076
4077 if (spec->multiout.num_dacs < 0) {
4078 printk(KERN_WARNING "hda_codec: Could not determine "
4079 "number of channels defaulting to DAC count\n");
4080 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4081 }
4082
4083 switch (spec->multiout.num_dacs) {
4084 case 0x3: /* 6 Channel */
4085 spec->mixer = stac92hd73xx_6ch_mixer;
4086 spec->init = stac92hd73xx_6ch_core_init;
4087 break;
4088 case 0x4: /* 8 Channel */
e1f0d669
MR		 4089 spec->mixer = stac92hd73xx_8ch_mixer;
4090 spec->init = stac92hd73xx_8ch_core_init;
4091 break;
4092 case 0x5: /* 10 Channel */
e1f0d669
MR		 4093 spec->mixer = stac92hd73xx_10ch_mixer;
4094 spec->init = stac92hd73xx_10ch_core_init;
4095 };
4096
4097 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4098 spec->aloopback_mask = 0x01;
4099 spec->aloopback_shift = 8;
4100
1cd2224c 4101 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4102 spec->mux_nids = stac92hd73xx_mux_nids;
4103 spec->adc_nids = stac92hd73xx_adc_nids;
4104 spec->dmic_nids = stac92hd73xx_dmic_nids;
4105 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4106 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4107 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4108 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4109
4110 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4111 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4112 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4113 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4114 sizeof(stac92hd73xx_dmux));
4115
a7662640
MR		 4116 switch (spec->board_config) {
4117 case STAC_DELL_M6:
d654a660 4118 spec->init = dell_eq_core_init;
2a9c7816 4119 spec->num_smuxes = 0;
2a9c7816
MR		 4120 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4121 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
4122 spec->num_amps = 1;
a7662640
MR		 4123 switch (codec->subsystem_id) {
4124 case 0x1028025e: /* Analog Mics */
4125 case 0x1028025f:
4126 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4127 spec->num_dmics = 0;
2a9c7816 4128 spec->private_dimux.num_items = 1;
a7662640 4129 break;
d654a660 4130 case 0x10280271: /* Digital Mics */
a7662640 4131 case 0x10280272:
d654a660
MR		 4132 spec->init = dell_m6_core_init;
4133 /* fall-through */
4134 case 0x10280254:
4135 case 0x10280255:
a7662640
MR		 4136 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4137 spec->num_dmics = 1;
2a9c7816 4138 spec->private_dimux.num_items = 2;
a7662640
MR		 4139 break;
4140 case 0x10280256: /* Both */
4141 case 0x10280057:
4142 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4143 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4144 spec->num_dmics = 1;
2a9c7816 4145 spec->private_dimux.num_items = 2;
a7662640
MR		 4146 break;
4147 }
4148 break;
4149 default:
4150 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4151 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
a7662640 4152 }
b2c4f4d7
MR		 4153 if (spec->board_config > STAC_92HD73XX_REF) {
4154 /* GPIO0 High = Enable EAPD */
4155 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4156 spec->gpio_data = 0x01;
4157 }
2a9c7816 4158 spec->dinput_mux = &spec->private_dimux;
a7662640 4159
a64135a2
MR		 4160 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4161 spec->pwr_nids = stac92hd73xx_pwr_nids;
4162
d9737751 4163 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4164
4165 if (!err) {
4166 if (spec->board_config < 0) {
4167 printk(KERN_WARNING "hda_codec: No auto-config is "
4168 "available, default to model=ref\n");
4169 spec->board_config = STAC_92HD73XX_REF;
4170 goto again;
4171 }
4172 err = -EINVAL;
4173 }
4174
4175 if (err < 0) {
4176 stac92xx_free(codec);
4177 return err;
4178 }
4179
4180 codec->patch_ops = stac92xx_patch_ops;
4181
4182 return 0;
4183}
4184
d0513fc6
MR		 4185static struct hda_input_mux stac92hd83xxx_dmux = {
4186 .num_items = 3,
4187 .items = {
4188 { "Analog Inputs", 0x03 },
4189 { "Digital Mic 1", 0x04 },
4190 { "Digital Mic 2", 0x05 },
4191 }
4192};
4193
4194static int patch_stac92hd83xxx(struct hda_codec *codec)
4195{
4196 struct sigmatel_spec *spec;
4197 int err;
4198
4199 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4200 if (spec == NULL)
4201 return -ENOMEM;
4202
4203 codec->spec = spec;
0ffa9807 4204 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4205 spec->mono_nid = 0x19;
4206 spec->digbeep_nid = 0x21;
4207 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4208 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4209 spec->adc_nids = stac92hd83xxx_adc_nids;
4210 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4211 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4212 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4213 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4214
4215 spec->init = stac92hd83xxx_core_init;
4216 switch (codec->vendor_id) {
4217 case 0x111d7605:
4218 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4219 break;
4220 default:
4221 spec->num_pwrs--;
4222 spec->init++; /* switch to config #2 */
4223 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4224 }
4225
4226 spec->mixer = stac92hd83xxx_mixer;
4227 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4228 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4229 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4230 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4231 spec->dinput_mux = &stac92hd83xxx_dmux;
4232 spec->pin_nids = stac92hd83xxx_pin_nids;
4233 spec->board_config = snd_hda_check_board_config(codec,
4234 STAC_92HD83XXX_MODELS,
4235 stac92hd83xxx_models,
4236 stac92hd83xxx_cfg_tbl);
4237again:
4238 if (spec->board_config < 0) {
4239 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4240 " STAC92HD83XXX, using BIOS defaults\n");
4241 err = stac92xx_save_bios_config_regs(codec);
4242 if (err < 0) {
4243 stac92xx_free(codec);
4244 return err;
4245 }
4246 spec->pin_configs = spec->bios_pin_configs;
4247 } else {
4248 spec->pin_configs = stac92hd83xxx_brd_tbl[spec->board_config];
4249 stac92xx_set_config_regs(codec);
4250 }
4251
4252 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4253 if (!err) {
4254 if (spec->board_config < 0) {
4255 printk(KERN_WARNING "hda_codec: No auto-config is "
4256 "available, default to model=ref\n");
4257 spec->board_config = STAC_92HD83XXX_REF;
4258 goto again;
4259 }
4260 err = -EINVAL;
4261 }
4262
4263 if (err < 0) {
4264 stac92xx_free(codec);
4265 return err;
4266 }
4267
4268 codec->patch_ops = stac92xx_patch_ops;
4269
4270 return 0;
4271}
4272
8daaaa97
MR		 4273#ifdef SND_HDA_NEEDS_RESUME
4274static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4275{
4276 struct sigmatel_spec *spec = codec->spec;
4277 int i;
4278 snd_hda_codec_write_cache(codec, codec->afg, 0,
4279 AC_VERB_SET_POWER_STATE, pwr);
4280
4281 msleep(1);
4282 for (i = 0; i < spec->num_adcs; i++) {
4283 snd_hda_codec_write_cache(codec,
4284 spec->adc_nids[i], 0,
4285 AC_VERB_SET_POWER_STATE, pwr);
4286 }
4287};
4288
4289static int stac92hd71xx_resume(struct hda_codec *codec)
4290{
4291 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4292 return stac92xx_resume(codec);
4293}
4294
4295static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4296{
4297 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
4298 return 0;
4299};
4300
4301#endif
4302
4303static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4304 .build_controls = stac92xx_build_controls,
4305 .build_pcms = stac92xx_build_pcms,
4306 .init = stac92xx_init,
4307 .free = stac92xx_free,
4308 .unsol_event = stac92xx_unsol_event,
4309#ifdef SND_HDA_NEEDS_RESUME
4310 .resume = stac92hd71xx_resume,
4311 .suspend = stac92hd71xx_suspend,
4312#endif
4313};
d0513fc6 4314
e035b841
MR		 4315static int patch_stac92hd71bxx(struct hda_codec *codec)
4316{
4317 struct sigmatel_spec *spec;
4318 int err = 0;
4319
4320 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4321 if (spec == NULL)
4322 return -ENOMEM;
4323
4324 codec->spec = spec;
8daaaa97 4325 codec->patch_ops = stac92xx_patch_ops;
e035b841 4326 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4327 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 4328 spec->pin_nids = stac92hd71bxx_pin_nids;
4329 spec->board_config = snd_hda_check_board_config(codec,
4330 STAC_92HD71BXX_MODELS,
4331 stac92hd71bxx_models,
4332 stac92hd71bxx_cfg_tbl);
4333again:
4334 if (spec->board_config < 0) {
4335 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4336 " STAC92HD71BXX, using BIOS defaults\n");
4337 err = stac92xx_save_bios_config_regs(codec);
4338 if (err < 0) {
4339 stac92xx_free(codec);
4340 return err;
4341 }
4342 spec->pin_configs = spec->bios_pin_configs;
4343 } else {
4344 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
4345 stac92xx_set_config_regs(codec);
4346 }
4347
541eee87
MR		 4348 switch (codec->vendor_id) {
4349 case 0x111d76b6: /* 4 Port without Analog Mixer */
4350 case 0x111d76b7:
4351 case 0x111d76b4: /* 6 Port without Analog Mixer */
4352 case 0x111d76b5:
4353 spec->mixer = stac92hd71bxx_mixer;
4354 spec->init = stac92hd71bxx_core_init;
0ffa9807 4355 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4356 break;
aafc4412 4357 case 0x111d7608: /* 5 Port with Analog Mixer */
8daaaa97
MR		 4358 if ((codec->revision_id & 0xf) == 0 ||
4359 (codec->revision_id & 0xf) == 1) {
4360#ifdef SND_HDA_NEEDS_RESUME
4361 codec->patch_ops = stac92hd71bxx_patch_ops;
4362#endif
4363 spec->stream_delay = 40; /* 40 milliseconds */
4364 }
4365
aafc4412
MR		 4366 /* no output amps */
4367 spec->num_pwrs = 0;
4368 spec->mixer = stac92hd71bxx_analog_mixer;
4369
4370 /* disable VSW */
4371 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
4372 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
4373 break;
4374 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4375 if ((codec->revision_id & 0xf) == 1) {
4376#ifdef SND_HDA_NEEDS_RESUME
4377 codec->patch_ops = stac92hd71bxx_patch_ops;
4378#endif
4379 spec->stream_delay = 40; /* 40 milliseconds */
4380 }
4381
aafc4412
MR		 4382 /* no output amps */
4383 spec->num_pwrs = 0;
4384 /* fallthru */
541eee87
MR		 4385 default:
4386 spec->mixer = stac92hd71bxx_analog_mixer;
4387 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4388 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4389 }
4390
4391 spec->aloopback_mask = 0x20;
4392 spec->aloopback_shift = 0;
4393
b2c4f4d7
MR		 4394 if (spec->board_config > STAC_92HD71BXX_REF) {
4395 /* GPIO0 = EAPD */
4396 spec->gpio_mask = 0x01;
4397 spec->gpio_dir = 0x01;
4398 spec->gpio_data = 0x01;
4399 }
e035b841 4400
8daaaa97 4401 spec->powerdown_adcs = 1;
1cd2224c 4402 spec->digbeep_nid = 0x26;
e035b841
MR		 4403 spec->mux_nids = stac92hd71bxx_mux_nids;
4404 spec->adc_nids = stac92hd71bxx_adc_nids;
4405 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4406 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4407 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4408 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4409
4410 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4411 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4412
6a14f585
MR		 4413 switch (spec->board_config) {
4414 case STAC_HP_M4:
4415 spec->num_dmics = 0;
4416 spec->num_smuxes = 1;
4417 spec->num_dmuxes = 0;
4418
4419 /* enable internal microphone */
4420 snd_hda_codec_write_cache(codec, 0x0e, 0,
4421 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80);
4422 break;
4423 default:
4424 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4425 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4426 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4427 };
4428
aea7bb0a 4429 spec->multiout.num_dacs = 1;
e035b841
MR		 4430 spec->multiout.hp_nid = 0x11;
4431 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4432
4433 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4434 if (!err) {
4435 if (spec->board_config < 0) {
4436 printk(KERN_WARNING "hda_codec: No auto-config is "
4437 "available, default to model=ref\n");
4438 spec->board_config = STAC_92HD71BXX_REF;
4439 goto again;
4440 }
4441 err = -EINVAL;
4442 }
4443
4444 if (err < 0) {
4445 stac92xx_free(codec);
4446 return err;
4447 }
4448
e035b841
MR		 4449 return 0;
4450};
4451
2f2f4251
M		 4452static int patch_stac922x(struct hda_codec *codec)
4453{
4454 struct sigmatel_spec *spec;
c7d4b2fa 4455 int err;
2f2f4251 4456
e560d8d8 4457 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4458 if (spec == NULL)
4459 return -ENOMEM;
4460
4461 codec->spec = spec;
a4eed138 4462 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4463 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4464 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4465 stac922x_models,
4466 stac922x_cfg_tbl);
536319af 4467 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4468 spec->gpio_mask = spec->gpio_dir = 0x03;
4469 spec->gpio_data = 0x03;
3fc24d85
TI		 4470 /* Intel Macs have all same PCI SSID, so we need to check
4471 * codec SSID to distinguish the exact models
4472 */
6f0778d8 4473 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4474 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4475
4476 case 0x106b0800:
4477 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4478 break;
5d5d3bc3
IZ		 4479 case 0x106b0600:
4480 case 0x106b0700:
4481 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4482 break;
5d5d3bc3
IZ		 4483 case 0x106b0e00:
4484 case 0x106b0f00:
4485 case 0x106b1600:
4486 case 0x106b1700:
4487 case 0x106b0200:
4488 case 0x106b1e00:
4489 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4490 break;
5d5d3bc3
IZ		 4491 case 0x106b1a00:
4492 case 0x00000100:
4493 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4494 break;
5d5d3bc3
IZ		 4495 case 0x106b0a00:
4496 case 0x106b2200:
4497 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4498 break;
536319af
NB		 4499 default:
4500 spec->board_config = STAC_INTEL_MAC_V3;
4501 break;
3fc24d85
TI		 4502 }
4503 }
4504
9e507abd 4505 again:
11b44bbd
RF		 4506 if (spec->board_config < 0) {
4507 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4508 "using BIOS defaults\n");
4509 err = stac92xx_save_bios_config_regs(codec);
4510 if (err < 0) {
4511 stac92xx_free(codec);
4512 return err;
4513 }
4514 spec->pin_configs = spec->bios_pin_configs;
4515 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 4516 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
4517 stac92xx_set_config_regs(codec);
4518 }
2f2f4251 4519
c7d4b2fa
M		 4520 spec->adc_nids = stac922x_adc_nids;
4521 spec->mux_nids = stac922x_mux_nids;
2549413e 4522 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4523 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4524 spec->num_dmics = 0;
a64135a2 4525 spec->num_pwrs = 0;
c7d4b2fa
M		 4526
4527 spec->init = stac922x_core_init;
2f2f4251 4528 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4529
4530 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4531
3cc08dc6 4532 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4533 if (!err) {
4534 if (spec->board_config < 0) {
4535 printk(KERN_WARNING "hda_codec: No auto-config is "
4536 "available, default to model=ref\n");
4537 spec->board_config = STAC_D945_REF;
4538 goto again;
4539 }
4540 err = -EINVAL;
4541 }
3cc08dc6
MP		 4542 if (err < 0) {
4543 stac92xx_free(codec);
4544 return err;
4545 }
4546
4547 codec->patch_ops = stac92xx_patch_ops;
4548
807a4636
TI		 4549 /* Fix Mux capture level; max to 2 */
4550 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4551 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4552 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4553 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4554 (0 << AC_AMPCAP_MUTE_SHIFT));
4555
3cc08dc6
MP		 4556 return 0;
4557}
4558
4559static int patch_stac927x(struct hda_codec *codec)
4560{
4561 struct sigmatel_spec *spec;
4562 int err;
4563
4564 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4565 if (spec == NULL)
4566 return -ENOMEM;
4567
4568 codec->spec = spec;
a4eed138 4569 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4570 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4571 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4572 stac927x_models,
4573 stac927x_cfg_tbl);
9e507abd 4574 again:
8e9068b1
MR		 4575 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4576 if (spec->board_config < 0)
4577 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4578 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 4579 err = stac92xx_save_bios_config_regs(codec);
4580 if (err < 0) {
4581 stac92xx_free(codec);
4582 return err;
4583 }
4584 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 4585 } else {
3cc08dc6
MP		 4586 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
4587 stac92xx_set_config_regs(codec);
4588 }
4589
1cd2224c 4590 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4591 spec->adc_nids = stac927x_adc_nids;
4592 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4593 spec->mux_nids = stac927x_mux_nids;
4594 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 4595 spec->smux_nids = stac927x_smux_nids;
4596 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 4597 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 4598 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4599 spec->multiout.dac_nids = spec->dac_nids;
4600
81d3dbde 4601 switch (spec->board_config) {
93ed1503 4602 case STAC_D965_3ST:
93ed1503 4603 case STAC_D965_5ST:
8e9068b1 4604 /* GPIO0 High = Enable EAPD */
0fc9dec4 4605 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4606 spec->gpio_data = 0x01;
8e9068b1
MR		 4607 spec->num_dmics = 0;
4608
93ed1503 4609 spec->init = d965_core_init;
9e05b7a3 4610 spec->mixer = stac927x_mixer;
81d3dbde 4611 break;
8e9068b1 4612 case STAC_DELL_BIOS:
780c8be4
MR		 4613 switch (codec->subsystem_id) {
4614 case 0x10280209:
4615 case 0x1028022e:
4616 /* correct the device field to SPDIF out */
4617 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
4618 break;
4619 };
03d7ca17
MR		 4620 /* configure the analog microphone on some laptops */
4621 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 4622 /* correct the front output jack as a hp out */
7989fba9 4623 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 4624 /* correct the front input jack as a mic */
4625 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
4626 /* fallthru */
8e9068b1
MR		 4627 case STAC_DELL_3ST:
4628 /* GPIO2 High = Enable EAPD */
0fc9dec4 4629 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4630 spec->gpio_data = 0x04;
7f16859a
MR		 4631 spec->dmic_nids = stac927x_dmic_nids;
4632 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4633
8e9068b1
MR		 4634 spec->init = d965_core_init;
4635 spec->mixer = stac927x_mixer;
4636 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4637 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4638 break;
4639 default:
b2c4f4d7
MR		 4640 if (spec->board_config > STAC_D965_REF) {
4641 /* GPIO0 High = Enable EAPD */
4642 spec->eapd_mask = spec->gpio_mask = 0x01;
4643 spec->gpio_dir = spec->gpio_data = 0x01;
4644 }
8e9068b1
MR		 4645 spec->num_dmics = 0;
4646
4647 spec->init = stac927x_core_init;
4648 spec->mixer = stac927x_mixer;
7f16859a
MR		 4649 }
4650
a64135a2 4651 spec->num_pwrs = 0;
e1f0d669
MR		 4652 spec->aloopback_mask = 0x40;
4653 spec->aloopback_shift = 0;
8e9068b1 4654
3cc08dc6 4655 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 4656 if (!err) {
4657 if (spec->board_config < 0) {
4658 printk(KERN_WARNING "hda_codec: No auto-config is "
4659 "available, default to model=ref\n");
4660 spec->board_config = STAC_D965_REF;
4661 goto again;
4662 }
4663 err = -EINVAL;
4664 }
c7d4b2fa
M		 4665 if (err < 0) {
4666 stac92xx_free(codec);
4667 return err;
4668 }
2f2f4251
M		 4669
4670 codec->patch_ops = stac92xx_patch_ops;
4671
52987656
TI		 4672 /*
4673 * !!FIXME!!
4674 * The STAC927x seem to require fairly long delays for certain
4675 * command sequences. With too short delays (even if the answer
4676 * is set to RIRB properly), it results in the silence output
4677 * on some hardwares like Dell.
4678 *
4679 * The below flag enables the longer delay (see get_response
4680 * in hda_intel.c).
4681 */
4682 codec->bus->needs_damn_long_delay = 1;
4683
2f2f4251
M		 4684 return 0;
4685}
4686
f3302a59
MP		 4687static int patch_stac9205(struct hda_codec *codec)
4688{
4689 struct sigmatel_spec *spec;
8259980e 4690 int err;
f3302a59
MP		 4691
4692 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4693 if (spec == NULL)
4694 return -ENOMEM;
4695
4696 codec->spec = spec;
a4eed138 4697 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 4698 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 4699 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
4700 stac9205_models,
4701 stac9205_cfg_tbl);
9e507abd 4702 again:
11b44bbd
RF		 4703 if (spec->board_config < 0) {
4704 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
4705 err = stac92xx_save_bios_config_regs(codec);
4706 if (err < 0) {
4707 stac92xx_free(codec);
4708 return err;
4709 }
4710 spec->pin_configs = spec->bios_pin_configs;
4711 } else {
f3302a59
MP		 4712 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
4713 stac92xx_set_config_regs(codec);
4714 }
4715
1cd2224c 4716 spec->digbeep_nid = 0x23;
f3302a59 4717 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 4718 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 4719 spec->mux_nids = stac9205_mux_nids;
2549413e 4720 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 4721 spec->smux_nids = stac9205_smux_nids;
4722 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 4723 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 4724 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 4725 spec->dmux_nids = stac9205_dmux_nids;
1697055e 4726 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 4727 spec->num_pwrs = 0;
f3302a59
MP		 4728
4729 spec->init = stac9205_core_init;
4730 spec->mixer = stac9205_mixer;
4731
e1f0d669
MR		 4732 spec->aloopback_mask = 0x40;
4733 spec->aloopback_shift = 0;
f3302a59 4734 spec->multiout.dac_nids = spec->dac_nids;
87d48363 4735
ae0a8ed8 4736 switch (spec->board_config){
ae0a8ed8 4737 case STAC_9205_DELL_M43:
87d48363
MR		 4738 /* Enable SPDIF in/out */
4739 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4740 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4741
4fe5195c
MR		 4742 /* Enable unsol response for GPIO4/Dock HP connection */
4743 snd_hda_codec_write(codec, codec->afg, 0,
4744 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4745 snd_hda_codec_write_cache(codec, codec->afg, 0,
4746 AC_VERB_SET_UNSOLICITED_ENABLE,
4747 (AC_USRSP_EN | STAC_HP_EVENT));
4748
4749 spec->gpio_dir = 0x0b;
0fc9dec4 4750 spec->eapd_mask = 0x01;
4fe5195c
MR		 4751 spec->gpio_mask = 0x1b;
4752 spec->gpio_mute = 0x10;
e2e7d624 4753 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4754 * GPIO3 Low = DRM
87d48363 4755 */
4fe5195c 4756 spec->gpio_data = 0x01;
ae0a8ed8 4757 break;
b2c4f4d7
MR		 4758 case STAC_9205_REF:
4759 /* SPDIF-In enabled */
4760 break;
ae0a8ed8
TD		 4761 default:
4762 /* GPIO0 High = EAPD */
0fc9dec4 4763 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4764 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4765 break;
4766 }
33382403 4767
f3302a59 4768 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 4769 if (!err) {
4770 if (spec->board_config < 0) {
4771 printk(KERN_WARNING "hda_codec: No auto-config is "
4772 "available, default to model=ref\n");
4773 spec->board_config = STAC_9205_REF;
4774 goto again;
4775 }
4776 err = -EINVAL;
4777 }
f3302a59
MP		 4778 if (err < 0) {
4779 stac92xx_free(codec);
4780 return err;
4781 }
4782
4783 codec->patch_ops = stac92xx_patch_ops;
4784
4785 return 0;
4786}
4787
db064e50 4788/*
6d859065 4789 * STAC9872 hack
db064e50
TI		 4790 */
4791
99ccc560 4792/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 4793static hda_nid_t vaio_dacs[] = { 0x2 };
4794#define VAIO_HP_DAC 0x5
4795static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
4796static hda_nid_t vaio_mux_nids[] = { 0x15 };
4797
4798static struct hda_input_mux vaio_mux = {
a3a2f429 4799 .num_items = 3,
db064e50 4800 .items = {
d773781c 4801 /* { "HP", 0x0 }, */
1624cb9a
TI		 4802 { "Mic Jack", 0x1 },
4803 { "Internal Mic", 0x2 },
db064e50
TI		 4804 { "PCM", 0x3 },
4805 }
4806};
4807
4808static struct hda_verb vaio_init[] = {
4809 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 4810 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 4811 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4812 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4813 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4814 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4815 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 4816 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4817 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4818 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4819 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4820 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4821 {}
4822};
4823
6d859065
GM		 4824static struct hda_verb vaio_ar_init[] = {
4825 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
4826 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4827 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4828 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4829/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
4830 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4831 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4832 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4833 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4834/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
4835 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4836 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4837 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4838 {}
4839};
4840
db064e50 4841/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4842static struct hda_bind_ctls vaio_bind_master_vol = {
4843 .ops = &snd_hda_bind_vol,
4844 .values = {
4845 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4846 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4847 0
4848 },
4849};
db064e50
TI		 4850
4851/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4852static struct hda_bind_ctls vaio_bind_master_sw = {
4853 .ops = &snd_hda_bind_sw,
4854 .values = {
4855 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4856 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4857 0,
4858 },
4859};
db064e50
TI		 4860
4861static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 4862 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4863 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 4864 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4865 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4866 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4867 {
4868 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4869 .name = "Capture Source",
4870 .count = 1,
4871 .info = stac92xx_mux_enum_info,
4872 .get = stac92xx_mux_enum_get,
4873 .put = stac92xx_mux_enum_put,
4874 },
4875 {}
4876};
4877
6d859065 4878static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 4879 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4880 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 4881 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4882 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4883 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4884 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
4885 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
4886 {
4887 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4888 .name = "Capture Source",
4889 .count = 1,
4890 .info = stac92xx_mux_enum_info,
4891 .get = stac92xx_mux_enum_get,
4892 .put = stac92xx_mux_enum_put,
4893 },
4894 {}
4895};
4896
4897static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 4898 .build_controls = stac92xx_build_controls,
4899 .build_pcms = stac92xx_build_pcms,
4900 .init = stac92xx_init,
4901 .free = stac92xx_free,
cb53c626 4902#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 4903 .resume = stac92xx_resume,
4904#endif
4905};
4906
72e7b0dd
TI		 4907static int stac9872_vaio_init(struct hda_codec *codec)
4908{
4909 int err;
4910
4911 err = stac92xx_init(codec);
4912 if (err < 0)
4913 return err;
4914 if (codec->patch_ops.unsol_event)
4915 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4916 return 0;
4917}
4918
4919static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4920{
40c1d308 4921 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4922 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4923 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4924 } else {
4925 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4926 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4927 }
4928}
4929
4930static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4931{
4932 switch (res >> 26) {
4933 case STAC_HP_EVENT:
4934 stac9872_vaio_hp_detect(codec, res);
4935 break;
4936 }
4937}
4938
4939static struct hda_codec_ops stac9872_vaio_patch_ops = {
4940 .build_controls = stac92xx_build_controls,
4941 .build_pcms = stac92xx_build_pcms,
4942 .init = stac9872_vaio_init,
4943 .free = stac92xx_free,
4944 .unsol_event = stac9872_vaio_unsol_event,
4945#ifdef CONFIG_PM
4946 .resume = stac92xx_resume,
4947#endif
4948};
4949
6d859065
GM		 4950enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
4951 CXD9872RD_VAIO,
4952 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
4953 STAC9872AK_VAIO,
4954 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
4955 STAC9872K_VAIO,
4956 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 4957 CXD9872AKD_VAIO,
4958 STAC_9872_MODELS,
4959};
4960
4961static const char *stac9872_models[STAC_9872_MODELS] = {
4962 [CXD9872RD_VAIO] = "vaio",
4963 [CXD9872AKD_VAIO] = "vaio-ar",
4964};
4965
4966static struct snd_pci_quirk stac9872_cfg_tbl[] = {
4967 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
4968 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
4969 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 4970 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 4971 {}
4972};
4973
6d859065 4974static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4975{
4976 struct sigmatel_spec *spec;
4977 int board_config;
4978
f5fcc13c
TI		 4979 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
4980 stac9872_models,
4981 stac9872_cfg_tbl);
db064e50
TI		 4982 if (board_config < 0)
4983 /* unknown config, let generic-parser do its job... */
4984 return snd_hda_parse_generic_codec(codec);
4985
4986 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4987 if (spec == NULL)
4988 return -ENOMEM;
4989
4990 codec->spec = spec;
4991 switch (board_config) {
6d859065
GM		 4992 case CXD9872RD_VAIO:
4993 case STAC9872AK_VAIO:
4994 case STAC9872K_VAIO:
db064e50
TI		 4995 spec->mixer = vaio_mixer;
4996 spec->init = vaio_init;
4997 spec->multiout.max_channels = 2;
4998 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4999 spec->multiout.dac_nids = vaio_dacs;
5000 spec->multiout.hp_nid = VAIO_HP_DAC;
5001 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5002 spec->adc_nids = vaio_adcs;
a64135a2 5003 spec->num_pwrs = 0;
db064e50
TI		 5004 spec->input_mux = &vaio_mux;
5005 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5006 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5007 break;
6d859065
GM		 5008
5009 case CXD9872AKD_VAIO:
5010 spec->mixer = vaio_ar_mixer;
5011 spec->init = vaio_ar_init;
5012 spec->multiout.max_channels = 2;
5013 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5014 spec->multiout.dac_nids = vaio_dacs;
5015 spec->multiout.hp_nid = VAIO_HP_DAC;
5016 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5017 spec->num_pwrs = 0;
6d859065
GM		 5018 spec->adc_nids = vaio_adcs;
5019 spec->input_mux = &vaio_mux;
5020 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5021 codec->patch_ops = stac9872_patch_ops;
6d859065 5022 break;
db064e50
TI		 5023 }
5024
db064e50
TI		 5025 return 0;
5026}
5027
5028
2f2f4251
M		 5029/*
5030 * patch entries
5031 */
5032struct hda_codec_preset snd_hda_preset_sigmatel[] = {
5033 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5034 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5035 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5036 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5037 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5038 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5039 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5040 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5041 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5042 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5043 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5044 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5045 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5046 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5047 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5048 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5049 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5050 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5051 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5052 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5053 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5054 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5055 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5056 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5057 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5058 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5059 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5060 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5061 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5062 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5063 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5064 /* The following does not take into account .id=0x83847661 when subsys =
5065 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5066 * currently not fully supported.
5067 */
5068 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5069 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5070 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5071 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5072 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5073 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5074 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5075 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5076 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5077 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5078 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5079 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5080 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5081 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5082 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5083 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5084 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5085 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5086 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5087 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5088 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5089 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5090 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5091 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5092 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5093 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5094 {} /* terminator */
5095};
Linux 6.x block layer and io_uring tree(s)