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ALSA: hda - Allocate name string of each codec
[linux-block.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
a64135a2
MR		 38#define STAC_PWR_EVENT 0x20
39#define STAC_HP_EVENT 0x30
72474be6 40#define STAC_VREF_EVENT 0x40
4e55096e 41
f5fcc13c
TI		 42enum {
43 STAC_REF,
bf277785 44 STAC_9200_OQO,
dfe495d0
TI		 45 STAC_9200_DELL_D21,
46 STAC_9200_DELL_D22,
47 STAC_9200_DELL_D23,
48 STAC_9200_DELL_M21,
49 STAC_9200_DELL_M22,
50 STAC_9200_DELL_M23,
51 STAC_9200_DELL_M24,
52 STAC_9200_DELL_M25,
53 STAC_9200_DELL_M26,
54 STAC_9200_DELL_M27,
1194b5b7 55 STAC_9200_GATEWAY,
117f257d 56 STAC_9200_PANASONIC,
f5fcc13c
TI		 57 STAC_9200_MODELS
58};
59
60enum {
61 STAC_9205_REF,
dfe495d0 62 STAC_9205_DELL_M42,
ae0a8ed8
TD		 63 STAC_9205_DELL_M43,
64 STAC_9205_DELL_M44,
f5fcc13c
TI		 65 STAC_9205_MODELS
66};
67
e1f0d669
MR		 68enum {
69 STAC_92HD73XX_REF,
a7662640 70 STAC_DELL_M6,
e1f0d669
MR		 71 STAC_92HD73XX_MODELS
72};
73
d0513fc6
MR		 74enum {
75 STAC_92HD83XXX_REF,
76 STAC_92HD83XXX_MODELS
77};
78
e035b841
MR		 79enum {
80 STAC_92HD71BXX_REF,
a7662640
MR		 81 STAC_DELL_M4_1,
82 STAC_DELL_M4_2,
6a14f585 83 STAC_HP_M4,
e035b841
MR		 84 STAC_92HD71BXX_MODELS
85};
86
8e21c34c
TD		 87enum {
88 STAC_925x_REF,
89 STAC_M2_2,
90 STAC_MA6,
2c11f955 91 STAC_PA6,
8e21c34c
TD		 92 STAC_925x_MODELS
93};
94
f5fcc13c
TI		 95enum {
96 STAC_D945_REF,
97 STAC_D945GTP3,
98 STAC_D945GTP5,
5d5d3bc3
IZ		 99 STAC_INTEL_MAC_V1,
100 STAC_INTEL_MAC_V2,
101 STAC_INTEL_MAC_V3,
102 STAC_INTEL_MAC_V4,
103 STAC_INTEL_MAC_V5,
536319af
NB		 104 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
105 * is given, one of the above models will be
106 * chosen according to the subsystem id. */
dfe495d0 107 /* for backward compatibility */
f5fcc13c 108 STAC_MACMINI,
3fc24d85 109 STAC_MACBOOK,
6f0778d8
NB		 110 STAC_MACBOOK_PRO_V1,
111 STAC_MACBOOK_PRO_V2,
f16928fb 112 STAC_IMAC_INTEL,
0dae0f83 113 STAC_IMAC_INTEL_20,
8c650087 114 STAC_ECS_202,
dfe495d0
TI		 115 STAC_922X_DELL_D81,
116 STAC_922X_DELL_D82,
117 STAC_922X_DELL_M81,
118 STAC_922X_DELL_M82,
f5fcc13c
TI		 119 STAC_922X_MODELS
120};
121
122enum {
123 STAC_D965_REF,
124 STAC_D965_3ST,
125 STAC_D965_5ST,
4ff076e5 126 STAC_DELL_3ST,
8e9068b1 127 STAC_DELL_BIOS,
f5fcc13c
TI		 128 STAC_927X_MODELS
129};
403d1944 130
2f2f4251 131struct sigmatel_spec {
c8b6bf9b 132 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 133 unsigned int num_mixers;
134
403d1944 135 int board_config;
c7d4b2fa 136 unsigned int surr_switch: 1;
403d1944
MP		 137 unsigned int line_switch: 1;
138 unsigned int mic_switch: 1;
3cc08dc6 139 unsigned int alt_switch: 1;
82bc955f 140 unsigned int hp_detect: 1;
00ef50c2 141 unsigned int spdif_mute: 1;
c7d4b2fa 142
4fe5195c 143 /* gpio lines */
0fc9dec4 144 unsigned int eapd_mask;
4fe5195c
MR		 145 unsigned int gpio_mask;
146 unsigned int gpio_dir;
147 unsigned int gpio_data;
148 unsigned int gpio_mute;
149
8daaaa97
MR		 150 /* stream */
151 unsigned int stream_delay;
152
4fe5195c 153 /* analog loopback */
e1f0d669
MR		 154 unsigned char aloopback_mask;
155 unsigned char aloopback_shift;
8259980e 156
a64135a2
MR		 157 /* power management */
158 unsigned int num_pwrs;
d0513fc6 159 unsigned int *pwr_mapping;
a64135a2 160 hda_nid_t *pwr_nids;
b76c850f 161 hda_nid_t *dac_list;
a64135a2 162
2f2f4251 163 /* playback */
b22b4821 164 struct hda_input_mux *mono_mux;
89385035 165 struct hda_input_mux *amp_mux;
b22b4821 166 unsigned int cur_mmux;
2f2f4251 167 struct hda_multi_out multiout;
3cc08dc6 168 hda_nid_t dac_nids[5];
2f2f4251
M		 169
170 /* capture */
171 hda_nid_t *adc_nids;
2f2f4251 172 unsigned int num_adcs;
dabbed6f
M		 173 hda_nid_t *mux_nids;
174 unsigned int num_muxes;
8b65727b
MP		 175 hda_nid_t *dmic_nids;
176 unsigned int num_dmics;
e1f0d669 177 hda_nid_t *dmux_nids;
1697055e 178 unsigned int num_dmuxes;
d9737751
MR		 179 hda_nid_t *smux_nids;
180 unsigned int num_smuxes;
65973632 181 const char **spdif_labels;
d9737751 182
dabbed6f 183 hda_nid_t dig_in_nid;
b22b4821 184 hda_nid_t mono_nid;
1cd2224c
MR		 185 hda_nid_t anabeep_nid;
186 hda_nid_t digbeep_nid;
2f2f4251 187
2f2f4251
M		 188 /* pin widgets */
189 hda_nid_t *pin_nids;
190 unsigned int num_pins;
2f2f4251 191 unsigned int *pin_configs;
11b44bbd 192 unsigned int *bios_pin_configs;
2f2f4251
M		 193
194 /* codec specific stuff */
195 struct hda_verb *init;
c8b6bf9b 196 struct snd_kcontrol_new *mixer;
2f2f4251
M		 197
198 /* capture source */
8b65727b 199 struct hda_input_mux *dinput_mux;
e1f0d669 200 unsigned int cur_dmux[2];
c7d4b2fa 201 struct hda_input_mux *input_mux;
3cc08dc6 202 unsigned int cur_mux[3];
d9737751
MR		 203 struct hda_input_mux *sinput_mux;
204 unsigned int cur_smux[2];
2a9c7816
MR		 205 unsigned int cur_amux;
206 hda_nid_t *amp_nids;
207 unsigned int num_amps;
8daaaa97 208 unsigned int powerdown_adcs;
2f2f4251 209
403d1944
MP		 210 /* i/o switches */
211 unsigned int io_switch[2];
0fb87bb4 212 unsigned int clfe_swap;
7c2ba97b 213 unsigned int hp_switch;
5f10c4a9 214 unsigned int aloopback;
2f2f4251 215
c7d4b2fa
M		 216 struct hda_pcm pcm_rec[2]; /* PCM information */
217
218 /* dynamic controls and input_mux */
219 struct auto_pin_cfg autocfg;
603c4019 220 struct snd_array kctls;
8b65727b 221 struct hda_input_mux private_dimux;
c7d4b2fa 222 struct hda_input_mux private_imux;
d9737751 223 struct hda_input_mux private_smux;
89385035 224 struct hda_input_mux private_amp_mux;
b22b4821 225 struct hda_input_mux private_mono_mux;
2f2f4251
M		 226};
227
228static hda_nid_t stac9200_adc_nids[1] = {
229 0x03,
230};
231
232static hda_nid_t stac9200_mux_nids[1] = {
233 0x0c,
234};
235
236static hda_nid_t stac9200_dac_nids[1] = {
237 0x02,
238};
239
a64135a2
MR		 240static hda_nid_t stac92hd73xx_pwr_nids[8] = {
241 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
242 0x0f, 0x10, 0x11
243};
244
0ffa9807
MR		 245static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
246 0x26, 0,
247};
248
e1f0d669
MR		 249static hda_nid_t stac92hd73xx_adc_nids[2] = {
250 0x1a, 0x1b
251};
252
2a9c7816
MR		 253#define DELL_M6_AMP 2
254static hda_nid_t stac92hd73xx_amp_nids[3] = {
255 0x0b, 0x0c, 0x0e
89385035
MR		 256};
257
e1f0d669
MR		 258#define STAC92HD73XX_NUM_DMICS 2
259static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
260 0x13, 0x14, 0
261};
262
263#define STAC92HD73_DAC_COUNT 5
264static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
265 0x15, 0x16, 0x17, 0x18, 0x19,
266};
267
268static hda_nid_t stac92hd73xx_mux_nids[4] = {
269 0x28, 0x29, 0x2a, 0x2b,
270};
271
272static hda_nid_t stac92hd73xx_dmux_nids[2] = {
273 0x20, 0x21,
274};
275
d9737751
MR		 276static hda_nid_t stac92hd73xx_smux_nids[2] = {
277 0x22, 0x23,
278};
279
d0513fc6
MR		 280#define STAC92HD83XXX_NUM_DMICS 2
281static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
282 0x11, 0x12, 0
283};
284
285#define STAC92HD81_DAC_COUNT 2
286#define STAC92HD83_DAC_COUNT 3
287static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
288 0x13, 0x14, 0x22,
289};
290
291static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
292 0x17, 0x18,
293};
294
295static hda_nid_t stac92hd83xxx_adc_nids[2] = {
296 0x15, 0x16,
297};
298
299static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
300 0xa, 0xb, 0xd, 0xe,
301};
302
0ffa9807
MR		 303static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
304 0x1e, 0,
305};
306
d0513fc6
MR		 307static unsigned int stac92hd83xxx_pwr_mapping[4] = {
308 0x03, 0x0c, 0x10, 0x40,
309};
310
a64135a2
MR		 311static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
312 0x0a, 0x0d, 0x0f
313};
314
e035b841
MR		 315static hda_nid_t stac92hd71bxx_adc_nids[2] = {
316 0x12, 0x13,
317};
318
319static hda_nid_t stac92hd71bxx_mux_nids[2] = {
320 0x1a, 0x1b
321};
322
4b33c767
MR		 323static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
324 0x1c, 0x1d,
e1f0d669
MR		 325};
326
d9737751
MR		 327static hda_nid_t stac92hd71bxx_smux_nids[2] = {
328 0x24, 0x25,
329};
330
aea7bb0a 331static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 332 0x10, /*0x11, */
333};
334
335#define STAC92HD71BXX_NUM_DMICS 2
336static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
337 0x18, 0x19, 0
338};
339
0ffa9807
MR		 340static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
341 0x22, 0
342};
343
8e21c34c
TD		 344static hda_nid_t stac925x_adc_nids[1] = {
345 0x03,
346};
347
348static hda_nid_t stac925x_mux_nids[1] = {
349 0x0f,
350};
351
352static hda_nid_t stac925x_dac_nids[1] = {
353 0x02,
354};
355
f6e9852a
TI		 356#define STAC925X_NUM_DMICS 1
357static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
358 0x15, 0
2c11f955
TD		 359};
360
1697055e
TI		 361static hda_nid_t stac925x_dmux_nids[1] = {
362 0x14,
363};
364
2f2f4251
M		 365static hda_nid_t stac922x_adc_nids[2] = {
366 0x06, 0x07,
367};
368
369static hda_nid_t stac922x_mux_nids[2] = {
370 0x12, 0x13,
371};
372
3cc08dc6
MP		 373static hda_nid_t stac927x_adc_nids[3] = {
374 0x07, 0x08, 0x09
375};
376
377static hda_nid_t stac927x_mux_nids[3] = {
378 0x15, 0x16, 0x17
379};
380
d9737751
MR		 381static hda_nid_t stac927x_smux_nids[1] = {
382 0x21,
383};
384
b76c850f
MR		 385static hda_nid_t stac927x_dac_nids[6] = {
386 0x02, 0x03, 0x04, 0x05, 0x06, 0
387};
388
e1f0d669
MR		 389static hda_nid_t stac927x_dmux_nids[1] = {
390 0x1b,
391};
392
7f16859a
MR		 393#define STAC927X_NUM_DMICS 2
394static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
395 0x13, 0x14, 0
396};
397
65973632
MR		 398static const char *stac927x_spdif_labels[5] = {
399 "Digital Playback", "ADAT", "Analog Mux 1",
400 "Analog Mux 2", "Analog Mux 3"
401};
402
f3302a59
MP		 403static hda_nid_t stac9205_adc_nids[2] = {
404 0x12, 0x13
405};
406
407static hda_nid_t stac9205_mux_nids[2] = {
408 0x19, 0x1a
409};
410
e1f0d669 411static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 412 0x1d,
e1f0d669
MR		 413};
414
d9737751
MR		 415static hda_nid_t stac9205_smux_nids[1] = {
416 0x21,
417};
418
f6e9852a
TI		 419#define STAC9205_NUM_DMICS 2
420static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
421 0x17, 0x18, 0
8b65727b
MP		 422};
423
c7d4b2fa 424static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 425 0x08, 0x09, 0x0d, 0x0e,
426 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 427};
428
8e21c34c
TD		 429static hda_nid_t stac925x_pin_nids[8] = {
430 0x07, 0x08, 0x0a, 0x0b,
431 0x0c, 0x0d, 0x10, 0x11,
432};
433
2f2f4251
M		 434static hda_nid_t stac922x_pin_nids[10] = {
435 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
436 0x0f, 0x10, 0x11, 0x15, 0x1b,
437};
438
a7662640 439static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 440 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
441 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 442 0x14, 0x22, 0x23
e1f0d669
MR		 443};
444
d0513fc6
MR		 445static hda_nid_t stac92hd83xxx_pin_nids[14] = {
446 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
447 0x0f, 0x10, 0x11, 0x12, 0x13,
448 0x1d, 0x1e, 0x1f, 0x20
449};
0ffa9807 450static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 451 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
452 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 453 0x1f,
e035b841
MR		 454};
455
3cc08dc6
MP		 456static hda_nid_t stac927x_pin_nids[14] = {
457 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
458 0x0f, 0x10, 0x11, 0x12, 0x13,
459 0x14, 0x21, 0x22, 0x23,
460};
461
f3302a59
MP		 462static hda_nid_t stac9205_pin_nids[12] = {
463 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
464 0x0f, 0x14, 0x16, 0x17, 0x18,
465 0x21, 0x22,
f3302a59
MP		 466};
467
89385035
MR		 468#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
469
470static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
471 struct snd_ctl_elem_value *ucontrol)
472{
473 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
474 struct sigmatel_spec *spec = codec->spec;
475 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
476
477 kcontrol->private_value ^= get_amp_nid(kcontrol);
478 kcontrol->private_value |= nid;
479
480 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
481}
482
483static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
484 struct snd_ctl_elem_value *ucontrol)
485{
486 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
487 struct sigmatel_spec *spec = codec->spec;
488 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
489
490 kcontrol->private_value ^= get_amp_nid(kcontrol);
491 kcontrol->private_value |= nid;
492
493 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
494}
495
8b65727b
MP		 496static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
497 struct snd_ctl_elem_info *uinfo)
498{
499 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
500 struct sigmatel_spec *spec = codec->spec;
501 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
502}
503
504static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
505 struct snd_ctl_elem_value *ucontrol)
506{
507 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
508 struct sigmatel_spec *spec = codec->spec;
e1f0d669 509 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 510
e1f0d669 511 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 512 return 0;
513}
514
515static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
516 struct snd_ctl_elem_value *ucontrol)
517{
518 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
519 struct sigmatel_spec *spec = codec->spec;
e1f0d669 520 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 521
522 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 523 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 524}
525
d9737751
MR		 526static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
527 struct snd_ctl_elem_info *uinfo)
528{
529 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
530 struct sigmatel_spec *spec = codec->spec;
531 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
532}
533
534static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
535 struct snd_ctl_elem_value *ucontrol)
536{
537 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
538 struct sigmatel_spec *spec = codec->spec;
539 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
540
541 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
542 return 0;
543}
544
545static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
546 struct snd_ctl_elem_value *ucontrol)
547{
548 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
549 struct sigmatel_spec *spec = codec->spec;
00ef50c2 550 struct hda_input_mux *smux = &spec->private_smux;
d9737751 551 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 552 int err, val;
553 hda_nid_t nid;
d9737751 554
00ef50c2 555 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 556 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 557 if (err < 0)
558 return err;
559
560 if (spec->spdif_mute) {
561 if (smux_idx == 0)
562 nid = spec->multiout.dig_out_nid;
563 else
564 nid = codec->slave_dig_outs[smux_idx - 1];
565 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
566 val = AMP_OUT_MUTE;
567 if (smux_idx == 0)
568 nid = spec->multiout.dig_out_nid;
569 else
570 nid = codec->slave_dig_outs[smux_idx - 1];
571 /* un/mute SPDIF out */
572 snd_hda_codec_write_cache(codec, nid, 0,
573 AC_VERB_SET_AMP_GAIN_MUTE, val);
574 }
575 return 0;
d9737751
MR		 576}
577
c8b6bf9b 578static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 579{
580 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
581 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 582 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 583}
584
c8b6bf9b 585static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 586{
587 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
588 struct sigmatel_spec *spec = codec->spec;
589 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
590
591 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
592 return 0;
593}
594
c8b6bf9b 595static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 596{
597 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
598 struct sigmatel_spec *spec = codec->spec;
599 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
600
c7d4b2fa 601 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 602 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
603}
604
b22b4821
MR		 605static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
606 struct snd_ctl_elem_info *uinfo)
607{
608 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
609 struct sigmatel_spec *spec = codec->spec;
610 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
611}
612
613static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
614 struct snd_ctl_elem_value *ucontrol)
615{
616 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
617 struct sigmatel_spec *spec = codec->spec;
618
619 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
620 return 0;
621}
622
623static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
624 struct snd_ctl_elem_value *ucontrol)
625{
626 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
627 struct sigmatel_spec *spec = codec->spec;
628
629 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
630 spec->mono_nid, &spec->cur_mmux);
631}
632
89385035
MR		 633static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
634 struct snd_ctl_elem_info *uinfo)
635{
636 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
637 struct sigmatel_spec *spec = codec->spec;
638 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
639}
640
641static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
642 struct snd_ctl_elem_value *ucontrol)
643{
644 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
645 struct sigmatel_spec *spec = codec->spec;
646
647 ucontrol->value.enumerated.item[0] = spec->cur_amux;
648 return 0;
649}
650
651static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
652 struct snd_ctl_elem_value *ucontrol)
653{
654 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
655 struct sigmatel_spec *spec = codec->spec;
656 struct snd_kcontrol *ctl =
657 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
658 if (!ctl)
659 return -EINVAL;
660
661 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
662 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
663
664 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
665 0, &spec->cur_amux);
666}
667
5f10c4a9
ML		 668#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
669
670static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
671 struct snd_ctl_elem_value *ucontrol)
672{
673 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 674 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 675 struct sigmatel_spec *spec = codec->spec;
676
e1f0d669
MR		 677 ucontrol->value.integer.value[0] = !!(spec->aloopback &
678 (spec->aloopback_mask << idx));
5f10c4a9
ML		 679 return 0;
680}
681
682static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
683 struct snd_ctl_elem_value *ucontrol)
684{
685 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
686 struct sigmatel_spec *spec = codec->spec;
e1f0d669 687 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 688 unsigned int dac_mode;
e1f0d669 689 unsigned int val, idx_val;
5f10c4a9 690
e1f0d669
MR		 691 idx_val = spec->aloopback_mask << idx;
692 if (ucontrol->value.integer.value[0])
693 val = spec->aloopback | idx_val;
694 else
695 val = spec->aloopback & ~idx_val;
68ea7b2f 696 if (spec->aloopback == val)
5f10c4a9
ML		 697 return 0;
698
68ea7b2f 699 spec->aloopback = val;
5f10c4a9 700
e1f0d669
MR		 701 /* Only return the bits defined by the shift value of the
702 * first two bytes of the mask
703 */
5f10c4a9 704 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 705 kcontrol->private_value & 0xFFFF, 0x0);
706 dac_mode >>= spec->aloopback_shift;
5f10c4a9 707
e1f0d669 708 if (spec->aloopback & idx_val) {
5f10c4a9 709 snd_hda_power_up(codec);
e1f0d669 710 dac_mode |= idx_val;
5f10c4a9
ML		 711 } else {
712 snd_hda_power_down(codec);
e1f0d669 713 dac_mode &= ~idx_val;
5f10c4a9
ML		 714 }
715
716 snd_hda_codec_write_cache(codec, codec->afg, 0,
717 kcontrol->private_value >> 16, dac_mode);
718
719 return 1;
720}
721
c7d4b2fa 722static struct hda_verb stac9200_core_init[] = {
2f2f4251 723 /* set dac0mux for dac converter */
c7d4b2fa 724 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 725 {}
726};
727
1194b5b7
TI		 728static struct hda_verb stac9200_eapd_init[] = {
729 /* set dac0mux for dac converter */
730 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
731 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
732 {}
733};
734
e1f0d669
MR		 735static struct hda_verb stac92hd73xx_6ch_core_init[] = {
736 /* set master volume and direct control */
737 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
738 /* setup audio connections */
739 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
740 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
741 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
742 /* setup adcs to point to mixer */
743 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
744 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 745 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
746 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
747 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
748 /* setup import muxs */
749 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
750 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
751 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
752 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
753 {}
754};
755
d654a660
MR		 756static struct hda_verb dell_eq_core_init[] = {
757 /* set master volume to max value without distortion
758 * and direct control */
759 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
760 /* setup audio connections */
761 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 762 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
763 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 764 /* setup adcs to point to mixer */
765 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
766 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
767 /* setup import muxs */
768 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
769 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
770 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
771 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
772 {}
773};
774
52fe0f9d 775static struct hda_verb dell_m6_core_init[] = {
20f5f95d
MR		 776 /* set master volume to max value without distortion
777 * and direct control */
778 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
52fe0f9d 779 /* setup audio connections */
7747ecce
MR		 780 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
781 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 782 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
783 /* setup adcs to point to mixer */
784 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
785 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
786 /* setup import muxs */
787 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
788 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
789 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
790 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
791 {}
792};
793
e1f0d669
MR		 794static struct hda_verb stac92hd73xx_8ch_core_init[] = {
795 /* set master volume and direct control */
796 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
797 /* setup audio connections */
798 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
799 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
800 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
801 /* connect hp ports to dac3 */
802 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
803 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
804 /* setup adcs to point to mixer */
805 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
806 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 807 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
808 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
809 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
810 /* setup import muxs */
811 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
812 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
813 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
814 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
815 {}
816};
817
818static struct hda_verb stac92hd73xx_10ch_core_init[] = {
819 /* set master volume and direct control */
820 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
821 /* setup audio connections */
822 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
823 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
824 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
825 /* dac3 is connected to import3 mux */
826 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
827 /* connect hp ports to dac4 */
828 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
829 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
830 /* setup adcs to point to mixer */
831 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
832 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 833 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
834 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
835 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
836 /* setup import muxs */
837 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
838 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
839 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
840 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
841 {}
842};
843
d0513fc6
MR		 844static struct hda_verb stac92hd83xxx_core_init[] = {
845 /* start of config #1 */
846 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
847
848 /* start of config #2 */
849 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
850 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
851 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
852
853 /* power state controls amps */
854 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
855};
856
e035b841 857static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 858 /* set master volume and direct control */
859 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
860 /* connect headphone jack to dac1 */
861 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
541eee87
MR		 862 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
863 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
864 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
865 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 866};
867
4b33c767 868#define HD_DISABLE_PORTF 2
541eee87 869static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 870 /* start of config #1 */
871
872 /* connect port 0f to audio mixer */
873 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 874 /* unmute right and left channels for node 0x0f */
875 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
876 /* start of config #2 */
877
e035b841
MR		 878 /* set master volume and direct control */
879 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
880 /* connect headphone jack to dac1 */
881 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 882 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 883 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
884 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 885 {}
886};
887
8e21c34c
TD		 888static struct hda_verb stac925x_core_init[] = {
889 /* set dac0mux for dac converter */
890 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
891 {}
892};
893
c7d4b2fa 894static struct hda_verb stac922x_core_init[] = {
2f2f4251 895 /* set master volume and direct control */
c7d4b2fa 896 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 897 {}
898};
899
93ed1503 900static struct hda_verb d965_core_init[] = {
19039bd0 901 /* set master volume and direct control */
93ed1503 902 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 903 /* unmute node 0x1b */
904 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
905 /* select node 0x03 as DAC */
906 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
907 {}
908};
909
3cc08dc6
MP		 910static struct hda_verb stac927x_core_init[] = {
911 /* set master volume and direct control */
912 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 913 /* enable analog pc beep path */
914 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 915 {}
916};
917
f3302a59
MP		 918static struct hda_verb stac9205_core_init[] = {
919 /* set master volume and direct control */
920 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 921 /* enable analog pc beep path */
922 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 923 {}
924};
925
b22b4821
MR		 926#define STAC_MONO_MUX \
927 { \
928 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
929 .name = "Mono Mux", \
930 .count = 1, \
931 .info = stac92xx_mono_mux_enum_info, \
932 .get = stac92xx_mono_mux_enum_get, \
933 .put = stac92xx_mono_mux_enum_put, \
934 }
935
89385035
MR		 936#define STAC_AMP_MUX \
937 { \
938 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
939 .name = "Amp Selector Capture Switch", \
940 .count = 1, \
941 .info = stac92xx_amp_mux_enum_info, \
942 .get = stac92xx_amp_mux_enum_get, \
943 .put = stac92xx_amp_mux_enum_put, \
944 }
945
946#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
947 { \
948 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
949 .name = xname, \
950 .index = 0, \
951 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
952 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
953 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
954 .info = stac92xx_amp_volume_info, \
955 .get = stac92xx_amp_volume_get, \
956 .put = stac92xx_amp_volume_put, \
957 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
958 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
959 }
960
9e05b7a3 961#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 962 { \
963 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
964 .name = "Input Source", \
9e05b7a3 965 .count = cnt, \
ca7c5a8b
ML		 966 .info = stac92xx_mux_enum_info, \
967 .get = stac92xx_mux_enum_get, \
968 .put = stac92xx_mux_enum_put, \
969 }
970
e1f0d669 971#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 972 { \
973 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
974 .name = "Analog Loopback", \
e1f0d669 975 .count = cnt, \
5f10c4a9
ML		 976 .info = stac92xx_aloopback_info, \
977 .get = stac92xx_aloopback_get, \
978 .put = stac92xx_aloopback_put, \
979 .private_value = verb_read | (verb_write << 16), \
980 }
981
c8b6bf9b 982static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 983 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
984 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 985 STAC_INPUT_SOURCE(1),
2f2f4251
M		 986 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
987 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 988 { } /* end */
989};
990
2a9c7816 991#define DELL_M6_MIXER 6
e1f0d669 992static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 993 /* start of config #1 */
e1f0d669
MR		 994 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
995 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
996
e1f0d669
MR		 997 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
998 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
999
2a9c7816
MR		 1000 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1001 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1002
1003 /* start of config #2 */
1004 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1005 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1006
e1f0d669
MR		 1007 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1008 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1009
2a9c7816
MR		 1010 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1011
1012 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1013 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1014
1015 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1016 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1017
e1f0d669
MR		 1018 { } /* end */
1019};
1020
1021static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1022 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1023
e1f0d669
MR		 1024 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1025 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1026
1027 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1028 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1029
1030 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1031 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1032
1033 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1034 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1035
1036 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1037 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1038
1039 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1040 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1041
1042 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1043 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1044 { } /* end */
1045};
1046
1047static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1048 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1049
e1f0d669
MR		 1050 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1051 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1052
1053 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1054 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1055
1056 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1057 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1058
1059 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1060 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1061
1062 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1063 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1064
1065 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1066 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1067
1068 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1069 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1070 { } /* end */
1071};
1072
d0513fc6
MR		 1073
1074static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1075 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1076 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1077
1078 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1079 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1080
1081 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1082 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1083
1084 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1085 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1086
1087 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1088 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1089
1090 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1091 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1092
1093 /*
1094 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1095 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1096 */
1097 { } /* end */
1098};
1099
541eee87 1100static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1101 STAC_INPUT_SOURCE(2),
4b33c767 1102 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1103
9b35947f
MR		 1104 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1105 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1106
1107 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1108 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1109 /* analog pc-beep replaced with digital beep support */
1110 /*
f7c5dda2
MR		 1111 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1112 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1113 */
f7c5dda2 1114
687cb98e
MR		 1115 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1116 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1117
687cb98e
MR		 1118 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1119 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1120
1121 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1122 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1123
1124 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1125 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1126 { } /* end */
1127};
1128
541eee87 1129static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1130 STAC_INPUT_SOURCE(2),
1131 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1132
541eee87
MR		 1133 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1134 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1135
1136 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1137 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1138 { } /* end */
1139};
1140
8e21c34c 1141static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1142 STAC_INPUT_SOURCE(1),
8e21c34c 1143 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1144 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1145 { } /* end */
1146};
1147
9e05b7a3 1148static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1149 STAC_INPUT_SOURCE(2),
e1f0d669 1150 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1151
1152 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1153 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1154
1155 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1156 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1157 { } /* end */
1158};
1159
19039bd0 1160/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1161static struct snd_kcontrol_new stac922x_mixer[] = {
1162 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1163 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1164 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1165
1166 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1167 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1168 { } /* end */
1169};
1170
9e05b7a3 1171
d1d985f0 1172static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1173 STAC_INPUT_SOURCE(3),
e1f0d669 1174 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1175
9e05b7a3
ML		 1176 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1177 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1178
1179 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1180 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1181
1182 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1183 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1184 { } /* end */
1185};
1186
1697055e
TI		 1187static struct snd_kcontrol_new stac_dmux_mixer = {
1188 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1189 .name = "Digital Input Source",
1190 /* count set later */
1191 .info = stac92xx_dmux_enum_info,
1192 .get = stac92xx_dmux_enum_get,
1193 .put = stac92xx_dmux_enum_put,
1194};
1195
d9737751
MR		 1196static struct snd_kcontrol_new stac_smux_mixer = {
1197 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1198 .name = "IEC958 Playback Source",
d9737751
MR		 1199 /* count set later */
1200 .info = stac92xx_smux_enum_info,
1201 .get = stac92xx_smux_enum_get,
1202 .put = stac92xx_smux_enum_put,
1203};
1204
2134ea4f
TI		 1205static const char *slave_vols[] = {
1206 "Front Playback Volume",
1207 "Surround Playback Volume",
1208 "Center Playback Volume",
1209 "LFE Playback Volume",
1210 "Side Playback Volume",
1211 "Headphone Playback Volume",
1212 "Headphone Playback Volume",
1213 "Speaker Playback Volume",
1214 "External Speaker Playback Volume",
1215 "Speaker2 Playback Volume",
1216 NULL
1217};
1218
1219static const char *slave_sws[] = {
1220 "Front Playback Switch",
1221 "Surround Playback Switch",
1222 "Center Playback Switch",
1223 "LFE Playback Switch",
1224 "Side Playback Switch",
1225 "Headphone Playback Switch",
1226 "Headphone Playback Switch",
1227 "Speaker Playback Switch",
1228 "External Speaker Playback Switch",
1229 "Speaker2 Playback Switch",
edb54a55 1230 "IEC958 Playback Switch",
2134ea4f
TI		 1231 NULL
1232};
1233
603c4019
TI		 1234static void stac92xx_free_kctls(struct hda_codec *codec);
1235
2f2f4251
M		 1236static int stac92xx_build_controls(struct hda_codec *codec)
1237{
1238 struct sigmatel_spec *spec = codec->spec;
1239 int err;
c7d4b2fa 1240 int i;
2f2f4251
M		 1241
1242 err = snd_hda_add_new_ctls(codec, spec->mixer);
1243 if (err < 0)
1244 return err;
c7d4b2fa
M		 1245
1246 for (i = 0; i < spec->num_mixers; i++) {
1247 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1248 if (err < 0)
1249 return err;
1250 }
1697055e
TI		 1251 if (spec->num_dmuxes > 0) {
1252 stac_dmux_mixer.count = spec->num_dmuxes;
1253 err = snd_ctl_add(codec->bus->card,
1254 snd_ctl_new1(&stac_dmux_mixer, codec));
1255 if (err < 0)
1256 return err;
1257 }
d9737751 1258 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1259 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1260 struct hda_input_mux *smux = &spec->private_smux;
1261 /* check for mute support on SPDIF out */
1262 if (wcaps & AC_WCAP_OUT_AMP) {
1263 smux->items[smux->num_items].label = "Off";
1264 smux->items[smux->num_items].index = 0;
1265 smux->num_items++;
1266 spec->spdif_mute = 1;
1267 }
d9737751
MR		 1268 stac_smux_mixer.count = spec->num_smuxes;
1269 err = snd_ctl_add(codec->bus->card,
1270 snd_ctl_new1(&stac_smux_mixer, codec));
1271 if (err < 0)
1272 return err;
1273 }
c7d4b2fa 1274
dabbed6f
M		 1275 if (spec->multiout.dig_out_nid) {
1276 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1277 if (err < 0)
1278 return err;
9a08160b
TI		 1279 err = snd_hda_create_spdif_share_sw(codec,
1280 &spec->multiout);
1281 if (err < 0)
1282 return err;
1283 spec->multiout.share_spdif = 1;
dabbed6f 1284 }
b2c4f4d7 1285 if (spec->dig_in_nid && (!spec->gpio_dir & 0x01)) {
dabbed6f
M		 1286 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1287 if (err < 0)
1288 return err;
1289 }
2134ea4f
TI		 1290
1291 /* if we have no master control, let's create it */
1292 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1293 unsigned int vmaster_tlv[4];
2134ea4f 1294 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1295 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1296 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1297 vmaster_tlv, slave_vols);
2134ea4f
TI		 1298 if (err < 0)
1299 return err;
1300 }
1301 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1302 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1303 NULL, slave_sws);
1304 if (err < 0)
1305 return err;
1306 }
1307
603c4019 1308 stac92xx_free_kctls(codec); /* no longer needed */
dabbed6f 1309 return 0;
2f2f4251
M		 1310}
1311
403d1944 1312static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1313 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1314 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1315};
1316
dfe495d0
TI		 1317/*
1318 STAC 9200 pin configs for
1319 102801A8
1320 102801DE
1321 102801E8
1322*/
1323static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1324 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1325 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1326};
1327
1328/*
1329 STAC 9200 pin configs for
1330 102801C0
1331 102801C1
1332*/
1333static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1334 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1335 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1336};
1337
1338/*
1339 STAC 9200 pin configs for
1340 102801C4 (Dell Dimension E310)
1341 102801C5
1342 102801C7
1343 102801D9
1344 102801DA
1345 102801E3
1346*/
1347static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1348 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1349 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1350};
1351
1352
1353/*
1354 STAC 9200-32 pin configs for
1355 102801B5 (Dell Inspiron 630m)
1356 102801D8 (Dell Inspiron 640m)
1357*/
1358static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1359 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1360 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1361};
1362
1363/*
1364 STAC 9200-32 pin configs for
1365 102801C2 (Dell Latitude D620)
1366 102801C8
1367 102801CC (Dell Latitude D820)
1368 102801D4
1369 102801D6
1370*/
1371static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1372 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1373 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1374};
1375
1376/*
1377 STAC 9200-32 pin configs for
1378 102801CE (Dell XPS M1710)
1379 102801CF (Dell Precision M90)
1380*/
1381static unsigned int dell9200_m23_pin_configs[8] = {
1382 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1383 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1384};
1385
1386/*
1387 STAC 9200-32 pin configs for
1388 102801C9
1389 102801CA
1390 102801CB (Dell Latitude 120L)
1391 102801D3
1392*/
1393static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1394 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1395 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1396};
1397
1398/*
1399 STAC 9200-32 pin configs for
1400 102801BD (Dell Inspiron E1505n)
1401 102801EE
1402 102801EF
1403*/
1404static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1405 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1406 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1407};
1408
1409/*
1410 STAC 9200-32 pin configs for
1411 102801F5 (Dell Inspiron 1501)
1412 102801F6
1413*/
1414static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1415 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1416 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1417};
1418
1419/*
1420 STAC 9200-32
1421 102801CD (Dell Inspiron E1705/9400)
1422*/
1423static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1424 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1425 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1426};
1427
bf277785
TD		 1428static unsigned int oqo9200_pin_configs[8] = {
1429 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1430 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1431};
1432
dfe495d0 1433
f5fcc13c
TI		 1434static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1435 [STAC_REF] = ref9200_pin_configs,
bf277785 1436 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1437 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1438 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1439 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1440 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1441 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1442 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1443 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1444 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1445 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1446 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1447 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1448};
1449
f5fcc13c
TI		 1450static const char *stac9200_models[STAC_9200_MODELS] = {
1451 [STAC_REF] = "ref",
bf277785 1452 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1453 [STAC_9200_DELL_D21] = "dell-d21",
1454 [STAC_9200_DELL_D22] = "dell-d22",
1455 [STAC_9200_DELL_D23] = "dell-d23",
1456 [STAC_9200_DELL_M21] = "dell-m21",
1457 [STAC_9200_DELL_M22] = "dell-m22",
1458 [STAC_9200_DELL_M23] = "dell-m23",
1459 [STAC_9200_DELL_M24] = "dell-m24",
1460 [STAC_9200_DELL_M25] = "dell-m25",
1461 [STAC_9200_DELL_M26] = "dell-m26",
1462 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1463 [STAC_9200_GATEWAY] = "gateway",
117f257d 1464 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1465};
1466
1467static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1468 /* SigmaTel reference board */
1469 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1470 "DFI LanParty", STAC_REF),
e7377071 1471 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1472 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1473 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1474 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1475 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1477 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1479 "unknown Dell", STAC_9200_DELL_D22),
1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1481 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1483 "Dell Latitude D620", STAC_9200_DELL_M22),
1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1485 "unknown Dell", STAC_9200_DELL_D23),
1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1487 "unknown Dell", STAC_9200_DELL_D23),
1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1489 "unknown Dell", STAC_9200_DELL_M22),
1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1491 "unknown Dell", STAC_9200_DELL_M24),
1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1493 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1495 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1497 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1499 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1501 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1503 "Dell Precision M90", STAC_9200_DELL_M23),
1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1505 "unknown Dell", STAC_9200_DELL_M22),
1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1507 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1509 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1511 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1513 "unknown Dell", STAC_9200_DELL_D23),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1515 "unknown Dell", STAC_9200_DELL_D23),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1517 "unknown Dell", STAC_9200_DELL_D21),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1519 "unknown Dell", STAC_9200_DELL_D23),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1521 "unknown Dell", STAC_9200_DELL_D21),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1523 "unknown Dell", STAC_9200_DELL_M25),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1525 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1527 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1529 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1530 /* Panasonic */
117f257d 1531 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1532 /* Gateway machines needs EAPD to be set on resume */
1533 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1534 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1535 STAC_9200_GATEWAY),
1536 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1537 STAC_9200_GATEWAY),
bf277785
TD		 1538 /* OQO Mobile */
1539 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1540 {} /* terminator */
1541};
1542
8e21c34c
TD		 1543static unsigned int ref925x_pin_configs[8] = {
1544 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1545 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1546};
1547
1548static unsigned int stac925x_MA6_pin_configs[8] = {
1549 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1550 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1551};
1552
2c11f955
TD		 1553static unsigned int stac925x_PA6_pin_configs[8] = {
1554 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1555 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1556};
1557
8e21c34c 1558static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1559 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1560 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1561};
1562
1563static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1564 [STAC_REF] = ref925x_pin_configs,
1565 [STAC_M2_2] = stac925xM2_2_pin_configs,
1566 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1567 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1568};
1569
1570static const char *stac925x_models[STAC_925x_MODELS] = {
1571 [STAC_REF] = "ref",
1572 [STAC_M2_2] = "m2-2",
1573 [STAC_MA6] = "m6",
2c11f955 1574 [STAC_PA6] = "pa6",
8e21c34c
TD		 1575};
1576
1577static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1578 /* SigmaTel reference board */
1579 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1580 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1581 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1582 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1583 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1584 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1585 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1586 {} /* terminator */
1587};
1588
a7662640 1589static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1590 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1591 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1592 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1593 0x01452050,
1594};
1595
1596static unsigned int dell_m6_pin_configs[13] = {
1597 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1598 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1599 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1600 0x4f0000f0,
e1f0d669
MR		 1601};
1602
1603static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1604 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1605 [STAC_DELL_M6] = dell_m6_pin_configs,
e1f0d669
MR		 1606};
1607
1608static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1609 [STAC_92HD73XX_REF] = "ref",
a7662640 1610 [STAC_DELL_M6] = "dell-m6",
e1f0d669
MR		 1611};
1612
1613static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1614 /* SigmaTel reference board */
1615 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1616 "DFI LanParty", STAC_92HD73XX_REF),
1617 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1618 "unknown Dell", STAC_DELL_M6),
1619 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1620 "unknown Dell", STAC_DELL_M6),
1621 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1622 "unknown Dell", STAC_DELL_M6),
1623 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1624 "unknown Dell", STAC_DELL_M6),
1625 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1626 "unknown Dell", STAC_DELL_M6),
1627 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1628 "unknown Dell", STAC_DELL_M6),
1629 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1630 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1631 {} /* terminator */
1632};
1633
d0513fc6
MR		 1634static unsigned int ref92hd83xxx_pin_configs[14] = {
1635 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1636 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1637 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1638 0x01451160, 0x98560170,
1639};
1640
1641static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1642 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1643};
1644
1645static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1646 [STAC_92HD83XXX_REF] = "ref",
1647};
1648
1649static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1650 /* SigmaTel reference board */
1651 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1652 "DFI LanParty", STAC_92HD71BXX_REF),
1653};
1654
0ffa9807 1655static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1656 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1657 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1658 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1659};
1660
0ffa9807 1661static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1662 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1663 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1664 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1665};
1666
0ffa9807 1667static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1668 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1669 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1670 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1671};
1672
e035b841
MR		 1673static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1674 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1675 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1676 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
6a14f585 1677 [STAC_HP_M4] = NULL,
e035b841
MR		 1678};
1679
1680static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1681 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1682 [STAC_DELL_M4_1] = "dell-m4-1",
1683 [STAC_DELL_M4_2] = "dell-m4-2",
6a14f585 1684 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1685};
1686
1687static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1688 /* SigmaTel reference board */
1689 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1690 "DFI LanParty", STAC_92HD71BXX_REF),
9a9e2359
MR		 1691 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1692 "unknown HP", STAC_HP_M4),
a7662640
MR		 1693 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1694 "unknown Dell", STAC_DELL_M4_1),
1695 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1696 "unknown Dell", STAC_DELL_M4_1),
1697 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1698 "unknown Dell", STAC_DELL_M4_1),
1699 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1700 "unknown Dell", STAC_DELL_M4_1),
1701 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1702 "unknown Dell", STAC_DELL_M4_1),
1703 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1704 "unknown Dell", STAC_DELL_M4_1),
1705 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1706 "unknown Dell", STAC_DELL_M4_1),
1707 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1708 "unknown Dell", STAC_DELL_M4_2),
1709 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1710 "unknown Dell", STAC_DELL_M4_2),
1711 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1712 "unknown Dell", STAC_DELL_M4_2),
1713 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1714 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1715 {} /* terminator */
1716};
1717
403d1944
MP		 1718static unsigned int ref922x_pin_configs[10] = {
1719 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1720 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1721 0x40000100, 0x40000100,
1722};
1723
dfe495d0
TI		 1724/*
1725 STAC 922X pin configs for
1726 102801A7
1727 102801AB
1728 102801A9
1729 102801D1
1730 102801D2
1731*/
1732static unsigned int dell_922x_d81_pin_configs[10] = {
1733 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1734 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1735 0x01813122, 0x400001f2,
1736};
1737
1738/*
1739 STAC 922X pin configs for
1740 102801AC
1741 102801D0
1742*/
1743static unsigned int dell_922x_d82_pin_configs[10] = {
1744 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1745 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1746 0x01813122, 0x400001f1,
1747};
1748
1749/*
1750 STAC 922X pin configs for
1751 102801BF
1752*/
1753static unsigned int dell_922x_m81_pin_configs[10] = {
1754 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1755 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1756 0x40C003f1, 0x405003f0,
1757};
1758
1759/*
1760 STAC 9221 A1 pin configs for
1761 102801D7 (Dell XPS M1210)
1762*/
1763static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1764 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1765 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1766 0x508003f3, 0x405003f4,
1767};
1768
403d1944 1769static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1770 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1771 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1772 0x02a19120, 0x40000100,
1773};
1774
1775static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1776 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1777 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1778 0x02a19320, 0x40000100,
1779};
1780
5d5d3bc3
IZ		 1781static unsigned int intel_mac_v1_pin_configs[10] = {
1782 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1783 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1784 0x400000fc, 0x400000fb,
1785};
1786
1787static unsigned int intel_mac_v2_pin_configs[10] = {
1788 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1789 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1790 0x400000fc, 0x400000fb,
6f0778d8
NB		 1791};
1792
5d5d3bc3
IZ		 1793static unsigned int intel_mac_v3_pin_configs[10] = {
1794 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1795 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1796 0x400000fc, 0x400000fb,
1797};
1798
5d5d3bc3
IZ		 1799static unsigned int intel_mac_v4_pin_configs[10] = {
1800 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1801 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1802 0x400000fc, 0x400000fb,
1803};
1804
5d5d3bc3
IZ		 1805static unsigned int intel_mac_v5_pin_configs[10] = {
1806 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1807 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1808 0x400000fc, 0x400000fb,
0dae0f83
TI		 1809};
1810
8c650087
MCC		 1811static unsigned int ecs202_pin_configs[10] = {
1812 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1813 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1814 0x9037012e, 0x40e000f2,
1815};
76c08828 1816
19039bd0 1817static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1818 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1819 [STAC_D945GTP3] = d945gtp3_pin_configs,
1820 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1821 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1822 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1823 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1824 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1825 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1826 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1827 /* for backward compatibility */
5d5d3bc3
IZ		 1828 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1829 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1830 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1831 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1832 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1833 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1834 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1835 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1836 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1837 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1838 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1839};
1840
f5fcc13c
TI		 1841static const char *stac922x_models[STAC_922X_MODELS] = {
1842 [STAC_D945_REF] = "ref",
1843 [STAC_D945GTP5] = "5stack",
1844 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1845 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1846 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1847 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1848 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1849 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1850 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1851 /* for backward compatibility */
f5fcc13c 1852 [STAC_MACMINI] = "macmini",
3fc24d85 1853 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1854 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1855 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1856 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1857 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1858 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1859 [STAC_922X_DELL_D81] = "dell-d81",
1860 [STAC_922X_DELL_D82] = "dell-d82",
1861 [STAC_922X_DELL_M81] = "dell-m81",
1862 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1863};
1864
1865static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1866 /* SigmaTel reference board */
1867 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1868 "DFI LanParty", STAC_D945_REF),
1869 /* Intel 945G based systems */
1870 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1871 "Intel D945G", STAC_D945GTP3),
1872 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1873 "Intel D945G", STAC_D945GTP3),
1874 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1875 "Intel D945G", STAC_D945GTP3),
1876 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1877 "Intel D945G", STAC_D945GTP3),
1878 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1879 "Intel D945G", STAC_D945GTP3),
1880 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1881 "Intel D945G", STAC_D945GTP3),
1882 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1883 "Intel D945G", STAC_D945GTP3),
1884 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1885 "Intel D945G", STAC_D945GTP3),
1886 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1887 "Intel D945G", STAC_D945GTP3),
1888 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1889 "Intel D945G", STAC_D945GTP3),
1890 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1891 "Intel D945G", STAC_D945GTP3),
1892 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1893 "Intel D945G", STAC_D945GTP3),
1894 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1895 "Intel D945G", STAC_D945GTP3),
1896 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1897 "Intel D945G", STAC_D945GTP3),
1898 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1899 "Intel D945G", STAC_D945GTP3),
1900 /* Intel D945G 5-stack systems */
1901 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1902 "Intel D945G", STAC_D945GTP5),
1903 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1904 "Intel D945G", STAC_D945GTP5),
1905 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1906 "Intel D945G", STAC_D945GTP5),
1907 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1908 "Intel D945G", STAC_D945GTP5),
1909 /* Intel 945P based systems */
1910 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1911 "Intel D945P", STAC_D945GTP3),
1912 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1913 "Intel D945P", STAC_D945GTP3),
1914 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1915 "Intel D945P", STAC_D945GTP3),
1916 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1917 "Intel D945P", STAC_D945GTP3),
1918 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1919 "Intel D945P", STAC_D945GTP3),
1920 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1921 "Intel D945P", STAC_D945GTP5),
1922 /* other systems */
536319af 1923 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1924 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1925 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1926 /* Dell systems */
1927 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1928 "unknown Dell", STAC_922X_DELL_D81),
1929 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1930 "unknown Dell", STAC_922X_DELL_D81),
1931 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1932 "unknown Dell", STAC_922X_DELL_D81),
1933 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1934 "unknown Dell", STAC_922X_DELL_D82),
1935 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1936 "unknown Dell", STAC_922X_DELL_M81),
1937 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1938 "unknown Dell", STAC_922X_DELL_D82),
1939 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1940 "unknown Dell", STAC_922X_DELL_D81),
1941 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1942 "unknown Dell", STAC_922X_DELL_D81),
1943 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1944 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 1945 /* ECS/PC Chips boards */
1946 SND_PCI_QUIRK(0x1019, 0x2144,
1947 "ECS/PC chips", STAC_ECS_202),
1948 SND_PCI_QUIRK(0x1019, 0x2608,
1949 "ECS/PC chips", STAC_ECS_202),
1950 SND_PCI_QUIRK(0x1019, 0x2633,
1951 "ECS/PC chips P17G/1333", STAC_ECS_202),
1952 SND_PCI_QUIRK(0x1019, 0x2811,
1953 "ECS/PC chips", STAC_ECS_202),
1954 SND_PCI_QUIRK(0x1019, 0x2812,
1955 "ECS/PC chips", STAC_ECS_202),
1956 SND_PCI_QUIRK(0x1019, 0x2813,
1957 "ECS/PC chips", STAC_ECS_202),
1958 SND_PCI_QUIRK(0x1019, 0x2814,
1959 "ECS/PC chips", STAC_ECS_202),
1960 SND_PCI_QUIRK(0x1019, 0x2815,
1961 "ECS/PC chips", STAC_ECS_202),
1962 SND_PCI_QUIRK(0x1019, 0x2816,
1963 "ECS/PC chips", STAC_ECS_202),
1964 SND_PCI_QUIRK(0x1019, 0x2817,
1965 "ECS/PC chips", STAC_ECS_202),
1966 SND_PCI_QUIRK(0x1019, 0x2818,
1967 "ECS/PC chips", STAC_ECS_202),
1968 SND_PCI_QUIRK(0x1019, 0x2819,
1969 "ECS/PC chips", STAC_ECS_202),
1970 SND_PCI_QUIRK(0x1019, 0x2820,
1971 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 1972 {} /* terminator */
1973};
1974
3cc08dc6 1975static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1976 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1977 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1978 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1979 0x01c42190, 0x40000100,
3cc08dc6
MP		 1980};
1981
93ed1503 1982static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1983 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1984 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1985 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1986 0x40000100, 0x40000100
1987};
1988
93ed1503
TD		 1989static unsigned int d965_5st_pin_configs[14] = {
1990 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1991 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1992 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1993 0x40000100, 0x40000100
1994};
1995
4ff076e5
TD		 1996static unsigned int dell_3st_pin_configs[14] = {
1997 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1998 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1999 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2000 0x40c003fc, 0x40000100
2001};
2002
93ed1503 2003static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 2004 [STAC_D965_REF] = ref927x_pin_configs,
2005 [STAC_D965_3ST] = d965_3st_pin_configs,
2006 [STAC_D965_5ST] = d965_5st_pin_configs,
2007 [STAC_DELL_3ST] = dell_3st_pin_configs,
2008 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2009};
2010
f5fcc13c 2011static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 2012 [STAC_D965_REF] = "ref",
2013 [STAC_D965_3ST] = "3stack",
2014 [STAC_D965_5ST] = "5stack",
2015 [STAC_DELL_3ST] = "dell-3stack",
2016 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2017};
2018
2019static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2020 /* SigmaTel reference board */
2021 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2022 "DFI LanParty", STAC_D965_REF),
81d3dbde 2023 /* Intel 946 based systems */
f5fcc13c
TI		 2024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2026 /* 965 based 3 stack systems */
f5fcc13c
TI		 2027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2028 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2029 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2031 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2033 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2035 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2037 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2039 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2041 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2042 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2043 /* Dell 3 stack systems */
8e9068b1 2044 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2045 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2046 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2048 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2049 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2050 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2051 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2052 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2053 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2054 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2056 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2057 /* 965 based 5 stack systems */
f5fcc13c
TI		 2058 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2060 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2062 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2063 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2064 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2065 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2066 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2067 {} /* terminator */
2068};
2069
f3302a59
MP		 2070static unsigned int ref9205_pin_configs[12] = {
2071 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2072 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2073 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2074};
2075
dfe495d0
TI		 2076/*
2077 STAC 9205 pin configs for
2078 102801F1
2079 102801F2
2080 102801FC
2081 102801FD
2082 10280204
2083 1028021F
3fa2ef74 2084 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2085*/
2086static unsigned int dell_9205_m42_pin_configs[12] = {
2087 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2088 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2089 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2090};
2091
2092/*
2093 STAC 9205 pin configs for
2094 102801F9
2095 102801FA
2096 102801FE
2097 102801FF (Dell Precision M4300)
2098 10280206
2099 10280200
2100 10280201
2101*/
2102static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2103 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2104 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2105 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2106};
2107
dfe495d0 2108static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2109 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2110 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2111 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2112};
2113
f5fcc13c 2114static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2115 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2116 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2117 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2118 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2119};
2120
f5fcc13c
TI		 2121static const char *stac9205_models[STAC_9205_MODELS] = {
2122 [STAC_9205_REF] = "ref",
dfe495d0 2123 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2124 [STAC_9205_DELL_M43] = "dell-m43",
2125 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2126};
2127
2128static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2129 /* SigmaTel reference board */
2130 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2131 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2132 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2133 "unknown Dell", STAC_9205_DELL_M42),
2134 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2135 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2136 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2137 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2138 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2139 "Dell Precision", STAC_9205_DELL_M43),
2140 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2141 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2142 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2143 "unknown Dell", STAC_9205_DELL_M42),
2144 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2145 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2146 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2147 "Dell Precision", STAC_9205_DELL_M43),
2148 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2149 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2150 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2151 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2152 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2153 "Dell Precision", STAC_9205_DELL_M43),
2154 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2155 "Dell Precision", STAC_9205_DELL_M43),
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2157 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2158 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2159 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2160 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2161 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2162 {} /* terminator */
2163};
2164
11b44bbd
RF		 2165static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2166{
2167 int i;
2168 struct sigmatel_spec *spec = codec->spec;
2169
2170 if (! spec->bios_pin_configs) {
2171 spec->bios_pin_configs = kcalloc(spec->num_pins,
2172 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
2173 if (! spec->bios_pin_configs)
2174 return -ENOMEM;
2175 }
2176
2177 for (i = 0; i < spec->num_pins; i++) {
2178 hda_nid_t nid = spec->pin_nids[i];
2179 unsigned int pin_cfg;
2180
2181 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2182 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2183 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2184 nid, pin_cfg);
2185 spec->bios_pin_configs[i] = pin_cfg;
2186 }
2187
2188 return 0;
2189}
2190
87d48363
MR		 2191static void stac92xx_set_config_reg(struct hda_codec *codec,
2192 hda_nid_t pin_nid, unsigned int pin_config)
2193{
2194 int i;
2195 snd_hda_codec_write(codec, pin_nid, 0,
2196 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2197 pin_config & 0x000000ff);
2198 snd_hda_codec_write(codec, pin_nid, 0,
2199 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2200 (pin_config & 0x0000ff00) >> 8);
2201 snd_hda_codec_write(codec, pin_nid, 0,
2202 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2203 (pin_config & 0x00ff0000) >> 16);
2204 snd_hda_codec_write(codec, pin_nid, 0,
2205 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2206 pin_config >> 24);
2207 i = snd_hda_codec_read(codec, pin_nid, 0,
2208 AC_VERB_GET_CONFIG_DEFAULT,
2209 0x00);
2210 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2211 pin_nid, i);
2212}
2213
2f2f4251
M		 2214static void stac92xx_set_config_regs(struct hda_codec *codec)
2215{
2216 int i;
2217 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2218
87d48363
MR		 2219 if (!spec->pin_configs)
2220 return;
11b44bbd 2221
87d48363
MR		 2222 for (i = 0; i < spec->num_pins; i++)
2223 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2224 spec->pin_configs[i]);
2f2f4251 2225}
2f2f4251 2226
dabbed6f 2227/*
c7d4b2fa 2228 * Analog playback callbacks
dabbed6f 2229 */
c7d4b2fa
M		 2230static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2231 struct hda_codec *codec,
c8b6bf9b 2232 struct snd_pcm_substream *substream)
2f2f4251 2233{
dabbed6f 2234 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2235 if (spec->stream_delay)
2236 msleep(spec->stream_delay);
9a08160b
TI		 2237 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2238 hinfo);
2f2f4251
M		 2239}
2240
2f2f4251
M		 2241static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2242 struct hda_codec *codec,
2243 unsigned int stream_tag,
2244 unsigned int format,
c8b6bf9b 2245 struct snd_pcm_substream *substream)
2f2f4251
M		 2246{
2247 struct sigmatel_spec *spec = codec->spec;
403d1944 2248 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2249}
2250
2251static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2252 struct hda_codec *codec,
c8b6bf9b 2253 struct snd_pcm_substream *substream)
2f2f4251
M		 2254{
2255 struct sigmatel_spec *spec = codec->spec;
2256 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2257}
2258
dabbed6f
M		 2259/*
2260 * Digital playback callbacks
2261 */
2262static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2263 struct hda_codec *codec,
c8b6bf9b 2264 struct snd_pcm_substream *substream)
dabbed6f
M		 2265{
2266 struct sigmatel_spec *spec = codec->spec;
2267 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2268}
2269
2270static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2271 struct hda_codec *codec,
c8b6bf9b 2272 struct snd_pcm_substream *substream)
dabbed6f
M		 2273{
2274 struct sigmatel_spec *spec = codec->spec;
2275 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2276}
2277
6b97eb45
TI		 2278static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2279 struct hda_codec *codec,
2280 unsigned int stream_tag,
2281 unsigned int format,
2282 struct snd_pcm_substream *substream)
2283{
2284 struct sigmatel_spec *spec = codec->spec;
2285 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2286 stream_tag, format, substream);
2287}
2288
dabbed6f 2289
2f2f4251
M		 2290/*
2291 * Analog capture callbacks
2292 */
2293static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2294 struct hda_codec *codec,
2295 unsigned int stream_tag,
2296 unsigned int format,
c8b6bf9b 2297 struct snd_pcm_substream *substream)
2f2f4251
M		 2298{
2299 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2300 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2301
8daaaa97
MR		 2302 if (spec->powerdown_adcs) {
2303 msleep(40);
2304 snd_hda_codec_write_cache(codec, nid, 0,
2305 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2306 }
2307 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2308 return 0;
2309}
2310
2311static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2312 struct hda_codec *codec,
c8b6bf9b 2313 struct snd_pcm_substream *substream)
2f2f4251
M		 2314{
2315 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2316 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2317
8daaaa97
MR		 2318 snd_hda_codec_cleanup_stream(codec, nid);
2319 if (spec->powerdown_adcs)
2320 snd_hda_codec_write_cache(codec, nid, 0,
2321 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2322 return 0;
2323}
2324
dabbed6f
M		 2325static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2326 .substreams = 1,
2327 .channels_min = 2,
2328 .channels_max = 2,
2329 /* NID is set in stac92xx_build_pcms */
2330 .ops = {
2331 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2332 .close = stac92xx_dig_playback_pcm_close,
2333 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2334 },
2335};
2336
2337static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2338 .substreams = 1,
2339 .channels_min = 2,
2340 .channels_max = 2,
2341 /* NID is set in stac92xx_build_pcms */
2342};
2343
2f2f4251
M		 2344static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2345 .substreams = 1,
2346 .channels_min = 2,
c7d4b2fa 2347 .channels_max = 8,
2f2f4251
M		 2348 .nid = 0x02, /* NID to query formats and rates */
2349 .ops = {
2350 .open = stac92xx_playback_pcm_open,
2351 .prepare = stac92xx_playback_pcm_prepare,
2352 .cleanup = stac92xx_playback_pcm_cleanup
2353 },
2354};
2355
3cc08dc6
MP		 2356static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2357 .substreams = 1,
2358 .channels_min = 2,
2359 .channels_max = 2,
2360 .nid = 0x06, /* NID to query formats and rates */
2361 .ops = {
2362 .open = stac92xx_playback_pcm_open,
2363 .prepare = stac92xx_playback_pcm_prepare,
2364 .cleanup = stac92xx_playback_pcm_cleanup
2365 },
2366};
2367
2f2f4251 2368static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2369 .channels_min = 2,
2370 .channels_max = 2,
9e05b7a3 2371 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2372 .ops = {
2373 .prepare = stac92xx_capture_pcm_prepare,
2374 .cleanup = stac92xx_capture_pcm_cleanup
2375 },
2376};
2377
2378static int stac92xx_build_pcms(struct hda_codec *codec)
2379{
2380 struct sigmatel_spec *spec = codec->spec;
2381 struct hda_pcm *info = spec->pcm_rec;
2382
2383 codec->num_pcms = 1;
2384 codec->pcm_info = info;
2385
c7d4b2fa 2386 info->name = "STAC92xx Analog";
2f2f4251 2387 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2388 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2389 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2390 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2391
2392 if (spec->alt_switch) {
2393 codec->num_pcms++;
2394 info++;
2395 info->name = "STAC92xx Analog Alt";
2396 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2397 }
2f2f4251 2398
dabbed6f
M		 2399 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2400 codec->num_pcms++;
2401 info++;
2402 info->name = "STAC92xx Digital";
7ba72ba1 2403 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2404 if (spec->multiout.dig_out_nid) {
2405 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2406 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2407 }
2408 if (spec->dig_in_nid) {
2409 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2410 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2411 }
2412 }
2413
2f2f4251
M		 2414 return 0;
2415}
2416
c960a03b
TI		 2417static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2418{
2419 unsigned int pincap = snd_hda_param_read(codec, nid,
2420 AC_PAR_PIN_CAP);
2421 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2422 if (pincap & AC_PINCAP_VREF_100)
2423 return AC_PINCTL_VREF_100;
2424 if (pincap & AC_PINCAP_VREF_80)
2425 return AC_PINCTL_VREF_80;
2426 if (pincap & AC_PINCAP_VREF_50)
2427 return AC_PINCTL_VREF_50;
2428 if (pincap & AC_PINCAP_VREF_GRD)
2429 return AC_PINCTL_VREF_GRD;
2430 return 0;
2431}
2432
403d1944
MP		 2433static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2434
2435{
82beb8fd
TI		 2436 snd_hda_codec_write_cache(codec, nid, 0,
2437 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2438}
2439
7c2ba97b
MR		 2440#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2441
2442static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2443 struct snd_ctl_elem_value *ucontrol)
2444{
2445 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2446 struct sigmatel_spec *spec = codec->spec;
2447
2448 ucontrol->value.integer.value[0] = spec->hp_switch;
2449 return 0;
2450}
2451
2452static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2453 struct snd_ctl_elem_value *ucontrol)
2454{
2455 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2456 struct sigmatel_spec *spec = codec->spec;
2457
2458 spec->hp_switch = ucontrol->value.integer.value[0];
2459
2460 /* check to be sure that the ports are upto date with
2461 * switch changes
2462 */
2463 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2464
2465 return 1;
2466}
2467
a5ce8890 2468#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2469
2470static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2471{
2472 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2473 struct sigmatel_spec *spec = codec->spec;
2474 int io_idx = kcontrol-> private_value & 0xff;
2475
2476 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2477 return 0;
2478}
2479
2480static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2481{
2482 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2483 struct sigmatel_spec *spec = codec->spec;
2484 hda_nid_t nid = kcontrol->private_value >> 8;
2485 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2486 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2487
2488 spec->io_switch[io_idx] = val;
2489
2490 if (val)
2491 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2492 else {
2493 unsigned int pinctl = AC_PINCTL_IN_EN;
2494 if (io_idx) /* set VREF for mic */
2495 pinctl |= stac92xx_get_vref(codec, nid);
2496 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2497 }
40c1d308
JZ		 2498
2499 /* check the auto-mute again: we need to mute/unmute the speaker
2500 * appropriately according to the pin direction
2501 */
2502 if (spec->hp_detect)
2503 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2504
403d1944
MP		 2505 return 1;
2506}
2507
0fb87bb4
ML		 2508#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2509
2510static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2511 struct snd_ctl_elem_value *ucontrol)
2512{
2513 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2514 struct sigmatel_spec *spec = codec->spec;
2515
2516 ucontrol->value.integer.value[0] = spec->clfe_swap;
2517 return 0;
2518}
2519
2520static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2521 struct snd_ctl_elem_value *ucontrol)
2522{
2523 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2524 struct sigmatel_spec *spec = codec->spec;
2525 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2526 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2527
68ea7b2f 2528 if (spec->clfe_swap == val)
0fb87bb4
ML		 2529 return 0;
2530
68ea7b2f 2531 spec->clfe_swap = val;
0fb87bb4
ML		 2532
2533 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2534 spec->clfe_swap ? 0x4 : 0x0);
2535
2536 return 1;
2537}
2538
7c2ba97b
MR		 2539#define STAC_CODEC_HP_SWITCH(xname) \
2540 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2541 .name = xname, \
2542 .index = 0, \
2543 .info = stac92xx_hp_switch_info, \
2544 .get = stac92xx_hp_switch_get, \
2545 .put = stac92xx_hp_switch_put, \
2546 }
2547
403d1944
MP		 2548#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2549 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2550 .name = xname, \
2551 .index = 0, \
2552 .info = stac92xx_io_switch_info, \
2553 .get = stac92xx_io_switch_get, \
2554 .put = stac92xx_io_switch_put, \
2555 .private_value = xpval, \
2556 }
2557
0fb87bb4
ML		 2558#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2559 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2560 .name = xname, \
2561 .index = 0, \
2562 .info = stac92xx_clfe_switch_info, \
2563 .get = stac92xx_clfe_switch_get, \
2564 .put = stac92xx_clfe_switch_put, \
2565 .private_value = xpval, \
2566 }
403d1944 2567
c7d4b2fa
M		 2568enum {
2569 STAC_CTL_WIDGET_VOL,
2570 STAC_CTL_WIDGET_MUTE,
09a99959 2571 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2572 STAC_CTL_WIDGET_AMP_MUX,
2573 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2574 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2575 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2576 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2577};
2578
c8b6bf9b 2579static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2580 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2581 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2582 STAC_MONO_MUX,
89385035
MR		 2583 STAC_AMP_MUX,
2584 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2585 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2586 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2587 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2588};
2589
2590/* add dynamic controls */
4682eee0
MR		 2591static int stac92xx_add_control_idx(struct sigmatel_spec *spec, int type,
2592 int idx, const char *name, unsigned long val)
c7d4b2fa 2593{
c8b6bf9b 2594 struct snd_kcontrol_new *knew;
c7d4b2fa 2595
603c4019
TI		 2596 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2597 knew = snd_array_new(&spec->kctls);
2598 if (!knew)
2599 return -ENOMEM;
c7d4b2fa 2600 *knew = stac92xx_control_templates[type];
4682eee0 2601 knew->index = idx;
82fe0c58 2602 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2603 if (! knew->name)
2604 return -ENOMEM;
2605 knew->private_value = val;
c7d4b2fa
M		 2606 return 0;
2607}
2608
4682eee0
MR		 2609
2610/* add dynamic controls */
2611static int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2612 const char *name, unsigned long val)
2613{
2614 return stac92xx_add_control_idx(spec, type, 0, name, val);
2615}
2616
403d1944
MP		 2617/* flag inputs as additional dynamic lineouts */
2618static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2619{
2620 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2621 unsigned int wcaps, wtype;
2622 int i, num_dacs = 0;
2623
2624 /* use the wcaps cache to count all DACs available for line-outs */
2625 for (i = 0; i < codec->num_nodes; i++) {
2626 wcaps = codec->wcaps[i];
2627 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2628
7b043899
SL		 2629 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2630 num_dacs++;
2631 }
403d1944 2632
7b043899
SL		 2633 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2634
403d1944
MP		 2635 switch (cfg->line_outs) {
2636 case 3:
2637 /* add line-in as side */
7b043899 2638 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2639 cfg->line_out_pins[cfg->line_outs] =
2640 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2641 spec->line_switch = 1;
2642 cfg->line_outs++;
2643 }
2644 break;
2645 case 2:
2646 /* add line-in as clfe and mic as side */
7b043899 2647 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2648 cfg->line_out_pins[cfg->line_outs] =
2649 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2650 spec->line_switch = 1;
2651 cfg->line_outs++;
2652 }
7b043899 2653 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2654 cfg->line_out_pins[cfg->line_outs] =
2655 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2656 spec->mic_switch = 1;
2657 cfg->line_outs++;
2658 }
2659 break;
2660 case 1:
2661 /* add line-in as surr and mic as clfe */
7b043899 2662 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2663 cfg->line_out_pins[cfg->line_outs] =
2664 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2665 spec->line_switch = 1;
2666 cfg->line_outs++;
2667 }
7b043899 2668 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2669 cfg->line_out_pins[cfg->line_outs] =
2670 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2671 spec->mic_switch = 1;
2672 cfg->line_outs++;
2673 }
2674 break;
2675 }
2676
2677 return 0;
2678}
2679
7b043899
SL		 2680
2681static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2682{
2683 int i;
2684
2685 for (i = 0; i < spec->multiout.num_dacs; i++) {
2686 if (spec->multiout.dac_nids[i] == nid)
2687 return 1;
2688 }
2689
2690 return 0;
2691}
2692
3cc08dc6 2693/*
7b043899
SL		 2694 * Fill in the dac_nids table from the parsed pin configuration
2695 * This function only works when every pin in line_out_pins[]
2696 * contains atleast one DAC in its connection list. Some 92xx
2697 * codecs are not connected directly to a DAC, such as the 9200
2698 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2699 */
19039bd0 2700static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2701 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2702{
2703 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2704 int i, j, conn_len = 0;
2705 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2706 unsigned int wcaps, wtype;
2707
c7d4b2fa
M		 2708 for (i = 0; i < cfg->line_outs; i++) {
2709 nid = cfg->line_out_pins[i];
7b043899
SL		 2710 conn_len = snd_hda_get_connections(codec, nid, conn,
2711 HDA_MAX_CONNECTIONS);
2712 for (j = 0; j < conn_len; j++) {
2713 wcaps = snd_hda_param_read(codec, conn[j],
2714 AC_PAR_AUDIO_WIDGET_CAP);
2715 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2716 if (wtype != AC_WID_AUD_OUT ||
2717 (wcaps & AC_WCAP_DIGITAL))
2718 continue;
2719 /* conn[j] is a DAC routed to this line-out */
2720 if (!is_in_dac_nids(spec, conn[j]))
2721 break;
2722 }
2723
2724 if (j == conn_len) {
df802952
TI		 2725 if (spec->multiout.num_dacs > 0) {
2726 /* we have already working output pins,
2727 * so let's drop the broken ones again
2728 */
2729 cfg->line_outs = spec->multiout.num_dacs;
2730 break;
2731 }
7b043899
SL		 2732 /* error out, no available DAC found */
2733 snd_printk(KERN_ERR
2734 "%s: No available DAC for pin 0x%x\n",
2735 __func__, nid);
2736 return -ENODEV;
2737 }
2738
2739 spec->multiout.dac_nids[i] = conn[j];
2740 spec->multiout.num_dacs++;
2741 if (conn_len > 1) {
2742 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2743 snd_hda_codec_write_cache(codec, nid, 0,
2744 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2745
7b043899
SL		 2746 }
2747 }
c7d4b2fa 2748
7b043899
SL		 2749 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2750 spec->multiout.num_dacs,
2751 spec->multiout.dac_nids[0],
2752 spec->multiout.dac_nids[1],
2753 spec->multiout.dac_nids[2],
2754 spec->multiout.dac_nids[3],
2755 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2756 return 0;
2757}
2758
eb06ed8f
TI		 2759/* create volume control/switch for the given prefx type */
2760static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2761{
2762 char name[32];
2763 int err;
2764
2765 sprintf(name, "%s Playback Volume", pfx);
2766 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2767 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2768 if (err < 0)
2769 return err;
2770 sprintf(name, "%s Playback Switch", pfx);
2771 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2772 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2773 if (err < 0)
2774 return err;
2775 return 0;
2776}
2777
ae0afd81
MR		 2778static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2779{
2780 if (!spec->multiout.hp_nid)
2781 spec->multiout.hp_nid = nid;
2782 else if (spec->multiout.num_dacs > 4) {
2783 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2784 return 1;
2785 } else {
2786 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2787 spec->multiout.num_dacs++;
2788 }
2789 return 0;
2790}
2791
2792static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2793{
2794 if (is_in_dac_nids(spec, nid))
2795 return 1;
2796 if (spec->multiout.hp_nid == nid)
2797 return 1;
2798 return 0;
2799}
2800
c7d4b2fa 2801/* add playback controls from the parsed DAC table */
0fb87bb4 2802static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2803 const struct auto_pin_cfg *cfg)
c7d4b2fa 2804{
19039bd0
TI		 2805 static const char *chname[4] = {
2806 "Front", "Surround", NULL /*CLFE*/, "Side"
2807 };
c7d4b2fa
M		 2808 hda_nid_t nid;
2809 int i, err;
2810
0fb87bb4 2811 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2812 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2813
2814
40ac8c4f 2815 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2816 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2817 continue;
2818
2819 nid = spec->multiout.dac_nids[i];
2820
2821 if (i == 2) {
2822 /* Center/LFE */
eb06ed8f
TI		 2823 err = create_controls(spec, "Center", nid, 1);
2824 if (err < 0)
c7d4b2fa 2825 return err;
eb06ed8f
TI		 2826 err = create_controls(spec, "LFE", nid, 2);
2827 if (err < 0)
c7d4b2fa 2828 return err;
0fb87bb4
ML		 2829
2830 wid_caps = get_wcaps(codec, nid);
2831
2832 if (wid_caps & AC_WCAP_LR_SWAP) {
2833 err = stac92xx_add_control(spec,
2834 STAC_CTL_WIDGET_CLFE_SWITCH,
2835 "Swap Center/LFE Playback Switch", nid);
2836
2837 if (err < 0)
2838 return err;
2839 }
2840
c7d4b2fa 2841 } else {
eb06ed8f
TI		 2842 err = create_controls(spec, chname[i], nid, 3);
2843 if (err < 0)
c7d4b2fa
M		 2844 return err;
2845 }
2846 }
2847
fedb7569
MR		 2848 if ((spec->multiout.num_dacs - cfg->line_outs) > 0 &&
2849 cfg->hp_outs && !spec->multiout.hp_nid)
2850 spec->multiout.hp_nid = nid;
2851
7c2ba97b
MR		 2852 if (cfg->hp_outs > 1) {
2853 err = stac92xx_add_control(spec,
2854 STAC_CTL_WIDGET_HP_SWITCH,
2855 "Headphone as Line Out Switch", 0);
2856 if (err < 0)
2857 return err;
2858 }
2859
b5895dc8
MR		 2860 if (spec->line_switch) {
2861 nid = cfg->input_pins[AUTO_PIN_LINE];
2862 pincap = snd_hda_param_read(codec, nid,
2863 AC_PAR_PIN_CAP);
2864 if (pincap & AC_PINCAP_OUT) {
2865 err = stac92xx_add_control(spec,
2866 STAC_CTL_WIDGET_IO_SWITCH,
2867 "Line In as Output Switch", nid << 8);
2868 if (err < 0)
2869 return err;
2870 }
2871 }
403d1944 2872
b5895dc8 2873 if (spec->mic_switch) {
cace16f1 2874 unsigned int def_conf;
ae0afd81
MR		 2875 unsigned int mic_pin = AUTO_PIN_MIC;
2876again:
2877 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2878 def_conf = snd_hda_codec_read(codec, nid, 0,
2879 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2880 /* some laptops have an internal analog microphone
2881 * which can't be used as a output */
2882 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2883 pincap = snd_hda_param_read(codec, nid,
2884 AC_PAR_PIN_CAP);
2885 if (pincap & AC_PINCAP_OUT) {
2886 err = stac92xx_add_control(spec,
2887 STAC_CTL_WIDGET_IO_SWITCH,
2888 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2889 nid = snd_hda_codec_read(codec, nid, 0,
2890 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2891 if (!check_in_dac_nids(spec, nid))
2892 add_spec_dacs(spec, nid);
cace16f1
MR		 2893 if (err < 0)
2894 return err;
2895 }
ae0afd81
MR		 2896 } else if (mic_pin == AUTO_PIN_MIC) {
2897 mic_pin = AUTO_PIN_FRONT_MIC;
2898 goto again;
b5895dc8
MR		 2899 }
2900 }
403d1944 2901
c7d4b2fa
M		 2902 return 0;
2903}
2904
eb06ed8f
TI		 2905/* add playback controls for Speaker and HP outputs */
2906static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2907 struct auto_pin_cfg *cfg)
2908{
2909 struct sigmatel_spec *spec = codec->spec;
2910 hda_nid_t nid;
2911 int i, old_num_dacs, err;
2912
2913 old_num_dacs = spec->multiout.num_dacs;
2914 for (i = 0; i < cfg->hp_outs; i++) {
2915 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2916 if (wid_caps & AC_WCAP_UNSOL_CAP)
2917 spec->hp_detect = 1;
2918 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2919 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2920 if (check_in_dac_nids(spec, nid))
2921 nid = 0;
2922 if (! nid)
c7d4b2fa 2923 continue;
eb06ed8f
TI		 2924 add_spec_dacs(spec, nid);
2925 }
2926 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2927 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2928 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2929 if (check_in_dac_nids(spec, nid))
2930 nid = 0;
eb06ed8f
TI		 2931 if (! nid)
2932 continue;
2933 add_spec_dacs(spec, nid);
c7d4b2fa 2934 }
1b290a51
MR		 2935 for (i = 0; i < cfg->line_outs; i++) {
2936 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2937 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2938 if (check_in_dac_nids(spec, nid))
2939 nid = 0;
2940 if (! nid)
2941 continue;
2942 add_spec_dacs(spec, nid);
2943 }
eb06ed8f
TI		 2944 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2945 static const char *pfxs[] = {
2946 "Speaker", "External Speaker", "Speaker2",
2947 };
2948 err = create_controls(spec, pfxs[i - old_num_dacs],
2949 spec->multiout.dac_nids[i], 3);
2950 if (err < 0)
2951 return err;
2952 }
2953 if (spec->multiout.hp_nid) {
2626a263
TI		 2954 err = create_controls(spec, "Headphone",
2955 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 2956 if (err < 0)
2957 return err;
2958 }
c7d4b2fa
M		 2959
2960 return 0;
2961}
2962
b22b4821 2963/* labels for mono mux outputs */
d0513fc6
MR		 2964static const char *stac92xx_mono_labels[4] = {
2965 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 2966};
2967
2968/* create mono mux for mono out on capable codecs */
2969static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2970{
2971 struct sigmatel_spec *spec = codec->spec;
2972 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2973 int i, num_cons;
2974 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2975
2976 num_cons = snd_hda_get_connections(codec,
2977 spec->mono_nid,
2978 con_lst,
2979 HDA_MAX_NUM_INPUTS);
2980 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2981 return -EINVAL;
2982
2983 for (i = 0; i < num_cons; i++) {
2984 mono_mux->items[mono_mux->num_items].label =
2985 stac92xx_mono_labels[i];
2986 mono_mux->items[mono_mux->num_items].index = i;
2987 mono_mux->num_items++;
2988 }
09a99959
MR		 2989
2990 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2991 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2992}
2993
89385035
MR		 2994/* labels for amp mux outputs */
2995static const char *stac92xx_amp_labels[3] = {
4b33c767 2996 "Front Microphone", "Microphone", "Line In",
89385035
MR		 2997};
2998
2999/* create amp out controls mux on capable codecs */
3000static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3001{
3002 struct sigmatel_spec *spec = codec->spec;
3003 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3004 int i, err;
3005
2a9c7816 3006 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3007 amp_mux->items[amp_mux->num_items].label =
3008 stac92xx_amp_labels[i];
3009 amp_mux->items[amp_mux->num_items].index = i;
3010 amp_mux->num_items++;
3011 }
3012
2a9c7816
MR		 3013 if (spec->num_amps > 1) {
3014 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3015 "Amp Selector Capture Switch", 0);
3016 if (err < 0)
3017 return err;
3018 }
89385035
MR		 3019 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3020 "Amp Capture Volume",
3021 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3022}
3023
3024
1cd2224c
MR		 3025/* create PC beep volume controls */
3026static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3027 hda_nid_t nid)
3028{
3029 struct sigmatel_spec *spec = codec->spec;
3030 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3031 int err;
3032
3033 /* check for mute support for the the amp */
3034 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3035 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3036 "PC Beep Playback Switch",
3037 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3038 if (err < 0)
3039 return err;
3040 }
3041
3042 /* check to see if there is volume support for the amp */
3043 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3044 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3045 "PC Beep Playback Volume",
3046 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3047 if (err < 0)
3048 return err;
3049 }
3050 return 0;
3051}
3052
4682eee0
MR		 3053static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3054{
3055 struct sigmatel_spec *spec = codec->spec;
3056 int wcaps, nid, i, err = 0;
3057
3058 for (i = 0; i < spec->num_muxes; i++) {
3059 nid = spec->mux_nids[i];
3060 wcaps = get_wcaps(codec, nid);
3061
3062 if (wcaps & AC_WCAP_OUT_AMP) {
3063 err = stac92xx_add_control_idx(spec,
3064 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3065 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3066 if (err < 0)
3067 return err;
3068 }
3069 }
3070 return 0;
3071};
3072
d9737751 3073static const char *stac92xx_spdif_labels[3] = {
65973632 3074 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3075};
3076
3077static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3078{
3079 struct sigmatel_spec *spec = codec->spec;
3080 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3081 const char **labels = spec->spdif_labels;
d9737751 3082 int i, num_cons;
65973632 3083 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3084
3085 num_cons = snd_hda_get_connections(codec,
3086 spec->smux_nids[0],
3087 con_lst,
3088 HDA_MAX_NUM_INPUTS);
65973632 3089 if (!num_cons)
d9737751
MR		 3090 return -EINVAL;
3091
65973632
MR		 3092 if (!labels)
3093 labels = stac92xx_spdif_labels;
3094
d9737751 3095 for (i = 0; i < num_cons; i++) {
65973632 3096 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3097 spdif_mux->items[spdif_mux->num_items].index = i;
3098 spdif_mux->num_items++;
3099 }
3100
3101 return 0;
3102}
3103
8b65727b 3104/* labels for dmic mux inputs */
ddc2cec4 3105static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3106 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3107 "Digital Mic 3", "Digital Mic 4"
3108};
3109
3110/* create playback/capture controls for input pins on dmic capable codecs */
3111static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3112 const struct auto_pin_cfg *cfg)
3113{
3114 struct sigmatel_spec *spec = codec->spec;
3115 struct hda_input_mux *dimux = &spec->private_dimux;
3116 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3117 int err, i, j;
3118 char name[32];
8b65727b
MP		 3119
3120 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3121 dimux->items[dimux->num_items].index = 0;
3122 dimux->num_items++;
3123
3124 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3125 hda_nid_t nid;
8b65727b
MP		 3126 int index;
3127 int num_cons;
0678accd 3128 unsigned int wcaps;
8b65727b
MP		 3129 unsigned int def_conf;
3130
3131 def_conf = snd_hda_codec_read(codec,
3132 spec->dmic_nids[i],
3133 0,
3134 AC_VERB_GET_CONFIG_DEFAULT,
3135 0);
3136 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3137 continue;
3138
0678accd 3139 nid = spec->dmic_nids[i];
8b65727b 3140 num_cons = snd_hda_get_connections(codec,
e1f0d669 3141 spec->dmux_nids[0],
8b65727b
MP		 3142 con_lst,
3143 HDA_MAX_NUM_INPUTS);
3144 for (j = 0; j < num_cons; j++)
0678accd 3145 if (con_lst[j] == nid) {
8b65727b
MP		 3146 index = j;
3147 goto found;
3148 }
3149 continue;
3150found:
d0513fc6
MR		 3151 wcaps = get_wcaps(codec, nid) &
3152 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3153
d0513fc6 3154 if (wcaps) {
0678accd
MR		 3155 sprintf(name, "%s Capture Volume",
3156 stac92xx_dmic_labels[dimux->num_items]);
3157
3158 err = stac92xx_add_control(spec,
3159 STAC_CTL_WIDGET_VOL,
3160 name,
d0513fc6
MR		 3161 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3162 (wcaps & AC_WCAP_OUT_AMP) ?
3163 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3164 if (err < 0)
3165 return err;
3166 }
3167
8b65727b
MP		 3168 dimux->items[dimux->num_items].label =
3169 stac92xx_dmic_labels[dimux->num_items];
3170 dimux->items[dimux->num_items].index = index;
3171 dimux->num_items++;
3172 }
3173
3174 return 0;
3175}
3176
c7d4b2fa
M		 3177/* create playback/capture controls for input pins */
3178static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3179{
3180 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3181 struct hda_input_mux *imux = &spec->private_imux;
3182 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3183 int i, j, k;
3184
3185 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3186 int index;
3187
3188 if (!cfg->input_pins[i])
3189 continue;
3190 index = -1;
3191 for (j = 0; j < spec->num_muxes; j++) {
3192 int num_cons;
3193 num_cons = snd_hda_get_connections(codec,
3194 spec->mux_nids[j],
3195 con_lst,
3196 HDA_MAX_NUM_INPUTS);
3197 for (k = 0; k < num_cons; k++)
3198 if (con_lst[k] == cfg->input_pins[i]) {
3199 index = k;
3200 goto found;
3201 }
c7d4b2fa 3202 }
314634bc
TI		 3203 continue;
3204 found:
3205 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3206 imux->items[imux->num_items].index = index;
3207 imux->num_items++;
c7d4b2fa
M		 3208 }
3209
7b043899 3210 if (imux->num_items) {
62fe78e9
SR		 3211 /*
3212 * Set the current input for the muxes.
3213 * The STAC9221 has two input muxes with identical source
3214 * NID lists. Hopefully this won't get confused.
3215 */
3216 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3217 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3218 AC_VERB_SET_CONNECT_SEL,
3219 imux->items[0].index);
62fe78e9
SR		 3220 }
3221 }
3222
c7d4b2fa
M		 3223 return 0;
3224}
3225
c7d4b2fa
M		 3226static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3227{
3228 struct sigmatel_spec *spec = codec->spec;
3229 int i;
3230
3231 for (i = 0; i < spec->autocfg.line_outs; i++) {
3232 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3233 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3234 }
3235}
3236
3237static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3238{
3239 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3240 int i;
c7d4b2fa 3241
eb06ed8f
TI		 3242 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3243 hda_nid_t pin;
3244 pin = spec->autocfg.hp_pins[i];
3245 if (pin) /* connect to front */
3246 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3247 }
3248 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3249 hda_nid_t pin;
3250 pin = spec->autocfg.speaker_pins[i];
3251 if (pin) /* connect to front */
3252 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3253 }
c7d4b2fa
M		 3254}
3255
3cc08dc6 3256static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3257{
3258 struct sigmatel_spec *spec = codec->spec;
3259 int err;
bcecd9bd 3260 int hp_speaker_swap = 0;
c7d4b2fa 3261
8b65727b
MP		 3262 if ((err = snd_hda_parse_pin_def_config(codec,
3263 &spec->autocfg,
3264 spec->dmic_nids)) < 0)
c7d4b2fa 3265 return err;
82bc955f 3266 if (! spec->autocfg.line_outs)
869264c4 3267 return 0; /* can't find valid pin config */
19039bd0 3268
bcecd9bd
JZ		 3269 /* If we have no real line-out pin and multiple hp-outs, HPs should
3270 * be set up as multi-channel outputs.
3271 */
3272 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3273 spec->autocfg.hp_outs > 1) {
3274 /* Copy hp_outs to line_outs, backup line_outs in
3275 * speaker_outs so that the following routines can handle
3276 * HP pins as primary outputs.
3277 */
3278 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3279 sizeof(spec->autocfg.line_out_pins));
3280 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3281 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3282 sizeof(spec->autocfg.hp_pins));
3283 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3284 hp_speaker_swap = 1;
3285 }
09a99959 3286 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3287 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3288 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3289 u32 caps = query_amp_caps(codec,
3290 spec->autocfg.mono_out_pin, dir);
3291 hda_nid_t conn_list[1];
3292
3293 /* get the mixer node and then the mono mux if it exists */
3294 if (snd_hda_get_connections(codec,
3295 spec->autocfg.mono_out_pin, conn_list, 1) &&
3296 snd_hda_get_connections(codec, conn_list[0],
3297 conn_list, 1)) {
3298
3299 int wcaps = get_wcaps(codec, conn_list[0]);
3300 int wid_type = (wcaps & AC_WCAP_TYPE)
3301 >> AC_WCAP_TYPE_SHIFT;
3302 /* LR swap check, some stac925x have a mux that
3303 * changes the DACs output path instead of the
3304 * mono-mux path.
3305 */
3306 if (wid_type == AC_WID_AUD_SEL &&
3307 !(wcaps & AC_WCAP_LR_SWAP))
3308 spec->mono_nid = conn_list[0];
3309 }
d0513fc6
MR		 3310 if (dir) {
3311 hda_nid_t nid = spec->autocfg.mono_out_pin;
3312
3313 /* most mono outs have a least a mute/unmute switch */
3314 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3315 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3316 "Mono Playback Switch",
3317 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3318 if (err < 0)
3319 return err;
d0513fc6
MR		 3320 /* check for volume support for the amp */
3321 if ((caps & AC_AMPCAP_NUM_STEPS)
3322 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3323 err = stac92xx_add_control(spec,
3324 STAC_CTL_WIDGET_VOL,
3325 "Mono Playback Volume",
3326 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3327 if (err < 0)
3328 return err;
3329 }
09a99959
MR		 3330 }
3331
3332 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3333 AC_PINCTL_OUT_EN);
3334 }
bcecd9bd 3335
403d1944
MP		 3336 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3337 return err;
19039bd0
TI		 3338 if (spec->multiout.num_dacs == 0)
3339 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3340 return err;
c7d4b2fa 3341
0fb87bb4
ML		 3342 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3343
3344 if (err < 0)
3345 return err;
3346
1cd2224c
MR		 3347 /* setup analog beep controls */
3348 if (spec->anabeep_nid > 0) {
3349 err = stac92xx_auto_create_beep_ctls(codec,
3350 spec->anabeep_nid);
3351 if (err < 0)
3352 return err;
3353 }
3354
3355 /* setup digital beep controls and input device */
3356#ifdef CONFIG_SND_HDA_INPUT_BEEP
3357 if (spec->digbeep_nid > 0) {
3358 hda_nid_t nid = spec->digbeep_nid;
3359
3360 err = stac92xx_auto_create_beep_ctls(codec, nid);
3361 if (err < 0)
3362 return err;
3363 err = snd_hda_attach_beep_device(codec, nid);
3364 if (err < 0)
3365 return err;
3366 }
3367#endif
3368
bcecd9bd
JZ		 3369 if (hp_speaker_swap == 1) {
3370 /* Restore the hp_outs and line_outs */
3371 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3372 sizeof(spec->autocfg.line_out_pins));
3373 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3374 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3375 sizeof(spec->autocfg.speaker_pins));
3376 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3377 memset(spec->autocfg.speaker_pins, 0,
3378 sizeof(spec->autocfg.speaker_pins));
3379 spec->autocfg.speaker_outs = 0;
3380 }
3381
0fb87bb4
ML		 3382 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3383
3384 if (err < 0)
3385 return err;
3386
3387 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3388
3389 if (err < 0)
c7d4b2fa
M		 3390 return err;
3391
b22b4821
MR		 3392 if (spec->mono_nid > 0) {
3393 err = stac92xx_auto_create_mono_output_ctls(codec);
3394 if (err < 0)
3395 return err;
3396 }
2a9c7816 3397 if (spec->num_amps > 0) {
89385035
MR		 3398 err = stac92xx_auto_create_amp_output_ctls(codec);
3399 if (err < 0)
3400 return err;
3401 }
2a9c7816 3402 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3403 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3404 &spec->autocfg)) < 0)
3405 return err;
4682eee0
MR		 3406 if (spec->num_muxes > 0) {
3407 err = stac92xx_auto_create_mux_input_ctls(codec);
3408 if (err < 0)
3409 return err;
3410 }
d9737751
MR		 3411 if (spec->num_smuxes > 0) {
3412 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3413 if (err < 0)
3414 return err;
3415 }
8b65727b 3416
c7d4b2fa 3417 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3418 if (spec->multiout.max_channels > 2)
c7d4b2fa 3419 spec->surr_switch = 1;
c7d4b2fa 3420
82bc955f 3421 if (spec->autocfg.dig_out_pin)
3cc08dc6 3422 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3423 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3424 spec->dig_in_nid = dig_in;
c7d4b2fa 3425
603c4019
TI		 3426 if (spec->kctls.list)
3427 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3428
3429 spec->input_mux = &spec->private_imux;
2a9c7816 3430 spec->dinput_mux = &spec->private_dimux;
d9737751 3431 spec->sinput_mux = &spec->private_smux;
b22b4821 3432 spec->mono_mux = &spec->private_mono_mux;
89385035 3433 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3434 return 1;
3435}
3436
82bc955f
TI		 3437/* add playback controls for HP output */
3438static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3439 struct auto_pin_cfg *cfg)
3440{
3441 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3442 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3443 unsigned int wid_caps;
3444
3445 if (! pin)
3446 return 0;
3447
3448 wid_caps = get_wcaps(codec, pin);
505cb341 3449 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3450 spec->hp_detect = 1;
82bc955f
TI		 3451
3452 return 0;
3453}
3454
160ea0dc
RF		 3455/* add playback controls for LFE output */
3456static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3457 struct auto_pin_cfg *cfg)
3458{
3459 struct sigmatel_spec *spec = codec->spec;
3460 int err;
3461 hda_nid_t lfe_pin = 0x0;
3462 int i;
3463
3464 /*
3465 * search speaker outs and line outs for a mono speaker pin
3466 * with an amp. If one is found, add LFE controls
3467 * for it.
3468 */
3469 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3470 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3471 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3472 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3473 if (wcaps == AC_WCAP_OUT_AMP)
3474 /* found a mono speaker with an amp, must be lfe */
3475 lfe_pin = pin;
3476 }
3477
3478 /* if speaker_outs is 0, then speakers may be in line_outs */
3479 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3480 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3481 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3482 unsigned int defcfg;
8b551785 3483 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3484 AC_VERB_GET_CONFIG_DEFAULT,
3485 0x00);
8b551785 3486 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3487 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3488 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3489 if (wcaps == AC_WCAP_OUT_AMP)
3490 /* found a mono speaker with an amp,
3491 must be lfe */
3492 lfe_pin = pin;
3493 }
3494 }
3495 }
3496
3497 if (lfe_pin) {
eb06ed8f 3498 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3499 if (err < 0)
3500 return err;
3501 }
3502
3503 return 0;
3504}
3505
c7d4b2fa
M		 3506static int stac9200_parse_auto_config(struct hda_codec *codec)
3507{
3508 struct sigmatel_spec *spec = codec->spec;
3509 int err;
3510
df694daa 3511 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3512 return err;
3513
3514 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3515 return err;
3516
82bc955f
TI		 3517 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3518 return err;
3519
160ea0dc
RF		 3520 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3521 return err;
3522
82bc955f 3523 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3524 spec->multiout.dig_out_nid = 0x05;
82bc955f 3525 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3526 spec->dig_in_nid = 0x04;
c7d4b2fa 3527
603c4019
TI		 3528 if (spec->kctls.list)
3529 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3530
3531 spec->input_mux = &spec->private_imux;
8b65727b 3532 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3533
3534 return 1;
3535}
3536
62fe78e9
SR		 3537/*
3538 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3539 * funky external mute control using GPIO pins.
3540 */
3541
76e1ddfb 3542static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3543 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3544{
3545 unsigned int gpiostate, gpiomask, gpiodir;
3546
3547 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3548 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3549 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3550
3551 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3552 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3553 gpiomask |= mask;
62fe78e9
SR		 3554
3555 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3556 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3557 gpiodir |= dir_mask;
62fe78e9 3558
76e1ddfb 3559 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3560 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3561
3562 snd_hda_codec_write(codec, codec->afg, 0,
3563 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3564 snd_hda_codec_read(codec, codec->afg, 0,
3565 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3566
3567 msleep(1);
3568
76e1ddfb
TI		 3569 snd_hda_codec_read(codec, codec->afg, 0,
3570 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3571}
3572
314634bc
TI		 3573static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3574 unsigned int event)
3575{
3576 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3577 snd_hda_codec_write_cache(codec, nid, 0,
3578 AC_VERB_SET_UNSOLICITED_ENABLE,
3579 (AC_USRSP_EN | event));
314634bc
TI		 3580}
3581
a64135a2
MR		 3582static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3583{
3584 int i;
3585 for (i = 0; i < cfg->hp_outs; i++)
3586 if (cfg->hp_pins[i] == nid)
3587 return 1; /* nid is a HP-Out */
3588
3589 return 0; /* nid is not a HP-Out */
3590};
3591
b76c850f
MR		 3592static void stac92xx_power_down(struct hda_codec *codec)
3593{
3594 struct sigmatel_spec *spec = codec->spec;
3595
3596 /* power down inactive DACs */
3597 hda_nid_t *dac;
3598 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3599 if (!is_in_dac_nids(spec, *dac) &&
3600 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3601 snd_hda_codec_write_cache(codec, *dac, 0,
3602 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3603}
3604
c7d4b2fa
M		 3605static int stac92xx_init(struct hda_codec *codec)
3606{
3607 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3608 struct auto_pin_cfg *cfg = &spec->autocfg;
3609 int i;
c7d4b2fa 3610
c7d4b2fa
M		 3611 snd_hda_sequence_write(codec, spec->init);
3612
8daaaa97
MR		 3613 /* power down adcs initially */
3614 if (spec->powerdown_adcs)
3615 for (i = 0; i < spec->num_adcs; i++)
3616 snd_hda_codec_write_cache(codec,
3617 spec->adc_nids[i], 0,
3618 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
82bc955f
TI		 3619 /* set up pins */
3620 if (spec->hp_detect) {
505cb341 3621 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3622 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3623 enable_pin_detect(codec, cfg->hp_pins[i],
3624 STAC_HP_EVENT);
0a07acaf
TI		 3625 /* force to enable the first line-out; the others are set up
3626 * in unsol_event
3627 */
3628 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3629 AC_PINCTL_OUT_EN);
eb995a8c 3630 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3631 /* fake event to set up pins */
3632 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3633 } else {
3634 stac92xx_auto_init_multi_out(codec);
3635 stac92xx_auto_init_hp_out(codec);
3636 }
3637 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3638 hda_nid_t nid = cfg->input_pins[i];
3639 if (nid) {
b9aea715
MR		 3640 unsigned int pinctl = snd_hda_codec_read(codec, nid,
3641 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3642 /* if PINCTL already set then skip */
3643 if (pinctl & AC_PINCAP_IN)
3644 continue;
3645 pinctl = AC_PINCTL_IN_EN;
c960a03b
TI		 3646 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3647 pinctl |= stac92xx_get_vref(codec, nid);
3648 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3649 }
82bc955f 3650 }
a64135a2
MR		 3651 for (i = 0; i < spec->num_dmics; i++)
3652 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3653 AC_PINCTL_IN_EN);
3654 for (i = 0; i < spec->num_pwrs; i++) {
3655 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3656 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3657 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3658 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3659 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3660 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
aafc4412 3661 def_conf = get_defcfg_connect(def_conf);
a64135a2
MR		 3662 /* outputs are only ports capable of power management
3663 * any attempts on powering down a input port cause the
3664 * referenced VREF to act quirky.
3665 */
3666 if (pinctl & AC_PINCTL_IN_EN)
3667 continue;
aafc4412
MR		 3668 /* skip any ports that don't have jacks since presence
3669 * detection is useless */
3670 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
bce6c2b5 3671 continue;
a64135a2
MR		 3672 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3673 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3674 }
b76c850f
MR		 3675 if (spec->dac_list)
3676 stac92xx_power_down(codec);
82bc955f
TI		 3677 if (cfg->dig_out_pin)
3678 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3679 AC_PINCTL_OUT_EN);
3680 if (cfg->dig_in_pin)
3681 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3682 AC_PINCTL_IN_EN);
3683
4fe5195c
MR		 3684 stac_gpio_set(codec, spec->gpio_mask,
3685 spec->gpio_dir, spec->gpio_data);
62fe78e9 3686
c7d4b2fa
M		 3687 return 0;
3688}
3689
603c4019
TI		 3690static void stac92xx_free_kctls(struct hda_codec *codec)
3691{
3692 struct sigmatel_spec *spec = codec->spec;
3693
3694 if (spec->kctls.list) {
3695 struct snd_kcontrol_new *kctl = spec->kctls.list;
3696 int i;
3697 for (i = 0; i < spec->kctls.used; i++)
3698 kfree(kctl[i].name);
3699 }
3700 snd_array_free(&spec->kctls);
3701}
3702
2f2f4251
M		 3703static void stac92xx_free(struct hda_codec *codec)
3704{
c7d4b2fa 3705 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3706
3707 if (! spec)
3708 return;
3709
11b44bbd
RF		 3710 if (spec->bios_pin_configs)
3711 kfree(spec->bios_pin_configs);
3712
c7d4b2fa 3713 kfree(spec);
1cd2224c 3714 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3715}
3716
4e55096e
M		 3717static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3718 unsigned int flag)
3719{
3720 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3721 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3722
f9acba43
TI		 3723 if (pin_ctl & AC_PINCTL_IN_EN) {
3724 /*
3725 * we need to check the current set-up direction of
3726 * shared input pins since they can be switched via
3727 * "xxx as Output" mixer switch
3728 */
3729 struct sigmatel_spec *spec = codec->spec;
3730 struct auto_pin_cfg *cfg = &spec->autocfg;
3731 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3732 spec->line_switch) ||
3733 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3734 spec->mic_switch))
3735 return;
3736 }
3737
7b043899
SL		 3738 /* if setting pin direction bits, clear the current
3739 direction bits first */
3740 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3741 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3742
82beb8fd 3743 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3744 AC_VERB_SET_PIN_WIDGET_CONTROL,
3745 pin_ctl | flag);
3746}
3747
3748static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3749 unsigned int flag)
3750{
3751 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3752 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3753 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3754 AC_VERB_SET_PIN_WIDGET_CONTROL,
3755 pin_ctl & ~flag);
3756}
3757
40c1d308 3758static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3759{
3760 if (!nid)
3761 return 0;
3762 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3763 & (1 << 31)) {
3764 unsigned int pinctl;
3765 pinctl = snd_hda_codec_read(codec, nid, 0,
3766 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3767 if (pinctl & AC_PINCTL_IN_EN)
3768 return 0; /* mic- or line-input */
3769 else
3770 return 1; /* HP-output */
3771 }
314634bc
TI		 3772 return 0;
3773}
3774
3775static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3776{
3777 struct sigmatel_spec *spec = codec->spec;
3778 struct auto_pin_cfg *cfg = &spec->autocfg;
7c2ba97b 3779 int nid = cfg->hp_pins[cfg->hp_outs - 1];
4e55096e
M		 3780 int i, presence;
3781
eb06ed8f 3782 presence = 0;
4fe5195c
MR		 3783 if (spec->gpio_mute)
3784 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3785 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3786
eb06ed8f 3787 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3788 if (presence)
3789 break;
7c2ba97b
MR		 3790 if (spec->hp_switch && cfg->hp_pins[i] == nid)
3791 break;
4fe5195c 3792 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3793 }
4e55096e
M		 3794
3795 if (presence) {
3796 /* disable lineouts, enable hp */
7c2ba97b
MR		 3797 if (spec->hp_switch)
3798 stac92xx_reset_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3799 for (i = 0; i < cfg->line_outs; i++)
3800 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3801 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3802 for (i = 0; i < cfg->speaker_outs; i++)
3803 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3804 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3805 if (spec->eapd_mask)
3806 stac_gpio_set(codec, spec->gpio_mask,
3807 spec->gpio_dir, spec->gpio_data &
3808 ~spec->eapd_mask);
4e55096e
M		 3809 } else {
3810 /* enable lineouts, disable hp */
7c2ba97b
MR		 3811 if (spec->hp_switch)
3812 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3813 for (i = 0; i < cfg->line_outs; i++)
3814 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3815 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3816 for (i = 0; i < cfg->speaker_outs; i++)
3817 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3818 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3819 if (spec->eapd_mask)
3820 stac_gpio_set(codec, spec->gpio_mask,
3821 spec->gpio_dir, spec->gpio_data |
3822 spec->eapd_mask);
4e55096e 3823 }
7c2ba97b
MR		 3824 if (!spec->hp_switch && cfg->hp_outs > 1 && presence)
3825 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3826}
3827
a64135a2
MR		 3828static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3829{
3830 struct sigmatel_spec *spec = codec->spec;
3831 hda_nid_t nid = spec->pwr_nids[idx];
3832 int presence, val;
3833 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3834 & 0x000000ff;
3835 presence = get_hp_pin_presence(codec, nid);
d0513fc6
MR		 3836
3837 /* several codecs have two power down bits */
3838 if (spec->pwr_mapping)
3839 idx = spec->pwr_mapping[idx];
3840 else
3841 idx = 1 << idx;
a64135a2
MR		 3842
3843 if (presence)
3844 val &= ~idx;
3845 else
3846 val |= idx;
3847
3848 /* power down unused output ports */
3849 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3850};
3851
314634bc
TI		 3852static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3853{
a64135a2
MR		 3854 struct sigmatel_spec *spec = codec->spec;
3855 int idx = res >> 26 & 0x0f;
3856
72474be6 3857 switch ((res >> 26) & 0x70) {
314634bc
TI		 3858 case STAC_HP_EVENT:
3859 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3860 /* fallthru */
3861 case STAC_PWR_EVENT:
3862 if (spec->num_pwrs > 0)
3863 stac92xx_pin_sense(codec, idx);
72474be6
MR		 3864 break;
3865 case STAC_VREF_EVENT: {
3866 int data = snd_hda_codec_read(codec, codec->afg, 0,
3867 AC_VERB_GET_GPIO_DATA, 0);
3868 /* toggle VREF state based on GPIOx status */
3869 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
3870 !!(data & (1 << idx)));
3871 break;
3872 }
314634bc
TI		 3873 }
3874}
3875
cb53c626 3876#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3877static int stac92xx_resume(struct hda_codec *codec)
3878{
dc81bed1
TI		 3879 struct sigmatel_spec *spec = codec->spec;
3880
11b44bbd 3881 stac92xx_set_config_regs(codec);
dc81bed1 3882 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3883 stac_gpio_set(codec, spec->gpio_mask,
3884 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3885 snd_hda_codec_resume_amp(codec);
3886 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3887 /* power down inactive DACs */
3888 if (spec->dac_list)
3889 stac92xx_power_down(codec);
dc81bed1
TI		 3890 /* invoke unsolicited event to reset the HP state */
3891 if (spec->hp_detect)
3892 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3893 return 0;
3894}
3895#endif
3896
2f2f4251
M		 3897static struct hda_codec_ops stac92xx_patch_ops = {
3898 .build_controls = stac92xx_build_controls,
3899 .build_pcms = stac92xx_build_pcms,
3900 .init = stac92xx_init,
3901 .free = stac92xx_free,
4e55096e 3902 .unsol_event = stac92xx_unsol_event,
cb53c626 3903#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3904 .resume = stac92xx_resume,
3905#endif
2f2f4251
M		 3906};
3907
3908static int patch_stac9200(struct hda_codec *codec)
3909{
3910 struct sigmatel_spec *spec;
c7d4b2fa 3911 int err;
2f2f4251 3912
e560d8d8 3913 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3914 if (spec == NULL)
3915 return -ENOMEM;
3916
3917 codec->spec = spec;
a4eed138 3918 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3919 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3920 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3921 stac9200_models,
3922 stac9200_cfg_tbl);
11b44bbd
RF		 3923 if (spec->board_config < 0) {
3924 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3925 err = stac92xx_save_bios_config_regs(codec);
3926 if (err < 0) {
3927 stac92xx_free(codec);
3928 return err;
3929 }
3930 spec->pin_configs = spec->bios_pin_configs;
3931 } else {
403d1944
MP		 3932 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3933 stac92xx_set_config_regs(codec);
3934 }
2f2f4251
M		 3935
3936 spec->multiout.max_channels = 2;
3937 spec->multiout.num_dacs = 1;
3938 spec->multiout.dac_nids = stac9200_dac_nids;
3939 spec->adc_nids = stac9200_adc_nids;
3940 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3941 spec->num_muxes = 1;
8b65727b 3942 spec->num_dmics = 0;
9e05b7a3 3943 spec->num_adcs = 1;
a64135a2 3944 spec->num_pwrs = 0;
c7d4b2fa 3945
bf277785
TD		 3946 if (spec->board_config == STAC_9200_GATEWAY ||
3947 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3948 spec->init = stac9200_eapd_init;
3949 else
3950 spec->init = stac9200_core_init;
2f2f4251 3951 spec->mixer = stac9200_mixer;
c7d4b2fa 3952
117f257d
TI		 3953 if (spec->board_config == STAC_9200_PANASONIC) {
3954 spec->gpio_mask = spec->gpio_dir = 0x09;
3955 spec->gpio_data = 0x00;
3956 }
3957
c7d4b2fa
M		 3958 err = stac9200_parse_auto_config(codec);
3959 if (err < 0) {
3960 stac92xx_free(codec);
3961 return err;
3962 }
2f2f4251
M		 3963
3964 codec->patch_ops = stac92xx_patch_ops;
3965
3966 return 0;
3967}
3968
8e21c34c
TD		 3969static int patch_stac925x(struct hda_codec *codec)
3970{
3971 struct sigmatel_spec *spec;
3972 int err;
3973
3974 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3975 if (spec == NULL)
3976 return -ENOMEM;
3977
3978 codec->spec = spec;
a4eed138 3979 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3980 spec->pin_nids = stac925x_pin_nids;
3981 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3982 stac925x_models,
3983 stac925x_cfg_tbl);
9e507abd 3984 again:
8e21c34c 3985 if (spec->board_config < 0) {
2c11f955
TD		 3986 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3987 "using BIOS defaults\n");
8e21c34c
TD		 3988 err = stac92xx_save_bios_config_regs(codec);
3989 if (err < 0) {
3990 stac92xx_free(codec);
3991 return err;
3992 }
3993 spec->pin_configs = spec->bios_pin_configs;
3994 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3995 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3996 stac92xx_set_config_regs(codec);
3997 }
3998
3999 spec->multiout.max_channels = 2;
4000 spec->multiout.num_dacs = 1;
4001 spec->multiout.dac_nids = stac925x_dac_nids;
4002 spec->adc_nids = stac925x_adc_nids;
4003 spec->mux_nids = stac925x_mux_nids;
4004 spec->num_muxes = 1;
9e05b7a3 4005 spec->num_adcs = 1;
a64135a2 4006 spec->num_pwrs = 0;
2c11f955
TD		 4007 switch (codec->vendor_id) {
4008 case 0x83847632: /* STAC9202 */
4009 case 0x83847633: /* STAC9202D */
4010 case 0x83847636: /* STAC9251 */
4011 case 0x83847637: /* STAC9251D */
f6e9852a 4012 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4013 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4014 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4015 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4016 break;
4017 default:
4018 spec->num_dmics = 0;
4019 break;
4020 }
8e21c34c
TD		 4021
4022 spec->init = stac925x_core_init;
4023 spec->mixer = stac925x_mixer;
4024
4025 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4026 if (!err) {
4027 if (spec->board_config < 0) {
4028 printk(KERN_WARNING "hda_codec: No auto-config is "
4029 "available, default to model=ref\n");
4030 spec->board_config = STAC_925x_REF;
4031 goto again;
4032 }
4033 err = -EINVAL;
4034 }
8e21c34c
TD		 4035 if (err < 0) {
4036 stac92xx_free(codec);
4037 return err;
4038 }
4039
4040 codec->patch_ops = stac92xx_patch_ops;
4041
4042 return 0;
4043}
4044
e1f0d669
MR		 4045static struct hda_input_mux stac92hd73xx_dmux = {
4046 .num_items = 4,
4047 .items = {
4048 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4049 { "Digital Mic 1", 0x09 },
4050 { "Digital Mic 2", 0x0a },
2a9c7816 4051 { "CD", 0x08 },
e1f0d669
MR		 4052 }
4053};
4054
4055static int patch_stac92hd73xx(struct hda_codec *codec)
4056{
4057 struct sigmatel_spec *spec;
4058 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4059 int err = 0;
4060
4061 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4062 if (spec == NULL)
4063 return -ENOMEM;
4064
4065 codec->spec = spec;
e99d32b3 4066 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4067 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4068 spec->pin_nids = stac92hd73xx_pin_nids;
4069 spec->board_config = snd_hda_check_board_config(codec,
4070 STAC_92HD73XX_MODELS,
4071 stac92hd73xx_models,
4072 stac92hd73xx_cfg_tbl);
4073again:
4074 if (spec->board_config < 0) {
4075 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4076 " STAC92HD73XX, using BIOS defaults\n");
4077 err = stac92xx_save_bios_config_regs(codec);
4078 if (err < 0) {
4079 stac92xx_free(codec);
4080 return err;
4081 }
4082 spec->pin_configs = spec->bios_pin_configs;
4083 } else {
4084 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
4085 stac92xx_set_config_regs(codec);
4086 }
4087
4088 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4089 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4090
4091 if (spec->multiout.num_dacs < 0) {
4092 printk(KERN_WARNING "hda_codec: Could not determine "
4093 "number of channels defaulting to DAC count\n");
4094 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4095 }
4096
4097 switch (spec->multiout.num_dacs) {
4098 case 0x3: /* 6 Channel */
4099 spec->mixer = stac92hd73xx_6ch_mixer;
4100 spec->init = stac92hd73xx_6ch_core_init;
4101 break;
4102 case 0x4: /* 8 Channel */
e1f0d669
MR		 4103 spec->mixer = stac92hd73xx_8ch_mixer;
4104 spec->init = stac92hd73xx_8ch_core_init;
4105 break;
4106 case 0x5: /* 10 Channel */
e1f0d669
MR		 4107 spec->mixer = stac92hd73xx_10ch_mixer;
4108 spec->init = stac92hd73xx_10ch_core_init;
4109 };
4110
4111 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4112 spec->aloopback_mask = 0x01;
4113 spec->aloopback_shift = 8;
4114
1cd2224c 4115 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4116 spec->mux_nids = stac92hd73xx_mux_nids;
4117 spec->adc_nids = stac92hd73xx_adc_nids;
4118 spec->dmic_nids = stac92hd73xx_dmic_nids;
4119 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4120 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4121 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4122 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4123
4124 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4125 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4126 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4127 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4128 sizeof(stac92hd73xx_dmux));
4129
a7662640
MR		 4130 switch (spec->board_config) {
4131 case STAC_DELL_M6:
d654a660 4132 spec->init = dell_eq_core_init;
2a9c7816 4133 spec->num_smuxes = 0;
2a9c7816
MR		 4134 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4135 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
4136 spec->num_amps = 1;
a7662640
MR		 4137 switch (codec->subsystem_id) {
4138 case 0x1028025e: /* Analog Mics */
4139 case 0x1028025f:
4140 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4141 spec->num_dmics = 0;
2a9c7816 4142 spec->private_dimux.num_items = 1;
a7662640 4143 break;
d654a660 4144 case 0x10280271: /* Digital Mics */
a7662640 4145 case 0x10280272:
d654a660
MR		 4146 spec->init = dell_m6_core_init;
4147 /* fall-through */
4148 case 0x10280254:
4149 case 0x10280255:
a7662640
MR		 4150 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4151 spec->num_dmics = 1;
2a9c7816 4152 spec->private_dimux.num_items = 2;
a7662640
MR		 4153 break;
4154 case 0x10280256: /* Both */
4155 case 0x10280057:
4156 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4157 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4158 spec->num_dmics = 1;
2a9c7816 4159 spec->private_dimux.num_items = 2;
a7662640
MR		 4160 break;
4161 }
4162 break;
4163 default:
4164 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4165 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
a7662640 4166 }
b2c4f4d7
MR		 4167 if (spec->board_config > STAC_92HD73XX_REF) {
4168 /* GPIO0 High = Enable EAPD */
4169 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4170 spec->gpio_data = 0x01;
4171 }
2a9c7816 4172 spec->dinput_mux = &spec->private_dimux;
a7662640 4173
a64135a2
MR		 4174 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4175 spec->pwr_nids = stac92hd73xx_pwr_nids;
4176
d9737751 4177 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4178
4179 if (!err) {
4180 if (spec->board_config < 0) {
4181 printk(KERN_WARNING "hda_codec: No auto-config is "
4182 "available, default to model=ref\n");
4183 spec->board_config = STAC_92HD73XX_REF;
4184 goto again;
4185 }
4186 err = -EINVAL;
4187 }
4188
4189 if (err < 0) {
4190 stac92xx_free(codec);
4191 return err;
4192 }
4193
4194 codec->patch_ops = stac92xx_patch_ops;
4195
4196 return 0;
4197}
4198
d0513fc6
MR		 4199static struct hda_input_mux stac92hd83xxx_dmux = {
4200 .num_items = 3,
4201 .items = {
4202 { "Analog Inputs", 0x03 },
4203 { "Digital Mic 1", 0x04 },
4204 { "Digital Mic 2", 0x05 },
4205 }
4206};
4207
4208static int patch_stac92hd83xxx(struct hda_codec *codec)
4209{
4210 struct sigmatel_spec *spec;
4211 int err;
4212
4213 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4214 if (spec == NULL)
4215 return -ENOMEM;
4216
4217 codec->spec = spec;
0ffa9807 4218 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4219 spec->mono_nid = 0x19;
4220 spec->digbeep_nid = 0x21;
4221 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4222 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4223 spec->adc_nids = stac92hd83xxx_adc_nids;
4224 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4225 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4226 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4227 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4228
4229 spec->init = stac92hd83xxx_core_init;
4230 switch (codec->vendor_id) {
4231 case 0x111d7605:
4232 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4233 break;
4234 default:
4235 spec->num_pwrs--;
4236 spec->init++; /* switch to config #2 */
4237 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4238 }
4239
4240 spec->mixer = stac92hd83xxx_mixer;
4241 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4242 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4243 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4244 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4245 spec->dinput_mux = &stac92hd83xxx_dmux;
4246 spec->pin_nids = stac92hd83xxx_pin_nids;
4247 spec->board_config = snd_hda_check_board_config(codec,
4248 STAC_92HD83XXX_MODELS,
4249 stac92hd83xxx_models,
4250 stac92hd83xxx_cfg_tbl);
4251again:
4252 if (spec->board_config < 0) {
4253 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4254 " STAC92HD83XXX, using BIOS defaults\n");
4255 err = stac92xx_save_bios_config_regs(codec);
4256 if (err < 0) {
4257 stac92xx_free(codec);
4258 return err;
4259 }
4260 spec->pin_configs = spec->bios_pin_configs;
4261 } else {
4262 spec->pin_configs = stac92hd83xxx_brd_tbl[spec->board_config];
4263 stac92xx_set_config_regs(codec);
4264 }
4265
4266 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4267 if (!err) {
4268 if (spec->board_config < 0) {
4269 printk(KERN_WARNING "hda_codec: No auto-config is "
4270 "available, default to model=ref\n");
4271 spec->board_config = STAC_92HD83XXX_REF;
4272 goto again;
4273 }
4274 err = -EINVAL;
4275 }
4276
4277 if (err < 0) {
4278 stac92xx_free(codec);
4279 return err;
4280 }
4281
4282 codec->patch_ops = stac92xx_patch_ops;
4283
4284 return 0;
4285}
4286
8daaaa97
MR		 4287#ifdef SND_HDA_NEEDS_RESUME
4288static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4289{
4290 struct sigmatel_spec *spec = codec->spec;
4291 int i;
4292 snd_hda_codec_write_cache(codec, codec->afg, 0,
4293 AC_VERB_SET_POWER_STATE, pwr);
4294
4295 msleep(1);
4296 for (i = 0; i < spec->num_adcs; i++) {
4297 snd_hda_codec_write_cache(codec,
4298 spec->adc_nids[i], 0,
4299 AC_VERB_SET_POWER_STATE, pwr);
4300 }
4301};
4302
4303static int stac92hd71xx_resume(struct hda_codec *codec)
4304{
4305 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4306 return stac92xx_resume(codec);
4307}
4308
4309static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4310{
4311 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
4312 return 0;
4313};
4314
4315#endif
4316
4317static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4318 .build_controls = stac92xx_build_controls,
4319 .build_pcms = stac92xx_build_pcms,
4320 .init = stac92xx_init,
4321 .free = stac92xx_free,
4322 .unsol_event = stac92xx_unsol_event,
4323#ifdef SND_HDA_NEEDS_RESUME
4324 .resume = stac92hd71xx_resume,
4325 .suspend = stac92hd71xx_suspend,
4326#endif
4327};
d0513fc6 4328
4b33c767
MR		 4329static struct hda_input_mux stac92hd71bxx_dmux = {
4330 .num_items = 4,
4331 .items = {
4332 { "Analog Inputs", 0x00 },
4333 { "Mixer", 0x01 },
4334 { "Digital Mic 1", 0x02 },
4335 { "Digital Mic 2", 0x03 },
4336 }
4337};
4338
e035b841
MR		 4339static int patch_stac92hd71bxx(struct hda_codec *codec)
4340{
4341 struct sigmatel_spec *spec;
4342 int err = 0;
4343
4344 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4345 if (spec == NULL)
4346 return -ENOMEM;
4347
4348 codec->spec = spec;
8daaaa97 4349 codec->patch_ops = stac92xx_patch_ops;
e035b841 4350 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4351 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4352 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4353 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4354 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4355 spec->board_config = snd_hda_check_board_config(codec,
4356 STAC_92HD71BXX_MODELS,
4357 stac92hd71bxx_models,
4358 stac92hd71bxx_cfg_tbl);
4359again:
4360 if (spec->board_config < 0) {
4361 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4362 " STAC92HD71BXX, using BIOS defaults\n");
4363 err = stac92xx_save_bios_config_regs(codec);
4364 if (err < 0) {
4365 stac92xx_free(codec);
4366 return err;
4367 }
4368 spec->pin_configs = spec->bios_pin_configs;
4369 } else {
4370 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
4371 stac92xx_set_config_regs(codec);
4372 }
4373
541eee87
MR		 4374 switch (codec->vendor_id) {
4375 case 0x111d76b6: /* 4 Port without Analog Mixer */
4376 case 0x111d76b7:
4377 case 0x111d76b4: /* 6 Port without Analog Mixer */
4378 case 0x111d76b5:
4379 spec->mixer = stac92hd71bxx_mixer;
4380 spec->init = stac92hd71bxx_core_init;
0ffa9807 4381 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4382 break;
aafc4412 4383 case 0x111d7608: /* 5 Port with Analog Mixer */
72474be6
MR		 4384 switch (codec->subsystem_id) {
4385 case 0x103c361a:
4386 /* Enable VREF power saving on GPIO1 detect */
4387 snd_hda_codec_write(codec, codec->afg, 0,
4388 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4389 snd_hda_codec_write_cache(codec, codec->afg, 0,
4390 AC_VERB_SET_UNSOLICITED_ENABLE,
4391 (AC_USRSP_EN | STAC_VREF_EVENT | 0x01));
4392 spec->gpio_mask |= 0x02;
4393 break;
4394 }
8daaaa97
MR		 4395 if ((codec->revision_id & 0xf) == 0 ||
4396 (codec->revision_id & 0xf) == 1) {
4397#ifdef SND_HDA_NEEDS_RESUME
4398 codec->patch_ops = stac92hd71bxx_patch_ops;
4399#endif
4400 spec->stream_delay = 40; /* 40 milliseconds */
4401 }
4402
aafc4412
MR		 4403 /* no output amps */
4404 spec->num_pwrs = 0;
4405 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4406 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4407
4408 /* disable VSW */
4409 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
4410 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
4411 break;
4412 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4413 if ((codec->revision_id & 0xf) == 1) {
4414#ifdef SND_HDA_NEEDS_RESUME
4415 codec->patch_ops = stac92hd71bxx_patch_ops;
4416#endif
4417 spec->stream_delay = 40; /* 40 milliseconds */
4418 }
4419
aafc4412
MR		 4420 /* no output amps */
4421 spec->num_pwrs = 0;
4422 /* fallthru */
541eee87 4423 default:
4b33c767 4424 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4425 spec->mixer = stac92hd71bxx_analog_mixer;
4426 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4427 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4428 }
4429
4b33c767 4430 spec->aloopback_mask = 0x50;
541eee87
MR		 4431 spec->aloopback_shift = 0;
4432
b2c4f4d7
MR		 4433 if (spec->board_config > STAC_92HD71BXX_REF) {
4434 /* GPIO0 = EAPD */
4435 spec->gpio_mask = 0x01;
4436 spec->gpio_dir = 0x01;
4437 spec->gpio_data = 0x01;
4438 }
e035b841 4439
8daaaa97 4440 spec->powerdown_adcs = 1;
1cd2224c 4441 spec->digbeep_nid = 0x26;
e035b841
MR		 4442 spec->mux_nids = stac92hd71bxx_mux_nids;
4443 spec->adc_nids = stac92hd71bxx_adc_nids;
4444 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4445 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4446 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4447 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4448
4449 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4450 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4451
6a14f585
MR		 4452 switch (spec->board_config) {
4453 case STAC_HP_M4:
4454 spec->num_dmics = 0;
b9aea715 4455 spec->num_smuxes = 0;
6a14f585
MR		 4456 spec->num_dmuxes = 0;
4457
4458 /* enable internal microphone */
b9aea715
MR		 4459 stac92xx_set_config_reg(codec, 0x0e, 0x01813040);
4460 stac92xx_auto_set_pinctl(codec, 0x0e,
4461 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
6a14f585
MR		 4462 break;
4463 default:
4464 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4465 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4466 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4467 };
4468
aea7bb0a 4469 spec->multiout.num_dacs = 1;
e035b841
MR		 4470 spec->multiout.hp_nid = 0x11;
4471 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4b33c767
MR		 4472 if (spec->dinput_mux)
4473 spec->private_dimux.num_items +=
4474 spec->num_dmics -
4475 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4476
4477 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4478 if (!err) {
4479 if (spec->board_config < 0) {
4480 printk(KERN_WARNING "hda_codec: No auto-config is "
4481 "available, default to model=ref\n");
4482 spec->board_config = STAC_92HD71BXX_REF;
4483 goto again;
4484 }
4485 err = -EINVAL;
4486 }
4487
4488 if (err < 0) {
4489 stac92xx_free(codec);
4490 return err;
4491 }
4492
e035b841
MR		 4493 return 0;
4494};
4495
2f2f4251
M		 4496static int patch_stac922x(struct hda_codec *codec)
4497{
4498 struct sigmatel_spec *spec;
c7d4b2fa 4499 int err;
2f2f4251 4500
e560d8d8 4501 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4502 if (spec == NULL)
4503 return -ENOMEM;
4504
4505 codec->spec = spec;
a4eed138 4506 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4507 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4508 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4509 stac922x_models,
4510 stac922x_cfg_tbl);
536319af 4511 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4512 spec->gpio_mask = spec->gpio_dir = 0x03;
4513 spec->gpio_data = 0x03;
3fc24d85
TI		 4514 /* Intel Macs have all same PCI SSID, so we need to check
4515 * codec SSID to distinguish the exact models
4516 */
6f0778d8 4517 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4518 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4519
4520 case 0x106b0800:
4521 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4522 break;
5d5d3bc3
IZ		 4523 case 0x106b0600:
4524 case 0x106b0700:
4525 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4526 break;
5d5d3bc3
IZ		 4527 case 0x106b0e00:
4528 case 0x106b0f00:
4529 case 0x106b1600:
4530 case 0x106b1700:
4531 case 0x106b0200:
4532 case 0x106b1e00:
4533 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4534 break;
5d5d3bc3
IZ		 4535 case 0x106b1a00:
4536 case 0x00000100:
4537 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4538 break;
5d5d3bc3
IZ		 4539 case 0x106b0a00:
4540 case 0x106b2200:
4541 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4542 break;
536319af
NB		 4543 default:
4544 spec->board_config = STAC_INTEL_MAC_V3;
4545 break;
3fc24d85
TI		 4546 }
4547 }
4548
9e507abd 4549 again:
11b44bbd
RF		 4550 if (spec->board_config < 0) {
4551 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4552 "using BIOS defaults\n");
4553 err = stac92xx_save_bios_config_regs(codec);
4554 if (err < 0) {
4555 stac92xx_free(codec);
4556 return err;
4557 }
4558 spec->pin_configs = spec->bios_pin_configs;
4559 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 4560 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
4561 stac92xx_set_config_regs(codec);
4562 }
2f2f4251 4563
c7d4b2fa
M		 4564 spec->adc_nids = stac922x_adc_nids;
4565 spec->mux_nids = stac922x_mux_nids;
2549413e 4566 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4567 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4568 spec->num_dmics = 0;
a64135a2 4569 spec->num_pwrs = 0;
c7d4b2fa
M		 4570
4571 spec->init = stac922x_core_init;
2f2f4251 4572 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4573
4574 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4575
3cc08dc6 4576 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4577 if (!err) {
4578 if (spec->board_config < 0) {
4579 printk(KERN_WARNING "hda_codec: No auto-config is "
4580 "available, default to model=ref\n");
4581 spec->board_config = STAC_D945_REF;
4582 goto again;
4583 }
4584 err = -EINVAL;
4585 }
3cc08dc6
MP		 4586 if (err < 0) {
4587 stac92xx_free(codec);
4588 return err;
4589 }
4590
4591 codec->patch_ops = stac92xx_patch_ops;
4592
807a4636
TI		 4593 /* Fix Mux capture level; max to 2 */
4594 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4595 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4596 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4597 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4598 (0 << AC_AMPCAP_MUTE_SHIFT));
4599
3cc08dc6
MP		 4600 return 0;
4601}
4602
4603static int patch_stac927x(struct hda_codec *codec)
4604{
4605 struct sigmatel_spec *spec;
4606 int err;
4607
4608 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4609 if (spec == NULL)
4610 return -ENOMEM;
4611
4612 codec->spec = spec;
a4eed138 4613 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4614 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4615 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4616 stac927x_models,
4617 stac927x_cfg_tbl);
9e507abd 4618 again:
8e9068b1
MR		 4619 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4620 if (spec->board_config < 0)
4621 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4622 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 4623 err = stac92xx_save_bios_config_regs(codec);
4624 if (err < 0) {
4625 stac92xx_free(codec);
4626 return err;
4627 }
4628 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 4629 } else {
3cc08dc6
MP		 4630 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
4631 stac92xx_set_config_regs(codec);
4632 }
4633
1cd2224c 4634 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4635 spec->adc_nids = stac927x_adc_nids;
4636 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4637 spec->mux_nids = stac927x_mux_nids;
4638 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 4639 spec->smux_nids = stac927x_smux_nids;
4640 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 4641 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 4642 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4643 spec->multiout.dac_nids = spec->dac_nids;
4644
81d3dbde 4645 switch (spec->board_config) {
93ed1503 4646 case STAC_D965_3ST:
93ed1503 4647 case STAC_D965_5ST:
8e9068b1 4648 /* GPIO0 High = Enable EAPD */
0fc9dec4 4649 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4650 spec->gpio_data = 0x01;
8e9068b1
MR		 4651 spec->num_dmics = 0;
4652
93ed1503 4653 spec->init = d965_core_init;
9e05b7a3 4654 spec->mixer = stac927x_mixer;
81d3dbde 4655 break;
8e9068b1 4656 case STAC_DELL_BIOS:
780c8be4
MR		 4657 switch (codec->subsystem_id) {
4658 case 0x10280209:
4659 case 0x1028022e:
4660 /* correct the device field to SPDIF out */
4661 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
4662 break;
4663 };
03d7ca17
MR		 4664 /* configure the analog microphone on some laptops */
4665 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 4666 /* correct the front output jack as a hp out */
7989fba9 4667 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 4668 /* correct the front input jack as a mic */
4669 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
4670 /* fallthru */
8e9068b1
MR		 4671 case STAC_DELL_3ST:
4672 /* GPIO2 High = Enable EAPD */
0fc9dec4 4673 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4674 spec->gpio_data = 0x04;
7f16859a
MR		 4675 spec->dmic_nids = stac927x_dmic_nids;
4676 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4677
8e9068b1
MR		 4678 spec->init = d965_core_init;
4679 spec->mixer = stac927x_mixer;
4680 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4681 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4682 break;
4683 default:
b2c4f4d7
MR		 4684 if (spec->board_config > STAC_D965_REF) {
4685 /* GPIO0 High = Enable EAPD */
4686 spec->eapd_mask = spec->gpio_mask = 0x01;
4687 spec->gpio_dir = spec->gpio_data = 0x01;
4688 }
8e9068b1
MR		 4689 spec->num_dmics = 0;
4690
4691 spec->init = stac927x_core_init;
4692 spec->mixer = stac927x_mixer;
7f16859a
MR		 4693 }
4694
a64135a2 4695 spec->num_pwrs = 0;
e1f0d669
MR		 4696 spec->aloopback_mask = 0x40;
4697 spec->aloopback_shift = 0;
8e9068b1 4698
3cc08dc6 4699 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 4700 if (!err) {
4701 if (spec->board_config < 0) {
4702 printk(KERN_WARNING "hda_codec: No auto-config is "
4703 "available, default to model=ref\n");
4704 spec->board_config = STAC_D965_REF;
4705 goto again;
4706 }
4707 err = -EINVAL;
4708 }
c7d4b2fa
M		 4709 if (err < 0) {
4710 stac92xx_free(codec);
4711 return err;
4712 }
2f2f4251
M		 4713
4714 codec->patch_ops = stac92xx_patch_ops;
4715
52987656
TI		 4716 /*
4717 * !!FIXME!!
4718 * The STAC927x seem to require fairly long delays for certain
4719 * command sequences. With too short delays (even if the answer
4720 * is set to RIRB properly), it results in the silence output
4721 * on some hardwares like Dell.
4722 *
4723 * The below flag enables the longer delay (see get_response
4724 * in hda_intel.c).
4725 */
4726 codec->bus->needs_damn_long_delay = 1;
4727
2f2f4251
M		 4728 return 0;
4729}
4730
f3302a59
MP		 4731static int patch_stac9205(struct hda_codec *codec)
4732{
4733 struct sigmatel_spec *spec;
8259980e 4734 int err;
f3302a59
MP		 4735
4736 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4737 if (spec == NULL)
4738 return -ENOMEM;
4739
4740 codec->spec = spec;
a4eed138 4741 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 4742 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 4743 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
4744 stac9205_models,
4745 stac9205_cfg_tbl);
9e507abd 4746 again:
11b44bbd
RF		 4747 if (spec->board_config < 0) {
4748 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
4749 err = stac92xx_save_bios_config_regs(codec);
4750 if (err < 0) {
4751 stac92xx_free(codec);
4752 return err;
4753 }
4754 spec->pin_configs = spec->bios_pin_configs;
4755 } else {
f3302a59
MP		 4756 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
4757 stac92xx_set_config_regs(codec);
4758 }
4759
1cd2224c 4760 spec->digbeep_nid = 0x23;
f3302a59 4761 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 4762 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 4763 spec->mux_nids = stac9205_mux_nids;
2549413e 4764 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 4765 spec->smux_nids = stac9205_smux_nids;
4766 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 4767 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 4768 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 4769 spec->dmux_nids = stac9205_dmux_nids;
1697055e 4770 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 4771 spec->num_pwrs = 0;
f3302a59
MP		 4772
4773 spec->init = stac9205_core_init;
4774 spec->mixer = stac9205_mixer;
4775
e1f0d669
MR		 4776 spec->aloopback_mask = 0x40;
4777 spec->aloopback_shift = 0;
f3302a59 4778 spec->multiout.dac_nids = spec->dac_nids;
87d48363 4779
ae0a8ed8 4780 switch (spec->board_config){
ae0a8ed8 4781 case STAC_9205_DELL_M43:
87d48363
MR		 4782 /* Enable SPDIF in/out */
4783 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4784 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4785
4fe5195c
MR		 4786 /* Enable unsol response for GPIO4/Dock HP connection */
4787 snd_hda_codec_write(codec, codec->afg, 0,
4788 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4789 snd_hda_codec_write_cache(codec, codec->afg, 0,
4790 AC_VERB_SET_UNSOLICITED_ENABLE,
4791 (AC_USRSP_EN | STAC_HP_EVENT));
4792
4793 spec->gpio_dir = 0x0b;
0fc9dec4 4794 spec->eapd_mask = 0x01;
4fe5195c
MR		 4795 spec->gpio_mask = 0x1b;
4796 spec->gpio_mute = 0x10;
e2e7d624 4797 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4798 * GPIO3 Low = DRM
87d48363 4799 */
4fe5195c 4800 spec->gpio_data = 0x01;
ae0a8ed8 4801 break;
b2c4f4d7
MR		 4802 case STAC_9205_REF:
4803 /* SPDIF-In enabled */
4804 break;
ae0a8ed8
TD		 4805 default:
4806 /* GPIO0 High = EAPD */
0fc9dec4 4807 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4808 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4809 break;
4810 }
33382403 4811
f3302a59 4812 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 4813 if (!err) {
4814 if (spec->board_config < 0) {
4815 printk(KERN_WARNING "hda_codec: No auto-config is "
4816 "available, default to model=ref\n");
4817 spec->board_config = STAC_9205_REF;
4818 goto again;
4819 }
4820 err = -EINVAL;
4821 }
f3302a59
MP		 4822 if (err < 0) {
4823 stac92xx_free(codec);
4824 return err;
4825 }
4826
4827 codec->patch_ops = stac92xx_patch_ops;
4828
4829 return 0;
4830}
4831
db064e50 4832/*
6d859065 4833 * STAC9872 hack
db064e50
TI		 4834 */
4835
99ccc560 4836/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 4837static hda_nid_t vaio_dacs[] = { 0x2 };
4838#define VAIO_HP_DAC 0x5
4839static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
4840static hda_nid_t vaio_mux_nids[] = { 0x15 };
4841
4842static struct hda_input_mux vaio_mux = {
a3a2f429 4843 .num_items = 3,
db064e50 4844 .items = {
d773781c 4845 /* { "HP", 0x0 }, */
1624cb9a
TI		 4846 { "Mic Jack", 0x1 },
4847 { "Internal Mic", 0x2 },
db064e50
TI		 4848 { "PCM", 0x3 },
4849 }
4850};
4851
4852static struct hda_verb vaio_init[] = {
4853 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 4854 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 4855 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4856 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4857 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4858 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4859 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 4860 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4861 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4862 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4863 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4864 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4865 {}
4866};
4867
6d859065
GM		 4868static struct hda_verb vaio_ar_init[] = {
4869 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
4870 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4871 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4872 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4873/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
4874 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4875 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4876 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4877 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4878/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
4879 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4880 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4881 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4882 {}
4883};
4884
db064e50 4885/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4886static struct hda_bind_ctls vaio_bind_master_vol = {
4887 .ops = &snd_hda_bind_vol,
4888 .values = {
4889 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4890 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4891 0
4892 },
4893};
db064e50
TI		 4894
4895/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4896static struct hda_bind_ctls vaio_bind_master_sw = {
4897 .ops = &snd_hda_bind_sw,
4898 .values = {
4899 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4900 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4901 0,
4902 },
4903};
db064e50
TI		 4904
4905static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 4906 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4907 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 4908 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4909 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4910 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4911 {
4912 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4913 .name = "Capture Source",
4914 .count = 1,
4915 .info = stac92xx_mux_enum_info,
4916 .get = stac92xx_mux_enum_get,
4917 .put = stac92xx_mux_enum_put,
4918 },
4919 {}
4920};
4921
6d859065 4922static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 4923 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4924 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 4925 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4926 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4927 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4928 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
4929 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
4930 {
4931 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4932 .name = "Capture Source",
4933 .count = 1,
4934 .info = stac92xx_mux_enum_info,
4935 .get = stac92xx_mux_enum_get,
4936 .put = stac92xx_mux_enum_put,
4937 },
4938 {}
4939};
4940
4941static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 4942 .build_controls = stac92xx_build_controls,
4943 .build_pcms = stac92xx_build_pcms,
4944 .init = stac92xx_init,
4945 .free = stac92xx_free,
cb53c626 4946#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 4947 .resume = stac92xx_resume,
4948#endif
4949};
4950
72e7b0dd
TI		 4951static int stac9872_vaio_init(struct hda_codec *codec)
4952{
4953 int err;
4954
4955 err = stac92xx_init(codec);
4956 if (err < 0)
4957 return err;
4958 if (codec->patch_ops.unsol_event)
4959 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4960 return 0;
4961}
4962
4963static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4964{
40c1d308 4965 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4966 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4967 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4968 } else {
4969 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4970 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4971 }
4972}
4973
4974static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4975{
4976 switch (res >> 26) {
4977 case STAC_HP_EVENT:
4978 stac9872_vaio_hp_detect(codec, res);
4979 break;
4980 }
4981}
4982
4983static struct hda_codec_ops stac9872_vaio_patch_ops = {
4984 .build_controls = stac92xx_build_controls,
4985 .build_pcms = stac92xx_build_pcms,
4986 .init = stac9872_vaio_init,
4987 .free = stac92xx_free,
4988 .unsol_event = stac9872_vaio_unsol_event,
4989#ifdef CONFIG_PM
4990 .resume = stac92xx_resume,
4991#endif
4992};
4993
6d859065
GM		 4994enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
4995 CXD9872RD_VAIO,
4996 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
4997 STAC9872AK_VAIO,
4998 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
4999 STAC9872K_VAIO,
5000 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5001 CXD9872AKD_VAIO,
5002 STAC_9872_MODELS,
5003};
5004
5005static const char *stac9872_models[STAC_9872_MODELS] = {
5006 [CXD9872RD_VAIO] = "vaio",
5007 [CXD9872AKD_VAIO] = "vaio-ar",
5008};
5009
5010static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5011 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5012 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5013 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5014 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5015 {}
5016};
5017
6d859065 5018static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5019{
5020 struct sigmatel_spec *spec;
5021 int board_config;
5022
f5fcc13c
TI		 5023 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5024 stac9872_models,
5025 stac9872_cfg_tbl);
db064e50
TI		 5026 if (board_config < 0)
5027 /* unknown config, let generic-parser do its job... */
5028 return snd_hda_parse_generic_codec(codec);
5029
5030 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5031 if (spec == NULL)
5032 return -ENOMEM;
5033
5034 codec->spec = spec;
5035 switch (board_config) {
6d859065
GM		 5036 case CXD9872RD_VAIO:
5037 case STAC9872AK_VAIO:
5038 case STAC9872K_VAIO:
db064e50
TI		 5039 spec->mixer = vaio_mixer;
5040 spec->init = vaio_init;
5041 spec->multiout.max_channels = 2;
5042 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5043 spec->multiout.dac_nids = vaio_dacs;
5044 spec->multiout.hp_nid = VAIO_HP_DAC;
5045 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5046 spec->adc_nids = vaio_adcs;
a64135a2 5047 spec->num_pwrs = 0;
db064e50
TI		 5048 spec->input_mux = &vaio_mux;
5049 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5050 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5051 break;
6d859065
GM		 5052
5053 case CXD9872AKD_VAIO:
5054 spec->mixer = vaio_ar_mixer;
5055 spec->init = vaio_ar_init;
5056 spec->multiout.max_channels = 2;
5057 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5058 spec->multiout.dac_nids = vaio_dacs;
5059 spec->multiout.hp_nid = VAIO_HP_DAC;
5060 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5061 spec->num_pwrs = 0;
6d859065
GM		 5062 spec->adc_nids = vaio_adcs;
5063 spec->input_mux = &vaio_mux;
5064 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5065 codec->patch_ops = stac9872_patch_ops;
6d859065 5066 break;
db064e50
TI		 5067 }
5068
db064e50
TI		 5069 return 0;
5070}
5071
5072
2f2f4251
M		 5073/*
5074 * patch entries
5075 */
5076struct hda_codec_preset snd_hda_preset_sigmatel[] = {
5077 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5078 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5079 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5080 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5081 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5082 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5083 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5084 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5085 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5086 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5087 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5088 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5089 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5090 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5091 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5092 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5093 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5094 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5095 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5096 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5097 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5098 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5099 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5100 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5101 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5102 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5103 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5104 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5105 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5106 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5107 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5108 /* The following does not take into account .id=0x83847661 when subsys =
5109 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5110 * currently not fully supported.
5111 */
5112 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5113 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5114 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5115 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5116 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5117 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5118 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5119 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5120 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5121 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5122 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5123 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5124 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5125 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5126 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5127 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5128 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5129 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5130 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5131 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5132 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5133 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5134 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5135 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5136 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5137 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5138 {} /* terminator */
5139};
Linux 6.x block layer and io_uring tree(s)