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ALSA: compress_core: integer overflow in snd_compr_allocate_buffer()
[linux-block.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
da155d5b 32#include <linux/module.h>
2f2f4251 33#include <sound/core.h>
c7d4b2fa 34#include <sound/asoundef.h>
45a6ac16 35#include <sound/jack.h>
a74ccea5 36#include <sound/tlv.h>
2f2f4251
M		 37#include "hda_codec.h"
38#include "hda_local.h"
128bc4ba 39#include "hda_auto_parser.h"
1cd2224c 40#include "hda_beep.h"
1835a0f9 41#include "hda_jack.h"
2f2f4251 42
c6e4c666
TI		 43enum {
44 STAC_VREF_EVENT = 1,
45 STAC_INSERT_EVENT,
46 STAC_PWR_EVENT,
47 STAC_HP_EVENT,
fefd67f3 48 STAC_LO_EVENT,
3d21d3f7 49 STAC_MIC_EVENT,
c6e4c666 50};
4e55096e 51
f5fcc13c 52enum {
1607b8ea 53 STAC_AUTO,
f5fcc13c 54 STAC_REF,
bf277785 55 STAC_9200_OQO,
dfe495d0
TI		 56 STAC_9200_DELL_D21,
57 STAC_9200_DELL_D22,
58 STAC_9200_DELL_D23,
59 STAC_9200_DELL_M21,
60 STAC_9200_DELL_M22,
61 STAC_9200_DELL_M23,
62 STAC_9200_DELL_M24,
63 STAC_9200_DELL_M25,
64 STAC_9200_DELL_M26,
65 STAC_9200_DELL_M27,
58eec423
MCC		 66 STAC_9200_M4,
67 STAC_9200_M4_2,
117f257d 68 STAC_9200_PANASONIC,
f5fcc13c
TI		 69 STAC_9200_MODELS
70};
71
72enum {
1607b8ea 73 STAC_9205_AUTO,
f5fcc13c 74 STAC_9205_REF,
dfe495d0 75 STAC_9205_DELL_M42,
ae0a8ed8
TD		 76 STAC_9205_DELL_M43,
77 STAC_9205_DELL_M44,
d9a4268e 78 STAC_9205_EAPD,
f5fcc13c
TI		 79 STAC_9205_MODELS
80};
81
e1f0d669 82enum {
1607b8ea 83 STAC_92HD73XX_AUTO,
9e43f0de 84 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 85 STAC_92HD73XX_REF,
ae709440 86 STAC_92HD73XX_INTEL,
661cd8fb
TI		 87 STAC_DELL_M6_AMIC,
88 STAC_DELL_M6_DMIC,
89 STAC_DELL_M6_BOTH,
6b3ab21e 90 STAC_DELL_EQ,
842ae638 91 STAC_ALIENWARE_M17X,
e1f0d669
MR		 92 STAC_92HD73XX_MODELS
93};
94
d0513fc6 95enum {
1607b8ea 96 STAC_92HD83XXX_AUTO,
d0513fc6 97 STAC_92HD83XXX_REF,
32ed3f46 98 STAC_92HD83XXX_PWR_REF,
8bb0ac55 99 STAC_DELL_S14,
f7f9bdfa 100 STAC_DELL_VOSTRO_3500,
0c27c180 101 STAC_92HD83XXX_HP_cNB11_INTQUAD,
48315590 102 STAC_HP_DV7_4000,
5556e147 103 STAC_HP_ZEPHYR,
a3e19973 104 STAC_92HD83XXX_HP_LED,
ff8a1e27 105 STAC_92HD83XXX_HP_INV_LED,
d0513fc6
MR		 106 STAC_92HD83XXX_MODELS
107};
108
e035b841 109enum {
1607b8ea 110 STAC_92HD71BXX_AUTO,
e035b841 111 STAC_92HD71BXX_REF,
a7662640
MR		 112 STAC_DELL_M4_1,
113 STAC_DELL_M4_2,
3a7abfd2 114 STAC_DELL_M4_3,
6a14f585 115 STAC_HP_M4,
2a6ce6e5 116 STAC_HP_DV4,
1b0652eb 117 STAC_HP_DV5,
ae6241fb 118 STAC_HP_HDX,
514bf54c 119 STAC_HP_DV4_1222NR,
e035b841
MR		 120 STAC_92HD71BXX_MODELS
121};
122
8e21c34c 123enum {
1607b8ea 124 STAC_925x_AUTO,
8e21c34c 125 STAC_925x_REF,
9cb36c2a
MCC		 126 STAC_M1,
127 STAC_M1_2,
128 STAC_M2,
8e21c34c 129 STAC_M2_2,
9cb36c2a
MCC		 130 STAC_M3,
131 STAC_M5,
132 STAC_M6,
8e21c34c
TD		 133 STAC_925x_MODELS
134};
135
f5fcc13c 136enum {
1607b8ea 137 STAC_922X_AUTO,
f5fcc13c
TI		 138 STAC_D945_REF,
139 STAC_D945GTP3,
140 STAC_D945GTP5,
5d5d3bc3
IZ		 141 STAC_INTEL_MAC_V1,
142 STAC_INTEL_MAC_V2,
143 STAC_INTEL_MAC_V3,
144 STAC_INTEL_MAC_V4,
145 STAC_INTEL_MAC_V5,
536319af
NB		 146 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
147 * is given, one of the above models will be
148 * chosen according to the subsystem id. */
dfe495d0 149 /* for backward compatibility */
f5fcc13c 150 STAC_MACMINI,
3fc24d85 151 STAC_MACBOOK,
6f0778d8
NB		 152 STAC_MACBOOK_PRO_V1,
153 STAC_MACBOOK_PRO_V2,
f16928fb 154 STAC_IMAC_INTEL,
0dae0f83 155 STAC_IMAC_INTEL_20,
8c650087 156 STAC_ECS_202,
dfe495d0
TI		 157 STAC_922X_DELL_D81,
158 STAC_922X_DELL_D82,
159 STAC_922X_DELL_M81,
160 STAC_922X_DELL_M82,
f5fcc13c
TI		 161 STAC_922X_MODELS
162};
163
164enum {
1607b8ea 165 STAC_927X_AUTO,
e28d8322 166 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 167 STAC_D965_REF,
168 STAC_D965_3ST,
169 STAC_D965_5ST,
679d92ed 170 STAC_D965_5ST_NO_FP,
4ff076e5 171 STAC_DELL_3ST,
8e9068b1 172 STAC_DELL_BIOS,
54930531 173 STAC_927X_VOLKNOB,
f5fcc13c
TI		 174 STAC_927X_MODELS
175};
403d1944 176
307282c8
TI		 177enum {
178 STAC_9872_AUTO,
179 STAC_9872_VAIO,
180 STAC_9872_MODELS
181};
182
3d21d3f7
TI		 183struct sigmatel_mic_route {
184 hda_nid_t pin;
02d33322
TI		 185 signed char mux_idx;
186 signed char dmux_idx;
3d21d3f7
TI		 187};
188
699d8995
VK		 189#define MAX_PINS_NUM 16
190#define MAX_ADCS_NUM 4
191#define MAX_DMICS_NUM 4
192
2f2f4251 193struct sigmatel_spec {
c8b6bf9b 194 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 195 unsigned int num_mixers;
196
403d1944 197 int board_config;
c0cea0d0 198 unsigned int eapd_switch: 1;
c7d4b2fa 199 unsigned int surr_switch: 1;
3cc08dc6 200 unsigned int alt_switch: 1;
82bc955f 201 unsigned int hp_detect: 1;
00ef50c2 202 unsigned int spdif_mute: 1;
7c7767eb 203 unsigned int check_volume_offset:1;
3d21d3f7 204 unsigned int auto_mic:1;
1b0e372d 205 unsigned int linear_tone_beep:1;
c7d4b2fa 206
4fe5195c 207 /* gpio lines */
0fc9dec4 208 unsigned int eapd_mask;
4fe5195c
MR		 209 unsigned int gpio_mask;
210 unsigned int gpio_dir;
211 unsigned int gpio_data;
212 unsigned int gpio_mute;
86d190e7 213 unsigned int gpio_led;
c357aab0 214 unsigned int gpio_led_polarity;
f1a73746 215 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
45eebda7 216 unsigned int vref_led;
4fe5195c 217
8daaaa97
MR		 218 /* stream */
219 unsigned int stream_delay;
220
4fe5195c 221 /* analog loopback */
2b63536f 222 const struct snd_kcontrol_new *aloopback_ctl;
e1f0d669
MR		 223 unsigned char aloopback_mask;
224 unsigned char aloopback_shift;
8259980e 225
a64135a2 226 /* power management */
c882246d 227 unsigned int power_map_bits;
a64135a2 228 unsigned int num_pwrs;
2b63536f
TI		 229 const hda_nid_t *pwr_nids;
230 const hda_nid_t *dac_list;
a64135a2 231
2f2f4251 232 /* playback */
b22b4821
MR		 233 struct hda_input_mux *mono_mux;
234 unsigned int cur_mmux;
2f2f4251 235 struct hda_multi_out multiout;
3cc08dc6 236 hda_nid_t dac_nids[5];
c21ca4a8
TI		 237 hda_nid_t hp_dacs[5];
238 hda_nid_t speaker_dacs[5];
2f2f4251 239
7c7767eb
TI		 240 int volume_offset;
241
2f2f4251 242 /* capture */
2b63536f 243 const hda_nid_t *adc_nids;
2f2f4251 244 unsigned int num_adcs;
2b63536f 245 const hda_nid_t *mux_nids;
dabbed6f 246 unsigned int num_muxes;
2b63536f 247 const hda_nid_t *dmic_nids;
8b65727b 248 unsigned int num_dmics;
2b63536f 249 const hda_nid_t *dmux_nids;
1697055e 250 unsigned int num_dmuxes;
2b63536f 251 const hda_nid_t *smux_nids;
d9737751 252 unsigned int num_smuxes;
5207e10e 253 unsigned int num_analog_muxes;
6479c631 254
2b63536f
TI		 255 const unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */
256 const unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */
6479c631
TI		 257 unsigned int num_caps; /* number of capture volume/switch elements */
258
3d21d3f7
TI		 259 struct sigmatel_mic_route ext_mic;
260 struct sigmatel_mic_route int_mic;
9907790a 261 struct sigmatel_mic_route dock_mic;
3d21d3f7 262
ea734963 263 const char * const *spdif_labels;
d9737751 264
dabbed6f 265 hda_nid_t dig_in_nid;
b22b4821 266 hda_nid_t mono_nid;
1cd2224c
MR		 267 hda_nid_t anabeep_nid;
268 hda_nid_t digbeep_nid;
2f2f4251 269
2f2f4251 270 /* pin widgets */
2b63536f 271 const hda_nid_t *pin_nids;
2f2f4251 272 unsigned int num_pins;
2f2f4251
M		 273
274 /* codec specific stuff */
2b63536f
TI		 275 const struct hda_verb *init;
276 const struct snd_kcontrol_new *mixer;
2f2f4251
M		 277
278 /* capture source */
8b65727b 279 struct hda_input_mux *dinput_mux;
e1f0d669 280 unsigned int cur_dmux[2];
c7d4b2fa 281 struct hda_input_mux *input_mux;
3cc08dc6 282 unsigned int cur_mux[3];
d9737751
MR		 283 struct hda_input_mux *sinput_mux;
284 unsigned int cur_smux[2];
2a9c7816
MR		 285 unsigned int cur_amux;
286 hda_nid_t *amp_nids;
8daaaa97 287 unsigned int powerdown_adcs;
2f2f4251 288
403d1944
MP		 289 /* i/o switches */
290 unsigned int io_switch[2];
0fb87bb4 291 unsigned int clfe_swap;
c21ca4a8
TI		 292 hda_nid_t line_switch; /* shared line-in for input and output */
293 hda_nid_t mic_switch; /* shared mic-in for input and output */
294 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 295 unsigned int aloopback;
2f2f4251 296
c7d4b2fa
M		 297 struct hda_pcm pcm_rec[2]; /* PCM information */
298
299 /* dynamic controls and input_mux */
300 struct auto_pin_cfg autocfg;
603c4019 301 struct snd_array kctls;
8b65727b 302 struct hda_input_mux private_dimux;
c7d4b2fa 303 struct hda_input_mux private_imux;
d9737751 304 struct hda_input_mux private_smux;
b22b4821 305 struct hda_input_mux private_mono_mux;
699d8995
VK		 306
307 /* auto spec */
308 unsigned auto_pin_cnt;
309 hda_nid_t auto_pin_nids[MAX_PINS_NUM];
310 unsigned auto_adc_cnt;
311 hda_nid_t auto_adc_nids[MAX_ADCS_NUM];
312 hda_nid_t auto_mux_nids[MAX_ADCS_NUM];
313 hda_nid_t auto_dmux_nids[MAX_ADCS_NUM];
314 unsigned long auto_capvols[MAX_ADCS_NUM];
315 unsigned auto_dmic_cnt;
316 hda_nid_t auto_dmic_nids[MAX_DMICS_NUM];
2faa3bf1 317
d2f344b5 318 struct hda_vmaster_mute_hook vmaster_mute;
2f2f4251
M		 319};
320
c882246d
TI		 321#define AC_VERB_IDT_SET_POWER_MAP 0x7ec
322#define AC_VERB_IDT_GET_POWER_MAP 0xfec
323
2b63536f 324static const hda_nid_t stac9200_adc_nids[1] = {
2f2f4251
M		 325 0x03,
326};
327
2b63536f 328static const hda_nid_t stac9200_mux_nids[1] = {
2f2f4251
M		 329 0x0c,
330};
331
2b63536f 332static const hda_nid_t stac9200_dac_nids[1] = {
2f2f4251
M		 333 0x02,
334};
335
2b63536f 336static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
a64135a2
MR		 337 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
338 0x0f, 0x10, 0x11
339};
340
2b63536f 341static const hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
0ffa9807
MR		 342 0x26, 0,
343};
344
2b63536f 345static const hda_nid_t stac92hd73xx_adc_nids[2] = {
e1f0d669
MR		 346 0x1a, 0x1b
347};
348
349#define STAC92HD73XX_NUM_DMICS 2
2b63536f 350static const hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
e1f0d669
MR		 351 0x13, 0x14, 0
352};
353
354#define STAC92HD73_DAC_COUNT 5
e1f0d669 355
2b63536f 356static const hda_nid_t stac92hd73xx_mux_nids[2] = {
e2aec171 357 0x20, 0x21,
e1f0d669
MR		 358};
359
2b63536f 360static const hda_nid_t stac92hd73xx_dmux_nids[2] = {
e1f0d669
MR		 361 0x20, 0x21,
362};
363
2b63536f 364static const hda_nid_t stac92hd73xx_smux_nids[2] = {
d9737751
MR		 365 0x22, 0x23,
366};
367
6479c631 368#define STAC92HD73XX_NUM_CAPS 2
2b63536f 369static const unsigned long stac92hd73xx_capvols[] = {
6479c631
TI		 370 HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT),
371 HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT),
372};
373#define stac92hd73xx_capsws stac92hd73xx_capvols
374
d0513fc6 375#define STAC92HD83_DAC_COUNT 3
d0513fc6 376
afef2cfa
CC		 377static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
378 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
379 0x0f, 0x10
d0513fc6
MR		 380};
381
2b63536f 382static const hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
0ffa9807
MR		 383 0x1e, 0,
384};
385
2b63536f 386static const hda_nid_t stac92hd83xxx_dmic_nids[] = {
699d8995 387 0x11, 0x20,
ab5a6ebe
VK		 388};
389
2b63536f 390static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
a64135a2
MR		 391 0x0a, 0x0d, 0x0f
392};
393
2b63536f 394static const hda_nid_t stac92hd71bxx_adc_nids[2] = {
e035b841
MR		 395 0x12, 0x13,
396};
397
2b63536f 398static const hda_nid_t stac92hd71bxx_mux_nids[2] = {
e035b841
MR		 399 0x1a, 0x1b
400};
401
2b63536f 402static const hda_nid_t stac92hd71bxx_dmux_nids[2] = {
4b33c767 403 0x1c, 0x1d,
e1f0d669
MR		 404};
405
2b63536f 406static const hda_nid_t stac92hd71bxx_smux_nids[2] = {
d9737751
MR		 407 0x24, 0x25,
408};
409
e035b841 410#define STAC92HD71BXX_NUM_DMICS 2
2b63536f 411static const hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
e035b841
MR		 412 0x18, 0x19, 0
413};
414
2b63536f
TI		 415static const hda_nid_t stac92hd71bxx_dmic_5port_nids[STAC92HD71BXX_NUM_DMICS] = {
416 0x18, 0
417};
418
419static const hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
0ffa9807
MR		 420 0x22, 0
421};
422
6479c631 423#define STAC92HD71BXX_NUM_CAPS 2
2b63536f 424static const unsigned long stac92hd71bxx_capvols[] = {
6479c631
TI		 425 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
426 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
427};
428#define stac92hd71bxx_capsws stac92hd71bxx_capvols
429
2b63536f 430static const hda_nid_t stac925x_adc_nids[1] = {
8e21c34c
TD		 431 0x03,
432};
433
2b63536f 434static const hda_nid_t stac925x_mux_nids[1] = {
8e21c34c
TD		 435 0x0f,
436};
437
2b63536f 438static const hda_nid_t stac925x_dac_nids[1] = {
8e21c34c
TD		 439 0x02,
440};
441
f6e9852a 442#define STAC925X_NUM_DMICS 1
2b63536f 443static const hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
f6e9852a 444 0x15, 0
2c11f955
TD		 445};
446
2b63536f 447static const hda_nid_t stac925x_dmux_nids[1] = {
1697055e
TI		 448 0x14,
449};
450
2b63536f 451static const unsigned long stac925x_capvols[] = {
6479c631
TI		 452 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT),
453};
2b63536f 454static const unsigned long stac925x_capsws[] = {
6479c631
TI		 455 HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT),
456};
457
2b63536f 458static const hda_nid_t stac922x_adc_nids[2] = {
2f2f4251
M		 459 0x06, 0x07,
460};
461
2b63536f 462static const hda_nid_t stac922x_mux_nids[2] = {
2f2f4251
M		 463 0x12, 0x13,
464};
465
6479c631 466#define STAC922X_NUM_CAPS 2
2b63536f 467static const unsigned long stac922x_capvols[] = {
6479c631
TI		 468 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT),
469 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
470};
471#define stac922x_capsws stac922x_capvols
472
2b63536f 473static const hda_nid_t stac927x_slave_dig_outs[2] = {
45c1d85b
MR		 474 0x1f, 0,
475};
476
2b63536f 477static const hda_nid_t stac927x_adc_nids[3] = {
3cc08dc6
MP		 478 0x07, 0x08, 0x09
479};
480
2b63536f 481static const hda_nid_t stac927x_mux_nids[3] = {
3cc08dc6
MP		 482 0x15, 0x16, 0x17
483};
484
2b63536f 485static const hda_nid_t stac927x_smux_nids[1] = {
d9737751
MR		 486 0x21,
487};
488
2b63536f 489static const hda_nid_t stac927x_dac_nids[6] = {
b76c850f
MR		 490 0x02, 0x03, 0x04, 0x05, 0x06, 0
491};
492
2b63536f 493static const hda_nid_t stac927x_dmux_nids[1] = {
e1f0d669
MR		 494 0x1b,
495};
496
7f16859a 497#define STAC927X_NUM_DMICS 2
2b63536f 498static const hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
7f16859a
MR		 499 0x13, 0x14, 0
500};
501
6479c631 502#define STAC927X_NUM_CAPS 3
2b63536f 503static const unsigned long stac927x_capvols[] = {
6479c631
TI		 504 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
505 HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT),
506 HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT),
507};
2b63536f 508static const unsigned long stac927x_capsws[] = {
6479c631
TI		 509 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT),
510 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
511 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
512};
513
ea734963 514static const char * const stac927x_spdif_labels[5] = {
65973632
MR		 515 "Digital Playback", "ADAT", "Analog Mux 1",
516 "Analog Mux 2", "Analog Mux 3"
517};
518
2b63536f 519static const hda_nid_t stac9205_adc_nids[2] = {
f3302a59
MP		 520 0x12, 0x13
521};
522
2b63536f 523static const hda_nid_t stac9205_mux_nids[2] = {
f3302a59
MP		 524 0x19, 0x1a
525};
526
2b63536f 527static const hda_nid_t stac9205_dmux_nids[1] = {
1697055e 528 0x1d,
e1f0d669
MR		 529};
530
2b63536f 531static const hda_nid_t stac9205_smux_nids[1] = {
d9737751
MR		 532 0x21,
533};
534
f6e9852a 535#define STAC9205_NUM_DMICS 2
2b63536f 536static const hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
f6e9852a 537 0x17, 0x18, 0
8b65727b
MP		 538};
539
6479c631 540#define STAC9205_NUM_CAPS 2
2b63536f 541static const unsigned long stac9205_capvols[] = {
6479c631
TI		 542 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT),
543 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT),
544};
2b63536f 545static const unsigned long stac9205_capsws[] = {
6479c631
TI		 546 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
547 HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT),
548};
549
2b63536f 550static const hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 551 0x08, 0x09, 0x0d, 0x0e,
552 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 553};
554
2b63536f 555static const hda_nid_t stac925x_pin_nids[8] = {
8e21c34c
TD		 556 0x07, 0x08, 0x0a, 0x0b,
557 0x0c, 0x0d, 0x10, 0x11,
558};
559
2b63536f 560static const hda_nid_t stac922x_pin_nids[10] = {
2f2f4251
M		 561 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
562 0x0f, 0x10, 0x11, 0x15, 0x1b,
563};
564
2b63536f 565static const hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 566 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
567 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 568 0x14, 0x22, 0x23
e1f0d669
MR		 569};
570
616f89e7 571#define STAC92HD71BXX_NUM_PINS 13
2b63536f 572static const hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
616f89e7
HRK		 573 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
574 0x00, 0x14, 0x18, 0x19, 0x1e,
575 0x1f, 0x20, 0x27
576};
2b63536f 577static const hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR		 578 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
579 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 580 0x1f, 0x20, 0x27
e035b841
MR		 581};
582
2b63536f 583static const hda_nid_t stac927x_pin_nids[14] = {
3cc08dc6
MP		 584 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
585 0x0f, 0x10, 0x11, 0x12, 0x13,
586 0x14, 0x21, 0x22, 0x23,
587};
588
2b63536f 589static const hda_nid_t stac9205_pin_nids[12] = {
f3302a59
MP		 590 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
591 0x0f, 0x14, 0x16, 0x17, 0x18,
592 0x21, 0x22,
f3302a59
MP		 593};
594
8b65727b
MP		 595static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
596 struct snd_ctl_elem_info *uinfo)
597{
598 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
599 struct sigmatel_spec *spec = codec->spec;
600 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
601}
602
603static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
604 struct snd_ctl_elem_value *ucontrol)
605{
606 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
607 struct sigmatel_spec *spec = codec->spec;
e1f0d669 608 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 609
e1f0d669 610 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 611 return 0;
612}
613
614static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
615 struct snd_ctl_elem_value *ucontrol)
616{
617 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
618 struct sigmatel_spec *spec = codec->spec;
e1f0d669 619 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 620
621 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 622 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 623}
624
d9737751
MR		 625static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
626 struct snd_ctl_elem_info *uinfo)
627{
628 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
629 struct sigmatel_spec *spec = codec->spec;
630 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
631}
632
633static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
634 struct snd_ctl_elem_value *ucontrol)
635{
636 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
637 struct sigmatel_spec *spec = codec->spec;
638 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
639
640 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
641 return 0;
642}
643
644static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
645 struct snd_ctl_elem_value *ucontrol)
646{
647 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
648 struct sigmatel_spec *spec = codec->spec;
00ef50c2 649 struct hda_input_mux *smux = &spec->private_smux;
d9737751 650 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 651 int err, val;
652 hda_nid_t nid;
d9737751 653
00ef50c2 654 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 655 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 656 if (err < 0)
657 return err;
658
659 if (spec->spdif_mute) {
660 if (smux_idx == 0)
661 nid = spec->multiout.dig_out_nid;
662 else
663 nid = codec->slave_dig_outs[smux_idx - 1];
664 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 665 val = HDA_AMP_MUTE;
00ef50c2 666 else
c9b46f91 667 val = 0;
00ef50c2 668 /* un/mute SPDIF out */
c9b46f91
TI		 669 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
670 HDA_AMP_MUTE, val);
00ef50c2
MR		 671 }
672 return 0;
d9737751
MR		 673}
674
45eebda7
VK		 675static int stac_vrefout_set(struct hda_codec *codec,
676 hda_nid_t nid, unsigned int new_vref)
677{
678 int error, pinctl;
679
680 snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
681 pinctl = snd_hda_codec_read(codec, nid, 0,
682 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
683
684 if (pinctl < 0)
685 return pinctl;
686
687 pinctl &= 0xff;
688 pinctl &= ~AC_PINCTL_VREFEN;
689 pinctl |= (new_vref & AC_PINCTL_VREFEN);
690
cdd03ced 691 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
45eebda7
VK		 692 if (error < 0)
693 return error;
694
695 return 1;
696}
697
2fc99890
NL		 698static unsigned int stac92xx_vref_set(struct hda_codec *codec,
699 hda_nid_t nid, unsigned int new_vref)
700{
b8621516 701 int error;
2fc99890
NL		 702 unsigned int pincfg;
703 pincfg = snd_hda_codec_read(codec, nid, 0,
704 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
705
706 pincfg &= 0xff;
707 pincfg &= ~(AC_PINCTL_VREFEN | AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
708 pincfg |= new_vref;
709
710 if (new_vref == AC_PINCTL_VREF_HIZ)
711 pincfg |= AC_PINCTL_OUT_EN;
712 else
713 pincfg |= AC_PINCTL_IN_EN;
714
cdd03ced 715 error = snd_hda_set_pin_ctl_cache(codec, nid, pincfg);
2fc99890
NL		 716 if (error < 0)
717 return error;
718 else
719 return 1;
720}
721
722static unsigned int stac92xx_vref_get(struct hda_codec *codec, hda_nid_t nid)
723{
724 unsigned int vref;
725 vref = snd_hda_codec_read(codec, nid, 0,
726 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
727 vref &= AC_PINCTL_VREFEN;
728 return vref;
729}
730
c8b6bf9b 731static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 732{
733 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
734 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 735 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 736}
737
c8b6bf9b 738static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 739{
740 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
741 struct sigmatel_spec *spec = codec->spec;
742 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
743
744 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
745 return 0;
746}
747
c8b6bf9b 748static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 749{
750 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
751 struct sigmatel_spec *spec = codec->spec;
752 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5207e10e 753 const struct hda_input_mux *imux = spec->input_mux;
094a4245 754 unsigned int idx, prev_idx, didx;
5207e10e
TI		 755
756 idx = ucontrol->value.enumerated.item[0];
757 if (idx >= imux->num_items)
758 idx = imux->num_items - 1;
759 prev_idx = spec->cur_mux[adc_idx];
760 if (prev_idx == idx)
761 return 0;
762 if (idx < spec->num_analog_muxes) {
763 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
764 AC_VERB_SET_CONNECT_SEL,
765 imux->items[idx].index);
094a4245
VK		 766 if (prev_idx >= spec->num_analog_muxes &&
767 spec->mux_nids[adc_idx] != spec->dmux_nids[adc_idx]) {
5207e10e
TI		 768 imux = spec->dinput_mux;
769 /* 0 = analog */
770 snd_hda_codec_write_cache(codec,
771 spec->dmux_nids[adc_idx], 0,
772 AC_VERB_SET_CONNECT_SEL,
773 imux->items[0].index);
774 }
775 } else {
776 imux = spec->dinput_mux;
094a4245
VK		 777 /* first dimux item is hardcoded to select analog imux,
778 * so lets skip it
779 */
780 didx = idx - spec->num_analog_muxes + 1;
5207e10e
TI		 781 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
782 AC_VERB_SET_CONNECT_SEL,
094a4245 783 imux->items[didx].index);
5207e10e
TI		 784 }
785 spec->cur_mux[adc_idx] = idx;
786 return 1;
2f2f4251
M		 787}
788
b22b4821
MR		 789static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
790 struct snd_ctl_elem_info *uinfo)
791{
792 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
793 struct sigmatel_spec *spec = codec->spec;
794 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
795}
796
797static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
798 struct snd_ctl_elem_value *ucontrol)
799{
800 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
801 struct sigmatel_spec *spec = codec->spec;
802
803 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
804 return 0;
805}
806
807static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
808 struct snd_ctl_elem_value *ucontrol)
809{
810 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
811 struct sigmatel_spec *spec = codec->spec;
812
813 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
814 spec->mono_nid, &spec->cur_mmux);
815}
816
5f10c4a9
ML		 817#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
818
819static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
820 struct snd_ctl_elem_value *ucontrol)
821{
822 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 823 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 824 struct sigmatel_spec *spec = codec->spec;
825
e1f0d669
MR		 826 ucontrol->value.integer.value[0] = !!(spec->aloopback &
827 (spec->aloopback_mask << idx));
5f10c4a9
ML		 828 return 0;
829}
830
831static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
832 struct snd_ctl_elem_value *ucontrol)
833{
834 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
835 struct sigmatel_spec *spec = codec->spec;
e1f0d669 836 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 837 unsigned int dac_mode;
e1f0d669 838 unsigned int val, idx_val;
5f10c4a9 839
e1f0d669
MR		 840 idx_val = spec->aloopback_mask << idx;
841 if (ucontrol->value.integer.value[0])
842 val = spec->aloopback | idx_val;
843 else
844 val = spec->aloopback & ~idx_val;
68ea7b2f 845 if (spec->aloopback == val)
5f10c4a9
ML		 846 return 0;
847
68ea7b2f 848 spec->aloopback = val;
5f10c4a9 849
e1f0d669
MR		 850 /* Only return the bits defined by the shift value of the
851 * first two bytes of the mask
852 */
5f10c4a9 853 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 854 kcontrol->private_value & 0xFFFF, 0x0);
855 dac_mode >>= spec->aloopback_shift;
5f10c4a9 856
e1f0d669 857 if (spec->aloopback & idx_val) {
5f10c4a9 858 snd_hda_power_up(codec);
e1f0d669 859 dac_mode |= idx_val;
5f10c4a9
ML		 860 } else {
861 snd_hda_power_down(codec);
e1f0d669 862 dac_mode &= ~idx_val;
5f10c4a9
ML		 863 }
864
865 snd_hda_codec_write_cache(codec, codec->afg, 0,
866 kcontrol->private_value >> 16, dac_mode);
867
868 return 1;
869}
870
2b63536f 871static const struct hda_verb stac9200_core_init[] = {
2f2f4251 872 /* set dac0mux for dac converter */
c7d4b2fa 873 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 874 {}
875};
876
2b63536f 877static const struct hda_verb stac9200_eapd_init[] = {
1194b5b7
TI		 878 /* set dac0mux for dac converter */
879 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
880 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
881 {}
882};
883
2b63536f 884static const struct hda_verb dell_eq_core_init[] = {
d654a660
MR		 885 /* set master volume to max value without distortion
886 * and direct control */
887 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
e1f0d669
MR		 888 {}
889};
890
2b63536f 891static const struct hda_verb stac92hd73xx_core_init[] = {
e1f0d669
MR		 892 /* set master volume and direct control */
893 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 894 {}
895};
896
2b63536f 897static const struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR		 898 /* power state controls amps */
899 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 900 {}
d0513fc6
MR		 901};
902
5556e147
VK		 903static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
904 { 0x22, 0x785, 0x43 },
905 { 0x22, 0x782, 0xe0 },
906 { 0x22, 0x795, 0x00 },
907 {}
908};
909
2b63536f 910static const struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 911 /* set master volume and direct control */
912 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 913 {}
541eee87
MR		 914};
915
2b63536f 916static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
ca8d33fc
MR		 917 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
918 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 919 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
920 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 921 {}
922};
923
2b63536f 924static const struct hda_verb stac925x_core_init[] = {
8e21c34c
TD		 925 /* set dac0mux for dac converter */
926 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 927 /* mute the master volume */
928 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 929 {}
930};
931
2b63536f 932static const struct hda_verb stac922x_core_init[] = {
2f2f4251 933 /* set master volume and direct control */
c7d4b2fa 934 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 935 {}
936};
937
2b63536f 938static const struct hda_verb d965_core_init[] = {
19039bd0 939 /* set master volume and direct control */
93ed1503 940 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 941 /* unmute node 0x1b */
942 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
943 /* select node 0x03 as DAC */
944 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
945 {}
946};
947
2b63536f 948static const struct hda_verb dell_3st_core_init[] = {
ccca7cdc
TI		 949 /* don't set delta bit */
950 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
951 /* unmute node 0x1b */
952 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
953 /* select node 0x03 as DAC */
954 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
955 {}
956};
957
2b63536f 958static const struct hda_verb stac927x_core_init[] = {
3cc08dc6
MP		 959 /* set master volume and direct control */
960 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 961 /* enable analog pc beep path */
962 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 963 {}
964};
965
2b63536f 966static const struct hda_verb stac927x_volknob_core_init[] = {
54930531
TI		 967 /* don't set delta bit */
968 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
969 /* enable analog pc beep path */
970 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
971 {}
972};
973
2b63536f 974static const struct hda_verb stac9205_core_init[] = {
f3302a59
MP		 975 /* set master volume and direct control */
976 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 977 /* enable analog pc beep path */
978 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 979 {}
980};
981
b22b4821
MR		 982#define STAC_MONO_MUX \
983 { \
984 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
985 .name = "Mono Mux", \
986 .count = 1, \
987 .info = stac92xx_mono_mux_enum_info, \
988 .get = stac92xx_mono_mux_enum_get, \
989 .put = stac92xx_mono_mux_enum_put, \
990 }
991
e1f0d669 992#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 993 { \
994 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
995 .name = "Analog Loopback", \
e1f0d669 996 .count = cnt, \
5f10c4a9
ML		 997 .info = stac92xx_aloopback_info, \
998 .get = stac92xx_aloopback_get, \
999 .put = stac92xx_aloopback_put, \
1000 .private_value = verb_read | (verb_write << 16), \
1001 }
1002
2fc99890
NL		 1003#define DC_BIAS(xname, idx, nid) \
1004 { \
1005 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1006 .name = xname, \
1007 .index = idx, \
1008 .info = stac92xx_dc_bias_info, \
1009 .get = stac92xx_dc_bias_get, \
1010 .put = stac92xx_dc_bias_put, \
1011 .private_value = nid, \
1012 }
1013
2b63536f 1014static const struct snd_kcontrol_new stac9200_mixer[] = {
2faa3bf1
TI		 1015 HDA_CODEC_VOLUME_MIN_MUTE("PCM Playback Volume", 0xb, 0, HDA_OUTPUT),
1016 HDA_CODEC_MUTE("PCM Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M		 1017 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
1018 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 1019 { } /* end */
1020};
1021
2b63536f 1022static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
d78d7a90
TI		 1023 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1024 {}
1025};
1026
2b63536f 1027static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
e1f0d669 1028 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
d78d7a90
TI		 1029 {}
1030};
e1f0d669 1031
2b63536f 1032static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
d78d7a90
TI		 1033 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1034 {}
1035};
1036
d0513fc6 1037
2b63536f 1038static const struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
d78d7a90
TI		 1039 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
1040};
541eee87 1041
2b63536f 1042static const struct snd_kcontrol_new stac925x_mixer[] = {
2faa3bf1
TI		 1043 HDA_CODEC_VOLUME_MIN_MUTE("PCM Playback Volume", 0xe, 0, HDA_OUTPUT),
1044 HDA_CODEC_MUTE("PCM Playback Switch", 0x0e, 0, HDA_OUTPUT),
2f2f4251
M		 1045 { } /* end */
1046};
1047
2b63536f 1048static const struct snd_kcontrol_new stac9205_loopback[] = {
d78d7a90
TI		 1049 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
1050 {}
1051};
1052
2b63536f 1053static const struct snd_kcontrol_new stac927x_loopback[] = {
d78d7a90
TI		 1054 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
1055 {}
1056};
1057
1697055e
TI		 1058static struct snd_kcontrol_new stac_dmux_mixer = {
1059 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1060 .name = "Digital Input Source",
1061 /* count set later */
1062 .info = stac92xx_dmux_enum_info,
1063 .get = stac92xx_dmux_enum_get,
1064 .put = stac92xx_dmux_enum_put,
1065};
1066
d9737751
MR		 1067static struct snd_kcontrol_new stac_smux_mixer = {
1068 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1069 .name = "IEC958 Playback Source",
d9737751
MR		 1070 /* count set later */
1071 .info = stac92xx_smux_enum_info,
1072 .get = stac92xx_smux_enum_get,
1073 .put = stac92xx_smux_enum_put,
1074};
1075
9322ca54
TI		 1076static const char * const slave_pfxs[] = {
1077 "Front", "Surround", "Center", "LFE", "Side",
ab548d2d 1078 "Headphone", "Speaker", "IEC958", "PCM",
2134ea4f
TI		 1079 NULL
1080};
1081
2faa3bf1
TI		 1082static void stac92xx_update_led_status(struct hda_codec *codec, int enabled);
1083
1084static void stac92xx_vmaster_hook(void *private_data, int val)
1085{
1086 stac92xx_update_led_status(private_data, val);
1087}
1088
603c4019
TI		 1089static void stac92xx_free_kctls(struct hda_codec *codec);
1090
2f2f4251
M		 1091static int stac92xx_build_controls(struct hda_codec *codec)
1092{
1093 struct sigmatel_spec *spec = codec->spec;
2faa3bf1 1094 unsigned int vmaster_tlv[4];
2f2f4251 1095 int err;
c7d4b2fa 1096 int i;
2f2f4251 1097
6479c631
TI		 1098 if (spec->mixer) {
1099 err = snd_hda_add_new_ctls(codec, spec->mixer);
1100 if (err < 0)
1101 return err;
1102 }
c7d4b2fa
M		 1103
1104 for (i = 0; i < spec->num_mixers; i++) {
1105 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1106 if (err < 0)
1107 return err;
1108 }
5207e10e
TI		 1109 if (!spec->auto_mic && spec->num_dmuxes > 0 &&
1110 snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
1697055e 1111 stac_dmux_mixer.count = spec->num_dmuxes;
3911a4c1 1112 err = snd_hda_ctl_add(codec, 0,
1697055e
TI		 1113 snd_ctl_new1(&stac_dmux_mixer, codec));
1114 if (err < 0)
1115 return err;
1116 }
d9737751 1117 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1118 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1119 struct hda_input_mux *smux = &spec->private_smux;
1120 /* check for mute support on SPDIF out */
1121 if (wcaps & AC_WCAP_OUT_AMP) {
10a20af7 1122 snd_hda_add_imux_item(smux, "Off", 0, NULL);
00ef50c2
MR		 1123 spec->spdif_mute = 1;
1124 }
d9737751 1125 stac_smux_mixer.count = spec->num_smuxes;
3911a4c1 1126 err = snd_hda_ctl_add(codec, 0,
d9737751
MR		 1127 snd_ctl_new1(&stac_smux_mixer, codec));
1128 if (err < 0)
1129 return err;
1130 }
c7d4b2fa 1131
dabbed6f 1132 if (spec->multiout.dig_out_nid) {
74b654c9
SW		 1133 err = snd_hda_create_spdif_out_ctls(codec,
1134 spec->multiout.dig_out_nid,
1135 spec->multiout.dig_out_nid);
dabbed6f
M		 1136 if (err < 0)
1137 return err;
9a08160b
TI		 1138 err = snd_hda_create_spdif_share_sw(codec,
1139 &spec->multiout);
1140 if (err < 0)
1141 return err;
1142 spec->multiout.share_spdif = 1;
dabbed6f 1143 }
da74ae3e 1144 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1145 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1146 if (err < 0)
1147 return err;
1148 }
2134ea4f
TI		 1149
1150 /* if we have no master control, let's create it */
2faa3bf1
TI		 1151 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1152 HDA_OUTPUT, vmaster_tlv);
1153 /* correct volume offset */
1154 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
1155 /* minimum value is actually mute */
1156 vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
1157 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1158 vmaster_tlv, slave_pfxs,
1159 "Playback Volume");
1160 if (err < 0)
1161 return err;
1162
1163 err = __snd_hda_add_vmaster(codec, "Master Playback Switch",
1164 NULL, slave_pfxs,
1165 "Playback Switch", true,
d2f344b5 1166 &spec->vmaster_mute.sw_kctl);
2faa3bf1
TI		 1167 if (err < 0)
1168 return err;
1169
1170 if (spec->gpio_led) {
d2f344b5 1171 spec->vmaster_mute.hook = stac92xx_vmaster_hook;
f29735cb 1172 err = snd_hda_add_vmaster_hook(codec, &spec->vmaster_mute, true);
d2f344b5
TI		 1173 if (err < 0)
1174 return err;
2134ea4f
TI		 1175 }
1176
d78d7a90
TI		 1177 if (spec->aloopback_ctl &&
1178 snd_hda_get_bool_hint(codec, "loopback") == 1) {
1179 err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
1180 if (err < 0)
1181 return err;
1182 }
1183
603c4019 1184 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e 1185
01a61e12
TI		 1186 err = snd_hda_jack_add_kctls(codec, &spec->autocfg);
1187 if (err < 0)
1188 return err;
e4973e1e 1189
dabbed6f 1190 return 0;
2f2f4251
M		 1191}
1192
2b63536f 1193static const unsigned int ref9200_pin_configs[8] = {
dabbed6f 1194 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1195 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1196};
1197
2b63536f 1198static const unsigned int gateway9200_m4_pin_configs[8] = {
58eec423
MCC		 1199 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1200 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1201};
2b63536f 1202static const unsigned int gateway9200_m4_2_pin_configs[8] = {
58eec423
MCC		 1203 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1204 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1205};
1206
1207/*
dfe495d0
TI		 1208 STAC 9200 pin configs for
1209 102801A8
1210 102801DE
1211 102801E8
1212*/
2b63536f 1213static const unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1214 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1215 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1216};
1217
1218/*
1219 STAC 9200 pin configs for
1220 102801C0
1221 102801C1
1222*/
2b63536f 1223static const unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1224 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1225 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1226};
1227
1228/*
1229 STAC 9200 pin configs for
1230 102801C4 (Dell Dimension E310)
1231 102801C5
1232 102801C7
1233 102801D9
1234 102801DA
1235 102801E3
1236*/
2b63536f 1237static const unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1238 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1239 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1240};
1241
1242
1243/*
1244 STAC 9200-32 pin configs for
1245 102801B5 (Dell Inspiron 630m)
1246 102801D8 (Dell Inspiron 640m)
1247*/
2b63536f 1248static const unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1249 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1250 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1251};
1252
1253/*
1254 STAC 9200-32 pin configs for
1255 102801C2 (Dell Latitude D620)
1256 102801C8
1257 102801CC (Dell Latitude D820)
1258 102801D4
1259 102801D6
1260*/
2b63536f 1261static const unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1262 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1263 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1264};
1265
1266/*
1267 STAC 9200-32 pin configs for
1268 102801CE (Dell XPS M1710)
1269 102801CF (Dell Precision M90)
1270*/
2b63536f 1271static const unsigned int dell9200_m23_pin_configs[8] = {
dfe495d0
TI		 1272 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1273 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1274};
1275
1276/*
1277 STAC 9200-32 pin configs for
1278 102801C9
1279 102801CA
1280 102801CB (Dell Latitude 120L)
1281 102801D3
1282*/
2b63536f 1283static const unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1284 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1285 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1286};
1287
1288/*
1289 STAC 9200-32 pin configs for
1290 102801BD (Dell Inspiron E1505n)
1291 102801EE
1292 102801EF
1293*/
2b63536f 1294static const unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1295 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1296 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1297};
1298
1299/*
1300 STAC 9200-32 pin configs for
1301 102801F5 (Dell Inspiron 1501)
1302 102801F6
1303*/
2b63536f 1304static const unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1305 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1306 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1307};
1308
1309/*
1310 STAC 9200-32
1311 102801CD (Dell Inspiron E1705/9400)
1312*/
2b63536f 1313static const unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1314 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1315 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1316};
1317
2b63536f 1318static const unsigned int oqo9200_pin_configs[8] = {
bf277785
TD		 1319 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1320 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1321};
1322
dfe495d0 1323
2b63536f 1324static const unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
f5fcc13c 1325 [STAC_REF] = ref9200_pin_configs,
bf277785 1326 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1327 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1328 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1329 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1330 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1331 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1332 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1333 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1334 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1335 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1336 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1337 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1338 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1339 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1340};
1341
ea734963 1342static const char * const stac9200_models[STAC_9200_MODELS] = {
1607b8ea 1343 [STAC_AUTO] = "auto",
f5fcc13c 1344 [STAC_REF] = "ref",
bf277785 1345 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1346 [STAC_9200_DELL_D21] = "dell-d21",
1347 [STAC_9200_DELL_D22] = "dell-d22",
1348 [STAC_9200_DELL_D23] = "dell-d23",
1349 [STAC_9200_DELL_M21] = "dell-m21",
1350 [STAC_9200_DELL_M22] = "dell-m22",
1351 [STAC_9200_DELL_M23] = "dell-m23",
1352 [STAC_9200_DELL_M24] = "dell-m24",
1353 [STAC_9200_DELL_M25] = "dell-m25",
1354 [STAC_9200_DELL_M26] = "dell-m26",
1355 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1356 [STAC_9200_M4] = "gateway-m4",
1357 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1358 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1359};
1360
2b63536f 1361static const struct snd_pci_quirk stac9200_cfg_tbl[] = {
f5fcc13c
TI		 1362 /* SigmaTel reference board */
1363 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1364 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1365 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1366 "DFI LanParty", STAC_REF),
e7377071 1367 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1368 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1369 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1370 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1371 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1372 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1373 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1374 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1375 "unknown Dell", STAC_9200_DELL_D22),
1376 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1377 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1378 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1379 "Dell Latitude D620", STAC_9200_DELL_M22),
1380 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1381 "unknown Dell", STAC_9200_DELL_D23),
1382 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1383 "unknown Dell", STAC_9200_DELL_D23),
1384 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1385 "unknown Dell", STAC_9200_DELL_M22),
1386 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1387 "unknown Dell", STAC_9200_DELL_M24),
1388 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1389 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1390 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1391 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1392 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1393 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1394 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1395 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1396 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1397 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1398 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1399 "Dell Precision M90", STAC_9200_DELL_M23),
1400 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1401 "unknown Dell", STAC_9200_DELL_M22),
1402 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1403 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1404 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1405 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1406 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1407 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1408 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1409 "unknown Dell", STAC_9200_DELL_D23),
1410 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1411 "unknown Dell", STAC_9200_DELL_D23),
1412 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1413 "unknown Dell", STAC_9200_DELL_D21),
1414 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1415 "unknown Dell", STAC_9200_DELL_D23),
1416 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1417 "unknown Dell", STAC_9200_DELL_D21),
1418 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1419 "unknown Dell", STAC_9200_DELL_M25),
1420 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1421 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1422 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1423 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1424 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1425 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1426 /* Panasonic */
117f257d 1427 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1428 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1429 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1430 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1431 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1432 /* OQO Mobile */
1433 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1434 {} /* terminator */
1435};
1436
2b63536f 1437static const unsigned int ref925x_pin_configs[8] = {
8e21c34c 1438 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1439 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1440};
1441
2b63536f 1442static const unsigned int stac925xM1_pin_configs[8] = {
9cb36c2a
MCC		 1443 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1444 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1445};
1446
2b63536f 1447static const unsigned int stac925xM1_2_pin_configs[8] = {
9cb36c2a
MCC		 1448 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1449 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1450};
58eec423 1451
2b63536f 1452static const unsigned int stac925xM2_pin_configs[8] = {
9cb36c2a
MCC		 1453 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1454 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1455};
1456
2b63536f 1457static const unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1458 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1459 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1460};
1461
2b63536f 1462static const unsigned int stac925xM3_pin_configs[8] = {
9cb36c2a
MCC		 1463 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1464 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1465};
58eec423 1466
2b63536f 1467static const unsigned int stac925xM5_pin_configs[8] = {
9cb36c2a
MCC		 1468 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1469 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1470};
1471
2b63536f 1472static const unsigned int stac925xM6_pin_configs[8] = {
9cb36c2a
MCC		 1473 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1474 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1475};
1476
2b63536f 1477static const unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
8e21c34c 1478 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1479 [STAC_M1] = stac925xM1_pin_configs,
1480 [STAC_M1_2] = stac925xM1_2_pin_configs,
1481 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1482 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1483 [STAC_M3] = stac925xM3_pin_configs,
1484 [STAC_M5] = stac925xM5_pin_configs,
1485 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1486};
1487
ea734963 1488static const char * const stac925x_models[STAC_925x_MODELS] = {
1607b8ea 1489 [STAC_925x_AUTO] = "auto",
8e21c34c 1490 [STAC_REF] = "ref",
9cb36c2a
MCC		 1491 [STAC_M1] = "m1",
1492 [STAC_M1_2] = "m1-2",
1493 [STAC_M2] = "m2",
8e21c34c 1494 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1495 [STAC_M3] = "m3",
1496 [STAC_M5] = "m5",
1497 [STAC_M6] = "m6",
8e21c34c
TD		 1498};
1499
2b63536f 1500static const struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1501 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1502 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1503 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1504 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1505 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1506 /* Not sure about the brand name for those */
1507 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1508 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1509 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1510 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1511 {} /* terminator */
8e21c34c
TD		 1512};
1513
2b63536f 1514static const struct snd_pci_quirk stac925x_cfg_tbl[] = {
8e21c34c
TD		 1515 /* SigmaTel reference board */
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1518 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1519
1520 /* Default table for unknown ID */
1521 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1522
8e21c34c
TD		 1523 {} /* terminator */
1524};
1525
2b63536f 1526static const unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1527 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1528 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1529 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1530 0x01452050,
1531};
1532
2b63536f 1533static const unsigned int dell_m6_pin_configs[13] = {
a7662640 1534 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1535 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1536 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1537 0x4f0000f0,
e1f0d669
MR		 1538};
1539
2b63536f 1540static const unsigned int alienware_m17x_pin_configs[13] = {
842ae638
TI		 1541 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020,
1542 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0,
1543 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1544 0x904601b0,
1545};
1546
2b63536f 1547static const unsigned int intel_dg45id_pin_configs[13] = {
52dc4386 1548 0x02214230, 0x02A19240, 0x01013214, 0x01014210,
4d26f446 1549 0x01A19250, 0x01011212, 0x01016211
52dc4386
AF		 1550};
1551
2b63536f 1552static const unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1553 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1554 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1555 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1556 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1557 [STAC_DELL_EQ] = dell_m6_pin_configs,
842ae638 1558 [STAC_ALIENWARE_M17X] = alienware_m17x_pin_configs,
52dc4386 1559 [STAC_92HD73XX_INTEL] = intel_dg45id_pin_configs,
e1f0d669
MR		 1560};
1561
ea734963 1562static const char * const stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1607b8ea 1563 [STAC_92HD73XX_AUTO] = "auto",
9e43f0de 1564 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1565 [STAC_92HD73XX_REF] = "ref",
ae709440 1566 [STAC_92HD73XX_INTEL] = "intel",
661cd8fb
TI		 1567 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1568 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1569 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1570 [STAC_DELL_EQ] = "dell-eq",
842ae638 1571 [STAC_ALIENWARE_M17X] = "alienware",
e1f0d669
MR		 1572};
1573
2b63536f 1574static const struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
e1f0d669
MR		 1575 /* SigmaTel reference board */
1576 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1577 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1578 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1579 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF		 1580 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1581 "Intel DG45ID", STAC_92HD73XX_INTEL),
1582 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1583 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1584 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1585 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1586 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1587 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1588 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1589 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1590 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1591 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1592 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1593 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1594 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1595 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1596 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1597 "unknown Dell", STAC_DELL_M6_DMIC),
1598 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1599 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1600 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1601 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1602 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1603 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI		 1604 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1605 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB		 1606 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1607 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf 1608 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
ffe535ed 1609 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
5c1bccf6 1610 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
e033ebfb 1611 "Dell Studio 1558", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1612 {} /* terminator */
1613};
1614
2b63536f 1615static const struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
842ae638
TI		 1616 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1617 "Alienware M17x", STAC_ALIENWARE_M17X),
0defe09c
DC		 1618 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1619 "Alienware M17x", STAC_ALIENWARE_M17X),
dbd1b547 1620 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
b9ecc4ee 1621 "Alienware M17x R3", STAC_DELL_EQ),
842ae638
TI		 1622 {} /* terminator */
1623};
1624
2b63536f 1625static const unsigned int ref92hd83xxx_pin_configs[10] = {
d0513fc6
MR		 1626 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1627 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
d0513fc6
MR		 1628 0x01451160, 0x98560170,
1629};
1630
2b63536f 1631static const unsigned int dell_s14_pin_configs[10] = {
69b5655a
TI		 1632 0x0221403f, 0x0221101f, 0x02a19020, 0x90170110,
1633 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a60160,
8bb0ac55
MR		 1634 0x40f000f0, 0x40f000f0,
1635};
1636
f7f9bdfa
JW		 1637static const unsigned int dell_vostro_3500_pin_configs[10] = {
1638 0x02a11020, 0x0221101f, 0x400000f0, 0x90170110,
1639 0x400000f1, 0x400000f2, 0x400000f3, 0x90a60160,
1640 0x400000f4, 0x400000f5,
1641};
1642
2b63536f 1643static const unsigned int hp_dv7_4000_pin_configs[10] = {
48315590
SE		 1644 0x03a12050, 0x0321201f, 0x40f000f0, 0x90170110,
1645 0x40f000f0, 0x40f000f0, 0x90170110, 0xd5a30140,
1646 0x40f000f0, 0x40f000f0,
1647};
1648
5556e147
VK		 1649static const unsigned int hp_zephyr_pin_configs[10] = {
1650 0x01813050, 0x0421201f, 0x04a1205e, 0x96130310,
1651 0x96130310, 0x0101401f, 0x1111611f, 0xd5a30130,
1652 0, 0,
1653};
1654
0c27c180
VK		 1655static const unsigned int hp_cNB11_intquad_pin_configs[10] = {
1656 0x40f000f0, 0x0221101f, 0x02a11020, 0x92170110,
1657 0x40f000f0, 0x92170110, 0x40f000f0, 0xd5a30130,
1658 0x40f000f0, 0x40f000f0,
1659};
1660
2b63536f 1661static const unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
d0513fc6 1662 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1663 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
8bb0ac55 1664 [STAC_DELL_S14] = dell_s14_pin_configs,
f7f9bdfa 1665 [STAC_DELL_VOSTRO_3500] = dell_vostro_3500_pin_configs,
0c27c180 1666 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = hp_cNB11_intquad_pin_configs,
48315590 1667 [STAC_HP_DV7_4000] = hp_dv7_4000_pin_configs,
5556e147 1668 [STAC_HP_ZEPHYR] = hp_zephyr_pin_configs,
d0513fc6
MR		 1669};
1670
ea734963 1671static const char * const stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1607b8ea 1672 [STAC_92HD83XXX_AUTO] = "auto",
d0513fc6 1673 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1674 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
8bb0ac55 1675 [STAC_DELL_S14] = "dell-s14",
f7f9bdfa 1676 [STAC_DELL_VOSTRO_3500] = "dell-vostro-3500",
0c27c180 1677 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = "hp_cNB11_intquad",
48315590 1678 [STAC_HP_DV7_4000] = "hp-dv7-4000",
5556e147 1679 [STAC_HP_ZEPHYR] = "hp-zephyr",
a3e19973 1680 [STAC_92HD83XXX_HP_LED] = "hp-led",
ff8a1e27 1681 [STAC_92HD83XXX_HP_INV_LED] = "hp-inv-led",
d0513fc6
MR		 1682};
1683
2b63536f 1684static const struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
d0513fc6
MR		 1685 /* SigmaTel reference board */
1686 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1687 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 1688 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1689 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR		 1690 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
1691 "unknown Dell", STAC_DELL_S14),
f7f9bdfa
JW		 1692 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
1693 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
0c27c180
VK		 1694 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
1695 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1696 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
1697 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1698 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
1699 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1700 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
1701 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1702 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
1703 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1704 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
1705 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1706 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
1707 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1708 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
1709 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1710 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
1711 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1712 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
1713 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1714 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
1715 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1716 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
1717 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1718 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
1719 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1720 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
1721 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1722 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
1723 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1724 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
1725 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1726 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
1727 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1728 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
1729 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1730 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
1731 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1732 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
1733 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
5556e147
VK		 1734 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
1735 "HP", STAC_HP_ZEPHYR),
a3e19973
TI		 1736 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
1737 "HP Mini", STAC_92HD83XXX_HP_LED),
5556e147
VK		 1738 {} /* terminator */
1739};
1740
1741static const struct snd_pci_quirk stac92hd83xxx_codec_id_cfg_tbl[] = {
1742 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
1743 "HP", STAC_HP_ZEPHYR),
574f3c4f 1744 {} /* terminator */
d0513fc6
MR		 1745};
1746
2b63536f 1747static const unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1748 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1749 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK		 1750 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1751 0x00000000
e035b841
MR		 1752};
1753
2b63536f 1754static const unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1755 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1756 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1757 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1758 0x00000000
a7662640
MR		 1759};
1760
2b63536f 1761static const unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR		 1762 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1763 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK		 1764 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1765 0x00000000
a7662640
MR		 1766};
1767
2b63536f 1768static const unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR		 1769 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1770 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1771 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1772 0x00000000
3a7abfd2
MR		 1773};
1774
2b63536f 1775static const unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
e035b841 1776 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1777 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1778 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1779 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1780 [STAC_HP_M4] = NULL,
2a6ce6e5 1781 [STAC_HP_DV4] = NULL,
1b0652eb 1782 [STAC_HP_DV5] = NULL,
ae6241fb 1783 [STAC_HP_HDX] = NULL,
514bf54c 1784 [STAC_HP_DV4_1222NR] = NULL,
e035b841
MR		 1785};
1786
ea734963 1787static const char * const stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1607b8ea 1788 [STAC_92HD71BXX_AUTO] = "auto",
e035b841 1789 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1790 [STAC_DELL_M4_1] = "dell-m4-1",
1791 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1792 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1793 [STAC_HP_M4] = "hp-m4",
2a6ce6e5 1794 [STAC_HP_DV4] = "hp-dv4",
1b0652eb 1795 [STAC_HP_DV5] = "hp-dv5",
ae6241fb 1796 [STAC_HP_HDX] = "hp-hdx",
514bf54c 1797 [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr",
e035b841
MR		 1798};
1799
2b63536f 1800static const struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
e035b841
MR		 1801 /* SigmaTel reference board */
1802 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1803 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 1804 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1805 "DFI LanParty", STAC_92HD71BXX_REF),
514bf54c
JG		 1806 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fb,
1807 "HP dv4-1222nr", STAC_HP_DV4_1222NR),
5bdaaada
VK		 1808 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
1809 "HP", STAC_HP_DV5),
58d8395b
TI		 1810 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
1811 "HP", STAC_HP_DV5),
2ae466f8 1812 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 1813 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI		 1814 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
1815 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI		 1816 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
1817 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 1818 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 1819 "HP mini 1000", STAC_HP_M4),
ae6241fb 1820 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 1821 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI		 1822 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
1823 "HP dv6", STAC_HP_DV5),
e3d2530a
KG		 1824 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
1825 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY		 1826 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
1827 "HP DV6", STAC_HP_DV5),
1972d025
TI		 1828 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
1829 "HP", STAC_HP_DV5),
a7662640
MR		 1830 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1831 "unknown Dell", STAC_DELL_M4_1),
1832 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1833 "unknown Dell", STAC_DELL_M4_1),
1834 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1835 "unknown Dell", STAC_DELL_M4_1),
1836 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1837 "unknown Dell", STAC_DELL_M4_1),
1838 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1839 "unknown Dell", STAC_DELL_M4_1),
1840 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1841 "unknown Dell", STAC_DELL_M4_1),
1842 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1843 "unknown Dell", STAC_DELL_M4_1),
1844 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1845 "unknown Dell", STAC_DELL_M4_2),
1846 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1847 "unknown Dell", STAC_DELL_M4_2),
1848 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1849 "unknown Dell", STAC_DELL_M4_2),
1850 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1851 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1852 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1853 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1854 {} /* terminator */
1855};
1856
2b63536f 1857static const unsigned int ref922x_pin_configs[10] = {
403d1944
MP		 1858 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1859 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1860 0x40000100, 0x40000100,
1861};
1862
dfe495d0
TI		 1863/*
1864 STAC 922X pin configs for
1865 102801A7
1866 102801AB
1867 102801A9
1868 102801D1
1869 102801D2
1870*/
2b63536f 1871static const unsigned int dell_922x_d81_pin_configs[10] = {
dfe495d0
TI		 1872 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1873 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1874 0x01813122, 0x400001f2,
1875};
1876
1877/*
1878 STAC 922X pin configs for
1879 102801AC
1880 102801D0
1881*/
2b63536f 1882static const unsigned int dell_922x_d82_pin_configs[10] = {
dfe495d0
TI		 1883 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1884 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1885 0x01813122, 0x400001f1,
1886};
1887
1888/*
1889 STAC 922X pin configs for
1890 102801BF
1891*/
2b63536f 1892static const unsigned int dell_922x_m81_pin_configs[10] = {
dfe495d0
TI		 1893 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1894 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1895 0x40C003f1, 0x405003f0,
1896};
1897
1898/*
1899 STAC 9221 A1 pin configs for
1900 102801D7 (Dell XPS M1210)
1901*/
2b63536f 1902static const unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1903 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1904 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1905 0x508003f3, 0x405003f4,
1906};
1907
2b63536f 1908static const unsigned int d945gtp3_pin_configs[10] = {
869264c4 1909 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1910 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1911 0x02a19120, 0x40000100,
1912};
1913
2b63536f 1914static const unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1915 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1916 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1917 0x02a19320, 0x40000100,
1918};
1919
2b63536f 1920static const unsigned int intel_mac_v1_pin_configs[10] = {
5d5d3bc3
IZ		 1921 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1922 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1923 0x400000fc, 0x400000fb,
1924};
1925
2b63536f 1926static const unsigned int intel_mac_v2_pin_configs[10] = {
5d5d3bc3
IZ		 1927 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1928 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1929 0x400000fc, 0x400000fb,
6f0778d8
NB		 1930};
1931
2b63536f 1932static const unsigned int intel_mac_v3_pin_configs[10] = {
5d5d3bc3
IZ		 1933 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1934 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1935 0x400000fc, 0x400000fb,
1936};
1937
2b63536f 1938static const unsigned int intel_mac_v4_pin_configs[10] = {
5d5d3bc3
IZ		 1939 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1940 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1941 0x400000fc, 0x400000fb,
1942};
1943
2b63536f 1944static const unsigned int intel_mac_v5_pin_configs[10] = {
5d5d3bc3
IZ		 1945 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1946 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1947 0x400000fc, 0x400000fb,
0dae0f83
TI		 1948};
1949
2b63536f 1950static const unsigned int ecs202_pin_configs[10] = {
8c650087
MCC		 1951 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1952 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1953 0x9037012e, 0x40e000f2,
1954};
76c08828 1955
2b63536f 1956static const unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1957 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1958 [STAC_D945GTP3] = d945gtp3_pin_configs,
1959 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1960 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1961 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1962 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1963 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1964 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1965 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1966 /* for backward compatibility */
5d5d3bc3
IZ		 1967 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1968 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1969 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1970 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1971 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1972 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1973 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1974 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1975 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1976 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1977 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1978};
1979
ea734963 1980static const char * const stac922x_models[STAC_922X_MODELS] = {
1607b8ea 1981 [STAC_922X_AUTO] = "auto",
f5fcc13c
TI		 1982 [STAC_D945_REF] = "ref",
1983 [STAC_D945GTP5] = "5stack",
1984 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1985 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1986 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1987 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1988 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1989 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1990 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1991 /* for backward compatibility */
f5fcc13c 1992 [STAC_MACMINI] = "macmini",
3fc24d85 1993 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1994 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1995 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1996 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1997 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1998 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1999 [STAC_922X_DELL_D81] = "dell-d81",
2000 [STAC_922X_DELL_D82] = "dell-d82",
2001 [STAC_922X_DELL_M81] = "dell-m81",
2002 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 2003};
2004
2b63536f 2005static const struct snd_pci_quirk stac922x_cfg_tbl[] = {
f5fcc13c
TI		 2006 /* SigmaTel reference board */
2007 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2008 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 2009 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2010 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 2011 /* Intel 945G based systems */
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
2013 "Intel D945G", STAC_D945GTP3),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
2015 "Intel D945G", STAC_D945GTP3),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
2017 "Intel D945G", STAC_D945GTP3),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
2019 "Intel D945G", STAC_D945GTP3),
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2021 "Intel D945G", STAC_D945GTP3),
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2023 "Intel D945G", STAC_D945GTP3),
2024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2025 "Intel D945G", STAC_D945GTP3),
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2027 "Intel D945G", STAC_D945GTP3),
2028 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2029 "Intel D945G", STAC_D945GTP3),
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2031 "Intel D945G", STAC_D945GTP3),
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2033 "Intel D945G", STAC_D945GTP3),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2035 "Intel D945G", STAC_D945GTP3),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2037 "Intel D945G", STAC_D945GTP3),
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2039 "Intel D945G", STAC_D945GTP3),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2041 "Intel D945G", STAC_D945GTP3),
2042 /* Intel D945G 5-stack systems */
2043 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2044 "Intel D945G", STAC_D945GTP5),
2045 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2046 "Intel D945G", STAC_D945GTP5),
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2048 "Intel D945G", STAC_D945GTP5),
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2050 "Intel D945G", STAC_D945GTP5),
2051 /* Intel 945P based systems */
2052 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2053 "Intel D945P", STAC_D945GTP3),
2054 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2055 "Intel D945P", STAC_D945GTP3),
2056 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2057 "Intel D945P", STAC_D945GTP3),
2058 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2059 "Intel D945P", STAC_D945GTP3),
2060 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2061 "Intel D945P", STAC_D945GTP3),
2062 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2063 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 2064 /* other intel */
2065 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
2066 "Intel D945", STAC_D945_REF),
f5fcc13c 2067 /* other systems */
536319af 2068 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2069 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2070 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2071 /* Dell systems */
2072 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2073 "unknown Dell", STAC_922X_DELL_D81),
2074 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2075 "unknown Dell", STAC_922X_DELL_D81),
2076 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2077 "unknown Dell", STAC_922X_DELL_D81),
2078 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2079 "unknown Dell", STAC_922X_DELL_D82),
2080 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2081 "unknown Dell", STAC_922X_DELL_M81),
2082 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2083 "unknown Dell", STAC_922X_DELL_D82),
2084 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2085 "unknown Dell", STAC_922X_DELL_D81),
2086 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2087 "unknown Dell", STAC_922X_DELL_D81),
2088 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2089 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 2090 /* ECS/PC Chips boards */
dea0a509 2091 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 2092 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2093 {} /* terminator */
2094};
2095
2b63536f 2096static const unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2097 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2098 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2099 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2100 0x01c42190, 0x40000100,
3cc08dc6
MP		 2101};
2102
2b63536f 2103static const unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2104 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2105 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2106 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2107 0x40000100, 0x40000100
2108};
2109
2b63536f 2110static const unsigned int d965_5st_pin_configs[14] = {
93ed1503
TD		 2111 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2112 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2113 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2114 0x40000100, 0x40000100
2115};
2116
2b63536f 2117static const unsigned int d965_5st_no_fp_pin_configs[14] = {
679d92ed
TI		 2118 0x40000100, 0x40000100, 0x0181304e, 0x01014010,
2119 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2120 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2121 0x40000100, 0x40000100
2122};
2123
2b63536f 2124static const unsigned int dell_3st_pin_configs[14] = {
4ff076e5
TD		 2125 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2126 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2127 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2128 0x40c003fc, 0x40000100
2129};
2130
2b63536f 2131static const unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2132 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2133 [STAC_D965_REF] = ref927x_pin_configs,
2134 [STAC_D965_3ST] = d965_3st_pin_configs,
2135 [STAC_D965_5ST] = d965_5st_pin_configs,
679d92ed 2136 [STAC_D965_5ST_NO_FP] = d965_5st_no_fp_pin_configs,
8e9068b1
MR		 2137 [STAC_DELL_3ST] = dell_3st_pin_configs,
2138 [STAC_DELL_BIOS] = NULL,
54930531 2139 [STAC_927X_VOLKNOB] = NULL,
3cc08dc6
MP		 2140};
2141
ea734963 2142static const char * const stac927x_models[STAC_927X_MODELS] = {
1607b8ea 2143 [STAC_927X_AUTO] = "auto",
e28d8322 2144 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2145 [STAC_D965_REF] = "ref",
2146 [STAC_D965_3ST] = "3stack",
2147 [STAC_D965_5ST] = "5stack",
679d92ed 2148 [STAC_D965_5ST_NO_FP] = "5stack-no-fp",
8e9068b1
MR		 2149 [STAC_DELL_3ST] = "dell-3stack",
2150 [STAC_DELL_BIOS] = "dell-bios",
54930531 2151 [STAC_927X_VOLKNOB] = "volknob",
f5fcc13c
TI		 2152};
2153
2b63536f 2154static const struct snd_pci_quirk stac927x_cfg_tbl[] = {
f5fcc13c
TI		 2155 /* SigmaTel reference board */
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2157 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 2158 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2159 "DFI LanParty", STAC_D965_REF),
81d3dbde 2160 /* Intel 946 based systems */
f5fcc13c
TI		 2161 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2162 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2163 /* 965 based 3 stack systems */
dea0a509
TI		 2164 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
2165 "Intel D965", STAC_D965_3ST),
2166 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
2167 "Intel D965", STAC_D965_3ST),
4ff076e5 2168 /* Dell 3 stack systems */
dfe495d0 2169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2172 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 2173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 2174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 2175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
84d3dc20 2177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR		 2178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2182 /* 965 based 5 stack systems */
dea0a509
TI		 2183 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
2184 "Intel D965", STAC_D965_5ST),
2185 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
2186 "Intel D965", STAC_D965_5ST),
54930531
TI		 2187 /* volume-knob fixes */
2188 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP		 2189 {} /* terminator */
2190};
2191
2b63536f 2192static const unsigned int ref9205_pin_configs[12] = {
f3302a59 2193 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2194 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2195 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2196};
2197
dfe495d0
TI		 2198/*
2199 STAC 9205 pin configs for
2200 102801F1
2201 102801F2
2202 102801FC
2203 102801FD
2204 10280204
2205 1028021F
3fa2ef74 2206 10280228 (Dell Vostro 1500)
95e70e87 2207 10280229 (Dell Vostro 1700)
dfe495d0 2208*/
2b63536f 2209static const unsigned int dell_9205_m42_pin_configs[12] = {
dfe495d0
TI		 2210 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2211 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2212 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2213};
2214
2215/*
2216 STAC 9205 pin configs for
2217 102801F9
2218 102801FA
2219 102801FE
2220 102801FF (Dell Precision M4300)
2221 10280206
2222 10280200
2223 10280201
2224*/
2b63536f 2225static const unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2226 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2227 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2228 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2229};
2230
2b63536f 2231static const unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2232 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2233 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2234 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2235};
2236
2b63536f 2237static const unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2238 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2239 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2240 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2241 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2242 [STAC_9205_EAPD] = NULL,
f3302a59
MP		 2243};
2244
ea734963 2245static const char * const stac9205_models[STAC_9205_MODELS] = {
1607b8ea 2246 [STAC_9205_AUTO] = "auto",
f5fcc13c 2247 [STAC_9205_REF] = "ref",
dfe495d0 2248 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2249 [STAC_9205_DELL_M43] = "dell-m43",
2250 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2251 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI		 2252};
2253
2b63536f 2254static const struct snd_pci_quirk stac9205_cfg_tbl[] = {
f5fcc13c
TI		 2255 /* SigmaTel reference board */
2256 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2257 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK		 2258 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
2259 "SigmaTel", STAC_9205_REF),
577aa2c1
MR		 2260 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2261 "DFI LanParty", STAC_9205_REF),
d9a4268e 2262 /* Dell */
dfe495d0
TI		 2263 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2264 "unknown Dell", STAC_9205_DELL_M42),
2265 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2266 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2267 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2268 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2269 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2270 "Dell Precision", STAC_9205_DELL_M43),
2271 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2272 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2273 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2274 "unknown Dell", STAC_9205_DELL_M42),
2275 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2276 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2277 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2278 "Dell Precision", STAC_9205_DELL_M43),
2279 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2280 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2281 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2282 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2283 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2284 "Dell Precision", STAC_9205_DELL_M43),
2285 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2286 "Dell Precision", STAC_9205_DELL_M43),
2287 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2288 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2289 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2290 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2291 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2292 "Dell Vostro 1500", STAC_9205_DELL_M42),
95e70e87
AA		 2293 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
2294 "Dell Vostro 1700", STAC_9205_DELL_M42),
d9a4268e 2295 /* Gateway */
42b95f0c 2296 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
d9a4268e 2297 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP		 2298 {} /* terminator */
2299};
2300
330ee995 2301static void stac92xx_set_config_regs(struct hda_codec *codec,
2b63536f 2302 const unsigned int *pincfgs)
11b44bbd
RF		 2303{
2304 int i;
2305 struct sigmatel_spec *spec = codec->spec;
11b44bbd 2306
330ee995
TI		 2307 if (!pincfgs)
2308 return;
11b44bbd 2309
87d48363 2310 for (i = 0; i < spec->num_pins; i++)
330ee995
TI		 2311 if (spec->pin_nids[i] && pincfgs[i])
2312 snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
2313 pincfgs[i]);
af9f341a
TI		 2314}
2315
dabbed6f 2316/*
c7d4b2fa 2317 * Analog playback callbacks
dabbed6f 2318 */
c7d4b2fa
M		 2319static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2320 struct hda_codec *codec,
c8b6bf9b 2321 struct snd_pcm_substream *substream)
2f2f4251 2322{
dabbed6f 2323 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2324 if (spec->stream_delay)
2325 msleep(spec->stream_delay);
9a08160b
TI		 2326 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2327 hinfo);
2f2f4251
M		 2328}
2329
2f2f4251
M		 2330static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2331 struct hda_codec *codec,
2332 unsigned int stream_tag,
2333 unsigned int format,
c8b6bf9b 2334 struct snd_pcm_substream *substream)
2f2f4251
M		 2335{
2336 struct sigmatel_spec *spec = codec->spec;
403d1944 2337 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2338}
2339
2340static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2341 struct hda_codec *codec,
c8b6bf9b 2342 struct snd_pcm_substream *substream)
2f2f4251
M		 2343{
2344 struct sigmatel_spec *spec = codec->spec;
2345 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2346}
2347
dabbed6f
M		 2348/*
2349 * Digital playback callbacks
2350 */
2351static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2352 struct hda_codec *codec,
c8b6bf9b 2353 struct snd_pcm_substream *substream)
dabbed6f
M		 2354{
2355 struct sigmatel_spec *spec = codec->spec;
2356 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2357}
2358
2359static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2360 struct hda_codec *codec,
c8b6bf9b 2361 struct snd_pcm_substream *substream)
dabbed6f
M		 2362{
2363 struct sigmatel_spec *spec = codec->spec;
2364 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2365}
2366
6b97eb45
TI		 2367static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2368 struct hda_codec *codec,
2369 unsigned int stream_tag,
2370 unsigned int format,
2371 struct snd_pcm_substream *substream)
2372{
2373 struct sigmatel_spec *spec = codec->spec;
2374 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2375 stream_tag, format, substream);
2376}
2377
9411e21c
TI		 2378static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2379 struct hda_codec *codec,
2380 struct snd_pcm_substream *substream)
2381{
2382 struct sigmatel_spec *spec = codec->spec;
2383 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2384}
2385
dabbed6f 2386
2f2f4251
M		 2387/*
2388 * Analog capture callbacks
2389 */
2390static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2391 struct hda_codec *codec,
2392 unsigned int stream_tag,
2393 unsigned int format,
c8b6bf9b 2394 struct snd_pcm_substream *substream)
2f2f4251
M		 2395{
2396 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2397 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2398
8daaaa97
MR		 2399 if (spec->powerdown_adcs) {
2400 msleep(40);
8c2f767b 2401 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2402 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2403 }
2404 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2405 return 0;
2406}
2407
2408static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2409 struct hda_codec *codec,
c8b6bf9b 2410 struct snd_pcm_substream *substream)
2f2f4251
M		 2411{
2412 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2413 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2414
8daaaa97
MR		 2415 snd_hda_codec_cleanup_stream(codec, nid);
2416 if (spec->powerdown_adcs)
8c2f767b 2417 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2418 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2419 return 0;
2420}
2421
2b63536f 2422static const struct hda_pcm_stream stac92xx_pcm_digital_playback = {
dabbed6f
M		 2423 .substreams = 1,
2424 .channels_min = 2,
2425 .channels_max = 2,
2426 /* NID is set in stac92xx_build_pcms */
2427 .ops = {
2428 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2429 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI		 2430 .prepare = stac92xx_dig_playback_pcm_prepare,
2431 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M		 2432 },
2433};
2434
2b63536f 2435static const struct hda_pcm_stream stac92xx_pcm_digital_capture = {
dabbed6f
M		 2436 .substreams = 1,
2437 .channels_min = 2,
2438 .channels_max = 2,
2439 /* NID is set in stac92xx_build_pcms */
2440};
2441
2b63536f 2442static const struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2f2f4251
M		 2443 .substreams = 1,
2444 .channels_min = 2,
c7d4b2fa 2445 .channels_max = 8,
2f2f4251
M		 2446 .nid = 0x02, /* NID to query formats and rates */
2447 .ops = {
2448 .open = stac92xx_playback_pcm_open,
2449 .prepare = stac92xx_playback_pcm_prepare,
2450 .cleanup = stac92xx_playback_pcm_cleanup
2451 },
2452};
2453
2b63536f 2454static const struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
3cc08dc6
MP		 2455 .substreams = 1,
2456 .channels_min = 2,
2457 .channels_max = 2,
2458 .nid = 0x06, /* NID to query formats and rates */
2459 .ops = {
2460 .open = stac92xx_playback_pcm_open,
2461 .prepare = stac92xx_playback_pcm_prepare,
2462 .cleanup = stac92xx_playback_pcm_cleanup
2463 },
2464};
2465
2b63536f 2466static const struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2467 .channels_min = 2,
2468 .channels_max = 2,
9e05b7a3 2469 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2470 .ops = {
2471 .prepare = stac92xx_capture_pcm_prepare,
2472 .cleanup = stac92xx_capture_pcm_cleanup
2473 },
2474};
2475
2476static int stac92xx_build_pcms(struct hda_codec *codec)
2477{
2478 struct sigmatel_spec *spec = codec->spec;
2479 struct hda_pcm *info = spec->pcm_rec;
2480
2481 codec->num_pcms = 1;
2482 codec->pcm_info = info;
2483
c7d4b2fa 2484 info->name = "STAC92xx Analog";
2f2f4251 2485 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI		 2486 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2487 spec->multiout.dac_nids[0];
2f2f4251 2488 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2489 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2490 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2491
2492 if (spec->alt_switch) {
2493 codec->num_pcms++;
2494 info++;
2495 info->name = "STAC92xx Analog Alt";
2496 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2497 }
2f2f4251 2498
dabbed6f
M		 2499 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2500 codec->num_pcms++;
2501 info++;
2502 info->name = "STAC92xx Digital";
0852d7a6 2503 info->pcm_type = spec->autocfg.dig_out_type[0];
dabbed6f
M		 2504 if (spec->multiout.dig_out_nid) {
2505 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2506 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2507 }
2508 if (spec->dig_in_nid) {
2509 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2510 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2511 }
2512 }
2513
2f2f4251
M		 2514 return 0;
2515}
2516
403d1944
MP		 2517static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2518
2519{
cdd03ced 2520 snd_hda_set_pin_ctl_cache(codec, nid, pin_type);
403d1944
MP		 2521}
2522
7c2ba97b
MR		 2523#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2524
2525static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2526 struct snd_ctl_elem_value *ucontrol)
2527{
2528 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2529 struct sigmatel_spec *spec = codec->spec;
2530
d7a89436 2531 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2532 return 0;
2533}
2534
62558ce1 2535static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid);
c6e4c666 2536
7c2ba97b
MR		 2537static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2538 struct snd_ctl_elem_value *ucontrol)
2539{
2540 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2541 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2542 int nid = kcontrol->private_value;
2543
2544 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b 2545
25985edc 2546 /* check to be sure that the ports are up to date with
7c2ba97b
MR		 2547 * switch changes
2548 */
62558ce1 2549 stac_issue_unsol_event(codec, nid);
7c2ba97b
MR		 2550
2551 return 1;
2552}
2553
7c922de7
NL		 2554static int stac92xx_dc_bias_info(struct snd_kcontrol *kcontrol,
2555 struct snd_ctl_elem_info *uinfo)
2556{
2557 int i;
2b63536f 2558 static const char * const texts[] = {
7c922de7
NL		 2559 "Mic In", "Line In", "Line Out"
2560 };
2561
2562 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2563 struct sigmatel_spec *spec = codec->spec;
2564 hda_nid_t nid = kcontrol->private_value;
2565
2566 if (nid == spec->mic_switch || nid == spec->line_switch)
2567 i = 3;
2568 else
2569 i = 2;
2570
2571 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2572 uinfo->value.enumerated.items = i;
2573 uinfo->count = 1;
2574 if (uinfo->value.enumerated.item >= i)
2575 uinfo->value.enumerated.item = i-1;
2576 strcpy(uinfo->value.enumerated.name,
2577 texts[uinfo->value.enumerated.item]);
2578
2579 return 0;
2580}
2581
2582static int stac92xx_dc_bias_get(struct snd_kcontrol *kcontrol,
2583 struct snd_ctl_elem_value *ucontrol)
2584{
2585 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2586 hda_nid_t nid = kcontrol->private_value;
2587 unsigned int vref = stac92xx_vref_get(codec, nid);
2588
4740860b 2589 if (vref == snd_hda_get_default_vref(codec, nid))
7c922de7
NL		 2590 ucontrol->value.enumerated.item[0] = 0;
2591 else if (vref == AC_PINCTL_VREF_GRD)
2592 ucontrol->value.enumerated.item[0] = 1;
2593 else if (vref == AC_PINCTL_VREF_HIZ)
2594 ucontrol->value.enumerated.item[0] = 2;
2595
2596 return 0;
2597}
2598
2599static int stac92xx_dc_bias_put(struct snd_kcontrol *kcontrol,
2600 struct snd_ctl_elem_value *ucontrol)
2601{
2602 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2603 unsigned int new_vref = 0;
b8621516 2604 int error;
7c922de7
NL		 2605 hda_nid_t nid = kcontrol->private_value;
2606
2607 if (ucontrol->value.enumerated.item[0] == 0)
4740860b 2608 new_vref = snd_hda_get_default_vref(codec, nid);
7c922de7
NL		 2609 else if (ucontrol->value.enumerated.item[0] == 1)
2610 new_vref = AC_PINCTL_VREF_GRD;
2611 else if (ucontrol->value.enumerated.item[0] == 2)
2612 new_vref = AC_PINCTL_VREF_HIZ;
2613 else
2614 return 0;
2615
2616 if (new_vref != stac92xx_vref_get(codec, nid)) {
2617 error = stac92xx_vref_set(codec, nid, new_vref);
2618 return error;
2619 }
2620
2621 return 0;
2622}
2623
2624static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol,
2625 struct snd_ctl_elem_info *uinfo)
2626{
2b63536f 2627 char *texts[2];
7c922de7
NL		 2628 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2629 struct sigmatel_spec *spec = codec->spec;
2630
2631 if (kcontrol->private_value == spec->line_switch)
2632 texts[0] = "Line In";
2633 else
2634 texts[0] = "Mic In";
2635 texts[1] = "Line Out";
2636 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2637 uinfo->value.enumerated.items = 2;
2638 uinfo->count = 1;
2639
2640 if (uinfo->value.enumerated.item >= 2)
2641 uinfo->value.enumerated.item = 1;
2642 strcpy(uinfo->value.enumerated.name,
2643 texts[uinfo->value.enumerated.item]);
2644
2645 return 0;
2646}
403d1944
MP		 2647
2648static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2649{
2650 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2651 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2652 hda_nid_t nid = kcontrol->private_value;
2653 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
403d1944 2654
7c922de7 2655 ucontrol->value.enumerated.item[0] = spec->io_switch[io_idx];
403d1944
MP		 2656 return 0;
2657}
2658
2659static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2660{
2661 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2662 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2663 hda_nid_t nid = kcontrol->private_value;
2664 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
2665 unsigned short val = !!ucontrol->value.enumerated.item[0];
403d1944
MP		 2666
2667 spec->io_switch[io_idx] = val;
2668
2669 if (val)
2670 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2671 else {
2672 unsigned int pinctl = AC_PINCTL_IN_EN;
2673 if (io_idx) /* set VREF for mic */
4740860b 2674 pinctl |= snd_hda_get_default_vref(codec, nid);
c960a03b
TI		 2675 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2676 }
40c1d308
JZ		 2677
2678 /* check the auto-mute again: we need to mute/unmute the speaker
2679 * appropriately according to the pin direction
2680 */
2681 if (spec->hp_detect)
62558ce1 2682 stac_issue_unsol_event(codec, nid);
40c1d308 2683
403d1944
MP		 2684 return 1;
2685}
2686
0fb87bb4
ML		 2687#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2688
2689static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2690 struct snd_ctl_elem_value *ucontrol)
2691{
2692 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2693 struct sigmatel_spec *spec = codec->spec;
2694
2695 ucontrol->value.integer.value[0] = spec->clfe_swap;
2696 return 0;
2697}
2698
2699static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2700 struct snd_ctl_elem_value *ucontrol)
2701{
2702 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2703 struct sigmatel_spec *spec = codec->spec;
2704 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2705 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2706
68ea7b2f 2707 if (spec->clfe_swap == val)
0fb87bb4
ML		 2708 return 0;
2709
68ea7b2f 2710 spec->clfe_swap = val;
0fb87bb4
ML		 2711
2712 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2713 spec->clfe_swap ? 0x4 : 0x0);
2714
2715 return 1;
2716}
2717
7c2ba97b
MR		 2718#define STAC_CODEC_HP_SWITCH(xname) \
2719 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2720 .name = xname, \
2721 .index = 0, \
2722 .info = stac92xx_hp_switch_info, \
2723 .get = stac92xx_hp_switch_get, \
2724 .put = stac92xx_hp_switch_put, \
2725 }
2726
403d1944
MP		 2727#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2728 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2729 .name = xname, \
2730 .index = 0, \
2731 .info = stac92xx_io_switch_info, \
2732 .get = stac92xx_io_switch_get, \
2733 .put = stac92xx_io_switch_put, \
2734 .private_value = xpval, \
2735 }
2736
0fb87bb4
ML		 2737#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2738 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2739 .name = xname, \
2740 .index = 0, \
2741 .info = stac92xx_clfe_switch_info, \
2742 .get = stac92xx_clfe_switch_get, \
2743 .put = stac92xx_clfe_switch_put, \
2744 .private_value = xpval, \
2745 }
403d1944 2746
c7d4b2fa
M		 2747enum {
2748 STAC_CTL_WIDGET_VOL,
2749 STAC_CTL_WIDGET_MUTE,
123c07ae 2750 STAC_CTL_WIDGET_MUTE_BEEP,
09a99959 2751 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2752 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2753 STAC_CTL_WIDGET_IO_SWITCH,
2fc99890
NL		 2754 STAC_CTL_WIDGET_CLFE_SWITCH,
2755 STAC_CTL_WIDGET_DC_BIAS
c7d4b2fa
M		 2756};
2757
2b63536f 2758static const struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2759 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2760 HDA_CODEC_MUTE(NULL, 0, 0, 0),
123c07ae 2761 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0),
09a99959 2762 STAC_MONO_MUX,
7c2ba97b 2763 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2764 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2765 STAC_CODEC_CLFE_SWITCH(NULL, 0),
2fc99890 2766 DC_BIAS(NULL, 0, 0),
c7d4b2fa
M		 2767};
2768
2769/* add dynamic controls */
e3c75964
TI		 2770static struct snd_kcontrol_new *
2771stac_control_new(struct sigmatel_spec *spec,
2b63536f 2772 const struct snd_kcontrol_new *ktemp,
4d02d1b6 2773 const char *name,
5e26dfd0 2774 unsigned int subdev)
c7d4b2fa 2775{
c8b6bf9b 2776 struct snd_kcontrol_new *knew;
c7d4b2fa 2777
603c4019
TI		 2778 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2779 knew = snd_array_new(&spec->kctls);
2780 if (!knew)
e3c75964 2781 return NULL;
4d4e9bb3 2782 *knew = *ktemp;
82fe0c58 2783 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI		 2784 if (!knew->name) {
2785 /* roolback */
2786 memset(knew, 0, sizeof(*knew));
2787 spec->kctls.alloced--;
2788 return NULL;
2789 }
5e26dfd0 2790 knew->subdevice = subdev;
e3c75964
TI		 2791 return knew;
2792}
2793
2794static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2b63536f 2795 const struct snd_kcontrol_new *ktemp,
e3c75964
TI		 2796 int idx, const char *name,
2797 unsigned long val)
2798{
4d02d1b6 2799 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name,
5e26dfd0 2800 HDA_SUBDEV_AMP_FLAG);
e3c75964 2801 if (!knew)
c7d4b2fa 2802 return -ENOMEM;
e3c75964 2803 knew->index = idx;
c7d4b2fa 2804 knew->private_value = val;
c7d4b2fa
M		 2805 return 0;
2806}
2807
4d4e9bb3
TI		 2808static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2809 int type, int idx, const char *name,
2810 unsigned long val)
2811{
2812 return stac92xx_add_control_temp(spec,
2813 &stac92xx_control_templates[type],
2814 idx, name, val);
2815}
2816
4682eee0
MR		 2817
2818/* add dynamic controls */
4d4e9bb3
TI		 2819static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2820 const char *name, unsigned long val)
4682eee0
MR		 2821{
2822 return stac92xx_add_control_idx(spec, type, 0, name, val);
2823}
2824
2b63536f 2825static const struct snd_kcontrol_new stac_input_src_temp = {
e3c75964
TI		 2826 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2827 .name = "Input Source",
2828 .info = stac92xx_mux_enum_info,
2829 .get = stac92xx_mux_enum_get,
2830 .put = stac92xx_mux_enum_put,
2831};
2832
7c922de7
NL		 2833static inline int stac92xx_add_jack_mode_control(struct hda_codec *codec,
2834 hda_nid_t nid, int idx)
2835{
2836 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
2837 int control = 0;
2838 struct sigmatel_spec *spec = codec->spec;
2839 char name[22];
2840
99ae28be 2841 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
4740860b 2842 if (snd_hda_get_default_vref(codec, nid) == AC_PINCTL_VREF_GRD
7c922de7
NL		 2843 && nid == spec->line_switch)
2844 control = STAC_CTL_WIDGET_IO_SWITCH;
2845 else if (snd_hda_query_pin_caps(codec, nid)
2846 & (AC_PINCAP_VREF_GRD << AC_PINCAP_VREF_SHIFT))
2847 control = STAC_CTL_WIDGET_DC_BIAS;
2848 else if (nid == spec->mic_switch)
2849 control = STAC_CTL_WIDGET_IO_SWITCH;
2850 }
2851
2852 if (control) {
201e06ff
TI		 2853 snd_hda_get_pin_label(codec, nid, &spec->autocfg,
2854 name, sizeof(name), NULL);
7c922de7
NL		 2855 return stac92xx_add_control(codec->spec, control,
2856 strcat(name, " Jack Mode"), nid);
2857 }
2858
2859 return 0;
2860}
2861
e3c75964
TI		 2862static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2863{
2864 struct snd_kcontrol_new *knew;
2865 struct hda_input_mux *imux = &spec->private_imux;
2866
3d21d3f7
TI		 2867 if (spec->auto_mic)
2868 return 0; /* no need for input source */
e3c75964
TI		 2869 if (!spec->num_adcs || imux->num_items <= 1)
2870 return 0; /* no need for input source control */
2871 knew = stac_control_new(spec, &stac_input_src_temp,
4d02d1b6 2872 stac_input_src_temp.name, 0);
e3c75964
TI		 2873 if (!knew)
2874 return -ENOMEM;
2875 knew->count = spec->num_adcs;
2876 return 0;
2877}
2878
c21ca4a8
TI		 2879/* check whether the line-input can be used as line-out */
2880static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2881{
2882 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2883 struct auto_pin_cfg *cfg = &spec->autocfg;
2884 hda_nid_t nid;
2885 unsigned int pincap;
eea7dc93 2886 int i;
8e9068b1 2887
c21ca4a8
TI		 2888 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2889 return 0;
eea7dc93 2890 for (i = 0; i < cfg->num_inputs; i++) {
86e2959a 2891 if (cfg->inputs[i].type == AUTO_PIN_LINE_IN) {
eea7dc93
TI		 2892 nid = cfg->inputs[i].pin;
2893 pincap = snd_hda_query_pin_caps(codec, nid);
2894 if (pincap & AC_PINCAP_OUT)
2895 return nid;
2896 }
2897 }
c21ca4a8
TI		 2898 return 0;
2899}
403d1944 2900
eea7dc93
TI		 2901static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid);
2902
c21ca4a8 2903/* check whether the mic-input can be used as line-out */
eea7dc93 2904static hda_nid_t check_mic_out_switch(struct hda_codec *codec, hda_nid_t *dac)
c21ca4a8
TI		 2905{
2906 struct sigmatel_spec *spec = codec->spec;
2907 struct auto_pin_cfg *cfg = &spec->autocfg;
2908 unsigned int def_conf, pincap;
86e2959a 2909 int i;
c21ca4a8 2910
eea7dc93 2911 *dac = 0;
c21ca4a8
TI		 2912 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2913 return 0;
eea7dc93
TI		 2914 for (i = 0; i < cfg->num_inputs; i++) {
2915 hda_nid_t nid = cfg->inputs[i].pin;
86e2959a 2916 if (cfg->inputs[i].type != AUTO_PIN_MIC)
eea7dc93 2917 continue;
330ee995 2918 def_conf = snd_hda_codec_get_pincfg(codec, nid);
c21ca4a8
TI		 2919 /* some laptops have an internal analog microphone
2920 * which can't be used as a output */
99ae28be 2921 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
1327a32b 2922 pincap = snd_hda_query_pin_caps(codec, nid);
eea7dc93
TI		 2923 if (pincap & AC_PINCAP_OUT) {
2924 *dac = get_unassigned_dac(codec, nid);
2925 if (*dac)
2926 return nid;
2927 }
403d1944 2928 }
403d1944 2929 }
403d1944
MP		 2930 return 0;
2931}
2932
7b043899
SL		 2933static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2934{
2935 int i;
2936
2937 for (i = 0; i < spec->multiout.num_dacs; i++) {
2938 if (spec->multiout.dac_nids[i] == nid)
2939 return 1;
2940 }
2941
2942 return 0;
2943}
2944
c21ca4a8
TI		 2945static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2946{
2947 int i;
2948 if (is_in_dac_nids(spec, nid))
2949 return 1;
2950 for (i = 0; i < spec->autocfg.hp_outs; i++)
2951 if (spec->hp_dacs[i] == nid)
2952 return 1;
2953 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2954 if (spec->speaker_dacs[i] == nid)
2955 return 1;
2956 return 0;
2957}
2958
2959static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2960{
2961 struct sigmatel_spec *spec = codec->spec;
48718eab 2962 struct auto_pin_cfg *cfg = &spec->autocfg;
c21ca4a8 2963 int j, conn_len;
48718eab 2964 hda_nid_t conn[HDA_MAX_CONNECTIONS], fallback_dac;
c21ca4a8
TI		 2965 unsigned int wcaps, wtype;
2966
2967 conn_len = snd_hda_get_connections(codec, nid, conn,
2968 HDA_MAX_CONNECTIONS);
36706005
CC		 2969 /* 92HD88: trace back up the link of nids to find the DAC */
2970 while (conn_len == 1 && (get_wcaps_type(get_wcaps(codec, conn[0]))
2971 != AC_WID_AUD_OUT)) {
2972 nid = conn[0];
2973 conn_len = snd_hda_get_connections(codec, nid, conn,
2974 HDA_MAX_CONNECTIONS);
2975 }
c21ca4a8 2976 for (j = 0; j < conn_len; j++) {
14bafe32 2977 wcaps = get_wcaps(codec, conn[j]);
a22d543a 2978 wtype = get_wcaps_type(wcaps);
c21ca4a8
TI		 2979 /* we check only analog outputs */
2980 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2981 continue;
2982 /* if this route has a free DAC, assign it */
2983 if (!check_all_dac_nids(spec, conn[j])) {
2984 if (conn_len > 1) {
2985 /* select this DAC in the pin's input mux */
2986 snd_hda_codec_write_cache(codec, nid, 0,
2987 AC_VERB_SET_CONNECT_SEL, j);
2988 }
2989 return conn[j];
2990 }
2991 }
48718eab
DH		 2992
2993 /* if all DACs are already assigned, connect to the primary DAC,
2994 unless we're assigning a secondary headphone */
2995 fallback_dac = spec->multiout.dac_nids[0];
2996 if (spec->multiout.hp_nid) {
2997 for (j = 0; j < cfg->hp_outs; j++)
2998 if (cfg->hp_pins[j] == nid) {
2999 fallback_dac = spec->multiout.hp_nid;
3000 break;
3001 }
3002 }
3003
ee58a7ca
TI		 3004 if (conn_len > 1) {
3005 for (j = 0; j < conn_len; j++) {
48718eab 3006 if (conn[j] == fallback_dac) {
ee58a7ca
TI		 3007 snd_hda_codec_write_cache(codec, nid, 0,
3008 AC_VERB_SET_CONNECT_SEL, j);
3009 break;
3010 }
3011 }
3012 }
c21ca4a8
TI		 3013 return 0;
3014}
3015
3016static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
3017static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
3018
3cc08dc6 3019/*
7b043899
SL		 3020 * Fill in the dac_nids table from the parsed pin configuration
3021 * This function only works when every pin in line_out_pins[]
3022 * contains atleast one DAC in its connection list. Some 92xx
3023 * codecs are not connected directly to a DAC, such as the 9200
3024 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 3025 */
c21ca4a8 3026static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 3027{
3028 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 3029 struct auto_pin_cfg *cfg = &spec->autocfg;
3030 int i;
3031 hda_nid_t nid, dac;
7b043899 3032
c7d4b2fa
M		 3033 for (i = 0; i < cfg->line_outs; i++) {
3034 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 3035 dac = get_unassigned_dac(codec, nid);
3036 if (!dac) {
df802952
TI		 3037 if (spec->multiout.num_dacs > 0) {
3038 /* we have already working output pins,
3039 * so let's drop the broken ones again
3040 */
3041 cfg->line_outs = spec->multiout.num_dacs;
3042 break;
3043 }
7b043899
SL		 3044 /* error out, no available DAC found */
3045 snd_printk(KERN_ERR
3046 "%s: No available DAC for pin 0x%x\n",
3047 __func__, nid);
3048 return -ENODEV;
3049 }
c21ca4a8
TI		 3050 add_spec_dacs(spec, dac);
3051 }
7b043899 3052
139e071b
TI		 3053 for (i = 0; i < cfg->hp_outs; i++) {
3054 nid = cfg->hp_pins[i];
3055 dac = get_unassigned_dac(codec, nid);
3056 if (dac) {
3057 if (!spec->multiout.hp_nid)
3058 spec->multiout.hp_nid = dac;
3059 else
3060 add_spec_extra_dacs(spec, dac);
3061 }
3062 spec->hp_dacs[i] = dac;
3063 }
3064
3065 for (i = 0; i < cfg->speaker_outs; i++) {
3066 nid = cfg->speaker_pins[i];
3067 dac = get_unassigned_dac(codec, nid);
3068 if (dac)
3069 add_spec_extra_dacs(spec, dac);
3070 spec->speaker_dacs[i] = dac;
3071 }
3072
c21ca4a8
TI		 3073 /* add line-in as output */
3074 nid = check_line_out_switch(codec);
3075 if (nid) {
3076 dac = get_unassigned_dac(codec, nid);
3077 if (dac) {
3078 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
3079 nid, cfg->line_outs);
3080 cfg->line_out_pins[cfg->line_outs] = nid;
3081 cfg->line_outs++;
3082 spec->line_switch = nid;
3083 add_spec_dacs(spec, dac);
3084 }
3085 }
3086 /* add mic as output */
eea7dc93
TI		 3087 nid = check_mic_out_switch(codec, &dac);
3088 if (nid && dac) {
3089 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
3090 nid, cfg->line_outs);
3091 cfg->line_out_pins[cfg->line_outs] = nid;
3092 cfg->line_outs++;
3093 spec->mic_switch = nid;
3094 add_spec_dacs(spec, dac);
c21ca4a8 3095 }
c7d4b2fa 3096
c21ca4a8 3097 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 3098 spec->multiout.num_dacs,
3099 spec->multiout.dac_nids[0],
3100 spec->multiout.dac_nids[1],
3101 spec->multiout.dac_nids[2],
3102 spec->multiout.dac_nids[3],
3103 spec->multiout.dac_nids[4]);
c21ca4a8 3104
c7d4b2fa
M		 3105 return 0;
3106}
3107
eb06ed8f 3108/* create volume control/switch for the given prefx type */
668b9652
TI		 3109static int create_controls_idx(struct hda_codec *codec, const char *pfx,
3110 int idx, hda_nid_t nid, int chs)
eb06ed8f 3111{
7c7767eb 3112 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI		 3113 char name[32];
3114 int err;
3115
7c7767eb
TI		 3116 if (!spec->check_volume_offset) {
3117 unsigned int caps, step, nums, db_scale;
3118 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3119 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3120 AC_AMPCAP_STEP_SIZE_SHIFT;
3121 step = (step + 1) * 25; /* in .01dB unit */
3122 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3123 AC_AMPCAP_NUM_STEPS_SHIFT;
3124 db_scale = nums * step;
3125 /* if dB scale is over -64dB, and finer enough,
3126 * let's reduce it to half
3127 */
3128 if (db_scale > 6400 && nums >= 0x1f)
3129 spec->volume_offset = nums / 2;
3130 spec->check_volume_offset = 1;
3131 }
3132
eb06ed8f 3133 sprintf(name, "%s Playback Volume", pfx);
668b9652 3134 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
7c7767eb
TI		 3135 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3136 spec->volume_offset));
eb06ed8f
TI		 3137 if (err < 0)
3138 return err;
3139 sprintf(name, "%s Playback Switch", pfx);
668b9652 3140 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
eb06ed8f
TI		 3141 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3142 if (err < 0)
3143 return err;
3144 return 0;
3145}
3146
668b9652
TI		 3147#define create_controls(codec, pfx, nid, chs) \
3148 create_controls_idx(codec, pfx, 0, nid, chs)
3149
ae0afd81
MR		 3150static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3151{
c21ca4a8 3152 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 3153 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3154 return 1;
3155 } else {
dda14410
TI		 3156 snd_BUG_ON(spec->multiout.dac_nids != spec->dac_nids);
3157 spec->dac_nids[spec->multiout.num_dacs] = nid;
ae0afd81
MR		 3158 spec->multiout.num_dacs++;
3159 }
3160 return 0;
3161}
3162
c21ca4a8 3163static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3164{
c21ca4a8
TI		 3165 int i;
3166 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3167 if (!spec->multiout.extra_out_nid[i]) {
3168 spec->multiout.extra_out_nid[i] = nid;
3169 return 0;
3170 }
3171 }
3172 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3173 return 1;
ae0afd81
MR		 3174}
3175
dc04d1b4
TI		 3176/* Create output controls
3177 * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
3178 */
3179static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
3180 const hda_nid_t *pins,
3181 const hda_nid_t *dac_nids,
3182 int type)
c7d4b2fa 3183{
76624534 3184 struct sigmatel_spec *spec = codec->spec;
ea734963 3185 static const char * const chname[4] = {
19039bd0
TI		 3186 "Front", "Surround", NULL /*CLFE*/, "Side"
3187 };
dc04d1b4 3188 hda_nid_t nid;
91589232
TI		 3189 int i, err;
3190 unsigned int wid_caps;
0fb87bb4 3191
dc04d1b4 3192 for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
ffd0e56c 3193 if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
e35d9d6a 3194 if (is_jack_detectable(codec, pins[i]))
ffd0e56c
TI		 3195 spec->hp_detect = 1;
3196 }
dc04d1b4
TI		 3197 nid = dac_nids[i];
3198 if (!nid)
3199 continue;
3200 if (type != AUTO_PIN_HP_OUT && i == 2) {
c7d4b2fa 3201 /* Center/LFE */
7c7767eb 3202 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3203 if (err < 0)
c7d4b2fa 3204 return err;
7c7767eb 3205 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3206 if (err < 0)
c7d4b2fa 3207 return err;
0fb87bb4
ML		 3208
3209 wid_caps = get_wcaps(codec, nid);
3210
3211 if (wid_caps & AC_WCAP_LR_SWAP) {
3212 err = stac92xx_add_control(spec,
3213 STAC_CTL_WIDGET_CLFE_SWITCH,
3214 "Swap Center/LFE Playback Switch", nid);
3215
3216 if (err < 0)
3217 return err;
3218 }
3219
c7d4b2fa 3220 } else {
dc04d1b4 3221 const char *name;
668b9652 3222 int idx;
dc04d1b4
TI		 3223 switch (type) {
3224 case AUTO_PIN_HP_OUT:
668b9652
TI		 3225 name = "Headphone";
3226 idx = i;
dc04d1b4
TI		 3227 break;
3228 case AUTO_PIN_SPEAKER_OUT:
298efee7
DH		 3229 if (num_outs <= 1) {
3230 name = "Speaker";
3231 idx = i;
3232 break;
3233 }
3234 /* Fall through in case of multi speaker outs */
dc04d1b4
TI		 3235 default:
3236 name = chname[i];
668b9652 3237 idx = 0;
dc04d1b4 3238 break;
76624534 3239 }
668b9652 3240 err = create_controls_idx(codec, name, idx, nid, 3);
eb06ed8f 3241 if (err < 0)
c7d4b2fa
M		 3242 return err;
3243 }
3244 }
dc04d1b4
TI		 3245 return 0;
3246}
3247
6479c631
TI		 3248static int stac92xx_add_capvol_ctls(struct hda_codec *codec, unsigned long vol,
3249 unsigned long sw, int idx)
3250{
3251 int err;
3252 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx,
bf677bd8 3253 "Capture Volume", vol);
6479c631
TI		 3254 if (err < 0)
3255 return err;
3256 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_MUTE, idx,
bf677bd8 3257 "Capture Switch", sw);
6479c631
TI		 3258 if (err < 0)
3259 return err;
3260 return 0;
3261}
3262
dc04d1b4
TI		 3263/* add playback controls from the parsed DAC table */
3264static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
3265 const struct auto_pin_cfg *cfg)
3266{
3267 struct sigmatel_spec *spec = codec->spec;
7c922de7 3268 hda_nid_t nid;
dc04d1b4 3269 int err;
7c922de7 3270 int idx;
dc04d1b4
TI		 3271
3272 err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
3273 spec->multiout.dac_nids,
3274 cfg->line_out_type);
3275 if (err < 0)
3276 return err;
c7d4b2fa 3277
a9cb5c90 3278 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3279 err = stac92xx_add_control(spec,
3280 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3281 "Headphone as Line Out Switch",
3282 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3283 if (err < 0)
3284 return err;
3285 }
3286
eea7dc93 3287 for (idx = 0; idx < cfg->num_inputs; idx++) {
86e2959a 3288 if (cfg->inputs[idx].type > AUTO_PIN_LINE_IN)
eea7dc93
TI		 3289 break;
3290 nid = cfg->inputs[idx].pin;
3291 err = stac92xx_add_jack_mode_control(codec, nid, idx);
3292 if (err < 0)
3293 return err;
b5895dc8 3294 }
403d1944 3295
c7d4b2fa
M		 3296 return 0;
3297}
3298
eb06ed8f
TI		 3299/* add playback controls for Speaker and HP outputs */
3300static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3301 struct auto_pin_cfg *cfg)
3302{
3303 struct sigmatel_spec *spec = codec->spec;
dc04d1b4
TI		 3304 int err;
3305
3306 err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
3307 spec->hp_dacs, AUTO_PIN_HP_OUT);
3308 if (err < 0)
3309 return err;
3310
3311 err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
3312 spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
3313 if (err < 0)
3314 return err;
eb06ed8f 3315
c7d4b2fa
M		 3316 return 0;
3317}
3318
b22b4821 3319/* labels for mono mux outputs */
ea734963 3320static const char * const stac92xx_mono_labels[4] = {
d0513fc6 3321 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3322};
3323
3324/* create mono mux for mono out on capable codecs */
3325static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3326{
3327 struct sigmatel_spec *spec = codec->spec;
3328 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3329 int i, num_cons;
3330 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3331
3332 num_cons = snd_hda_get_connections(codec,
3333 spec->mono_nid,
3334 con_lst,
3335 HDA_MAX_NUM_INPUTS);
16a433d8 3336 if (num_cons <= 0 || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
b22b4821
MR		 3337 return -EINVAL;
3338
10a20af7
TI		 3339 for (i = 0; i < num_cons; i++)
3340 snd_hda_add_imux_item(mono_mux, stac92xx_mono_labels[i], i,
3341 NULL);
09a99959
MR		 3342
3343 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3344 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3345}
3346
1cd2224c
MR		 3347/* create PC beep volume controls */
3348static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3349 hda_nid_t nid)
3350{
3351 struct sigmatel_spec *spec = codec->spec;
3352 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
123c07ae
JK		 3353 int err, type = STAC_CTL_WIDGET_MUTE_BEEP;
3354
3355 if (spec->anabeep_nid == nid)
3356 type = STAC_CTL_WIDGET_MUTE;
1cd2224c
MR		 3357
3358 /* check for mute support for the the amp */
3359 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
123c07ae 3360 err = stac92xx_add_control(spec, type,
d355c82a 3361 "Beep Playback Switch",
1cd2224c
MR		 3362 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3363 if (err < 0)
3364 return err;
3365 }
3366
3367 /* check to see if there is volume support for the amp */
3368 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3369 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
d355c82a 3370 "Beep Playback Volume",
1cd2224c
MR		 3371 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3372 if (err < 0)
3373 return err;
3374 }
3375 return 0;
3376}
3377
4d4e9bb3
TI		 3378#ifdef CONFIG_SND_HDA_INPUT_BEEP
3379#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3380
3381static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3382 struct snd_ctl_elem_value *ucontrol)
3383{
3384 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3385 ucontrol->value.integer.value[0] = codec->beep->enabled;
3386 return 0;
3387}
3388
3389static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3390 struct snd_ctl_elem_value *ucontrol)
3391{
3392 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
123c07ae 3393 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
4d4e9bb3
TI		 3394}
3395
2b63536f 3396static const struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
4d4e9bb3
TI		 3397 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3398 .info = stac92xx_dig_beep_switch_info,
3399 .get = stac92xx_dig_beep_switch_get,
3400 .put = stac92xx_dig_beep_switch_put,
3401};
3402
3403static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3404{
3405 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
d355c82a 3406 0, "Beep Playback Switch", 0);
4d4e9bb3
TI		 3407}
3408#endif
3409
4682eee0
MR		 3410static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3411{
3412 struct sigmatel_spec *spec = codec->spec;
667067d8 3413 int i, j, err = 0;
4682eee0
MR		 3414
3415 for (i = 0; i < spec->num_muxes; i++) {
667067d8
TI		 3416 hda_nid_t nid;
3417 unsigned int wcaps;
3418 unsigned long val;
3419
4682eee0
MR		 3420 nid = spec->mux_nids[i];
3421 wcaps = get_wcaps(codec, nid);
667067d8
TI		 3422 if (!(wcaps & AC_WCAP_OUT_AMP))
3423 continue;
4682eee0 3424
667067d8
TI		 3425 /* check whether already the same control was created as
3426 * normal Capture Volume.
3427 */
3428 val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
3429 for (j = 0; j < spec->num_caps; j++) {
3430 if (spec->capvols[j] == val)
3431 break;
4682eee0 3432 }
667067d8
TI		 3433 if (j < spec->num_caps)
3434 continue;
3435
3436 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, i,
3437 "Mux Capture Volume", val);
3438 if (err < 0)
3439 return err;
4682eee0
MR		 3440 }
3441 return 0;
3442};
3443
ea734963 3444static const char * const stac92xx_spdif_labels[3] = {
65973632 3445 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3446};
3447
3448static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3449{
3450 struct sigmatel_spec *spec = codec->spec;
3451 struct hda_input_mux *spdif_mux = &spec->private_smux;
ea734963 3452 const char * const *labels = spec->spdif_labels;
d9737751 3453 int i, num_cons;
65973632 3454 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3455
3456 num_cons = snd_hda_get_connections(codec,
3457 spec->smux_nids[0],
3458 con_lst,
3459 HDA_MAX_NUM_INPUTS);
16a433d8 3460 if (num_cons <= 0)
d9737751
MR		 3461 return -EINVAL;
3462
65973632
MR		 3463 if (!labels)
3464 labels = stac92xx_spdif_labels;
3465
10a20af7
TI		 3466 for (i = 0; i < num_cons; i++)
3467 snd_hda_add_imux_item(spdif_mux, labels[i], i, NULL);
d9737751
MR		 3468
3469 return 0;
3470}
3471
8b65727b 3472/* labels for dmic mux inputs */
ea734963 3473static const char * const stac92xx_dmic_labels[5] = {
8b65727b
MP		 3474 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3475 "Digital Mic 3", "Digital Mic 4"
3476};
3477
699d8995
VK		 3478static hda_nid_t get_connected_node(struct hda_codec *codec, hda_nid_t mux,
3479 int idx)
3480{
3481 hda_nid_t conn[HDA_MAX_NUM_INPUTS];
3482 int nums;
3483 nums = snd_hda_get_connections(codec, mux, conn, ARRAY_SIZE(conn));
3484 if (idx >= 0 && idx < nums)
3485 return conn[idx];
3486 return 0;
3487}
3488
8d087c76
TI		 3489/* look for NID recursively */
3490#define get_connection_index(codec, mux, nid) \
3491 snd_hda_get_conn_index(codec, mux, nid, 1)
3d21d3f7 3492
667067d8 3493/* create a volume assigned to the given pin (only if supported) */
96f845de 3494/* return 1 if the volume control is created */
667067d8 3495static int create_elem_capture_vol(struct hda_codec *codec, hda_nid_t nid,
eea7dc93 3496 const char *label, int idx, int direction)
667067d8
TI		 3497{
3498 unsigned int caps, nums;
3499 char name[32];
96f845de 3500 int err;
667067d8 3501
96f845de
TI		 3502 if (direction == HDA_OUTPUT)
3503 caps = AC_WCAP_OUT_AMP;
3504 else
3505 caps = AC_WCAP_IN_AMP;
3506 if (!(get_wcaps(codec, nid) & caps))
667067d8 3507 return 0;
96f845de 3508 caps = query_amp_caps(codec, nid, direction);
667067d8
TI		 3509 nums = (caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT;
3510 if (!nums)
3511 return 0;
3512 snprintf(name, sizeof(name), "%s Capture Volume", label);
eea7dc93
TI		 3513 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx, name,
3514 HDA_COMPOSE_AMP_VAL(nid, 3, 0, direction));
96f845de
TI		 3515 if (err < 0)
3516 return err;
3517 return 1;
667067d8
TI		 3518}
3519
8b65727b
MP		 3520/* create playback/capture controls for input pins on dmic capable codecs */
3521static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3522 const struct auto_pin_cfg *cfg)
3523{
3524 struct sigmatel_spec *spec = codec->spec;
5207e10e 3525 struct hda_input_mux *imux = &spec->private_imux;
8b65727b 3526 struct hda_input_mux *dimux = &spec->private_dimux;
263d0328 3527 int err, i;
5207e10e 3528 unsigned int def_conf;
8b65727b 3529
10a20af7 3530 snd_hda_add_imux_item(dimux, stac92xx_dmic_labels[0], 0, NULL);
5207e10e 3531
8b65727b 3532 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3533 hda_nid_t nid;
10a20af7 3534 int index, type_idx;
201e06ff 3535 char label[32];
8b65727b 3536
667067d8
TI		 3537 nid = spec->dmic_nids[i];
3538 if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_PIN)
3539 continue;
3540 def_conf = snd_hda_codec_get_pincfg(codec, nid);
8b65727b
MP		 3541 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3542 continue;
3543
3d21d3f7
TI		 3544 index = get_connection_index(codec, spec->dmux_nids[0], nid);
3545 if (index < 0)
3546 continue;
3547
201e06ff
TI		 3548 snd_hda_get_pin_label(codec, nid, &spec->autocfg,
3549 label, sizeof(label), NULL);
10a20af7 3550 snd_hda_add_imux_item(dimux, label, index, &type_idx);
2d7ec12b
TI		 3551 if (snd_hda_get_bool_hint(codec, "separate_dmux") != 1)
3552 snd_hda_add_imux_item(imux, label, index, &type_idx);
5207e10e 3553
10a20af7
TI		 3554 err = create_elem_capture_vol(codec, nid, label, type_idx,
3555 HDA_INPUT);
667067d8
TI		 3556 if (err < 0)
3557 return err;
96f845de
TI		 3558 if (!err) {
3559 err = create_elem_capture_vol(codec, nid, label,
10a20af7 3560 type_idx, HDA_OUTPUT);
96f845de
TI		 3561 if (err < 0)
3562 return err;
699d8995
VK		 3563 if (!err) {
3564 nid = get_connected_node(codec,
3565 spec->dmux_nids[0], index);
3566 if (nid)
3567 err = create_elem_capture_vol(codec,
3568 nid, label,
3569 type_idx, HDA_INPUT);
3570 if (err < 0)
3571 return err;
3572 }
96f845de 3573 }
8b65727b
MP		 3574 }
3575
3576 return 0;
3577}
3578
3d21d3f7 3579static int check_mic_pin(struct hda_codec *codec, hda_nid_t nid,
9907790a 3580 hda_nid_t *fixed, hda_nid_t *ext, hda_nid_t *dock)
3d21d3f7
TI		 3581{
3582 unsigned int cfg;
1f83ac5a 3583 unsigned int type;
3d21d3f7
TI		 3584
3585 if (!nid)
3586 return 0;
3587 cfg = snd_hda_codec_get_pincfg(codec, nid);
1f83ac5a 3588 type = get_defcfg_device(cfg);
99ae28be
TI		 3589 switch (snd_hda_get_input_pin_attr(cfg)) {
3590 case INPUT_PIN_ATTR_INT:
3d21d3f7
TI		 3591 if (*fixed)
3592 return 1; /* already occupied */
1f83ac5a
TI		 3593 if (type != AC_JACK_MIC_IN)
3594 return 1; /* invalid type */
3d21d3f7
TI		 3595 *fixed = nid;
3596 break;
99ae28be
TI		 3597 case INPUT_PIN_ATTR_UNUSED:
3598 break;
3599 case INPUT_PIN_ATTR_DOCK:
3600 if (*dock)
3601 return 1; /* already occupied */
1f83ac5a
TI		 3602 if (type != AC_JACK_MIC_IN && type != AC_JACK_LINE_IN)
3603 return 1; /* invalid type */
99ae28be
TI		 3604 *dock = nid;
3605 break;
3606 default:
3d21d3f7
TI		 3607 if (*ext)
3608 return 1; /* already occupied */
1f83ac5a
TI		 3609 if (type != AC_JACK_MIC_IN)
3610 return 1; /* invalid type */
3d21d3f7
TI		 3611 *ext = nid;
3612 break;
3613 }
3614 return 0;
3615}
3616
3617static int set_mic_route(struct hda_codec *codec,
3618 struct sigmatel_mic_route *mic,
3619 hda_nid_t pin)
3620{
3621 struct sigmatel_spec *spec = codec->spec;
3622 struct auto_pin_cfg *cfg = &spec->autocfg;
3623 int i;
3624
3625 mic->pin = pin;
9907790a
CC		 3626 if (pin == 0)
3627 return 0;
eea7dc93
TI		 3628 for (i = 0; i < cfg->num_inputs; i++) {
3629 if (pin == cfg->inputs[i].pin)
3d21d3f7 3630 break;
eea7dc93 3631 }
86e2959a 3632 if (i < cfg->num_inputs && cfg->inputs[i].type == AUTO_PIN_MIC) {
3d21d3f7 3633 /* analog pin */
3d21d3f7
TI		 3634 i = get_connection_index(codec, spec->mux_nids[0], pin);
3635 if (i < 0)
3636 return -1;
3637 mic->mux_idx = i;
02d33322
TI		 3638 mic->dmux_idx = -1;
3639 if (spec->dmux_nids)
3640 mic->dmux_idx = get_connection_index(codec,
3641 spec->dmux_nids[0],
3642 spec->mux_nids[0]);
da2a2aaa 3643 } else if (spec->dmux_nids) {
3d21d3f7 3644 /* digital pin */
3d21d3f7
TI		 3645 i = get_connection_index(codec, spec->dmux_nids[0], pin);
3646 if (i < 0)
3647 return -1;
3648 mic->dmux_idx = i;
02d33322
TI		 3649 mic->mux_idx = -1;
3650 if (spec->mux_nids)
3651 mic->mux_idx = get_connection_index(codec,
3652 spec->mux_nids[0],
3653 spec->dmux_nids[0]);
3d21d3f7
TI		 3654 }
3655 return 0;
3656}
3657
3658/* return non-zero if the device is for automatic mic switch */
3659static int stac_check_auto_mic(struct hda_codec *codec)
3660{
3661 struct sigmatel_spec *spec = codec->spec;
3662 struct auto_pin_cfg *cfg = &spec->autocfg;
9907790a 3663 hda_nid_t fixed, ext, dock;
3d21d3f7
TI		 3664 int i;
3665
9907790a 3666 fixed = ext = dock = 0;
eea7dc93 3667 for (i = 0; i < cfg->num_inputs; i++)
9907790a
CC		 3668 if (check_mic_pin(codec, cfg->inputs[i].pin,
3669 &fixed, &ext, &dock))
3d21d3f7
TI		 3670 return 0;
3671 for (i = 0; i < spec->num_dmics; i++)
9907790a
CC		 3672 if (check_mic_pin(codec, spec->dmic_nids[i],
3673 &fixed, &ext, &dock))
3d21d3f7 3674 return 0;
80c67852 3675 if (!fixed || (!ext && !dock))
9907790a 3676 return 0; /* no input to switch */
e35d9d6a 3677 if (!is_jack_detectable(codec, ext))
3d21d3f7
TI		 3678 return 0; /* no unsol support */
3679 if (set_mic_route(codec, &spec->ext_mic, ext) ||
9907790a
CC		 3680 set_mic_route(codec, &spec->int_mic, fixed) ||
3681 set_mic_route(codec, &spec->dock_mic, dock))
3d21d3f7
TI		 3682 return 0; /* something is wrong */
3683 return 1;
3684}
3685
c7d4b2fa
M		 3686/* create playback/capture controls for input pins */
3687static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3688{
3689 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 3690 struct hda_input_mux *imux = &spec->private_imux;
667067d8 3691 int i, j;
263d0328 3692 const char *label;
c7d4b2fa 3693
eea7dc93
TI		 3694 for (i = 0; i < cfg->num_inputs; i++) {
3695 hda_nid_t nid = cfg->inputs[i].pin;
10a20af7 3696 int index, err, type_idx;
314634bc 3697
314634bc
TI		 3698 index = -1;
3699 for (j = 0; j < spec->num_muxes; j++) {
667067d8
TI		 3700 index = get_connection_index(codec, spec->mux_nids[j],
3701 nid);
3702 if (index >= 0)
3703 break;
c7d4b2fa 3704 }
667067d8
TI		 3705 if (index < 0)
3706 continue;
3707
10a20af7
TI		 3708 label = hda_get_autocfg_input_label(codec, cfg, i);
3709 snd_hda_add_imux_item(imux, label, index, &type_idx);
263d0328 3710
667067d8 3711 err = create_elem_capture_vol(codec, nid,
263d0328 3712 label, type_idx,
96f845de 3713 HDA_INPUT);
667067d8
TI		 3714 if (err < 0)
3715 return err;
c7d4b2fa 3716 }
5207e10e 3717 spec->num_analog_muxes = imux->num_items;
c7d4b2fa 3718
7b043899 3719 if (imux->num_items) {
62fe78e9
SR		 3720 /*
3721 * Set the current input for the muxes.
3722 * The STAC9221 has two input muxes with identical source
3723 * NID lists. Hopefully this won't get confused.
3724 */
3725 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3726 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3727 AC_VERB_SET_CONNECT_SEL,
3728 imux->items[0].index);
62fe78e9
SR		 3729 }
3730 }
3731
c7d4b2fa
M		 3732 return 0;
3733}
3734
c7d4b2fa
M		 3735static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3736{
3737 struct sigmatel_spec *spec = codec->spec;
3738 int i;
3739
3740 for (i = 0; i < spec->autocfg.line_outs; i++) {
3741 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3742 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3743 }
3744}
3745
3746static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3747{
3748 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3749 int i;
c7d4b2fa 3750
eb06ed8f
TI		 3751 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3752 hda_nid_t pin;
3753 pin = spec->autocfg.hp_pins[i];
3754 if (pin) /* connect to front */
3755 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3756 }
3757 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3758 hda_nid_t pin;
3759 pin = spec->autocfg.speaker_pins[i];
3760 if (pin) /* connect to front */
3761 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3762 }
c7d4b2fa
M		 3763}
3764
8af3aeb4
TI		 3765static int is_dual_headphones(struct hda_codec *codec)
3766{
3767 struct sigmatel_spec *spec = codec->spec;
3768 int i, valid_hps;
3769
3770 if (spec->autocfg.line_out_type != AUTO_PIN_SPEAKER_OUT ||
3771 spec->autocfg.hp_outs <= 1)
3772 return 0;
3773 valid_hps = 0;
3774 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3775 hda_nid_t nid = spec->autocfg.hp_pins[i];
3776 unsigned int cfg = snd_hda_codec_get_pincfg(codec, nid);
3777 if (get_defcfg_location(cfg) & AC_JACK_LOC_SEPARATE)
3778 continue;
3779 valid_hps++;
3780 }
3781 return (valid_hps > 1);
3782}
3783
3784
9009b0e4 3785static int stac92xx_parse_auto_config(struct hda_codec *codec)
c7d4b2fa
M		 3786{
3787 struct sigmatel_spec *spec = codec->spec;
9009b0e4 3788 hda_nid_t dig_out = 0, dig_in = 0;
dc04d1b4 3789 int hp_swap = 0;
6479c631 3790 int i, err;
c7d4b2fa 3791
8b65727b
MP		 3792 if ((err = snd_hda_parse_pin_def_config(codec,
3793 &spec->autocfg,
3794 spec->dmic_nids)) < 0)
c7d4b2fa 3795 return err;
82bc955f 3796 if (! spec->autocfg.line_outs)
869264c4 3797 return 0; /* can't find valid pin config */
19039bd0 3798
bcecd9bd
JZ		 3799 /* If we have no real line-out pin and multiple hp-outs, HPs should
3800 * be set up as multi-channel outputs.
3801 */
8af3aeb4 3802 if (is_dual_headphones(codec)) {
bcecd9bd
JZ		 3803 /* Copy hp_outs to line_outs, backup line_outs in
3804 * speaker_outs so that the following routines can handle
3805 * HP pins as primary outputs.
3806 */
c21ca4a8 3807 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3808 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3809 sizeof(spec->autocfg.line_out_pins));
3810 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3811 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3812 sizeof(spec->autocfg.hp_pins));
3813 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3814 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3815 spec->autocfg.hp_outs = 0;
dc04d1b4 3816 hp_swap = 1;
bcecd9bd 3817 }
09a99959 3818 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3819 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3820 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3821 u32 caps = query_amp_caps(codec,
3822 spec->autocfg.mono_out_pin, dir);
3823 hda_nid_t conn_list[1];
3824
3825 /* get the mixer node and then the mono mux if it exists */
3826 if (snd_hda_get_connections(codec,
3827 spec->autocfg.mono_out_pin, conn_list, 1) &&
3828 snd_hda_get_connections(codec, conn_list[0],
16a433d8 3829 conn_list, 1) > 0) {
09a99959
MR		 3830
3831 int wcaps = get_wcaps(codec, conn_list[0]);
a22d543a 3832 int wid_type = get_wcaps_type(wcaps);
09a99959
MR		 3833 /* LR swap check, some stac925x have a mux that
3834 * changes the DACs output path instead of the
3835 * mono-mux path.
3836 */
3837 if (wid_type == AC_WID_AUD_SEL &&
3838 !(wcaps & AC_WCAP_LR_SWAP))
3839 spec->mono_nid = conn_list[0];
3840 }
d0513fc6
MR		 3841 if (dir) {
3842 hda_nid_t nid = spec->autocfg.mono_out_pin;
3843
3844 /* most mono outs have a least a mute/unmute switch */
3845 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3846 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3847 "Mono Playback Switch",
3848 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3849 if (err < 0)
3850 return err;
d0513fc6
MR		 3851 /* check for volume support for the amp */
3852 if ((caps & AC_AMPCAP_NUM_STEPS)
3853 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3854 err = stac92xx_add_control(spec,
3855 STAC_CTL_WIDGET_VOL,
3856 "Mono Playback Volume",
3857 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3858 if (err < 0)
3859 return err;
3860 }
09a99959
MR		 3861 }
3862
3863 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3864 AC_PINCTL_OUT_EN);
3865 }
bcecd9bd 3866
c21ca4a8
TI		 3867 if (!spec->multiout.num_dacs) {
3868 err = stac92xx_auto_fill_dac_nids(codec);
3869 if (err < 0)
19039bd0 3870 return err;
c9280d68
TI		 3871 err = stac92xx_auto_create_multi_out_ctls(codec,
3872 &spec->autocfg);
3873 if (err < 0)
3874 return err;
c21ca4a8 3875 }
c7d4b2fa 3876
1cd2224c
MR		 3877 /* setup analog beep controls */
3878 if (spec->anabeep_nid > 0) {
3879 err = stac92xx_auto_create_beep_ctls(codec,
3880 spec->anabeep_nid);
3881 if (err < 0)
3882 return err;
3883 }
3884
3885 /* setup digital beep controls and input device */
3886#ifdef CONFIG_SND_HDA_INPUT_BEEP
3887 if (spec->digbeep_nid > 0) {
3888 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3889 unsigned int caps;
1cd2224c
MR		 3890
3891 err = stac92xx_auto_create_beep_ctls(codec, nid);
3892 if (err < 0)
3893 return err;
3894 err = snd_hda_attach_beep_device(codec, nid);
3895 if (err < 0)
3896 return err;
d8d881dd
TI		 3897 if (codec->beep) {
3898 /* IDT/STAC codecs have linear beep tone parameter */
1b0e372d 3899 codec->beep->linear_tone = spec->linear_tone_beep;
d8d881dd
TI		 3900 /* if no beep switch is available, make its own one */
3901 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3902 if (!(caps & AC_AMPCAP_MUTE)) {
3903 err = stac92xx_beep_switch_ctl(codec);
3904 if (err < 0)
3905 return err;
3906 }
4d4e9bb3 3907 }
1cd2224c
MR		 3908 }
3909#endif
3910
0fb87bb4 3911 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
0fb87bb4
ML		 3912 if (err < 0)
3913 return err;
3914
dc04d1b4
TI		 3915 /* All output parsing done, now restore the swapped hp pins */
3916 if (hp_swap) {
3917 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3918 sizeof(spec->autocfg.hp_pins));
3919 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3920 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3921 spec->autocfg.line_outs = 0;
3922 }
0fb87bb4 3923
3d21d3f7
TI		 3924 if (stac_check_auto_mic(codec)) {
3925 spec->auto_mic = 1;
3926 /* only one capture for auto-mic */
3927 spec->num_adcs = 1;
3928 spec->num_caps = 1;
3929 spec->num_muxes = 1;
3930 }
3931
6479c631
TI		 3932 for (i = 0; i < spec->num_caps; i++) {
3933 err = stac92xx_add_capvol_ctls(codec, spec->capvols[i],
3934 spec->capsws[i], i);
3935 if (err < 0)
3936 return err;
3937 }
3938
dc04d1b4 3939 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
0fb87bb4 3940 if (err < 0)
c7d4b2fa
M		 3941 return err;
3942
b22b4821
MR		 3943 if (spec->mono_nid > 0) {
3944 err = stac92xx_auto_create_mono_output_ctls(codec);
3945 if (err < 0)
3946 return err;
3947 }
2a9c7816 3948 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3949 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3950 &spec->autocfg)) < 0)
3951 return err;
4682eee0
MR		 3952 if (spec->num_muxes > 0) {
3953 err = stac92xx_auto_create_mux_input_ctls(codec);
3954 if (err < 0)
3955 return err;
3956 }
d9737751
MR		 3957 if (spec->num_smuxes > 0) {
3958 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3959 if (err < 0)
3960 return err;
3961 }
8b65727b 3962
e3c75964
TI		 3963 err = stac92xx_add_input_source(spec);
3964 if (err < 0)
3965 return err;
3966
c7d4b2fa 3967 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3968 if (spec->multiout.max_channels > 2)
c7d4b2fa 3969 spec->surr_switch = 1;
c7d4b2fa 3970
9009b0e4
CC		 3971 /* find digital out and in converters */
3972 for (i = codec->start_nid; i < codec->start_nid + codec->num_nodes; i++) {
3973 unsigned int wid_caps = get_wcaps(codec, i);
3974 if (wid_caps & AC_WCAP_DIGITAL) {
3975 switch (get_wcaps_type(wid_caps)) {
3976 case AC_WID_AUD_OUT:
3977 if (!dig_out)
3978 dig_out = i;
3979 break;
3980 case AC_WID_AUD_IN:
3981 if (!dig_in)
3982 dig_in = i;
3983 break;
3984 }
3985 }
3986 }
0852d7a6 3987 if (spec->autocfg.dig_outs)
3cc08dc6 3988 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3989 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3990 spec->dig_in_nid = dig_in;
c7d4b2fa 3991
603c4019
TI		 3992 if (spec->kctls.list)
3993 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3994
3995 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 3996 if (!spec->dinput_mux)
3997 spec->dinput_mux = &spec->private_dimux;
d9737751 3998 spec->sinput_mux = &spec->private_smux;
b22b4821 3999 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 4000 return 1;
4001}
4002
82bc955f
TI		 4003/* add playback controls for HP output */
4004static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
4005 struct auto_pin_cfg *cfg)
4006{
4007 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 4008 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 4009
4010 if (! pin)
4011 return 0;
4012
e35d9d6a 4013 if (is_jack_detectable(codec, pin))
82bc955f 4014 spec->hp_detect = 1;
82bc955f
TI		 4015
4016 return 0;
4017}
4018
160ea0dc
RF		 4019/* add playback controls for LFE output */
4020static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
4021 struct auto_pin_cfg *cfg)
4022{
4023 struct sigmatel_spec *spec = codec->spec;
4024 int err;
4025 hda_nid_t lfe_pin = 0x0;
4026 int i;
4027
4028 /*
4029 * search speaker outs and line outs for a mono speaker pin
4030 * with an amp. If one is found, add LFE controls
4031 * for it.
4032 */
4033 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
4034 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 4035 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 4036 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
4037 if (wcaps == AC_WCAP_OUT_AMP)
4038 /* found a mono speaker with an amp, must be lfe */
4039 lfe_pin = pin;
4040 }
4041
4042 /* if speaker_outs is 0, then speakers may be in line_outs */
4043 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
4044 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
4045 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 4046 unsigned int defcfg;
330ee995 4047 defcfg = snd_hda_codec_get_pincfg(codec, pin);
8b551785 4048 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 4049 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 4050 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
4051 if (wcaps == AC_WCAP_OUT_AMP)
4052 /* found a mono speaker with an amp,
4053 must be lfe */
4054 lfe_pin = pin;
4055 }
4056 }
4057 }
4058
4059 if (lfe_pin) {
7c7767eb 4060 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF		 4061 if (err < 0)
4062 return err;
4063 }
4064
4065 return 0;
4066}
4067
c7d4b2fa
M		 4068static int stac9200_parse_auto_config(struct hda_codec *codec)
4069{
4070 struct sigmatel_spec *spec = codec->spec;
4071 int err;
4072
df694daa 4073 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 4074 return err;
4075
4076 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
4077 return err;
4078
82bc955f
TI		 4079 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
4080 return err;
4081
160ea0dc
RF		 4082 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
4083 return err;
4084
355a0ec4
TI		 4085 if (spec->num_muxes > 0) {
4086 err = stac92xx_auto_create_mux_input_ctls(codec);
4087 if (err < 0)
4088 return err;
4089 }
4090
e3c75964
TI		 4091 err = stac92xx_add_input_source(spec);
4092 if (err < 0)
4093 return err;
4094
0852d7a6 4095 if (spec->autocfg.dig_outs)
c7d4b2fa 4096 spec->multiout.dig_out_nid = 0x05;
82bc955f 4097 if (spec->autocfg.dig_in_pin)
c7d4b2fa 4098 spec->dig_in_nid = 0x04;
c7d4b2fa 4099
603c4019
TI		 4100 if (spec->kctls.list)
4101 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 4102
4103 spec->input_mux = &spec->private_imux;
8b65727b 4104 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 4105
4106 return 1;
4107}
4108
62fe78e9
SR		 4109/*
4110 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
4111 * funky external mute control using GPIO pins.
4112 */
4113
76e1ddfb 4114static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 4115 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 4116{
4117 unsigned int gpiostate, gpiomask, gpiodir;
4118
45eebda7
VK		 4119 snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
4120
62fe78e9
SR		 4121 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
4122 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 4123 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 4124
4125 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
4126 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 4127 gpiomask |= mask;
62fe78e9
SR		 4128
4129 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
4130 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 4131 gpiodir |= dir_mask;
62fe78e9 4132
76e1ddfb 4133 /* Configure GPIOx as CMOS */
62fe78e9
SR		 4134 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
4135
4136 snd_hda_codec_write(codec, codec->afg, 0,
4137 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 4138 snd_hda_codec_read(codec, codec->afg, 0,
4139 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 4140
4141 msleep(1);
4142
76e1ddfb
TI		 4143 snd_hda_codec_read(codec, codec->afg, 0,
4144 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 4145}
4146
3a93897e 4147static int stac_add_event(struct hda_codec *codec, hda_nid_t nid,
c6e4c666 4148 unsigned char type, int data)
74aeaabc 4149{
3a93897e 4150 struct hda_jack_tbl *event;
74aeaabc 4151
3a93897e 4152 event = snd_hda_jack_tbl_new(codec, nid);
74aeaabc
MR		 4153 if (!event)
4154 return -ENOMEM;
3a93897e
TI		 4155 event->action = type;
4156 event->private_data = data;
c6e4c666 4157
3a93897e 4158 return 0;
c6e4c666
TI		 4159}
4160
62558ce1
TI		 4161/* check if given nid is a valid pin and no other events are assigned
4162 * to it. If OK, assign the event, set the unsol flag, and returns 1.
4163 * Otherwise, returns zero.
4164 */
4165static int enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
4166 unsigned int type)
c6e4c666 4167{
3a93897e 4168 struct hda_jack_tbl *event;
c6e4c666 4169
e35d9d6a 4170 if (!is_jack_detectable(codec, nid))
62558ce1 4171 return 0;
3a93897e
TI		 4172 event = snd_hda_jack_tbl_new(codec, nid);
4173 if (!event)
4174 return -ENOMEM;
4175 if (event->action && event->action != type)
4176 return 0;
4177 event->action = type;
4178 snd_hda_jack_detect_enable(codec, nid, 0);
62558ce1 4179 return 1;
314634bc
TI		 4180}
4181
b4ead019 4182static int is_nid_out_jack_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
a64135a2
MR		 4183{
4184 int i;
4185 for (i = 0; i < cfg->hp_outs; i++)
4186 if (cfg->hp_pins[i] == nid)
4187 return 1; /* nid is a HP-Out */
b4ead019
TI		 4188 for (i = 0; i < cfg->line_outs; i++)
4189 if (cfg->line_out_pins[i] == nid)
4190 return 1; /* nid is a line-Out */
a64135a2
MR		 4191 return 0; /* nid is not a HP-Out */
4192};
4193
b76c850f
MR		 4194static void stac92xx_power_down(struct hda_codec *codec)
4195{
4196 struct sigmatel_spec *spec = codec->spec;
4197
4198 /* power down inactive DACs */
2b63536f 4199 const hda_nid_t *dac;
b76c850f 4200 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4201 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4202 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 4203 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4204}
4205
f73d3585
TI		 4206static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4207 int enable);
4208
014c41fc
TI		 4209static inline int get_int_hint(struct hda_codec *codec, const char *key,
4210 int *valp)
4211{
4212 const char *p;
4213 p = snd_hda_get_hint(codec, key);
4214 if (p) {
4215 unsigned long val;
4216 if (!strict_strtoul(p, 0, &val)) {
4217 *valp = val;
4218 return 1;
4219 }
4220 }
4221 return 0;
4222}
4223
6565e4fa
TI		 4224/* override some hints from the hwdep entry */
4225static void stac_store_hints(struct hda_codec *codec)
4226{
4227 struct sigmatel_spec *spec = codec->spec;
6565e4fa
TI		 4228 int val;
4229
4230 val = snd_hda_get_bool_hint(codec, "hp_detect");
4231 if (val >= 0)
4232 spec->hp_detect = val;
014c41fc 4233 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
6565e4fa
TI		 4234 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
4235 spec->gpio_mask;
4236 }
014c41fc
TI		 4237 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
4238 spec->gpio_mask &= spec->gpio_mask;
4239 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
4240 spec->gpio_dir &= spec->gpio_mask;
4241 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
4242 spec->eapd_mask &= spec->gpio_mask;
4243 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
4244 spec->gpio_mute &= spec->gpio_mask;
6565e4fa
TI		 4245 val = snd_hda_get_bool_hint(codec, "eapd_switch");
4246 if (val >= 0)
4247 spec->eapd_switch = val;
4248}
4249
f2cbba76
TI		 4250static void stac_issue_unsol_events(struct hda_codec *codec, int num_pins,
4251 const hda_nid_t *pins)
4252{
4253 while (num_pins--)
4254 stac_issue_unsol_event(codec, *pins++);
4255}
4256
4257/* fake event to set up pins */
4258static void stac_fake_hp_events(struct hda_codec *codec)
4259{
4260 struct sigmatel_spec *spec = codec->spec;
4261
4262 if (spec->autocfg.hp_outs)
4263 stac_issue_unsol_events(codec, spec->autocfg.hp_outs,
4264 spec->autocfg.hp_pins);
4265 if (spec->autocfg.line_outs &&
4266 spec->autocfg.line_out_pins[0] != spec->autocfg.hp_pins[0])
4267 stac_issue_unsol_events(codec, spec->autocfg.line_outs,
4268 spec->autocfg.line_out_pins);
4269}
4270
c7d4b2fa
M		 4271static int stac92xx_init(struct hda_codec *codec)
4272{
4273 struct sigmatel_spec *spec = codec->spec;
82bc955f 4274 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4275 unsigned int gpio;
e4973e1e 4276 int i;
c7d4b2fa 4277
5e68fb3c
DH		 4278 if (spec->init)
4279 snd_hda_sequence_write(codec, spec->init);
c7d4b2fa 4280
8daaaa97
MR		 4281 /* power down adcs initially */
4282 if (spec->powerdown_adcs)
4283 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4284 snd_hda_codec_write(codec,
8daaaa97
MR		 4285 spec->adc_nids[i], 0,
4286 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585 4287
6565e4fa
TI		 4288 /* override some hints */
4289 stac_store_hints(codec);
4290
f73d3585
TI		 4291 /* set up GPIO */
4292 gpio = spec->gpio_data;
4293 /* turn on EAPD statically when spec->eapd_switch isn't set.
4294 * otherwise, unsol event will turn it on/off dynamically
4295 */
4296 if (!spec->eapd_switch)
4297 gpio |= spec->eapd_mask;
4298 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4299
82bc955f
TI		 4300 /* set up pins */
4301 if (spec->hp_detect) {
505cb341 4302 /* Enable unsolicited responses on the HP widget */
74aeaabc 4303 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4304 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4305 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4306 }
1c4bdf9b
TI		 4307 if (cfg->line_out_type == AUTO_PIN_LINE_OUT &&
4308 cfg->speaker_outs > 0) {
fefd67f3 4309 /* enable pin-detect for line-outs as well */
15cfa2b3
TI		 4310 for (i = 0; i < cfg->line_outs; i++) {
4311 hda_nid_t nid = cfg->line_out_pins[i];
fefd67f3
TI		 4312 enable_pin_detect(codec, nid, STAC_LO_EVENT);
4313 }
4314 }
4315
0a07acaf
TI		 4316 /* force to enable the first line-out; the others are set up
4317 * in unsol_event
4318 */
4319 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4320 AC_PINCTL_OUT_EN);
82bc955f 4321 /* fake event to set up pins */
f2cbba76 4322 stac_fake_hp_events(codec);
82bc955f
TI		 4323 } else {
4324 stac92xx_auto_init_multi_out(codec);
4325 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 4326 for (i = 0; i < cfg->hp_outs; i++)
4327 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f 4328 }
3d21d3f7 4329 if (spec->auto_mic) {
15b4f296 4330 /* initialize connection to analog input */
da2a2aaa
TI		 4331 if (spec->dmux_nids)
4332 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
15b4f296 4333 AC_VERB_SET_CONNECT_SEL, 0);
3d21d3f7
TI		 4334 if (enable_pin_detect(codec, spec->ext_mic.pin, STAC_MIC_EVENT))
4335 stac_issue_unsol_event(codec, spec->ext_mic.pin);
9907790a
CC		 4336 if (enable_pin_detect(codec, spec->dock_mic.pin,
4337 STAC_MIC_EVENT))
4338 stac_issue_unsol_event(codec, spec->dock_mic.pin);
3d21d3f7 4339 }
eea7dc93
TI		 4340 for (i = 0; i < cfg->num_inputs; i++) {
4341 hda_nid_t nid = cfg->inputs[i].pin;
4342 int type = cfg->inputs[i].type;
4343 unsigned int pinctl, conf;
86e2959a 4344 if (type == AUTO_PIN_MIC) {
eea7dc93 4345 /* for mic pins, force to initialize */
4740860b 4346 pinctl = snd_hda_get_default_vref(codec, nid);
eea7dc93
TI		 4347 pinctl |= AC_PINCTL_IN_EN;
4348 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4349 } else {
4350 pinctl = snd_hda_codec_read(codec, nid, 0,
4351 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4352 /* if PINCTL already set then skip */
4353 /* Also, if both INPUT and OUTPUT are set,
4354 * it must be a BIOS bug; need to override, too
4355 */
4356 if (!(pinctl & AC_PINCTL_IN_EN) ||
4357 (pinctl & AC_PINCTL_OUT_EN)) {
4358 pinctl &= ~AC_PINCTL_OUT_EN;
12dde4c6
TI		 4359 pinctl |= AC_PINCTL_IN_EN;
4360 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3 4361 }
c960a03b 4362 }
eea7dc93
TI		 4363 conf = snd_hda_codec_get_pincfg(codec, nid);
4364 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4365 if (enable_pin_detect(codec, nid, STAC_INSERT_EVENT))
4366 stac_issue_unsol_event(codec, nid);
4367 }
82bc955f 4368 }
a64135a2
MR		 4369 for (i = 0; i < spec->num_dmics; i++)
4370 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4371 AC_PINCTL_IN_EN);
0852d7a6
TI		 4372 if (cfg->dig_out_pins[0])
4373 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
f73d3585
TI		 4374 AC_PINCTL_OUT_EN);
4375 if (cfg->dig_in_pin)
4376 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4377 AC_PINCTL_IN_EN);
a64135a2 4378 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585 4379 hda_nid_t nid = spec->pwr_nids[i];
6e1c39c6 4380 unsigned int pinctl, def_conf;
f73d3585 4381
bfc89dec
TI		 4382 def_conf = snd_hda_codec_get_pincfg(codec, nid);
4383 def_conf = get_defcfg_connect(def_conf);
4384 if (def_conf == AC_JACK_PORT_NONE) {
4385 /* power off unused ports */
4386 stac_toggle_power_map(codec, nid, 0);
4387 continue;
4388 }
6e1c39c6
TI		 4389 if (def_conf == AC_JACK_PORT_FIXED) {
4390 /* no need for jack detection for fixed pins */
4391 stac_toggle_power_map(codec, nid, 1);
4392 continue;
4393 }
eb632128 4394 /* power on when no jack detection is available */
542c9a0a
TI		 4395 /* or when the VREF is used for controlling LED */
4396 if (!spec->hp_detect ||
bfc89dec
TI		 4397 spec->vref_mute_led_nid == nid ||
4398 !is_jack_detectable(codec, nid)) {
eb632128
TI		 4399 stac_toggle_power_map(codec, nid, 1);
4400 continue;
4401 }
4402
b4ead019 4403 if (is_nid_out_jack_pin(cfg, nid))
f73d3585
TI		 4404 continue; /* already has an unsol event */
4405
4406 pinctl = snd_hda_codec_read(codec, nid, 0,
4407 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4408 /* outputs are only ports capable of power management
4409 * any attempts on powering down a input port cause the
4410 * referenced VREF to act quirky.
4411 */
eb632128
TI		 4412 if (pinctl & AC_PINCTL_IN_EN) {
4413 stac_toggle_power_map(codec, nid, 1);
a64135a2 4414 continue;
eb632128 4415 }
afef2cfa 4416 if (enable_pin_detect(codec, nid, STAC_PWR_EVENT)) {
62558ce1 4417 stac_issue_unsol_event(codec, nid);
afef2cfa
CC		 4418 continue;
4419 }
4420 /* none of the above, turn the port OFF */
4421 stac_toggle_power_map(codec, nid, 0);
a64135a2 4422 }
c21bd025 4423
c21bd025 4424 /* sync mute LED */
1f43f6c1
TI		 4425 if (spec->gpio_led) {
4426 if (spec->vmaster_mute.hook)
4427 snd_hda_sync_vmaster_hook(&spec->vmaster_mute);
4428 else /* the very first init call doesn't have vmaster yet */
4429 stac92xx_update_led_status(codec, false);
4430 }
c882246d
TI		 4431
4432 /* sync the power-map */
4433 if (spec->num_pwrs)
4434 snd_hda_codec_write(codec, codec->afg, 0,
4435 AC_VERB_IDT_SET_POWER_MAP,
4436 spec->power_map_bits);
b76c850f
MR		 4437 if (spec->dac_list)
4438 stac92xx_power_down(codec);
c7d4b2fa
M		 4439 return 0;
4440}
4441
603c4019
TI		 4442static void stac92xx_free_kctls(struct hda_codec *codec)
4443{
4444 struct sigmatel_spec *spec = codec->spec;
4445
4446 if (spec->kctls.list) {
4447 struct snd_kcontrol_new *kctl = spec->kctls.list;
4448 int i;
4449 for (i = 0; i < spec->kctls.used; i++)
4450 kfree(kctl[i].name);
4451 }
4452 snd_array_free(&spec->kctls);
4453}
4454
45eebda7
VK		 4455static void stac92xx_shutup_pins(struct hda_codec *codec)
4456{
4457 unsigned int i, def_conf;
4458
4459 if (codec->bus->shutdown)
4460 return;
4461 for (i = 0; i < codec->init_pins.used; i++) {
4462 struct hda_pincfg *pin = snd_array_elem(&codec->init_pins, i);
4463 def_conf = snd_hda_codec_get_pincfg(codec, pin->nid);
4464 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE)
cdd03ced 4465 snd_hda_set_pin_ctl(codec, pin->nid, 0);
45eebda7
VK		 4466 }
4467}
4468
167eae5a
TI		 4469static void stac92xx_shutup(struct hda_codec *codec)
4470{
4471 struct sigmatel_spec *spec = codec->spec;
167eae5a 4472
45eebda7 4473 stac92xx_shutup_pins(codec);
167eae5a
TI		 4474
4475 if (spec->eapd_mask)
4476 stac_gpio_set(codec, spec->gpio_mask,
4477 spec->gpio_dir, spec->gpio_data &
4478 ~spec->eapd_mask);
4479}
4480
2f2f4251
M		 4481static void stac92xx_free(struct hda_codec *codec)
4482{
c7d4b2fa 4483 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4484
4485 if (! spec)
4486 return;
4487
167eae5a 4488 stac92xx_shutup(codec);
11b44bbd 4489
c7d4b2fa 4490 kfree(spec);
1cd2224c 4491 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4492}
4493
4e55096e
M		 4494static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4495 unsigned int flag)
4496{
8ce84198
TI		 4497 unsigned int old_ctl, pin_ctl;
4498
4499 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4500 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4501
f9acba43
TI		 4502 if (pin_ctl & AC_PINCTL_IN_EN) {
4503 /*
4504 * we need to check the current set-up direction of
4505 * shared input pins since they can be switched via
4506 * "xxx as Output" mixer switch
4507 */
4508 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4509 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4510 return;
4511 }
4512
8ce84198 4513 old_ctl = pin_ctl;
7b043899
SL		 4514 /* if setting pin direction bits, clear the current
4515 direction bits first */
4516 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4517 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4518
8ce84198
TI		 4519 pin_ctl |= flag;
4520 if (old_ctl != pin_ctl)
cdd03ced 4521 snd_hda_set_pin_ctl_cache(codec, nid, pin_ctl);
4e55096e
M		 4522}
4523
4524static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4525 unsigned int flag)
4526{
4527 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4528 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198 4529 if (pin_ctl & flag)
cdd03ced 4530 snd_hda_set_pin_ctl_cache(codec, nid, pin_ctl & ~flag);
4e55096e
M		 4531}
4532
d56757ab 4533static inline int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4534{
4535 if (!nid)
4536 return 0;
a252c81a 4537 return snd_hda_jack_detect(codec, nid);
314634bc
TI		 4538}
4539
fefd67f3
TI		 4540static void stac92xx_line_out_detect(struct hda_codec *codec,
4541 int presence)
4542{
4543 struct sigmatel_spec *spec = codec->spec;
4544 struct auto_pin_cfg *cfg = &spec->autocfg;
4545 int i;
4546
042b92c1
DH		 4547 if (cfg->speaker_outs == 0)
4548 return;
4549
fefd67f3
TI		 4550 for (i = 0; i < cfg->line_outs; i++) {
4551 if (presence)
4552 break;
4553 presence = get_pin_presence(codec, cfg->line_out_pins[i]);
4554 if (presence) {
4555 unsigned int pinctl;
4556 pinctl = snd_hda_codec_read(codec,
4557 cfg->line_out_pins[i], 0,
4558 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4559 if (pinctl & AC_PINCTL_IN_EN)
4560 presence = 0; /* mic- or line-input */
4561 }
4562 }
4563
4564 if (presence) {
4565 /* disable speakers */
4566 for (i = 0; i < cfg->speaker_outs; i++)
4567 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4568 AC_PINCTL_OUT_EN);
4569 if (spec->eapd_mask && spec->eapd_switch)
4570 stac_gpio_set(codec, spec->gpio_mask,
4571 spec->gpio_dir, spec->gpio_data &
4572 ~spec->eapd_mask);
4573 } else {
4574 /* enable speakers */
4575 for (i = 0; i < cfg->speaker_outs; i++)
4576 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4577 AC_PINCTL_OUT_EN);
4578 if (spec->eapd_mask && spec->eapd_switch)
4579 stac_gpio_set(codec, spec->gpio_mask,
4580 spec->gpio_dir, spec->gpio_data |
4581 spec->eapd_mask);
4582 }
4583}
4584
d7a89436
TI		 4585/* return non-zero if the hp-pin of the given array index isn't
4586 * a jack-detection target
4587 */
4588static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4589{
4590 struct auto_pin_cfg *cfg = &spec->autocfg;
4591
4592 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4593 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4594 return 1;
c21ca4a8 4595 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4596 return 1;
4597 /* ignore if the pin is set as line-out */
4598 if (cfg->hp_pins[i] == spec->hp_switch)
4599 return 1;
4600 return 0;
4601}
4602
c6e4c666 4603static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4604{
4605 struct sigmatel_spec *spec = codec->spec;
4606 struct auto_pin_cfg *cfg = &spec->autocfg;
4607 int i, presence;
4608
eb06ed8f 4609 presence = 0;
4fe5195c
MR		 4610 if (spec->gpio_mute)
4611 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4612 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4613
eb06ed8f 4614 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4615 if (presence)
4616 break;
d7a89436
TI		 4617 if (no_hp_sensing(spec, i))
4618 continue;
e6e3ea25
TI		 4619 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4620 if (presence) {
4621 unsigned int pinctl;
4622 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4623 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4624 if (pinctl & AC_PINCTL_IN_EN)
4625 presence = 0; /* mic- or line-input */
4626 }
eb06ed8f 4627 }
4e55096e
M		 4628
4629 if (presence) {
d7a89436 4630 /* disable lineouts */
7c2ba97b 4631 if (spec->hp_switch)
d7a89436
TI		 4632 stac92xx_reset_pinctl(codec, spec->hp_switch,
4633 AC_PINCTL_OUT_EN);
4e55096e
M		 4634 for (i = 0; i < cfg->line_outs; i++)
4635 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4636 AC_PINCTL_OUT_EN);
4e55096e 4637 } else {
d7a89436 4638 /* enable lineouts */
7c2ba97b 4639 if (spec->hp_switch)
d7a89436
TI		 4640 stac92xx_set_pinctl(codec, spec->hp_switch,
4641 AC_PINCTL_OUT_EN);
4e55096e
M		 4642 for (i = 0; i < cfg->line_outs; i++)
4643 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4644 AC_PINCTL_OUT_EN);
4e55096e 4645 }
fefd67f3 4646 stac92xx_line_out_detect(codec, presence);
d7a89436
TI		 4647 /* toggle hp outs */
4648 for (i = 0; i < cfg->hp_outs; i++) {
4649 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4650 if (no_hp_sensing(spec, i))
4651 continue;
7bff172a 4652 if (1 /*presence*/)
d7a89436 4653 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4654#if 0 /* FIXME */
4655/* Resetting the pinctl like below may lead to (a sort of) regressions
4656 * on some devices since they use the HP pin actually for line/speaker
4657 * outs although the default pin config shows a different pin (that is
4658 * wrong and useless).
4659 *
4660 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4661 * But, disabling the code below just works around it, and I'm too tired of
4662 * bug reports with such devices...
4663 */
d7a89436
TI		 4664 else
4665 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4666#endif /* FIXME */
d7a89436 4667 }
4e55096e
M		 4668}
4669
f73d3585
TI		 4670static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4671 int enable)
a64135a2
MR		 4672{
4673 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4674 unsigned int idx, val;
4675
4676 for (idx = 0; idx < spec->num_pwrs; idx++) {
4677 if (spec->pwr_nids[idx] == nid)
4678 break;
4679 }
4680 if (idx >= spec->num_pwrs)
4681 return;
d0513fc6 4682
afef2cfa 4683 idx = 1 << idx;
a64135a2 4684
c882246d 4685 val = spec->power_map_bits;
f73d3585 4686 if (enable)
a64135a2
MR		 4687 val &= ~idx;
4688 else
4689 val |= idx;
4690
4691 /* power down unused output ports */
c882246d
TI		 4692 if (val != spec->power_map_bits) {
4693 spec->power_map_bits = val;
4694 snd_hda_codec_write(codec, codec->afg, 0,
4695 AC_VERB_IDT_SET_POWER_MAP, val);
4696 }
74aeaabc
MR		 4697}
4698
f73d3585
TI		 4699static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4700{
e6e3ea25 4701 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4702}
a64135a2 4703
ab5a6ebe
VK		 4704/* get the pin connection (fixed, none, etc) */
4705static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
4706{
4707 struct sigmatel_spec *spec = codec->spec;
4708 unsigned int cfg;
4709
4710 cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
4711 return get_defcfg_connect(cfg);
4712}
4713
4714static int stac92xx_connected_ports(struct hda_codec *codec,
2b63536f 4715 const hda_nid_t *nids, int num_nids)
ab5a6ebe
VK		 4716{
4717 struct sigmatel_spec *spec = codec->spec;
4718 int idx, num;
4719 unsigned int def_conf;
4720
4721 for (num = 0; num < num_nids; num++) {
4722 for (idx = 0; idx < spec->num_pins; idx++)
4723 if (spec->pin_nids[idx] == nids[num])
4724 break;
4725 if (idx >= spec->num_pins)
4726 break;
4727 def_conf = stac_get_defcfg_connect(codec, idx);
4728 if (def_conf == AC_JACK_PORT_NONE)
4729 break;
4730 }
4731 return num;
4732}
4733
3d21d3f7
TI		 4734static void stac92xx_mic_detect(struct hda_codec *codec)
4735{
4736 struct sigmatel_spec *spec = codec->spec;
4737 struct sigmatel_mic_route *mic;
4738
4739 if (get_pin_presence(codec, spec->ext_mic.pin))
4740 mic = &spec->ext_mic;
9907790a
CC		 4741 else if (get_pin_presence(codec, spec->dock_mic.pin))
4742 mic = &spec->dock_mic;
3d21d3f7
TI		 4743 else
4744 mic = &spec->int_mic;
02d33322 4745 if (mic->dmux_idx >= 0)
3d21d3f7
TI		 4746 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
4747 AC_VERB_SET_CONNECT_SEL,
4748 mic->dmux_idx);
02d33322 4749 if (mic->mux_idx >= 0)
3d21d3f7
TI		 4750 snd_hda_codec_write_cache(codec, spec->mux_nids[0], 0,
4751 AC_VERB_SET_CONNECT_SEL,
4752 mic->mux_idx);
4753}
4754
1835a0f9 4755static void handle_unsol_event(struct hda_codec *codec,
3a93897e 4756 struct hda_jack_tbl *event)
314634bc 4757{
a64135a2 4758 struct sigmatel_spec *spec = codec->spec;
1835a0f9 4759 int data;
c6e4c666 4760
3a93897e 4761 switch (event->action) {
314634bc 4762 case STAC_HP_EVENT:
fefd67f3 4763 case STAC_LO_EVENT:
16ffe32c 4764 stac92xx_hp_detect(codec);
fefd67f3 4765 break;
3d21d3f7
TI		 4766 case STAC_MIC_EVENT:
4767 stac92xx_mic_detect(codec);
4768 break;
4769 }
4770
3a93897e 4771 switch (event->action) {
3d21d3f7 4772 case STAC_HP_EVENT:
fefd67f3 4773 case STAC_LO_EVENT:
3d21d3f7 4774 case STAC_MIC_EVENT:
74aeaabc 4775 case STAC_INSERT_EVENT:
a64135a2 4776 case STAC_PWR_EVENT:
c6e4c666
TI		 4777 if (spec->num_pwrs > 0)
4778 stac92xx_pin_sense(codec, event->nid);
fd60cc89
MR		 4779
4780 switch (codec->subsystem_id) {
4781 case 0x103c308f:
4782 if (event->nid == 0xb) {
4783 int pin = AC_PINCTL_IN_EN;
4784
4785 if (get_pin_presence(codec, 0xa)
4786 && get_pin_presence(codec, 0xb))
4787 pin |= AC_PINCTL_VREF_80;
4788 if (!get_pin_presence(codec, 0xb))
4789 pin |= AC_PINCTL_VREF_80;
4790
4791 /* toggle VREF state based on mic + hp pin
4792 * status
4793 */
4794 stac92xx_auto_set_pinctl(codec, 0x0a, pin);
4795 }
4796 }
72474be6 4797 break;
c6e4c666
TI		 4798 case STAC_VREF_EVENT:
4799 data = snd_hda_codec_read(codec, codec->afg, 0,
4800 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4801 /* toggle VREF state based on GPIOx status */
4802 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
3a93897e 4803 !!(data & (1 << event->private_data)));
72474be6 4804 break;
314634bc
TI		 4805 }
4806}
4807
1835a0f9
TI		 4808static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid)
4809{
3a93897e 4810 struct hda_jack_tbl *event = snd_hda_jack_tbl_get(codec, nid);
1835a0f9
TI		 4811 if (!event)
4812 return;
4813 handle_unsol_event(codec, event);
4814}
4815
4816static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4817{
3a93897e 4818 struct hda_jack_tbl *event;
1835a0f9
TI		 4819 int tag;
4820
4821 tag = (res >> 26) & 0x7f;
3a93897e 4822 event = snd_hda_jack_tbl_get_from_tag(codec, tag);
1835a0f9
TI		 4823 if (!event)
4824 return;
3a93897e 4825 event->jack_dirty = 1;
1835a0f9 4826 handle_unsol_event(codec, event);
01a61e12 4827 snd_hda_jack_report_sync(codec);
1835a0f9
TI		 4828}
4829
d38cce70
KG		 4830static int hp_blike_system(u32 subsystem_id);
4831
4832static void set_hp_led_gpio(struct hda_codec *codec)
4833{
4834 struct sigmatel_spec *spec = codec->spec;
07f80449
TI		 4835 unsigned int gpio;
4836
26ebe0a2
TI		 4837 if (spec->gpio_led)
4838 return;
4839
07f80449
TI		 4840 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
4841 gpio &= AC_GPIO_IO_COUNT;
4842 if (gpio > 3)
4843 spec->gpio_led = 0x08; /* GPIO 3 */
4844 else
4845 spec->gpio_led = 0x01; /* GPIO 0 */
d38cce70
KG		 4846}
4847
c357aab0
VK		 4848/*
4849 * This method searches for the mute LED GPIO configuration
4850 * provided as OEM string in SMBIOS. The format of that string
4851 * is HP_Mute_LED_P_G or HP_Mute_LED_P
4852 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
4853 * that corresponds to the NOT muted state of the master volume
4854 * and G is the index of the GPIO to use as the mute LED control (0..9)
4855 * If _G portion is missing it is assigned based on the codec ID
4856 *
4857 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
4858 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
d38cce70
KG		 4859 *
4860 *
4861 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
4862 * SMBIOS - at least the ones I have seen do not have them - which include
4863 * my own system (HP Pavilion dv6-1110ax) and my cousin's
4864 * HP Pavilion dv9500t CTO.
4865 * Need more information on whether it is true across the entire series.
4866 * -- kunal
c357aab0 4867 */
6a557c94 4868static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
c357aab0
VK		 4869{
4870 struct sigmatel_spec *spec = codec->spec;
4871 const struct dmi_device *dev = NULL;
4872
7560931f
TI		 4873 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
4874 get_int_hint(codec, "gpio_led_polarity",
4875 &spec->gpio_led_polarity);
4876 return 1;
4877 }
c357aab0
VK		 4878 if ((codec->subsystem_id >> 16) == PCI_VENDOR_ID_HP) {
4879 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING,
4880 NULL, dev))) {
45eebda7 4881 if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
d38cce70
KG		 4882 &spec->gpio_led_polarity,
4883 &spec->gpio_led) == 2) {
f1a73746
TI		 4884 unsigned int max_gpio;
4885 max_gpio = snd_hda_param_read(codec, codec->afg,
4886 AC_PAR_GPIO_CAP);
4887 max_gpio &= AC_GPIO_IO_COUNT;
4888 if (spec->gpio_led < max_gpio)
45eebda7 4889 spec->gpio_led = 1 << spec->gpio_led;
f1a73746
TI		 4890 else
4891 spec->vref_mute_led_nid = spec->gpio_led;
c357aab0
VK		 4892 return 1;
4893 }
4894 if (sscanf(dev->name, "HP_Mute_LED_%d",
d38cce70
KG		 4895 &spec->gpio_led_polarity) == 1) {
4896 set_hp_led_gpio(codec);
4897 return 1;
c357aab0 4898 }
e2ef36c6
GMDV		 4899 /* BIOS bug: unfilled OEM string */
4900 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
4901 set_hp_led_gpio(codec);
a6a600d1
GMDV		 4902 switch (codec->subsystem_id) {
4903 case 0x103c148a:
4904 spec->gpio_led_polarity = 0;
4905 break;
4906 default:
4907 spec->gpio_led_polarity = 1;
4908 break;
4909 }
e2ef36c6
GMDV		 4910 return 1;
4911 }
c357aab0 4912 }
d38cce70
KG		 4913
4914 /*
4915 * Fallback case - if we don't find the DMI strings,
6a557c94
VK		 4916 * we statically set the GPIO - if not a B-series system
4917 * and default polarity is provided
d38cce70 4918 */
6a557c94
VK		 4919 if (!hp_blike_system(codec->subsystem_id) &&
4920 (default_polarity == 0 || default_polarity == 1)) {
d38cce70 4921 set_hp_led_gpio(codec);
dce17d4f 4922 spec->gpio_led_polarity = default_polarity;
d38cce70
KG		 4923 return 1;
4924 }
c357aab0
VK		 4925 }
4926 return 0;
4927}
4928
4929static int hp_blike_system(u32 subsystem_id)
78987bdc
RD		 4930{
4931 switch (subsystem_id) {
c357aab0
VK		 4932 case 0x103c1520:
4933 case 0x103c1521:
4934 case 0x103c1523:
4935 case 0x103c1524:
4936 case 0x103c1525:
78987bdc
RD		 4937 case 0x103c1722:
4938 case 0x103c1723:
4939 case 0x103c1724:
4940 case 0x103c1725:
4941 case 0x103c1726:
4942 case 0x103c1727:
4943 case 0x103c1728:
4944 case 0x103c1729:
c357aab0
VK		 4945 case 0x103c172a:
4946 case 0x103c172b:
4947 case 0x103c307e:
4948 case 0x103c307f:
4949 case 0x103c3080:
4950 case 0x103c3081:
4951 case 0x103c7007:
4952 case 0x103c7008:
78987bdc
RD		 4953 return 1;
4954 }
4955 return 0;
4956}
4957
2d34e1b3
TI		 4958#ifdef CONFIG_PROC_FS
4959static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4960 struct hda_codec *codec, hda_nid_t nid)
4961{
4962 if (nid == codec->afg)
4963 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
c882246d
TI		 4964 snd_hda_codec_read(codec, nid, 0,
4965 AC_VERB_IDT_GET_POWER_MAP, 0));
2d34e1b3
TI		 4966}
4967
4968static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4969 struct hda_codec *codec,
4970 unsigned int verb)
4971{
4972 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4973 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4974}
4975
4976/* stac92hd71bxx, stac92hd73xx */
4977static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4978 struct hda_codec *codec, hda_nid_t nid)
4979{
4980 stac92hd_proc_hook(buffer, codec, nid);
4981 if (nid == codec->afg)
4982 analog_loop_proc_hook(buffer, codec, 0xfa0);
4983}
4984
4985static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4986 struct hda_codec *codec, hda_nid_t nid)
4987{
4988 if (nid == codec->afg)
4989 analog_loop_proc_hook(buffer, codec, 0xfe0);
4990}
4991
4992static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4993 struct hda_codec *codec, hda_nid_t nid)
4994{
4995 if (nid == codec->afg)
4996 analog_loop_proc_hook(buffer, codec, 0xfeb);
4997}
4998#else
4999#define stac92hd_proc_hook NULL
5000#define stac92hd7x_proc_hook NULL
5001#define stac9205_proc_hook NULL
5002#define stac927x_proc_hook NULL
5003#endif
5004
2a43952a 5005#ifdef CONFIG_PM
ff6fdc37
M		 5006static int stac92xx_resume(struct hda_codec *codec)
5007{
2c885878 5008 stac92xx_init(codec);
82beb8fd
TI		 5009 snd_hda_codec_resume_amp(codec);
5010 snd_hda_codec_resume_cache(codec);
2c885878 5011 /* fake event to set up pins again to override cached values */
f2cbba76 5012 stac_fake_hp_events(codec);
ff6fdc37
M		 5013 return 0;
5014}
c6798d2b 5015
68cb2b55 5016static int stac92xx_suspend(struct hda_codec *codec)
45eebda7
VK		 5017{
5018 stac92xx_shutup(codec);
5019 return 0;
5020}
5021
45eebda7
VK		 5022static void stac92xx_set_power_state(struct hda_codec *codec, hda_nid_t fg,
5023 unsigned int power_state)
5024{
5025 unsigned int afg_power_state = power_state;
5026 struct sigmatel_spec *spec = codec->spec;
5027
5028 if (power_state == AC_PWRST_D3) {
f1a73746 5029 if (spec->vref_mute_led_nid) {
45eebda7
VK		 5030 /* with vref-out pin used for mute led control
5031 * codec AFG is prevented from D3 state
5032 */
5033 afg_power_state = AC_PWRST_D1;
5034 }
5035 /* this delay seems necessary to avoid click noise at power-down */
5036 msleep(100);
5037 }
5038 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
5039 afg_power_state);
5040 snd_hda_codec_set_power_to_all(codec, fg, power_state, true);
5041}
350eba43
TI		 5042#else
5043#define stac92xx_suspend NULL
5044#define stac92xx_resume NULL
350eba43 5045#define stac92xx_set_power_state NULL
2faa3bf1 5046#endif /* CONFIG_PM */
45eebda7 5047
2faa3bf1
TI		 5048/* update mute-LED accoring to the master switch */
5049static void stac92xx_update_led_status(struct hda_codec *codec, int enabled)
ae6241fb
CP		 5050{
5051 struct sigmatel_spec *spec = codec->spec;
2faa3bf1 5052 int muted = !enabled;
6fce61ae 5053
45eebda7 5054 if (!spec->gpio_led)
2faa3bf1
TI		 5055 return;
5056
5057 /* LED state is inverted on these systems */
5058 if (spec->gpio_led_polarity)
5059 muted = !muted;
45eebda7 5060
f1a73746 5061 if (!spec->vref_mute_led_nid) {
45eebda7 5062 if (muted)
3e843196 5063 spec->gpio_data |= spec->gpio_led;
45eebda7 5064 else
3e843196 5065 spec->gpio_data &= ~spec->gpio_led;
45eebda7
VK		 5066 stac_gpio_set(codec, spec->gpio_mask,
5067 spec->gpio_dir, spec->gpio_data);
5068 } else {
2faa3bf1 5069 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
f1a73746
TI		 5070 stac_vrefout_set(codec, spec->vref_mute_led_nid,
5071 spec->vref_led);
c21bd025 5072 }
b4e81876 5073}
7df1ce1a 5074
2b63536f 5075static const struct hda_codec_ops stac92xx_patch_ops = {
2f2f4251
M		 5076 .build_controls = stac92xx_build_controls,
5077 .build_pcms = stac92xx_build_pcms,
5078 .init = stac92xx_init,
5079 .free = stac92xx_free,
4e55096e 5080 .unsol_event = stac92xx_unsol_event,
2a43952a 5081#ifdef CONFIG_PM
c6798d2b 5082 .suspend = stac92xx_suspend,
ff6fdc37
M		 5083 .resume = stac92xx_resume,
5084#endif
fb8d1a34 5085 .reboot_notify = stac92xx_shutup,
2f2f4251
M		 5086};
5087
5088static int patch_stac9200(struct hda_codec *codec)
5089{
5090 struct sigmatel_spec *spec;
c7d4b2fa 5091 int err;
2f2f4251 5092
e560d8d8 5093 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5094 if (spec == NULL)
5095 return -ENOMEM;
5096
a252c81a 5097 codec->no_trigger_sense = 1;
2f2f4251 5098 codec->spec = spec;
1b0e372d 5099 spec->linear_tone_beep = 1;
a4eed138 5100 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 5101 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 5102 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
5103 stac9200_models,
5104 stac9200_cfg_tbl);
330ee995 5105 if (spec->board_config < 0)
9a11f1aa
TI		 5106 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5107 codec->chip_name);
330ee995
TI		 5108 else
5109 stac92xx_set_config_regs(codec,
af9f341a 5110 stac9200_brd_tbl[spec->board_config]);
2f2f4251
M		 5111
5112 spec->multiout.max_channels = 2;
5113 spec->multiout.num_dacs = 1;
5114 spec->multiout.dac_nids = stac9200_dac_nids;
5115 spec->adc_nids = stac9200_adc_nids;
5116 spec->mux_nids = stac9200_mux_nids;
dabbed6f 5117 spec->num_muxes = 1;
8b65727b 5118 spec->num_dmics = 0;
9e05b7a3 5119 spec->num_adcs = 1;
a64135a2 5120 spec->num_pwrs = 0;
c7d4b2fa 5121
58eec423
MCC		 5122 if (spec->board_config == STAC_9200_M4 ||
5123 spec->board_config == STAC_9200_M4_2 ||
bf277785 5124 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 5125 spec->init = stac9200_eapd_init;
5126 else
5127 spec->init = stac9200_core_init;
2f2f4251 5128 spec->mixer = stac9200_mixer;
c7d4b2fa 5129
117f257d
TI		 5130 if (spec->board_config == STAC_9200_PANASONIC) {
5131 spec->gpio_mask = spec->gpio_dir = 0x09;
5132 spec->gpio_data = 0x00;
5133 }
5134
c7d4b2fa
M		 5135 err = stac9200_parse_auto_config(codec);
5136 if (err < 0) {
5137 stac92xx_free(codec);
5138 return err;
5139 }
2f2f4251 5140
2acc9dcb
TI		 5141 /* CF-74 has no headphone detection, and the driver should *NOT*
5142 * do detection and HP/speaker toggle because the hardware does it.
5143 */
5144 if (spec->board_config == STAC_9200_PANASONIC)
5145 spec->hp_detect = 0;
5146
2f2f4251
M		 5147 codec->patch_ops = stac92xx_patch_ops;
5148
5149 return 0;
5150}
5151
8e21c34c
TD		 5152static int patch_stac925x(struct hda_codec *codec)
5153{
5154 struct sigmatel_spec *spec;
5155 int err;
5156
5157 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5158 if (spec == NULL)
5159 return -ENOMEM;
5160
a252c81a 5161 codec->no_trigger_sense = 1;
8e21c34c 5162 codec->spec = spec;
1b0e372d 5163 spec->linear_tone_beep = 1;
a4eed138 5164 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 5165 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 5166
5167 /* Check first for codec ID */
5168 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
5169 STAC_925x_MODELS,
5170 stac925x_models,
5171 stac925x_codec_id_cfg_tbl);
5172
5173 /* Now checks for PCI ID, if codec ID is not found */
5174 if (spec->board_config < 0)
5175 spec->board_config = snd_hda_check_board_config(codec,
5176 STAC_925x_MODELS,
8e21c34c
TD		 5177 stac925x_models,
5178 stac925x_cfg_tbl);
9e507abd 5179 again:
330ee995 5180 if (spec->board_config < 0)
9a11f1aa
TI		 5181 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5182 codec->chip_name);
330ee995
TI		 5183 else
5184 stac92xx_set_config_regs(codec,
af9f341a 5185 stac925x_brd_tbl[spec->board_config]);
8e21c34c
TD		 5186
5187 spec->multiout.max_channels = 2;
5188 spec->multiout.num_dacs = 1;
5189 spec->multiout.dac_nids = stac925x_dac_nids;
5190 spec->adc_nids = stac925x_adc_nids;
5191 spec->mux_nids = stac925x_mux_nids;
5192 spec->num_muxes = 1;
9e05b7a3 5193 spec->num_adcs = 1;
a64135a2 5194 spec->num_pwrs = 0;
2c11f955
TD		 5195 switch (codec->vendor_id) {
5196 case 0x83847632: /* STAC9202 */
5197 case 0x83847633: /* STAC9202D */
5198 case 0x83847636: /* STAC9251 */
5199 case 0x83847637: /* STAC9251D */
f6e9852a 5200 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 5201 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 5202 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
5203 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 5204 break;
5205 default:
5206 spec->num_dmics = 0;
5207 break;
5208 }
8e21c34c
TD		 5209
5210 spec->init = stac925x_core_init;
5211 spec->mixer = stac925x_mixer;
6479c631
TI		 5212 spec->num_caps = 1;
5213 spec->capvols = stac925x_capvols;
5214 spec->capsws = stac925x_capsws;
8e21c34c 5215
9009b0e4 5216 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 5217 if (!err) {
5218 if (spec->board_config < 0) {
5219 printk(KERN_WARNING "hda_codec: No auto-config is "
5220 "available, default to model=ref\n");
5221 spec->board_config = STAC_925x_REF;
5222 goto again;
5223 }
5224 err = -EINVAL;
5225 }
8e21c34c
TD		 5226 if (err < 0) {
5227 stac92xx_free(codec);
5228 return err;
5229 }
5230
5231 codec->patch_ops = stac92xx_patch_ops;
5232
5233 return 0;
5234}
5235
e1f0d669
MR		 5236static int patch_stac92hd73xx(struct hda_codec *codec)
5237{
5238 struct sigmatel_spec *spec;
5239 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
5240 int err = 0;
c21ca4a8 5241 int num_dacs;
e1f0d669
MR		 5242
5243 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5244 if (spec == NULL)
5245 return -ENOMEM;
5246
a252c81a 5247 codec->no_trigger_sense = 1;
e1f0d669 5248 codec->spec = spec;
1b0e372d 5249 spec->linear_tone_beep = 0;
e99d32b3 5250 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 5251 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
5252 spec->pin_nids = stac92hd73xx_pin_nids;
5253 spec->board_config = snd_hda_check_board_config(codec,
5254 STAC_92HD73XX_MODELS,
5255 stac92hd73xx_models,
5256 stac92hd73xx_cfg_tbl);
842ae638
TI		 5257 /* check codec subsystem id if not found */
5258 if (spec->board_config < 0)
5259 spec->board_config =
5260 snd_hda_check_board_codec_sid_config(codec,
5261 STAC_92HD73XX_MODELS, stac92hd73xx_models,
5262 stac92hd73xx_codec_id_cfg_tbl);
e1f0d669 5263again:
330ee995 5264 if (spec->board_config < 0)
9a11f1aa
TI		 5265 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5266 codec->chip_name);
330ee995
TI		 5267 else
5268 stac92xx_set_config_regs(codec,
af9f341a 5269 stac92hd73xx_brd_tbl[spec->board_config]);
e1f0d669 5270
c21ca4a8 5271 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 5272 conn, STAC92HD73_DAC_COUNT + 2) - 1;
5273
c21ca4a8 5274 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 5275 printk(KERN_WARNING "hda_codec: Could not determine "
5276 "number of channels defaulting to DAC count\n");
c21ca4a8 5277 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 5278 }
e2aec171 5279 spec->init = stac92hd73xx_core_init;
c21ca4a8 5280 switch (num_dacs) {
e1f0d669 5281 case 0x3: /* 6 Channel */
d78d7a90 5282 spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
e1f0d669
MR		 5283 break;
5284 case 0x4: /* 8 Channel */
d78d7a90 5285 spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
e1f0d669
MR		 5286 break;
5287 case 0x5: /* 10 Channel */
d78d7a90
TI		 5288 spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
5289 break;
c21ca4a8
TI		 5290 }
5291 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 5292
e1f0d669
MR		 5293 spec->aloopback_mask = 0x01;
5294 spec->aloopback_shift = 8;
5295
1cd2224c 5296 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 5297 spec->mux_nids = stac92hd73xx_mux_nids;
5298 spec->adc_nids = stac92hd73xx_adc_nids;
5299 spec->dmic_nids = stac92hd73xx_dmic_nids;
5300 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 5301 spec->smux_nids = stac92hd73xx_smux_nids;
e1f0d669
MR		 5302
5303 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
5304 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 5305 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816 5306
6479c631
TI		 5307 spec->num_caps = STAC92HD73XX_NUM_CAPS;
5308 spec->capvols = stac92hd73xx_capvols;
5309 spec->capsws = stac92hd73xx_capsws;
5310
a7662640 5311 switch (spec->board_config) {
6b3ab21e 5312 case STAC_DELL_EQ:
d654a660 5313 spec->init = dell_eq_core_init;
6b3ab21e 5314 /* fallthru */
661cd8fb
TI		 5315 case STAC_DELL_M6_AMIC:
5316 case STAC_DELL_M6_DMIC:
5317 case STAC_DELL_M6_BOTH:
2a9c7816 5318 spec->num_smuxes = 0;
c0cea0d0 5319 spec->eapd_switch = 0;
6b3ab21e 5320
661cd8fb
TI		 5321 switch (spec->board_config) {
5322 case STAC_DELL_M6_AMIC: /* Analog Mics */
330ee995 5323 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
a7662640
MR		 5324 spec->num_dmics = 0;
5325 break;
661cd8fb 5326 case STAC_DELL_M6_DMIC: /* Digital Mics */
330ee995 5327 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5328 spec->num_dmics = 1;
5329 break;
661cd8fb 5330 case STAC_DELL_M6_BOTH: /* Both */
330ee995
TI		 5331 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
5332 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5333 spec->num_dmics = 1;
5334 break;
5335 }
5336 break;
842ae638
TI		 5337 case STAC_ALIENWARE_M17X:
5338 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
5339 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
5340 spec->eapd_switch = 0;
5341 break;
a7662640
MR		 5342 default:
5343 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 5344 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 5345 spec->eapd_switch = 1;
5207e10e 5346 break;
a7662640 5347 }
af6ee302 5348 if (spec->board_config != STAC_92HD73XX_REF) {
b2c4f4d7
MR		 5349 /* GPIO0 High = Enable EAPD */
5350 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
5351 spec->gpio_data = 0x01;
5352 }
a7662640 5353
a64135a2
MR		 5354 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
5355 spec->pwr_nids = stac92hd73xx_pwr_nids;
5356
9009b0e4 5357 err = stac92xx_parse_auto_config(codec);
e1f0d669
MR		 5358
5359 if (!err) {
5360 if (spec->board_config < 0) {
5361 printk(KERN_WARNING "hda_codec: No auto-config is "
5362 "available, default to model=ref\n");
5363 spec->board_config = STAC_92HD73XX_REF;
5364 goto again;
5365 }
5366 err = -EINVAL;
5367 }
5368
5369 if (err < 0) {
5370 stac92xx_free(codec);
5371 return err;
5372 }
5373
9e43f0de
TI		 5374 if (spec->board_config == STAC_92HD73XX_NO_JD)
5375 spec->hp_detect = 0;
5376
e1f0d669
MR		 5377 codec->patch_ops = stac92xx_patch_ops;
5378
2d34e1b3
TI		 5379 codec->proc_widget_hook = stac92hd7x_proc_hook;
5380
e1f0d669
MR		 5381 return 0;
5382}
5383
cbbf50b2 5384static int hp_bnb2011_with_dock(struct hda_codec *codec)
335e3b86
VK		 5385{
5386 if (codec->vendor_id != 0x111d7605 &&
5387 codec->vendor_id != 0x111d76d1)
5388 return 0;
5389
5390 switch (codec->subsystem_id) {
5391 case 0x103c1618:
5392 case 0x103c1619:
5393 case 0x103c161a:
5394 case 0x103c161b:
5395 case 0x103c161c:
5396 case 0x103c161d:
5397 case 0x103c161e:
5398 case 0x103c161f:
335e3b86
VK		 5399
5400 case 0x103c162a:
5401 case 0x103c162b:
5402
5403 case 0x103c1630:
5404 case 0x103c1631:
5405
5406 case 0x103c1633:
cbbf50b2 5407 case 0x103c1634:
335e3b86
VK		 5408 case 0x103c1635:
5409
335e3b86
VK		 5410 case 0x103c3587:
5411 case 0x103c3588:
5412 case 0x103c3589:
5413 case 0x103c358a:
5414
5415 case 0x103c3667:
5416 case 0x103c3668:
cbbf50b2
VK		 5417 case 0x103c3669:
5418
5419 return 1;
335e3b86
VK		 5420 }
5421 return 0;
5422}
5423
699d8995
VK		 5424static void stac92hd8x_add_pin(struct hda_codec *codec, hda_nid_t nid)
5425{
5426 struct sigmatel_spec *spec = codec->spec;
5427 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
5428 int i;
5429
5430 spec->auto_pin_nids[spec->auto_pin_cnt] = nid;
5431 spec->auto_pin_cnt++;
5432
5433 if (get_defcfg_device(def_conf) == AC_JACK_MIC_IN &&
5434 get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE) {
5435 for (i = 0; i < ARRAY_SIZE(stac92hd83xxx_dmic_nids); i++) {
5436 if (nid == stac92hd83xxx_dmic_nids[i]) {
5437 spec->auto_dmic_nids[spec->auto_dmic_cnt] = nid;
5438 spec->auto_dmic_cnt++;
5439 }
5440 }
5441 }
5442}
5443
5444static void stac92hd8x_add_adc(struct hda_codec *codec, hda_nid_t nid)
5445{
5446 struct sigmatel_spec *spec = codec->spec;
5447
5448 spec->auto_adc_nids[spec->auto_adc_cnt] = nid;
5449 spec->auto_adc_cnt++;
5450}
5451
5452static void stac92hd8x_add_mux(struct hda_codec *codec, hda_nid_t nid)
5453{
5454 int i, j;
5455 struct sigmatel_spec *spec = codec->spec;
5456
5457 for (i = 0; i < spec->auto_adc_cnt; i++) {
5458 if (get_connection_index(codec,
5459 spec->auto_adc_nids[i], nid) >= 0) {
5460 /* mux and volume for adc_nids[i] */
5461 if (!spec->auto_mux_nids[i]) {
5462 spec->auto_mux_nids[i] = nid;
5463 /* 92hd codecs capture volume is in mux */
5464 spec->auto_capvols[i] = HDA_COMPOSE_AMP_VAL(nid,
5465 3, 0, HDA_OUTPUT);
5466 }
5467 for (j = 0; j < spec->auto_dmic_cnt; j++) {
5468 if (get_connection_index(codec, nid,
5469 spec->auto_dmic_nids[j]) >= 0) {
5470 /* dmux for adc_nids[i] */
5471 if (!spec->auto_dmux_nids[i])
5472 spec->auto_dmux_nids[i] = nid;
5473 break;
5474 }
5475 }
5476 break;
5477 }
5478 }
5479}
5480
5481static void stac92hd8x_fill_auto_spec(struct hda_codec *codec)
5482{
5483 hda_nid_t nid, end_nid;
5484 unsigned int wid_caps, wid_type;
5485 struct sigmatel_spec *spec = codec->spec;
5486
5487 end_nid = codec->start_nid + codec->num_nodes;
5488
5489 for (nid = codec->start_nid; nid < end_nid; nid++) {
5490 wid_caps = get_wcaps(codec, nid);
5491 wid_type = get_wcaps_type(wid_caps);
5492
5493 if (wid_type == AC_WID_PIN)
5494 stac92hd8x_add_pin(codec, nid);
5495
5496 if (wid_type == AC_WID_AUD_IN && !(wid_caps & AC_WCAP_DIGITAL))
5497 stac92hd8x_add_adc(codec, nid);
5498 }
5499
5500 for (nid = codec->start_nid; nid < end_nid; nid++) {
5501 wid_caps = get_wcaps(codec, nid);
5502 wid_type = get_wcaps_type(wid_caps);
5503
5504 if (wid_type == AC_WID_AUD_SEL)
5505 stac92hd8x_add_mux(codec, nid);
5506 }
5507
5508 spec->pin_nids = spec->auto_pin_nids;
5509 spec->num_pins = spec->auto_pin_cnt;
5510 spec->adc_nids = spec->auto_adc_nids;
5511 spec->num_adcs = spec->auto_adc_cnt;
5512 spec->capvols = spec->auto_capvols;
5513 spec->capsws = spec->auto_capvols;
5514 spec->num_caps = spec->auto_adc_cnt;
5515 spec->mux_nids = spec->auto_mux_nids;
5516 spec->num_muxes = spec->auto_adc_cnt;
5517 spec->dmux_nids = spec->auto_dmux_nids;
5518 spec->num_dmuxes = spec->auto_adc_cnt;
5519 spec->dmic_nids = spec->auto_dmic_nids;
5520 spec->num_dmics = spec->auto_dmic_cnt;
5521}
5522
d0513fc6
MR		 5523static int patch_stac92hd83xxx(struct hda_codec *codec)
5524{
5525 struct sigmatel_spec *spec;
a3e19973 5526 int default_polarity = -1; /* no default cfg */
d0513fc6
MR		 5527 int err;
5528
5529 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5530 if (spec == NULL)
5531 return -ENOMEM;
5532
cbbf50b2
VK		 5533 if (hp_bnb2011_with_dock(codec)) {
5534 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
5535 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
5536 }
5537
c36b5b05 5538 codec->epss = 0; /* longer delay needed for D3 */
a252c81a 5539 codec->no_trigger_sense = 1;
d0513fc6 5540 codec->spec = spec;
699d8995
VK		 5541
5542 stac92hd8x_fill_auto_spec(codec);
5543
1db7ccdb 5544 spec->linear_tone_beep = 0;
0ffa9807 5545 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6 5546 spec->digbeep_nid = 0x21;
d0513fc6 5547 spec->pwr_nids = stac92hd83xxx_pwr_nids;
d0513fc6 5548 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 5549 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 5550 spec->init = stac92hd83xxx_core_init;
6479c631 5551
d0513fc6
MR		 5552 spec->board_config = snd_hda_check_board_config(codec,
5553 STAC_92HD83XXX_MODELS,
5554 stac92hd83xxx_models,
5555 stac92hd83xxx_cfg_tbl);
5556e147
VK		 5556 /* check codec subsystem id if not found */
5557 if (spec->board_config < 0)
5558 spec->board_config =
5559 snd_hda_check_board_codec_sid_config(codec,
5560 STAC_92HD83XXX_MODELS, stac92hd83xxx_models,
5561 stac92hd83xxx_codec_id_cfg_tbl);
d0513fc6 5562again:
330ee995 5563 if (spec->board_config < 0)
9a11f1aa
TI		 5564 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5565 codec->chip_name);
330ee995
TI		 5566 else
5567 stac92xx_set_config_regs(codec,
af9f341a 5568 stac92hd83xxx_brd_tbl[spec->board_config]);
d0513fc6 5569
b4e81876
TI		 5570 codec->patch_ops = stac92xx_patch_ops;
5571
5556e147
VK		 5572 switch (spec->board_config) {
5573 case STAC_HP_ZEPHYR:
5574 spec->init = stac92hd83xxx_hp_zephyr_init;
5575 break;
a3e19973 5576 case STAC_92HD83XXX_HP_LED:
ff8a1e27
TI		 5577 default_polarity = 0;
5578 break;
5579 case STAC_92HD83XXX_HP_INV_LED:
a3e19973
TI		 5580 default_polarity = 1;
5581 break;
5556e147
VK		 5582 }
5583
a3e19973 5584 if (find_mute_led_cfg(codec, default_polarity))
e108c7b7
VK		 5585 snd_printd("mute LED gpio %d polarity %d\n",
5586 spec->gpio_led,
5587 spec->gpio_led_polarity);
5588
b4e81876 5589 if (spec->gpio_led) {
f1a73746 5590 if (!spec->vref_mute_led_nid) {
45eebda7
VK		 5591 spec->gpio_mask |= spec->gpio_led;
5592 spec->gpio_dir |= spec->gpio_led;
5593 spec->gpio_data |= spec->gpio_led;
5594 } else {
5595 codec->patch_ops.set_power_state =
5596 stac92xx_set_power_state;
45eebda7 5597 }
b4e81876 5598 }
b4e81876 5599
9009b0e4 5600 err = stac92xx_parse_auto_config(codec);
d0513fc6
MR		 5601 if (!err) {
5602 if (spec->board_config < 0) {
5603 printk(KERN_WARNING "hda_codec: No auto-config is "
5604 "available, default to model=ref\n");
5605 spec->board_config = STAC_92HD83XXX_REF;
5606 goto again;
5607 }
5608 err = -EINVAL;
5609 }
5610
5611 if (err < 0) {
5612 stac92xx_free(codec);
5613 return err;
5614 }
5615
2d34e1b3
TI		 5616 codec->proc_widget_hook = stac92hd_proc_hook;
5617
d0513fc6
MR		 5618 return 0;
5619}
5620
6df703ae
HRK		 5621static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
5622 hda_nid_t dig0pin)
5623{
5624 struct sigmatel_spec *spec = codec->spec;
5625 int idx;
5626
5627 for (idx = 0; idx < spec->num_pins; idx++)
5628 if (spec->pin_nids[idx] == dig0pin)
5629 break;
5630 if ((idx + 2) >= spec->num_pins)
5631 return 0;
5632
5633 /* dig1pin case */
330ee995 5634 if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5635 return 2;
5636
5637 /* dig0pin + dig2pin case */
330ee995 5638 if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
6df703ae 5639 return 2;
330ee995 5640 if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5641 return 1;
5642 else
5643 return 0;
5644}
5645
75d1aeb9
TI		 5646/* HP dv7 bass switch - GPIO5 */
5647#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
5648static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
5649 struct snd_ctl_elem_value *ucontrol)
5650{
5651 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5652 struct sigmatel_spec *spec = codec->spec;
5653 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
5654 return 0;
5655}
5656
5657static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
5658 struct snd_ctl_elem_value *ucontrol)
5659{
5660 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5661 struct sigmatel_spec *spec = codec->spec;
5662 unsigned int gpio_data;
5663
5664 gpio_data = (spec->gpio_data & ~0x20) |
5665 (ucontrol->value.integer.value[0] ? 0x20 : 0);
5666 if (gpio_data == spec->gpio_data)
5667 return 0;
5668 spec->gpio_data = gpio_data;
5669 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
5670 return 1;
5671}
5672
2b63536f 5673static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
75d1aeb9
TI		 5674 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5675 .info = stac_hp_bass_gpio_info,
5676 .get = stac_hp_bass_gpio_get,
5677 .put = stac_hp_bass_gpio_put,
5678};
5679
5680static int stac_add_hp_bass_switch(struct hda_codec *codec)
5681{
5682 struct sigmatel_spec *spec = codec->spec;
5683
5684 if (!stac_control_new(spec, &stac_hp_bass_sw_ctrl,
5685 "Bass Speaker Playback Switch", 0))
5686 return -ENOMEM;
5687
5688 spec->gpio_mask |= 0x20;
5689 spec->gpio_dir |= 0x20;
5690 spec->gpio_data |= 0x20;
5691 return 0;
5692}
5693
e035b841
MR		 5694static int patch_stac92hd71bxx(struct hda_codec *codec)
5695{
5696 struct sigmatel_spec *spec;
2b63536f 5697 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
5bdaaada 5698 unsigned int pin_cfg;
e035b841
MR		 5699 int err = 0;
5700
5701 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5702 if (spec == NULL)
5703 return -ENOMEM;
5704
a252c81a 5705 codec->no_trigger_sense = 1;
e035b841 5706 codec->spec = spec;
1b0e372d 5707 spec->linear_tone_beep = 0;
8daaaa97 5708 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK		 5709 spec->num_pins = STAC92HD71BXX_NUM_PINS;
5710 switch (codec->vendor_id) {
5711 case 0x111d76b6:
5712 case 0x111d76b7:
5713 spec->pin_nids = stac92hd71bxx_pin_nids_4port;
5714 break;
5715 case 0x111d7603:
5716 case 0x111d7608:
5717 /* On 92HD75Bx 0x27 isn't a pin nid */
5718 spec->num_pins--;
5719 /* fallthrough */
5720 default:
5721 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5722 }
aafc4412 5723 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 5724 spec->board_config = snd_hda_check_board_config(codec,
5725 STAC_92HD71BXX_MODELS,
5726 stac92hd71bxx_models,
5727 stac92hd71bxx_cfg_tbl);
5728again:
330ee995 5729 if (spec->board_config < 0)
9a11f1aa
TI		 5730 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5731 codec->chip_name);
330ee995
TI		 5732 else
5733 stac92xx_set_config_regs(codec,
af9f341a 5734 stac92hd71bxx_brd_tbl[spec->board_config]);
e035b841 5735
fc64b26c 5736 if (spec->board_config != STAC_92HD71BXX_REF) {
41c3b648
TI		 5737 /* GPIO0 = EAPD */
5738 spec->gpio_mask = 0x01;
5739 spec->gpio_dir = 0x01;
5740 spec->gpio_data = 0x01;
5741 }
5742
6df703ae
HRK		 5743 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5744 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5745
6479c631
TI		 5746 spec->num_caps = STAC92HD71BXX_NUM_CAPS;
5747 spec->capvols = stac92hd71bxx_capvols;
5748 spec->capsws = stac92hd71bxx_capsws;
5749
541eee87
MR		 5750 switch (codec->vendor_id) {
5751 case 0x111d76b6: /* 4 Port without Analog Mixer */
5752 case 0x111d76b7:
23c7b521
HRK		 5753 unmute_init++;
5754 /* fallthru */
541eee87
MR		 5755 case 0x111d76b4: /* 6 Port without Analog Mixer */
5756 case 0x111d76b5:
0ffa9807 5757 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5758 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5759 stac92hd71bxx_dmic_nids,
5760 STAC92HD71BXX_NUM_DMICS);
541eee87 5761 break;
aafc4412 5762 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 5763 switch (spec->board_config) {
5764 case STAC_HP_M4:
72474be6 5765 /* Enable VREF power saving on GPIO1 detect */
3a93897e 5766 err = stac_add_event(codec, codec->afg,
c6e4c666
TI		 5767 STAC_VREF_EVENT, 0x02);
5768 if (err < 0)
5769 return err;
c5d08bb5 5770 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6 5771 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
3a93897e 5772 snd_hda_jack_detect_enable(codec, codec->afg, 0);
72474be6
MR		 5773 spec->gpio_mask |= 0x02;
5774 break;
5775 }
8daaaa97 5776 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5777 (codec->revision_id & 0xf) == 1)
8daaaa97 5778 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5779
aafc4412 5780 /* disable VSW */
ca8d33fc 5781 unmute_init++;
330ee995
TI		 5782 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
5783 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
2b63536f 5784 spec->dmic_nids = stac92hd71bxx_dmic_5port_nids;
ab5a6ebe 5785 spec->num_dmics = stac92xx_connected_ports(codec,
2b63536f 5786 stac92hd71bxx_dmic_5port_nids,
6df703ae 5787 STAC92HD71BXX_NUM_DMICS - 1);
aafc4412
MR		 5788 break;
5789 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5790 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5791 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5792
aafc4412 5793 /* fallthru */
541eee87 5794 default:
0ffa9807 5795 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5796 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5797 stac92hd71bxx_dmic_nids,
5798 STAC92HD71BXX_NUM_DMICS);
5207e10e 5799 break;
541eee87
MR		 5800 }
5801
5e68fb3c
DH		 5802 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
5803 spec->init = stac92hd71bxx_core_init;
5804
ca8d33fc
MR		 5805 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
5806 snd_hda_sequence_write_cache(codec, unmute_init);
5807
d78d7a90 5808 spec->aloopback_ctl = stac92hd71bxx_loopback;
4b33c767 5809 spec->aloopback_mask = 0x50;
541eee87
MR		 5810 spec->aloopback_shift = 0;
5811
8daaaa97 5812 spec->powerdown_adcs = 1;
1cd2224c 5813 spec->digbeep_nid = 0x26;
e035b841
MR		 5814 spec->mux_nids = stac92hd71bxx_mux_nids;
5815 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 5816 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5817 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 5818
5819 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5820 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
5207e10e 5821 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
6df703ae 5822 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 5823
d38cce70
KG		 5824 snd_printdd("Found board config: %d\n", spec->board_config);
5825
6a14f585
MR		 5826 switch (spec->board_config) {
5827 case STAC_HP_M4:
6a14f585 5828 /* enable internal microphone */
330ee995 5829 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
b9aea715
MR		 5830 stac92xx_auto_set_pinctl(codec, 0x0e,
5831 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 5832 /* fallthru */
5833 case STAC_DELL_M4_2:
5834 spec->num_dmics = 0;
5835 spec->num_smuxes = 0;
5836 spec->num_dmuxes = 0;
5837 break;
5838 case STAC_DELL_M4_1:
5839 case STAC_DELL_M4_3:
5840 spec->num_dmics = 1;
5841 spec->num_smuxes = 0;
ea18aa46 5842 spec->num_dmuxes = 1;
6a14f585 5843 break;
514bf54c
JG		 5844 case STAC_HP_DV4_1222NR:
5845 spec->num_dmics = 1;
5846 /* I don't know if it needs 1 or 2 smuxes - will wait for
5847 * bug reports to fix if needed
5848 */
5849 spec->num_smuxes = 1;
5850 spec->num_dmuxes = 1;
514bf54c 5851 /* fallthrough */
2a6ce6e5
TI		 5852 case STAC_HP_DV4:
5853 spec->gpio_led = 0x01;
5854 /* fallthrough */
e2ea57a8 5855 case STAC_HP_DV5:
330ee995 5856 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
e2ea57a8 5857 stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
6e34c033
TI		 5858 /* HP dv6 gives the headphone pin as a line-out. Thus we
5859 * need to set hp_detect flag here to force to enable HP
5860 * detection.
5861 */
5862 spec->hp_detect = 1;
e2ea57a8 5863 break;
ae6241fb
CP		 5864 case STAC_HP_HDX:
5865 spec->num_dmics = 1;
5866 spec->num_dmuxes = 1;
5867 spec->num_smuxes = 1;
26ebe0a2 5868 spec->gpio_led = 0x08;
86d190e7
TI		 5869 break;
5870 }
443e26d0 5871
c357aab0 5872 if (hp_blike_system(codec->subsystem_id)) {
5bdaaada
VK		 5873 pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
5874 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
5875 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
5876 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
5877 /* It was changed in the BIOS to just satisfy MS DTM.
5878 * Lets turn it back into slaved HP
5879 */
5880 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
5881 | (AC_JACK_HP_OUT <<
5882 AC_DEFCFG_DEVICE_SHIFT);
5883 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
5884 | AC_DEFCFG_SEQUENCE)))
5885 | 0x1f;
5886 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
5887 }
5888 }
5889
6a557c94 5890 if (find_mute_led_cfg(codec, 1))
c357aab0
VK		 5891 snd_printd("mute LED gpio %d polarity %d\n",
5892 spec->gpio_led,
5893 spec->gpio_led_polarity);
5bdaaada 5894
86d190e7 5895 if (spec->gpio_led) {
f1a73746 5896 if (!spec->vref_mute_led_nid) {
45eebda7
VK		 5897 spec->gpio_mask |= spec->gpio_led;
5898 spec->gpio_dir |= spec->gpio_led;
5899 spec->gpio_data |= spec->gpio_led;
5900 } else {
5901 codec->patch_ops.set_power_state =
5902 stac92xx_set_power_state;
45eebda7 5903 }
86d190e7 5904 }
6a14f585 5905
c21ca4a8 5906 spec->multiout.dac_nids = spec->dac_nids;
e035b841 5907
9009b0e4 5908 err = stac92xx_parse_auto_config(codec);
e035b841
MR		 5909 if (!err) {
5910 if (spec->board_config < 0) {
5911 printk(KERN_WARNING "hda_codec: No auto-config is "
5912 "available, default to model=ref\n");
5913 spec->board_config = STAC_92HD71BXX_REF;
5914 goto again;
5915 }
5916 err = -EINVAL;
5917 }
5918
5919 if (err < 0) {
5920 stac92xx_free(codec);
5921 return err;
5922 }
5923
75d1aeb9 5924 /* enable bass on HP dv7 */
2a6ce6e5
TI		 5925 if (spec->board_config == STAC_HP_DV4 ||
5926 spec->board_config == STAC_HP_DV5) {
75d1aeb9
TI		 5927 unsigned int cap;
5928 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
5929 cap &= AC_GPIO_IO_COUNT;
5930 if (cap >= 6)
5931 stac_add_hp_bass_switch(codec);
5932 }
5933
2d34e1b3
TI		 5934 codec->proc_widget_hook = stac92hd7x_proc_hook;
5935
e035b841 5936 return 0;
86d190e7 5937}
e035b841 5938
2f2f4251
M		 5939static int patch_stac922x(struct hda_codec *codec)
5940{
5941 struct sigmatel_spec *spec;
c7d4b2fa 5942 int err;
2f2f4251 5943
e560d8d8 5944 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5945 if (spec == NULL)
5946 return -ENOMEM;
5947
a252c81a 5948 codec->no_trigger_sense = 1;
2f2f4251 5949 codec->spec = spec;
1b0e372d 5950 spec->linear_tone_beep = 1;
a4eed138 5951 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5952 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 5953 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5954 stac922x_models,
5955 stac922x_cfg_tbl);
536319af 5956 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 5957 spec->gpio_mask = spec->gpio_dir = 0x03;
5958 spec->gpio_data = 0x03;
3fc24d85
TI		 5959 /* Intel Macs have all same PCI SSID, so we need to check
5960 * codec SSID to distinguish the exact models
5961 */
6f0778d8 5962 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5963 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 5964
5965 case 0x106b0800:
5966 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5967 break;
5d5d3bc3
IZ		 5968 case 0x106b0600:
5969 case 0x106b0700:
5970 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5971 break;
5d5d3bc3
IZ		 5972 case 0x106b0e00:
5973 case 0x106b0f00:
5974 case 0x106b1600:
5975 case 0x106b1700:
5976 case 0x106b0200:
5977 case 0x106b1e00:
5978 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5979 break;
5d5d3bc3
IZ		 5980 case 0x106b1a00:
5981 case 0x00000100:
5982 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5983 break;
5d5d3bc3
IZ		 5984 case 0x106b0a00:
5985 case 0x106b2200:
5986 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5987 break;
536319af
NB		 5988 default:
5989 spec->board_config = STAC_INTEL_MAC_V3;
5990 break;
3fc24d85
TI		 5991 }
5992 }
5993
9e507abd 5994 again:
330ee995 5995 if (spec->board_config < 0)
9a11f1aa
TI		 5996 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5997 codec->chip_name);
330ee995
TI		 5998 else
5999 stac92xx_set_config_regs(codec,
af9f341a 6000 stac922x_brd_tbl[spec->board_config]);
2f2f4251 6001
c7d4b2fa
M		 6002 spec->adc_nids = stac922x_adc_nids;
6003 spec->mux_nids = stac922x_mux_nids;
2549413e 6004 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 6005 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 6006 spec->num_dmics = 0;
a64135a2 6007 spec->num_pwrs = 0;
c7d4b2fa
M		 6008
6009 spec->init = stac922x_core_init;
6479c631
TI		 6010
6011 spec->num_caps = STAC922X_NUM_CAPS;
6012 spec->capvols = stac922x_capvols;
6013 spec->capsws = stac922x_capsws;
c7d4b2fa
M		 6014
6015 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 6016
9009b0e4 6017 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 6018 if (!err) {
6019 if (spec->board_config < 0) {
6020 printk(KERN_WARNING "hda_codec: No auto-config is "
6021 "available, default to model=ref\n");
6022 spec->board_config = STAC_D945_REF;
6023 goto again;
6024 }
6025 err = -EINVAL;
6026 }
3cc08dc6
MP		 6027 if (err < 0) {
6028 stac92xx_free(codec);
6029 return err;
6030 }
6031
6032 codec->patch_ops = stac92xx_patch_ops;
6033
807a4636
TI		 6034 /* Fix Mux capture level; max to 2 */
6035 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
6036 (0 << AC_AMPCAP_OFFSET_SHIFT) |
6037 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
6038 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
6039 (0 << AC_AMPCAP_MUTE_SHIFT));
6040
3cc08dc6
MP		 6041 return 0;
6042}
6043
6044static int patch_stac927x(struct hda_codec *codec)
6045{
6046 struct sigmatel_spec *spec;
6047 int err;
6048
6049 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6050 if (spec == NULL)
6051 return -ENOMEM;
6052
a252c81a 6053 codec->no_trigger_sense = 1;
3cc08dc6 6054 codec->spec = spec;
1b0e372d 6055 spec->linear_tone_beep = 1;
45c1d85b 6056 codec->slave_dig_outs = stac927x_slave_dig_outs;
a4eed138 6057 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 6058 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 6059 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
6060 stac927x_models,
6061 stac927x_cfg_tbl);
9e507abd 6062 again:
330ee995 6063 if (spec->board_config < 0)
9a11f1aa
TI		 6064 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6065 codec->chip_name);
330ee995
TI		 6066 else
6067 stac92xx_set_config_regs(codec,
af9f341a 6068 stac927x_brd_tbl[spec->board_config]);
3cc08dc6 6069
1cd2224c 6070 spec->digbeep_nid = 0x23;
8e9068b1
MR		 6071 spec->adc_nids = stac927x_adc_nids;
6072 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
6073 spec->mux_nids = stac927x_mux_nids;
6074 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 6075 spec->smux_nids = stac927x_smux_nids;
6076 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 6077 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 6078 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 6079 spec->multiout.dac_nids = spec->dac_nids;
6080
af6ee302
TI		 6081 if (spec->board_config != STAC_D965_REF) {
6082 /* GPIO0 High = Enable EAPD */
6083 spec->eapd_mask = spec->gpio_mask = 0x01;
6084 spec->gpio_dir = spec->gpio_data = 0x01;
6085 }
6086
81d3dbde 6087 switch (spec->board_config) {
93ed1503 6088 case STAC_D965_3ST:
93ed1503 6089 case STAC_D965_5ST:
8e9068b1 6090 /* GPIO0 High = Enable EAPD */
8e9068b1 6091 spec->num_dmics = 0;
93ed1503 6092 spec->init = d965_core_init;
81d3dbde 6093 break;
8e9068b1 6094 case STAC_DELL_BIOS:
780c8be4
MR		 6095 switch (codec->subsystem_id) {
6096 case 0x10280209:
6097 case 0x1028022e:
6098 /* correct the device field to SPDIF out */
330ee995 6099 snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
780c8be4 6100 break;
86d190e7 6101 }
03d7ca17 6102 /* configure the analog microphone on some laptops */
330ee995 6103 snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
2f32d909 6104 /* correct the front output jack as a hp out */
330ee995 6105 snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
c481fca3 6106 /* correct the front input jack as a mic */
330ee995 6107 snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
c481fca3 6108 /* fallthru */
8e9068b1 6109 case STAC_DELL_3ST:
af6ee302
TI		 6110 if (codec->subsystem_id != 0x1028022f) {
6111 /* GPIO2 High = Enable EAPD */
6112 spec->eapd_mask = spec->gpio_mask = 0x04;
6113 spec->gpio_dir = spec->gpio_data = 0x04;
6114 }
7f16859a
MR		 6115 spec->dmic_nids = stac927x_dmic_nids;
6116 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 6117
ccca7cdc 6118 spec->init = dell_3st_core_init;
8e9068b1 6119 spec->dmux_nids = stac927x_dmux_nids;
1697055e 6120 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a 6121 break;
54930531
TI		 6122 case STAC_927X_VOLKNOB:
6123 spec->num_dmics = 0;
6124 spec->init = stac927x_volknob_core_init;
6125 break;
7f16859a 6126 default:
8e9068b1 6127 spec->num_dmics = 0;
8e9068b1 6128 spec->init = stac927x_core_init;
af6ee302 6129 break;
7f16859a
MR		 6130 }
6131
6479c631
TI		 6132 spec->num_caps = STAC927X_NUM_CAPS;
6133 spec->capvols = stac927x_capvols;
6134 spec->capsws = stac927x_capsws;
6135
a64135a2 6136 spec->num_pwrs = 0;
d78d7a90 6137 spec->aloopback_ctl = stac927x_loopback;
e1f0d669
MR		 6138 spec->aloopback_mask = 0x40;
6139 spec->aloopback_shift = 0;
c0cea0d0 6140 spec->eapd_switch = 1;
8e9068b1 6141
9009b0e4 6142 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 6143 if (!err) {
6144 if (spec->board_config < 0) {
6145 printk(KERN_WARNING "hda_codec: No auto-config is "
6146 "available, default to model=ref\n");
6147 spec->board_config = STAC_D965_REF;
6148 goto again;
6149 }
6150 err = -EINVAL;
6151 }
c7d4b2fa
M		 6152 if (err < 0) {
6153 stac92xx_free(codec);
6154 return err;
6155 }
2f2f4251
M		 6156
6157 codec->patch_ops = stac92xx_patch_ops;
6158
2d34e1b3
TI		 6159 codec->proc_widget_hook = stac927x_proc_hook;
6160
52987656
TI		 6161 /*
6162 * !!FIXME!!
6163 * The STAC927x seem to require fairly long delays for certain
6164 * command sequences. With too short delays (even if the answer
6165 * is set to RIRB properly), it results in the silence output
6166 * on some hardwares like Dell.
6167 *
6168 * The below flag enables the longer delay (see get_response
6169 * in hda_intel.c).
6170 */
6171 codec->bus->needs_damn_long_delay = 1;
6172
e28d8322
TI		 6173 /* no jack detecion for ref-no-jd model */
6174 if (spec->board_config == STAC_D965_REF_NO_JD)
6175 spec->hp_detect = 0;
6176
2f2f4251
M		 6177 return 0;
6178}
6179
f3302a59
MP		 6180static int patch_stac9205(struct hda_codec *codec)
6181{
6182 struct sigmatel_spec *spec;
8259980e 6183 int err;
f3302a59
MP		 6184
6185 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6186 if (spec == NULL)
6187 return -ENOMEM;
6188
a252c81a 6189 codec->no_trigger_sense = 1;
f3302a59 6190 codec->spec = spec;
1b0e372d 6191 spec->linear_tone_beep = 1;
a4eed138 6192 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 6193 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 6194 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
6195 stac9205_models,
6196 stac9205_cfg_tbl);
9e507abd 6197 again:
330ee995 6198 if (spec->board_config < 0)
9a11f1aa
TI		 6199 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6200 codec->chip_name);
330ee995
TI		 6201 else
6202 stac92xx_set_config_regs(codec,
af9f341a 6203 stac9205_brd_tbl[spec->board_config]);
f3302a59 6204
1cd2224c 6205 spec->digbeep_nid = 0x23;
f3302a59 6206 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 6207 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 6208 spec->mux_nids = stac9205_mux_nids;
2549413e 6209 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 6210 spec->smux_nids = stac9205_smux_nids;
6211 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 6212 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 6213 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 6214 spec->dmux_nids = stac9205_dmux_nids;
1697055e 6215 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 6216 spec->num_pwrs = 0;
f3302a59
MP		 6217
6218 spec->init = stac9205_core_init;
d78d7a90 6219 spec->aloopback_ctl = stac9205_loopback;
f3302a59 6220
6479c631
TI		 6221 spec->num_caps = STAC9205_NUM_CAPS;
6222 spec->capvols = stac9205_capvols;
6223 spec->capsws = stac9205_capsws;
6224
e1f0d669
MR		 6225 spec->aloopback_mask = 0x40;
6226 spec->aloopback_shift = 0;
d9a4268e
TI		 6227 /* Turn on/off EAPD per HP plugging */
6228 if (spec->board_config != STAC_9205_EAPD)
6229 spec->eapd_switch = 1;
f3302a59 6230 spec->multiout.dac_nids = spec->dac_nids;
87d48363 6231
ae0a8ed8 6232 switch (spec->board_config){
ae0a8ed8 6233 case STAC_9205_DELL_M43:
87d48363 6234 /* Enable SPDIF in/out */
330ee995
TI		 6235 snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
6236 snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
87d48363 6237
4fe5195c 6238 /* Enable unsol response for GPIO4/Dock HP connection */
3a93897e 6239 err = stac_add_event(codec, codec->afg, STAC_VREF_EVENT, 0x01);
c6e4c666
TI		 6240 if (err < 0)
6241 return err;
c5d08bb5 6242 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c 6243 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3a93897e 6244 snd_hda_jack_detect_enable(codec, codec->afg, 0);
4fe5195c
MR		 6245
6246 spec->gpio_dir = 0x0b;
0fc9dec4 6247 spec->eapd_mask = 0x01;
4fe5195c
MR		 6248 spec->gpio_mask = 0x1b;
6249 spec->gpio_mute = 0x10;
e2e7d624 6250 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 6251 * GPIO3 Low = DRM
87d48363 6252 */
4fe5195c 6253 spec->gpio_data = 0x01;
ae0a8ed8 6254 break;
b2c4f4d7
MR		 6255 case STAC_9205_REF:
6256 /* SPDIF-In enabled */
6257 break;
ae0a8ed8
TD		 6258 default:
6259 /* GPIO0 High = EAPD */
0fc9dec4 6260 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 6261 spec->gpio_data = 0x01;
ae0a8ed8
TD		 6262 break;
6263 }
33382403 6264
9009b0e4 6265 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 6266 if (!err) {
6267 if (spec->board_config < 0) {
6268 printk(KERN_WARNING "hda_codec: No auto-config is "
6269 "available, default to model=ref\n");
6270 spec->board_config = STAC_9205_REF;
6271 goto again;
6272 }
6273 err = -EINVAL;
6274 }
f3302a59
MP		 6275 if (err < 0) {
6276 stac92xx_free(codec);
6277 return err;
6278 }
6279
6280 codec->patch_ops = stac92xx_patch_ops;
6281
2d34e1b3
TI		 6282 codec->proc_widget_hook = stac9205_proc_hook;
6283
f3302a59
MP		 6284 return 0;
6285}
6286
db064e50 6287/*
6d859065 6288 * STAC9872 hack
db064e50
TI		 6289 */
6290
2b63536f 6291static const struct hda_verb stac9872_core_init[] = {
1624cb9a 6292 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 6293 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
6294 {}
6295};
6296
2b63536f 6297static const hda_nid_t stac9872_pin_nids[] = {
caa10b6e
TI		 6298 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
6299 0x11, 0x13, 0x14,
6300};
6301
2b63536f 6302static const hda_nid_t stac9872_adc_nids[] = {
caa10b6e
TI		 6303 0x8 /*,0x6*/
6304};
6305
2b63536f 6306static const hda_nid_t stac9872_mux_nids[] = {
caa10b6e
TI		 6307 0x15
6308};
6309
2b63536f 6310static const unsigned long stac9872_capvols[] = {
6479c631
TI		 6311 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT),
6312};
6313#define stac9872_capsws stac9872_capvols
6314
2b63536f 6315static const unsigned int stac9872_vaio_pin_configs[9] = {
307282c8
TI		 6316 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030,
6317 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0,
6318 0x90a7013e
6319};
6320
ea734963 6321static const char * const stac9872_models[STAC_9872_MODELS] = {
307282c8
TI		 6322 [STAC_9872_AUTO] = "auto",
6323 [STAC_9872_VAIO] = "vaio",
6324};
6325
2b63536f 6326static const unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = {
307282c8
TI		 6327 [STAC_9872_VAIO] = stac9872_vaio_pin_configs,
6328};
6329
2b63536f 6330static const struct snd_pci_quirk stac9872_cfg_tbl[] = {
b04add95
TI		 6331 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
6332 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI		 6333 {} /* terminator */
6334};
6335
6d859065 6336static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 6337{
6338 struct sigmatel_spec *spec;
1e137f92 6339 int err;
db064e50 6340
db064e50
TI		 6341 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6342 if (spec == NULL)
6343 return -ENOMEM;
a252c81a 6344 codec->no_trigger_sense = 1;
db064e50 6345 codec->spec = spec;
1b0e372d 6346 spec->linear_tone_beep = 1;
b04add95
TI		 6347 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
6348 spec->pin_nids = stac9872_pin_nids;
caa10b6e
TI		 6349
6350 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
6351 stac9872_models,
6352 stac9872_cfg_tbl);
307282c8 6353 if (spec->board_config < 0)
9a11f1aa
TI		 6354 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6355 codec->chip_name);
307282c8
TI		 6356 else
6357 stac92xx_set_config_regs(codec,
6358 stac9872_brd_tbl[spec->board_config]);
db064e50 6359
1e137f92
TI		 6360 spec->multiout.dac_nids = spec->dac_nids;
6361 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
6362 spec->adc_nids = stac9872_adc_nids;
6363 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
6364 spec->mux_nids = stac9872_mux_nids;
1e137f92 6365 spec->init = stac9872_core_init;
6479c631
TI		 6366 spec->num_caps = 1;
6367 spec->capvols = stac9872_capvols;
6368 spec->capsws = stac9872_capsws;
1e137f92 6369
9009b0e4 6370 err = stac92xx_parse_auto_config(codec);
1e137f92
TI		 6371 if (err < 0) {
6372 stac92xx_free(codec);
6373 return -EINVAL;
6374 }
6375 spec->input_mux = &spec->private_imux;
6376 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI		 6377 return 0;
6378}
6379
6380
2f2f4251
M		 6381/*
6382 * patch entries
6383 */
2b63536f 6384static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 6385 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
6386 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
6387 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
6388 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
6389 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
6390 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
6391 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 6392 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
6393 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
6394 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
6395 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
6396 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
6397 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 6398 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
6399 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
6400 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
6401 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
6402 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
6403 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
6404 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
6405 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
6406 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
6407 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 6408 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
6409 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
6410 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
6411 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
6412 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
6413 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 6414 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
6415 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 6416 /* The following does not take into account .id=0x83847661 when subsys =
6417 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
6418 * currently not fully supported.
6419 */
6420 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
6421 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
6422 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 6423 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP		 6424 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
6425 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
6426 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
6427 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
6428 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
6429 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
6430 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
6431 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 6432 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6 6433 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
a9694faa 6434 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
d0513fc6 6435 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 6436 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
8a345a04
CC		 6437 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
6438 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
36706005
CC		 6439 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
6440 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
6441 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
6442 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
aafc4412 6443 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 6444 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
6445 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 6446 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 6447 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6448 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6449 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6450 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6451 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6452 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6453 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
6454 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4d8ec5f3
CC		 6455 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
6456 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
6457 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
6458 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
6459 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
6460 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
6461 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
6462 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
6463 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
6464 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
6465 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
6466 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
6467 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
6468 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
6469 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
46724c2e 6470 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 6471 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4dfb8a45
VK		 6472 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
6473 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 6474 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
ad5d8755
CC		 6475 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
6476 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
6477 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
6478 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
6479 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
6480 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
6481 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
6482 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
6483 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
6484 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
6485 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
6486 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
2f2f4251
M		 6487 {} /* terminator */
6488};
1289e9e8
TI		 6489
6490MODULE_ALIAS("snd-hda-codec-id:8384*");
6491MODULE_ALIAS("snd-hda-codec-id:111d*");
6492
6493MODULE_LICENSE("GPL");
6494MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
6495
6496static struct hda_codec_preset_list sigmatel_list = {
6497 .preset = snd_hda_preset_sigmatel,
6498 .owner = THIS_MODULE,
6499};
6500
6501static int __init patch_sigmatel_init(void)
6502{
6503 return snd_hda_add_codec_preset(&sigmatel_list);
6504}
6505
6506static void __exit patch_sigmatel_exit(void)
6507{
6508 snd_hda_delete_codec_preset(&sigmatel_list);
6509}
6510
6511module_init(patch_sigmatel_init)
6512module_exit(patch_sigmatel_exit)
Linux 6.x block layer and io_uring tree(s)