projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ALSA: hda: sigmantel: Reduce CONFIG_PM dependencies
[linux-2.6-block.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
d0fa1179 1// SPDX-License-Identifier: GPL-2.0-or-later
2f2f4251
M		 2/*
3 * Universal Interface for Intel High Definition Audio Codec
4 *
5 * HD audio interface patch for SigmaTel STAC92xx
6 *
7 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 8 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 9 *
10 * Based on patch_cmedia.c and patch_realtek.c
11 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
2f2f4251
M		 12 */
13
2f2f4251
M		 14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/slab.h>
17#include <linux/pci.h>
5bdaaada 18#include <linux/dmi.h>
da155d5b 19#include <linux/module.h>
2f2f4251 20#include <sound/core.h>
45a6ac16 21#include <sound/jack.h>
be57bfff 22#include <sound/hda_codec.h>
2f2f4251 23#include "hda_local.h"
128bc4ba 24#include "hda_auto_parser.h"
1cd2224c 25#include "hda_beep.h"
1835a0f9 26#include "hda_jack.h"
36c9db7a 27#include "hda_generic.h"
2f2f4251 28
f5fcc13c
TI		 29enum {
30 STAC_REF,
bf277785 31 STAC_9200_OQO,
dfe495d0
TI		 32 STAC_9200_DELL_D21,
33 STAC_9200_DELL_D22,
34 STAC_9200_DELL_D23,
35 STAC_9200_DELL_M21,
36 STAC_9200_DELL_M22,
37 STAC_9200_DELL_M23,
38 STAC_9200_DELL_M24,
39 STAC_9200_DELL_M25,
40 STAC_9200_DELL_M26,
41 STAC_9200_DELL_M27,
58eec423
MCC		 42 STAC_9200_M4,
43 STAC_9200_M4_2,
117f257d 44 STAC_9200_PANASONIC,
d39a3ae8 45 STAC_9200_EAPD_INIT,
f5fcc13c
TI		 46 STAC_9200_MODELS
47};
48
49enum {
50 STAC_9205_REF,
dfe495d0 51 STAC_9205_DELL_M42,
ae0a8ed8
TD		 52 STAC_9205_DELL_M43,
53 STAC_9205_DELL_M44,
d9a4268e 54 STAC_9205_EAPD,
f5fcc13c
TI		 55 STAC_9205_MODELS
56};
57
e1f0d669 58enum {
9e43f0de 59 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 60 STAC_92HD73XX_REF,
ae709440 61 STAC_92HD73XX_INTEL,
661cd8fb
TI		 62 STAC_DELL_M6_AMIC,
63 STAC_DELL_M6_DMIC,
64 STAC_DELL_M6_BOTH,
6b3ab21e 65 STAC_DELL_EQ,
842ae638 66 STAC_ALIENWARE_M17X,
d153135e 67 STAC_ELO_VUPOINT_15MX,
1de7ca5e 68 STAC_92HD89XX_HP_FRONT_JACK,
7440850c 69 STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK,
6426460e 70 STAC_92HD73XX_ASUS_MOBO,
e1f0d669
MR		 71 STAC_92HD73XX_MODELS
72};
73
d0513fc6
MR		 74enum {
75 STAC_92HD83XXX_REF,
32ed3f46 76 STAC_92HD83XXX_PWR_REF,
8bb0ac55 77 STAC_DELL_S14,
f7f9bdfa 78 STAC_DELL_VOSTRO_3500,
0c27c180 79 STAC_92HD83XXX_HP_cNB11_INTQUAD,
48315590 80 STAC_HP_DV7_4000,
5556e147 81 STAC_HP_ZEPHYR,
a3e19973 82 STAC_92HD83XXX_HP_LED,
ff8a1e27 83 STAC_92HD83XXX_HP_INV_LED,
62cbde18 84 STAC_92HD83XXX_HP_MIC_LED,
37c367ec 85 STAC_HP_LED_GPIO10,
8d032a8f 86 STAC_92HD83XXX_HEADSET_JACK,
372f8c75 87 STAC_92HD83XXX_HP,
49920427 88 STAC_HP_ENVY_BASS,
d009f3de 89 STAC_HP_BNB13_EQ,
8695a003 90 STAC_HP_ENVY_TS_BASS,
6ab42ff4 91 STAC_HP_ENVY_TS_DAC_BIND,
4227de2a 92 STAC_92HD83XXX_GPIO10_EAPD,
d0513fc6
MR		 93 STAC_92HD83XXX_MODELS
94};
95
e035b841
MR		 96enum {
97 STAC_92HD71BXX_REF,
a7662640
MR		 98 STAC_DELL_M4_1,
99 STAC_DELL_M4_2,
3a7abfd2 100 STAC_DELL_M4_3,
6a14f585 101 STAC_HP_M4,
2a6ce6e5 102 STAC_HP_DV4,
1b0652eb 103 STAC_HP_DV5,
ae6241fb 104 STAC_HP_HDX,
0f6fcb73
TI		 105 STAC_92HD71BXX_HP,
106 STAC_92HD71BXX_NO_DMIC,
107 STAC_92HD71BXX_NO_SMUX,
e035b841
MR		 108 STAC_92HD71BXX_MODELS
109};
110
8b3dfdaf
TI		 111enum {
112 STAC_92HD95_HP_LED,
113 STAC_92HD95_HP_BASS,
114 STAC_92HD95_MODELS
115};
116
8e21c34c
TD		 117enum {
118 STAC_925x_REF,
9cb36c2a
MCC		 119 STAC_M1,
120 STAC_M1_2,
121 STAC_M2,
8e21c34c 122 STAC_M2_2,
9cb36c2a
MCC		 123 STAC_M3,
124 STAC_M5,
125 STAC_M6,
8e21c34c
TD		 126 STAC_925x_MODELS
127};
128
f5fcc13c
TI		 129enum {
130 STAC_D945_REF,
131 STAC_D945GTP3,
132 STAC_D945GTP5,
5d5d3bc3
IZ		 133 STAC_INTEL_MAC_V1,
134 STAC_INTEL_MAC_V2,
135 STAC_INTEL_MAC_V3,
136 STAC_INTEL_MAC_V4,
137 STAC_INTEL_MAC_V5,
0a427846 138 STAC_INTEL_MAC_AUTO,
8c650087 139 STAC_ECS_202,
dfe495d0
TI		 140 STAC_922X_DELL_D81,
141 STAC_922X_DELL_D82,
142 STAC_922X_DELL_M81,
143 STAC_922X_DELL_M82,
0a427846 144 STAC_922X_INTEL_MAC_GPIO,
f5fcc13c
TI		 145 STAC_922X_MODELS
146};
147
148enum {
e28d8322 149 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 150 STAC_D965_REF,
151 STAC_D965_3ST,
152 STAC_D965_5ST,
679d92ed 153 STAC_D965_5ST_NO_FP,
29ac8363 154 STAC_D965_VERBS,
4ff076e5 155 STAC_DELL_3ST,
8e9068b1 156 STAC_DELL_BIOS,
078502b5 157 STAC_NEMO_DEFAULT,
eefb8be4 158 STAC_DELL_BIOS_AMIC,
29ac8363
TI		 159 STAC_DELL_BIOS_SPDIF,
160 STAC_927X_DELL_DMIC,
54930531 161 STAC_927X_VOLKNOB,
f5fcc13c
TI		 162 STAC_927X_MODELS
163};
403d1944 164
307282c8 165enum {
307282c8
TI		 166 STAC_9872_VAIO,
167 STAC_9872_MODELS
168};
169
2f2f4251 170struct sigmatel_spec {
36c9db7a 171 struct hda_gen_spec gen;
c7d4b2fa 172
c0cea0d0 173 unsigned int eapd_switch: 1;
1b0e372d 174 unsigned int linear_tone_beep:1;
8d032a8f 175 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
29ac8363 176 unsigned int volknob_init:1; /* special volume-knob initialization */
36c9db7a 177 unsigned int powerdown_adcs:1;
42875479 178 unsigned int have_spdif_mux:1;
c7d4b2fa 179
4fe5195c 180 /* gpio lines */
0fc9dec4 181 unsigned int eapd_mask;
4fe5195c
MR		 182 unsigned int gpio_mask;
183 unsigned int gpio_dir;
184 unsigned int gpio_data;
185 unsigned int gpio_mute;
86d190e7 186 unsigned int gpio_led;
c357aab0 187 unsigned int gpio_led_polarity;
f1a73746 188 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
45eebda7 189 unsigned int vref_led;
372f8c75 190 int default_polarity;
4fe5195c 191
62cbde18 192 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
7fe30711 193 unsigned int mic_enabled; /* current mic mute state (bitmask) */
62cbde18 194
8daaaa97
MR		 195 /* stream */
196 unsigned int stream_delay;
197
4fe5195c 198 /* analog loopback */
2b63536f 199 const struct snd_kcontrol_new *aloopback_ctl;
36c9db7a 200 unsigned int aloopback;
e1f0d669
MR		 201 unsigned char aloopback_mask;
202 unsigned char aloopback_shift;
8259980e 203
a64135a2 204 /* power management */
c882246d 205 unsigned int power_map_bits;
a64135a2 206 unsigned int num_pwrs;
2b63536f 207 const hda_nid_t *pwr_nids;
36c9db7a
TI		 208 unsigned int active_adcs;
209
210 /* beep widgets */
1cd2224c 211 hda_nid_t anabeep_nid;
414d38ba 212 bool beep_power_on;
42875479
TI		 213
214 /* SPDIF-out mux */
215 const char * const *spdif_labels;
216 struct hda_input_mux spdif_mux;
217 unsigned int cur_smux[2];
2f2f4251
M		 218};
219
c882246d
TI		 220#define AC_VERB_IDT_SET_POWER_MAP 0x7ec
221#define AC_VERB_IDT_GET_POWER_MAP 0xfec
222
2b63536f 223static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
a64135a2
MR		 224 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
225 0x0f, 0x10, 0x11
226};
227
afef2cfa
CC		 228static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
229 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
230 0x0f, 0x10
d0513fc6
MR		 231};
232
2b63536f 233static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
a64135a2
MR		 234 0x0a, 0x0d, 0x0f
235};
236
f3302a59 237
36c9db7a
TI		 238/*
239 * PCM hooks
240 */
241static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
242 struct hda_codec *codec,
243 struct snd_pcm_substream *substream,
244 int action)
8b65727b 245{
8b65727b 246 struct sigmatel_spec *spec = codec->spec;
36c9db7a
TI		 247 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
248 msleep(spec->stream_delay);
8b65727b
MP		 249}
250
36c9db7a
TI		 251static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
252 struct hda_codec *codec,
253 struct snd_pcm_substream *substream,
254 int action)
8b65727b 255{
8b65727b 256 struct sigmatel_spec *spec = codec->spec;
36c9db7a 257 int i, idx = 0;
8b65727b 258
36c9db7a
TI		 259 if (!spec->powerdown_adcs)
260 return;
8b65727b 261
36c9db7a
TI		 262 for (i = 0; i < spec->gen.num_all_adcs; i++) {
263 if (spec->gen.all_adcs[i] == hinfo->nid) {
264 idx = i;
265 break;
266 }
267 }
8b65727b 268
36c9db7a
TI		 269 switch (action) {
270 case HDA_GEN_PCM_ACT_OPEN:
271 msleep(40);
272 snd_hda_codec_write(codec, hinfo->nid, 0,
273 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
274 spec->active_adcs |= (1 << idx);
275 break;
276 case HDA_GEN_PCM_ACT_CLOSE:
277 snd_hda_codec_write(codec, hinfo->nid, 0,
278 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
279 spec->active_adcs &= ~(1 << idx);
280 break;
281 }
8b65727b
MP		 282}
283
36c9db7a
TI		 284/*
285 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
286 * funky external mute control using GPIO pins.
287 */
d9737751 288
36c9db7a
TI		 289static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
290 unsigned int dir_mask, unsigned int data)
d9737751 291{
36c9db7a 292 unsigned int gpiostate, gpiomask, gpiodir;
7639a06c 293 hda_nid_t fg = codec->core.afg;
d9737751 294
4e76a883 295 codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
36c9db7a 296
7639a06c 297 gpiostate = snd_hda_codec_read(codec, fg, 0,
36c9db7a
TI		 298 AC_VERB_GET_GPIO_DATA, 0);
299 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
300
7639a06c 301 gpiomask = snd_hda_codec_read(codec, fg, 0,
36c9db7a
TI		 302 AC_VERB_GET_GPIO_MASK, 0);
303 gpiomask |= mask;
304
7639a06c 305 gpiodir = snd_hda_codec_read(codec, fg, 0,
36c9db7a
TI		 306 AC_VERB_GET_GPIO_DIRECTION, 0);
307 gpiodir |= dir_mask;
308
309 /* Configure GPIOx as CMOS */
7639a06c 310 snd_hda_codec_write(codec, fg, 0, 0x7e7, 0);
36c9db7a 311
7639a06c 312 snd_hda_codec_write(codec, fg, 0,
36c9db7a 313 AC_VERB_SET_GPIO_MASK, gpiomask);
7639a06c 314 snd_hda_codec_read(codec, fg, 0,
36c9db7a
TI		 315 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
316
317 msleep(1);
318
7639a06c 319 snd_hda_codec_read(codec, fg, 0,
36c9db7a 320 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
d9737751
MR		 321}
322
36c9db7a 323/* hook for controlling mic-mute LED GPIO */
23a2b469
TI		 324static int stac_capture_led_update(struct led_classdev *led_cdev,
325 enum led_brightness brightness)
d9737751 326{
23a2b469 327 struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent);
d9737751 328 struct sigmatel_spec *spec = codec->spec;
00ef50c2 329
23a2b469 330 if (brightness)
3bf29db7 331 spec->gpio_data |= spec->mic_mute_led_gpio;
7fe30711 332 else
3bf29db7
TI		 333 spec->gpio_data &= ~spec->mic_mute_led_gpio;
334 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
23a2b469 335 return 0;
d9737751
MR		 336}
337
45eebda7
VK		 338static int stac_vrefout_set(struct hda_codec *codec,
339 hda_nid_t nid, unsigned int new_vref)
340{
341 int error, pinctl;
342
4e76a883 343 codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref);
45eebda7
VK		 344 pinctl = snd_hda_codec_read(codec, nid, 0,
345 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
346
347 if (pinctl < 0)
348 return pinctl;
349
350 pinctl &= 0xff;
351 pinctl &= ~AC_PINCTL_VREFEN;
352 pinctl |= (new_vref & AC_PINCTL_VREFEN);
353
cdd03ced 354 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
45eebda7
VK		 355 if (error < 0)
356 return error;
357
358 return 1;
359}
360
dfc6e469
TI		 361/* prevent codec AFG to D3 state when vref-out pin is used for mute LED */
362/* this hook is set in stac_setup_gpio() */
363static unsigned int stac_vref_led_power_filter(struct hda_codec *codec,
364 hda_nid_t nid,
365 unsigned int power_state)
366{
7639a06c 367 if (nid == codec->core.afg && power_state == AC_PWRST_D3)
dfc6e469
TI		 368 return AC_PWRST_D1;
369 return snd_hda_gen_path_power_filter(codec, nid, power_state);
370}
371
36c9db7a 372/* update mute-LED accoring to the master switch */
d1d37c57 373static void stac_update_led_status(struct hda_codec *codec, bool muted)
2f2f4251 374{
2f2f4251 375 struct sigmatel_spec *spec = codec->spec;
2f2f4251 376
36c9db7a
TI		 377 if (!spec->gpio_led)
378 return;
2f2f4251 379
36c9db7a
TI		 380 /* LED state is inverted on these systems */
381 if (spec->gpio_led_polarity)
382 muted = !muted;
2f2f4251 383
36c9db7a
TI		 384 if (!spec->vref_mute_led_nid) {
385 if (muted)
386 spec->gpio_data |= spec->gpio_led;
387 else
388 spec->gpio_data &= ~spec->gpio_led;
389 stac_gpio_set(codec, spec->gpio_mask,
390 spec->gpio_dir, spec->gpio_data);
5207e10e 391 } else {
36c9db7a
TI		 392 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
393 stac_vrefout_set(codec, spec->vref_mute_led_nid,
394 spec->vref_led);
5207e10e 395 }
2f2f4251
M		 396}
397
36c9db7a 398/* vmaster hook to update mute LED */
d1d37c57
TI		 399static int stac_vmaster_hook(struct led_classdev *led_cdev,
400 enum led_brightness brightness)
b22b4821 401{
d1d37c57
TI		 402 struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent);
403
404 stac_update_led_status(codec, brightness);
405 return 0;
b22b4821
MR		 406}
407
36c9db7a
TI		 408/* automute hook to handle GPIO mute and EAPD updates */
409static void stac_update_outputs(struct hda_codec *codec)
b22b4821 410{
b22b4821
MR		 411 struct sigmatel_spec *spec = codec->spec;
412
36c9db7a
TI		 413 if (spec->gpio_mute)
414 spec->gen.master_mute =
7639a06c 415 !(snd_hda_codec_read(codec, codec->core.afg, 0,
36c9db7a 416 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
b22b4821 417
36c9db7a 418 snd_hda_gen_update_outputs(codec);
b22b4821 419
36c9db7a
TI		 420 if (spec->eapd_mask && spec->eapd_switch) {
421 unsigned int val = spec->gpio_data;
422 if (spec->gen.speaker_muted)
423 val &= ~spec->eapd_mask;
424 else
425 val |= spec->eapd_mask;
1ea9a69d
TI		 426 if (spec->gpio_data != val) {
427 spec->gpio_data = val;
36c9db7a
TI		 428 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
429 val);
1ea9a69d 430 }
36c9db7a 431 }
b22b4821
MR		 432}
433
36c9db7a
TI		 434static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
435 bool enable, bool do_write)
5f10c4a9 436{
5f10c4a9 437 struct sigmatel_spec *spec = codec->spec;
36c9db7a 438 unsigned int idx, val;
5f10c4a9 439
36c9db7a
TI		 440 for (idx = 0; idx < spec->num_pwrs; idx++) {
441 if (spec->pwr_nids[idx] == nid)
442 break;
443 }
444 if (idx >= spec->num_pwrs)
445 return;
446
447 idx = 1 << idx;
448
449 val = spec->power_map_bits;
450 if (enable)
451 val &= ~idx;
452 else
453 val |= idx;
454
455 /* power down unused output ports */
456 if (val != spec->power_map_bits) {
457 spec->power_map_bits = val;
458 if (do_write)
7639a06c 459 snd_hda_codec_write(codec, codec->core.afg, 0,
36c9db7a
TI		 460 AC_VERB_IDT_SET_POWER_MAP, val);
461 }
462}
463
464/* update power bit per jack plug/unplug */
465static void jack_update_power(struct hda_codec *codec,
1a4f69d5 466 struct hda_jack_callback *jack)
36c9db7a
TI		 467{
468 struct sigmatel_spec *spec = codec->spec;
469 int i;
470
471 if (!spec->num_pwrs)
472 return;
473
2ebab40e
TI		 474 if (jack && jack->nid) {
475 stac_toggle_power_map(codec, jack->nid,
476 snd_hda_jack_detect(codec, jack->nid),
36c9db7a
TI		 477 true);
478 return;
479 }
480
481 /* update all jacks */
482 for (i = 0; i < spec->num_pwrs; i++) {
483 hda_nid_t nid = spec->pwr_nids[i];
1a4f69d5 484 if (!snd_hda_jack_tbl_get(codec, nid))
36c9db7a 485 continue;
62f949bf
TI		 486 stac_toggle_power_map(codec, nid,
487 snd_hda_jack_detect(codec, nid),
488 false);
36c9db7a
TI		 489 }
490
7639a06c
TI		 491 snd_hda_codec_write(codec, codec->core.afg, 0,
492 AC_VERB_IDT_SET_POWER_MAP,
36c9db7a
TI		 493 spec->power_map_bits);
494}
495
1a4f69d5
TI		 496static void stac_vref_event(struct hda_codec *codec,
497 struct hda_jack_callback *event)
36c9db7a
TI		 498{
499 unsigned int data;
500
7639a06c 501 data = snd_hda_codec_read(codec, codec->core.afg, 0,
36c9db7a
TI		 502 AC_VERB_GET_GPIO_DATA, 0);
503 /* toggle VREF state based on GPIOx status */
7639a06c 504 snd_hda_codec_write(codec, codec->core.afg, 0, 0x7e0,
36c9db7a
TI		 505 !!(data & (1 << event->private_data)));
506}
507
508/* initialize the power map and enable the power event to jacks that
509 * haven't been assigned to automute
510 */
511static void stac_init_power_map(struct hda_codec *codec)
512{
513 struct sigmatel_spec *spec = codec->spec;
514 int i;
515
516 for (i = 0; i < spec->num_pwrs; i++) {
517 hda_nid_t nid = spec->pwr_nids[i];
518 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
519 def_conf = get_defcfg_connect(def_conf);
36c9db7a 520 if (def_conf == AC_JACK_PORT_COMPLEX &&
7a9744cb
TI		 521 spec->vref_mute_led_nid != nid &&
522 is_jack_detectable(codec, nid)) {
36c9db7a 523 snd_hda_jack_detect_enable_callback(codec, nid,
36c9db7a
TI		 524 jack_update_power);
525 } else {
526 if (def_conf == AC_JACK_PORT_NONE)
527 stac_toggle_power_map(codec, nid, false, false);
528 else
529 stac_toggle_power_map(codec, nid, true, false);
530 }
531 }
532}
533
534/*
535 */
536
537static inline bool get_int_hint(struct hda_codec *codec, const char *key,
538 int *valp)
539{
540 return !snd_hda_get_int_hint(codec, key, valp);
541}
542
543/* override some hints from the hwdep entry */
544static void stac_store_hints(struct hda_codec *codec)
545{
546 struct sigmatel_spec *spec = codec->spec;
547 int val;
548
549 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
550 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
551 spec->gpio_mask;
552 }
553 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
36c9db7a 554 spec->gpio_dir &= spec->gpio_mask;
c507de88
TI		 555 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
556 spec->gpio_data &= spec->gpio_mask;
36c9db7a
TI		 557 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
558 spec->eapd_mask &= spec->gpio_mask;
559 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
560 spec->gpio_mute &= spec->gpio_mask;
561 val = snd_hda_get_bool_hint(codec, "eapd_switch");
562 if (val >= 0)
563 spec->eapd_switch = val;
564}
565
566/*
567 * loopback controls
568 */
569
570#define stac_aloopback_info snd_ctl_boolean_mono_info
571
572static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
573 struct snd_ctl_elem_value *ucontrol)
574{
575 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
576 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
577 struct sigmatel_spec *spec = codec->spec;
578
579 ucontrol->value.integer.value[0] = !!(spec->aloopback &
580 (spec->aloopback_mask << idx));
581 return 0;
5f10c4a9
ML		 582}
583
36c9db7a
TI		 584static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
585 struct snd_ctl_elem_value *ucontrol)
5f10c4a9
ML		 586{
587 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
588 struct sigmatel_spec *spec = codec->spec;
e1f0d669 589 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 590 unsigned int dac_mode;
e1f0d669 591 unsigned int val, idx_val;
5f10c4a9 592
e1f0d669
MR		 593 idx_val = spec->aloopback_mask << idx;
594 if (ucontrol->value.integer.value[0])
595 val = spec->aloopback | idx_val;
596 else
597 val = spec->aloopback & ~idx_val;
68ea7b2f 598 if (spec->aloopback == val)
5f10c4a9
ML		 599 return 0;
600
68ea7b2f 601 spec->aloopback = val;
5f10c4a9 602
e1f0d669
MR		 603 /* Only return the bits defined by the shift value of the
604 * first two bytes of the mask
605 */
7639a06c 606 dac_mode = snd_hda_codec_read(codec, codec->core.afg, 0,
e1f0d669
MR		 607 kcontrol->private_value & 0xFFFF, 0x0);
608 dac_mode >>= spec->aloopback_shift;
5f10c4a9 609
e1f0d669 610 if (spec->aloopback & idx_val) {
5f10c4a9 611 snd_hda_power_up(codec);
e1f0d669 612 dac_mode |= idx_val;
5f10c4a9
ML		 613 } else {
614 snd_hda_power_down(codec);
e1f0d669 615 dac_mode &= ~idx_val;
5f10c4a9
ML		 616 }
617
7639a06c 618 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
5f10c4a9
ML		 619 kcontrol->private_value >> 16, dac_mode);
620
621 return 1;
622}
623
e1f0d669 624#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 625 { \
626 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
627 .name = "Analog Loopback", \
e1f0d669 628 .count = cnt, \
36c9db7a
TI		 629 .info = stac_aloopback_info, \
630 .get = stac_aloopback_get, \
631 .put = stac_aloopback_put, \
5f10c4a9
ML		 632 .private_value = verb_read | (verb_write << 16), \
633 }
634
36c9db7a
TI		 635/*
636 * Mute LED handling on HP laptops
637 */
2fc99890 638
36c9db7a
TI		 639/* check whether it's a HP laptop with a docking port */
640static bool hp_bnb2011_with_dock(struct hda_codec *codec)
641{
7639a06c
TI		 642 if (codec->core.vendor_id != 0x111d7605 &&
643 codec->core.vendor_id != 0x111d76d1)
36c9db7a 644 return false;
2f2f4251 645
7639a06c 646 switch (codec->core.subsystem_id) {
36c9db7a
TI		 647 case 0x103c1618:
648 case 0x103c1619:
649 case 0x103c161a:
650 case 0x103c161b:
651 case 0x103c161c:
652 case 0x103c161d:
653 case 0x103c161e:
654 case 0x103c161f:
d78d7a90 655
36c9db7a
TI		 656 case 0x103c162a:
657 case 0x103c162b:
e1f0d669 658
36c9db7a
TI		 659 case 0x103c1630:
660 case 0x103c1631:
d78d7a90 661
36c9db7a
TI		 662 case 0x103c1633:
663 case 0x103c1634:
664 case 0x103c1635:
d0513fc6 665
36c9db7a
TI		 666 case 0x103c3587:
667 case 0x103c3588:
668 case 0x103c3589:
669 case 0x103c358a:
541eee87 670
36c9db7a
TI		 671 case 0x103c3667:
672 case 0x103c3668:
673 case 0x103c3669:
2f2f4251 674
36c9db7a
TI		 675 return true;
676 }
677 return false;
678}
1697055e 679
36c9db7a
TI		 680static bool hp_blike_system(u32 subsystem_id)
681{
682 switch (subsystem_id) {
c932b98c 683 case 0x103c1473: /* HP ProBook 6550b */
36c9db7a
TI		 684 case 0x103c1520:
685 case 0x103c1521:
686 case 0x103c1523:
687 case 0x103c1524:
688 case 0x103c1525:
689 case 0x103c1722:
690 case 0x103c1723:
691 case 0x103c1724:
692 case 0x103c1725:
693 case 0x103c1726:
694 case 0x103c1727:
695 case 0x103c1728:
696 case 0x103c1729:
697 case 0x103c172a:
698 case 0x103c172b:
699 case 0x103c307e:
700 case 0x103c307f:
701 case 0x103c3080:
702 case 0x103c3081:
703 case 0x103c7007:
704 case 0x103c7008:
705 return true;
706 }
707 return false;
708}
d9737751 709
36c9db7a
TI		 710static void set_hp_led_gpio(struct hda_codec *codec)
711{
712 struct sigmatel_spec *spec = codec->spec;
713 unsigned int gpio;
2134ea4f 714
36c9db7a
TI		 715 if (spec->gpio_led)
716 return;
2faa3bf1 717
7639a06c 718 gpio = snd_hda_param_read(codec, codec->core.afg, AC_PAR_GPIO_CAP);
36c9db7a
TI		 719 gpio &= AC_GPIO_IO_COUNT;
720 if (gpio > 3)
721 spec->gpio_led = 0x08; /* GPIO 3 */
722 else
723 spec->gpio_led = 0x01; /* GPIO 0 */
2faa3bf1
TI		 724}
725
36c9db7a
TI		 726/*
727 * This method searches for the mute LED GPIO configuration
728 * provided as OEM string in SMBIOS. The format of that string
729 * is HP_Mute_LED_P_G or HP_Mute_LED_P
730 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
731 * that corresponds to the NOT muted state of the master volume
732 * and G is the index of the GPIO to use as the mute LED control (0..9)
733 * If _G portion is missing it is assigned based on the codec ID
734 *
735 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
736 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
737 *
738 *
739 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
740 * SMBIOS - at least the ones I have seen do not have them - which include
741 * my own system (HP Pavilion dv6-1110ax) and my cousin's
742 * HP Pavilion dv9500t CTO.
743 * Need more information on whether it is true across the entire series.
744 * -- kunal
745 */
746static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
2f2f4251
M		 747{
748 struct sigmatel_spec *spec = codec->spec;
36c9db7a 749 const struct dmi_device *dev = NULL;
2f2f4251 750
36c9db7a
TI		 751 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
752 get_int_hint(codec, "gpio_led_polarity",
753 &spec->gpio_led_polarity);
754 return 1;
6479c631 755 }
c7d4b2fa 756
36c9db7a 757 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
e7fc4960 758 if (sscanf(dev->name, "HP_Mute_LED_%u_%x",
36c9db7a
TI		 759 &spec->gpio_led_polarity,
760 &spec->gpio_led) == 2) {
761 unsigned int max_gpio;
7639a06c 762 max_gpio = snd_hda_param_read(codec, codec->core.afg,
36c9db7a
TI		 763 AC_PAR_GPIO_CAP);
764 max_gpio &= AC_GPIO_IO_COUNT;
765 if (spec->gpio_led < max_gpio)
766 spec->gpio_led = 1 << spec->gpio_led;
767 else
768 spec->vref_mute_led_nid = spec->gpio_led;
769 return 1;
770 }
e7fc4960 771 if (sscanf(dev->name, "HP_Mute_LED_%u",
36c9db7a
TI		 772 &spec->gpio_led_polarity) == 1) {
773 set_hp_led_gpio(codec);
774 return 1;
775 }
776 /* BIOS bug: unfilled OEM string */
777 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
778 set_hp_led_gpio(codec);
779 if (default_polarity >= 0)
780 spec->gpio_led_polarity = default_polarity;
781 else
782 spec->gpio_led_polarity = 1;
783 return 1;
00ef50c2 784 }
d9737751 785 }
c7d4b2fa 786
36c9db7a
TI		 787 /*
788 * Fallback case - if we don't find the DMI strings,
789 * we statically set the GPIO - if not a B-series system
790 * and default polarity is provided
791 */
7639a06c 792 if (!hp_blike_system(codec->core.subsystem_id) &&
36c9db7a
TI		 793 (default_polarity == 0 || default_polarity == 1)) {
794 set_hp_led_gpio(codec);
795 spec->gpio_led_polarity = default_polarity;
796 return 1;
dabbed6f 797 }
36c9db7a
TI		 798 return 0;
799}
2134ea4f 800
303985f8
DH		 801/* check whether a built-in speaker is included in parsed pins */
802static bool has_builtin_speaker(struct hda_codec *codec)
803{
804 struct sigmatel_spec *spec = codec->spec;
caf3c043 805 const hda_nid_t *nid_pin;
303985f8
DH		 806 int nids, i;
807
808 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
809 nid_pin = spec->gen.autocfg.line_out_pins;
810 nids = spec->gen.autocfg.line_outs;
811 } else {
812 nid_pin = spec->gen.autocfg.speaker_pins;
813 nids = spec->gen.autocfg.speaker_outs;
814 }
815
816 for (i = 0; i < nids; i++) {
817 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
818 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
819 return true;
820 }
821 return false;
822}
823
36c9db7a
TI		 824/*
825 * PC beep controls
826 */
2faa3bf1 827
36c9db7a
TI		 828/* create PC beep volume controls */
829static int stac_auto_create_beep_ctls(struct hda_codec *codec,
830 hda_nid_t nid)
831{
832 struct sigmatel_spec *spec = codec->spec;
833 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
834 struct snd_kcontrol_new *knew;
35ace5e8 835 static const struct snd_kcontrol_new abeep_mute_ctl =
36c9db7a 836 HDA_CODEC_MUTE(NULL, 0, 0, 0);
35ace5e8 837 static const struct snd_kcontrol_new dbeep_mute_ctl =
36c9db7a 838 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
35ace5e8 839 static const struct snd_kcontrol_new beep_vol_ctl =
36c9db7a 840 HDA_CODEC_VOLUME(NULL, 0, 0, 0);
2faa3bf1 841
c7fabbc5 842 /* check for mute support for the amp */
36c9db7a
TI		 843 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
844 const struct snd_kcontrol_new *temp;
845 if (spec->anabeep_nid == nid)
846 temp = &abeep_mute_ctl;
847 else
848 temp = &dbeep_mute_ctl;
849 knew = snd_hda_gen_add_kctl(&spec->gen,
850 "Beep Playback Switch", temp);
851 if (!knew)
852 return -ENOMEM;
853 knew->private_value =
854 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
2134ea4f
TI		 855 }
856
36c9db7a
TI		 857 /* check to see if there is volume support for the amp */
858 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
859 knew = snd_hda_gen_add_kctl(&spec->gen,
860 "Beep Playback Volume",
861 &beep_vol_ctl);
862 if (!knew)
863 return -ENOMEM;
864 knew->private_value =
865 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
d78d7a90 866 }
36c9db7a
TI		 867 return 0;
868}
d78d7a90 869
36c9db7a
TI		 870#ifdef CONFIG_SND_HDA_INPUT_BEEP
871#define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
e4973e1e 872
36c9db7a
TI		 873static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
874 struct snd_ctl_elem_value *ucontrol)
875{
876 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
877 ucontrol->value.integer.value[0] = codec->beep->enabled;
878 return 0;
879}
e4973e1e 880
36c9db7a
TI		 881static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
882 struct snd_ctl_elem_value *ucontrol)
883{
884 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
885 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
2f2f4251
M		 886}
887
36c9db7a
TI		 888static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
889 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
890 .name = "Beep Playback Switch",
891 .info = stac_dig_beep_switch_info,
892 .get = stac_dig_beep_switch_get,
893 .put = stac_dig_beep_switch_put,
2f2f4251
M		 894};
895
36c9db7a
TI		 896static int stac_beep_switch_ctl(struct hda_codec *codec)
897{
898 struct sigmatel_spec *spec = codec->spec;
899
900 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
901 return -ENOMEM;
902 return 0;
903}
904#endif
905
42875479
TI		 906/*
907 * SPDIF-out mux controls
908 */
909
910static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
911 struct snd_ctl_elem_info *uinfo)
912{
913 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
914 struct sigmatel_spec *spec = codec->spec;
915 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
916}
917
918static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
919 struct snd_ctl_elem_value *ucontrol)
920{
921 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
922 struct sigmatel_spec *spec = codec->spec;
923 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
924
925 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
926 return 0;
927}
928
929static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
930 struct snd_ctl_elem_value *ucontrol)
931{
932 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
933 struct sigmatel_spec *spec = codec->spec;
934 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
935
936 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
937 spec->gen.autocfg.dig_out_pins[smux_idx],
938 &spec->cur_smux[smux_idx]);
939}
940
fdbf0488 941static const struct snd_kcontrol_new stac_smux_mixer = {
42875479
TI		 942 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
943 .name = "IEC958 Playback Source",
944 /* count set later */
945 .info = stac_smux_enum_info,
946 .get = stac_smux_enum_get,
947 .put = stac_smux_enum_put,
948};
949
950static const char * const stac_spdif_labels[] = {
951 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
952};
953
954static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
955{
956 struct sigmatel_spec *spec = codec->spec;
957 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
958 const char * const *labels = spec->spdif_labels;
959 struct snd_kcontrol_new *kctl;
960 int i, num_cons;
961
962 if (cfg->dig_outs < 1)
963 return 0;
964
965 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
966 if (num_cons <= 1)
967 return 0;
968
969 if (!labels)
970 labels = stac_spdif_labels;
971 for (i = 0; i < num_cons; i++) {
972 if (snd_BUG_ON(!labels[i]))
973 return -EINVAL;
6194b99d 974 snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL);
42875479
TI		 975 }
976
977 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
978 if (!kctl)
979 return -ENOMEM;
980 kctl->count = cfg->dig_outs;
981
982 return 0;
983}
984
36c9db7a
TI		 985static const struct hda_verb stac9200_eapd_init[] = {
986 /* set dac0mux for dac converter */
987 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
988 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
d39a3ae8 989 {}
58eec423
MCC		 990};
991
36c9db7a
TI		 992static const struct hda_verb dell_eq_core_init[] = {
993 /* set master volume to max value without distortion
994 * and direct control */
995 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d39a3ae8 996 {}
dfe495d0
TI		 997};
998
36c9db7a
TI		 999static const struct hda_verb stac92hd73xx_core_init[] = {
1000 /* set master volume and direct control */
1001 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d39a3ae8 1002 {}
dfe495d0
TI		 1003};
1004
36c9db7a
TI		 1005static const struct hda_verb stac92hd83xxx_core_init[] = {
1006 /* power state controls amps */
1007 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
1008 {}
1009};
1010
1011static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
1012 { 0x22, 0x785, 0x43 },
1013 { 0x22, 0x782, 0xe0 },
1014 { 0x22, 0x795, 0x00 },
1015 {}
1016};
1017
1018static const struct hda_verb stac92hd71bxx_core_init[] = {
1019 /* set master volume and direct control */
1020 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1021 {}
1022};
1023
a551d914 1024static const hda_nid_t stac92hd71bxx_unmute_nids[] = {
36c9db7a 1025 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
a551d914 1026 0x0f, 0x0a, 0x0d, 0
36c9db7a
TI		 1027};
1028
1029static const struct hda_verb stac925x_core_init[] = {
1030 /* set dac0mux for dac converter */
1031 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
1032 /* mute the master volume */
1033 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
1034 {}
1035};
1036
1037static const struct hda_verb stac922x_core_init[] = {
1038 /* set master volume and direct control */
1039 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1040 {}
1041};
1042
1043static const struct hda_verb d965_core_init[] = {
1044 /* unmute node 0x1b */
1045 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1046 /* select node 0x03 as DAC */
1047 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1048 {}
1049};
1050
1051static const struct hda_verb dell_3st_core_init[] = {
1052 /* don't set delta bit */
1053 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1054 /* unmute node 0x1b */
1055 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1056 /* select node 0x03 as DAC */
1057 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1058 {}
1059};
1060
1061static const struct hda_verb stac927x_core_init[] = {
1062 /* set master volume and direct control */
1063 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1064 /* enable analog pc beep path */
1065 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1066 {}
1067};
1068
1069static const struct hda_verb stac927x_volknob_core_init[] = {
1070 /* don't set delta bit */
1071 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1072 /* enable analog pc beep path */
1073 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1074 {}
1075};
1076
1077static const struct hda_verb stac9205_core_init[] = {
1078 /* set master volume and direct control */
1079 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1080 /* enable analog pc beep path */
1081 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1082 {}
1083};
1084
1085static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1086 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1087
1088static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1089 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1090
1091static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1092 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1093
1094static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1095 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1096
1097static const struct snd_kcontrol_new stac9205_loopback =
1098 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1099
1100static const struct snd_kcontrol_new stac927x_loopback =
1101 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1102
1103static const struct hda_pintbl ref9200_pin_configs[] = {
1104 { 0x08, 0x01c47010 },
1105 { 0x09, 0x01447010 },
1106 { 0x0d, 0x0221401f },
1107 { 0x0e, 0x01114010 },
1108 { 0x0f, 0x02a19020 },
1109 { 0x10, 0x01a19021 },
1110 { 0x11, 0x90100140 },
1111 { 0x12, 0x01813122 },
1112 {}
1113};
1114
1115static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1116 { 0x08, 0x400000fe },
1117 { 0x09, 0x404500f4 },
1118 { 0x0d, 0x400100f0 },
1119 { 0x0e, 0x90110010 },
1120 { 0x0f, 0x400100f1 },
1121 { 0x10, 0x02a1902e },
1122 { 0x11, 0x500000f2 },
1123 { 0x12, 0x500000f3 },
1124 {}
1125};
1126
1127static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1128 { 0x08, 0x400000fe },
1129 { 0x09, 0x404500f4 },
1130 { 0x0d, 0x400100f0 },
1131 { 0x0e, 0x90110010 },
1132 { 0x0f, 0x400100f1 },
1133 { 0x10, 0x02a1902e },
1134 { 0x11, 0x500000f2 },
1135 { 0x12, 0x500000f3 },
1136 {}
1137};
1138
1139/*
1140 STAC 9200 pin configs for
1141 102801A8
1142 102801DE
1143 102801E8
1144*/
1145static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1146 { 0x08, 0x400001f0 },
1147 { 0x09, 0x400001f1 },
1148 { 0x0d, 0x02214030 },
1149 { 0x0e, 0x01014010 },
1150 { 0x0f, 0x02a19020 },
1151 { 0x10, 0x01a19021 },
1152 { 0x11, 0x90100140 },
1153 { 0x12, 0x01813122 },
1154 {}
1155};
1156
1157/*
1158 STAC 9200 pin configs for
1159 102801C0
1160 102801C1
1161*/
1162static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1163 { 0x08, 0x400001f0 },
1164 { 0x09, 0x400001f1 },
1165 { 0x0d, 0x0221401f },
1166 { 0x0e, 0x01014010 },
1167 { 0x0f, 0x01813020 },
1168 { 0x10, 0x02a19021 },
1169 { 0x11, 0x90100140 },
1170 { 0x12, 0x400001f2 },
1171 {}
1172};
1173
1174/*
dfe495d0
TI		 1175 STAC 9200 pin configs for
1176 102801C4 (Dell Dimension E310)
1177 102801C5
1178 102801C7
1179 102801D9
1180 102801DA
1181 102801E3
1182*/
d39a3ae8
TI		 1183static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1184 { 0x08, 0x400001f0 },
1185 { 0x09, 0x400001f1 },
1186 { 0x0d, 0x0221401f },
1187 { 0x0e, 0x01014010 },
1188 { 0x0f, 0x01813020 },
1189 { 0x10, 0x01a19021 },
1190 { 0x11, 0x90100140 },
1191 { 0x12, 0x400001f2 },
1192 {}
dfe495d0
TI		 1193};
1194
1195
1196/*
1197 STAC 9200-32 pin configs for
1198 102801B5 (Dell Inspiron 630m)
1199 102801D8 (Dell Inspiron 640m)
1200*/
d39a3ae8
TI		 1201static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1202 { 0x08, 0x40c003fa },
1203 { 0x09, 0x03441340 },
1204 { 0x0d, 0x0321121f },
1205 { 0x0e, 0x90170310 },
1206 { 0x0f, 0x408003fb },
1207 { 0x10, 0x03a11020 },
1208 { 0x11, 0x401003fc },
1209 { 0x12, 0x403003fd },
1210 {}
dfe495d0
TI		 1211};
1212
1213/*
1214 STAC 9200-32 pin configs for
1215 102801C2 (Dell Latitude D620)
1216 102801C8
1217 102801CC (Dell Latitude D820)
1218 102801D4
1219 102801D6
1220*/
d39a3ae8
TI		 1221static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1222 { 0x08, 0x40c003fa },
1223 { 0x09, 0x0144131f },
1224 { 0x0d, 0x0321121f },
1225 { 0x0e, 0x90170310 },
1226 { 0x0f, 0x90a70321 },
1227 { 0x10, 0x03a11020 },
1228 { 0x11, 0x401003fb },
1229 { 0x12, 0x40f000fc },
1230 {}
dfe495d0
TI		 1231};
1232
1233/*
1234 STAC 9200-32 pin configs for
1235 102801CE (Dell XPS M1710)
1236 102801CF (Dell Precision M90)
1237*/
d39a3ae8
TI		 1238static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1239 { 0x08, 0x40c003fa },
1240 { 0x09, 0x01441340 },
1241 { 0x0d, 0x0421421f },
1242 { 0x0e, 0x90170310 },
1243 { 0x0f, 0x408003fb },
1244 { 0x10, 0x04a1102e },
1245 { 0x11, 0x90170311 },
1246 { 0x12, 0x403003fc },
1247 {}
dfe495d0
TI		 1248};
1249
1250/*
1251 STAC 9200-32 pin configs for
1252 102801C9
1253 102801CA
1254 102801CB (Dell Latitude 120L)
1255 102801D3
1256*/
d39a3ae8
TI		 1257static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1258 { 0x08, 0x40c003fa },
1259 { 0x09, 0x404003fb },
1260 { 0x0d, 0x0321121f },
1261 { 0x0e, 0x90170310 },
1262 { 0x0f, 0x408003fc },
1263 { 0x10, 0x03a11020 },
1264 { 0x11, 0x401003fd },
1265 { 0x12, 0x403003fe },
1266 {}
dfe495d0
TI		 1267};
1268
1269/*
1270 STAC 9200-32 pin configs for
1271 102801BD (Dell Inspiron E1505n)
1272 102801EE
1273 102801EF
1274*/
d39a3ae8
TI		 1275static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1276 { 0x08, 0x40c003fa },
1277 { 0x09, 0x01441340 },
1278 { 0x0d, 0x0421121f },
1279 { 0x0e, 0x90170310 },
1280 { 0x0f, 0x408003fb },
1281 { 0x10, 0x04a11020 },
1282 { 0x11, 0x401003fc },
1283 { 0x12, 0x403003fd },
1284 {}
dfe495d0
TI		 1285};
1286
1287/*
1288 STAC 9200-32 pin configs for
1289 102801F5 (Dell Inspiron 1501)
1290 102801F6
1291*/
d39a3ae8
TI		 1292static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1293 { 0x08, 0x40c003fa },
1294 { 0x09, 0x404003fb },
1295 { 0x0d, 0x0421121f },
1296 { 0x0e, 0x90170310 },
1297 { 0x0f, 0x408003fc },
1298 { 0x10, 0x04a11020 },
1299 { 0x11, 0x401003fd },
1300 { 0x12, 0x403003fe },
1301 {}
dfe495d0
TI		 1302};
1303
1304/*
1305 STAC 9200-32
1306 102801CD (Dell Inspiron E1705/9400)
1307*/
d39a3ae8
TI		 1308static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1309 { 0x08, 0x40c003fa },
1310 { 0x09, 0x01441340 },
1311 { 0x0d, 0x0421121f },
1312 { 0x0e, 0x90170310 },
1313 { 0x0f, 0x90170310 },
1314 { 0x10, 0x04a11020 },
1315 { 0x11, 0x90170310 },
1316 { 0x12, 0x40f003fc },
1317 {}
dfe495d0
TI		 1318};
1319
d39a3ae8
TI		 1320static const struct hda_pintbl oqo9200_pin_configs[] = {
1321 { 0x08, 0x40c000f0 },
1322 { 0x09, 0x404000f1 },
1323 { 0x0d, 0x0221121f },
1324 { 0x0e, 0x02211210 },
1325 { 0x0f, 0x90170111 },
1326 { 0x10, 0x90a70120 },
1327 { 0x11, 0x400000f2 },
1328 { 0x12, 0x400000f3 },
1329 {}
bf277785
TD		 1330};
1331
078502b5
DS		 1332/*
1333 * STAC 92HD700
1334 * 18881000 Amigaone X1000
1335 */
1336static const struct hda_pintbl nemo_pin_configs[] = {
1337 { 0x0a, 0x02214020 }, /* Front panel HP socket */
1338 { 0x0b, 0x02a19080 }, /* Front Mic */
1339 { 0x0c, 0x0181304e }, /* Line in */
1340 { 0x0d, 0x01014010 }, /* Line out */
1341 { 0x0e, 0x01a19040 }, /* Rear Mic */
1342 { 0x0f, 0x01011012 }, /* Rear speakers */
1343 { 0x10, 0x01016011 }, /* Center speaker */
1344 { 0x11, 0x01012014 }, /* Side speakers (7.1) */
1345 { 0x12, 0x103301f0 }, /* Motherboard CD line in connector */
1346 { 0x13, 0x411111f0 }, /* Unused */
1347 { 0x14, 0x411111f0 }, /* Unused */
1348 { 0x21, 0x01442170 }, /* S/PDIF line out */
1349 { 0x22, 0x411111f0 }, /* Unused */
1350 { 0x23, 0x411111f0 }, /* Unused */
1351 {}
1352};
dfe495d0 1353
d39a3ae8
TI		 1354static void stac9200_fixup_panasonic(struct hda_codec *codec,
1355 const struct hda_fixup *fix, int action)
1356{
1357 struct sigmatel_spec *spec = codec->spec;
1358
36c9db7a 1359 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
d39a3ae8
TI		 1360 spec->gpio_mask = spec->gpio_dir = 0x09;
1361 spec->gpio_data = 0x00;
d39a3ae8
TI		 1362 /* CF-74 has no headphone detection, and the driver should *NOT*
1363 * do detection and HP/speaker toggle because the hardware does it.
1364 */
36c9db7a 1365 spec->gen.suppress_auto_mute = 1;
d39a3ae8
TI		 1366 }
1367}
1368
1369
1370static const struct hda_fixup stac9200_fixups[] = {
1371 [STAC_REF] = {
1372 .type = HDA_FIXUP_PINS,
1373 .v.pins = ref9200_pin_configs,
1374 },
1375 [STAC_9200_OQO] = {
1376 .type = HDA_FIXUP_PINS,
1377 .v.pins = oqo9200_pin_configs,
1378 .chained = true,
1379 .chain_id = STAC_9200_EAPD_INIT,
1380 },
1381 [STAC_9200_DELL_D21] = {
1382 .type = HDA_FIXUP_PINS,
1383 .v.pins = dell9200_d21_pin_configs,
1384 },
1385 [STAC_9200_DELL_D22] = {
1386 .type = HDA_FIXUP_PINS,
1387 .v.pins = dell9200_d22_pin_configs,
1388 },
1389 [STAC_9200_DELL_D23] = {
1390 .type = HDA_FIXUP_PINS,
1391 .v.pins = dell9200_d23_pin_configs,
1392 },
1393 [STAC_9200_DELL_M21] = {
1394 .type = HDA_FIXUP_PINS,
1395 .v.pins = dell9200_m21_pin_configs,
1396 },
1397 [STAC_9200_DELL_M22] = {
1398 .type = HDA_FIXUP_PINS,
1399 .v.pins = dell9200_m22_pin_configs,
1400 },
1401 [STAC_9200_DELL_M23] = {
1402 .type = HDA_FIXUP_PINS,
1403 .v.pins = dell9200_m23_pin_configs,
1404 },
1405 [STAC_9200_DELL_M24] = {
1406 .type = HDA_FIXUP_PINS,
1407 .v.pins = dell9200_m24_pin_configs,
1408 },
1409 [STAC_9200_DELL_M25] = {
1410 .type = HDA_FIXUP_PINS,
1411 .v.pins = dell9200_m25_pin_configs,
1412 },
1413 [STAC_9200_DELL_M26] = {
1414 .type = HDA_FIXUP_PINS,
1415 .v.pins = dell9200_m26_pin_configs,
1416 },
1417 [STAC_9200_DELL_M27] = {
1418 .type = HDA_FIXUP_PINS,
1419 .v.pins = dell9200_m27_pin_configs,
1420 },
1421 [STAC_9200_M4] = {
1422 .type = HDA_FIXUP_PINS,
1423 .v.pins = gateway9200_m4_pin_configs,
1424 .chained = true,
1425 .chain_id = STAC_9200_EAPD_INIT,
1426 },
1427 [STAC_9200_M4_2] = {
1428 .type = HDA_FIXUP_PINS,
1429 .v.pins = gateway9200_m4_2_pin_configs,
1430 .chained = true,
1431 .chain_id = STAC_9200_EAPD_INIT,
1432 },
1433 [STAC_9200_PANASONIC] = {
1434 .type = HDA_FIXUP_FUNC,
1435 .v.func = stac9200_fixup_panasonic,
1436 },
1437 [STAC_9200_EAPD_INIT] = {
1438 .type = HDA_FIXUP_VERBS,
1439 .v.verbs = (const struct hda_verb[]) {
1440 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1441 {}
1442 },
1443 },
403d1944
MP		 1444};
1445
d39a3ae8
TI		 1446static const struct hda_model_fixup stac9200_models[] = {
1447 { .id = STAC_REF, .name = "ref" },
1448 { .id = STAC_9200_OQO, .name = "oqo" },
1449 { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1450 { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1451 { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1452 { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1453 { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1454 { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1455 { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1456 { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1457 { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1458 { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1459 { .id = STAC_9200_M4, .name = "gateway-m4" },
1460 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1461 { .id = STAC_9200_PANASONIC, .name = "panasonic" },
1462 {}
1463};
1464
1465static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
f5fcc13c
TI		 1466 /* SigmaTel reference board */
1467 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1468 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1469 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1470 "DFI LanParty", STAC_REF),
e7377071 1471 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1472 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1473 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1474 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1475 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1477 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1479 "unknown Dell", STAC_9200_DELL_D22),
1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1481 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1483 "Dell Latitude D620", STAC_9200_DELL_M22),
1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1485 "unknown Dell", STAC_9200_DELL_D23),
1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1487 "unknown Dell", STAC_9200_DELL_D23),
1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1489 "unknown Dell", STAC_9200_DELL_M22),
1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1491 "unknown Dell", STAC_9200_DELL_M24),
1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1493 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1495 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1497 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1499 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1501 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1503 "Dell Precision M90", STAC_9200_DELL_M23),
1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1505 "unknown Dell", STAC_9200_DELL_M22),
1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1507 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1509 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1511 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1513 "unknown Dell", STAC_9200_DELL_D23),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1515 "unknown Dell", STAC_9200_DELL_D23),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1517 "unknown Dell", STAC_9200_DELL_D21),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1519 "unknown Dell", STAC_9200_DELL_D23),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1521 "unknown Dell", STAC_9200_DELL_D21),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1523 "unknown Dell", STAC_9200_DELL_M25),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1525 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1527 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1529 "unknown Dell", STAC_9200_DELL_M26),
1fc2e41f
AT		 1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0201,
1531 "Dell Latitude D430", STAC_9200_DELL_M22),
49c605db 1532 /* Panasonic */
117f257d 1533 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1534 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1535 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1536 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1537 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1538 /* OQO Mobile */
1539 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1540 {} /* terminator */
1541};
1542
d2077d40
TI		 1543static const struct hda_pintbl ref925x_pin_configs[] = {
1544 { 0x07, 0x40c003f0 },
1545 { 0x08, 0x424503f2 },
1546 { 0x0a, 0x01813022 },
1547 { 0x0b, 0x02a19021 },
1548 { 0x0c, 0x90a70320 },
1549 { 0x0d, 0x02214210 },
1550 { 0x10, 0x01019020 },
1551 { 0x11, 0x9033032e },
1552 {}
8e21c34c
TD		 1553};
1554
d2077d40
TI		 1555static const struct hda_pintbl stac925xM1_pin_configs[] = {
1556 { 0x07, 0x40c003f4 },
1557 { 0x08, 0x424503f2 },
1558 { 0x0a, 0x400000f3 },
1559 { 0x0b, 0x02a19020 },
1560 { 0x0c, 0x40a000f0 },
1561 { 0x0d, 0x90100210 },
1562 { 0x10, 0x400003f1 },
1563 { 0x11, 0x9033032e },
1564 {}
8e21c34c
TD		 1565};
1566
d2077d40
TI		 1567static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1568 { 0x07, 0x40c003f4 },
1569 { 0x08, 0x424503f2 },
1570 { 0x0a, 0x400000f3 },
1571 { 0x0b, 0x02a19020 },
1572 { 0x0c, 0x40a000f0 },
1573 { 0x0d, 0x90100210 },
1574 { 0x10, 0x400003f1 },
1575 { 0x11, 0x9033032e },
1576 {}
9cb36c2a 1577};
58eec423 1578
d2077d40
TI		 1579static const struct hda_pintbl stac925xM2_pin_configs[] = {
1580 { 0x07, 0x40c003f4 },
1581 { 0x08, 0x424503f2 },
1582 { 0x0a, 0x400000f3 },
1583 { 0x0b, 0x02a19020 },
1584 { 0x0c, 0x40a000f0 },
1585 { 0x0d, 0x90100210 },
1586 { 0x10, 0x400003f1 },
1587 { 0x11, 0x9033032e },
1588 {}
2c11f955
TD		 1589};
1590
d2077d40
TI		 1591static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1592 { 0x07, 0x40c003f4 },
1593 { 0x08, 0x424503f2 },
1594 { 0x0a, 0x400000f3 },
1595 { 0x0b, 0x02a19020 },
1596 { 0x0c, 0x40a000f0 },
1597 { 0x0d, 0x90100210 },
1598 { 0x10, 0x400003f1 },
1599 { 0x11, 0x9033032e },
1600 {}
58eec423
MCC		 1601};
1602
d2077d40
TI		 1603static const struct hda_pintbl stac925xM3_pin_configs[] = {
1604 { 0x07, 0x40c003f4 },
1605 { 0x08, 0x424503f2 },
1606 { 0x0a, 0x400000f3 },
1607 { 0x0b, 0x02a19020 },
1608 { 0x0c, 0x40a000f0 },
1609 { 0x0d, 0x90100210 },
1610 { 0x10, 0x400003f1 },
1611 { 0x11, 0x503303f3 },
1612 {}
9cb36c2a 1613};
58eec423 1614
d2077d40
TI		 1615static const struct hda_pintbl stac925xM5_pin_configs[] = {
1616 { 0x07, 0x40c003f4 },
1617 { 0x08, 0x424503f2 },
1618 { 0x0a, 0x400000f3 },
1619 { 0x0b, 0x02a19020 },
1620 { 0x0c, 0x40a000f0 },
1621 { 0x0d, 0x90100210 },
1622 { 0x10, 0x400003f1 },
1623 { 0x11, 0x9033032e },
1624 {}
9cb36c2a
MCC		 1625};
1626
d2077d40
TI		 1627static const struct hda_pintbl stac925xM6_pin_configs[] = {
1628 { 0x07, 0x40c003f4 },
1629 { 0x08, 0x424503f2 },
1630 { 0x0a, 0x400000f3 },
1631 { 0x0b, 0x02a19020 },
1632 { 0x0c, 0x40a000f0 },
1633 { 0x0d, 0x90100210 },
1634 { 0x10, 0x400003f1 },
1635 { 0x11, 0x90330320 },
1636 {}
8e21c34c
TD		 1637};
1638
d2077d40
TI		 1639static const struct hda_fixup stac925x_fixups[] = {
1640 [STAC_REF] = {
1641 .type = HDA_FIXUP_PINS,
1642 .v.pins = ref925x_pin_configs,
1643 },
1644 [STAC_M1] = {
1645 .type = HDA_FIXUP_PINS,
1646 .v.pins = stac925xM1_pin_configs,
1647 },
1648 [STAC_M1_2] = {
1649 .type = HDA_FIXUP_PINS,
1650 .v.pins = stac925xM1_2_pin_configs,
1651 },
1652 [STAC_M2] = {
1653 .type = HDA_FIXUP_PINS,
1654 .v.pins = stac925xM2_pin_configs,
1655 },
1656 [STAC_M2_2] = {
1657 .type = HDA_FIXUP_PINS,
1658 .v.pins = stac925xM2_2_pin_configs,
1659 },
1660 [STAC_M3] = {
1661 .type = HDA_FIXUP_PINS,
1662 .v.pins = stac925xM3_pin_configs,
1663 },
1664 [STAC_M5] = {
1665 .type = HDA_FIXUP_PINS,
1666 .v.pins = stac925xM5_pin_configs,
1667 },
1668 [STAC_M6] = {
1669 .type = HDA_FIXUP_PINS,
1670 .v.pins = stac925xM6_pin_configs,
1671 },
8e21c34c
TD		 1672};
1673
d2077d40
TI		 1674static const struct hda_model_fixup stac925x_models[] = {
1675 { .id = STAC_REF, .name = "ref" },
1676 { .id = STAC_M1, .name = "m1" },
1677 { .id = STAC_M1_2, .name = "m1-2" },
1678 { .id = STAC_M2, .name = "m2" },
1679 { .id = STAC_M2_2, .name = "m2-2" },
1680 { .id = STAC_M3, .name = "m3" },
1681 { .id = STAC_M5, .name = "m5" },
1682 { .id = STAC_M6, .name = "m6" },
1683 {}
8e21c34c
TD		 1684};
1685
d2077d40
TI		 1686static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1687 /* SigmaTel reference board */
1688 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1689 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1690 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1691
1692 /* Default table for unknown ID */
1693 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1694
1695 /* gateway machines are checked via codec ssid */
58eec423
MCC		 1696 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1697 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1698 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1699 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1700 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1701 /* Not sure about the brand name for those */
1702 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1703 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1704 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1705 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1706 {} /* terminator */
8e21c34c
TD		 1707};
1708
55e30141 1709static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
f342ac00 1710 // Port A-H
55e30141
TI		 1711 { 0x0a, 0x02214030 },
1712 { 0x0b, 0x02a19040 },
1713 { 0x0c, 0x01a19020 },
1714 { 0x0d, 0x02214030 },
1715 { 0x0e, 0x0181302e },
1716 { 0x0f, 0x01014010 },
1717 { 0x10, 0x01014020 },
1718 { 0x11, 0x01014030 },
f342ac00 1719 // CD in
55e30141 1720 { 0x12, 0x02319040 },
f342ac00 1721 // Digial Mic ins
55e30141
TI		 1722 { 0x13, 0x90a000f0 },
1723 { 0x14, 0x90a000f0 },
f342ac00 1724 // Digital outs
55e30141
TI		 1725 { 0x22, 0x01452050 },
1726 { 0x23, 0x01452050 },
1727 {}
a7662640
MR		 1728};
1729
55e30141
TI		 1730static const struct hda_pintbl dell_m6_pin_configs[] = {
1731 { 0x0a, 0x0321101f },
1732 { 0x0b, 0x4f00000f },
1733 { 0x0c, 0x4f0000f0 },
1734 { 0x0d, 0x90170110 },
1735 { 0x0e, 0x03a11020 },
1736 { 0x0f, 0x0321101f },
1737 { 0x10, 0x4f0000f0 },
1738 { 0x11, 0x4f0000f0 },
1739 { 0x12, 0x4f0000f0 },
1740 { 0x13, 0x90a60160 },
1741 { 0x14, 0x4f0000f0 },
1742 { 0x22, 0x4f0000f0 },
1743 { 0x23, 0x4f0000f0 },
1744 {}
e1f0d669
MR		 1745};
1746
55e30141
TI		 1747static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1748 { 0x0a, 0x0321101f },
1749 { 0x0b, 0x0321101f },
1750 { 0x0c, 0x03a11020 },
1751 { 0x0d, 0x03014020 },
1752 { 0x0e, 0x90170110 },
1753 { 0x0f, 0x4f0000f0 },
1754 { 0x10, 0x4f0000f0 },
1755 { 0x11, 0x4f0000f0 },
1756 { 0x12, 0x4f0000f0 },
1757 { 0x13, 0x90a60160 },
1758 { 0x14, 0x4f0000f0 },
1759 { 0x22, 0x4f0000f0 },
1760 { 0x23, 0x904601b0 },
1761 {}
842ae638
TI		 1762};
1763
55e30141 1764static const struct hda_pintbl intel_dg45id_pin_configs[] = {
f342ac00 1765 // Analog outputs
55e30141
TI		 1766 { 0x0a, 0x02214230 },
1767 { 0x0b, 0x02A19240 },
1768 { 0x0c, 0x01013214 },
1769 { 0x0d, 0x01014210 },
1770 { 0x0e, 0x01A19250 },
1771 { 0x0f, 0x01011212 },
1772 { 0x10, 0x01016211 },
f342ac00
OB		 1773 // Digital output
1774 { 0x22, 0x01451380 },
1775 { 0x23, 0x40f000f0 },
55e30141 1776 {}
52dc4386
AF		 1777};
1778
1de7ca5e
HW		 1779static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
1780 { 0x0a, 0x02214030 },
1781 { 0x0b, 0x02A19010 },
1782 {}
1783};
1784
7440850c
HW		 1785static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = {
1786 { 0x0e, 0x400000f0 },
1787 {}
1788};
1789
55e30141
TI		 1790static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1791 const struct hda_fixup *fix, int action)
1792{
1793 struct sigmatel_spec *spec = codec->spec;
1794
1795 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1796 return;
1797
1798 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1799 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1800}
1801
1802static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1803{
1804 struct sigmatel_spec *spec = codec->spec;
1805
1806 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
55e30141
TI		 1807 spec->eapd_switch = 0;
1808}
1809
1810static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1811 const struct hda_fixup *fix, int action)
1812{
1813 struct sigmatel_spec *spec = codec->spec;
1814
1815 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1816 return;
1817
1818 stac92hd73xx_fixup_dell(codec);
1819 snd_hda_add_verbs(codec, dell_eq_core_init);
1820 spec->volknob_init = 1;
1821}
1822
1823/* Analog Mics */
1824static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1825 const struct hda_fixup *fix, int action)
1826{
55e30141
TI		 1827 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1828 return;
1829
1830 stac92hd73xx_fixup_dell(codec);
1831 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
55e30141
TI		 1832}
1833
1834/* Digital Mics */
1835static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1836 const struct hda_fixup *fix, int action)
1837{
55e30141
TI		 1838 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1839 return;
1840
1841 stac92hd73xx_fixup_dell(codec);
1842 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
55e30141
TI		 1843}
1844
1845/* Both */
1846static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1847 const struct hda_fixup *fix, int action)
1848{
55e30141
TI		 1849 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1850 return;
1851
1852 stac92hd73xx_fixup_dell(codec);
1853 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1854 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
55e30141
TI		 1855}
1856
1857static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1858 const struct hda_fixup *fix, int action)
1859{
1860 struct sigmatel_spec *spec = codec->spec;
1861
1862 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1863 return;
1864
1865 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
55e30141
TI		 1866 spec->eapd_switch = 0;
1867}
1868
1869static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1870 const struct hda_fixup *fix, int action)
1871{
36c9db7a
TI		 1872 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1873 codec->no_jack_detect = 1;
55e30141
TI		 1874}
1875
d153135e
MP		 1876
1877static void stac92hd73xx_disable_automute(struct hda_codec *codec,
1878 const struct hda_fixup *fix, int action)
1879{
1880 struct sigmatel_spec *spec = codec->spec;
1881
1882 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1883 return;
1884
1885 spec->gen.suppress_auto_mute = 1;
1886}
1887
55e30141
TI		 1888static const struct hda_fixup stac92hd73xx_fixups[] = {
1889 [STAC_92HD73XX_REF] = {
1890 .type = HDA_FIXUP_FUNC,
1891 .v.func = stac92hd73xx_fixup_ref,
1892 },
1893 [STAC_DELL_M6_AMIC] = {
1894 .type = HDA_FIXUP_FUNC,
1895 .v.func = stac92hd73xx_fixup_dell_m6_amic,
1896 },
1897 [STAC_DELL_M6_DMIC] = {
1898 .type = HDA_FIXUP_FUNC,
1899 .v.func = stac92hd73xx_fixup_dell_m6_dmic,
1900 },
1901 [STAC_DELL_M6_BOTH] = {
1902 .type = HDA_FIXUP_FUNC,
1903 .v.func = stac92hd73xx_fixup_dell_m6_both,
1904 },
1905 [STAC_DELL_EQ] = {
1906 .type = HDA_FIXUP_FUNC,
1907 .v.func = stac92hd73xx_fixup_dell_eq,
1908 },
1909 [STAC_ALIENWARE_M17X] = {
1910 .type = HDA_FIXUP_FUNC,
1911 .v.func = stac92hd73xx_fixup_alienware_m17x,
1912 },
d153135e
MP		 1913 [STAC_ELO_VUPOINT_15MX] = {
1914 .type = HDA_FIXUP_FUNC,
1915 .v.func = stac92hd73xx_disable_automute,
1916 },
55e30141
TI		 1917 [STAC_92HD73XX_INTEL] = {
1918 .type = HDA_FIXUP_PINS,
1919 .v.pins = intel_dg45id_pin_configs,
1920 },
1921 [STAC_92HD73XX_NO_JD] = {
1922 .type = HDA_FIXUP_FUNC,
1923 .v.func = stac92hd73xx_fixup_no_jd,
1de7ca5e
HW		 1924 },
1925 [STAC_92HD89XX_HP_FRONT_JACK] = {
1926 .type = HDA_FIXUP_PINS,
1927 .v.pins = stac92hd89xx_hp_front_jack_pin_configs,
7440850c
HW		 1928 },
1929 [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = {
1930 .type = HDA_FIXUP_PINS,
1931 .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs,
6426460e
TI		 1932 },
1933 [STAC_92HD73XX_ASUS_MOBO] = {
1934 .type = HDA_FIXUP_PINS,
1935 .v.pins = (const struct hda_pintbl[]) {
1936 /* enable 5.1 and SPDIF out */
1937 { 0x0c, 0x01014411 },
1938 { 0x0d, 0x01014410 },
1939 { 0x0e, 0x01014412 },
1940 { 0x22, 0x014b1180 },
1941 { }
1942 }
1943 },
e1f0d669
MR		 1944};
1945
55e30141
TI		 1946static const struct hda_model_fixup stac92hd73xx_models[] = {
1947 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1948 { .id = STAC_92HD73XX_REF, .name = "ref" },
1949 { .id = STAC_92HD73XX_INTEL, .name = "intel" },
1950 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1951 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1952 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1953 { .id = STAC_DELL_EQ, .name = "dell-eq" },
1954 { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
d153135e 1955 { .id = STAC_ELO_VUPOINT_15MX, .name = "elo-vupoint-15mx" },
6426460e 1956 { .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" },
55e30141 1957 {}
e1f0d669
MR		 1958};
1959
55e30141 1960static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
e1f0d669
MR		 1961 /* SigmaTel reference board */
1962 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1963 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1964 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1965 "DFI LanParty", STAC_92HD73XX_REF),
c17f8fd3
OB		 1966 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5001,
1967 "Intel DP45SG", STAC_92HD73XX_INTEL),
ae709440
WF		 1968 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1969 "Intel DG45ID", STAC_92HD73XX_INTEL),
1970 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1971 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1972 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1973 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1974 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1975 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1976 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1977 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1978 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1979 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1980 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1981 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1982 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1983 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1984 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1985 "unknown Dell", STAC_DELL_M6_DMIC),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1987 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1988 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1989 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1990 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1991 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI		 1992 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1993 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB		 1994 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1995 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf 1996 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
ffe535ed 1997 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
5c1bccf6 1998 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
e033ebfb 1999 "Dell Studio 1558", STAC_DELL_M6_DMIC),
55e30141 2000 /* codec SSID matching */
842ae638
TI		 2001 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
2002 "Alienware M17x", STAC_ALIENWARE_M17X),
0defe09c
DC		 2003 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
2004 "Alienware M17x", STAC_ALIENWARE_M17X),
dbd1b547 2005 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
b9ecc4ee 2006 "Alienware M17x R3", STAC_DELL_EQ),
d153135e
MP		 2007 SND_PCI_QUIRK(0x1059, 0x1011,
2008 "ELO VuPoint 15MX", STAC_ELO_VUPOINT_15MX),
7440850c
HW		 2009 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927,
2010 "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK),
1de7ca5e
HW		 2011 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
2012 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
6426460e
TI		 2013 SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10",
2014 STAC_92HD73XX_ASUS_MOBO),
842ae638
TI		 2015 {} /* terminator */
2016};
2017
372f8c75
TI		 2018static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
2019 { 0x0a, 0x02214030 },
2020 { 0x0b, 0x02211010 },
2021 { 0x0c, 0x02a19020 },
2022 { 0x0d, 0x02170130 },
2023 { 0x0e, 0x01014050 },
2024 { 0x0f, 0x01819040 },
2025 { 0x10, 0x01014020 },
2026 { 0x11, 0x90a3014e },
2027 { 0x1f, 0x01451160 },
2028 { 0x20, 0x98560170 },
2029 {}
d0513fc6
MR		 2030};
2031
372f8c75
TI		 2032static const struct hda_pintbl dell_s14_pin_configs[] = {
2033 { 0x0a, 0x0221403f },
2034 { 0x0b, 0x0221101f },
2035 { 0x0c, 0x02a19020 },
2036 { 0x0d, 0x90170110 },
2037 { 0x0e, 0x40f000f0 },
2038 { 0x0f, 0x40f000f0 },
2039 { 0x10, 0x40f000f0 },
2040 { 0x11, 0x90a60160 },
2041 { 0x1f, 0x40f000f0 },
2042 { 0x20, 0x40f000f0 },
2043 {}
8bb0ac55
MR		 2044};
2045
372f8c75
TI		 2046static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
2047 { 0x0a, 0x02a11020 },
2048 { 0x0b, 0x0221101f },
2049 { 0x0c, 0x400000f0 },
2050 { 0x0d, 0x90170110 },
2051 { 0x0e, 0x400000f1 },
2052 { 0x0f, 0x400000f2 },
2053 { 0x10, 0x400000f3 },
2054 { 0x11, 0x90a60160 },
2055 { 0x1f, 0x400000f4 },
2056 { 0x20, 0x400000f5 },
2057 {}
f7f9bdfa
JW		 2058};
2059
372f8c75
TI		 2060static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
2061 { 0x0a, 0x03a12050 },
2062 { 0x0b, 0x0321201f },
2063 { 0x0c, 0x40f000f0 },
2064 { 0x0d, 0x90170110 },
2065 { 0x0e, 0x40f000f0 },
2066 { 0x0f, 0x40f000f0 },
2067 { 0x10, 0x90170110 },
2068 { 0x11, 0xd5a30140 },
2069 { 0x1f, 0x40f000f0 },
2070 { 0x20, 0x40f000f0 },
2071 {}
48315590
SE		 2072};
2073
372f8c75
TI		 2074static const struct hda_pintbl hp_zephyr_pin_configs[] = {
2075 { 0x0a, 0x01813050 },
2076 { 0x0b, 0x0421201f },
2077 { 0x0c, 0x04a1205e },
2078 { 0x0d, 0x96130310 },
2079 { 0x0e, 0x96130310 },
2080 { 0x0f, 0x0101401f },
2081 { 0x10, 0x1111611f },
2082 { 0x11, 0xd5a30130 },
2083 {}
5556e147
VK		 2084};
2085
372f8c75
TI		 2086static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
2087 { 0x0a, 0x40f000f0 },
2088 { 0x0b, 0x0221101f },
2089 { 0x0c, 0x02a11020 },
2090 { 0x0d, 0x92170110 },
2091 { 0x0e, 0x40f000f0 },
2092 { 0x0f, 0x92170110 },
2093 { 0x10, 0x40f000f0 },
2094 { 0x11, 0xd5a30130 },
2095 { 0x1f, 0x40f000f0 },
2096 { 0x20, 0x40f000f0 },
2097 {}
0c27c180
VK		 2098};
2099
372f8c75
TI		 2100static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
2101 const struct hda_fixup *fix, int action)
2102{
2103 struct sigmatel_spec *spec = codec->spec;
2104
2105 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2106 return;
2107
2108 if (hp_bnb2011_with_dock(codec)) {
2109 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
2110 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
2111 }
2112
2113 if (find_mute_led_cfg(codec, spec->default_polarity))
4e76a883 2114 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
372f8c75
TI		 2115 spec->gpio_led,
2116 spec->gpio_led_polarity);
e8b99a1d
TI		 2117
2118 /* allow auto-switching of dock line-in */
2119 spec->gen.line_in_auto_switch = true;
372f8c75
TI		 2120}
2121
2122static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
2123 const struct hda_fixup *fix, int action)
2124{
2125 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2126 return;
2127
2128 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
2129 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
2130}
2131
2132static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
2133 const struct hda_fixup *fix, int action)
2134{
2135 struct sigmatel_spec *spec = codec->spec;
2136
2137 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2138 spec->default_polarity = 0;
2139}
2140
2141static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
2142 const struct hda_fixup *fix, int action)
2143{
2144 struct sigmatel_spec *spec = codec->spec;
2145
2146 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2147 spec->default_polarity = 1;
2148}
2149
2150static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
2151 const struct hda_fixup *fix, int action)
2152{
2153 struct sigmatel_spec *spec = codec->spec;
2154
95f74c41 2155 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
372f8c75 2156 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
873ce8ad 2157 /* resetting controller clears GPIO, so we need to keep on */
7639a06c 2158 codec->core.power_caps &= ~AC_PWRST_CLKSTOP;
95f74c41 2159 }
372f8c75
TI		 2160}
2161
37c367ec
TI		 2162static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
2163 const struct hda_fixup *fix, int action)
2164{
2165 struct sigmatel_spec *spec = codec->spec;
2166
2167 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2168 spec->gpio_led = 0x10; /* GPIO4 */
2169 spec->default_polarity = 0;
2170 }
2171}
2172
372f8c75
TI		 2173static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
2174 const struct hda_fixup *fix, int action)
2175{
2176 struct sigmatel_spec *spec = codec->spec;
2177
2178 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2179 spec->headset_jack = 1;
2180}
2181
4227de2a
TI		 2182static void stac92hd83xxx_fixup_gpio10_eapd(struct hda_codec *codec,
2183 const struct hda_fixup *fix,
2184 int action)
2185{
2186 struct sigmatel_spec *spec = codec->spec;
2187
2188 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2189 return;
2190 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir =
2191 spec->gpio_data = 0x10;
2192 spec->eapd_switch = 0;
2193}
2194
6ab42ff4
HW		 2195static void hp_envy_ts_fixup_dac_bind(struct hda_codec *codec,
2196 const struct hda_fixup *fix,
2197 int action)
2198{
2199 struct sigmatel_spec *spec = codec->spec;
caf3c043 2200 static const hda_nid_t preferred_pairs[] = {
6ab42ff4
HW		 2201 0xd, 0x13,
2202 0
2203 };
2204
2205 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2206 return;
2207
2208 spec->gen.preferred_dacs = preferred_pairs;
2209}
2210
d009f3de
VK		 2211static const struct hda_verb hp_bnb13_eq_verbs[] = {
2212 /* 44.1KHz base */
2213 { 0x22, 0x7A6, 0x3E },
2214 { 0x22, 0x7A7, 0x68 },
2215 { 0x22, 0x7A8, 0x17 },
2216 { 0x22, 0x7A9, 0x3E },
2217 { 0x22, 0x7AA, 0x68 },
2218 { 0x22, 0x7AB, 0x17 },
2219 { 0x22, 0x7AC, 0x00 },
2220 { 0x22, 0x7AD, 0x80 },
2221 { 0x22, 0x7A6, 0x83 },
2222 { 0x22, 0x7A7, 0x2F },
2223 { 0x22, 0x7A8, 0xD1 },
2224 { 0x22, 0x7A9, 0x83 },
2225 { 0x22, 0x7AA, 0x2F },
2226 { 0x22, 0x7AB, 0xD1 },
2227 { 0x22, 0x7AC, 0x01 },
2228 { 0x22, 0x7AD, 0x80 },
2229 { 0x22, 0x7A6, 0x3E },
2230 { 0x22, 0x7A7, 0x68 },
2231 { 0x22, 0x7A8, 0x17 },
2232 { 0x22, 0x7A9, 0x3E },
2233 { 0x22, 0x7AA, 0x68 },
2234 { 0x22, 0x7AB, 0x17 },
2235 { 0x22, 0x7AC, 0x02 },
2236 { 0x22, 0x7AD, 0x80 },
2237 { 0x22, 0x7A6, 0x7C },
2238 { 0x22, 0x7A7, 0xC6 },
2239 { 0x22, 0x7A8, 0x0C },
2240 { 0x22, 0x7A9, 0x7C },
2241 { 0x22, 0x7AA, 0xC6 },
2242 { 0x22, 0x7AB, 0x0C },
2243 { 0x22, 0x7AC, 0x03 },
2244 { 0x22, 0x7AD, 0x80 },
2245 { 0x22, 0x7A6, 0xC3 },
2246 { 0x22, 0x7A7, 0x25 },
2247 { 0x22, 0x7A8, 0xAF },
2248 { 0x22, 0x7A9, 0xC3 },
2249 { 0x22, 0x7AA, 0x25 },
2250 { 0x22, 0x7AB, 0xAF },
2251 { 0x22, 0x7AC, 0x04 },
2252 { 0x22, 0x7AD, 0x80 },
2253 { 0x22, 0x7A6, 0x3E },
2254 { 0x22, 0x7A7, 0x85 },
2255 { 0x22, 0x7A8, 0x73 },
2256 { 0x22, 0x7A9, 0x3E },
2257 { 0x22, 0x7AA, 0x85 },
2258 { 0x22, 0x7AB, 0x73 },
2259 { 0x22, 0x7AC, 0x05 },
2260 { 0x22, 0x7AD, 0x80 },
2261 { 0x22, 0x7A6, 0x85 },
2262 { 0x22, 0x7A7, 0x39 },
2263 { 0x22, 0x7A8, 0xC7 },
2264 { 0x22, 0x7A9, 0x85 },
2265 { 0x22, 0x7AA, 0x39 },
2266 { 0x22, 0x7AB, 0xC7 },
2267 { 0x22, 0x7AC, 0x06 },
2268 { 0x22, 0x7AD, 0x80 },
2269 { 0x22, 0x7A6, 0x3C },
2270 { 0x22, 0x7A7, 0x90 },
2271 { 0x22, 0x7A8, 0xB0 },
2272 { 0x22, 0x7A9, 0x3C },
2273 { 0x22, 0x7AA, 0x90 },
2274 { 0x22, 0x7AB, 0xB0 },
2275 { 0x22, 0x7AC, 0x07 },
2276 { 0x22, 0x7AD, 0x80 },
2277 { 0x22, 0x7A6, 0x7A },
2278 { 0x22, 0x7A7, 0xC6 },
2279 { 0x22, 0x7A8, 0x39 },
2280 { 0x22, 0x7A9, 0x7A },
2281 { 0x22, 0x7AA, 0xC6 },
2282 { 0x22, 0x7AB, 0x39 },
2283 { 0x22, 0x7AC, 0x08 },
2284 { 0x22, 0x7AD, 0x80 },
2285 { 0x22, 0x7A6, 0xC4 },
2286 { 0x22, 0x7A7, 0xE9 },
2287 { 0x22, 0x7A8, 0xDC },
2288 { 0x22, 0x7A9, 0xC4 },
2289 { 0x22, 0x7AA, 0xE9 },
2290 { 0x22, 0x7AB, 0xDC },
2291 { 0x22, 0x7AC, 0x09 },
2292 { 0x22, 0x7AD, 0x80 },
2293 { 0x22, 0x7A6, 0x3D },
2294 { 0x22, 0x7A7, 0xE1 },
2295 { 0x22, 0x7A8, 0x0D },
2296 { 0x22, 0x7A9, 0x3D },
2297 { 0x22, 0x7AA, 0xE1 },
2298 { 0x22, 0x7AB, 0x0D },
2299 { 0x22, 0x7AC, 0x0A },
2300 { 0x22, 0x7AD, 0x80 },
2301 { 0x22, 0x7A6, 0x89 },
2302 { 0x22, 0x7A7, 0xB6 },
2303 { 0x22, 0x7A8, 0xEB },
2304 { 0x22, 0x7A9, 0x89 },
2305 { 0x22, 0x7AA, 0xB6 },
2306 { 0x22, 0x7AB, 0xEB },
2307 { 0x22, 0x7AC, 0x0B },
2308 { 0x22, 0x7AD, 0x80 },
2309 { 0x22, 0x7A6, 0x39 },
2310 { 0x22, 0x7A7, 0x9D },
2311 { 0x22, 0x7A8, 0xFE },
2312 { 0x22, 0x7A9, 0x39 },
2313 { 0x22, 0x7AA, 0x9D },
2314 { 0x22, 0x7AB, 0xFE },
2315 { 0x22, 0x7AC, 0x0C },
2316 { 0x22, 0x7AD, 0x80 },
2317 { 0x22, 0x7A6, 0x76 },
2318 { 0x22, 0x7A7, 0x49 },
2319 { 0x22, 0x7A8, 0x15 },
2320 { 0x22, 0x7A9, 0x76 },
2321 { 0x22, 0x7AA, 0x49 },
2322 { 0x22, 0x7AB, 0x15 },
2323 { 0x22, 0x7AC, 0x0D },
2324 { 0x22, 0x7AD, 0x80 },
2325 { 0x22, 0x7A6, 0xC8 },
2326 { 0x22, 0x7A7, 0x80 },
2327 { 0x22, 0x7A8, 0xF5 },
2328 { 0x22, 0x7A9, 0xC8 },
2329 { 0x22, 0x7AA, 0x80 },
2330 { 0x22, 0x7AB, 0xF5 },
2331 { 0x22, 0x7AC, 0x0E },
2332 { 0x22, 0x7AD, 0x80 },
2333 { 0x22, 0x7A6, 0x40 },
2334 { 0x22, 0x7A7, 0x00 },
2335 { 0x22, 0x7A8, 0x00 },
2336 { 0x22, 0x7A9, 0x40 },
2337 { 0x22, 0x7AA, 0x00 },
2338 { 0x22, 0x7AB, 0x00 },
2339 { 0x22, 0x7AC, 0x0F },
2340 { 0x22, 0x7AD, 0x80 },
2341 { 0x22, 0x7A6, 0x90 },
2342 { 0x22, 0x7A7, 0x68 },
2343 { 0x22, 0x7A8, 0xF1 },
2344 { 0x22, 0x7A9, 0x90 },
2345 { 0x22, 0x7AA, 0x68 },
2346 { 0x22, 0x7AB, 0xF1 },
2347 { 0x22, 0x7AC, 0x10 },
2348 { 0x22, 0x7AD, 0x80 },
2349 { 0x22, 0x7A6, 0x34 },
2350 { 0x22, 0x7A7, 0x47 },
2351 { 0x22, 0x7A8, 0x6C },
2352 { 0x22, 0x7A9, 0x34 },
2353 { 0x22, 0x7AA, 0x47 },
2354 { 0x22, 0x7AB, 0x6C },
2355 { 0x22, 0x7AC, 0x11 },
2356 { 0x22, 0x7AD, 0x80 },
2357 { 0x22, 0x7A6, 0x6F },
2358 { 0x22, 0x7A7, 0x97 },
2359 { 0x22, 0x7A8, 0x0F },
2360 { 0x22, 0x7A9, 0x6F },
2361 { 0x22, 0x7AA, 0x97 },
2362 { 0x22, 0x7AB, 0x0F },
2363 { 0x22, 0x7AC, 0x12 },
2364 { 0x22, 0x7AD, 0x80 },
2365 { 0x22, 0x7A6, 0xCB },
2366 { 0x22, 0x7A7, 0xB8 },
2367 { 0x22, 0x7A8, 0x94 },
2368 { 0x22, 0x7A9, 0xCB },
2369 { 0x22, 0x7AA, 0xB8 },
2370 { 0x22, 0x7AB, 0x94 },
2371 { 0x22, 0x7AC, 0x13 },
2372 { 0x22, 0x7AD, 0x80 },
2373 { 0x22, 0x7A6, 0x40 },
2374 { 0x22, 0x7A7, 0x00 },
2375 { 0x22, 0x7A8, 0x00 },
2376 { 0x22, 0x7A9, 0x40 },
2377 { 0x22, 0x7AA, 0x00 },
2378 { 0x22, 0x7AB, 0x00 },
2379 { 0x22, 0x7AC, 0x14 },
2380 { 0x22, 0x7AD, 0x80 },
2381 { 0x22, 0x7A6, 0x95 },
2382 { 0x22, 0x7A7, 0x76 },
2383 { 0x22, 0x7A8, 0x5B },
2384 { 0x22, 0x7A9, 0x95 },
2385 { 0x22, 0x7AA, 0x76 },
2386 { 0x22, 0x7AB, 0x5B },
2387 { 0x22, 0x7AC, 0x15 },
2388 { 0x22, 0x7AD, 0x80 },
2389 { 0x22, 0x7A6, 0x31 },
2390 { 0x22, 0x7A7, 0xAC },
2391 { 0x22, 0x7A8, 0x31 },
2392 { 0x22, 0x7A9, 0x31 },
2393 { 0x22, 0x7AA, 0xAC },
2394 { 0x22, 0x7AB, 0x31 },
2395 { 0x22, 0x7AC, 0x16 },
2396 { 0x22, 0x7AD, 0x80 },
2397 { 0x22, 0x7A6, 0x6A },
2398 { 0x22, 0x7A7, 0x89 },
2399 { 0x22, 0x7A8, 0xA5 },
2400 { 0x22, 0x7A9, 0x6A },
2401 { 0x22, 0x7AA, 0x89 },
2402 { 0x22, 0x7AB, 0xA5 },
2403 { 0x22, 0x7AC, 0x17 },
2404 { 0x22, 0x7AD, 0x80 },
2405 { 0x22, 0x7A6, 0xCE },
2406 { 0x22, 0x7A7, 0x53 },
2407 { 0x22, 0x7A8, 0xCF },
2408 { 0x22, 0x7A9, 0xCE },
2409 { 0x22, 0x7AA, 0x53 },
2410 { 0x22, 0x7AB, 0xCF },
2411 { 0x22, 0x7AC, 0x18 },
2412 { 0x22, 0x7AD, 0x80 },
2413 { 0x22, 0x7A6, 0x40 },
2414 { 0x22, 0x7A7, 0x00 },
2415 { 0x22, 0x7A8, 0x00 },
2416 { 0x22, 0x7A9, 0x40 },
2417 { 0x22, 0x7AA, 0x00 },
2418 { 0x22, 0x7AB, 0x00 },
2419 { 0x22, 0x7AC, 0x19 },
2420 { 0x22, 0x7AD, 0x80 },
2421 /* 48KHz base */
2422 { 0x22, 0x7A6, 0x3E },
2423 { 0x22, 0x7A7, 0x88 },
2424 { 0x22, 0x7A8, 0xDC },
2425 { 0x22, 0x7A9, 0x3E },
2426 { 0x22, 0x7AA, 0x88 },
2427 { 0x22, 0x7AB, 0xDC },
2428 { 0x22, 0x7AC, 0x1A },
2429 { 0x22, 0x7AD, 0x80 },
2430 { 0x22, 0x7A6, 0x82 },
2431 { 0x22, 0x7A7, 0xEE },
2432 { 0x22, 0x7A8, 0x46 },
2433 { 0x22, 0x7A9, 0x82 },
2434 { 0x22, 0x7AA, 0xEE },
2435 { 0x22, 0x7AB, 0x46 },
2436 { 0x22, 0x7AC, 0x1B },
2437 { 0x22, 0x7AD, 0x80 },
2438 { 0x22, 0x7A6, 0x3E },
2439 { 0x22, 0x7A7, 0x88 },
2440 { 0x22, 0x7A8, 0xDC },
2441 { 0x22, 0x7A9, 0x3E },
2442 { 0x22, 0x7AA, 0x88 },
2443 { 0x22, 0x7AB, 0xDC },
2444 { 0x22, 0x7AC, 0x1C },
2445 { 0x22, 0x7AD, 0x80 },
2446 { 0x22, 0x7A6, 0x7D },
2447 { 0x22, 0x7A7, 0x09 },
2448 { 0x22, 0x7A8, 0x28 },
2449 { 0x22, 0x7A9, 0x7D },
2450 { 0x22, 0x7AA, 0x09 },
2451 { 0x22, 0x7AB, 0x28 },
2452 { 0x22, 0x7AC, 0x1D },
2453 { 0x22, 0x7AD, 0x80 },
2454 { 0x22, 0x7A6, 0xC2 },
2455 { 0x22, 0x7A7, 0xE5 },
2456 { 0x22, 0x7A8, 0xB4 },
2457 { 0x22, 0x7A9, 0xC2 },
2458 { 0x22, 0x7AA, 0xE5 },
2459 { 0x22, 0x7AB, 0xB4 },
2460 { 0x22, 0x7AC, 0x1E },
2461 { 0x22, 0x7AD, 0x80 },
2462 { 0x22, 0x7A6, 0x3E },
2463 { 0x22, 0x7A7, 0xA3 },
2464 { 0x22, 0x7A8, 0x1F },
2465 { 0x22, 0x7A9, 0x3E },
2466 { 0x22, 0x7AA, 0xA3 },
2467 { 0x22, 0x7AB, 0x1F },
2468 { 0x22, 0x7AC, 0x1F },
2469 { 0x22, 0x7AD, 0x80 },
2470 { 0x22, 0x7A6, 0x84 },
2471 { 0x22, 0x7A7, 0xCA },
2472 { 0x22, 0x7A8, 0xF1 },
2473 { 0x22, 0x7A9, 0x84 },
2474 { 0x22, 0x7AA, 0xCA },
2475 { 0x22, 0x7AB, 0xF1 },
2476 { 0x22, 0x7AC, 0x20 },
2477 { 0x22, 0x7AD, 0x80 },
2478 { 0x22, 0x7A6, 0x3C },
2479 { 0x22, 0x7A7, 0xD5 },
2480 { 0x22, 0x7A8, 0x9C },
2481 { 0x22, 0x7A9, 0x3C },
2482 { 0x22, 0x7AA, 0xD5 },
2483 { 0x22, 0x7AB, 0x9C },
2484 { 0x22, 0x7AC, 0x21 },
2485 { 0x22, 0x7AD, 0x80 },
2486 { 0x22, 0x7A6, 0x7B },
2487 { 0x22, 0x7A7, 0x35 },
2488 { 0x22, 0x7A8, 0x0F },
2489 { 0x22, 0x7A9, 0x7B },
2490 { 0x22, 0x7AA, 0x35 },
2491 { 0x22, 0x7AB, 0x0F },
2492 { 0x22, 0x7AC, 0x22 },
2493 { 0x22, 0x7AD, 0x80 },
2494 { 0x22, 0x7A6, 0xC4 },
2495 { 0x22, 0x7A7, 0x87 },
2496 { 0x22, 0x7A8, 0x45 },
2497 { 0x22, 0x7A9, 0xC4 },
2498 { 0x22, 0x7AA, 0x87 },
2499 { 0x22, 0x7AB, 0x45 },
2500 { 0x22, 0x7AC, 0x23 },
2501 { 0x22, 0x7AD, 0x80 },
2502 { 0x22, 0x7A6, 0x3E },
2503 { 0x22, 0x7A7, 0x0A },
2504 { 0x22, 0x7A8, 0x78 },
2505 { 0x22, 0x7A9, 0x3E },
2506 { 0x22, 0x7AA, 0x0A },
2507 { 0x22, 0x7AB, 0x78 },
2508 { 0x22, 0x7AC, 0x24 },
2509 { 0x22, 0x7AD, 0x80 },
2510 { 0x22, 0x7A6, 0x88 },
2511 { 0x22, 0x7A7, 0xE2 },
2512 { 0x22, 0x7A8, 0x05 },
2513 { 0x22, 0x7A9, 0x88 },
2514 { 0x22, 0x7AA, 0xE2 },
2515 { 0x22, 0x7AB, 0x05 },
2516 { 0x22, 0x7AC, 0x25 },
2517 { 0x22, 0x7AD, 0x80 },
2518 { 0x22, 0x7A6, 0x3A },
2519 { 0x22, 0x7A7, 0x1A },
2520 { 0x22, 0x7A8, 0xA3 },
2521 { 0x22, 0x7A9, 0x3A },
2522 { 0x22, 0x7AA, 0x1A },
2523 { 0x22, 0x7AB, 0xA3 },
2524 { 0x22, 0x7AC, 0x26 },
2525 { 0x22, 0x7AD, 0x80 },
2526 { 0x22, 0x7A6, 0x77 },
2527 { 0x22, 0x7A7, 0x1D },
2528 { 0x22, 0x7A8, 0xFB },
2529 { 0x22, 0x7A9, 0x77 },
2530 { 0x22, 0x7AA, 0x1D },
2531 { 0x22, 0x7AB, 0xFB },
2532 { 0x22, 0x7AC, 0x27 },
2533 { 0x22, 0x7AD, 0x80 },
2534 { 0x22, 0x7A6, 0xC7 },
2535 { 0x22, 0x7A7, 0xDA },
2536 { 0x22, 0x7A8, 0xE5 },
2537 { 0x22, 0x7A9, 0xC7 },
2538 { 0x22, 0x7AA, 0xDA },
2539 { 0x22, 0x7AB, 0xE5 },
2540 { 0x22, 0x7AC, 0x28 },
2541 { 0x22, 0x7AD, 0x80 },
2542 { 0x22, 0x7A6, 0x40 },
2543 { 0x22, 0x7A7, 0x00 },
2544 { 0x22, 0x7A8, 0x00 },
2545 { 0x22, 0x7A9, 0x40 },
2546 { 0x22, 0x7AA, 0x00 },
2547 { 0x22, 0x7AB, 0x00 },
2548 { 0x22, 0x7AC, 0x29 },
2549 { 0x22, 0x7AD, 0x80 },
2550 { 0x22, 0x7A6, 0x8E },
2551 { 0x22, 0x7A7, 0xD7 },
2552 { 0x22, 0x7A8, 0x22 },
2553 { 0x22, 0x7A9, 0x8E },
2554 { 0x22, 0x7AA, 0xD7 },
2555 { 0x22, 0x7AB, 0x22 },
2556 { 0x22, 0x7AC, 0x2A },
2557 { 0x22, 0x7AD, 0x80 },
2558 { 0x22, 0x7A6, 0x35 },
2559 { 0x22, 0x7A7, 0x26 },
2560 { 0x22, 0x7A8, 0xC6 },
2561 { 0x22, 0x7A9, 0x35 },
2562 { 0x22, 0x7AA, 0x26 },
2563 { 0x22, 0x7AB, 0xC6 },
2564 { 0x22, 0x7AC, 0x2B },
2565 { 0x22, 0x7AD, 0x80 },
2566 { 0x22, 0x7A6, 0x71 },
2567 { 0x22, 0x7A7, 0x28 },
2568 { 0x22, 0x7A8, 0xDE },
2569 { 0x22, 0x7A9, 0x71 },
2570 { 0x22, 0x7AA, 0x28 },
2571 { 0x22, 0x7AB, 0xDE },
2572 { 0x22, 0x7AC, 0x2C },
2573 { 0x22, 0x7AD, 0x80 },
2574 { 0x22, 0x7A6, 0xCA },
2575 { 0x22, 0x7A7, 0xD9 },
2576 { 0x22, 0x7A8, 0x3A },
2577 { 0x22, 0x7A9, 0xCA },
2578 { 0x22, 0x7AA, 0xD9 },
2579 { 0x22, 0x7AB, 0x3A },
2580 { 0x22, 0x7AC, 0x2D },
2581 { 0x22, 0x7AD, 0x80 },
2582 { 0x22, 0x7A6, 0x40 },
2583 { 0x22, 0x7A7, 0x00 },
2584 { 0x22, 0x7A8, 0x00 },
2585 { 0x22, 0x7A9, 0x40 },
2586 { 0x22, 0x7AA, 0x00 },
2587 { 0x22, 0x7AB, 0x00 },
2588 { 0x22, 0x7AC, 0x2E },
2589 { 0x22, 0x7AD, 0x80 },
2590 { 0x22, 0x7A6, 0x93 },
2591 { 0x22, 0x7A7, 0x5E },
2592 { 0x22, 0x7A8, 0xD8 },
2593 { 0x22, 0x7A9, 0x93 },
2594 { 0x22, 0x7AA, 0x5E },
2595 { 0x22, 0x7AB, 0xD8 },
2596 { 0x22, 0x7AC, 0x2F },
2597 { 0x22, 0x7AD, 0x80 },
2598 { 0x22, 0x7A6, 0x32 },
2599 { 0x22, 0x7A7, 0xB7 },
2600 { 0x22, 0x7A8, 0xB1 },
2601 { 0x22, 0x7A9, 0x32 },
2602 { 0x22, 0x7AA, 0xB7 },
2603 { 0x22, 0x7AB, 0xB1 },
2604 { 0x22, 0x7AC, 0x30 },
2605 { 0x22, 0x7AD, 0x80 },
2606 { 0x22, 0x7A6, 0x6C },
2607 { 0x22, 0x7A7, 0xA1 },
2608 { 0x22, 0x7A8, 0x28 },
2609 { 0x22, 0x7A9, 0x6C },
2610 { 0x22, 0x7AA, 0xA1 },
2611 { 0x22, 0x7AB, 0x28 },
2612 { 0x22, 0x7AC, 0x31 },
2613 { 0x22, 0x7AD, 0x80 },
2614 { 0x22, 0x7A6, 0xCD },
2615 { 0x22, 0x7A7, 0x48 },
2616 { 0x22, 0x7A8, 0x4F },
2617 { 0x22, 0x7A9, 0xCD },
2618 { 0x22, 0x7AA, 0x48 },
2619 { 0x22, 0x7AB, 0x4F },
2620 { 0x22, 0x7AC, 0x32 },
2621 { 0x22, 0x7AD, 0x80 },
2622 { 0x22, 0x7A6, 0x40 },
2623 { 0x22, 0x7A7, 0x00 },
2624 { 0x22, 0x7A8, 0x00 },
2625 { 0x22, 0x7A9, 0x40 },
2626 { 0x22, 0x7AA, 0x00 },
2627 { 0x22, 0x7AB, 0x00 },
2628 { 0x22, 0x7AC, 0x33 },
2629 { 0x22, 0x7AD, 0x80 },
2630 /* common */
2631 { 0x22, 0x782, 0xC1 },
2632 { 0x22, 0x771, 0x2C },
2633 { 0x22, 0x772, 0x2C },
2634 { 0x22, 0x788, 0x04 },
2635 { 0x01, 0x7B0, 0x08 },
2636 {}
2637};
2638
372f8c75
TI		 2639static const struct hda_fixup stac92hd83xxx_fixups[] = {
2640 [STAC_92HD83XXX_REF] = {
2641 .type = HDA_FIXUP_PINS,
2642 .v.pins = ref92hd83xxx_pin_configs,
2643 },
2644 [STAC_92HD83XXX_PWR_REF] = {
2645 .type = HDA_FIXUP_PINS,
2646 .v.pins = ref92hd83xxx_pin_configs,
2647 },
2648 [STAC_DELL_S14] = {
2649 .type = HDA_FIXUP_PINS,
2650 .v.pins = dell_s14_pin_configs,
2651 },
2652 [STAC_DELL_VOSTRO_3500] = {
2653 .type = HDA_FIXUP_PINS,
2654 .v.pins = dell_vostro_3500_pin_configs,
2655 },
2656 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2657 .type = HDA_FIXUP_PINS,
2658 .v.pins = hp_cNB11_intquad_pin_configs,
2659 .chained = true,
2660 .chain_id = STAC_92HD83XXX_HP,
2661 },
2662 [STAC_92HD83XXX_HP] = {
2663 .type = HDA_FIXUP_FUNC,
2664 .v.func = stac92hd83xxx_fixup_hp,
2665 },
2666 [STAC_HP_DV7_4000] = {
2667 .type = HDA_FIXUP_PINS,
2668 .v.pins = hp_dv7_4000_pin_configs,
2669 .chained = true,
2670 .chain_id = STAC_92HD83XXX_HP,
2671 },
2672 [STAC_HP_ZEPHYR] = {
2673 .type = HDA_FIXUP_FUNC,
2674 .v.func = stac92hd83xxx_fixup_hp_zephyr,
2675 .chained = true,
2676 .chain_id = STAC_92HD83XXX_HP,
2677 },
2678 [STAC_92HD83XXX_HP_LED] = {
2679 .type = HDA_FIXUP_FUNC,
2680 .v.func = stac92hd83xxx_fixup_hp_led,
2681 .chained = true,
2682 .chain_id = STAC_92HD83XXX_HP,
2683 },
2684 [STAC_92HD83XXX_HP_INV_LED] = {
2685 .type = HDA_FIXUP_FUNC,
2686 .v.func = stac92hd83xxx_fixup_hp_inv_led,
2687 .chained = true,
2688 .chain_id = STAC_92HD83XXX_HP,
2689 },
2690 [STAC_92HD83XXX_HP_MIC_LED] = {
2691 .type = HDA_FIXUP_FUNC,
2692 .v.func = stac92hd83xxx_fixup_hp_mic_led,
2693 .chained = true,
2694 .chain_id = STAC_92HD83XXX_HP,
2695 },
37c367ec
TI		 2696 [STAC_HP_LED_GPIO10] = {
2697 .type = HDA_FIXUP_FUNC,
2698 .v.func = stac92hd83xxx_fixup_hp_led_gpio10,
2699 .chained = true,
2700 .chain_id = STAC_92HD83XXX_HP,
2701 },
372f8c75
TI		 2702 [STAC_92HD83XXX_HEADSET_JACK] = {
2703 .type = HDA_FIXUP_FUNC,
2704 .v.func = stac92hd83xxx_fixup_headset_jack,
2705 },
49920427
TI		 2706 [STAC_HP_ENVY_BASS] = {
2707 .type = HDA_FIXUP_PINS,
2708 .v.pins = (const struct hda_pintbl[]) {
2709 { 0x0f, 0x90170111 },
2710 {}
2711 },
2712 },
d009f3de
VK		 2713 [STAC_HP_BNB13_EQ] = {
2714 .type = HDA_FIXUP_VERBS,
2715 .v.verbs = hp_bnb13_eq_verbs,
2716 .chained = true,
2717 .chain_id = STAC_92HD83XXX_HP_MIC_LED,
2718 },
8695a003
TI		 2719 [STAC_HP_ENVY_TS_BASS] = {
2720 .type = HDA_FIXUP_PINS,
2721 .v.pins = (const struct hda_pintbl[]) {
2722 { 0x10, 0x92170111 },
2723 {}
2724 },
2725 },
6ab42ff4
HW		 2726 [STAC_HP_ENVY_TS_DAC_BIND] = {
2727 .type = HDA_FIXUP_FUNC,
2728 .v.func = hp_envy_ts_fixup_dac_bind,
2729 .chained = true,
2730 .chain_id = STAC_HP_ENVY_TS_BASS,
2731 },
4227de2a
TI		 2732 [STAC_92HD83XXX_GPIO10_EAPD] = {
2733 .type = HDA_FIXUP_FUNC,
2734 .v.func = stac92hd83xxx_fixup_gpio10_eapd,
2735 },
d0513fc6
MR		 2736};
2737
372f8c75
TI		 2738static const struct hda_model_fixup stac92hd83xxx_models[] = {
2739 { .id = STAC_92HD83XXX_REF, .name = "ref" },
2740 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2741 { .id = STAC_DELL_S14, .name = "dell-s14" },
2742 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2743 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2744 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2745 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2746 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2747 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2748 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2749 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
49920427 2750 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
d009f3de 2751 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
8695a003 2752 { .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" },
372f8c75 2753 {}
d0513fc6
MR		 2754};
2755
372f8c75 2756static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
d0513fc6
MR		 2757 /* SigmaTel reference board */
2758 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 2759 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 2760 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2761 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR		 2762 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2763 "unknown Dell", STAC_DELL_S14),
8d032a8f
DH		 2764 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2765 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2766 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2767 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2769 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2771 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2773 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2774 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2775 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2777 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2778 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2779 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2780 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2781 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
f7f9bdfa
JW		 2782 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2783 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
0c27c180
VK		 2784 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2785 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2786 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2787 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2788 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2789 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2790 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
8ae5865e 2791 "HP Pavilion dv7", STAC_HP_DV7_4000),
0c27c180
VK		 2792 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2793 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2794 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2795 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
49920427
TI		 2796 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2797 "HP Envy Spectre", STAC_HP_ENVY_BASS),
37c367ec
TI		 2798 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
2799 "HP Folio 13", STAC_HP_LED_GPIO10),
62cbde18 2800 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
d009f3de
VK		 2801 "HP Folio", STAC_HP_BNB13_EQ),
2802 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
2803 "HP bNB13", STAC_HP_BNB13_EQ),
2804 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
2805 "HP bNB13", STAC_HP_BNB13_EQ),
2806 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
2807 "HP bNB13", STAC_HP_BNB13_EQ),
8695a003
TI		 2808 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e,
2809 "HP ENVY TS", STAC_HP_ENVY_TS_BASS),
6ab42ff4
HW		 2810 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1967,
2811 "HP ENVY TS", STAC_HP_ENVY_TS_DAC_BIND),
d009f3de
VK		 2812 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
2813 "HP bNB13", STAC_HP_BNB13_EQ),
2814 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
2815 "HP bNB13", STAC_HP_BNB13_EQ),
2816 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
2817 "HP bNB13", STAC_HP_BNB13_EQ),
2818 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
2819 "HP bNB13", STAC_HP_BNB13_EQ),
2820 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
2821 "HP bNB13", STAC_HP_BNB13_EQ),
2822 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
2823 "HP bNB13", STAC_HP_BNB13_EQ),
2824 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
2825 "HP bNB13", STAC_HP_BNB13_EQ),
2826 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
2827 "HP bNB13", STAC_HP_BNB13_EQ),
2828 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
2829 "HP bNB13", STAC_HP_BNB13_EQ),
2830 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
2831 "HP bNB13", STAC_HP_BNB13_EQ),
2832 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
2833 "HP bNB13", STAC_HP_BNB13_EQ),
2834 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
2835 "HP bNB13", STAC_HP_BNB13_EQ),
2836 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
2837 "HP bNB13", STAC_HP_BNB13_EQ),
2838 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
2839 "HP bNB13", STAC_HP_BNB13_EQ),
2840 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
2841 "HP bNB13", STAC_HP_BNB13_EQ),
2842 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
2843 "HP bNB13", STAC_HP_BNB13_EQ),
2844 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
2845 "HP bNB13", STAC_HP_BNB13_EQ),
2846 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
2847 "HP bNB13", STAC_HP_BNB13_EQ),
2848 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
2849 "HP bNB13", STAC_HP_BNB13_EQ),
2850 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
2851 "HP bNB13", STAC_HP_BNB13_EQ),
2852 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
2853 "HP bNB13", STAC_HP_BNB13_EQ),
2854 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
2855 "HP bNB13", STAC_HP_BNB13_EQ),
2856 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
2857 "HP bNB13", STAC_HP_BNB13_EQ),
2858 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
2859 "HP bNB13", STAC_HP_BNB13_EQ),
2860 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
2861 "HP bNB13", STAC_HP_BNB13_EQ),
2862 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
2863 "HP bNB13", STAC_HP_BNB13_EQ),
2864 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
2865 "HP bNB13", STAC_HP_BNB13_EQ),
2866 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
2867 "HP bNB13", STAC_HP_BNB13_EQ),
2868 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
2869 "HP bNB13", STAC_HP_BNB13_EQ),
2870 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
2871 "HP bNB13", STAC_HP_BNB13_EQ),
2872 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
2873 "HP bNB13", STAC_HP_BNB13_EQ),
2874 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
2875 "HP bNB13", STAC_HP_BNB13_EQ),
2876 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
2877 "HP bNB13", STAC_HP_BNB13_EQ),
2878 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
2879 "HP bNB13", STAC_HP_BNB13_EQ),
2880 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
2881 "HP bNB13", STAC_HP_BNB13_EQ),
2882 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
2883 "HP bNB13", STAC_HP_BNB13_EQ),
2884 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
2885 "HP bNB13", STAC_HP_BNB13_EQ),
2886 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
2887 "HP bNB13", STAC_HP_BNB13_EQ),
2888 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
2889 "HP bNB13", STAC_HP_BNB13_EQ),
2890 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
2891 "HP bNB13", STAC_HP_BNB13_EQ),
2892 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
2893 "HP bNB13", STAC_HP_BNB13_EQ),
2894 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
2895 "HP bNB13", STAC_HP_BNB13_EQ),
2896 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
2897 "HP bNB13", STAC_HP_BNB13_EQ),
2898 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
2899 "HP bNB13", STAC_HP_BNB13_EQ),
f9afed1f
TI		 2900 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
2901 "HP", STAC_92HD83XXX_HP_MIC_LED),
4059a42c
TI		 2902 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
2903 "HP", STAC_92HD83XXX_HP_MIC_LED),
2904 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
2905 "HP", STAC_92HD83XXX_HP_MIC_LED),
0c27c180
VK		 2906 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2907 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2908 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2909 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2910 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2911 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2912 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2913 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2914 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2915 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2916 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2917 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2918 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2919 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2920 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2921 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2922 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2923 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2924 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2925 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2926 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2927 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2928 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2929 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2930 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2931 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2932 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2933 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
5556e147
VK		 2934 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2935 "HP", STAC_HP_ZEPHYR),
a3e19973
TI		 2936 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2937 "HP Mini", STAC_92HD83XXX_HP_LED),
5afc13af
GMDV		 2938 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2939 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
8c698fe2
TI		 2940 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2941 "HP Mini", STAC_92HD83XXX_HP_LED),
372f8c75 2942 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
b9d9c9ef
TI		 2943 /* match both for 0xfa91 and 0xfa93 */
2944 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_TOSHIBA, 0xfffd, 0xfa91,
4227de2a 2945 "Toshiba Satellite S50D", STAC_92HD83XXX_GPIO10_EAPD),
574f3c4f 2946 {} /* terminator */
d0513fc6
MR		 2947};
2948
36c9db7a
TI		 2949/* HP dv7 bass switch - GPIO5 */
2950#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
2951static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2952 struct snd_ctl_elem_value *ucontrol)
2953{
2954 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2955 struct sigmatel_spec *spec = codec->spec;
2956 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2957 return 0;
2958}
2959
2960static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2961 struct snd_ctl_elem_value *ucontrol)
2962{
2963 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2964 struct sigmatel_spec *spec = codec->spec;
2965 unsigned int gpio_data;
2966
2967 gpio_data = (spec->gpio_data & ~0x20) |
2968 (ucontrol->value.integer.value[0] ? 0x20 : 0);
2969 if (gpio_data == spec->gpio_data)
2970 return 0;
2971 spec->gpio_data = gpio_data;
2972 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2973 return 1;
2974}
2975
2976static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2977 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2978 .info = stac_hp_bass_gpio_info,
2979 .get = stac_hp_bass_gpio_get,
2980 .put = stac_hp_bass_gpio_put,
2981};
2982
2983static int stac_add_hp_bass_switch(struct hda_codec *codec)
2984{
2985 struct sigmatel_spec *spec = codec->spec;
2986
2987 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2988 &stac_hp_bass_sw_ctrl))
2989 return -ENOMEM;
2990
2991 spec->gpio_mask |= 0x20;
2992 spec->gpio_dir |= 0x20;
2993 spec->gpio_data |= 0x20;
2994 return 0;
2995}
2996
0f6fcb73
TI		 2997static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
2998 { 0x0a, 0x02214030 },
2999 { 0x0b, 0x02a19040 },
3000 { 0x0c, 0x01a19020 },
3001 { 0x0d, 0x01014010 },
3002 { 0x0e, 0x0181302e },
3003 { 0x0f, 0x01014010 },
3004 { 0x14, 0x01019020 },
3005 { 0x18, 0x90a000f0 },
3006 { 0x19, 0x90a000f0 },
3007 { 0x1e, 0x01452050 },
3008 { 0x1f, 0x01452050 },
3009 {}
e035b841
MR		 3010};
3011
0f6fcb73
TI		 3012static const struct hda_pintbl dell_m4_1_pin_configs[] = {
3013 { 0x0a, 0x0421101f },
3014 { 0x0b, 0x04a11221 },
3015 { 0x0c, 0x40f000f0 },
3016 { 0x0d, 0x90170110 },
3017 { 0x0e, 0x23a1902e },
3018 { 0x0f, 0x23014250 },
3019 { 0x14, 0x40f000f0 },
3020 { 0x18, 0x90a000f0 },
3021 { 0x19, 0x40f000f0 },
3022 { 0x1e, 0x4f0000f0 },
3023 { 0x1f, 0x4f0000f0 },
3024 {}
a7662640
MR		 3025};
3026
0f6fcb73
TI		 3027static const struct hda_pintbl dell_m4_2_pin_configs[] = {
3028 { 0x0a, 0x0421101f },
3029 { 0x0b, 0x04a11221 },
3030 { 0x0c, 0x90a70330 },
3031 { 0x0d, 0x90170110 },
3032 { 0x0e, 0x23a1902e },
3033 { 0x0f, 0x23014250 },
3034 { 0x14, 0x40f000f0 },
3035 { 0x18, 0x40f000f0 },
3036 { 0x19, 0x40f000f0 },
3037 { 0x1e, 0x044413b0 },
3038 { 0x1f, 0x044413b0 },
3039 {}
a7662640
MR		 3040};
3041
0f6fcb73
TI		 3042static const struct hda_pintbl dell_m4_3_pin_configs[] = {
3043 { 0x0a, 0x0421101f },
3044 { 0x0b, 0x04a11221 },
3045 { 0x0c, 0x90a70330 },
3046 { 0x0d, 0x90170110 },
3047 { 0x0e, 0x40f000f0 },
3048 { 0x0f, 0x40f000f0 },
3049 { 0x14, 0x40f000f0 },
3050 { 0x18, 0x90a000f0 },
3051 { 0x19, 0x40f000f0 },
3052 { 0x1e, 0x044413b0 },
3053 { 0x1f, 0x044413b0 },
3054 {}
3a7abfd2
MR		 3055};
3056
0f6fcb73
TI		 3057static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
3058 const struct hda_fixup *fix, int action)
3059{
3060 struct sigmatel_spec *spec = codec->spec;
3061
3062 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3063 return;
3064
3065 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
3066 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
3067}
3068
0f6fcb73
TI		 3069static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
3070 const struct hda_fixup *fix, int action)
3071{
3072 struct sigmatel_spec *spec = codec->spec;
1a4f69d5 3073 struct hda_jack_callback *jack;
0f6fcb73
TI		 3074
3075 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3076 return;
3077
3078 /* Enable VREF power saving on GPIO1 detect */
7639a06c 3079 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
0f6fcb73 3080 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
7639a06c 3081 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
bda17b82
TI		 3082 stac_vref_event);
3083 if (!IS_ERR(jack))
36c9db7a
TI		 3084 jack->private_data = 0x02;
3085
0f6fcb73
TI		 3086 spec->gpio_mask |= 0x02;
3087
3088 /* enable internal microphone */
3089 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
0f6fcb73
TI		 3090}
3091
3092static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
3093 const struct hda_fixup *fix, int action)
3094{
3095 struct sigmatel_spec *spec = codec->spec;
3096
3097 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3098 return;
3099 spec->gpio_led = 0x01;
3100}
3101
3102static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
3103 const struct hda_fixup *fix, int action)
3104{
0f6fcb73
TI		 3105 unsigned int cap;
3106
3107 switch (action) {
3108 case HDA_FIXUP_ACT_PRE_PROBE:
3109 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
f6655d52
TI		 3110 break;
3111
3112 case HDA_FIXUP_ACT_PROBE:
0f6fcb73
TI		 3113 /* enable bass on HP dv7 */
3114 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
3115 cap &= AC_GPIO_IO_COUNT;
3116 if (cap >= 6)
3117 stac_add_hp_bass_switch(codec);
3118 break;
3119 }
3120}
3121
3122static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
3123 const struct hda_fixup *fix, int action)
3124{
3125 struct sigmatel_spec *spec = codec->spec;
3126
3127 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3128 return;
3129 spec->gpio_led = 0x08;
0f6fcb73
TI		 3130}
3131
196543d5
TI		 3132static bool is_hp_output(struct hda_codec *codec, hda_nid_t pin)
3133{
3134 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
3135
3136 /* count line-out, too, as BIOS sets often so */
3137 return get_defcfg_connect(pin_cfg) != AC_JACK_PORT_NONE &&
3138 (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
3139 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT);
3140}
3141
3142static void fixup_hp_headphone(struct hda_codec *codec, hda_nid_t pin)
3143{
3144 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
3145
3146 /* It was changed in the BIOS to just satisfy MS DTM.
9ab0cb30 3147 * Lets turn it back into follower HP
196543d5
TI		 3148 */
3149 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) |
3150 (AC_JACK_HP_OUT << AC_DEFCFG_DEVICE_SHIFT);
3151 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC | AC_DEFCFG_SEQUENCE))) |
3152 0x1f;
3153 snd_hda_codec_set_pincfg(codec, pin, pin_cfg);
3154}
0f6fcb73
TI		 3155
3156static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
3157 const struct hda_fixup *fix, int action)
3158{
3159 struct sigmatel_spec *spec = codec->spec;
3160
3161 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3162 return;
3163
196543d5
TI		 3164 /* when both output A and F are assigned, these are supposedly
3165 * dock and built-in headphones; fix both pin configs
3166 */
3167 if (is_hp_output(codec, 0x0a) && is_hp_output(codec, 0x0f)) {
3168 fixup_hp_headphone(codec, 0x0a);
3169 fixup_hp_headphone(codec, 0x0f);
0f6fcb73
TI		 3170 }
3171
36c9db7a 3172 if (find_mute_led_cfg(codec, 1))
4e76a883 3173 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
0f6fcb73
TI		 3174 spec->gpio_led,
3175 spec->gpio_led_polarity);
3176
3177}
3178
3179static const struct hda_fixup stac92hd71bxx_fixups[] = {
3180 [STAC_92HD71BXX_REF] = {
3181 .type = HDA_FIXUP_FUNC,
3182 .v.func = stac92hd71bxx_fixup_ref,
3183 },
3184 [STAC_DELL_M4_1] = {
3185 .type = HDA_FIXUP_PINS,
3186 .v.pins = dell_m4_1_pin_configs,
0f6fcb73
TI		 3187 },
3188 [STAC_DELL_M4_2] = {
3189 .type = HDA_FIXUP_PINS,
3190 .v.pins = dell_m4_2_pin_configs,
0f6fcb73
TI		 3191 },
3192 [STAC_DELL_M4_3] = {
3193 .type = HDA_FIXUP_PINS,
3194 .v.pins = dell_m4_3_pin_configs,
0f6fcb73
TI		 3195 },
3196 [STAC_HP_M4] = {
3197 .type = HDA_FIXUP_FUNC,
3198 .v.func = stac92hd71bxx_fixup_hp_m4,
3199 .chained = true,
3200 .chain_id = STAC_92HD71BXX_HP,
3201 },
3202 [STAC_HP_DV4] = {
3203 .type = HDA_FIXUP_FUNC,
3204 .v.func = stac92hd71bxx_fixup_hp_dv4,
3205 .chained = true,
3206 .chain_id = STAC_HP_DV5,
3207 },
3208 [STAC_HP_DV5] = {
3209 .type = HDA_FIXUP_FUNC,
3210 .v.func = stac92hd71bxx_fixup_hp_dv5,
3211 .chained = true,
3212 .chain_id = STAC_92HD71BXX_HP,
3213 },
3214 [STAC_HP_HDX] = {
3215 .type = HDA_FIXUP_FUNC,
3216 .v.func = stac92hd71bxx_fixup_hp_hdx,
3217 .chained = true,
3218 .chain_id = STAC_92HD71BXX_HP,
3219 },
36c9db7a 3220 [STAC_92HD71BXX_HP] = {
0f6fcb73 3221 .type = HDA_FIXUP_FUNC,
36c9db7a 3222 .v.func = stac92hd71bxx_fixup_hp,
0f6fcb73 3223 },
e035b841
MR		 3224};
3225
0f6fcb73
TI		 3226static const struct hda_model_fixup stac92hd71bxx_models[] = {
3227 { .id = STAC_92HD71BXX_REF, .name = "ref" },
3228 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
3229 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
3230 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
3231 { .id = STAC_HP_M4, .name = "hp-m4" },
3232 { .id = STAC_HP_DV4, .name = "hp-dv4" },
3233 { .id = STAC_HP_DV5, .name = "hp-dv5" },
3234 { .id = STAC_HP_HDX, .name = "hp-hdx" },
36c9db7a 3235 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
0f6fcb73 3236 {}
e035b841
MR		 3237};
3238
0f6fcb73 3239static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
e035b841
MR		 3240 /* SigmaTel reference board */
3241 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3242 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 3243 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3244 "DFI LanParty", STAC_92HD71BXX_REF),
5bdaaada
VK		 3245 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
3246 "HP", STAC_HP_DV5),
58d8395b
TI		 3247 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
3248 "HP", STAC_HP_DV5),
2ae466f8 3249 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 3250 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI		 3251 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
3252 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI		 3253 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
3254 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 3255 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 3256 "HP mini 1000", STAC_HP_M4),
ae6241fb 3257 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 3258 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI		 3259 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
3260 "HP dv6", STAC_HP_DV5),
e3d2530a
KG		 3261 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
3262 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY		 3263 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
3264 "HP DV6", STAC_HP_DV5),
1972d025
TI		 3265 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
3266 "HP", STAC_HP_DV5),
0f6fcb73 3267 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
a7662640
MR		 3268 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
3269 "unknown Dell", STAC_DELL_M4_1),
3270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
3271 "unknown Dell", STAC_DELL_M4_1),
3272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
3273 "unknown Dell", STAC_DELL_M4_1),
3274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
3275 "unknown Dell", STAC_DELL_M4_1),
3276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
3277 "unknown Dell", STAC_DELL_M4_1),
3278 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
3279 "unknown Dell", STAC_DELL_M4_1),
3280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
3281 "unknown Dell", STAC_DELL_M4_1),
3282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
3283 "unknown Dell", STAC_DELL_M4_2),
3284 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
3285 "unknown Dell", STAC_DELL_M4_2),
3286 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
3287 "unknown Dell", STAC_DELL_M4_2),
3288 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
3289 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 3290 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
3291 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 3292 {} /* terminator */
3293};
3294
0a427846
TI		 3295static const struct hda_pintbl ref922x_pin_configs[] = {
3296 { 0x0a, 0x01014010 },
3297 { 0x0b, 0x01016011 },
3298 { 0x0c, 0x01012012 },
3299 { 0x0d, 0x0221401f },
3300 { 0x0e, 0x01813122 },
3301 { 0x0f, 0x01011014 },
3302 { 0x10, 0x01441030 },
3303 { 0x11, 0x01c41030 },
3304 { 0x15, 0x40000100 },
3305 { 0x1b, 0x40000100 },
3306 {}
2f2f4251
M		 3307};
3308
dfe495d0
TI		 3309/*
3310 STAC 922X pin configs for
3311 102801A7
3312 102801AB
3313 102801A9
3314 102801D1
3315 102801D2
3316*/
0a427846
TI		 3317static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
3318 { 0x0a, 0x02214030 },
3319 { 0x0b, 0x01a19021 },
3320 { 0x0c, 0x01111012 },
3321 { 0x0d, 0x01114010 },
3322 { 0x0e, 0x02a19020 },
3323 { 0x0f, 0x01117011 },
3324 { 0x10, 0x400001f0 },
3325 { 0x11, 0x400001f1 },
3326 { 0x15, 0x01813122 },
3327 { 0x1b, 0x400001f2 },
3328 {}
dfe495d0
TI		 3329};
3330
3331/*
3332 STAC 922X pin configs for
3333 102801AC
3334 102801D0
3335*/
0a427846
TI		 3336static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
3337 { 0x0a, 0x02214030 },
3338 { 0x0b, 0x01a19021 },
3339 { 0x0c, 0x01111012 },
3340 { 0x0d, 0x01114010 },
3341 { 0x0e, 0x02a19020 },
3342 { 0x0f, 0x01117011 },
3343 { 0x10, 0x01451140 },
3344 { 0x11, 0x400001f0 },
3345 { 0x15, 0x01813122 },
3346 { 0x1b, 0x400001f1 },
3347 {}
dfe495d0
TI		 3348};
3349
3350/*
3351 STAC 922X pin configs for
3352 102801BF
3353*/
0a427846
TI		 3354static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
3355 { 0x0a, 0x0321101f },
3356 { 0x0b, 0x01112024 },
3357 { 0x0c, 0x01111222 },
3358 { 0x0d, 0x91174220 },
3359 { 0x0e, 0x03a11050 },
3360 { 0x0f, 0x01116221 },
3361 { 0x10, 0x90a70330 },
3362 { 0x11, 0x01452340 },
3363 { 0x15, 0x40C003f1 },
3364 { 0x1b, 0x405003f0 },
3365 {}
dfe495d0
TI		 3366};
3367
3368/*
3369 STAC 9221 A1 pin configs for
3370 102801D7 (Dell XPS M1210)
3371*/
0a427846
TI		 3372static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
3373 { 0x0a, 0x02211211 },
3374 { 0x0b, 0x408103ff },
3375 { 0x0c, 0x02a1123e },
3376 { 0x0d, 0x90100310 },
3377 { 0x0e, 0x408003f1 },
3378 { 0x0f, 0x0221121f },
3379 { 0x10, 0x03451340 },
3380 { 0x11, 0x40c003f2 },
3381 { 0x15, 0x508003f3 },
3382 { 0x1b, 0x405003f4 },
3383 {}
dfe495d0
TI		 3384};
3385
0a427846
TI		 3386static const struct hda_pintbl d945gtp3_pin_configs[] = {
3387 { 0x0a, 0x0221401f },
3388 { 0x0b, 0x01a19022 },
3389 { 0x0c, 0x01813021 },
3390 { 0x0d, 0x01014010 },
3391 { 0x0e, 0x40000100 },
3392 { 0x0f, 0x40000100 },
3393 { 0x10, 0x40000100 },
3394 { 0x11, 0x40000100 },
3395 { 0x15, 0x02a19120 },
3396 { 0x1b, 0x40000100 },
3397 {}
3398};
3399
3400static const struct hda_pintbl d945gtp5_pin_configs[] = {
3401 { 0x0a, 0x0221401f },
3402 { 0x0b, 0x01011012 },
3403 { 0x0c, 0x01813024 },
3404 { 0x0d, 0x01014010 },
3405 { 0x0e, 0x01a19021 },
3406 { 0x0f, 0x01016011 },
3407 { 0x10, 0x01452130 },
3408 { 0x11, 0x40000100 },
3409 { 0x15, 0x02a19320 },
3410 { 0x1b, 0x40000100 },
3411 {}
403d1944
MP		 3412};
3413
0a427846
TI		 3414static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
3415 { 0x0a, 0x0121e21f },
3416 { 0x0b, 0x400000ff },
3417 { 0x0c, 0x9017e110 },
3418 { 0x0d, 0x400000fd },
3419 { 0x0e, 0x400000fe },
3420 { 0x0f, 0x0181e020 },
3421 { 0x10, 0x1145e030 },
3422 { 0x11, 0x11c5e240 },
3423 { 0x15, 0x400000fc },
3424 { 0x1b, 0x400000fb },
3425 {}
403d1944
MP		 3426};
3427
0a427846
TI		 3428static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
3429 { 0x0a, 0x0121e21f },
3430 { 0x0b, 0x90a7012e },
3431 { 0x0c, 0x9017e110 },
3432 { 0x0d, 0x400000fd },
3433 { 0x0e, 0x400000fe },
3434 { 0x0f, 0x0181e020 },
3435 { 0x10, 0x1145e230 },
3436 { 0x11, 0x500000fa },
3437 { 0x15, 0x400000fc },
3438 { 0x1b, 0x400000fb },
3439 {}
5d5d3bc3
IZ		 3440};
3441
0a427846
TI		 3442static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
3443 { 0x0a, 0x0121e21f },
3444 { 0x0b, 0x90a7012e },
3445 { 0x0c, 0x9017e110 },
3446 { 0x0d, 0x400000fd },
3447 { 0x0e, 0x400000fe },
3448 { 0x0f, 0x0181e020 },
3449 { 0x10, 0x1145e230 },
3450 { 0x11, 0x11c5e240 },
3451 { 0x15, 0x400000fc },
3452 { 0x1b, 0x400000fb },
3453 {}
6f0778d8
NB		 3454};
3455
0a427846
TI		 3456static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
3457 { 0x0a, 0x0321e21f },
3458 { 0x0b, 0x03a1e02e },
3459 { 0x0c, 0x9017e110 },
3460 { 0x0d, 0x9017e11f },
3461 { 0x0e, 0x400000fe },
3462 { 0x0f, 0x0381e020 },
3463 { 0x10, 0x1345e230 },
3464 { 0x11, 0x13c5e240 },
3465 { 0x15, 0x400000fc },
3466 { 0x1b, 0x400000fb },
3467 {}
3fc24d85
TI		 3468};
3469
0a427846
TI		 3470static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
3471 { 0x0a, 0x0321e21f },
3472 { 0x0b, 0x03a1e02e },
3473 { 0x0c, 0x9017e110 },
3474 { 0x0d, 0x9017e11f },
3475 { 0x0e, 0x400000fe },
3476 { 0x0f, 0x0381e020 },
3477 { 0x10, 0x1345e230 },
3478 { 0x11, 0x13c5e240 },
3479 { 0x15, 0x400000fc },
3480 { 0x1b, 0x400000fb },
3481 {}
f16928fb
SF		 3482};
3483
0a427846
TI		 3484static const struct hda_pintbl ecs202_pin_configs[] = {
3485 { 0x0a, 0x0221401f },
3486 { 0x0b, 0x02a19020 },
3487 { 0x0c, 0x01a19020 },
3488 { 0x0d, 0x01114010 },
3489 { 0x0e, 0x408000f0 },
3490 { 0x0f, 0x01813022 },
3491 { 0x10, 0x074510a0 },
3492 { 0x11, 0x40c400f1 },
3493 { 0x15, 0x9037012e },
3494 { 0x1b, 0x40e000f2 },
3495 {}
0dae0f83
TI		 3496};
3497
0a427846
TI		 3498/* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
3499static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
697aebab 3500 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
0a427846
TI		 3501 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
3502 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
3503 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
3504 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
3505 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
3506 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
3507 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
3508 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
3509 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
3510 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
3511 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
3512 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
3513 {}
8c650087 3514};
76c08828 3515
0a427846
TI		 3516static const struct hda_fixup stac922x_fixups[];
3517
3518/* remap the fixup from codec SSID and apply it */
3519static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
3520 const struct hda_fixup *fix,
3521 int action)
3522{
3523 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3524 return;
f5662e1c
DH		 3525
3526 codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
0a427846
TI		 3527 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
3528 stac922x_fixups);
f5662e1c 3529 if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET)
0a427846
TI		 3530 snd_hda_apply_fixup(codec, action);
3531}
3532
3533static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
3534 const struct hda_fixup *fix,
3535 int action)
3536{
3537 struct sigmatel_spec *spec = codec->spec;
3538
3539 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3540 spec->gpio_mask = spec->gpio_dir = 0x03;
3541 spec->gpio_data = 0x03;
3542 }
3543}
3544
3545static const struct hda_fixup stac922x_fixups[] = {
3546 [STAC_D945_REF] = {
3547 .type = HDA_FIXUP_PINS,
3548 .v.pins = ref922x_pin_configs,
3549 },
3550 [STAC_D945GTP3] = {
3551 .type = HDA_FIXUP_PINS,
3552 .v.pins = d945gtp3_pin_configs,
3553 },
3554 [STAC_D945GTP5] = {
3555 .type = HDA_FIXUP_PINS,
3556 .v.pins = d945gtp5_pin_configs,
3557 },
3558 [STAC_INTEL_MAC_AUTO] = {
3559 .type = HDA_FIXUP_FUNC,
3560 .v.func = stac922x_fixup_intel_mac_auto,
3561 },
3562 [STAC_INTEL_MAC_V1] = {
3563 .type = HDA_FIXUP_PINS,
3564 .v.pins = intel_mac_v1_pin_configs,
3565 .chained = true,
3566 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3567 },
3568 [STAC_INTEL_MAC_V2] = {
3569 .type = HDA_FIXUP_PINS,
3570 .v.pins = intel_mac_v2_pin_configs,
3571 .chained = true,
3572 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3573 },
3574 [STAC_INTEL_MAC_V3] = {
3575 .type = HDA_FIXUP_PINS,
3576 .v.pins = intel_mac_v3_pin_configs,
3577 .chained = true,
3578 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3579 },
3580 [STAC_INTEL_MAC_V4] = {
3581 .type = HDA_FIXUP_PINS,
3582 .v.pins = intel_mac_v4_pin_configs,
3583 .chained = true,
3584 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3585 },
3586 [STAC_INTEL_MAC_V5] = {
3587 .type = HDA_FIXUP_PINS,
3588 .v.pins = intel_mac_v5_pin_configs,
3589 .chained = true,
3590 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3591 },
3592 [STAC_922X_INTEL_MAC_GPIO] = {
3593 .type = HDA_FIXUP_FUNC,
3594 .v.func = stac922x_fixup_intel_mac_gpio,
3595 },
3596 [STAC_ECS_202] = {
3597 .type = HDA_FIXUP_PINS,
3598 .v.pins = ecs202_pin_configs,
3599 },
3600 [STAC_922X_DELL_D81] = {
3601 .type = HDA_FIXUP_PINS,
3602 .v.pins = dell_922x_d81_pin_configs,
3603 },
3604 [STAC_922X_DELL_D82] = {
3605 .type = HDA_FIXUP_PINS,
3606 .v.pins = dell_922x_d82_pin_configs,
3607 },
3608 [STAC_922X_DELL_M81] = {
3609 .type = HDA_FIXUP_PINS,
3610 .v.pins = dell_922x_m81_pin_configs,
3611 },
3612 [STAC_922X_DELL_M82] = {
3613 .type = HDA_FIXUP_PINS,
3614 .v.pins = dell_922x_m82_pin_configs,
3615 },
3616};
3617
3618static const struct hda_model_fixup stac922x_models[] = {
3619 { .id = STAC_D945_REF, .name = "ref" },
3620 { .id = STAC_D945GTP5, .name = "5stack" },
3621 { .id = STAC_D945GTP3, .name = "3stack" },
3622 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
3623 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
3624 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
3625 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
3626 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
3627 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
3628 { .id = STAC_ECS_202, .name = "ecs202" },
3629 { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
3630 { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
3631 { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
3632 { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
dfe495d0 3633 /* for backward compatibility */
0a427846
TI		 3634 { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
3635 { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
3636 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
3637 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
3638 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
3639 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
3640 {}
3641};
3642
3643static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
f5fcc13c
TI		 3644 /* SigmaTel reference board */
3645 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3646 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 3647 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3648 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 3649 /* Intel 945G based systems */
3650 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
3651 "Intel D945G", STAC_D945GTP3),
3652 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
3653 "Intel D945G", STAC_D945GTP3),
3654 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
3655 "Intel D945G", STAC_D945GTP3),
3656 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
3657 "Intel D945G", STAC_D945GTP3),
3658 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
3659 "Intel D945G", STAC_D945GTP3),
3660 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
3661 "Intel D945G", STAC_D945GTP3),
3662 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
3663 "Intel D945G", STAC_D945GTP3),
3664 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
3665 "Intel D945G", STAC_D945GTP3),
3666 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
3667 "Intel D945G", STAC_D945GTP3),
3668 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
3669 "Intel D945G", STAC_D945GTP3),
3670 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
3671 "Intel D945G", STAC_D945GTP3),
3672 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
3673 "Intel D945G", STAC_D945GTP3),
3674 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
3675 "Intel D945G", STAC_D945GTP3),
3676 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
3677 "Intel D945G", STAC_D945GTP3),
3678 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
3679 "Intel D945G", STAC_D945GTP3),
3680 /* Intel D945G 5-stack systems */
3681 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
3682 "Intel D945G", STAC_D945GTP5),
3683 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
3684 "Intel D945G", STAC_D945GTP5),
3685 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
3686 "Intel D945G", STAC_D945GTP5),
3687 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
3688 "Intel D945G", STAC_D945GTP5),
3689 /* Intel 945P based systems */
3690 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
3691 "Intel D945P", STAC_D945GTP3),
3692 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
3693 "Intel D945P", STAC_D945GTP3),
3694 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
3695 "Intel D945P", STAC_D945GTP3),
3696 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
3697 "Intel D945P", STAC_D945GTP3),
3698 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
3699 "Intel D945P", STAC_D945GTP3),
3700 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
3701 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 3702 /* other intel */
3703 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
3704 "Intel D945", STAC_D945_REF),
f5fcc13c 3705 /* other systems */
0a427846 3706
536319af 3707 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
0a427846
TI		 3708 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
3709
dfe495d0
TI		 3710 /* Dell systems */
3711 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
3712 "unknown Dell", STAC_922X_DELL_D81),
3713 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
3714 "unknown Dell", STAC_922X_DELL_D81),
3715 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
3716 "unknown Dell", STAC_922X_DELL_D81),
3717 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
3718 "unknown Dell", STAC_922X_DELL_D82),
3719 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
3720 "unknown Dell", STAC_922X_DELL_M81),
3721 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
3722 "unknown Dell", STAC_922X_DELL_D82),
3723 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
3724 "unknown Dell", STAC_922X_DELL_D81),
3725 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
3726 "unknown Dell", STAC_922X_DELL_D81),
3727 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
3728 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 3729 /* ECS/PC Chips boards */
dea0a509 3730 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 3731 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 3732 {} /* terminator */
3733};
3734
29ac8363
TI		 3735static const struct hda_pintbl ref927x_pin_configs[] = {
3736 { 0x0a, 0x02214020 },
3737 { 0x0b, 0x02a19080 },
3738 { 0x0c, 0x0181304e },
3739 { 0x0d, 0x01014010 },
3740 { 0x0e, 0x01a19040 },
3741 { 0x0f, 0x01011012 },
3742 { 0x10, 0x01016011 },
3743 { 0x11, 0x0101201f },
3744 { 0x12, 0x183301f0 },
3745 { 0x13, 0x18a001f0 },
3746 { 0x14, 0x18a001f0 },
3747 { 0x21, 0x01442070 },
3748 { 0x22, 0x01c42190 },
3749 { 0x23, 0x40000100 },
3750 {}
3cc08dc6
MP		 3751};
3752
29ac8363
TI		 3753static const struct hda_pintbl d965_3st_pin_configs[] = {
3754 { 0x0a, 0x0221401f },
3755 { 0x0b, 0x02a19120 },
3756 { 0x0c, 0x40000100 },
3757 { 0x0d, 0x01014011 },
3758 { 0x0e, 0x01a19021 },
3759 { 0x0f, 0x01813024 },
3760 { 0x10, 0x40000100 },
3761 { 0x11, 0x40000100 },
3762 { 0x12, 0x40000100 },
3763 { 0x13, 0x40000100 },
3764 { 0x14, 0x40000100 },
3765 { 0x21, 0x40000100 },
3766 { 0x22, 0x40000100 },
3767 { 0x23, 0x40000100 },
3768 {}
81d3dbde
TD		 3769};
3770
29ac8363
TI		 3771static const struct hda_pintbl d965_5st_pin_configs[] = {
3772 { 0x0a, 0x02214020 },
3773 { 0x0b, 0x02a19080 },
3774 { 0x0c, 0x0181304e },
3775 { 0x0d, 0x01014010 },
3776 { 0x0e, 0x01a19040 },
3777 { 0x0f, 0x01011012 },
3778 { 0x10, 0x01016011 },
3779 { 0x11, 0x40000100 },
3780 { 0x12, 0x40000100 },
3781 { 0x13, 0x40000100 },
3782 { 0x14, 0x40000100 },
3783 { 0x21, 0x01442070 },
3784 { 0x22, 0x40000100 },
3785 { 0x23, 0x40000100 },
3786 {}
93ed1503
TD		 3787};
3788
29ac8363
TI		 3789static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
3790 { 0x0a, 0x40000100 },
3791 { 0x0b, 0x40000100 },
3792 { 0x0c, 0x0181304e },
3793 { 0x0d, 0x01014010 },
3794 { 0x0e, 0x01a19040 },
3795 { 0x0f, 0x01011012 },
3796 { 0x10, 0x01016011 },
3797 { 0x11, 0x40000100 },
3798 { 0x12, 0x40000100 },
3799 { 0x13, 0x40000100 },
3800 { 0x14, 0x40000100 },
3801 { 0x21, 0x01442070 },
3802 { 0x22, 0x40000100 },
3803 { 0x23, 0x40000100 },
3804 {}
679d92ed
TI		 3805};
3806
29ac8363
TI		 3807static const struct hda_pintbl dell_3st_pin_configs[] = {
3808 { 0x0a, 0x02211230 },
3809 { 0x0b, 0x02a11220 },
3810 { 0x0c, 0x01a19040 },
3811 { 0x0d, 0x01114210 },
3812 { 0x0e, 0x01111212 },
3813 { 0x0f, 0x01116211 },
3814 { 0x10, 0x01813050 },
3815 { 0x11, 0x01112214 },
3816 { 0x12, 0x403003fa },
3817 { 0x13, 0x90a60040 },
3818 { 0x14, 0x90a60040 },
3819 { 0x21, 0x404003fb },
3820 { 0x22, 0x40c003fc },
3821 { 0x23, 0x40000100 },
3822 {}
4ff076e5
TD		 3823};
3824
29ac8363
TI		 3825static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3826 const struct hda_fixup *fix, int action)
3827{
29ac8363 3828 /* no jack detecion for ref-no-jd model */
36c9db7a
TI		 3829 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3830 codec->no_jack_detect = 1;
29ac8363
TI		 3831}
3832
3833static void stac927x_fixup_ref(struct hda_codec *codec,
3834 const struct hda_fixup *fix, int action)
3835{
3836 struct sigmatel_spec *spec = codec->spec;
3837
3838 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3839 snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3840 spec->eapd_mask = spec->gpio_mask = 0;
3841 spec->gpio_dir = spec->gpio_data = 0;
3842 }
3843}
3844
3845static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3846 const struct hda_fixup *fix, int action)
3847{
3848 struct sigmatel_spec *spec = codec->spec;
3849
3850 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3851 return;
3852
7639a06c 3853 if (codec->core.subsystem_id != 0x1028022f) {
29ac8363
TI		 3854 /* GPIO2 High = Enable EAPD */
3855 spec->eapd_mask = spec->gpio_mask = 0x04;
3856 spec->gpio_dir = spec->gpio_data = 0x04;
3857 }
29ac8363
TI		 3858
3859 snd_hda_add_verbs(codec, dell_3st_core_init);
3860 spec->volknob_init = 1;
29ac8363
TI		 3861}
3862
3863static void stac927x_fixup_volknob(struct hda_codec *codec,
3864 const struct hda_fixup *fix, int action)
3865{
3866 struct sigmatel_spec *spec = codec->spec;
3867
3868 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3869 snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3870 spec->volknob_init = 1;
3871 }
3872}
3873
3874static const struct hda_fixup stac927x_fixups[] = {
3875 [STAC_D965_REF_NO_JD] = {
3876 .type = HDA_FIXUP_FUNC,
3877 .v.func = stac927x_fixup_ref_no_jd,
3878 .chained = true,
3879 .chain_id = STAC_D965_REF,
3880 },
3881 [STAC_D965_REF] = {
3882 .type = HDA_FIXUP_FUNC,
3883 .v.func = stac927x_fixup_ref,
3884 },
3885 [STAC_D965_3ST] = {
3886 .type = HDA_FIXUP_PINS,
3887 .v.pins = d965_3st_pin_configs,
3888 .chained = true,
3889 .chain_id = STAC_D965_VERBS,
3890 },
3891 [STAC_D965_5ST] = {
3892 .type = HDA_FIXUP_PINS,
3893 .v.pins = d965_5st_pin_configs,
3894 .chained = true,
3895 .chain_id = STAC_D965_VERBS,
3896 },
3897 [STAC_D965_VERBS] = {
3898 .type = HDA_FIXUP_VERBS,
3899 .v.verbs = d965_core_init,
3900 },
3901 [STAC_D965_5ST_NO_FP] = {
3902 .type = HDA_FIXUP_PINS,
3903 .v.pins = d965_5st_no_fp_pin_configs,
3904 },
078502b5
DS		 3905 [STAC_NEMO_DEFAULT] = {
3906 .type = HDA_FIXUP_PINS,
3907 .v.pins = nemo_pin_configs,
3908 },
29ac8363
TI		 3909 [STAC_DELL_3ST] = {
3910 .type = HDA_FIXUP_PINS,
3911 .v.pins = dell_3st_pin_configs,
3912 .chained = true,
3913 .chain_id = STAC_927X_DELL_DMIC,
3914 },
3915 [STAC_DELL_BIOS] = {
3916 .type = HDA_FIXUP_PINS,
3917 .v.pins = (const struct hda_pintbl[]) {
29ac8363 3918 /* correct the front output jack as a hp out */
f3e351ee 3919 { 0x0f, 0x0221101f },
29ac8363
TI		 3920 /* correct the front input jack as a mic */
3921 { 0x0e, 0x02a79130 },
3922 {}
3923 },
3924 .chained = true,
3925 .chain_id = STAC_927X_DELL_DMIC,
3926 },
eefb8be4
TI		 3927 [STAC_DELL_BIOS_AMIC] = {
3928 .type = HDA_FIXUP_PINS,
3929 .v.pins = (const struct hda_pintbl[]) {
3930 /* configure the analog microphone on some laptops */
3931 { 0x0c, 0x90a79130 },
3932 {}
3933 },
3934 .chained = true,
3935 .chain_id = STAC_DELL_BIOS,
3936 },
29ac8363
TI		 3937 [STAC_DELL_BIOS_SPDIF] = {
3938 .type = HDA_FIXUP_PINS,
3939 .v.pins = (const struct hda_pintbl[]) {
3940 /* correct the device field to SPDIF out */
3941 { 0x21, 0x01442070 },
3942 {}
3943 },
3944 .chained = true,
3945 .chain_id = STAC_DELL_BIOS,
3946 },
3947 [STAC_927X_DELL_DMIC] = {
3948 .type = HDA_FIXUP_FUNC,
3949 .v.func = stac927x_fixup_dell_dmic,
3950 },
3951 [STAC_927X_VOLKNOB] = {
3952 .type = HDA_FIXUP_FUNC,
3953 .v.func = stac927x_fixup_volknob,
3954 },
3cc08dc6
MP		 3955};
3956
29ac8363
TI		 3957static const struct hda_model_fixup stac927x_models[] = {
3958 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3959 { .id = STAC_D965_REF, .name = "ref" },
3960 { .id = STAC_D965_3ST, .name = "3stack" },
3961 { .id = STAC_D965_5ST, .name = "5stack" },
3962 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3963 { .id = STAC_DELL_3ST, .name = "dell-3stack" },
3964 { .id = STAC_DELL_BIOS, .name = "dell-bios" },
078502b5 3965 { .id = STAC_NEMO_DEFAULT, .name = "nemo-default" },
eefb8be4 3966 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
29ac8363
TI		 3967 { .id = STAC_927X_VOLKNOB, .name = "volknob" },
3968 {}
f5fcc13c
TI		 3969};
3970
29ac8363 3971static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
f5fcc13c
TI		 3972 /* SigmaTel reference board */
3973 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3974 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 3975 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3976 "DFI LanParty", STAC_D965_REF),
81d3dbde 3977 /* Intel 946 based systems */
f5fcc13c
TI		 3978 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3979 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 3980 /* 965 based 3 stack systems */
dea0a509
TI		 3981 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3982 "Intel D965", STAC_D965_3ST),
3983 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3984 "Intel D965", STAC_D965_3ST),
4ff076e5 3985 /* Dell 3 stack systems */
dfe495d0 3986 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 3987 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
3988 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 3989 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 3990 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 3991 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 3992 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
29ac8363 3993 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
84d3dc20 3994 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR		 3995 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
3996 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
3997 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
29ac8363 3998 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
93ed1503 3999 /* 965 based 5 stack systems */
dea0a509
TI		 4000 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
4001 "Intel D965", STAC_D965_5ST),
4002 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
4003 "Intel D965", STAC_D965_5ST),
078502b5
DS		 4004 /* Nemo */
4005 SND_PCI_QUIRK(0x1888, 0x1000, "AmigaOne X1000", STAC_NEMO_DEFAULT),
54930531
TI		 4006 /* volume-knob fixes */
4007 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP		 4008 {} /* terminator */
4009};
4010
fe6322ca
TI		 4011static const struct hda_pintbl ref9205_pin_configs[] = {
4012 { 0x0a, 0x40000100 },
4013 { 0x0b, 0x40000100 },
4014 { 0x0c, 0x01016011 },
4015 { 0x0d, 0x01014010 },
4016 { 0x0e, 0x01813122 },
4017 { 0x0f, 0x01a19021 },
4018 { 0x14, 0x01019020 },
4019 { 0x16, 0x40000100 },
4020 { 0x17, 0x90a000f0 },
4021 { 0x18, 0x90a000f0 },
4022 { 0x21, 0x01441030 },
4023 { 0x22, 0x01c41030 },
4024 {}
f3302a59
MP		 4025};
4026
dfe495d0
TI		 4027/*
4028 STAC 9205 pin configs for
4029 102801F1
4030 102801F2
4031 102801FC
4032 102801FD
4033 10280204
4034 1028021F
3fa2ef74 4035 10280228 (Dell Vostro 1500)
95e70e87 4036 10280229 (Dell Vostro 1700)
dfe495d0 4037*/
fe6322ca
TI		 4038static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
4039 { 0x0a, 0x0321101F },
4040 { 0x0b, 0x03A11020 },
4041 { 0x0c, 0x400003FA },
4042 { 0x0d, 0x90170310 },
4043 { 0x0e, 0x400003FB },
4044 { 0x0f, 0x400003FC },
4045 { 0x14, 0x400003FD },
4046 { 0x16, 0x40F000F9 },
4047 { 0x17, 0x90A60330 },
4048 { 0x18, 0x400003FF },
4049 { 0x21, 0x0144131F },
4050 { 0x22, 0x40C003FE },
4051 {}
dfe495d0
TI		 4052};
4053
4054/*
4055 STAC 9205 pin configs for
4056 102801F9
4057 102801FA
4058 102801FE
4059 102801FF (Dell Precision M4300)
4060 10280206
4061 10280200
4062 10280201
4063*/
fe6322ca
TI		 4064static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
4065 { 0x0a, 0x0321101f },
4066 { 0x0b, 0x03a11020 },
4067 { 0x0c, 0x90a70330 },
4068 { 0x0d, 0x90170310 },
4069 { 0x0e, 0x400000fe },
4070 { 0x0f, 0x400000ff },
4071 { 0x14, 0x400000fd },
4072 { 0x16, 0x40f000f9 },
4073 { 0x17, 0x400000fa },
4074 { 0x18, 0x400000fc },
4075 { 0x21, 0x0144131f },
4076 { 0x22, 0x40c003f8 },
4077 /* Enable SPDIF in/out */
4078 { 0x1f, 0x01441030 },
4079 { 0x20, 0x1c410030 },
4080 {}
ae0a8ed8
TD		 4081};
4082
fe6322ca
TI		 4083static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
4084 { 0x0a, 0x0421101f },
4085 { 0x0b, 0x04a11020 },
4086 { 0x0c, 0x400003fa },
4087 { 0x0d, 0x90170310 },
4088 { 0x0e, 0x400003fb },
4089 { 0x0f, 0x400003fc },
4090 { 0x14, 0x400003fd },
4091 { 0x16, 0x400003f9 },
4092 { 0x17, 0x90a60330 },
4093 { 0x18, 0x400003ff },
4094 { 0x21, 0x01441340 },
4095 { 0x22, 0x40c003fe },
4096 {}
ae0a8ed8
TD		 4097};
4098
fe6322ca
TI		 4099static void stac9205_fixup_ref(struct hda_codec *codec,
4100 const struct hda_fixup *fix, int action)
4101{
4102 struct sigmatel_spec *spec = codec->spec;
4103
4104 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4105 snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
4106 /* SPDIF-In enabled */
4107 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
4108 }
4109}
4110
fe6322ca
TI		 4111static void stac9205_fixup_dell_m43(struct hda_codec *codec,
4112 const struct hda_fixup *fix, int action)
4113{
4114 struct sigmatel_spec *spec = codec->spec;
1a4f69d5 4115 struct hda_jack_callback *jack;
fe6322ca
TI		 4116
4117 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4118 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
4119
4120 /* Enable unsol response for GPIO4/Dock HP connection */
7639a06c 4121 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
fe6322ca 4122 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
7639a06c 4123 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
bda17b82
TI		 4124 stac_vref_event);
4125 if (!IS_ERR(jack))
36c9db7a 4126 jack->private_data = 0x01;
fe6322ca
TI		 4127
4128 spec->gpio_dir = 0x0b;
4129 spec->eapd_mask = 0x01;
4130 spec->gpio_mask = 0x1b;
4131 spec->gpio_mute = 0x10;
4132 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4133 * GPIO3 Low = DRM
4134 */
4135 spec->gpio_data = 0x01;
4136 }
4137}
4138
4139static void stac9205_fixup_eapd(struct hda_codec *codec,
4140 const struct hda_fixup *fix, int action)
4141{
4142 struct sigmatel_spec *spec = codec->spec;
4143
4144 if (action == HDA_FIXUP_ACT_PRE_PROBE)
4145 spec->eapd_switch = 0;
4146}
4147
4148static const struct hda_fixup stac9205_fixups[] = {
4149 [STAC_9205_REF] = {
4150 .type = HDA_FIXUP_FUNC,
4151 .v.func = stac9205_fixup_ref,
4152 },
4153 [STAC_9205_DELL_M42] = {
4154 .type = HDA_FIXUP_PINS,
4155 .v.pins = dell_9205_m42_pin_configs,
4156 },
4157 [STAC_9205_DELL_M43] = {
4158 .type = HDA_FIXUP_FUNC,
4159 .v.func = stac9205_fixup_dell_m43,
4160 },
4161 [STAC_9205_DELL_M44] = {
4162 .type = HDA_FIXUP_PINS,
4163 .v.pins = dell_9205_m44_pin_configs,
4164 },
4165 [STAC_9205_EAPD] = {
4166 .type = HDA_FIXUP_FUNC,
4167 .v.func = stac9205_fixup_eapd,
4168 },
4169 {}
f3302a59
MP		 4170};
4171
fe6322ca
TI		 4172static const struct hda_model_fixup stac9205_models[] = {
4173 { .id = STAC_9205_REF, .name = "ref" },
4174 { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
4175 { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
4176 { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
4177 { .id = STAC_9205_EAPD, .name = "eapd" },
4178 {}
f5fcc13c
TI		 4179};
4180
fe6322ca 4181static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
f5fcc13c
TI		 4182 /* SigmaTel reference board */
4183 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
4184 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK		 4185 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
4186 "SigmaTel", STAC_9205_REF),
577aa2c1
MR		 4187 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
4188 "DFI LanParty", STAC_9205_REF),
d9a4268e 4189 /* Dell */
dfe495d0
TI		 4190 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
4191 "unknown Dell", STAC_9205_DELL_M42),
4192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
4193 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 4194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 4195 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 4196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
4197 "Dell Precision", STAC_9205_DELL_M43),
4198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
4199 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 4200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
4201 "unknown Dell", STAC_9205_DELL_M42),
4202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
4203 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 4204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
4205 "Dell Precision", STAC_9205_DELL_M43),
4206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 4207 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 4208 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
4209 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 4210 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
4211 "Dell Precision", STAC_9205_DELL_M43),
4212 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
4213 "Dell Precision", STAC_9205_DELL_M43),
36c9db7a
TI		 4214 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
4215 "Dell Precision", STAC_9205_DELL_M43),
4216 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
4217 "Dell Inspiron", STAC_9205_DELL_M44),
4218 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
4219 "Dell Vostro 1500", STAC_9205_DELL_M42),
4220 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
4221 "Dell Vostro 1700", STAC_9205_DELL_M42),
4222 /* Gateway */
4223 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
4224 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
4225 {} /* terminator */
4226};
a64135a2 4227
8b3dfdaf
TI		 4228static void stac92hd95_fixup_hp_led(struct hda_codec *codec,
4229 const struct hda_fixup *fix, int action)
4230{
4231 struct sigmatel_spec *spec = codec->spec;
4232
4233 if (action != HDA_FIXUP_ACT_PRE_PROBE)
4234 return;
4235
4236 if (find_mute_led_cfg(codec, spec->default_polarity))
4237 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
4238 spec->gpio_led,
4239 spec->gpio_led_polarity);
4240}
4241
4242static const struct hda_fixup stac92hd95_fixups[] = {
4243 [STAC_92HD95_HP_LED] = {
4244 .type = HDA_FIXUP_FUNC,
4245 .v.func = stac92hd95_fixup_hp_led,
4246 },
4247 [STAC_92HD95_HP_BASS] = {
4248 .type = HDA_FIXUP_VERBS,
4249 .v.verbs = (const struct hda_verb[]) {
4250 {0x1a, 0x795, 0x00}, /* HPF to 100Hz */
4251 {}
4252 },
4253 .chained = true,
4254 .chain_id = STAC_92HD95_HP_LED,
4255 },
4256};
4257
4258static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = {
4259 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS),
4260 {} /* terminator */
4261};
4262
4263static const struct hda_model_fixup stac92hd95_models[] = {
4264 { .id = STAC_92HD95_HP_LED, .name = "hp-led" },
4265 { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" },
4266 {}
4267};
4268
4269
36c9db7a 4270static int stac_parse_auto_config(struct hda_codec *codec)
ab5a6ebe
VK		 4271{
4272 struct sigmatel_spec *spec = codec->spec;
36c9db7a 4273 int err;
f390dad4 4274 int flags = 0;
ab5a6ebe 4275
f390dad4
DH		 4276 if (spec->headset_jack)
4277 flags |= HDA_PINCFG_HEADSET_MIC;
4278
4279 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
36c9db7a
TI		 4280 if (err < 0)
4281 return err;
ab5a6ebe 4282
36c9db7a
TI		 4283 /* add hooks */
4284 spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
4285 spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
ab5a6ebe 4286
36c9db7a 4287 spec->gen.automute_hook = stac_update_outputs;
3d21d3f7 4288
e65bf997
JK		 4289 if (spec->gpio_led)
4290 snd_hda_gen_add_mute_led_cdev(codec, stac_vmaster_hook);
4291
36c9db7a
TI		 4292 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
4293 if (err < 0)
4294 return err;
3d21d3f7 4295
6b275b14
TI		 4296 if (spec->vref_mute_led_nid) {
4297 err = snd_hda_gen_fix_pin_power(codec, spec->vref_mute_led_nid);
4298 if (err < 0)
4299 return err;
4300 }
4301
36c9db7a
TI		 4302 /* setup analog beep controls */
4303 if (spec->anabeep_nid > 0) {
4304 err = stac_auto_create_beep_ctls(codec,
4305 spec->anabeep_nid);
4306 if (err < 0)
4307 return err;
3d21d3f7
TI		 4308 }
4309
36c9db7a
TI		 4310 /* setup digital beep controls and input device */
4311#ifdef CONFIG_SND_HDA_INPUT_BEEP
7504b6cd
TI		 4312 if (spec->gen.beep_nid) {
4313 hda_nid_t nid = spec->gen.beep_nid;
36c9db7a
TI		 4314 unsigned int caps;
4315
4316 err = stac_auto_create_beep_ctls(codec, nid);
36c9db7a
TI		 4317 if (err < 0)
4318 return err;
4319 if (codec->beep) {
4320 /* IDT/STAC codecs have linear beep tone parameter */
4321 codec->beep->linear_tone = spec->linear_tone_beep;
4c8d695c
TI		 4322 /* keep power up while beep is enabled */
4323 codec->beep->keep_power_at_enable = 1;
36c9db7a
TI		 4324 /* if no beep switch is available, make its own one */
4325 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
4326 if (!(caps & AC_AMPCAP_MUTE)) {
4327 err = stac_beep_switch_ctl(codec);
4328 if (err < 0)
4329 return err;
fd60cc89
MR		 4330 }
4331 }
314634bc 4332 }
36c9db7a 4333#endif
314634bc 4334
36c9db7a
TI		 4335 if (spec->aloopback_ctl &&
4336 snd_hda_get_bool_hint(codec, "loopback") == 1) {
a551d914
TI		 4337 unsigned int wr_verb =
4338 spec->aloopback_ctl->private_value >> 16;
4339 if (snd_hdac_regmap_add_vendor_verb(&codec->core, wr_verb))
4340 return -ENOMEM;
36c9db7a
TI		 4341 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
4342 return -ENOMEM;
4343 }
4344
42875479
TI		 4345 if (spec->have_spdif_mux) {
4346 err = stac_create_spdif_mux_ctls(codec);
4347 if (err < 0)
4348 return err;
4349 }
4350
7a9744cb 4351 stac_init_power_map(codec);
aa699c49 4352
7a9744cb
TI		 4353 return 0;
4354}
36c9db7a
TI		 4355
4356static int stac_init(struct hda_codec *codec)
d38cce70
KG		 4357{
4358 struct sigmatel_spec *spec = codec->spec;
36c9db7a 4359 int i;
07f80449 4360
36c9db7a
TI		 4361 /* override some hints */
4362 stac_store_hints(codec);
26ebe0a2 4363
36c9db7a 4364 /* set up GPIO */
36c9db7a
TI		 4365 /* turn on EAPD statically when spec->eapd_switch isn't set.
4366 * otherwise, unsol event will turn it on/off dynamically
4367 */
4368 if (!spec->eapd_switch)
1ea9a69d
TI		 4369 spec->gpio_data |= spec->eapd_mask;
4370 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
d38cce70 4371
36c9db7a 4372 snd_hda_gen_init(codec);
c357aab0 4373
36c9db7a
TI		 4374 /* sync the power-map */
4375 if (spec->num_pwrs)
7639a06c 4376 snd_hda_codec_write(codec, codec->core.afg, 0,
36c9db7a
TI		 4377 AC_VERB_IDT_SET_POWER_MAP,
4378 spec->power_map_bits);
0f6fcb73 4379
36c9db7a
TI		 4380 /* power down inactive ADCs */
4381 if (spec->powerdown_adcs) {
4382 for (i = 0; i < spec->gen.num_all_adcs; i++) {
4383 if (spec->active_adcs & (1 << i))
4384 continue;
4385 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
4386 AC_VERB_SET_POWER_STATE,
4387 AC_PWRST_D3);
89bb3e74
TI		 4388 }
4389 }
4390
c357aab0
VK		 4391 return 0;
4392}
4393
7504b6cd 4394#define stac_free snd_hda_gen_free
78987bdc 4395
cd6a6503 4396#ifdef CONFIG_SND_PROC_FS
2d34e1b3
TI		 4397static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4398 struct hda_codec *codec, hda_nid_t nid)
4399{
7639a06c 4400 if (nid == codec->core.afg)
2d34e1b3 4401 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
c882246d
TI		 4402 snd_hda_codec_read(codec, nid, 0,
4403 AC_VERB_IDT_GET_POWER_MAP, 0));
2d34e1b3
TI		 4404}
4405
4406static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4407 struct hda_codec *codec,
4408 unsigned int verb)
4409{
4410 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
7639a06c 4411 snd_hda_codec_read(codec, codec->core.afg, 0, verb, 0));
2d34e1b3
TI		 4412}
4413
4414/* stac92hd71bxx, stac92hd73xx */
4415static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4416 struct hda_codec *codec, hda_nid_t nid)
4417{
4418 stac92hd_proc_hook(buffer, codec, nid);
7639a06c 4419 if (nid == codec->core.afg)
2d34e1b3
TI		 4420 analog_loop_proc_hook(buffer, codec, 0xfa0);
4421}
4422
4423static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4424 struct hda_codec *codec, hda_nid_t nid)
4425{
7639a06c 4426 if (nid == codec->core.afg)
2d34e1b3
TI		 4427 analog_loop_proc_hook(buffer, codec, 0xfe0);
4428}
4429
4430static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4431 struct hda_codec *codec, hda_nid_t nid)
4432{
7639a06c 4433 if (nid == codec->core.afg)
2d34e1b3
TI		 4434 analog_loop_proc_hook(buffer, codec, 0xfeb);
4435}
4436#else
4437#define stac92hd_proc_hook NULL
4438#define stac92hd7x_proc_hook NULL
4439#define stac9205_proc_hook NULL
4440#define stac927x_proc_hook NULL
4441#endif
4442
36c9db7a
TI		 4443static int stac_suspend(struct hda_codec *codec)
4444{
f8b32a6d
NC		 4445 struct sigmatel_spec *spec = codec->spec;
4446
4447 snd_hda_shutup_pins(codec);
4448
4449 if (spec->eapd_mask)
4450 stac_gpio_set(codec, spec->gpio_mask,
4451 spec->gpio_dir, spec->gpio_data &
4452 ~spec->eapd_mask);
4453
36c9db7a
TI		 4454 return 0;
4455}
7df1ce1a 4456
36c9db7a 4457static const struct hda_codec_ops stac_patch_ops = {
aa699c49 4458 .build_controls = snd_hda_gen_build_controls,
36c9db7a
TI		 4459 .build_pcms = snd_hda_gen_build_pcms,
4460 .init = stac_init,
4461 .free = stac_free,
29adc4b9 4462 .unsol_event = snd_hda_jack_unsol_event,
36c9db7a 4463 .suspend = stac_suspend,
2f2f4251
M		 4464};
4465
36c9db7a 4466static int alloc_stac_spec(struct hda_codec *codec)
361dab3e
TI		 4467{
4468 struct sigmatel_spec *spec;
4469
4470 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4471 if (!spec)
4472 return -ENOMEM;
36c9db7a 4473 snd_hda_gen_spec_init(&spec->gen);
361dab3e
TI		 4474 codec->spec = spec;
4475 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
d89c6c0c 4476 spec->gen.dac_min_mute = true;
225068ab 4477 codec->patch_ops = stac_patch_ops;
361dab3e
TI		 4478 return 0;
4479}
4480
2f2f4251
M		 4481static int patch_stac9200(struct hda_codec *codec)
4482{
4483 struct sigmatel_spec *spec;
c7d4b2fa 4484 int err;
2f2f4251 4485
36c9db7a 4486 err = alloc_stac_spec(codec);
361dab3e
TI		 4487 if (err < 0)
4488 return err;
2f2f4251 4489
361dab3e 4490 spec = codec->spec;
1b0e372d 4491 spec->linear_tone_beep = 1;
36c9db7a 4492 spec->gen.own_eapd_ctl = 1;
d39a3ae8 4493
ba615b86 4494 codec->power_filter = snd_hda_codec_eapd_power_filter;
2f2f4251 4495
d39a3ae8 4496 snd_hda_add_verbs(codec, stac9200_eapd_init);
c7d4b2fa 4497
36c9db7a
TI		 4498 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
4499 stac9200_fixups);
d39a3ae8 4500 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
117f257d 4501
36c9db7a 4502 err = stac_parse_auto_config(codec);
c7d4b2fa 4503 if (err < 0) {
36c9db7a 4504 stac_free(codec);
c7d4b2fa
M		 4505 return err;
4506 }
2f2f4251 4507
d39a3ae8
TI		 4508 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4509
2f2f4251
M		 4510 return 0;
4511}
4512
8e21c34c
TD		 4513static int patch_stac925x(struct hda_codec *codec)
4514{
4515 struct sigmatel_spec *spec;
4516 int err;
4517
36c9db7a 4518 err = alloc_stac_spec(codec);
361dab3e
TI		 4519 if (err < 0)
4520 return err;
8e21c34c 4521
361dab3e 4522 spec = codec->spec;
1b0e372d 4523 spec->linear_tone_beep = 1;
36c9db7a 4524 spec->gen.own_eapd_ctl = 1;
9cb36c2a 4525
d2077d40 4526 snd_hda_add_verbs(codec, stac925x_core_init);
8e21c34c 4527
36c9db7a
TI		 4528 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
4529 stac925x_fixups);
d2077d40
TI		 4530 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4531
36c9db7a 4532 err = stac_parse_auto_config(codec);
8e21c34c 4533 if (err < 0) {
36c9db7a 4534 stac_free(codec);
8e21c34c
TD		 4535 return err;
4536 }
4537
d2077d40
TI		 4538 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4539
8e21c34c
TD		 4540 return 0;
4541}
4542
e1f0d669
MR		 4543static int patch_stac92hd73xx(struct hda_codec *codec)
4544{
4545 struct sigmatel_spec *spec;
361dab3e 4546 int err;
c21ca4a8 4547 int num_dacs;
e1f0d669 4548
36c9db7a 4549 err = alloc_stac_spec(codec);
361dab3e
TI		 4550 if (err < 0)
4551 return err;
e1f0d669 4552
361dab3e 4553 spec = codec->spec;
c7e10080
TI		 4554 /* enable power_save_node only for new 92HD89xx chips, as it causes
4555 * click noises on old 92HD73xx chips.
4556 */
4557 if ((codec->core.vendor_id & 0xfffffff0) != 0x111d7670)
4558 codec->power_save_node = 1;
1b0e372d 4559 spec->linear_tone_beep = 0;
2748746f 4560 spec->gen.mixer_nid = 0x1d;
42875479 4561 spec->have_spdif_mux = 1;
e1f0d669 4562
36c9db7a 4563 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
c21ca4a8 4564 if (num_dacs < 3 || num_dacs > 5) {
4e76a883
TI		 4565 codec_warn(codec,
4566 "Could not determine number of channels defaulting to DAC count\n");
36c9db7a 4567 num_dacs = 5;
e1f0d669 4568 }
55e30141 4569
c21ca4a8 4570 switch (num_dacs) {
e1f0d669 4571 case 0x3: /* 6 Channel */
36c9db7a 4572 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
e1f0d669
MR		 4573 break;
4574 case 0x4: /* 8 Channel */
36c9db7a 4575 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
e1f0d669
MR		 4576 break;
4577 case 0x5: /* 10 Channel */
36c9db7a 4578 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
d78d7a90 4579 break;
c21ca4a8 4580 }
e1f0d669 4581
e1f0d669
MR		 4582 spec->aloopback_mask = 0x01;
4583 spec->aloopback_shift = 8;
4584
7504b6cd 4585 spec->gen.beep_nid = 0x1c; /* digital beep */
6479c631 4586
55e30141
TI		 4587 /* GPIO0 High = Enable EAPD */
4588 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4589 spec->gpio_data = 0x01;
6b3ab21e 4590
55e30141 4591 spec->eapd_switch = 1;
a7662640 4592
a64135a2
MR		 4593 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4594 spec->pwr_nids = stac92hd73xx_pwr_nids;
4595
36c9db7a 4596 spec->gen.own_eapd_ctl = 1;
f4f678d2 4597 spec->gen.power_down_unused = 1;
36c9db7a 4598
36c9db7a
TI		 4599 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
4600 stac92hd73xx_fixups);
55e30141
TI		 4601 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4602
4603 if (!spec->volknob_init)
4604 snd_hda_add_verbs(codec, stac92hd73xx_core_init);
4605
36c9db7a 4606 err = stac_parse_auto_config(codec);
e1f0d669 4607 if (err < 0) {
36c9db7a 4608 stac_free(codec);
e1f0d669
MR		 4609 return err;
4610 }
4611
303985f8
DH		 4612 /* Don't GPIO-mute speakers if there are no internal speakers, because
4613 * the GPIO might be necessary for Headphone
4614 */
4615 if (spec->eapd_switch && !has_builtin_speaker(codec))
4616 spec->eapd_switch = 0;
4617
2d34e1b3
TI		 4618 codec->proc_widget_hook = stac92hd7x_proc_hook;
4619
55e30141
TI		 4620 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4621
e1f0d669
MR		 4622 return 0;
4623}
4624
372f8c75
TI		 4625static void stac_setup_gpio(struct hda_codec *codec)
4626{
4627 struct sigmatel_spec *spec = codec->spec;
4628
1ea9a69d 4629 spec->gpio_mask |= spec->eapd_mask;
372f8c75
TI		 4630 if (spec->gpio_led) {
4631 if (!spec->vref_mute_led_nid) {
4632 spec->gpio_mask |= spec->gpio_led;
4633 spec->gpio_dir |= spec->gpio_led;
4634 spec->gpio_data |= spec->gpio_led;
4635 } else {
dfc6e469 4636 codec->power_filter = stac_vref_led_power_filter;
372f8c75
TI		 4637 }
4638 }
4639
4640 if (spec->mic_mute_led_gpio) {
4641 spec->gpio_mask |= spec->mic_mute_led_gpio;
4642 spec->gpio_dir |= spec->mic_mute_led_gpio;
7fe30711 4643 spec->mic_enabled = 0;
372f8c75 4644 spec->gpio_data |= spec->mic_mute_led_gpio;
23a2b469 4645 snd_hda_gen_add_micmute_led_cdev(codec, stac_capture_led_update);
372f8c75
TI		 4646 }
4647}
4648
d0513fc6
MR		 4649static int patch_stac92hd83xxx(struct hda_codec *codec)
4650{
4651 struct sigmatel_spec *spec;
4652 int err;
4653
36c9db7a 4654 err = alloc_stac_spec(codec);
361dab3e
TI		 4655 if (err < 0)
4656 return err;
d0513fc6 4657
7639a06c
TI		 4658 /* longer delay needed for D3 */
4659 codec->core.power_caps &= ~AC_PWRST_EPSS;
699d8995 4660
361dab3e 4661 spec = codec->spec;
967b1307 4662 codec->power_save_node = 1;
1db7ccdb 4663 spec->linear_tone_beep = 0;
36c9db7a 4664 spec->gen.own_eapd_ctl = 1;
f4f678d2 4665 spec->gen.power_down_unused = 1;
2748746f 4666 spec->gen.mixer_nid = 0x1b;
36c9db7a 4667
7504b6cd 4668 spec->gen.beep_nid = 0x21; /* digital beep */
d0513fc6 4669 spec->pwr_nids = stac92hd83xxx_pwr_nids;
d0513fc6 4670 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
36c9db7a 4671 spec->default_polarity = -1; /* no default cfg */
d0513fc6 4672
372f8c75 4673 snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
e108c7b7 4674
36c9db7a
TI		 4675 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
4676 stac92hd83xxx_fixups);
372f8c75 4677 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
b4e81876 4678
372f8c75 4679 stac_setup_gpio(codec);
62cbde18 4680
36c9db7a 4681 err = stac_parse_auto_config(codec);
d0513fc6 4682 if (err < 0) {
36c9db7a 4683 stac_free(codec);
d0513fc6
MR		 4684 return err;
4685 }
4686
2d34e1b3
TI		 4687 codec->proc_widget_hook = stac92hd_proc_hook;
4688
372f8c75
TI		 4689 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4690
d0513fc6
MR		 4691 return 0;
4692}
4693
4e637c6e
VK		 4694static const hda_nid_t stac92hd95_pwr_nids[] = {
4695 0x0a, 0x0b, 0x0c, 0x0d
4696};
4697
4698static int patch_stac92hd95(struct hda_codec *codec)
4699{
4700 struct sigmatel_spec *spec;
4701 int err;
4702
4703 err = alloc_stac_spec(codec);
4704 if (err < 0)
4705 return err;
4706
7639a06c
TI		 4707 /* longer delay needed for D3 */
4708 codec->core.power_caps &= ~AC_PWRST_EPSS;
4e637c6e
VK		 4709
4710 spec = codec->spec;
967b1307 4711 codec->power_save_node = 1;
4e637c6e
VK		 4712 spec->linear_tone_beep = 0;
4713 spec->gen.own_eapd_ctl = 1;
4714 spec->gen.power_down_unused = 1;
4715
7504b6cd 4716 spec->gen.beep_nid = 0x19; /* digital beep */
4e637c6e
VK		 4717 spec->pwr_nids = stac92hd95_pwr_nids;
4718 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
8b3dfdaf 4719 spec->default_polarity = 0;
4e637c6e 4720
8b3dfdaf
TI		 4721 snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl,
4722 stac92hd95_fixups);
4723 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4724
4725 stac_setup_gpio(codec);
4726
4e637c6e
VK		 4727 err = stac_parse_auto_config(codec);
4728 if (err < 0) {
4729 stac_free(codec);
4730 return err;
4731 }
4732
4733 codec->proc_widget_hook = stac92hd_proc_hook;
4734
8b3dfdaf
TI		 4735 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4736
4e637c6e
VK		 4737 return 0;
4738}
4739
e035b841
MR		 4740static int patch_stac92hd71bxx(struct hda_codec *codec)
4741{
4742 struct sigmatel_spec *spec;
a551d914 4743 const hda_nid_t *unmute_nids = stac92hd71bxx_unmute_nids;
361dab3e 4744 int err;
e035b841 4745
36c9db7a 4746 err = alloc_stac_spec(codec);
361dab3e
TI		 4747 if (err < 0)
4748 return err;
e035b841 4749
361dab3e 4750 spec = codec->spec;
c545f799
TI		 4751 /* disabled power_save_node since it causes noises on a Dell machine */
4752 /* codec->power_save_node = 1; */
1b0e372d 4753 spec->linear_tone_beep = 0;
36c9db7a 4754 spec->gen.own_eapd_ctl = 1;
f4f678d2 4755 spec->gen.power_down_unused = 1;
2748746f 4756 spec->gen.mixer_nid = 0x17;
42875479 4757 spec->have_spdif_mux = 1;
e035b841 4758
0f6fcb73
TI		 4759 /* GPIO0 = EAPD */
4760 spec->gpio_mask = 0x01;
4761 spec->gpio_dir = 0x01;
4762 spec->gpio_data = 0x01;
41c3b648 4763
7639a06c 4764 switch (codec->core.vendor_id) {
541eee87
MR		 4765 case 0x111d76b6: /* 4 Port without Analog Mixer */
4766 case 0x111d76b7:
a551d914 4767 unmute_nids++;
541eee87 4768 break;
aafc4412 4769 case 0x111d7608: /* 5 Port with Analog Mixer */
7639a06c
TI		 4770 if ((codec->core.revision_id & 0xf) == 0 ||
4771 (codec->core.revision_id & 0xf) == 1)
8daaaa97 4772 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4773
aafc4412 4774 /* disable VSW */
a551d914 4775 unmute_nids++;
330ee995
TI		 4776 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
4777 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
aafc4412
MR		 4778 break;
4779 case 0x111d7603: /* 6 Port with Analog Mixer */
7639a06c 4780 if ((codec->core.revision_id & 0xf) == 1)
8daaaa97 4781 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4782
5207e10e 4783 break;
541eee87
MR		 4784 }
4785
5e68fb3c 4786 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
0f6fcb73 4787 snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
5e68fb3c 4788
a551d914
TI		 4789 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) {
4790 const hda_nid_t *p;
4791 for (p = unmute_nids; *p; p++)
4792 snd_hda_codec_amp_init_stereo(codec, *p, HDA_INPUT, 0,
4793 0xff, 0x00);
4794 }
ca8d33fc 4795
36c9db7a 4796 spec->aloopback_ctl = &stac92hd71bxx_loopback;
4b33c767 4797 spec->aloopback_mask = 0x50;
541eee87
MR		 4798 spec->aloopback_shift = 0;
4799
8daaaa97 4800 spec->powerdown_adcs = 1;
7504b6cd 4801 spec->gen.beep_nid = 0x26; /* digital beep */
36c9db7a 4802 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
aafc4412 4803 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841 4804
36c9db7a
TI		 4805 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
4806 stac92hd71bxx_fixups);
0f6fcb73 4807 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
5bdaaada 4808
372f8c75 4809 stac_setup_gpio(codec);
6a14f585 4810
36c9db7a 4811 err = stac_parse_auto_config(codec);
e035b841 4812 if (err < 0) {
36c9db7a 4813 stac_free(codec);
e035b841
MR		 4814 return err;
4815 }
4816
2d34e1b3
TI		 4817 codec->proc_widget_hook = stac92hd7x_proc_hook;
4818
0f6fcb73
TI		 4819 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4820
e035b841 4821 return 0;
86d190e7 4822}
e035b841 4823
2f2f4251
M		 4824static int patch_stac922x(struct hda_codec *codec)
4825{
4826 struct sigmatel_spec *spec;
c7d4b2fa 4827 int err;
2f2f4251 4828
36c9db7a 4829 err = alloc_stac_spec(codec);
361dab3e
TI		 4830 if (err < 0)
4831 return err;
2f2f4251 4832
361dab3e 4833 spec = codec->spec;
1b0e372d 4834 spec->linear_tone_beep = 1;
36c9db7a 4835 spec->gen.own_eapd_ctl = 1;
5d5d3bc3 4836
0a427846
TI		 4837 snd_hda_add_verbs(codec, stac922x_core_init);
4838
807a4636
TI		 4839 /* Fix Mux capture level; max to 2 */
4840 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4841 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4842 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4843 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4844 (0 << AC_AMPCAP_MUTE_SHIFT));
4845
36c9db7a
TI		 4846 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
4847 stac922x_fixups);
4848 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4849
4850 err = stac_parse_auto_config(codec);
4851 if (err < 0) {
4852 stac_free(codec);
4853 return err;
4854 }
4855
0a427846
TI		 4856 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4857
3cc08dc6
MP		 4858 return 0;
4859}
4860
42875479
TI		 4861static const char * const stac927x_spdif_labels[] = {
4862 "Digital Playback", "ADAT", "Analog Mux 1",
4863 "Analog Mux 2", "Analog Mux 3", NULL
4864};
4865
3cc08dc6
MP		 4866static int patch_stac927x(struct hda_codec *codec)
4867{
4868 struct sigmatel_spec *spec;
4869 int err;
4870
36c9db7a 4871 err = alloc_stac_spec(codec);
361dab3e
TI		 4872 if (err < 0)
4873 return err;
3cc08dc6 4874
361dab3e 4875 spec = codec->spec;
1b0e372d 4876 spec->linear_tone_beep = 1;
36c9db7a 4877 spec->gen.own_eapd_ctl = 1;
42875479
TI		 4878 spec->have_spdif_mux = 1;
4879 spec->spdif_labels = stac927x_spdif_labels;
3cc08dc6 4880
7504b6cd 4881 spec->gen.beep_nid = 0x23; /* digital beep */
8e9068b1 4882
29ac8363
TI		 4883 /* GPIO0 High = Enable EAPD */
4884 spec->eapd_mask = spec->gpio_mask = 0x01;
4885 spec->gpio_dir = spec->gpio_data = 0x01;
af6ee302 4886
36c9db7a 4887 spec->aloopback_ctl = &stac927x_loopback;
e1f0d669
MR		 4888 spec->aloopback_mask = 0x40;
4889 spec->aloopback_shift = 0;
c0cea0d0 4890 spec->eapd_switch = 1;
8e9068b1 4891
36c9db7a
TI		 4892 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4893 stac927x_fixups);
f6655d52
TI		 4894 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4895
29ac8363
TI		 4896 if (!spec->volknob_init)
4897 snd_hda_add_verbs(codec, stac927x_core_init);
4898
36c9db7a 4899 err = stac_parse_auto_config(codec);
c7d4b2fa 4900 if (err < 0) {
36c9db7a 4901 stac_free(codec);
c7d4b2fa
M		 4902 return err;
4903 }
2f2f4251 4904
2d34e1b3
TI		 4905 codec->proc_widget_hook = stac927x_proc_hook;
4906
52987656
TI		 4907 /*
4908 * !!FIXME!!
4909 * The STAC927x seem to require fairly long delays for certain
4910 * command sequences. With too short delays (even if the answer
4911 * is set to RIRB properly), it results in the silence output
4912 * on some hardwares like Dell.
4913 *
4914 * The below flag enables the longer delay (see get_response
4915 * in hda_intel.c).
4916 */
5f2cb361 4917 codec->bus->core.needs_damn_long_delay = 1;
52987656 4918
29ac8363 4919 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
e28d8322 4920
2f2f4251
M		 4921 return 0;
4922}
4923
f3302a59
MP		 4924static int patch_stac9205(struct hda_codec *codec)
4925{
4926 struct sigmatel_spec *spec;
8259980e 4927 int err;
f3302a59 4928
36c9db7a 4929 err = alloc_stac_spec(codec);
361dab3e
TI		 4930 if (err < 0)
4931 return err;
f3302a59 4932
361dab3e 4933 spec = codec->spec;
1b0e372d 4934 spec->linear_tone_beep = 1;
36c9db7a 4935 spec->gen.own_eapd_ctl = 1;
42875479 4936 spec->have_spdif_mux = 1;
f3302a59 4937
7504b6cd 4938 spec->gen.beep_nid = 0x23; /* digital beep */
f3302a59 4939
fe6322ca 4940 snd_hda_add_verbs(codec, stac9205_core_init);
36c9db7a 4941 spec->aloopback_ctl = &stac9205_loopback;
6479c631 4942
e1f0d669
MR		 4943 spec->aloopback_mask = 0x40;
4944 spec->aloopback_shift = 0;
87d48363 4945
fe6322ca
TI		 4946 /* GPIO0 High = EAPD */
4947 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4948 spec->gpio_data = 0x01;
87d48363 4949
fe6322ca
TI		 4950 /* Turn on/off EAPD per HP plugging */
4951 spec->eapd_switch = 1;
4fe5195c 4952
36c9db7a
TI		 4953 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4954 stac9205_fixups);
fe6322ca 4955 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
33382403 4956
36c9db7a 4957 err = stac_parse_auto_config(codec);
f3302a59 4958 if (err < 0) {
36c9db7a 4959 stac_free(codec);
f3302a59
MP		 4960 return err;
4961 }
4962
2d34e1b3
TI		 4963 codec->proc_widget_hook = stac9205_proc_hook;
4964
fe6322ca
TI		 4965 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4966
f3302a59
MP		 4967 return 0;
4968}
4969
db064e50 4970/*
6d859065 4971 * STAC9872 hack
db064e50
TI		 4972 */
4973
2b63536f 4974static const struct hda_verb stac9872_core_init[] = {
1624cb9a 4975 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4976 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4977 {}
4978};
4979
fc268c10
TI		 4980static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4981 { 0x0a, 0x03211020 },
4982 { 0x0b, 0x411111f0 },
4983 { 0x0c, 0x411111f0 },
4984 { 0x0d, 0x03a15030 },
4985 { 0x0e, 0x411111f0 },
4986 { 0x0f, 0x90170110 },
4987 { 0x11, 0x411111f0 },
4988 { 0x13, 0x411111f0 },
4989 { 0x14, 0x90a7013e },
4990 {}
307282c8
TI		 4991};
4992
fc268c10
TI		 4993static const struct hda_model_fixup stac9872_models[] = {
4994 { .id = STAC_9872_VAIO, .name = "vaio" },
4995 {}
307282c8
TI		 4996};
4997
fc268c10
TI		 4998static const struct hda_fixup stac9872_fixups[] = {
4999 [STAC_9872_VAIO] = {
5000 .type = HDA_FIXUP_PINS,
5001 .v.pins = stac9872_vaio_pin_configs,
5002 },
307282c8
TI		 5003};
5004
fc268c10 5005static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
b04add95
TI		 5006 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
5007 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI		 5008 {} /* terminator */
5009};
5010
6d859065 5011static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5012{
5013 struct sigmatel_spec *spec;
1e137f92 5014 int err;
db064e50 5015
36c9db7a 5016 err = alloc_stac_spec(codec);
361dab3e
TI		 5017 if (err < 0)
5018 return err;
5019
5020 spec = codec->spec;
1b0e372d 5021 spec->linear_tone_beep = 1;
36c9db7a 5022 spec->gen.own_eapd_ctl = 1;
caa10b6e 5023
fc268c10
TI		 5024 snd_hda_add_verbs(codec, stac9872_core_init);
5025
36c9db7a
TI		 5026 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
5027 stac9872_fixups);
fc268c10 5028 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
1e137f92 5029
36c9db7a 5030 err = stac_parse_auto_config(codec);
1e137f92 5031 if (err < 0) {
36c9db7a 5032 stac_free(codec);
1e137f92
TI		 5033 return -EINVAL;
5034 }
fc268c10
TI		 5035
5036 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
5037
db064e50
TI		 5038 return 0;
5039}
5040
5041
2f2f4251
M		 5042/*
5043 * patch entries
5044 */
b9a94a9c
TI		 5045static const struct hda_device_id snd_hda_id_sigmatel[] = {
5046 HDA_CODEC_ENTRY(0x83847690, "STAC9200", patch_stac9200),
5047 HDA_CODEC_ENTRY(0x83847882, "STAC9220 A1", patch_stac922x),
5048 HDA_CODEC_ENTRY(0x83847680, "STAC9221 A1", patch_stac922x),
5049 HDA_CODEC_ENTRY(0x83847880, "STAC9220 A2", patch_stac922x),
5050 HDA_CODEC_ENTRY(0x83847681, "STAC9220D/9223D A2", patch_stac922x),
5051 HDA_CODEC_ENTRY(0x83847682, "STAC9221 A2", patch_stac922x),
5052 HDA_CODEC_ENTRY(0x83847683, "STAC9221D A2", patch_stac922x),
5053 HDA_CODEC_ENTRY(0x83847618, "STAC9227", patch_stac927x),
5054 HDA_CODEC_ENTRY(0x83847619, "STAC9227", patch_stac927x),
078502b5 5055 HDA_CODEC_ENTRY(0x83847638, "STAC92HD700", patch_stac927x),
b9a94a9c
TI		 5056 HDA_CODEC_ENTRY(0x83847616, "STAC9228", patch_stac927x),
5057 HDA_CODEC_ENTRY(0x83847617, "STAC9228", patch_stac927x),
5058 HDA_CODEC_ENTRY(0x83847614, "STAC9229", patch_stac927x),
5059 HDA_CODEC_ENTRY(0x83847615, "STAC9229", patch_stac927x),
5060 HDA_CODEC_ENTRY(0x83847620, "STAC9274", patch_stac927x),
5061 HDA_CODEC_ENTRY(0x83847621, "STAC9274D", patch_stac927x),
5062 HDA_CODEC_ENTRY(0x83847622, "STAC9273X", patch_stac927x),
5063 HDA_CODEC_ENTRY(0x83847623, "STAC9273D", patch_stac927x),
5064 HDA_CODEC_ENTRY(0x83847624, "STAC9272X", patch_stac927x),
5065 HDA_CODEC_ENTRY(0x83847625, "STAC9272D", patch_stac927x),
5066 HDA_CODEC_ENTRY(0x83847626, "STAC9271X", patch_stac927x),
5067 HDA_CODEC_ENTRY(0x83847627, "STAC9271D", patch_stac927x),
5068 HDA_CODEC_ENTRY(0x83847628, "STAC9274X5NH", patch_stac927x),
5069 HDA_CODEC_ENTRY(0x83847629, "STAC9274D5NH", patch_stac927x),
5070 HDA_CODEC_ENTRY(0x83847632, "STAC9202", patch_stac925x),
5071 HDA_CODEC_ENTRY(0x83847633, "STAC9202D", patch_stac925x),
5072 HDA_CODEC_ENTRY(0x83847634, "STAC9250", patch_stac925x),
5073 HDA_CODEC_ENTRY(0x83847635, "STAC9250D", patch_stac925x),
5074 HDA_CODEC_ENTRY(0x83847636, "STAC9251", patch_stac925x),
5075 HDA_CODEC_ENTRY(0x83847637, "STAC9250D", patch_stac925x),
5076 HDA_CODEC_ENTRY(0x83847645, "92HD206X", patch_stac927x),
5077 HDA_CODEC_ENTRY(0x83847646, "92HD206D", patch_stac927x),
5078 /* The following does not take into account .id=0x83847661 when subsys =
5079 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5080 * currently not fully supported.
5081 */
5082 HDA_CODEC_ENTRY(0x83847661, "CXD9872RD/K", patch_stac9872),
5083 HDA_CODEC_ENTRY(0x83847662, "STAC9872AK", patch_stac9872),
5084 HDA_CODEC_ENTRY(0x83847664, "CXD9872AKD", patch_stac9872),
5085 HDA_CODEC_ENTRY(0x83847698, "STAC9205", patch_stac9205),
5086 HDA_CODEC_ENTRY(0x838476a0, "STAC9205", patch_stac9205),
5087 HDA_CODEC_ENTRY(0x838476a1, "STAC9205D", patch_stac9205),
5088 HDA_CODEC_ENTRY(0x838476a2, "STAC9204", patch_stac9205),
5089 HDA_CODEC_ENTRY(0x838476a3, "STAC9204D", patch_stac9205),
5090 HDA_CODEC_ENTRY(0x838476a4, "STAC9255", patch_stac9205),
5091 HDA_CODEC_ENTRY(0x838476a5, "STAC9255D", patch_stac9205),
5092 HDA_CODEC_ENTRY(0x838476a6, "STAC9254", patch_stac9205),
5093 HDA_CODEC_ENTRY(0x838476a7, "STAC9254D", patch_stac9205),
5094 HDA_CODEC_ENTRY(0x111d7603, "92HD75B3X5", patch_stac92hd71bxx),
5095 HDA_CODEC_ENTRY(0x111d7604, "92HD83C1X5", patch_stac92hd83xxx),
5096 HDA_CODEC_ENTRY(0x111d76d4, "92HD83C1C5", patch_stac92hd83xxx),
5097 HDA_CODEC_ENTRY(0x111d7605, "92HD81B1X5", patch_stac92hd83xxx),
5098 HDA_CODEC_ENTRY(0x111d76d5, "92HD81B1C5", patch_stac92hd83xxx),
5099 HDA_CODEC_ENTRY(0x111d76d1, "92HD87B1/3", patch_stac92hd83xxx),
5100 HDA_CODEC_ENTRY(0x111d76d9, "92HD87B2/4", patch_stac92hd83xxx),
5101 HDA_CODEC_ENTRY(0x111d7666, "92HD88B3", patch_stac92hd83xxx),
5102 HDA_CODEC_ENTRY(0x111d7667, "92HD88B1", patch_stac92hd83xxx),
5103 HDA_CODEC_ENTRY(0x111d7668, "92HD88B2", patch_stac92hd83xxx),
5104 HDA_CODEC_ENTRY(0x111d7669, "92HD88B4", patch_stac92hd83xxx),
5105 HDA_CODEC_ENTRY(0x111d7608, "92HD75B2X5", patch_stac92hd71bxx),
5106 HDA_CODEC_ENTRY(0x111d7674, "92HD73D1X5", patch_stac92hd73xx),
5107 HDA_CODEC_ENTRY(0x111d7675, "92HD73C1X5", patch_stac92hd73xx),
5108 HDA_CODEC_ENTRY(0x111d7676, "92HD73E1X5", patch_stac92hd73xx),
5109 HDA_CODEC_ENTRY(0x111d7695, "92HD95", patch_stac92hd95),
5110 HDA_CODEC_ENTRY(0x111d76b0, "92HD71B8X", patch_stac92hd71bxx),
5111 HDA_CODEC_ENTRY(0x111d76b1, "92HD71B8X", patch_stac92hd71bxx),
5112 HDA_CODEC_ENTRY(0x111d76b2, "92HD71B7X", patch_stac92hd71bxx),
5113 HDA_CODEC_ENTRY(0x111d76b3, "92HD71B7X", patch_stac92hd71bxx),
5114 HDA_CODEC_ENTRY(0x111d76b4, "92HD71B6X", patch_stac92hd71bxx),
5115 HDA_CODEC_ENTRY(0x111d76b5, "92HD71B6X", patch_stac92hd71bxx),
5116 HDA_CODEC_ENTRY(0x111d76b6, "92HD71B5X", patch_stac92hd71bxx),
5117 HDA_CODEC_ENTRY(0x111d76b7, "92HD71B5X", patch_stac92hd71bxx),
5118 HDA_CODEC_ENTRY(0x111d76c0, "92HD89C3", patch_stac92hd73xx),
5119 HDA_CODEC_ENTRY(0x111d76c1, "92HD89C2", patch_stac92hd73xx),
5120 HDA_CODEC_ENTRY(0x111d76c2, "92HD89C1", patch_stac92hd73xx),
5121 HDA_CODEC_ENTRY(0x111d76c3, "92HD89B3", patch_stac92hd73xx),
5122 HDA_CODEC_ENTRY(0x111d76c4, "92HD89B2", patch_stac92hd73xx),
5123 HDA_CODEC_ENTRY(0x111d76c5, "92HD89B1", patch_stac92hd73xx),
5124 HDA_CODEC_ENTRY(0x111d76c6, "92HD89E3", patch_stac92hd73xx),
5125 HDA_CODEC_ENTRY(0x111d76c7, "92HD89E2", patch_stac92hd73xx),
5126 HDA_CODEC_ENTRY(0x111d76c8, "92HD89E1", patch_stac92hd73xx),
5127 HDA_CODEC_ENTRY(0x111d76c9, "92HD89D3", patch_stac92hd73xx),
5128 HDA_CODEC_ENTRY(0x111d76ca, "92HD89D2", patch_stac92hd73xx),
5129 HDA_CODEC_ENTRY(0x111d76cb, "92HD89D1", patch_stac92hd73xx),
5130 HDA_CODEC_ENTRY(0x111d76cc, "92HD89F3", patch_stac92hd73xx),
5131 HDA_CODEC_ENTRY(0x111d76cd, "92HD89F2", patch_stac92hd73xx),
5132 HDA_CODEC_ENTRY(0x111d76ce, "92HD89F1", patch_stac92hd73xx),
5133 HDA_CODEC_ENTRY(0x111d76df, "92HD93BXX", patch_stac92hd83xxx),
5134 HDA_CODEC_ENTRY(0x111d76e0, "92HD91BXX", patch_stac92hd83xxx),
5135 HDA_CODEC_ENTRY(0x111d76e3, "92HD98BXX", patch_stac92hd83xxx),
5136 HDA_CODEC_ENTRY(0x111d76e5, "92HD99BXX", patch_stac92hd83xxx),
5137 HDA_CODEC_ENTRY(0x111d76e7, "92HD90BXX", patch_stac92hd83xxx),
5138 HDA_CODEC_ENTRY(0x111d76e8, "92HD66B1X5", patch_stac92hd83xxx),
5139 HDA_CODEC_ENTRY(0x111d76e9, "92HD66B2X5", patch_stac92hd83xxx),
5140 HDA_CODEC_ENTRY(0x111d76ea, "92HD66B3X5", patch_stac92hd83xxx),
5141 HDA_CODEC_ENTRY(0x111d76eb, "92HD66C1X5", patch_stac92hd83xxx),
5142 HDA_CODEC_ENTRY(0x111d76ec, "92HD66C2X5", patch_stac92hd83xxx),
5143 HDA_CODEC_ENTRY(0x111d76ed, "92HD66C3X5", patch_stac92hd83xxx),
5144 HDA_CODEC_ENTRY(0x111d76ee, "92HD66B1X3", patch_stac92hd83xxx),
5145 HDA_CODEC_ENTRY(0x111d76ef, "92HD66B2X3", patch_stac92hd83xxx),
5146 HDA_CODEC_ENTRY(0x111d76f0, "92HD66B3X3", patch_stac92hd83xxx),
5147 HDA_CODEC_ENTRY(0x111d76f1, "92HD66C1X3", patch_stac92hd83xxx),
5148 HDA_CODEC_ENTRY(0x111d76f2, "92HD66C2X3", patch_stac92hd83xxx),
5149 HDA_CODEC_ENTRY(0x111d76f3, "92HD66C3/65", patch_stac92hd83xxx),
2f2f4251
M		 5150 {} /* terminator */
5151};
b9a94a9c 5152MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_sigmatel);
1289e9e8
TI		 5153
5154MODULE_LICENSE("GPL");
5155MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5156
d8a766a1 5157static struct hda_codec_driver sigmatel_driver = {
b9a94a9c 5158 .id = snd_hda_id_sigmatel,
1289e9e8
TI		 5159};
5160
d8a766a1 5161module_hda_codec_driver(sigmatel_driver);
Linux 6.x block layer and io_uring tree(s)