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Merge branch 'topic/hda' into for-linus
[linux-block.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
2f2f4251 32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
45a6ac16 34#include <sound/jack.h>
a74ccea5 35#include <sound/tlv.h>
2f2f4251
M		 36#include "hda_codec.h"
37#include "hda_local.h"
1cd2224c 38#include "hda_beep.h"
2f2f4251 39
c6e4c666
TI		 40enum {
41 STAC_VREF_EVENT = 1,
42 STAC_INSERT_EVENT,
43 STAC_PWR_EVENT,
44 STAC_HP_EVENT,
fefd67f3 45 STAC_LO_EVENT,
3d21d3f7 46 STAC_MIC_EVENT,
c6e4c666 47};
4e55096e 48
f5fcc13c 49enum {
1607b8ea 50 STAC_AUTO,
f5fcc13c 51 STAC_REF,
bf277785 52 STAC_9200_OQO,
dfe495d0
TI		 53 STAC_9200_DELL_D21,
54 STAC_9200_DELL_D22,
55 STAC_9200_DELL_D23,
56 STAC_9200_DELL_M21,
57 STAC_9200_DELL_M22,
58 STAC_9200_DELL_M23,
59 STAC_9200_DELL_M24,
60 STAC_9200_DELL_M25,
61 STAC_9200_DELL_M26,
62 STAC_9200_DELL_M27,
58eec423
MCC		 63 STAC_9200_M4,
64 STAC_9200_M4_2,
117f257d 65 STAC_9200_PANASONIC,
f5fcc13c
TI		 66 STAC_9200_MODELS
67};
68
69enum {
1607b8ea 70 STAC_9205_AUTO,
f5fcc13c 71 STAC_9205_REF,
dfe495d0 72 STAC_9205_DELL_M42,
ae0a8ed8
TD		 73 STAC_9205_DELL_M43,
74 STAC_9205_DELL_M44,
d9a4268e 75 STAC_9205_EAPD,
f5fcc13c
TI		 76 STAC_9205_MODELS
77};
78
e1f0d669 79enum {
1607b8ea 80 STAC_92HD73XX_AUTO,
9e43f0de 81 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 82 STAC_92HD73XX_REF,
ae709440 83 STAC_92HD73XX_INTEL,
661cd8fb
TI		 84 STAC_DELL_M6_AMIC,
85 STAC_DELL_M6_DMIC,
86 STAC_DELL_M6_BOTH,
6b3ab21e 87 STAC_DELL_EQ,
842ae638 88 STAC_ALIENWARE_M17X,
e1f0d669
MR		 89 STAC_92HD73XX_MODELS
90};
91
d0513fc6 92enum {
1607b8ea 93 STAC_92HD83XXX_AUTO,
d0513fc6 94 STAC_92HD83XXX_REF,
32ed3f46 95 STAC_92HD83XXX_PWR_REF,
8bb0ac55 96 STAC_DELL_S14,
b4e81876 97 STAC_92HD83XXX_HP,
48315590 98 STAC_HP_DV7_4000,
d0513fc6
MR		 99 STAC_92HD83XXX_MODELS
100};
101
e035b841 102enum {
1607b8ea 103 STAC_92HD71BXX_AUTO,
e035b841 104 STAC_92HD71BXX_REF,
a7662640
MR		 105 STAC_DELL_M4_1,
106 STAC_DELL_M4_2,
3a7abfd2 107 STAC_DELL_M4_3,
6a14f585 108 STAC_HP_M4,
2a6ce6e5 109 STAC_HP_DV4,
1b0652eb 110 STAC_HP_DV5,
ae6241fb 111 STAC_HP_HDX,
514bf54c 112 STAC_HP_DV4_1222NR,
e035b841
MR		 113 STAC_92HD71BXX_MODELS
114};
115
8e21c34c 116enum {
1607b8ea 117 STAC_925x_AUTO,
8e21c34c 118 STAC_925x_REF,
9cb36c2a
MCC		 119 STAC_M1,
120 STAC_M1_2,
121 STAC_M2,
8e21c34c 122 STAC_M2_2,
9cb36c2a
MCC		 123 STAC_M3,
124 STAC_M5,
125 STAC_M6,
8e21c34c
TD		 126 STAC_925x_MODELS
127};
128
f5fcc13c 129enum {
1607b8ea 130 STAC_922X_AUTO,
f5fcc13c
TI		 131 STAC_D945_REF,
132 STAC_D945GTP3,
133 STAC_D945GTP5,
5d5d3bc3
IZ		 134 STAC_INTEL_MAC_V1,
135 STAC_INTEL_MAC_V2,
136 STAC_INTEL_MAC_V3,
137 STAC_INTEL_MAC_V4,
138 STAC_INTEL_MAC_V5,
536319af
NB		 139 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
140 * is given, one of the above models will be
141 * chosen according to the subsystem id. */
dfe495d0 142 /* for backward compatibility */
f5fcc13c 143 STAC_MACMINI,
3fc24d85 144 STAC_MACBOOK,
6f0778d8
NB		 145 STAC_MACBOOK_PRO_V1,
146 STAC_MACBOOK_PRO_V2,
f16928fb 147 STAC_IMAC_INTEL,
0dae0f83 148 STAC_IMAC_INTEL_20,
8c650087 149 STAC_ECS_202,
dfe495d0
TI		 150 STAC_922X_DELL_D81,
151 STAC_922X_DELL_D82,
152 STAC_922X_DELL_M81,
153 STAC_922X_DELL_M82,
f5fcc13c
TI		 154 STAC_922X_MODELS
155};
156
157enum {
1607b8ea 158 STAC_927X_AUTO,
e28d8322 159 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 160 STAC_D965_REF,
161 STAC_D965_3ST,
162 STAC_D965_5ST,
679d92ed 163 STAC_D965_5ST_NO_FP,
4ff076e5 164 STAC_DELL_3ST,
8e9068b1 165 STAC_DELL_BIOS,
54930531 166 STAC_927X_VOLKNOB,
f5fcc13c
TI		 167 STAC_927X_MODELS
168};
403d1944 169
307282c8
TI		 170enum {
171 STAC_9872_AUTO,
172 STAC_9872_VAIO,
173 STAC_9872_MODELS
174};
175
74aeaabc
MR		 176struct sigmatel_event {
177 hda_nid_t nid;
c6e4c666
TI		 178 unsigned char type;
179 unsigned char tag;
74aeaabc
MR		 180 int data;
181};
182
183struct sigmatel_jack {
184 hda_nid_t nid;
185 int type;
186 struct snd_jack *jack;
187};
188
3d21d3f7
TI		 189struct sigmatel_mic_route {
190 hda_nid_t pin;
02d33322
TI		 191 signed char mux_idx;
192 signed char dmux_idx;
3d21d3f7
TI		 193};
194
2f2f4251 195struct sigmatel_spec {
c8b6bf9b 196 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 197 unsigned int num_mixers;
198
403d1944 199 int board_config;
c0cea0d0 200 unsigned int eapd_switch: 1;
c7d4b2fa 201 unsigned int surr_switch: 1;
3cc08dc6 202 unsigned int alt_switch: 1;
82bc955f 203 unsigned int hp_detect: 1;
00ef50c2 204 unsigned int spdif_mute: 1;
7c7767eb 205 unsigned int check_volume_offset:1;
3d21d3f7 206 unsigned int auto_mic:1;
1b0e372d 207 unsigned int linear_tone_beep:1;
c7d4b2fa 208
4fe5195c 209 /* gpio lines */
0fc9dec4 210 unsigned int eapd_mask;
4fe5195c
MR		 211 unsigned int gpio_mask;
212 unsigned int gpio_dir;
213 unsigned int gpio_data;
214 unsigned int gpio_mute;
86d190e7 215 unsigned int gpio_led;
c357aab0 216 unsigned int gpio_led_polarity;
4fe5195c 217
8daaaa97
MR		 218 /* stream */
219 unsigned int stream_delay;
220
4fe5195c 221 /* analog loopback */
d78d7a90 222 struct snd_kcontrol_new *aloopback_ctl;
e1f0d669
MR		 223 unsigned char aloopback_mask;
224 unsigned char aloopback_shift;
8259980e 225
a64135a2
MR		 226 /* power management */
227 unsigned int num_pwrs;
d0513fc6 228 unsigned int *pwr_mapping;
a64135a2 229 hda_nid_t *pwr_nids;
b76c850f 230 hda_nid_t *dac_list;
a64135a2 231
74aeaabc
MR		 232 /* jack detection */
233 struct snd_array jacks;
234
235 /* events */
236 struct snd_array events;
237
2f2f4251 238 /* playback */
b22b4821
MR		 239 struct hda_input_mux *mono_mux;
240 unsigned int cur_mmux;
2f2f4251 241 struct hda_multi_out multiout;
3cc08dc6 242 hda_nid_t dac_nids[5];
c21ca4a8
TI		 243 hda_nid_t hp_dacs[5];
244 hda_nid_t speaker_dacs[5];
2f2f4251 245
7c7767eb
TI		 246 int volume_offset;
247
2f2f4251
M		 248 /* capture */
249 hda_nid_t *adc_nids;
2f2f4251 250 unsigned int num_adcs;
dabbed6f
M		 251 hda_nid_t *mux_nids;
252 unsigned int num_muxes;
8b65727b
MP		 253 hda_nid_t *dmic_nids;
254 unsigned int num_dmics;
e1f0d669 255 hda_nid_t *dmux_nids;
1697055e 256 unsigned int num_dmuxes;
d9737751
MR		 257 hda_nid_t *smux_nids;
258 unsigned int num_smuxes;
5207e10e 259 unsigned int num_analog_muxes;
6479c631
TI		 260
261 unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */
262 unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */
263 unsigned int num_caps; /* number of capture volume/switch elements */
264
3d21d3f7
TI		 265 struct sigmatel_mic_route ext_mic;
266 struct sigmatel_mic_route int_mic;
9907790a 267 struct sigmatel_mic_route dock_mic;
3d21d3f7 268
65973632 269 const char **spdif_labels;
d9737751 270
dabbed6f 271 hda_nid_t dig_in_nid;
b22b4821 272 hda_nid_t mono_nid;
1cd2224c
MR		 273 hda_nid_t anabeep_nid;
274 hda_nid_t digbeep_nid;
2f2f4251 275
2f2f4251
M		 276 /* pin widgets */
277 hda_nid_t *pin_nids;
278 unsigned int num_pins;
2f2f4251
M		 279
280 /* codec specific stuff */
281 struct hda_verb *init;
c8b6bf9b 282 struct snd_kcontrol_new *mixer;
2f2f4251
M		 283
284 /* capture source */
8b65727b 285 struct hda_input_mux *dinput_mux;
e1f0d669 286 unsigned int cur_dmux[2];
c7d4b2fa 287 struct hda_input_mux *input_mux;
3cc08dc6 288 unsigned int cur_mux[3];
d9737751
MR		 289 struct hda_input_mux *sinput_mux;
290 unsigned int cur_smux[2];
2a9c7816
MR		 291 unsigned int cur_amux;
292 hda_nid_t *amp_nids;
8daaaa97 293 unsigned int powerdown_adcs;
2f2f4251 294
403d1944
MP		 295 /* i/o switches */
296 unsigned int io_switch[2];
0fb87bb4 297 unsigned int clfe_swap;
c21ca4a8
TI		 298 hda_nid_t line_switch; /* shared line-in for input and output */
299 hda_nid_t mic_switch; /* shared mic-in for input and output */
300 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 301 unsigned int aloopback;
2f2f4251 302
c7d4b2fa
M		 303 struct hda_pcm pcm_rec[2]; /* PCM information */
304
305 /* dynamic controls and input_mux */
306 struct auto_pin_cfg autocfg;
603c4019 307 struct snd_array kctls;
8b65727b 308 struct hda_input_mux private_dimux;
c7d4b2fa 309 struct hda_input_mux private_imux;
d9737751 310 struct hda_input_mux private_smux;
b22b4821 311 struct hda_input_mux private_mono_mux;
2f2f4251
M		 312};
313
314static hda_nid_t stac9200_adc_nids[1] = {
315 0x03,
316};
317
318static hda_nid_t stac9200_mux_nids[1] = {
319 0x0c,
320};
321
322static hda_nid_t stac9200_dac_nids[1] = {
323 0x02,
324};
325
a64135a2
MR		 326static hda_nid_t stac92hd73xx_pwr_nids[8] = {
327 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
328 0x0f, 0x10, 0x11
329};
330
0ffa9807
MR		 331static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
332 0x26, 0,
333};
334
e1f0d669
MR		 335static hda_nid_t stac92hd73xx_adc_nids[2] = {
336 0x1a, 0x1b
337};
338
339#define STAC92HD73XX_NUM_DMICS 2
340static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
341 0x13, 0x14, 0
342};
343
344#define STAC92HD73_DAC_COUNT 5
e1f0d669 345
e2aec171
TI		 346static hda_nid_t stac92hd73xx_mux_nids[2] = {
347 0x20, 0x21,
e1f0d669
MR		 348};
349
350static hda_nid_t stac92hd73xx_dmux_nids[2] = {
351 0x20, 0x21,
352};
353
d9737751
MR		 354static hda_nid_t stac92hd73xx_smux_nids[2] = {
355 0x22, 0x23,
356};
357
6479c631
TI		 358#define STAC92HD73XX_NUM_CAPS 2
359static unsigned long stac92hd73xx_capvols[] = {
360 HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT),
361 HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT),
362};
363#define stac92hd73xx_capsws stac92hd73xx_capvols
364
d0513fc6 365#define STAC92HD83_DAC_COUNT 3
d0513fc6 366
667067d8 367static hda_nid_t stac92hd83xxx_mux_nids[2] = {
d0513fc6
MR		 368 0x17, 0x18,
369};
370
371static hda_nid_t stac92hd83xxx_adc_nids[2] = {
372 0x15, 0x16,
373};
374
375static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
376 0xa, 0xb, 0xd, 0xe,
377};
378
0ffa9807
MR		 379static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
380 0x1e, 0,
381};
382
d0513fc6 383static unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 384 0x03, 0x0c, 0x20, 0x40,
d0513fc6
MR		 385};
386
ab5a6ebe
VK		 387#define STAC92HD83XXX_NUM_DMICS 2
388static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
389 0x11, 0x20, 0
390};
391
6479c631
TI		 392#define STAC92HD83XXX_NUM_CAPS 2
393static unsigned long stac92hd83xxx_capvols[] = {
394 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_OUTPUT),
395 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_OUTPUT),
396};
397#define stac92hd83xxx_capsws stac92hd83xxx_capvols
398
a64135a2
MR		 399static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
400 0x0a, 0x0d, 0x0f
401};
402
e035b841
MR		 403static hda_nid_t stac92hd71bxx_adc_nids[2] = {
404 0x12, 0x13,
405};
406
407static hda_nid_t stac92hd71bxx_mux_nids[2] = {
408 0x1a, 0x1b
409};
410
4b33c767
MR		 411static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
412 0x1c, 0x1d,
e1f0d669
MR		 413};
414
d9737751
MR		 415static hda_nid_t stac92hd71bxx_smux_nids[2] = {
416 0x24, 0x25,
417};
418
e035b841
MR		 419#define STAC92HD71BXX_NUM_DMICS 2
420static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
421 0x18, 0x19, 0
422};
423
0ffa9807
MR		 424static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
425 0x22, 0
426};
427
6479c631
TI		 428#define STAC92HD71BXX_NUM_CAPS 2
429static unsigned long stac92hd71bxx_capvols[] = {
430 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
431 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
432};
433#define stac92hd71bxx_capsws stac92hd71bxx_capvols
434
8e21c34c
TD		 435static hda_nid_t stac925x_adc_nids[1] = {
436 0x03,
437};
438
439static hda_nid_t stac925x_mux_nids[1] = {
440 0x0f,
441};
442
443static hda_nid_t stac925x_dac_nids[1] = {
444 0x02,
445};
446
f6e9852a
TI		 447#define STAC925X_NUM_DMICS 1
448static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
449 0x15, 0
2c11f955
TD		 450};
451
1697055e
TI		 452static hda_nid_t stac925x_dmux_nids[1] = {
453 0x14,
454};
455
6479c631
TI		 456static unsigned long stac925x_capvols[] = {
457 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT),
458};
459static unsigned long stac925x_capsws[] = {
460 HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT),
461};
462
2f2f4251
M		 463static hda_nid_t stac922x_adc_nids[2] = {
464 0x06, 0x07,
465};
466
467static hda_nid_t stac922x_mux_nids[2] = {
468 0x12, 0x13,
469};
470
6479c631
TI		 471#define STAC922X_NUM_CAPS 2
472static unsigned long stac922x_capvols[] = {
473 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT),
474 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
475};
476#define stac922x_capsws stac922x_capvols
477
45c1d85b
MR		 478static hda_nid_t stac927x_slave_dig_outs[2] = {
479 0x1f, 0,
480};
481
3cc08dc6
MP		 482static hda_nid_t stac927x_adc_nids[3] = {
483 0x07, 0x08, 0x09
484};
485
486static hda_nid_t stac927x_mux_nids[3] = {
487 0x15, 0x16, 0x17
488};
489
d9737751
MR		 490static hda_nid_t stac927x_smux_nids[1] = {
491 0x21,
492};
493
b76c850f
MR		 494static hda_nid_t stac927x_dac_nids[6] = {
495 0x02, 0x03, 0x04, 0x05, 0x06, 0
496};
497
e1f0d669
MR		 498static hda_nid_t stac927x_dmux_nids[1] = {
499 0x1b,
500};
501
7f16859a
MR		 502#define STAC927X_NUM_DMICS 2
503static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
504 0x13, 0x14, 0
505};
506
6479c631
TI		 507#define STAC927X_NUM_CAPS 3
508static unsigned long stac927x_capvols[] = {
509 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
510 HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT),
511 HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT),
512};
513static unsigned long stac927x_capsws[] = {
514 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT),
515 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
516 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
517};
518
65973632
MR		 519static const char *stac927x_spdif_labels[5] = {
520 "Digital Playback", "ADAT", "Analog Mux 1",
521 "Analog Mux 2", "Analog Mux 3"
522};
523
f3302a59
MP		 524static hda_nid_t stac9205_adc_nids[2] = {
525 0x12, 0x13
526};
527
528static hda_nid_t stac9205_mux_nids[2] = {
529 0x19, 0x1a
530};
531
e1f0d669 532static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 533 0x1d,
e1f0d669
MR		 534};
535
d9737751
MR		 536static hda_nid_t stac9205_smux_nids[1] = {
537 0x21,
538};
539
f6e9852a
TI		 540#define STAC9205_NUM_DMICS 2
541static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
542 0x17, 0x18, 0
8b65727b
MP		 543};
544
6479c631
TI		 545#define STAC9205_NUM_CAPS 2
546static unsigned long stac9205_capvols[] = {
547 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT),
548 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT),
549};
550static unsigned long stac9205_capsws[] = {
551 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
552 HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT),
553};
554
c7d4b2fa 555static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 556 0x08, 0x09, 0x0d, 0x0e,
557 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 558};
559
8e21c34c
TD		 560static hda_nid_t stac925x_pin_nids[8] = {
561 0x07, 0x08, 0x0a, 0x0b,
562 0x0c, 0x0d, 0x10, 0x11,
563};
564
2f2f4251
M		 565static hda_nid_t stac922x_pin_nids[10] = {
566 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
567 0x0f, 0x10, 0x11, 0x15, 0x1b,
568};
569
a7662640 570static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 571 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
572 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 573 0x14, 0x22, 0x23
e1f0d669
MR		 574};
575
8bb0ac55 576static hda_nid_t stac92hd83xxx_pin_nids[10] = {
d0513fc6 577 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
8bb0ac55 578 0x0f, 0x10, 0x11, 0x1f, 0x20,
d0513fc6 579};
616f89e7 580
36706005
CC		 581static hda_nid_t stac92hd88xxx_pin_nids[10] = {
582 0x0a, 0x0b, 0x0c, 0x0d,
583 0x0f, 0x11, 0x1f, 0x20,
584};
585
616f89e7
HRK		 586#define STAC92HD71BXX_NUM_PINS 13
587static hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
588 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
589 0x00, 0x14, 0x18, 0x19, 0x1e,
590 0x1f, 0x20, 0x27
591};
592static hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR		 593 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
594 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 595 0x1f, 0x20, 0x27
e035b841
MR		 596};
597
3cc08dc6
MP		 598static hda_nid_t stac927x_pin_nids[14] = {
599 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
600 0x0f, 0x10, 0x11, 0x12, 0x13,
601 0x14, 0x21, 0x22, 0x23,
602};
603
f3302a59
MP		 604static hda_nid_t stac9205_pin_nids[12] = {
605 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
606 0x0f, 0x14, 0x16, 0x17, 0x18,
607 0x21, 0x22,
f3302a59
MP		 608};
609
8b65727b
MP		 610static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
611 struct snd_ctl_elem_info *uinfo)
612{
613 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
614 struct sigmatel_spec *spec = codec->spec;
615 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
616}
617
618static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
619 struct snd_ctl_elem_value *ucontrol)
620{
621 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
622 struct sigmatel_spec *spec = codec->spec;
e1f0d669 623 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 624
e1f0d669 625 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 626 return 0;
627}
628
629static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
630 struct snd_ctl_elem_value *ucontrol)
631{
632 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
633 struct sigmatel_spec *spec = codec->spec;
e1f0d669 634 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 635
636 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 637 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 638}
639
d9737751
MR		 640static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
641 struct snd_ctl_elem_info *uinfo)
642{
643 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
644 struct sigmatel_spec *spec = codec->spec;
645 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
646}
647
648static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
649 struct snd_ctl_elem_value *ucontrol)
650{
651 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
652 struct sigmatel_spec *spec = codec->spec;
653 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
654
655 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
656 return 0;
657}
658
659static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
660 struct snd_ctl_elem_value *ucontrol)
661{
662 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
663 struct sigmatel_spec *spec = codec->spec;
00ef50c2 664 struct hda_input_mux *smux = &spec->private_smux;
d9737751 665 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 666 int err, val;
667 hda_nid_t nid;
d9737751 668
00ef50c2 669 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 670 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 671 if (err < 0)
672 return err;
673
674 if (spec->spdif_mute) {
675 if (smux_idx == 0)
676 nid = spec->multiout.dig_out_nid;
677 else
678 nid = codec->slave_dig_outs[smux_idx - 1];
679 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 680 val = HDA_AMP_MUTE;
00ef50c2 681 else
c9b46f91 682 val = 0;
00ef50c2 683 /* un/mute SPDIF out */
c9b46f91
TI		 684 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
685 HDA_AMP_MUTE, val);
00ef50c2
MR		 686 }
687 return 0;
d9737751
MR		 688}
689
2fc99890
NL		 690static unsigned int stac92xx_vref_set(struct hda_codec *codec,
691 hda_nid_t nid, unsigned int new_vref)
692{
b8621516 693 int error;
2fc99890
NL		 694 unsigned int pincfg;
695 pincfg = snd_hda_codec_read(codec, nid, 0,
696 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
697
698 pincfg &= 0xff;
699 pincfg &= ~(AC_PINCTL_VREFEN | AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
700 pincfg |= new_vref;
701
702 if (new_vref == AC_PINCTL_VREF_HIZ)
703 pincfg |= AC_PINCTL_OUT_EN;
704 else
705 pincfg |= AC_PINCTL_IN_EN;
706
707 error = snd_hda_codec_write_cache(codec, nid, 0,
708 AC_VERB_SET_PIN_WIDGET_CONTROL, pincfg);
709 if (error < 0)
710 return error;
711 else
712 return 1;
713}
714
715static unsigned int stac92xx_vref_get(struct hda_codec *codec, hda_nid_t nid)
716{
717 unsigned int vref;
718 vref = snd_hda_codec_read(codec, nid, 0,
719 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
720 vref &= AC_PINCTL_VREFEN;
721 return vref;
722}
723
c8b6bf9b 724static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 725{
726 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
727 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 728 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 729}
730
c8b6bf9b 731static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 732{
733 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
734 struct sigmatel_spec *spec = codec->spec;
735 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
736
737 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
738 return 0;
739}
740
c8b6bf9b 741static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 742{
743 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
744 struct sigmatel_spec *spec = codec->spec;
745 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5207e10e
TI		 746 const struct hda_input_mux *imux = spec->input_mux;
747 unsigned int idx, prev_idx;
748
749 idx = ucontrol->value.enumerated.item[0];
750 if (idx >= imux->num_items)
751 idx = imux->num_items - 1;
752 prev_idx = spec->cur_mux[adc_idx];
753 if (prev_idx == idx)
754 return 0;
755 if (idx < spec->num_analog_muxes) {
756 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
757 AC_VERB_SET_CONNECT_SEL,
758 imux->items[idx].index);
759 if (prev_idx >= spec->num_analog_muxes) {
760 imux = spec->dinput_mux;
761 /* 0 = analog */
762 snd_hda_codec_write_cache(codec,
763 spec->dmux_nids[adc_idx], 0,
764 AC_VERB_SET_CONNECT_SEL,
765 imux->items[0].index);
766 }
767 } else {
768 imux = spec->dinput_mux;
769 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
770 AC_VERB_SET_CONNECT_SEL,
771 imux->items[idx - 1].index);
772 }
773 spec->cur_mux[adc_idx] = idx;
774 return 1;
2f2f4251
M		 775}
776
b22b4821
MR		 777static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
778 struct snd_ctl_elem_info *uinfo)
779{
780 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
781 struct sigmatel_spec *spec = codec->spec;
782 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
783}
784
785static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
786 struct snd_ctl_elem_value *ucontrol)
787{
788 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
789 struct sigmatel_spec *spec = codec->spec;
790
791 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
792 return 0;
793}
794
795static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
796 struct snd_ctl_elem_value *ucontrol)
797{
798 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
799 struct sigmatel_spec *spec = codec->spec;
800
801 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
802 spec->mono_nid, &spec->cur_mmux);
803}
804
5f10c4a9
ML		 805#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
806
807static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
808 struct snd_ctl_elem_value *ucontrol)
809{
810 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 811 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 812 struct sigmatel_spec *spec = codec->spec;
813
e1f0d669
MR		 814 ucontrol->value.integer.value[0] = !!(spec->aloopback &
815 (spec->aloopback_mask << idx));
5f10c4a9
ML		 816 return 0;
817}
818
819static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
820 struct snd_ctl_elem_value *ucontrol)
821{
822 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
823 struct sigmatel_spec *spec = codec->spec;
e1f0d669 824 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 825 unsigned int dac_mode;
e1f0d669 826 unsigned int val, idx_val;
5f10c4a9 827
e1f0d669
MR		 828 idx_val = spec->aloopback_mask << idx;
829 if (ucontrol->value.integer.value[0])
830 val = spec->aloopback | idx_val;
831 else
832 val = spec->aloopback & ~idx_val;
68ea7b2f 833 if (spec->aloopback == val)
5f10c4a9
ML		 834 return 0;
835
68ea7b2f 836 spec->aloopback = val;
5f10c4a9 837
e1f0d669
MR		 838 /* Only return the bits defined by the shift value of the
839 * first two bytes of the mask
840 */
5f10c4a9 841 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 842 kcontrol->private_value & 0xFFFF, 0x0);
843 dac_mode >>= spec->aloopback_shift;
5f10c4a9 844
e1f0d669 845 if (spec->aloopback & idx_val) {
5f10c4a9 846 snd_hda_power_up(codec);
e1f0d669 847 dac_mode |= idx_val;
5f10c4a9
ML		 848 } else {
849 snd_hda_power_down(codec);
e1f0d669 850 dac_mode &= ~idx_val;
5f10c4a9
ML		 851 }
852
853 snd_hda_codec_write_cache(codec, codec->afg, 0,
854 kcontrol->private_value >> 16, dac_mode);
855
856 return 1;
857}
858
c7d4b2fa 859static struct hda_verb stac9200_core_init[] = {
2f2f4251 860 /* set dac0mux for dac converter */
c7d4b2fa 861 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 862 {}
863};
864
1194b5b7
TI		 865static struct hda_verb stac9200_eapd_init[] = {
866 /* set dac0mux for dac converter */
867 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
868 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
869 {}
870};
871
d654a660
MR		 872static struct hda_verb dell_eq_core_init[] = {
873 /* set master volume to max value without distortion
874 * and direct control */
875 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
e1f0d669
MR		 876 {}
877};
878
e2aec171 879static struct hda_verb stac92hd73xx_core_init[] = {
e1f0d669
MR		 880 /* set master volume and direct control */
881 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 882 {}
883};
884
d0513fc6 885static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR		 886 /* power state controls amps */
887 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 888 {}
d0513fc6
MR		 889};
890
e035b841 891static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 892 /* set master volume and direct control */
893 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 894 {}
541eee87
MR		 895};
896
ca8d33fc
MR		 897static struct hda_verb stac92hd71bxx_unmute_core_init[] = {
898 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
899 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 900 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
901 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 902 {}
903};
904
8e21c34c
TD		 905static struct hda_verb stac925x_core_init[] = {
906 /* set dac0mux for dac converter */
907 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 908 /* mute the master volume */
909 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 910 {}
911};
912
c7d4b2fa 913static struct hda_verb stac922x_core_init[] = {
2f2f4251 914 /* set master volume and direct control */
c7d4b2fa 915 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 916 {}
917};
918
93ed1503 919static struct hda_verb d965_core_init[] = {
19039bd0 920 /* set master volume and direct control */
93ed1503 921 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 922 /* unmute node 0x1b */
923 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
924 /* select node 0x03 as DAC */
925 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
926 {}
927};
928
ccca7cdc
TI		 929static struct hda_verb dell_3st_core_init[] = {
930 /* don't set delta bit */
931 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
932 /* unmute node 0x1b */
933 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
934 /* select node 0x03 as DAC */
935 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
936 {}
937};
938
3cc08dc6
MP		 939static struct hda_verb stac927x_core_init[] = {
940 /* set master volume and direct control */
941 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 942 /* enable analog pc beep path */
943 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 944 {}
945};
946
54930531
TI		 947static struct hda_verb stac927x_volknob_core_init[] = {
948 /* don't set delta bit */
949 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
950 /* enable analog pc beep path */
951 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
952 {}
953};
954
f3302a59
MP		 955static struct hda_verb stac9205_core_init[] = {
956 /* set master volume and direct control */
957 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 958 /* enable analog pc beep path */
959 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 960 {}
961};
962
b22b4821
MR		 963#define STAC_MONO_MUX \
964 { \
965 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
966 .name = "Mono Mux", \
967 .count = 1, \
968 .info = stac92xx_mono_mux_enum_info, \
969 .get = stac92xx_mono_mux_enum_get, \
970 .put = stac92xx_mono_mux_enum_put, \
971 }
972
e1f0d669 973#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 974 { \
975 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
976 .name = "Analog Loopback", \
e1f0d669 977 .count = cnt, \
5f10c4a9
ML		 978 .info = stac92xx_aloopback_info, \
979 .get = stac92xx_aloopback_get, \
980 .put = stac92xx_aloopback_put, \
981 .private_value = verb_read | (verb_write << 16), \
982 }
983
2fc99890
NL		 984#define DC_BIAS(xname, idx, nid) \
985 { \
986 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
987 .name = xname, \
988 .index = idx, \
989 .info = stac92xx_dc_bias_info, \
990 .get = stac92xx_dc_bias_get, \
991 .put = stac92xx_dc_bias_put, \
992 .private_value = nid, \
993 }
994
c8b6bf9b 995static struct snd_kcontrol_new stac9200_mixer[] = {
de8c85f7 996 HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
2f2f4251 997 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M		 998 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
999 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 1000 { } /* end */
1001};
1002
d78d7a90
TI		 1003static struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
1004 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1005 {}
1006};
1007
1008static struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
e1f0d669 1009 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
d78d7a90
TI		 1010 {}
1011};
e1f0d669 1012
d78d7a90
TI		 1013static struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
1014 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1015 {}
1016};
1017
d0513fc6 1018
d78d7a90
TI		 1019static struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
1020 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
1021};
541eee87 1022
8e21c34c 1023static struct snd_kcontrol_new stac925x_mixer[] = {
de8c85f7 1024 HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xe, 0, HDA_OUTPUT),
c9280d68 1025 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
2f2f4251
M		 1026 { } /* end */
1027};
1028
d78d7a90
TI		 1029static struct snd_kcontrol_new stac9205_loopback[] = {
1030 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
1031 {}
1032};
1033
d78d7a90
TI		 1034static struct snd_kcontrol_new stac927x_loopback[] = {
1035 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
1036 {}
1037};
1038
1697055e
TI		 1039static struct snd_kcontrol_new stac_dmux_mixer = {
1040 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1041 .name = "Digital Input Source",
1042 /* count set later */
1043 .info = stac92xx_dmux_enum_info,
1044 .get = stac92xx_dmux_enum_get,
1045 .put = stac92xx_dmux_enum_put,
1046};
1047
d9737751
MR		 1048static struct snd_kcontrol_new stac_smux_mixer = {
1049 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1050 .name = "IEC958 Playback Source",
d9737751
MR		 1051 /* count set later */
1052 .info = stac92xx_smux_enum_info,
1053 .get = stac92xx_smux_enum_get,
1054 .put = stac92xx_smux_enum_put,
1055};
1056
2134ea4f
TI		 1057static const char *slave_vols[] = {
1058 "Front Playback Volume",
1059 "Surround Playback Volume",
1060 "Center Playback Volume",
1061 "LFE Playback Volume",
1062 "Side Playback Volume",
1063 "Headphone Playback Volume",
2134ea4f 1064 "Speaker Playback Volume",
2134ea4f
TI		 1065 NULL
1066};
1067
1068static const char *slave_sws[] = {
1069 "Front Playback Switch",
1070 "Surround Playback Switch",
1071 "Center Playback Switch",
1072 "LFE Playback Switch",
1073 "Side Playback Switch",
1074 "Headphone Playback Switch",
2134ea4f 1075 "Speaker Playback Switch",
edb54a55 1076 "IEC958 Playback Switch",
2134ea4f
TI		 1077 NULL
1078};
1079
603c4019 1080static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1081static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1082
2f2f4251
M		 1083static int stac92xx_build_controls(struct hda_codec *codec)
1084{
1085 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1086 struct auto_pin_cfg *cfg = &spec->autocfg;
1087 hda_nid_t nid;
2f2f4251 1088 int err;
c7d4b2fa 1089 int i;
2f2f4251 1090
6479c631
TI		 1091 if (spec->mixer) {
1092 err = snd_hda_add_new_ctls(codec, spec->mixer);
1093 if (err < 0)
1094 return err;
1095 }
c7d4b2fa
M		 1096
1097 for (i = 0; i < spec->num_mixers; i++) {
1098 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1099 if (err < 0)
1100 return err;
1101 }
5207e10e
TI		 1102 if (!spec->auto_mic && spec->num_dmuxes > 0 &&
1103 snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
1697055e 1104 stac_dmux_mixer.count = spec->num_dmuxes;
3911a4c1 1105 err = snd_hda_ctl_add(codec, 0,
1697055e
TI		 1106 snd_ctl_new1(&stac_dmux_mixer, codec));
1107 if (err < 0)
1108 return err;
1109 }
d9737751 1110 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1111 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1112 struct hda_input_mux *smux = &spec->private_smux;
1113 /* check for mute support on SPDIF out */
1114 if (wcaps & AC_WCAP_OUT_AMP) {
10a20af7 1115 snd_hda_add_imux_item(smux, "Off", 0, NULL);
00ef50c2
MR		 1116 spec->spdif_mute = 1;
1117 }
d9737751 1118 stac_smux_mixer.count = spec->num_smuxes;
3911a4c1 1119 err = snd_hda_ctl_add(codec, 0,
d9737751
MR		 1120 snd_ctl_new1(&stac_smux_mixer, codec));
1121 if (err < 0)
1122 return err;
1123 }
c7d4b2fa 1124
dabbed6f
M		 1125 if (spec->multiout.dig_out_nid) {
1126 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1127 if (err < 0)
1128 return err;
9a08160b
TI		 1129 err = snd_hda_create_spdif_share_sw(codec,
1130 &spec->multiout);
1131 if (err < 0)
1132 return err;
1133 spec->multiout.share_spdif = 1;
dabbed6f 1134 }
da74ae3e 1135 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1136 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1137 if (err < 0)
1138 return err;
1139 }
2134ea4f
TI		 1140
1141 /* if we have no master control, let's create it */
1142 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1143 unsigned int vmaster_tlv[4];
2134ea4f 1144 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1145 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI		 1146 /* correct volume offset */
1147 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
de8c85f7 1148 /* minimum value is actually mute */
a74ccea5 1149 vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
2134ea4f 1150 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1151 vmaster_tlv, slave_vols);
2134ea4f
TI		 1152 if (err < 0)
1153 return err;
1154 }
1155 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1156 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1157 NULL, slave_sws);
1158 if (err < 0)
1159 return err;
1160 }
1161
d78d7a90
TI		 1162 if (spec->aloopback_ctl &&
1163 snd_hda_get_bool_hint(codec, "loopback") == 1) {
1164 err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
1165 if (err < 0)
1166 return err;
1167 }
1168
603c4019 1169 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1170
1171 /* create jack input elements */
1172 if (spec->hp_detect) {
1173 for (i = 0; i < cfg->hp_outs; i++) {
1174 int type = SND_JACK_HEADPHONE;
1175 nid = cfg->hp_pins[i];
1176 /* jack detection */
1177 if (cfg->hp_outs == i)
1178 type |= SND_JACK_LINEOUT;
1179 err = stac92xx_add_jack(codec, nid, type);
1180 if (err < 0)
1181 return err;
1182 }
1183 }
1184 for (i = 0; i < cfg->line_outs; i++) {
1185 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1186 SND_JACK_LINEOUT);
1187 if (err < 0)
1188 return err;
1189 }
eea7dc93
TI		 1190 for (i = 0; i < cfg->num_inputs; i++) {
1191 nid = cfg->inputs[i].pin;
1192 err = stac92xx_add_jack(codec, nid, SND_JACK_MICROPHONE);
1193 if (err < 0)
1194 return err;
e4973e1e
TI		 1195 }
1196
dabbed6f 1197 return 0;
2f2f4251
M		 1198}
1199
403d1944 1200static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1201 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1202 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1203};
1204
58eec423
MCC		 1205static unsigned int gateway9200_m4_pin_configs[8] = {
1206 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1207 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1208};
1209static unsigned int gateway9200_m4_2_pin_configs[8] = {
1210 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1211 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1212};
1213
1214/*
dfe495d0
TI		 1215 STAC 9200 pin configs for
1216 102801A8
1217 102801DE
1218 102801E8
1219*/
1220static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1221 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1222 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1223};
1224
1225/*
1226 STAC 9200 pin configs for
1227 102801C0
1228 102801C1
1229*/
1230static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1231 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1232 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1233};
1234
1235/*
1236 STAC 9200 pin configs for
1237 102801C4 (Dell Dimension E310)
1238 102801C5
1239 102801C7
1240 102801D9
1241 102801DA
1242 102801E3
1243*/
1244static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1245 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1246 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1247};
1248
1249
1250/*
1251 STAC 9200-32 pin configs for
1252 102801B5 (Dell Inspiron 630m)
1253 102801D8 (Dell Inspiron 640m)
1254*/
1255static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1256 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1257 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1258};
1259
1260/*
1261 STAC 9200-32 pin configs for
1262 102801C2 (Dell Latitude D620)
1263 102801C8
1264 102801CC (Dell Latitude D820)
1265 102801D4
1266 102801D6
1267*/
1268static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1269 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1270 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1271};
1272
1273/*
1274 STAC 9200-32 pin configs for
1275 102801CE (Dell XPS M1710)
1276 102801CF (Dell Precision M90)
1277*/
1278static unsigned int dell9200_m23_pin_configs[8] = {
1279 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1280 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1281};
1282
1283/*
1284 STAC 9200-32 pin configs for
1285 102801C9
1286 102801CA
1287 102801CB (Dell Latitude 120L)
1288 102801D3
1289*/
1290static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1291 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1292 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1293};
1294
1295/*
1296 STAC 9200-32 pin configs for
1297 102801BD (Dell Inspiron E1505n)
1298 102801EE
1299 102801EF
1300*/
1301static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1302 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1303 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1304};
1305
1306/*
1307 STAC 9200-32 pin configs for
1308 102801F5 (Dell Inspiron 1501)
1309 102801F6
1310*/
1311static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1312 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1313 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1314};
1315
1316/*
1317 STAC 9200-32
1318 102801CD (Dell Inspiron E1705/9400)
1319*/
1320static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1321 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1322 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1323};
1324
bf277785
TD		 1325static unsigned int oqo9200_pin_configs[8] = {
1326 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1327 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1328};
1329
dfe495d0 1330
f5fcc13c
TI		 1331static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1332 [STAC_REF] = ref9200_pin_configs,
bf277785 1333 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1334 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1335 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1336 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1337 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1338 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1339 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1340 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1341 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1342 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1343 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1344 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1345 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1346 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1347};
1348
f5fcc13c 1349static const char *stac9200_models[STAC_9200_MODELS] = {
1607b8ea 1350 [STAC_AUTO] = "auto",
f5fcc13c 1351 [STAC_REF] = "ref",
bf277785 1352 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1353 [STAC_9200_DELL_D21] = "dell-d21",
1354 [STAC_9200_DELL_D22] = "dell-d22",
1355 [STAC_9200_DELL_D23] = "dell-d23",
1356 [STAC_9200_DELL_M21] = "dell-m21",
1357 [STAC_9200_DELL_M22] = "dell-m22",
1358 [STAC_9200_DELL_M23] = "dell-m23",
1359 [STAC_9200_DELL_M24] = "dell-m24",
1360 [STAC_9200_DELL_M25] = "dell-m25",
1361 [STAC_9200_DELL_M26] = "dell-m26",
1362 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1363 [STAC_9200_M4] = "gateway-m4",
1364 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1365 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1366};
1367
1368static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1369 /* SigmaTel reference board */
1370 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1371 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1372 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1373 "DFI LanParty", STAC_REF),
e7377071 1374 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1375 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1376 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1377 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1378 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1379 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1380 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1381 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1382 "unknown Dell", STAC_9200_DELL_D22),
1383 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1384 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1385 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1386 "Dell Latitude D620", STAC_9200_DELL_M22),
1387 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1388 "unknown Dell", STAC_9200_DELL_D23),
1389 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1390 "unknown Dell", STAC_9200_DELL_D23),
1391 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1392 "unknown Dell", STAC_9200_DELL_M22),
1393 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1394 "unknown Dell", STAC_9200_DELL_M24),
1395 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1396 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1397 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1398 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1399 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1400 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1401 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1402 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1403 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1404 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1405 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1406 "Dell Precision M90", STAC_9200_DELL_M23),
1407 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1408 "unknown Dell", STAC_9200_DELL_M22),
1409 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1410 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1411 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1412 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1413 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1414 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1415 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1416 "unknown Dell", STAC_9200_DELL_D23),
1417 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1418 "unknown Dell", STAC_9200_DELL_D23),
1419 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1420 "unknown Dell", STAC_9200_DELL_D21),
1421 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1422 "unknown Dell", STAC_9200_DELL_D23),
1423 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1424 "unknown Dell", STAC_9200_DELL_D21),
1425 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1426 "unknown Dell", STAC_9200_DELL_M25),
1427 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1428 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1429 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1430 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1431 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1432 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1433 /* Panasonic */
117f257d 1434 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1435 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1436 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1437 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1438 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1439 /* OQO Mobile */
1440 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1441 {} /* terminator */
1442};
1443
8e21c34c
TD		 1444static unsigned int ref925x_pin_configs[8] = {
1445 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1446 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1447};
1448
9cb36c2a
MCC		 1449static unsigned int stac925xM1_pin_configs[8] = {
1450 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1451 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1452};
1453
9cb36c2a
MCC		 1454static unsigned int stac925xM1_2_pin_configs[8] = {
1455 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1456 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1457};
58eec423 1458
9cb36c2a
MCC		 1459static unsigned int stac925xM2_pin_configs[8] = {
1460 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1461 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1462};
1463
8e21c34c 1464static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1465 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1466 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1467};
1468
9cb36c2a
MCC		 1469static unsigned int stac925xM3_pin_configs[8] = {
1470 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1471 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1472};
58eec423 1473
9cb36c2a
MCC		 1474static unsigned int stac925xM5_pin_configs[8] = {
1475 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1476 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1477};
1478
9cb36c2a
MCC		 1479static unsigned int stac925xM6_pin_configs[8] = {
1480 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1481 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1482};
1483
1484static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1485 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1486 [STAC_M1] = stac925xM1_pin_configs,
1487 [STAC_M1_2] = stac925xM1_2_pin_configs,
1488 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1489 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1490 [STAC_M3] = stac925xM3_pin_configs,
1491 [STAC_M5] = stac925xM5_pin_configs,
1492 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1493};
1494
1495static const char *stac925x_models[STAC_925x_MODELS] = {
1607b8ea 1496 [STAC_925x_AUTO] = "auto",
8e21c34c 1497 [STAC_REF] = "ref",
9cb36c2a
MCC		 1498 [STAC_M1] = "m1",
1499 [STAC_M1_2] = "m1-2",
1500 [STAC_M2] = "m2",
8e21c34c 1501 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1502 [STAC_M3] = "m3",
1503 [STAC_M5] = "m5",
1504 [STAC_M6] = "m6",
8e21c34c
TD		 1505};
1506
9cb36c2a 1507static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1508 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1509 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1510 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1511 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1512 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1513 /* Not sure about the brand name for those */
1514 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1515 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1516 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1517 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1518 {} /* terminator */
8e21c34c
TD		 1519};
1520
1521static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1522 /* SigmaTel reference board */
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1525 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1526
1527 /* Default table for unknown ID */
1528 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1529
8e21c34c
TD		 1530 {} /* terminator */
1531};
1532
a7662640 1533static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1534 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1535 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1536 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1537 0x01452050,
1538};
1539
1540static unsigned int dell_m6_pin_configs[13] = {
1541 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1542 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1543 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1544 0x4f0000f0,
e1f0d669
MR		 1545};
1546
842ae638
TI		 1547static unsigned int alienware_m17x_pin_configs[13] = {
1548 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020,
1549 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0,
1550 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1551 0x904601b0,
1552};
1553
4d26f446 1554static unsigned int intel_dg45id_pin_configs[13] = {
52dc4386 1555 0x02214230, 0x02A19240, 0x01013214, 0x01014210,
4d26f446 1556 0x01A19250, 0x01011212, 0x01016211
52dc4386
AF		 1557};
1558
e1f0d669 1559static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1560 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1561 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1562 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1563 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1564 [STAC_DELL_EQ] = dell_m6_pin_configs,
842ae638 1565 [STAC_ALIENWARE_M17X] = alienware_m17x_pin_configs,
52dc4386 1566 [STAC_92HD73XX_INTEL] = intel_dg45id_pin_configs,
e1f0d669
MR		 1567};
1568
1569static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1607b8ea 1570 [STAC_92HD73XX_AUTO] = "auto",
9e43f0de 1571 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1572 [STAC_92HD73XX_REF] = "ref",
ae709440 1573 [STAC_92HD73XX_INTEL] = "intel",
661cd8fb
TI		 1574 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1575 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1576 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1577 [STAC_DELL_EQ] = "dell-eq",
842ae638 1578 [STAC_ALIENWARE_M17X] = "alienware",
e1f0d669
MR		 1579};
1580
1581static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1582 /* SigmaTel reference board */
1583 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1584 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1585 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1586 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF		 1587 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1588 "Intel DG45ID", STAC_92HD73XX_INTEL),
1589 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1590 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1591 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1592 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1593 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1594 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1595 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1596 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1597 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1598 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1599 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1600 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1601 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1602 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1603 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1604 "unknown Dell", STAC_DELL_M6_DMIC),
1605 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1606 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1607 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1608 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1609 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1610 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI		 1611 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1612 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB		 1613 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1614 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf
DC		 1615 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1616 "Dell Studio XPS 1645", STAC_DELL_M6_BOTH),
5c1bccf6
DC		 1617 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1618 "Dell Studio 1558", STAC_DELL_M6_BOTH),
e1f0d669
MR		 1619 {} /* terminator */
1620};
1621
842ae638
TI		 1622static struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
1623 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1624 "Alienware M17x", STAC_ALIENWARE_M17X),
1625 {} /* terminator */
1626};
1627
8bb0ac55 1628static unsigned int ref92hd83xxx_pin_configs[10] = {
d0513fc6
MR		 1629 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1630 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
d0513fc6
MR		 1631 0x01451160, 0x98560170,
1632};
1633
8bb0ac55 1634static unsigned int dell_s14_pin_configs[10] = {
69b5655a
TI		 1635 0x0221403f, 0x0221101f, 0x02a19020, 0x90170110,
1636 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a60160,
8bb0ac55
MR		 1637 0x40f000f0, 0x40f000f0,
1638};
1639
48315590
SE		 1640static unsigned int hp_dv7_4000_pin_configs[10] = {
1641 0x03a12050, 0x0321201f, 0x40f000f0, 0x90170110,
1642 0x40f000f0, 0x40f000f0, 0x90170110, 0xd5a30140,
1643 0x40f000f0, 0x40f000f0,
1644};
1645
d0513fc6
MR		 1646static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1647 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1648 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
8bb0ac55 1649 [STAC_DELL_S14] = dell_s14_pin_configs,
48315590 1650 [STAC_HP_DV7_4000] = hp_dv7_4000_pin_configs,
d0513fc6
MR		 1651};
1652
1653static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1607b8ea 1654 [STAC_92HD83XXX_AUTO] = "auto",
d0513fc6 1655 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1656 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
8bb0ac55 1657 [STAC_DELL_S14] = "dell-s14",
b4e81876 1658 [STAC_92HD83XXX_HP] = "hp",
48315590 1659 [STAC_HP_DV7_4000] = "hp-dv7-4000",
d0513fc6
MR		 1660};
1661
1662static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1663 /* SigmaTel reference board */
1664 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1665 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 1666 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1667 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR		 1668 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
1669 "unknown Dell", STAC_DELL_S14),
b4e81876
TI		 1670 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x3600,
1671 "HP", STAC_92HD83XXX_HP),
574f3c4f 1672 {} /* terminator */
d0513fc6
MR		 1673};
1674
616f89e7 1675static unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1676 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1677 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK		 1678 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1679 0x00000000
e035b841
MR		 1680};
1681
616f89e7 1682static unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1683 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1684 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1685 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1686 0x00000000
a7662640
MR		 1687};
1688
616f89e7 1689static unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR		 1690 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1691 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK		 1692 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1693 0x00000000
a7662640
MR		 1694};
1695
616f89e7 1696static unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR		 1697 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1698 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1699 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1700 0x00000000
3a7abfd2
MR		 1701};
1702
e035b841
MR		 1703static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1704 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1705 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1706 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1707 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1708 [STAC_HP_M4] = NULL,
2a6ce6e5 1709 [STAC_HP_DV4] = NULL,
1b0652eb 1710 [STAC_HP_DV5] = NULL,
ae6241fb 1711 [STAC_HP_HDX] = NULL,
514bf54c 1712 [STAC_HP_DV4_1222NR] = NULL,
e035b841
MR		 1713};
1714
1715static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1607b8ea 1716 [STAC_92HD71BXX_AUTO] = "auto",
e035b841 1717 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1718 [STAC_DELL_M4_1] = "dell-m4-1",
1719 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1720 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1721 [STAC_HP_M4] = "hp-m4",
2a6ce6e5 1722 [STAC_HP_DV4] = "hp-dv4",
1b0652eb 1723 [STAC_HP_DV5] = "hp-dv5",
ae6241fb 1724 [STAC_HP_HDX] = "hp-hdx",
514bf54c 1725 [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr",
e035b841
MR		 1726};
1727
1728static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1729 /* SigmaTel reference board */
1730 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1731 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 1732 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1733 "DFI LanParty", STAC_92HD71BXX_REF),
514bf54c
JG		 1734 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fb,
1735 "HP dv4-1222nr", STAC_HP_DV4_1222NR),
5bdaaada
VK		 1736 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
1737 "HP", STAC_HP_DV5),
58d8395b
TI		 1738 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
1739 "HP", STAC_HP_DV5),
2ae466f8 1740 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 1741 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI		 1742 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
1743 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI		 1744 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
1745 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 1746 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 1747 "HP mini 1000", STAC_HP_M4),
ae6241fb 1748 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 1749 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI		 1750 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
1751 "HP dv6", STAC_HP_DV5),
e3d2530a
KG		 1752 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
1753 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY		 1754 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
1755 "HP DV6", STAC_HP_DV5),
1972d025
TI		 1756 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
1757 "HP", STAC_HP_DV5),
a7662640
MR		 1758 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1759 "unknown Dell", STAC_DELL_M4_1),
1760 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1761 "unknown Dell", STAC_DELL_M4_1),
1762 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1763 "unknown Dell", STAC_DELL_M4_1),
1764 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1765 "unknown Dell", STAC_DELL_M4_1),
1766 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1767 "unknown Dell", STAC_DELL_M4_1),
1768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1769 "unknown Dell", STAC_DELL_M4_1),
1770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1771 "unknown Dell", STAC_DELL_M4_1),
1772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1773 "unknown Dell", STAC_DELL_M4_2),
1774 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1775 "unknown Dell", STAC_DELL_M4_2),
1776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1777 "unknown Dell", STAC_DELL_M4_2),
1778 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1779 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1780 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1781 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1782 {} /* terminator */
1783};
1784
403d1944
MP		 1785static unsigned int ref922x_pin_configs[10] = {
1786 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1787 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1788 0x40000100, 0x40000100,
1789};
1790
dfe495d0
TI		 1791/*
1792 STAC 922X pin configs for
1793 102801A7
1794 102801AB
1795 102801A9
1796 102801D1
1797 102801D2
1798*/
1799static unsigned int dell_922x_d81_pin_configs[10] = {
1800 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1801 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1802 0x01813122, 0x400001f2,
1803};
1804
1805/*
1806 STAC 922X pin configs for
1807 102801AC
1808 102801D0
1809*/
1810static unsigned int dell_922x_d82_pin_configs[10] = {
1811 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1812 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1813 0x01813122, 0x400001f1,
1814};
1815
1816/*
1817 STAC 922X pin configs for
1818 102801BF
1819*/
1820static unsigned int dell_922x_m81_pin_configs[10] = {
1821 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1822 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1823 0x40C003f1, 0x405003f0,
1824};
1825
1826/*
1827 STAC 9221 A1 pin configs for
1828 102801D7 (Dell XPS M1210)
1829*/
1830static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1831 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1832 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1833 0x508003f3, 0x405003f4,
1834};
1835
403d1944 1836static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1837 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1838 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1839 0x02a19120, 0x40000100,
1840};
1841
1842static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1843 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1844 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1845 0x02a19320, 0x40000100,
1846};
1847
5d5d3bc3
IZ		 1848static unsigned int intel_mac_v1_pin_configs[10] = {
1849 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1850 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1851 0x400000fc, 0x400000fb,
1852};
1853
1854static unsigned int intel_mac_v2_pin_configs[10] = {
1855 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1856 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1857 0x400000fc, 0x400000fb,
6f0778d8
NB		 1858};
1859
5d5d3bc3
IZ		 1860static unsigned int intel_mac_v3_pin_configs[10] = {
1861 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1862 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1863 0x400000fc, 0x400000fb,
1864};
1865
5d5d3bc3
IZ		 1866static unsigned int intel_mac_v4_pin_configs[10] = {
1867 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1868 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1869 0x400000fc, 0x400000fb,
1870};
1871
5d5d3bc3
IZ		 1872static unsigned int intel_mac_v5_pin_configs[10] = {
1873 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1874 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1875 0x400000fc, 0x400000fb,
0dae0f83
TI		 1876};
1877
8c650087
MCC		 1878static unsigned int ecs202_pin_configs[10] = {
1879 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1880 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1881 0x9037012e, 0x40e000f2,
1882};
76c08828 1883
19039bd0 1884static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1885 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1886 [STAC_D945GTP3] = d945gtp3_pin_configs,
1887 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1888 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1889 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1890 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1891 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1892 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1893 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1894 /* for backward compatibility */
5d5d3bc3
IZ		 1895 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1896 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1897 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1898 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1899 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1900 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1901 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1902 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1903 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1904 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1905 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1906};
1907
f5fcc13c 1908static const char *stac922x_models[STAC_922X_MODELS] = {
1607b8ea 1909 [STAC_922X_AUTO] = "auto",
f5fcc13c
TI		 1910 [STAC_D945_REF] = "ref",
1911 [STAC_D945GTP5] = "5stack",
1912 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1913 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1914 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1915 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1916 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1917 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1918 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1919 /* for backward compatibility */
f5fcc13c 1920 [STAC_MACMINI] = "macmini",
3fc24d85 1921 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1922 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1923 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1924 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1925 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1926 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1927 [STAC_922X_DELL_D81] = "dell-d81",
1928 [STAC_922X_DELL_D82] = "dell-d82",
1929 [STAC_922X_DELL_M81] = "dell-m81",
1930 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1931};
1932
1933static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1934 /* SigmaTel reference board */
1935 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1936 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 1937 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1938 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 1939 /* Intel 945G based systems */
1940 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1941 "Intel D945G", STAC_D945GTP3),
1942 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1943 "Intel D945G", STAC_D945GTP3),
1944 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1945 "Intel D945G", STAC_D945GTP3),
1946 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1947 "Intel D945G", STAC_D945GTP3),
1948 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1949 "Intel D945G", STAC_D945GTP3),
1950 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1951 "Intel D945G", STAC_D945GTP3),
1952 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1953 "Intel D945G", STAC_D945GTP3),
1954 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1955 "Intel D945G", STAC_D945GTP3),
1956 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1957 "Intel D945G", STAC_D945GTP3),
1958 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1959 "Intel D945G", STAC_D945GTP3),
1960 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1961 "Intel D945G", STAC_D945GTP3),
1962 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1963 "Intel D945G", STAC_D945GTP3),
1964 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1965 "Intel D945G", STAC_D945GTP3),
1966 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1967 "Intel D945G", STAC_D945GTP3),
1968 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1969 "Intel D945G", STAC_D945GTP3),
1970 /* Intel D945G 5-stack systems */
1971 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1972 "Intel D945G", STAC_D945GTP5),
1973 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1974 "Intel D945G", STAC_D945GTP5),
1975 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1976 "Intel D945G", STAC_D945GTP5),
1977 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1978 "Intel D945G", STAC_D945GTP5),
1979 /* Intel 945P based systems */
1980 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1981 "Intel D945P", STAC_D945GTP3),
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1983 "Intel D945P", STAC_D945GTP3),
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1985 "Intel D945P", STAC_D945GTP3),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1987 "Intel D945P", STAC_D945GTP3),
1988 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1989 "Intel D945P", STAC_D945GTP3),
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1991 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 1992 /* other intel */
1993 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
1994 "Intel D945", STAC_D945_REF),
f5fcc13c 1995 /* other systems */
536319af 1996 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1997 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1998 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1999 /* Dell systems */
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2001 "unknown Dell", STAC_922X_DELL_D81),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2003 "unknown Dell", STAC_922X_DELL_D81),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2005 "unknown Dell", STAC_922X_DELL_D81),
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2007 "unknown Dell", STAC_922X_DELL_D82),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2009 "unknown Dell", STAC_922X_DELL_M81),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2011 "unknown Dell", STAC_922X_DELL_D82),
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2013 "unknown Dell", STAC_922X_DELL_D81),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2015 "unknown Dell", STAC_922X_DELL_D81),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2017 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 2018 /* ECS/PC Chips boards */
dea0a509 2019 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 2020 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2021 {} /* terminator */
2022};
2023
3cc08dc6 2024static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2025 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2026 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2027 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2028 0x01c42190, 0x40000100,
3cc08dc6
MP		 2029};
2030
93ed1503 2031static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2032 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2033 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2034 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2035 0x40000100, 0x40000100
2036};
2037
93ed1503
TD		 2038static unsigned int d965_5st_pin_configs[14] = {
2039 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2040 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2041 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2042 0x40000100, 0x40000100
2043};
2044
679d92ed
TI		 2045static unsigned int d965_5st_no_fp_pin_configs[14] = {
2046 0x40000100, 0x40000100, 0x0181304e, 0x01014010,
2047 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2048 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2049 0x40000100, 0x40000100
2050};
2051
4ff076e5
TD		 2052static unsigned int dell_3st_pin_configs[14] = {
2053 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2054 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2055 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2056 0x40c003fc, 0x40000100
2057};
2058
93ed1503 2059static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2060 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2061 [STAC_D965_REF] = ref927x_pin_configs,
2062 [STAC_D965_3ST] = d965_3st_pin_configs,
2063 [STAC_D965_5ST] = d965_5st_pin_configs,
679d92ed 2064 [STAC_D965_5ST_NO_FP] = d965_5st_no_fp_pin_configs,
8e9068b1
MR		 2065 [STAC_DELL_3ST] = dell_3st_pin_configs,
2066 [STAC_DELL_BIOS] = NULL,
54930531 2067 [STAC_927X_VOLKNOB] = NULL,
3cc08dc6
MP		 2068};
2069
f5fcc13c 2070static const char *stac927x_models[STAC_927X_MODELS] = {
1607b8ea 2071 [STAC_927X_AUTO] = "auto",
e28d8322 2072 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2073 [STAC_D965_REF] = "ref",
2074 [STAC_D965_3ST] = "3stack",
2075 [STAC_D965_5ST] = "5stack",
679d92ed 2076 [STAC_D965_5ST_NO_FP] = "5stack-no-fp",
8e9068b1
MR		 2077 [STAC_DELL_3ST] = "dell-3stack",
2078 [STAC_DELL_BIOS] = "dell-bios",
54930531 2079 [STAC_927X_VOLKNOB] = "volknob",
f5fcc13c
TI		 2080};
2081
2082static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2083 /* SigmaTel reference board */
2084 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2085 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 2086 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2087 "DFI LanParty", STAC_D965_REF),
81d3dbde 2088 /* Intel 946 based systems */
f5fcc13c
TI		 2089 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2090 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2091 /* 965 based 3 stack systems */
dea0a509
TI		 2092 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
2093 "Intel D965", STAC_D965_3ST),
2094 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
2095 "Intel D965", STAC_D965_3ST),
4ff076e5 2096 /* Dell 3 stack systems */
dfe495d0 2097 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2098 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2099 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2100 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 2101 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 2102 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 2103 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2104 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
84d3dc20 2105 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR		 2106 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2107 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2108 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2109 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2110 /* 965 based 5 stack systems */
dea0a509
TI		 2111 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
2112 "Intel D965", STAC_D965_5ST),
2113 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
2114 "Intel D965", STAC_D965_5ST),
54930531
TI		 2115 /* volume-knob fixes */
2116 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP		 2117 {} /* terminator */
2118};
2119
f3302a59
MP		 2120static unsigned int ref9205_pin_configs[12] = {
2121 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2122 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2123 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2124};
2125
dfe495d0
TI		 2126/*
2127 STAC 9205 pin configs for
2128 102801F1
2129 102801F2
2130 102801FC
2131 102801FD
2132 10280204
2133 1028021F
3fa2ef74 2134 10280228 (Dell Vostro 1500)
95e70e87 2135 10280229 (Dell Vostro 1700)
dfe495d0
TI		 2136*/
2137static unsigned int dell_9205_m42_pin_configs[12] = {
2138 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2139 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2140 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2141};
2142
2143/*
2144 STAC 9205 pin configs for
2145 102801F9
2146 102801FA
2147 102801FE
2148 102801FF (Dell Precision M4300)
2149 10280206
2150 10280200
2151 10280201
2152*/
2153static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2154 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2155 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2156 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2157};
2158
dfe495d0 2159static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2160 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2161 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2162 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2163};
2164
f5fcc13c 2165static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2166 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2167 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2168 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2169 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2170 [STAC_9205_EAPD] = NULL,
f3302a59
MP		 2171};
2172
f5fcc13c 2173static const char *stac9205_models[STAC_9205_MODELS] = {
1607b8ea 2174 [STAC_9205_AUTO] = "auto",
f5fcc13c 2175 [STAC_9205_REF] = "ref",
dfe495d0 2176 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2177 [STAC_9205_DELL_M43] = "dell-m43",
2178 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2179 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI		 2180};
2181
2182static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2183 /* SigmaTel reference board */
2184 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2185 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK		 2186 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
2187 "SigmaTel", STAC_9205_REF),
577aa2c1
MR		 2188 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2189 "DFI LanParty", STAC_9205_REF),
d9a4268e 2190 /* Dell */
dfe495d0
TI		 2191 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2192 "unknown Dell", STAC_9205_DELL_M42),
2193 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2194 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2195 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2196 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2197 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2198 "Dell Precision", STAC_9205_DELL_M43),
2199 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2200 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2201 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2202 "unknown Dell", STAC_9205_DELL_M42),
2203 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2204 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2205 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2206 "Dell Precision", STAC_9205_DELL_M43),
2207 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2208 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2209 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2210 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2211 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2212 "Dell Precision", STAC_9205_DELL_M43),
2213 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2214 "Dell Precision", STAC_9205_DELL_M43),
2215 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2216 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2217 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2218 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2219 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2220 "Dell Vostro 1500", STAC_9205_DELL_M42),
95e70e87
AA		 2221 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
2222 "Dell Vostro 1700", STAC_9205_DELL_M42),
d9a4268e 2223 /* Gateway */
42b95f0c 2224 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
d9a4268e 2225 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP		 2226 {} /* terminator */
2227};
2228
330ee995
TI		 2229static void stac92xx_set_config_regs(struct hda_codec *codec,
2230 unsigned int *pincfgs)
11b44bbd
RF		 2231{
2232 int i;
2233 struct sigmatel_spec *spec = codec->spec;
11b44bbd 2234
330ee995
TI		 2235 if (!pincfgs)
2236 return;
11b44bbd 2237
87d48363 2238 for (i = 0; i < spec->num_pins; i++)
330ee995
TI		 2239 if (spec->pin_nids[i] && pincfgs[i])
2240 snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
2241 pincfgs[i]);
af9f341a
TI		 2242}
2243
dabbed6f 2244/*
c7d4b2fa 2245 * Analog playback callbacks
dabbed6f 2246 */
c7d4b2fa
M		 2247static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2248 struct hda_codec *codec,
c8b6bf9b 2249 struct snd_pcm_substream *substream)
2f2f4251 2250{
dabbed6f 2251 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2252 if (spec->stream_delay)
2253 msleep(spec->stream_delay);
9a08160b
TI		 2254 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2255 hinfo);
2f2f4251
M		 2256}
2257
2f2f4251
M		 2258static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2259 struct hda_codec *codec,
2260 unsigned int stream_tag,
2261 unsigned int format,
c8b6bf9b 2262 struct snd_pcm_substream *substream)
2f2f4251
M		 2263{
2264 struct sigmatel_spec *spec = codec->spec;
403d1944 2265 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2266}
2267
2268static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2269 struct hda_codec *codec,
c8b6bf9b 2270 struct snd_pcm_substream *substream)
2f2f4251
M		 2271{
2272 struct sigmatel_spec *spec = codec->spec;
2273 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2274}
2275
dabbed6f
M		 2276/*
2277 * Digital playback callbacks
2278 */
2279static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2280 struct hda_codec *codec,
c8b6bf9b 2281 struct snd_pcm_substream *substream)
dabbed6f
M		 2282{
2283 struct sigmatel_spec *spec = codec->spec;
2284 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2285}
2286
2287static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2288 struct hda_codec *codec,
c8b6bf9b 2289 struct snd_pcm_substream *substream)
dabbed6f
M		 2290{
2291 struct sigmatel_spec *spec = codec->spec;
2292 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2293}
2294
6b97eb45
TI		 2295static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2296 struct hda_codec *codec,
2297 unsigned int stream_tag,
2298 unsigned int format,
2299 struct snd_pcm_substream *substream)
2300{
2301 struct sigmatel_spec *spec = codec->spec;
2302 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2303 stream_tag, format, substream);
2304}
2305
9411e21c
TI		 2306static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2307 struct hda_codec *codec,
2308 struct snd_pcm_substream *substream)
2309{
2310 struct sigmatel_spec *spec = codec->spec;
2311 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2312}
2313
dabbed6f 2314
2f2f4251
M		 2315/*
2316 * Analog capture callbacks
2317 */
2318static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2319 struct hda_codec *codec,
2320 unsigned int stream_tag,
2321 unsigned int format,
c8b6bf9b 2322 struct snd_pcm_substream *substream)
2f2f4251
M		 2323{
2324 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2325 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2326
8daaaa97
MR		 2327 if (spec->powerdown_adcs) {
2328 msleep(40);
8c2f767b 2329 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2330 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2331 }
2332 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2333 return 0;
2334}
2335
2336static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2337 struct hda_codec *codec,
c8b6bf9b 2338 struct snd_pcm_substream *substream)
2f2f4251
M		 2339{
2340 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2341 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2342
8daaaa97
MR		 2343 snd_hda_codec_cleanup_stream(codec, nid);
2344 if (spec->powerdown_adcs)
8c2f767b 2345 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2346 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2347 return 0;
2348}
2349
dabbed6f
M		 2350static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2351 .substreams = 1,
2352 .channels_min = 2,
2353 .channels_max = 2,
2354 /* NID is set in stac92xx_build_pcms */
2355 .ops = {
2356 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2357 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI		 2358 .prepare = stac92xx_dig_playback_pcm_prepare,
2359 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M		 2360 },
2361};
2362
2363static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2364 .substreams = 1,
2365 .channels_min = 2,
2366 .channels_max = 2,
2367 /* NID is set in stac92xx_build_pcms */
2368};
2369
2f2f4251
M		 2370static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2371 .substreams = 1,
2372 .channels_min = 2,
c7d4b2fa 2373 .channels_max = 8,
2f2f4251
M		 2374 .nid = 0x02, /* NID to query formats and rates */
2375 .ops = {
2376 .open = stac92xx_playback_pcm_open,
2377 .prepare = stac92xx_playback_pcm_prepare,
2378 .cleanup = stac92xx_playback_pcm_cleanup
2379 },
2380};
2381
3cc08dc6
MP		 2382static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2383 .substreams = 1,
2384 .channels_min = 2,
2385 .channels_max = 2,
2386 .nid = 0x06, /* NID to query formats and rates */
2387 .ops = {
2388 .open = stac92xx_playback_pcm_open,
2389 .prepare = stac92xx_playback_pcm_prepare,
2390 .cleanup = stac92xx_playback_pcm_cleanup
2391 },
2392};
2393
2f2f4251 2394static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2395 .channels_min = 2,
2396 .channels_max = 2,
9e05b7a3 2397 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2398 .ops = {
2399 .prepare = stac92xx_capture_pcm_prepare,
2400 .cleanup = stac92xx_capture_pcm_cleanup
2401 },
2402};
2403
2404static int stac92xx_build_pcms(struct hda_codec *codec)
2405{
2406 struct sigmatel_spec *spec = codec->spec;
2407 struct hda_pcm *info = spec->pcm_rec;
2408
2409 codec->num_pcms = 1;
2410 codec->pcm_info = info;
2411
c7d4b2fa 2412 info->name = "STAC92xx Analog";
2f2f4251 2413 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI		 2414 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2415 spec->multiout.dac_nids[0];
2f2f4251 2416 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2417 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2418 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2419
2420 if (spec->alt_switch) {
2421 codec->num_pcms++;
2422 info++;
2423 info->name = "STAC92xx Analog Alt";
2424 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2425 }
2f2f4251 2426
dabbed6f
M		 2427 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2428 codec->num_pcms++;
2429 info++;
2430 info->name = "STAC92xx Digital";
0852d7a6 2431 info->pcm_type = spec->autocfg.dig_out_type[0];
dabbed6f
M		 2432 if (spec->multiout.dig_out_nid) {
2433 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2434 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2435 }
2436 if (spec->dig_in_nid) {
2437 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2438 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2439 }
2440 }
2441
2f2f4251
M		 2442 return 0;
2443}
2444
7c922de7
NL		 2445static unsigned int stac92xx_get_default_vref(struct hda_codec *codec,
2446 hda_nid_t nid)
c960a03b 2447{
1327a32b 2448 unsigned int pincap = snd_hda_query_pin_caps(codec, nid);
c960a03b
TI		 2449 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2450 if (pincap & AC_PINCAP_VREF_100)
2451 return AC_PINCTL_VREF_100;
2452 if (pincap & AC_PINCAP_VREF_80)
2453 return AC_PINCTL_VREF_80;
2454 if (pincap & AC_PINCAP_VREF_50)
2455 return AC_PINCTL_VREF_50;
2456 if (pincap & AC_PINCAP_VREF_GRD)
2457 return AC_PINCTL_VREF_GRD;
2458 return 0;
2459}
2460
403d1944
MP		 2461static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2462
2463{
82beb8fd
TI		 2464 snd_hda_codec_write_cache(codec, nid, 0,
2465 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2466}
2467
7c2ba97b
MR		 2468#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2469
2470static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2471 struct snd_ctl_elem_value *ucontrol)
2472{
2473 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2474 struct sigmatel_spec *spec = codec->spec;
2475
d7a89436 2476 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2477 return 0;
2478}
2479
62558ce1 2480static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid);
c6e4c666 2481
7c2ba97b
MR		 2482static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2483 struct snd_ctl_elem_value *ucontrol)
2484{
2485 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2486 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2487 int nid = kcontrol->private_value;
2488
2489 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2490
2491 /* check to be sure that the ports are upto date with
2492 * switch changes
2493 */
62558ce1 2494 stac_issue_unsol_event(codec, nid);
7c2ba97b
MR		 2495
2496 return 1;
2497}
2498
7c922de7
NL		 2499static int stac92xx_dc_bias_info(struct snd_kcontrol *kcontrol,
2500 struct snd_ctl_elem_info *uinfo)
2501{
2502 int i;
2503 static char *texts[] = {
2504 "Mic In", "Line In", "Line Out"
2505 };
2506
2507 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2508 struct sigmatel_spec *spec = codec->spec;
2509 hda_nid_t nid = kcontrol->private_value;
2510
2511 if (nid == spec->mic_switch || nid == spec->line_switch)
2512 i = 3;
2513 else
2514 i = 2;
2515
2516 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2517 uinfo->value.enumerated.items = i;
2518 uinfo->count = 1;
2519 if (uinfo->value.enumerated.item >= i)
2520 uinfo->value.enumerated.item = i-1;
2521 strcpy(uinfo->value.enumerated.name,
2522 texts[uinfo->value.enumerated.item]);
2523
2524 return 0;
2525}
2526
2527static int stac92xx_dc_bias_get(struct snd_kcontrol *kcontrol,
2528 struct snd_ctl_elem_value *ucontrol)
2529{
2530 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2531 hda_nid_t nid = kcontrol->private_value;
2532 unsigned int vref = stac92xx_vref_get(codec, nid);
2533
2534 if (vref == stac92xx_get_default_vref(codec, nid))
2535 ucontrol->value.enumerated.item[0] = 0;
2536 else if (vref == AC_PINCTL_VREF_GRD)
2537 ucontrol->value.enumerated.item[0] = 1;
2538 else if (vref == AC_PINCTL_VREF_HIZ)
2539 ucontrol->value.enumerated.item[0] = 2;
2540
2541 return 0;
2542}
2543
2544static int stac92xx_dc_bias_put(struct snd_kcontrol *kcontrol,
2545 struct snd_ctl_elem_value *ucontrol)
2546{
2547 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2548 unsigned int new_vref = 0;
b8621516 2549 int error;
7c922de7
NL		 2550 hda_nid_t nid = kcontrol->private_value;
2551
2552 if (ucontrol->value.enumerated.item[0] == 0)
2553 new_vref = stac92xx_get_default_vref(codec, nid);
2554 else if (ucontrol->value.enumerated.item[0] == 1)
2555 new_vref = AC_PINCTL_VREF_GRD;
2556 else if (ucontrol->value.enumerated.item[0] == 2)
2557 new_vref = AC_PINCTL_VREF_HIZ;
2558 else
2559 return 0;
2560
2561 if (new_vref != stac92xx_vref_get(codec, nid)) {
2562 error = stac92xx_vref_set(codec, nid, new_vref);
2563 return error;
2564 }
2565
2566 return 0;
2567}
2568
2569static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol,
2570 struct snd_ctl_elem_info *uinfo)
2571{
2572 static char *texts[2];
2573 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2574 struct sigmatel_spec *spec = codec->spec;
2575
2576 if (kcontrol->private_value == spec->line_switch)
2577 texts[0] = "Line In";
2578 else
2579 texts[0] = "Mic In";
2580 texts[1] = "Line Out";
2581 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2582 uinfo->value.enumerated.items = 2;
2583 uinfo->count = 1;
2584
2585 if (uinfo->value.enumerated.item >= 2)
2586 uinfo->value.enumerated.item = 1;
2587 strcpy(uinfo->value.enumerated.name,
2588 texts[uinfo->value.enumerated.item]);
2589
2590 return 0;
2591}
403d1944
MP		 2592
2593static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2594{
2595 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2596 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2597 hda_nid_t nid = kcontrol->private_value;
2598 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
403d1944 2599
7c922de7 2600 ucontrol->value.enumerated.item[0] = spec->io_switch[io_idx];
403d1944
MP		 2601 return 0;
2602}
2603
2604static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2605{
2606 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2607 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2608 hda_nid_t nid = kcontrol->private_value;
2609 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
2610 unsigned short val = !!ucontrol->value.enumerated.item[0];
403d1944
MP		 2611
2612 spec->io_switch[io_idx] = val;
2613
2614 if (val)
2615 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2616 else {
2617 unsigned int pinctl = AC_PINCTL_IN_EN;
2618 if (io_idx) /* set VREF for mic */
7c922de7 2619 pinctl |= stac92xx_get_default_vref(codec, nid);
c960a03b
TI		 2620 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2621 }
40c1d308
JZ		 2622
2623 /* check the auto-mute again: we need to mute/unmute the speaker
2624 * appropriately according to the pin direction
2625 */
2626 if (spec->hp_detect)
62558ce1 2627 stac_issue_unsol_event(codec, nid);
40c1d308 2628
403d1944
MP		 2629 return 1;
2630}
2631
0fb87bb4
ML		 2632#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2633
2634static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2635 struct snd_ctl_elem_value *ucontrol)
2636{
2637 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2638 struct sigmatel_spec *spec = codec->spec;
2639
2640 ucontrol->value.integer.value[0] = spec->clfe_swap;
2641 return 0;
2642}
2643
2644static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2645 struct snd_ctl_elem_value *ucontrol)
2646{
2647 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2648 struct sigmatel_spec *spec = codec->spec;
2649 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2650 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2651
68ea7b2f 2652 if (spec->clfe_swap == val)
0fb87bb4
ML		 2653 return 0;
2654
68ea7b2f 2655 spec->clfe_swap = val;
0fb87bb4
ML		 2656
2657 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2658 spec->clfe_swap ? 0x4 : 0x0);
2659
2660 return 1;
2661}
2662
7c2ba97b
MR		 2663#define STAC_CODEC_HP_SWITCH(xname) \
2664 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2665 .name = xname, \
2666 .index = 0, \
2667 .info = stac92xx_hp_switch_info, \
2668 .get = stac92xx_hp_switch_get, \
2669 .put = stac92xx_hp_switch_put, \
2670 }
2671
403d1944
MP		 2672#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2673 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2674 .name = xname, \
2675 .index = 0, \
2676 .info = stac92xx_io_switch_info, \
2677 .get = stac92xx_io_switch_get, \
2678 .put = stac92xx_io_switch_put, \
2679 .private_value = xpval, \
2680 }
2681
0fb87bb4
ML		 2682#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2683 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2684 .name = xname, \
2685 .index = 0, \
2686 .info = stac92xx_clfe_switch_info, \
2687 .get = stac92xx_clfe_switch_get, \
2688 .put = stac92xx_clfe_switch_put, \
2689 .private_value = xpval, \
2690 }
403d1944 2691
c7d4b2fa
M		 2692enum {
2693 STAC_CTL_WIDGET_VOL,
2694 STAC_CTL_WIDGET_MUTE,
123c07ae 2695 STAC_CTL_WIDGET_MUTE_BEEP,
09a99959 2696 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2697 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2698 STAC_CTL_WIDGET_IO_SWITCH,
2fc99890
NL		 2699 STAC_CTL_WIDGET_CLFE_SWITCH,
2700 STAC_CTL_WIDGET_DC_BIAS
c7d4b2fa
M		 2701};
2702
c8b6bf9b 2703static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2704 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2705 HDA_CODEC_MUTE(NULL, 0, 0, 0),
123c07ae 2706 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0),
09a99959 2707 STAC_MONO_MUX,
7c2ba97b 2708 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2709 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2710 STAC_CODEC_CLFE_SWITCH(NULL, 0),
2fc99890 2711 DC_BIAS(NULL, 0, 0),
c7d4b2fa
M		 2712};
2713
2714/* add dynamic controls */
e3c75964
TI		 2715static struct snd_kcontrol_new *
2716stac_control_new(struct sigmatel_spec *spec,
2717 struct snd_kcontrol_new *ktemp,
4d02d1b6 2718 const char *name,
5e26dfd0 2719 unsigned int subdev)
c7d4b2fa 2720{
c8b6bf9b 2721 struct snd_kcontrol_new *knew;
c7d4b2fa 2722
603c4019
TI		 2723 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2724 knew = snd_array_new(&spec->kctls);
2725 if (!knew)
e3c75964 2726 return NULL;
4d4e9bb3 2727 *knew = *ktemp;
82fe0c58 2728 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI		 2729 if (!knew->name) {
2730 /* roolback */
2731 memset(knew, 0, sizeof(*knew));
2732 spec->kctls.alloced--;
2733 return NULL;
2734 }
5e26dfd0 2735 knew->subdevice = subdev;
e3c75964
TI		 2736 return knew;
2737}
2738
2739static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2740 struct snd_kcontrol_new *ktemp,
2741 int idx, const char *name,
2742 unsigned long val)
2743{
4d02d1b6 2744 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name,
5e26dfd0 2745 HDA_SUBDEV_AMP_FLAG);
e3c75964 2746 if (!knew)
c7d4b2fa 2747 return -ENOMEM;
e3c75964 2748 knew->index = idx;
c7d4b2fa 2749 knew->private_value = val;
c7d4b2fa
M		 2750 return 0;
2751}
2752
4d4e9bb3
TI		 2753static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2754 int type, int idx, const char *name,
2755 unsigned long val)
2756{
2757 return stac92xx_add_control_temp(spec,
2758 &stac92xx_control_templates[type],
2759 idx, name, val);
2760}
2761
4682eee0
MR		 2762
2763/* add dynamic controls */
4d4e9bb3
TI		 2764static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2765 const char *name, unsigned long val)
4682eee0
MR		 2766{
2767 return stac92xx_add_control_idx(spec, type, 0, name, val);
2768}
2769
e3c75964
TI		 2770static struct snd_kcontrol_new stac_input_src_temp = {
2771 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2772 .name = "Input Source",
2773 .info = stac92xx_mux_enum_info,
2774 .get = stac92xx_mux_enum_get,
2775 .put = stac92xx_mux_enum_put,
2776};
2777
7c922de7
NL		 2778static inline int stac92xx_add_jack_mode_control(struct hda_codec *codec,
2779 hda_nid_t nid, int idx)
2780{
2781 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
2782 int control = 0;
2783 struct sigmatel_spec *spec = codec->spec;
2784 char name[22];
2785
99ae28be 2786 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
7c922de7
NL		 2787 if (stac92xx_get_default_vref(codec, nid) == AC_PINCTL_VREF_GRD
2788 && nid == spec->line_switch)
2789 control = STAC_CTL_WIDGET_IO_SWITCH;
2790 else if (snd_hda_query_pin_caps(codec, nid)
2791 & (AC_PINCAP_VREF_GRD << AC_PINCAP_VREF_SHIFT))
2792 control = STAC_CTL_WIDGET_DC_BIAS;
2793 else if (nid == spec->mic_switch)
2794 control = STAC_CTL_WIDGET_IO_SWITCH;
2795 }
2796
2797 if (control) {
10a20af7 2798 strcpy(name, hda_get_input_pin_label(codec, nid, 1));
7c922de7
NL		 2799 return stac92xx_add_control(codec->spec, control,
2800 strcat(name, " Jack Mode"), nid);
2801 }
2802
2803 return 0;
2804}
2805
e3c75964
TI		 2806static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2807{
2808 struct snd_kcontrol_new *knew;
2809 struct hda_input_mux *imux = &spec->private_imux;
2810
3d21d3f7
TI		 2811 if (spec->auto_mic)
2812 return 0; /* no need for input source */
e3c75964
TI		 2813 if (!spec->num_adcs || imux->num_items <= 1)
2814 return 0; /* no need for input source control */
2815 knew = stac_control_new(spec, &stac_input_src_temp,
4d02d1b6 2816 stac_input_src_temp.name, 0);
e3c75964
TI		 2817 if (!knew)
2818 return -ENOMEM;
2819 knew->count = spec->num_adcs;
2820 return 0;
2821}
2822
c21ca4a8
TI		 2823/* check whether the line-input can be used as line-out */
2824static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2825{
2826 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2827 struct auto_pin_cfg *cfg = &spec->autocfg;
2828 hda_nid_t nid;
2829 unsigned int pincap;
eea7dc93 2830 int i;
8e9068b1 2831
c21ca4a8
TI		 2832 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2833 return 0;
eea7dc93 2834 for (i = 0; i < cfg->num_inputs; i++) {
86e2959a 2835 if (cfg->inputs[i].type == AUTO_PIN_LINE_IN) {
eea7dc93
TI		 2836 nid = cfg->inputs[i].pin;
2837 pincap = snd_hda_query_pin_caps(codec, nid);
2838 if (pincap & AC_PINCAP_OUT)
2839 return nid;
2840 }
2841 }
c21ca4a8
TI		 2842 return 0;
2843}
403d1944 2844
eea7dc93
TI		 2845static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid);
2846
c21ca4a8 2847/* check whether the mic-input can be used as line-out */
eea7dc93 2848static hda_nid_t check_mic_out_switch(struct hda_codec *codec, hda_nid_t *dac)
c21ca4a8
TI		 2849{
2850 struct sigmatel_spec *spec = codec->spec;
2851 struct auto_pin_cfg *cfg = &spec->autocfg;
2852 unsigned int def_conf, pincap;
86e2959a 2853 int i;
c21ca4a8 2854
eea7dc93 2855 *dac = 0;
c21ca4a8
TI		 2856 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2857 return 0;
eea7dc93
TI		 2858 for (i = 0; i < cfg->num_inputs; i++) {
2859 hda_nid_t nid = cfg->inputs[i].pin;
86e2959a 2860 if (cfg->inputs[i].type != AUTO_PIN_MIC)
eea7dc93 2861 continue;
330ee995 2862 def_conf = snd_hda_codec_get_pincfg(codec, nid);
c21ca4a8
TI		 2863 /* some laptops have an internal analog microphone
2864 * which can't be used as a output */
99ae28be 2865 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
1327a32b 2866 pincap = snd_hda_query_pin_caps(codec, nid);
eea7dc93
TI		 2867 if (pincap & AC_PINCAP_OUT) {
2868 *dac = get_unassigned_dac(codec, nid);
2869 if (*dac)
2870 return nid;
2871 }
403d1944 2872 }
403d1944 2873 }
403d1944
MP		 2874 return 0;
2875}
2876
7b043899
SL		 2877static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2878{
2879 int i;
2880
2881 for (i = 0; i < spec->multiout.num_dacs; i++) {
2882 if (spec->multiout.dac_nids[i] == nid)
2883 return 1;
2884 }
2885
2886 return 0;
2887}
2888
c21ca4a8
TI		 2889static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2890{
2891 int i;
2892 if (is_in_dac_nids(spec, nid))
2893 return 1;
2894 for (i = 0; i < spec->autocfg.hp_outs; i++)
2895 if (spec->hp_dacs[i] == nid)
2896 return 1;
2897 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2898 if (spec->speaker_dacs[i] == nid)
2899 return 1;
2900 return 0;
2901}
2902
2903static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2904{
2905 struct sigmatel_spec *spec = codec->spec;
2906 int j, conn_len;
2907 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2908 unsigned int wcaps, wtype;
2909
2910 conn_len = snd_hda_get_connections(codec, nid, conn,
2911 HDA_MAX_CONNECTIONS);
36706005
CC		 2912 /* 92HD88: trace back up the link of nids to find the DAC */
2913 while (conn_len == 1 && (get_wcaps_type(get_wcaps(codec, conn[0]))
2914 != AC_WID_AUD_OUT)) {
2915 nid = conn[0];
2916 conn_len = snd_hda_get_connections(codec, nid, conn,
2917 HDA_MAX_CONNECTIONS);
2918 }
c21ca4a8 2919 for (j = 0; j < conn_len; j++) {
14bafe32 2920 wcaps = get_wcaps(codec, conn[j]);
a22d543a 2921 wtype = get_wcaps_type(wcaps);
c21ca4a8
TI		 2922 /* we check only analog outputs */
2923 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2924 continue;
2925 /* if this route has a free DAC, assign it */
2926 if (!check_all_dac_nids(spec, conn[j])) {
2927 if (conn_len > 1) {
2928 /* select this DAC in the pin's input mux */
2929 snd_hda_codec_write_cache(codec, nid, 0,
2930 AC_VERB_SET_CONNECT_SEL, j);
2931 }
2932 return conn[j];
2933 }
2934 }
ee58a7ca
TI		 2935 /* if all DACs are already assigned, connect to the primary DAC */
2936 if (conn_len > 1) {
2937 for (j = 0; j < conn_len; j++) {
2938 if (conn[j] == spec->multiout.dac_nids[0]) {
2939 snd_hda_codec_write_cache(codec, nid, 0,
2940 AC_VERB_SET_CONNECT_SEL, j);
2941 break;
2942 }
2943 }
2944 }
c21ca4a8
TI		 2945 return 0;
2946}
2947
2948static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2949static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2950
3cc08dc6 2951/*
7b043899
SL		 2952 * Fill in the dac_nids table from the parsed pin configuration
2953 * This function only works when every pin in line_out_pins[]
2954 * contains atleast one DAC in its connection list. Some 92xx
2955 * codecs are not connected directly to a DAC, such as the 9200
2956 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2957 */
c21ca4a8 2958static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 2959{
2960 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2961 struct auto_pin_cfg *cfg = &spec->autocfg;
2962 int i;
2963 hda_nid_t nid, dac;
7b043899 2964
c7d4b2fa
M		 2965 for (i = 0; i < cfg->line_outs; i++) {
2966 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 2967 dac = get_unassigned_dac(codec, nid);
2968 if (!dac) {
df802952
TI		 2969 if (spec->multiout.num_dacs > 0) {
2970 /* we have already working output pins,
2971 * so let's drop the broken ones again
2972 */
2973 cfg->line_outs = spec->multiout.num_dacs;
2974 break;
2975 }
7b043899
SL		 2976 /* error out, no available DAC found */
2977 snd_printk(KERN_ERR
2978 "%s: No available DAC for pin 0x%x\n",
2979 __func__, nid);
2980 return -ENODEV;
2981 }
c21ca4a8
TI		 2982 add_spec_dacs(spec, dac);
2983 }
7b043899 2984
139e071b
TI		 2985 for (i = 0; i < cfg->hp_outs; i++) {
2986 nid = cfg->hp_pins[i];
2987 dac = get_unassigned_dac(codec, nid);
2988 if (dac) {
2989 if (!spec->multiout.hp_nid)
2990 spec->multiout.hp_nid = dac;
2991 else
2992 add_spec_extra_dacs(spec, dac);
2993 }
2994 spec->hp_dacs[i] = dac;
2995 }
2996
2997 for (i = 0; i < cfg->speaker_outs; i++) {
2998 nid = cfg->speaker_pins[i];
2999 dac = get_unassigned_dac(codec, nid);
3000 if (dac)
3001 add_spec_extra_dacs(spec, dac);
3002 spec->speaker_dacs[i] = dac;
3003 }
3004
c21ca4a8
TI		 3005 /* add line-in as output */
3006 nid = check_line_out_switch(codec);
3007 if (nid) {
3008 dac = get_unassigned_dac(codec, nid);
3009 if (dac) {
3010 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
3011 nid, cfg->line_outs);
3012 cfg->line_out_pins[cfg->line_outs] = nid;
3013 cfg->line_outs++;
3014 spec->line_switch = nid;
3015 add_spec_dacs(spec, dac);
3016 }
3017 }
3018 /* add mic as output */
eea7dc93
TI		 3019 nid = check_mic_out_switch(codec, &dac);
3020 if (nid && dac) {
3021 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
3022 nid, cfg->line_outs);
3023 cfg->line_out_pins[cfg->line_outs] = nid;
3024 cfg->line_outs++;
3025 spec->mic_switch = nid;
3026 add_spec_dacs(spec, dac);
c21ca4a8 3027 }
c7d4b2fa 3028
c21ca4a8 3029 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 3030 spec->multiout.num_dacs,
3031 spec->multiout.dac_nids[0],
3032 spec->multiout.dac_nids[1],
3033 spec->multiout.dac_nids[2],
3034 spec->multiout.dac_nids[3],
3035 spec->multiout.dac_nids[4]);
c21ca4a8 3036
c7d4b2fa
M		 3037 return 0;
3038}
3039
eb06ed8f 3040/* create volume control/switch for the given prefx type */
668b9652
TI		 3041static int create_controls_idx(struct hda_codec *codec, const char *pfx,
3042 int idx, hda_nid_t nid, int chs)
eb06ed8f 3043{
7c7767eb 3044 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI		 3045 char name[32];
3046 int err;
3047
7c7767eb
TI		 3048 if (!spec->check_volume_offset) {
3049 unsigned int caps, step, nums, db_scale;
3050 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3051 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3052 AC_AMPCAP_STEP_SIZE_SHIFT;
3053 step = (step + 1) * 25; /* in .01dB unit */
3054 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3055 AC_AMPCAP_NUM_STEPS_SHIFT;
3056 db_scale = nums * step;
3057 /* if dB scale is over -64dB, and finer enough,
3058 * let's reduce it to half
3059 */
3060 if (db_scale > 6400 && nums >= 0x1f)
3061 spec->volume_offset = nums / 2;
3062 spec->check_volume_offset = 1;
3063 }
3064
eb06ed8f 3065 sprintf(name, "%s Playback Volume", pfx);
668b9652 3066 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
7c7767eb
TI		 3067 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3068 spec->volume_offset));
eb06ed8f
TI		 3069 if (err < 0)
3070 return err;
3071 sprintf(name, "%s Playback Switch", pfx);
668b9652 3072 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
eb06ed8f
TI		 3073 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3074 if (err < 0)
3075 return err;
3076 return 0;
3077}
3078
668b9652
TI		 3079#define create_controls(codec, pfx, nid, chs) \
3080 create_controls_idx(codec, pfx, 0, nid, chs)
3081
ae0afd81
MR		 3082static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3083{
c21ca4a8 3084 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 3085 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3086 return 1;
3087 } else {
3088 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3089 spec->multiout.num_dacs++;
3090 }
3091 return 0;
3092}
3093
c21ca4a8 3094static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3095{
c21ca4a8
TI		 3096 int i;
3097 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3098 if (!spec->multiout.extra_out_nid[i]) {
3099 spec->multiout.extra_out_nid[i] = nid;
3100 return 0;
3101 }
3102 }
3103 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3104 return 1;
ae0afd81
MR		 3105}
3106
dc04d1b4
TI		 3107/* Create output controls
3108 * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
3109 */
3110static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
3111 const hda_nid_t *pins,
3112 const hda_nid_t *dac_nids,
3113 int type)
c7d4b2fa 3114{
76624534 3115 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI		 3116 static const char *chname[4] = {
3117 "Front", "Surround", NULL /*CLFE*/, "Side"
3118 };
dc04d1b4 3119 hda_nid_t nid;
91589232
TI		 3120 int i, err;
3121 unsigned int wid_caps;
0fb87bb4 3122
dc04d1b4 3123 for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
ffd0e56c
TI		 3124 if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
3125 wid_caps = get_wcaps(codec, pins[i]);
3126 if (wid_caps & AC_WCAP_UNSOL_CAP)
3127 spec->hp_detect = 1;
3128 }
dc04d1b4
TI		 3129 nid = dac_nids[i];
3130 if (!nid)
3131 continue;
3132 if (type != AUTO_PIN_HP_OUT && i == 2) {
c7d4b2fa 3133 /* Center/LFE */
7c7767eb 3134 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3135 if (err < 0)
c7d4b2fa 3136 return err;
7c7767eb 3137 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3138 if (err < 0)
c7d4b2fa 3139 return err;
0fb87bb4
ML		 3140
3141 wid_caps = get_wcaps(codec, nid);
3142
3143 if (wid_caps & AC_WCAP_LR_SWAP) {
3144 err = stac92xx_add_control(spec,
3145 STAC_CTL_WIDGET_CLFE_SWITCH,
3146 "Swap Center/LFE Playback Switch", nid);
3147
3148 if (err < 0)
3149 return err;
3150 }
3151
c7d4b2fa 3152 } else {
dc04d1b4 3153 const char *name;
668b9652 3154 int idx;
dc04d1b4
TI		 3155 switch (type) {
3156 case AUTO_PIN_HP_OUT:
668b9652
TI		 3157 name = "Headphone";
3158 idx = i;
dc04d1b4
TI		 3159 break;
3160 case AUTO_PIN_SPEAKER_OUT:
668b9652
TI		 3161 name = "Speaker";
3162 idx = i;
dc04d1b4
TI		 3163 break;
3164 default:
3165 name = chname[i];
668b9652 3166 idx = 0;
dc04d1b4 3167 break;
76624534 3168 }
668b9652 3169 err = create_controls_idx(codec, name, idx, nid, 3);
eb06ed8f 3170 if (err < 0)
c7d4b2fa
M		 3171 return err;
3172 }
3173 }
dc04d1b4
TI		 3174 return 0;
3175}
3176
6479c631
TI		 3177static int stac92xx_add_capvol_ctls(struct hda_codec *codec, unsigned long vol,
3178 unsigned long sw, int idx)
3179{
3180 int err;
3181 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx,
bf677bd8 3182 "Capture Volume", vol);
6479c631
TI		 3183 if (err < 0)
3184 return err;
3185 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_MUTE, idx,
bf677bd8 3186 "Capture Switch", sw);
6479c631
TI		 3187 if (err < 0)
3188 return err;
3189 return 0;
3190}
3191
dc04d1b4
TI		 3192/* add playback controls from the parsed DAC table */
3193static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
3194 const struct auto_pin_cfg *cfg)
3195{
3196 struct sigmatel_spec *spec = codec->spec;
7c922de7 3197 hda_nid_t nid;
dc04d1b4 3198 int err;
7c922de7 3199 int idx;
dc04d1b4
TI		 3200
3201 err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
3202 spec->multiout.dac_nids,
3203 cfg->line_out_type);
3204 if (err < 0)
3205 return err;
c7d4b2fa 3206
a9cb5c90 3207 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3208 err = stac92xx_add_control(spec,
3209 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3210 "Headphone as Line Out Switch",
3211 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3212 if (err < 0)
3213 return err;
3214 }
3215
eea7dc93 3216 for (idx = 0; idx < cfg->num_inputs; idx++) {
86e2959a 3217 if (cfg->inputs[idx].type > AUTO_PIN_LINE_IN)
eea7dc93
TI		 3218 break;
3219 nid = cfg->inputs[idx].pin;
3220 err = stac92xx_add_jack_mode_control(codec, nid, idx);
3221 if (err < 0)
3222 return err;
b5895dc8 3223 }
403d1944 3224
c7d4b2fa
M		 3225 return 0;
3226}
3227
eb06ed8f
TI		 3228/* add playback controls for Speaker and HP outputs */
3229static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3230 struct auto_pin_cfg *cfg)
3231{
3232 struct sigmatel_spec *spec = codec->spec;
dc04d1b4
TI		 3233 int err;
3234
3235 err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
3236 spec->hp_dacs, AUTO_PIN_HP_OUT);
3237 if (err < 0)
3238 return err;
3239
3240 err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
3241 spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
3242 if (err < 0)
3243 return err;
eb06ed8f 3244
c7d4b2fa
M		 3245 return 0;
3246}
3247
b22b4821 3248/* labels for mono mux outputs */
d0513fc6
MR		 3249static const char *stac92xx_mono_labels[4] = {
3250 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3251};
3252
3253/* create mono mux for mono out on capable codecs */
3254static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3255{
3256 struct sigmatel_spec *spec = codec->spec;
3257 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3258 int i, num_cons;
3259 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3260
3261 num_cons = snd_hda_get_connections(codec,
3262 spec->mono_nid,
3263 con_lst,
3264 HDA_MAX_NUM_INPUTS);
16a433d8 3265 if (num_cons <= 0 || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
b22b4821
MR		 3266 return -EINVAL;
3267
10a20af7
TI		 3268 for (i = 0; i < num_cons; i++)
3269 snd_hda_add_imux_item(mono_mux, stac92xx_mono_labels[i], i,
3270 NULL);
09a99959
MR		 3271
3272 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3273 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3274}
3275
1cd2224c
MR		 3276/* create PC beep volume controls */
3277static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3278 hda_nid_t nid)
3279{
3280 struct sigmatel_spec *spec = codec->spec;
3281 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
123c07ae
JK		 3282 int err, type = STAC_CTL_WIDGET_MUTE_BEEP;
3283
3284 if (spec->anabeep_nid == nid)
3285 type = STAC_CTL_WIDGET_MUTE;
1cd2224c
MR		 3286
3287 /* check for mute support for the the amp */
3288 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
123c07ae 3289 err = stac92xx_add_control(spec, type,
d355c82a 3290 "Beep Playback Switch",
1cd2224c
MR		 3291 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3292 if (err < 0)
3293 return err;
3294 }
3295
3296 /* check to see if there is volume support for the amp */
3297 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3298 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
d355c82a 3299 "Beep Playback Volume",
1cd2224c
MR		 3300 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3301 if (err < 0)
3302 return err;
3303 }
3304 return 0;
3305}
3306
4d4e9bb3
TI		 3307#ifdef CONFIG_SND_HDA_INPUT_BEEP
3308#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3309
3310static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3311 struct snd_ctl_elem_value *ucontrol)
3312{
3313 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3314 ucontrol->value.integer.value[0] = codec->beep->enabled;
3315 return 0;
3316}
3317
3318static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3319 struct snd_ctl_elem_value *ucontrol)
3320{
3321 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
123c07ae 3322 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
4d4e9bb3
TI		 3323}
3324
3325static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3326 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3327 .info = stac92xx_dig_beep_switch_info,
3328 .get = stac92xx_dig_beep_switch_get,
3329 .put = stac92xx_dig_beep_switch_put,
3330};
3331
3332static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3333{
3334 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
d355c82a 3335 0, "Beep Playback Switch", 0);
4d4e9bb3
TI		 3336}
3337#endif
3338
4682eee0
MR		 3339static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3340{
3341 struct sigmatel_spec *spec = codec->spec;
667067d8 3342 int i, j, err = 0;
4682eee0
MR		 3343
3344 for (i = 0; i < spec->num_muxes; i++) {
667067d8
TI		 3345 hda_nid_t nid;
3346 unsigned int wcaps;
3347 unsigned long val;
3348
4682eee0
MR		 3349 nid = spec->mux_nids[i];
3350 wcaps = get_wcaps(codec, nid);
667067d8
TI		 3351 if (!(wcaps & AC_WCAP_OUT_AMP))
3352 continue;
4682eee0 3353
667067d8
TI		 3354 /* check whether already the same control was created as
3355 * normal Capture Volume.
3356 */
3357 val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
3358 for (j = 0; j < spec->num_caps; j++) {
3359 if (spec->capvols[j] == val)
3360 break;
4682eee0 3361 }
667067d8
TI		 3362 if (j < spec->num_caps)
3363 continue;
3364
3365 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, i,
3366 "Mux Capture Volume", val);
3367 if (err < 0)
3368 return err;
4682eee0
MR		 3369 }
3370 return 0;
3371};
3372
d9737751 3373static const char *stac92xx_spdif_labels[3] = {
65973632 3374 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3375};
3376
3377static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3378{
3379 struct sigmatel_spec *spec = codec->spec;
3380 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3381 const char **labels = spec->spdif_labels;
d9737751 3382 int i, num_cons;
65973632 3383 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3384
3385 num_cons = snd_hda_get_connections(codec,
3386 spec->smux_nids[0],
3387 con_lst,
3388 HDA_MAX_NUM_INPUTS);
16a433d8 3389 if (num_cons <= 0)
d9737751
MR		 3390 return -EINVAL;
3391
65973632
MR		 3392 if (!labels)
3393 labels = stac92xx_spdif_labels;
3394
10a20af7
TI		 3395 for (i = 0; i < num_cons; i++)
3396 snd_hda_add_imux_item(spdif_mux, labels[i], i, NULL);
d9737751
MR		 3397
3398 return 0;
3399}
3400
8b65727b 3401/* labels for dmic mux inputs */
ddc2cec4 3402static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3403 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3404 "Digital Mic 3", "Digital Mic 4"
3405};
3406
3d21d3f7
TI		 3407static int get_connection_index(struct hda_codec *codec, hda_nid_t mux,
3408 hda_nid_t nid)
3409{
3410 hda_nid_t conn[HDA_MAX_NUM_INPUTS];
3411 int i, nums;
3412
3413 nums = snd_hda_get_connections(codec, mux, conn, ARRAY_SIZE(conn));
3414 for (i = 0; i < nums; i++)
3415 if (conn[i] == nid)
3416 return i;
3417 return -1;
3418}
3419
667067d8 3420/* create a volume assigned to the given pin (only if supported) */
96f845de 3421/* return 1 if the volume control is created */
667067d8 3422static int create_elem_capture_vol(struct hda_codec *codec, hda_nid_t nid,
eea7dc93 3423 const char *label, int idx, int direction)
667067d8
TI		 3424{
3425 unsigned int caps, nums;
3426 char name[32];
96f845de 3427 int err;
667067d8 3428
96f845de
TI		 3429 if (direction == HDA_OUTPUT)
3430 caps = AC_WCAP_OUT_AMP;
3431 else
3432 caps = AC_WCAP_IN_AMP;
3433 if (!(get_wcaps(codec, nid) & caps))
667067d8 3434 return 0;
96f845de 3435 caps = query_amp_caps(codec, nid, direction);
667067d8
TI		 3436 nums = (caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT;
3437 if (!nums)
3438 return 0;
3439 snprintf(name, sizeof(name), "%s Capture Volume", label);
eea7dc93
TI		 3440 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx, name,
3441 HDA_COMPOSE_AMP_VAL(nid, 3, 0, direction));
96f845de
TI		 3442 if (err < 0)
3443 return err;
3444 return 1;
667067d8
TI		 3445}
3446
8b65727b
MP		 3447/* create playback/capture controls for input pins on dmic capable codecs */
3448static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3449 const struct auto_pin_cfg *cfg)
3450{
3451 struct sigmatel_spec *spec = codec->spec;
5207e10e 3452 struct hda_input_mux *imux = &spec->private_imux;
8b65727b 3453 struct hda_input_mux *dimux = &spec->private_dimux;
263d0328 3454 int err, i;
5207e10e 3455 unsigned int def_conf;
8b65727b 3456
10a20af7 3457 snd_hda_add_imux_item(dimux, stac92xx_dmic_labels[0], 0, NULL);
5207e10e 3458
8b65727b 3459 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3460 hda_nid_t nid;
10a20af7 3461 int index, type_idx;
5207e10e 3462 const char *label;
8b65727b 3463
667067d8
TI		 3464 nid = spec->dmic_nids[i];
3465 if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_PIN)
3466 continue;
3467 def_conf = snd_hda_codec_get_pincfg(codec, nid);
8b65727b
MP		 3468 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3469 continue;
3470
3d21d3f7
TI		 3471 index = get_connection_index(codec, spec->dmux_nids[0], nid);
3472 if (index < 0)
3473 continue;
3474
10a20af7
TI		 3475 label = hda_get_input_pin_label(codec, nid, 1);
3476 snd_hda_add_imux_item(dimux, label, index, &type_idx);
5207e10e 3477
10a20af7
TI		 3478 err = create_elem_capture_vol(codec, nid, label, type_idx,
3479 HDA_INPUT);
667067d8
TI		 3480 if (err < 0)
3481 return err;
96f845de
TI		 3482 if (!err) {
3483 err = create_elem_capture_vol(codec, nid, label,
10a20af7 3484 type_idx, HDA_OUTPUT);
96f845de
TI		 3485 if (err < 0)
3486 return err;
3487 }
0678accd 3488
5207e10e 3489 if (snd_hda_get_bool_hint(codec, "separate_dmux") != 1) {
10a20af7 3490 snd_hda_add_imux_item(imux, label, index, NULL);
f41cc2a8 3491 spec->num_analog_muxes++;
5207e10e 3492 }
8b65727b
MP		 3493 }
3494
3495 return 0;
3496}
3497
3d21d3f7 3498static int check_mic_pin(struct hda_codec *codec, hda_nid_t nid,
9907790a 3499 hda_nid_t *fixed, hda_nid_t *ext, hda_nid_t *dock)
3d21d3f7
TI		 3500{
3501 unsigned int cfg;
3502
3503 if (!nid)
3504 return 0;
3505 cfg = snd_hda_codec_get_pincfg(codec, nid);
99ae28be
TI		 3506 switch (snd_hda_get_input_pin_attr(cfg)) {
3507 case INPUT_PIN_ATTR_INT:
3d21d3f7
TI		 3508 if (*fixed)
3509 return 1; /* already occupied */
3510 *fixed = nid;
3511 break;
99ae28be
TI		 3512 case INPUT_PIN_ATTR_UNUSED:
3513 break;
3514 case INPUT_PIN_ATTR_DOCK:
3515 if (*dock)
3516 return 1; /* already occupied */
3517 *dock = nid;
3518 break;
3519 default:
3d21d3f7
TI		 3520 if (*ext)
3521 return 1; /* already occupied */
3522 *ext = nid;
3523 break;
3524 }
3525 return 0;
3526}
3527
3528static int set_mic_route(struct hda_codec *codec,
3529 struct sigmatel_mic_route *mic,
3530 hda_nid_t pin)
3531{
3532 struct sigmatel_spec *spec = codec->spec;
3533 struct auto_pin_cfg *cfg = &spec->autocfg;
3534 int i;
3535
3536 mic->pin = pin;
9907790a
CC		 3537 if (pin == 0)
3538 return 0;
eea7dc93
TI		 3539 for (i = 0; i < cfg->num_inputs; i++) {
3540 if (pin == cfg->inputs[i].pin)
3d21d3f7 3541 break;
eea7dc93 3542 }
86e2959a 3543 if (i < cfg->num_inputs && cfg->inputs[i].type == AUTO_PIN_MIC) {
3d21d3f7 3544 /* analog pin */
3d21d3f7
TI		 3545 i = get_connection_index(codec, spec->mux_nids[0], pin);
3546 if (i < 0)
3547 return -1;
3548 mic->mux_idx = i;
02d33322
TI		 3549 mic->dmux_idx = -1;
3550 if (spec->dmux_nids)
3551 mic->dmux_idx = get_connection_index(codec,
3552 spec->dmux_nids[0],
3553 spec->mux_nids[0]);
da2a2aaa 3554 } else if (spec->dmux_nids) {
3d21d3f7 3555 /* digital pin */
3d21d3f7
TI		 3556 i = get_connection_index(codec, spec->dmux_nids[0], pin);
3557 if (i < 0)
3558 return -1;
3559 mic->dmux_idx = i;
02d33322
TI		 3560 mic->mux_idx = -1;
3561 if (spec->mux_nids)
3562 mic->mux_idx = get_connection_index(codec,
3563 spec->mux_nids[0],
3564 spec->dmux_nids[0]);
3d21d3f7
TI		 3565 }
3566 return 0;
3567}
3568
3569/* return non-zero if the device is for automatic mic switch */
3570static int stac_check_auto_mic(struct hda_codec *codec)
3571{
3572 struct sigmatel_spec *spec = codec->spec;
3573 struct auto_pin_cfg *cfg = &spec->autocfg;
9907790a 3574 hda_nid_t fixed, ext, dock;
3d21d3f7
TI		 3575 int i;
3576
eea7dc93 3577 for (i = 0; i < cfg->num_inputs; i++) {
86e2959a 3578 if (cfg->inputs[i].type >= AUTO_PIN_LINE_IN)
3d21d3f7
TI		 3579 return 0; /* must be exclusively mics */
3580 }
9907790a 3581 fixed = ext = dock = 0;
eea7dc93 3582 for (i = 0; i < cfg->num_inputs; i++)
9907790a
CC		 3583 if (check_mic_pin(codec, cfg->inputs[i].pin,
3584 &fixed, &ext, &dock))
3d21d3f7
TI		 3585 return 0;
3586 for (i = 0; i < spec->num_dmics; i++)
9907790a
CC		 3587 if (check_mic_pin(codec, spec->dmic_nids[i],
3588 &fixed, &ext, &dock))
3d21d3f7 3589 return 0;
9907790a
CC		 3590 if (!fixed && !ext && !dock)
3591 return 0; /* no input to switch */
3d21d3f7
TI		 3592 if (!(get_wcaps(codec, ext) & AC_WCAP_UNSOL_CAP))
3593 return 0; /* no unsol support */
3594 if (set_mic_route(codec, &spec->ext_mic, ext) ||
9907790a
CC		 3595 set_mic_route(codec, &spec->int_mic, fixed) ||
3596 set_mic_route(codec, &spec->dock_mic, dock))
3d21d3f7
TI		 3597 return 0; /* something is wrong */
3598 return 1;
3599}
3600
c7d4b2fa
M		 3601/* create playback/capture controls for input pins */
3602static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3603{
3604 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 3605 struct hda_input_mux *imux = &spec->private_imux;
667067d8 3606 int i, j;
263d0328 3607 const char *label;
c7d4b2fa 3608
eea7dc93
TI		 3609 for (i = 0; i < cfg->num_inputs; i++) {
3610 hda_nid_t nid = cfg->inputs[i].pin;
10a20af7 3611 int index, err, type_idx;
314634bc 3612
314634bc
TI		 3613 index = -1;
3614 for (j = 0; j < spec->num_muxes; j++) {
667067d8
TI		 3615 index = get_connection_index(codec, spec->mux_nids[j],
3616 nid);
3617 if (index >= 0)
3618 break;
c7d4b2fa 3619 }
667067d8
TI		 3620 if (index < 0)
3621 continue;
3622
10a20af7
TI		 3623 label = hda_get_autocfg_input_label(codec, cfg, i);
3624 snd_hda_add_imux_item(imux, label, index, &type_idx);
263d0328 3625
667067d8 3626 err = create_elem_capture_vol(codec, nid,
263d0328 3627 label, type_idx,
96f845de 3628 HDA_INPUT);
667067d8
TI		 3629 if (err < 0)
3630 return err;
c7d4b2fa 3631 }
5207e10e 3632 spec->num_analog_muxes = imux->num_items;
c7d4b2fa 3633
7b043899 3634 if (imux->num_items) {
62fe78e9
SR		 3635 /*
3636 * Set the current input for the muxes.
3637 * The STAC9221 has two input muxes with identical source
3638 * NID lists. Hopefully this won't get confused.
3639 */
3640 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3641 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3642 AC_VERB_SET_CONNECT_SEL,
3643 imux->items[0].index);
62fe78e9
SR		 3644 }
3645 }
3646
c7d4b2fa
M		 3647 return 0;
3648}
3649
c7d4b2fa
M		 3650static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3651{
3652 struct sigmatel_spec *spec = codec->spec;
3653 int i;
3654
3655 for (i = 0; i < spec->autocfg.line_outs; i++) {
3656 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3657 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3658 }
3659}
3660
3661static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3662{
3663 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3664 int i;
c7d4b2fa 3665
eb06ed8f
TI		 3666 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3667 hda_nid_t pin;
3668 pin = spec->autocfg.hp_pins[i];
3669 if (pin) /* connect to front */
3670 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3671 }
3672 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3673 hda_nid_t pin;
3674 pin = spec->autocfg.speaker_pins[i];
3675 if (pin) /* connect to front */
3676 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3677 }
c7d4b2fa
M		 3678}
3679
8af3aeb4
TI		 3680static int is_dual_headphones(struct hda_codec *codec)
3681{
3682 struct sigmatel_spec *spec = codec->spec;
3683 int i, valid_hps;
3684
3685 if (spec->autocfg.line_out_type != AUTO_PIN_SPEAKER_OUT ||
3686 spec->autocfg.hp_outs <= 1)
3687 return 0;
3688 valid_hps = 0;
3689 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3690 hda_nid_t nid = spec->autocfg.hp_pins[i];
3691 unsigned int cfg = snd_hda_codec_get_pincfg(codec, nid);
3692 if (get_defcfg_location(cfg) & AC_JACK_LOC_SEPARATE)
3693 continue;
3694 valid_hps++;
3695 }
3696 return (valid_hps > 1);
3697}
3698
3699
3cc08dc6 3700static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3701{
3702 struct sigmatel_spec *spec = codec->spec;
dc04d1b4 3703 int hp_swap = 0;
6479c631 3704 int i, err;
c7d4b2fa 3705
8b65727b
MP		 3706 if ((err = snd_hda_parse_pin_def_config(codec,
3707 &spec->autocfg,
3708 spec->dmic_nids)) < 0)
c7d4b2fa 3709 return err;
82bc955f 3710 if (! spec->autocfg.line_outs)
869264c4 3711 return 0; /* can't find valid pin config */
19039bd0 3712
bcecd9bd
JZ		 3713 /* If we have no real line-out pin and multiple hp-outs, HPs should
3714 * be set up as multi-channel outputs.
3715 */
8af3aeb4 3716 if (is_dual_headphones(codec)) {
bcecd9bd
JZ		 3717 /* Copy hp_outs to line_outs, backup line_outs in
3718 * speaker_outs so that the following routines can handle
3719 * HP pins as primary outputs.
3720 */
c21ca4a8 3721 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3722 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3723 sizeof(spec->autocfg.line_out_pins));
3724 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3725 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3726 sizeof(spec->autocfg.hp_pins));
3727 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3728 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3729 spec->autocfg.hp_outs = 0;
dc04d1b4 3730 hp_swap = 1;
bcecd9bd 3731 }
09a99959 3732 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3733 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3734 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3735 u32 caps = query_amp_caps(codec,
3736 spec->autocfg.mono_out_pin, dir);
3737 hda_nid_t conn_list[1];
3738
3739 /* get the mixer node and then the mono mux if it exists */
3740 if (snd_hda_get_connections(codec,
3741 spec->autocfg.mono_out_pin, conn_list, 1) &&
3742 snd_hda_get_connections(codec, conn_list[0],
16a433d8 3743 conn_list, 1) > 0) {
09a99959
MR		 3744
3745 int wcaps = get_wcaps(codec, conn_list[0]);
a22d543a 3746 int wid_type = get_wcaps_type(wcaps);
09a99959
MR		 3747 /* LR swap check, some stac925x have a mux that
3748 * changes the DACs output path instead of the
3749 * mono-mux path.
3750 */
3751 if (wid_type == AC_WID_AUD_SEL &&
3752 !(wcaps & AC_WCAP_LR_SWAP))
3753 spec->mono_nid = conn_list[0];
3754 }
d0513fc6
MR		 3755 if (dir) {
3756 hda_nid_t nid = spec->autocfg.mono_out_pin;
3757
3758 /* most mono outs have a least a mute/unmute switch */
3759 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3760 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3761 "Mono Playback Switch",
3762 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3763 if (err < 0)
3764 return err;
d0513fc6
MR		 3765 /* check for volume support for the amp */
3766 if ((caps & AC_AMPCAP_NUM_STEPS)
3767 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3768 err = stac92xx_add_control(spec,
3769 STAC_CTL_WIDGET_VOL,
3770 "Mono Playback Volume",
3771 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3772 if (err < 0)
3773 return err;
3774 }
09a99959
MR		 3775 }
3776
3777 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3778 AC_PINCTL_OUT_EN);
3779 }
bcecd9bd 3780
c21ca4a8
TI		 3781 if (!spec->multiout.num_dacs) {
3782 err = stac92xx_auto_fill_dac_nids(codec);
3783 if (err < 0)
19039bd0 3784 return err;
c9280d68
TI		 3785 err = stac92xx_auto_create_multi_out_ctls(codec,
3786 &spec->autocfg);
3787 if (err < 0)
3788 return err;
c21ca4a8 3789 }
c7d4b2fa 3790
1cd2224c
MR		 3791 /* setup analog beep controls */
3792 if (spec->anabeep_nid > 0) {
3793 err = stac92xx_auto_create_beep_ctls(codec,
3794 spec->anabeep_nid);
3795 if (err < 0)
3796 return err;
3797 }
3798
3799 /* setup digital beep controls and input device */
3800#ifdef CONFIG_SND_HDA_INPUT_BEEP
3801 if (spec->digbeep_nid > 0) {
3802 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3803 unsigned int caps;
1cd2224c
MR		 3804
3805 err = stac92xx_auto_create_beep_ctls(codec, nid);
3806 if (err < 0)
3807 return err;
3808 err = snd_hda_attach_beep_device(codec, nid);
3809 if (err < 0)
3810 return err;
d8d881dd
TI		 3811 if (codec->beep) {
3812 /* IDT/STAC codecs have linear beep tone parameter */
1b0e372d 3813 codec->beep->linear_tone = spec->linear_tone_beep;
d8d881dd
TI		 3814 /* if no beep switch is available, make its own one */
3815 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3816 if (!(caps & AC_AMPCAP_MUTE)) {
3817 err = stac92xx_beep_switch_ctl(codec);
3818 if (err < 0)
3819 return err;
3820 }
4d4e9bb3 3821 }
1cd2224c
MR		 3822 }
3823#endif
3824
0fb87bb4 3825 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
0fb87bb4
ML		 3826 if (err < 0)
3827 return err;
3828
dc04d1b4
TI		 3829 /* All output parsing done, now restore the swapped hp pins */
3830 if (hp_swap) {
3831 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3832 sizeof(spec->autocfg.hp_pins));
3833 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3834 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3835 spec->autocfg.line_outs = 0;
3836 }
0fb87bb4 3837
3d21d3f7
TI		 3838 if (stac_check_auto_mic(codec)) {
3839 spec->auto_mic = 1;
3840 /* only one capture for auto-mic */
3841 spec->num_adcs = 1;
3842 spec->num_caps = 1;
3843 spec->num_muxes = 1;
3844 }
3845
6479c631
TI		 3846 for (i = 0; i < spec->num_caps; i++) {
3847 err = stac92xx_add_capvol_ctls(codec, spec->capvols[i],
3848 spec->capsws[i], i);
3849 if (err < 0)
3850 return err;
3851 }
3852
dc04d1b4 3853 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
0fb87bb4 3854 if (err < 0)
c7d4b2fa
M		 3855 return err;
3856
b22b4821
MR		 3857 if (spec->mono_nid > 0) {
3858 err = stac92xx_auto_create_mono_output_ctls(codec);
3859 if (err < 0)
3860 return err;
3861 }
2a9c7816 3862 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3863 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3864 &spec->autocfg)) < 0)
3865 return err;
4682eee0
MR		 3866 if (spec->num_muxes > 0) {
3867 err = stac92xx_auto_create_mux_input_ctls(codec);
3868 if (err < 0)
3869 return err;
3870 }
d9737751
MR		 3871 if (spec->num_smuxes > 0) {
3872 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3873 if (err < 0)
3874 return err;
3875 }
8b65727b 3876
e3c75964
TI		 3877 err = stac92xx_add_input_source(spec);
3878 if (err < 0)
3879 return err;
3880
c7d4b2fa 3881 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3882 if (spec->multiout.max_channels > 2)
c7d4b2fa 3883 spec->surr_switch = 1;
c7d4b2fa 3884
0852d7a6 3885 if (spec->autocfg.dig_outs)
3cc08dc6 3886 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3887 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3888 spec->dig_in_nid = dig_in;
c7d4b2fa 3889
603c4019
TI		 3890 if (spec->kctls.list)
3891 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3892
3893 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 3894 if (!spec->dinput_mux)
3895 spec->dinput_mux = &spec->private_dimux;
d9737751 3896 spec->sinput_mux = &spec->private_smux;
b22b4821 3897 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 3898 return 1;
3899}
3900
82bc955f
TI		 3901/* add playback controls for HP output */
3902static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3903 struct auto_pin_cfg *cfg)
3904{
3905 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3906 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3907 unsigned int wid_caps;
3908
3909 if (! pin)
3910 return 0;
3911
3912 wid_caps = get_wcaps(codec, pin);
505cb341 3913 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3914 spec->hp_detect = 1;
82bc955f
TI		 3915
3916 return 0;
3917}
3918
160ea0dc
RF		 3919/* add playback controls for LFE output */
3920static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3921 struct auto_pin_cfg *cfg)
3922{
3923 struct sigmatel_spec *spec = codec->spec;
3924 int err;
3925 hda_nid_t lfe_pin = 0x0;
3926 int i;
3927
3928 /*
3929 * search speaker outs and line outs for a mono speaker pin
3930 * with an amp. If one is found, add LFE controls
3931 * for it.
3932 */
3933 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3934 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3935 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3936 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3937 if (wcaps == AC_WCAP_OUT_AMP)
3938 /* found a mono speaker with an amp, must be lfe */
3939 lfe_pin = pin;
3940 }
3941
3942 /* if speaker_outs is 0, then speakers may be in line_outs */
3943 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3944 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3945 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3946 unsigned int defcfg;
330ee995 3947 defcfg = snd_hda_codec_get_pincfg(codec, pin);
8b551785 3948 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3949 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3950 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3951 if (wcaps == AC_WCAP_OUT_AMP)
3952 /* found a mono speaker with an amp,
3953 must be lfe */
3954 lfe_pin = pin;
3955 }
3956 }
3957 }
3958
3959 if (lfe_pin) {
7c7767eb 3960 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3961 if (err < 0)
3962 return err;
3963 }
3964
3965 return 0;
3966}
3967
c7d4b2fa
M		 3968static int stac9200_parse_auto_config(struct hda_codec *codec)
3969{
3970 struct sigmatel_spec *spec = codec->spec;
3971 int err;
3972
df694daa 3973 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3974 return err;
3975
3976 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3977 return err;
3978
82bc955f
TI		 3979 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3980 return err;
3981
160ea0dc
RF		 3982 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3983 return err;
3984
355a0ec4
TI		 3985 if (spec->num_muxes > 0) {
3986 err = stac92xx_auto_create_mux_input_ctls(codec);
3987 if (err < 0)
3988 return err;
3989 }
3990
e3c75964
TI		 3991 err = stac92xx_add_input_source(spec);
3992 if (err < 0)
3993 return err;
3994
0852d7a6 3995 if (spec->autocfg.dig_outs)
c7d4b2fa 3996 spec->multiout.dig_out_nid = 0x05;
82bc955f 3997 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3998 spec->dig_in_nid = 0x04;
c7d4b2fa 3999
603c4019
TI		 4000 if (spec->kctls.list)
4001 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 4002
4003 spec->input_mux = &spec->private_imux;
8b65727b 4004 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 4005
4006 return 1;
4007}
4008
62fe78e9
SR		 4009/*
4010 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
4011 * funky external mute control using GPIO pins.
4012 */
4013
76e1ddfb 4014static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 4015 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 4016{
4017 unsigned int gpiostate, gpiomask, gpiodir;
4018
4019 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
4020 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 4021 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 4022
4023 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
4024 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 4025 gpiomask |= mask;
62fe78e9
SR		 4026
4027 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
4028 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 4029 gpiodir |= dir_mask;
62fe78e9 4030
76e1ddfb 4031 /* Configure GPIOx as CMOS */
62fe78e9
SR		 4032 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
4033
4034 snd_hda_codec_write(codec, codec->afg, 0,
4035 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 4036 snd_hda_codec_read(codec, codec->afg, 0,
4037 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 4038
4039 msleep(1);
4040
76e1ddfb
TI		 4041 snd_hda_codec_read(codec, codec->afg, 0,
4042 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 4043}
4044
8c8145b8 4045#ifdef CONFIG_SND_HDA_INPUT_JACK
95c09099
TI		 4046static void stac92xx_free_jack_priv(struct snd_jack *jack)
4047{
4048 struct sigmatel_jack *jacks = jack->private_data;
4049 jacks->nid = 0;
4050 jacks->jack = NULL;
4051}
4052#endif
4053
74aeaabc
MR		 4054static int stac92xx_add_jack(struct hda_codec *codec,
4055 hda_nid_t nid, int type)
4056{
8c8145b8 4057#ifdef CONFIG_SND_HDA_INPUT_JACK
74aeaabc
MR		 4058 struct sigmatel_spec *spec = codec->spec;
4059 struct sigmatel_jack *jack;
330ee995 4060 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
74aeaabc
MR		 4061 int connectivity = get_defcfg_connect(def_conf);
4062 char name[32];
95c09099 4063 int err;
74aeaabc
MR		 4064
4065 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
4066 return 0;
4067
4068 snd_array_init(&spec->jacks, sizeof(*jack), 32);
4069 jack = snd_array_new(&spec->jacks);
4070 if (!jack)
4071 return -ENOMEM;
4072 jack->nid = nid;
4073 jack->type = type;
4074
86de7416 4075 snprintf(name, sizeof(name), "%s at %s %s Jack",
74aeaabc
MR		 4076 snd_hda_get_jack_type(def_conf),
4077 snd_hda_get_jack_connectivity(def_conf),
4078 snd_hda_get_jack_location(def_conf));
4079
95c09099
TI		 4080 err = snd_jack_new(codec->bus->card, name, type, &jack->jack);
4081 if (err < 0) {
4082 jack->nid = 0;
4083 return err;
4084 }
4085 jack->jack->private_data = jack;
4086 jack->jack->private_free = stac92xx_free_jack_priv;
e4973e1e 4087#endif
95c09099 4088 return 0;
74aeaabc
MR		 4089}
4090
c6e4c666
TI		 4091static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
4092 unsigned char type, int data)
74aeaabc
MR		 4093{
4094 struct sigmatel_event *event;
4095
4096 snd_array_init(&spec->events, sizeof(*event), 32);
4097 event = snd_array_new(&spec->events);
4098 if (!event)
4099 return -ENOMEM;
4100 event->nid = nid;
c6e4c666
TI		 4101 event->type = type;
4102 event->tag = spec->events.used;
74aeaabc
MR		 4103 event->data = data;
4104
c6e4c666 4105 return event->tag;
74aeaabc
MR		 4106}
4107
c6e4c666 4108static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
62558ce1 4109 hda_nid_t nid)
74aeaabc
MR		 4110{
4111 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4112 struct sigmatel_event *event = spec->events.list;
4113 int i;
4114
4115 for (i = 0; i < spec->events.used; i++, event++) {
62558ce1 4116 if (event->nid == nid)
c6e4c666 4117 return event;
74aeaabc 4118 }
c6e4c666 4119 return NULL;
74aeaabc
MR		 4120}
4121
c6e4c666
TI		 4122static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
4123 unsigned char tag)
314634bc 4124{
c6e4c666
TI		 4125 struct sigmatel_spec *spec = codec->spec;
4126 struct sigmatel_event *event = spec->events.list;
4127 int i;
4128
4129 for (i = 0; i < spec->events.used; i++, event++) {
4130 if (event->tag == tag)
4131 return event;
74aeaabc 4132 }
c6e4c666
TI		 4133 return NULL;
4134}
4135
62558ce1
TI		 4136/* check if given nid is a valid pin and no other events are assigned
4137 * to it. If OK, assign the event, set the unsol flag, and returns 1.
4138 * Otherwise, returns zero.
4139 */
4140static int enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
4141 unsigned int type)
c6e4c666
TI		 4142{
4143 struct sigmatel_event *event;
4144 int tag;
4145
4146 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
62558ce1
TI		 4147 return 0;
4148 event = stac_get_event(codec, nid);
4149 if (event) {
4150 if (event->type != type)
4151 return 0;
c6e4c666 4152 tag = event->tag;
62558ce1 4153 } else {
c6e4c666 4154 tag = stac_add_event(codec->spec, nid, type, 0);
62558ce1
TI		 4155 if (tag < 0)
4156 return 0;
4157 }
c6e4c666
TI		 4158 snd_hda_codec_write_cache(codec, nid, 0,
4159 AC_VERB_SET_UNSOLICITED_ENABLE,
4160 AC_USRSP_EN | tag);
62558ce1 4161 return 1;
314634bc
TI		 4162}
4163
a64135a2
MR		 4164static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
4165{
4166 int i;
4167 for (i = 0; i < cfg->hp_outs; i++)
4168 if (cfg->hp_pins[i] == nid)
4169 return 1; /* nid is a HP-Out */
4170
4171 return 0; /* nid is not a HP-Out */
4172};
4173
b76c850f
MR		 4174static void stac92xx_power_down(struct hda_codec *codec)
4175{
4176 struct sigmatel_spec *spec = codec->spec;
4177
4178 /* power down inactive DACs */
4179 hda_nid_t *dac;
4180 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4181 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4182 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 4183 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4184}
4185
f73d3585
TI		 4186static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4187 int enable);
4188
014c41fc
TI		 4189static inline int get_int_hint(struct hda_codec *codec, const char *key,
4190 int *valp)
4191{
4192 const char *p;
4193 p = snd_hda_get_hint(codec, key);
4194 if (p) {
4195 unsigned long val;
4196 if (!strict_strtoul(p, 0, &val)) {
4197 *valp = val;
4198 return 1;
4199 }
4200 }
4201 return 0;
4202}
4203
6565e4fa
TI		 4204/* override some hints from the hwdep entry */
4205static void stac_store_hints(struct hda_codec *codec)
4206{
4207 struct sigmatel_spec *spec = codec->spec;
6565e4fa
TI		 4208 int val;
4209
4210 val = snd_hda_get_bool_hint(codec, "hp_detect");
4211 if (val >= 0)
4212 spec->hp_detect = val;
014c41fc 4213 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
6565e4fa
TI		 4214 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
4215 spec->gpio_mask;
4216 }
014c41fc
TI		 4217 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
4218 spec->gpio_mask &= spec->gpio_mask;
4219 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
4220 spec->gpio_dir &= spec->gpio_mask;
4221 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
4222 spec->eapd_mask &= spec->gpio_mask;
4223 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
4224 spec->gpio_mute &= spec->gpio_mask;
6565e4fa
TI		 4225 val = snd_hda_get_bool_hint(codec, "eapd_switch");
4226 if (val >= 0)
4227 spec->eapd_switch = val;
014c41fc
TI		 4228 get_int_hint(codec, "gpio_led_polarity", &spec->gpio_led_polarity);
4229 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
043958e6
TI		 4230 spec->gpio_mask |= spec->gpio_led;
4231 spec->gpio_dir |= spec->gpio_led;
4232 if (spec->gpio_led_polarity)
4233 spec->gpio_data |= spec->gpio_led;
4234 }
6565e4fa
TI		 4235}
4236
c7d4b2fa
M		 4237static int stac92xx_init(struct hda_codec *codec)
4238{
4239 struct sigmatel_spec *spec = codec->spec;
82bc955f 4240 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4241 unsigned int gpio;
e4973e1e 4242 int i;
c7d4b2fa 4243
c7d4b2fa
M		 4244 snd_hda_sequence_write(codec, spec->init);
4245
8daaaa97
MR		 4246 /* power down adcs initially */
4247 if (spec->powerdown_adcs)
4248 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4249 snd_hda_codec_write(codec,
8daaaa97
MR		 4250 spec->adc_nids[i], 0,
4251 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585 4252
6565e4fa
TI		 4253 /* override some hints */
4254 stac_store_hints(codec);
4255
f73d3585
TI		 4256 /* set up GPIO */
4257 gpio = spec->gpio_data;
4258 /* turn on EAPD statically when spec->eapd_switch isn't set.
4259 * otherwise, unsol event will turn it on/off dynamically
4260 */
4261 if (!spec->eapd_switch)
4262 gpio |= spec->eapd_mask;
4263 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4264
82bc955f
TI		 4265 /* set up pins */
4266 if (spec->hp_detect) {
505cb341 4267 /* Enable unsolicited responses on the HP widget */
74aeaabc 4268 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4269 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4270 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4271 }
1c4bdf9b
TI		 4272 if (cfg->line_out_type == AUTO_PIN_LINE_OUT &&
4273 cfg->speaker_outs > 0) {
fefd67f3 4274 /* enable pin-detect for line-outs as well */
15cfa2b3
TI		 4275 for (i = 0; i < cfg->line_outs; i++) {
4276 hda_nid_t nid = cfg->line_out_pins[i];
fefd67f3
TI		 4277 enable_pin_detect(codec, nid, STAC_LO_EVENT);
4278 }
4279 }
4280
0a07acaf
TI		 4281 /* force to enable the first line-out; the others are set up
4282 * in unsol_event
4283 */
4284 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4285 AC_PINCTL_OUT_EN);
82bc955f 4286 /* fake event to set up pins */
5f380eb1
TI		 4287 if (cfg->hp_pins[0])
4288 stac_issue_unsol_event(codec, cfg->hp_pins[0]);
4289 else if (cfg->line_out_pins[0])
4290 stac_issue_unsol_event(codec, cfg->line_out_pins[0]);
82bc955f
TI		 4291 } else {
4292 stac92xx_auto_init_multi_out(codec);
4293 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 4294 for (i = 0; i < cfg->hp_outs; i++)
4295 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f 4296 }
3d21d3f7 4297 if (spec->auto_mic) {
15b4f296 4298 /* initialize connection to analog input */
da2a2aaa
TI		 4299 if (spec->dmux_nids)
4300 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
15b4f296 4301 AC_VERB_SET_CONNECT_SEL, 0);
3d21d3f7
TI		 4302 if (enable_pin_detect(codec, spec->ext_mic.pin, STAC_MIC_EVENT))
4303 stac_issue_unsol_event(codec, spec->ext_mic.pin);
9907790a
CC		 4304 if (enable_pin_detect(codec, spec->dock_mic.pin,
4305 STAC_MIC_EVENT))
4306 stac_issue_unsol_event(codec, spec->dock_mic.pin);
3d21d3f7 4307 }
eea7dc93
TI		 4308 for (i = 0; i < cfg->num_inputs; i++) {
4309 hda_nid_t nid = cfg->inputs[i].pin;
4310 int type = cfg->inputs[i].type;
4311 unsigned int pinctl, conf;
86e2959a 4312 if (type == AUTO_PIN_MIC) {
eea7dc93
TI		 4313 /* for mic pins, force to initialize */
4314 pinctl = stac92xx_get_default_vref(codec, nid);
4315 pinctl |= AC_PINCTL_IN_EN;
4316 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4317 } else {
4318 pinctl = snd_hda_codec_read(codec, nid, 0,
4319 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4320 /* if PINCTL already set then skip */
4321 /* Also, if both INPUT and OUTPUT are set,
4322 * it must be a BIOS bug; need to override, too
4323 */
4324 if (!(pinctl & AC_PINCTL_IN_EN) ||
4325 (pinctl & AC_PINCTL_OUT_EN)) {
4326 pinctl &= ~AC_PINCTL_OUT_EN;
12dde4c6
TI		 4327 pinctl |= AC_PINCTL_IN_EN;
4328 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3 4329 }
c960a03b 4330 }
eea7dc93
TI		 4331 conf = snd_hda_codec_get_pincfg(codec, nid);
4332 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4333 if (enable_pin_detect(codec, nid, STAC_INSERT_EVENT))
4334 stac_issue_unsol_event(codec, nid);
4335 }
82bc955f 4336 }
a64135a2
MR		 4337 for (i = 0; i < spec->num_dmics; i++)
4338 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4339 AC_PINCTL_IN_EN);
0852d7a6
TI		 4340 if (cfg->dig_out_pins[0])
4341 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
f73d3585
TI		 4342 AC_PINCTL_OUT_EN);
4343 if (cfg->dig_in_pin)
4344 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4345 AC_PINCTL_IN_EN);
a64135a2 4346 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 4347 hda_nid_t nid = spec->pwr_nids[i];
4348 int pinctl, def_conf;
f73d3585 4349
eb632128
TI		 4350 /* power on when no jack detection is available */
4351 if (!spec->hp_detect) {
4352 stac_toggle_power_map(codec, nid, 1);
4353 continue;
4354 }
4355
4356 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI		 4357 continue; /* already has an unsol event */
4358
4359 pinctl = snd_hda_codec_read(codec, nid, 0,
4360 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4361 /* outputs are only ports capable of power management
4362 * any attempts on powering down a input port cause the
4363 * referenced VREF to act quirky.
4364 */
eb632128
TI		 4365 if (pinctl & AC_PINCTL_IN_EN) {
4366 stac_toggle_power_map(codec, nid, 1);
a64135a2 4367 continue;
eb632128 4368 }
330ee995 4369 def_conf = snd_hda_codec_get_pincfg(codec, nid);
f73d3585 4370 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 4371 /* skip any ports that don't have jacks since presence
4372 * detection is useless */
f73d3585
TI		 4373 if (def_conf != AC_JACK_PORT_COMPLEX) {
4374 if (def_conf != AC_JACK_PORT_NONE)
4375 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4376 continue;
f73d3585 4377 }
62558ce1
TI		 4378 if (enable_pin_detect(codec, nid, STAC_PWR_EVENT))
4379 stac_issue_unsol_event(codec, nid);
a64135a2 4380 }
c21bd025 4381
c21bd025 4382 /* sync mute LED */
9e5341b9
TI		 4383 if (spec->gpio_led)
4384 hda_call_check_power_status(codec, 0x01);
b76c850f
MR		 4385 if (spec->dac_list)
4386 stac92xx_power_down(codec);
c7d4b2fa
M		 4387 return 0;
4388}
4389
74aeaabc
MR		 4390static void stac92xx_free_jacks(struct hda_codec *codec)
4391{
8c8145b8 4392#ifdef CONFIG_SND_HDA_INPUT_JACK
b94d3539 4393 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4394 struct sigmatel_spec *spec = codec->spec;
b94d3539 4395 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR		 4396 struct sigmatel_jack *jacks = spec->jacks.list;
4397 int i;
95c09099
TI		 4398 for (i = 0; i < spec->jacks.used; i++, jacks++) {
4399 if (jacks->jack)
4400 snd_device_free(codec->bus->card, jacks->jack);
4401 }
74aeaabc
MR		 4402 }
4403 snd_array_free(&spec->jacks);
e4973e1e 4404#endif
74aeaabc
MR		 4405}
4406
603c4019
TI		 4407static void stac92xx_free_kctls(struct hda_codec *codec)
4408{
4409 struct sigmatel_spec *spec = codec->spec;
4410
4411 if (spec->kctls.list) {
4412 struct snd_kcontrol_new *kctl = spec->kctls.list;
4413 int i;
4414 for (i = 0; i < spec->kctls.used; i++)
4415 kfree(kctl[i].name);
4416 }
4417 snd_array_free(&spec->kctls);
4418}
4419
167eae5a
TI		 4420static void stac92xx_shutup(struct hda_codec *codec)
4421{
4422 struct sigmatel_spec *spec = codec->spec;
167eae5a 4423
92ee6162 4424 snd_hda_shutup_pins(codec);
167eae5a
TI		 4425
4426 if (spec->eapd_mask)
4427 stac_gpio_set(codec, spec->gpio_mask,
4428 spec->gpio_dir, spec->gpio_data &
4429 ~spec->eapd_mask);
4430}
4431
2f2f4251
M		 4432static void stac92xx_free(struct hda_codec *codec)
4433{
c7d4b2fa 4434 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4435
4436 if (! spec)
4437 return;
4438
167eae5a 4439 stac92xx_shutup(codec);
74aeaabc
MR		 4440 stac92xx_free_jacks(codec);
4441 snd_array_free(&spec->events);
11b44bbd 4442
c7d4b2fa 4443 kfree(spec);
1cd2224c 4444 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4445}
4446
4e55096e
M		 4447static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4448 unsigned int flag)
4449{
8ce84198
TI		 4450 unsigned int old_ctl, pin_ctl;
4451
4452 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4453 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4454
f9acba43
TI		 4455 if (pin_ctl & AC_PINCTL_IN_EN) {
4456 /*
4457 * we need to check the current set-up direction of
4458 * shared input pins since they can be switched via
4459 * "xxx as Output" mixer switch
4460 */
4461 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4462 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4463 return;
4464 }
4465
8ce84198 4466 old_ctl = pin_ctl;
7b043899
SL		 4467 /* if setting pin direction bits, clear the current
4468 direction bits first */
4469 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4470 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4471
8ce84198
TI		 4472 pin_ctl |= flag;
4473 if (old_ctl != pin_ctl)
4474 snd_hda_codec_write_cache(codec, nid, 0,
4475 AC_VERB_SET_PIN_WIDGET_CONTROL,
4476 pin_ctl);
4e55096e
M		 4477}
4478
4479static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4480 unsigned int flag)
4481{
4482 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4483 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI		 4484 if (pin_ctl & flag)
4485 snd_hda_codec_write_cache(codec, nid, 0,
4486 AC_VERB_SET_PIN_WIDGET_CONTROL,
4487 pin_ctl & ~flag);
4e55096e
M		 4488}
4489
d56757ab 4490static inline int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4491{
4492 if (!nid)
4493 return 0;
a252c81a 4494 return snd_hda_jack_detect(codec, nid);
314634bc
TI		 4495}
4496
fefd67f3
TI		 4497static void stac92xx_line_out_detect(struct hda_codec *codec,
4498 int presence)
4499{
4500 struct sigmatel_spec *spec = codec->spec;
4501 struct auto_pin_cfg *cfg = &spec->autocfg;
4502 int i;
4503
4504 for (i = 0; i < cfg->line_outs; i++) {
4505 if (presence)
4506 break;
4507 presence = get_pin_presence(codec, cfg->line_out_pins[i]);
4508 if (presence) {
4509 unsigned int pinctl;
4510 pinctl = snd_hda_codec_read(codec,
4511 cfg->line_out_pins[i], 0,
4512 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4513 if (pinctl & AC_PINCTL_IN_EN)
4514 presence = 0; /* mic- or line-input */
4515 }
4516 }
4517
4518 if (presence) {
4519 /* disable speakers */
4520 for (i = 0; i < cfg->speaker_outs; i++)
4521 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4522 AC_PINCTL_OUT_EN);
4523 if (spec->eapd_mask && spec->eapd_switch)
4524 stac_gpio_set(codec, spec->gpio_mask,
4525 spec->gpio_dir, spec->gpio_data &
4526 ~spec->eapd_mask);
4527 } else {
4528 /* enable speakers */
4529 for (i = 0; i < cfg->speaker_outs; i++)
4530 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4531 AC_PINCTL_OUT_EN);
4532 if (spec->eapd_mask && spec->eapd_switch)
4533 stac_gpio_set(codec, spec->gpio_mask,
4534 spec->gpio_dir, spec->gpio_data |
4535 spec->eapd_mask);
4536 }
4537}
4538
d7a89436
TI		 4539/* return non-zero if the hp-pin of the given array index isn't
4540 * a jack-detection target
4541 */
4542static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4543{
4544 struct auto_pin_cfg *cfg = &spec->autocfg;
4545
4546 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4547 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4548 return 1;
c21ca4a8 4549 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4550 return 1;
4551 /* ignore if the pin is set as line-out */
4552 if (cfg->hp_pins[i] == spec->hp_switch)
4553 return 1;
4554 return 0;
4555}
4556
c6e4c666 4557static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4558{
4559 struct sigmatel_spec *spec = codec->spec;
4560 struct auto_pin_cfg *cfg = &spec->autocfg;
4561 int i, presence;
4562
eb06ed8f 4563 presence = 0;
4fe5195c
MR		 4564 if (spec->gpio_mute)
4565 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4566 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4567
eb06ed8f 4568 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4569 if (presence)
4570 break;
d7a89436
TI		 4571 if (no_hp_sensing(spec, i))
4572 continue;
e6e3ea25
TI		 4573 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4574 if (presence) {
4575 unsigned int pinctl;
4576 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4577 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4578 if (pinctl & AC_PINCTL_IN_EN)
4579 presence = 0; /* mic- or line-input */
4580 }
eb06ed8f 4581 }
4e55096e
M		 4582
4583 if (presence) {
d7a89436 4584 /* disable lineouts */
7c2ba97b 4585 if (spec->hp_switch)
d7a89436
TI		 4586 stac92xx_reset_pinctl(codec, spec->hp_switch,
4587 AC_PINCTL_OUT_EN);
4e55096e
M		 4588 for (i = 0; i < cfg->line_outs; i++)
4589 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4590 AC_PINCTL_OUT_EN);
4e55096e 4591 } else {
d7a89436 4592 /* enable lineouts */
7c2ba97b 4593 if (spec->hp_switch)
d7a89436
TI		 4594 stac92xx_set_pinctl(codec, spec->hp_switch,
4595 AC_PINCTL_OUT_EN);
4e55096e
M		 4596 for (i = 0; i < cfg->line_outs; i++)
4597 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4598 AC_PINCTL_OUT_EN);
4e55096e 4599 }
fefd67f3 4600 stac92xx_line_out_detect(codec, presence);
d7a89436
TI		 4601 /* toggle hp outs */
4602 for (i = 0; i < cfg->hp_outs; i++) {
4603 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4604 if (no_hp_sensing(spec, i))
4605 continue;
4606 if (presence)
4607 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4608#if 0 /* FIXME */
4609/* Resetting the pinctl like below may lead to (a sort of) regressions
4610 * on some devices since they use the HP pin actually for line/speaker
4611 * outs although the default pin config shows a different pin (that is
4612 * wrong and useless).
4613 *
4614 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4615 * But, disabling the code below just works around it, and I'm too tired of
4616 * bug reports with such devices...
4617 */
d7a89436
TI		 4618 else
4619 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4620#endif /* FIXME */
d7a89436 4621 }
4e55096e
M		 4622}
4623
f73d3585
TI		 4624static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4625 int enable)
a64135a2
MR		 4626{
4627 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4628 unsigned int idx, val;
4629
4630 for (idx = 0; idx < spec->num_pwrs; idx++) {
4631 if (spec->pwr_nids[idx] == nid)
4632 break;
4633 }
4634 if (idx >= spec->num_pwrs)
4635 return;
d0513fc6
MR		 4636
4637 /* several codecs have two power down bits */
4638 if (spec->pwr_mapping)
4639 idx = spec->pwr_mapping[idx];
4640 else
4641 idx = 1 << idx;
a64135a2 4642
f73d3585
TI		 4643 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4644 if (enable)
a64135a2
MR		 4645 val &= ~idx;
4646 else
4647 val |= idx;
4648
4649 /* power down unused output ports */
4650 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4651}
4652
f73d3585
TI		 4653static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4654{
e6e3ea25 4655 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4656}
a64135a2 4657
74aeaabc
MR		 4658static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4659{
4660 struct sigmatel_spec *spec = codec->spec;
4661 struct sigmatel_jack *jacks = spec->jacks.list;
4662
4663 if (jacks) {
4664 int i;
4665 for (i = 0; i < spec->jacks.used; i++) {
4666 if (jacks->nid == nid) {
4667 unsigned int pin_ctl =
4668 snd_hda_codec_read(codec, nid,
4669 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4670 0x00);
4671 int type = jacks->type;
4672 if (type == (SND_JACK_LINEOUT
4673 | SND_JACK_HEADPHONE))
4674 type = (pin_ctl & AC_PINCTL_HP_EN)
4675 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4676 snd_jack_report(jacks->jack,
e6e3ea25 4677 get_pin_presence(codec, nid)
74aeaabc
MR		 4678 ? type : 0);
4679 }
4680 jacks++;
4681 }
4682 }
4683}
a64135a2 4684
ab5a6ebe
VK		 4685/* get the pin connection (fixed, none, etc) */
4686static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
4687{
4688 struct sigmatel_spec *spec = codec->spec;
4689 unsigned int cfg;
4690
4691 cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
4692 return get_defcfg_connect(cfg);
4693}
4694
4695static int stac92xx_connected_ports(struct hda_codec *codec,
4696 hda_nid_t *nids, int num_nids)
4697{
4698 struct sigmatel_spec *spec = codec->spec;
4699 int idx, num;
4700 unsigned int def_conf;
4701
4702 for (num = 0; num < num_nids; num++) {
4703 for (idx = 0; idx < spec->num_pins; idx++)
4704 if (spec->pin_nids[idx] == nids[num])
4705 break;
4706 if (idx >= spec->num_pins)
4707 break;
4708 def_conf = stac_get_defcfg_connect(codec, idx);
4709 if (def_conf == AC_JACK_PORT_NONE)
4710 break;
4711 }
4712 return num;
4713}
4714
3d21d3f7
TI		 4715static void stac92xx_mic_detect(struct hda_codec *codec)
4716{
4717 struct sigmatel_spec *spec = codec->spec;
4718 struct sigmatel_mic_route *mic;
4719
4720 if (get_pin_presence(codec, spec->ext_mic.pin))
4721 mic = &spec->ext_mic;
9907790a
CC		 4722 else if (get_pin_presence(codec, spec->dock_mic.pin))
4723 mic = &spec->dock_mic;
3d21d3f7
TI		 4724 else
4725 mic = &spec->int_mic;
02d33322 4726 if (mic->dmux_idx >= 0)
3d21d3f7
TI		 4727 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
4728 AC_VERB_SET_CONNECT_SEL,
4729 mic->dmux_idx);
02d33322 4730 if (mic->mux_idx >= 0)
3d21d3f7
TI		 4731 snd_hda_codec_write_cache(codec, spec->mux_nids[0], 0,
4732 AC_VERB_SET_CONNECT_SEL,
4733 mic->mux_idx);
4734}
4735
62558ce1 4736static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid)
c6e4c666 4737{
62558ce1 4738 struct sigmatel_event *event = stac_get_event(codec, nid);
c6e4c666
TI		 4739 if (!event)
4740 return;
4741 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4742}
4743
314634bc
TI		 4744static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4745{
a64135a2 4746 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4747 struct sigmatel_event *event;
4748 int tag, data;
a64135a2 4749
c6e4c666
TI		 4750 tag = (res >> 26) & 0x7f;
4751 event = stac_get_event_from_tag(codec, tag);
4752 if (!event)
4753 return;
4754
4755 switch (event->type) {
314634bc 4756 case STAC_HP_EVENT:
fefd67f3 4757 case STAC_LO_EVENT:
16ffe32c 4758 stac92xx_hp_detect(codec);
fefd67f3 4759 break;
3d21d3f7
TI		 4760 case STAC_MIC_EVENT:
4761 stac92xx_mic_detect(codec);
4762 break;
4763 }
4764
4765 switch (event->type) {
4766 case STAC_HP_EVENT:
fefd67f3 4767 case STAC_LO_EVENT:
3d21d3f7 4768 case STAC_MIC_EVENT:
74aeaabc 4769 case STAC_INSERT_EVENT:
a64135a2 4770 case STAC_PWR_EVENT:
c6e4c666
TI		 4771 if (spec->num_pwrs > 0)
4772 stac92xx_pin_sense(codec, event->nid);
4773 stac92xx_report_jack(codec, event->nid);
fd60cc89
MR		 4774
4775 switch (codec->subsystem_id) {
4776 case 0x103c308f:
4777 if (event->nid == 0xb) {
4778 int pin = AC_PINCTL_IN_EN;
4779
4780 if (get_pin_presence(codec, 0xa)
4781 && get_pin_presence(codec, 0xb))
4782 pin |= AC_PINCTL_VREF_80;
4783 if (!get_pin_presence(codec, 0xb))
4784 pin |= AC_PINCTL_VREF_80;
4785
4786 /* toggle VREF state based on mic + hp pin
4787 * status
4788 */
4789 stac92xx_auto_set_pinctl(codec, 0x0a, pin);
4790 }
4791 }
72474be6 4792 break;
c6e4c666
TI		 4793 case STAC_VREF_EVENT:
4794 data = snd_hda_codec_read(codec, codec->afg, 0,
4795 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4796 /* toggle VREF state based on GPIOx status */
4797 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4798 !!(data & (1 << event->data)));
72474be6 4799 break;
314634bc
TI		 4800 }
4801}
4802
d38cce70
KG		 4803static int hp_blike_system(u32 subsystem_id);
4804
4805static void set_hp_led_gpio(struct hda_codec *codec)
4806{
4807 struct sigmatel_spec *spec = codec->spec;
07f80449
TI		 4808 unsigned int gpio;
4809
26ebe0a2
TI		 4810 if (spec->gpio_led)
4811 return;
4812
07f80449
TI		 4813 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
4814 gpio &= AC_GPIO_IO_COUNT;
4815 if (gpio > 3)
4816 spec->gpio_led = 0x08; /* GPIO 3 */
4817 else
4818 spec->gpio_led = 0x01; /* GPIO 0 */
d38cce70
KG		 4819}
4820
c357aab0
VK		 4821/*
4822 * This method searches for the mute LED GPIO configuration
4823 * provided as OEM string in SMBIOS. The format of that string
4824 * is HP_Mute_LED_P_G or HP_Mute_LED_P
4825 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
4826 * that corresponds to the NOT muted state of the master volume
4827 * and G is the index of the GPIO to use as the mute LED control (0..9)
4828 * If _G portion is missing it is assigned based on the codec ID
4829 *
4830 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
4831 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
d38cce70
KG		 4832 *
4833 *
4834 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
4835 * SMBIOS - at least the ones I have seen do not have them - which include
4836 * my own system (HP Pavilion dv6-1110ax) and my cousin's
4837 * HP Pavilion dv9500t CTO.
4838 * Need more information on whether it is true across the entire series.
4839 * -- kunal
c357aab0 4840 */
dce17d4f 4841static int find_mute_led_gpio(struct hda_codec *codec, int default_polarity)
c357aab0
VK		 4842{
4843 struct sigmatel_spec *spec = codec->spec;
4844 const struct dmi_device *dev = NULL;
4845
4846 if ((codec->subsystem_id >> 16) == PCI_VENDOR_ID_HP) {
4847 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING,
4848 NULL, dev))) {
4849 if (sscanf(dev->name, "HP_Mute_LED_%d_%d",
d38cce70
KG		 4850 &spec->gpio_led_polarity,
4851 &spec->gpio_led) == 2) {
c357aab0
VK		 4852 spec->gpio_led = 1 << spec->gpio_led;
4853 return 1;
4854 }
4855 if (sscanf(dev->name, "HP_Mute_LED_%d",
d38cce70
KG		 4856 &spec->gpio_led_polarity) == 1) {
4857 set_hp_led_gpio(codec);
4858 return 1;
c357aab0
VK		 4859 }
4860 }
d38cce70
KG		 4861
4862 /*
4863 * Fallback case - if we don't find the DMI strings,
4864 * we statically set the GPIO - if not a B-series system.
4865 */
4866 if (!hp_blike_system(codec->subsystem_id)) {
4867 set_hp_led_gpio(codec);
dce17d4f 4868 spec->gpio_led_polarity = default_polarity;
d38cce70
KG		 4869 return 1;
4870 }
c357aab0
VK		 4871 }
4872 return 0;
4873}
4874
4875static int hp_blike_system(u32 subsystem_id)
78987bdc
RD		 4876{
4877 switch (subsystem_id) {
c357aab0
VK		 4878 case 0x103c1520:
4879 case 0x103c1521:
4880 case 0x103c1523:
4881 case 0x103c1524:
4882 case 0x103c1525:
78987bdc
RD		 4883 case 0x103c1722:
4884 case 0x103c1723:
4885 case 0x103c1724:
4886 case 0x103c1725:
4887 case 0x103c1726:
4888 case 0x103c1727:
4889 case 0x103c1728:
4890 case 0x103c1729:
c357aab0
VK		 4891 case 0x103c172a:
4892 case 0x103c172b:
4893 case 0x103c307e:
4894 case 0x103c307f:
4895 case 0x103c3080:
4896 case 0x103c3081:
4897 case 0x103c7007:
4898 case 0x103c7008:
78987bdc
RD		 4899 return 1;
4900 }
4901 return 0;
4902}
4903
2d34e1b3
TI		 4904#ifdef CONFIG_PROC_FS
4905static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4906 struct hda_codec *codec, hda_nid_t nid)
4907{
4908 if (nid == codec->afg)
4909 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4910 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4911}
4912
4913static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4914 struct hda_codec *codec,
4915 unsigned int verb)
4916{
4917 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4918 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4919}
4920
4921/* stac92hd71bxx, stac92hd73xx */
4922static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4923 struct hda_codec *codec, hda_nid_t nid)
4924{
4925 stac92hd_proc_hook(buffer, codec, nid);
4926 if (nid == codec->afg)
4927 analog_loop_proc_hook(buffer, codec, 0xfa0);
4928}
4929
4930static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4931 struct hda_codec *codec, hda_nid_t nid)
4932{
4933 if (nid == codec->afg)
4934 analog_loop_proc_hook(buffer, codec, 0xfe0);
4935}
4936
4937static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4938 struct hda_codec *codec, hda_nid_t nid)
4939{
4940 if (nid == codec->afg)
4941 analog_loop_proc_hook(buffer, codec, 0xfeb);
4942}
4943#else
4944#define stac92hd_proc_hook NULL
4945#define stac92hd7x_proc_hook NULL
4946#define stac9205_proc_hook NULL
4947#define stac927x_proc_hook NULL
4948#endif
4949
cb53c626 4950#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4951static int stac92xx_resume(struct hda_codec *codec)
4952{
dc81bed1
TI		 4953 struct sigmatel_spec *spec = codec->spec;
4954
2c885878 4955 stac92xx_init(codec);
82beb8fd
TI		 4956 snd_hda_codec_resume_amp(codec);
4957 snd_hda_codec_resume_cache(codec);
2c885878 4958 /* fake event to set up pins again to override cached values */
5f380eb1
TI		 4959 if (spec->hp_detect) {
4960 if (spec->autocfg.hp_pins[0])
4961 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0]);
4962 else if (spec->autocfg.line_out_pins[0])
4963 stac_issue_unsol_event(codec,
4964 spec->autocfg.line_out_pins[0]);
4965 }
c21bd025 4966 /* sync mute LED */
9e5341b9
TI		 4967 if (spec->gpio_led)
4968 hda_call_check_power_status(codec, 0x01);
ff6fdc37
M		 4969 return 0;
4970}
c6798d2b 4971
ae6241fb 4972/*
514bf54c 4973 * using power check for controlling mute led of HP notebooks
ae6241fb
CP		 4974 * check for mute state only on Speakers (nid = 0x10)
4975 *
4976 * For this feature CONFIG_SND_HDA_POWER_SAVE is needed, otherwise
4977 * the LED is NOT working properly !
514bf54c
JG		 4978 *
4979 * Changed name to reflect that it now works for any designated
4980 * model, not just HP HDX.
ae6241fb
CP		 4981 */
4982
4983#ifdef CONFIG_SND_HDA_POWER_SAVE
514bf54c 4984static int stac92xx_hp_check_power_status(struct hda_codec *codec,
6fce61ae 4985 hda_nid_t nid)
ae6241fb
CP		 4986{
4987 struct sigmatel_spec *spec = codec->spec;
c21bd025 4988 int i, muted = 1;
6fce61ae 4989
c21bd025
TI		 4990 for (i = 0; i < spec->multiout.num_dacs; i++) {
4991 nid = spec->multiout.dac_nids[i];
4992 if (!(snd_hda_codec_amp_read(codec, nid, 0, HDA_OUTPUT, 0) &
4993 HDA_AMP_MUTE)) {
4994 muted = 0; /* something heard */
4995 break;
5bdaaada 4996 }
ae6241fb 4997 }
c21bd025
TI		 4998 if (muted)
4999 spec->gpio_data &= ~spec->gpio_led; /* orange */
5000 else
5001 spec->gpio_data |= spec->gpio_led; /* white */
ae6241fb 5002
c21bd025
TI		 5003 if (!spec->gpio_led_polarity) {
5004 /* LED state is inverted on these systems */
5005 spec->gpio_data ^= spec->gpio_led;
5006 }
b4e81876 5007
b4e81876 5008 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
b4e81876
TI		 5009 return 0;
5010}
ae6241fb
CP		 5011#endif
5012
c6798d2b
MR		 5013static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
5014{
167eae5a 5015 stac92xx_shutup(codec);
c6798d2b
MR		 5016 return 0;
5017}
ff6fdc37
M		 5018#endif
5019
2f2f4251
M		 5020static struct hda_codec_ops stac92xx_patch_ops = {
5021 .build_controls = stac92xx_build_controls,
5022 .build_pcms = stac92xx_build_pcms,
5023 .init = stac92xx_init,
5024 .free = stac92xx_free,
4e55096e 5025 .unsol_event = stac92xx_unsol_event,
cb53c626 5026#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 5027 .suspend = stac92xx_suspend,
ff6fdc37
M		 5028 .resume = stac92xx_resume,
5029#endif
fb8d1a34 5030 .reboot_notify = stac92xx_shutup,
2f2f4251
M		 5031};
5032
5033static int patch_stac9200(struct hda_codec *codec)
5034{
5035 struct sigmatel_spec *spec;
c7d4b2fa 5036 int err;
2f2f4251 5037
e560d8d8 5038 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5039 if (spec == NULL)
5040 return -ENOMEM;
5041
a252c81a 5042 codec->no_trigger_sense = 1;
2f2f4251 5043 codec->spec = spec;
1b0e372d 5044 spec->linear_tone_beep = 1;
a4eed138 5045 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 5046 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 5047 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
5048 stac9200_models,
5049 stac9200_cfg_tbl);
330ee995 5050 if (spec->board_config < 0)
9a11f1aa
TI		 5051 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5052 codec->chip_name);
330ee995
TI		 5053 else
5054 stac92xx_set_config_regs(codec,
af9f341a 5055 stac9200_brd_tbl[spec->board_config]);
2f2f4251
M		 5056
5057 spec->multiout.max_channels = 2;
5058 spec->multiout.num_dacs = 1;
5059 spec->multiout.dac_nids = stac9200_dac_nids;
5060 spec->adc_nids = stac9200_adc_nids;
5061 spec->mux_nids = stac9200_mux_nids;
dabbed6f 5062 spec->num_muxes = 1;
8b65727b 5063 spec->num_dmics = 0;
9e05b7a3 5064 spec->num_adcs = 1;
a64135a2 5065 spec->num_pwrs = 0;
c7d4b2fa 5066
58eec423
MCC		 5067 if (spec->board_config == STAC_9200_M4 ||
5068 spec->board_config == STAC_9200_M4_2 ||
bf277785 5069 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 5070 spec->init = stac9200_eapd_init;
5071 else
5072 spec->init = stac9200_core_init;
2f2f4251 5073 spec->mixer = stac9200_mixer;
c7d4b2fa 5074
117f257d
TI		 5075 if (spec->board_config == STAC_9200_PANASONIC) {
5076 spec->gpio_mask = spec->gpio_dir = 0x09;
5077 spec->gpio_data = 0x00;
5078 }
5079
c7d4b2fa
M		 5080 err = stac9200_parse_auto_config(codec);
5081 if (err < 0) {
5082 stac92xx_free(codec);
5083 return err;
5084 }
2f2f4251 5085
2acc9dcb
TI		 5086 /* CF-74 has no headphone detection, and the driver should *NOT*
5087 * do detection and HP/speaker toggle because the hardware does it.
5088 */
5089 if (spec->board_config == STAC_9200_PANASONIC)
5090 spec->hp_detect = 0;
5091
2f2f4251
M		 5092 codec->patch_ops = stac92xx_patch_ops;
5093
5094 return 0;
5095}
5096
8e21c34c
TD		 5097static int patch_stac925x(struct hda_codec *codec)
5098{
5099 struct sigmatel_spec *spec;
5100 int err;
5101
5102 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5103 if (spec == NULL)
5104 return -ENOMEM;
5105
a252c81a 5106 codec->no_trigger_sense = 1;
8e21c34c 5107 codec->spec = spec;
1b0e372d 5108 spec->linear_tone_beep = 1;
a4eed138 5109 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 5110 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 5111
5112 /* Check first for codec ID */
5113 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
5114 STAC_925x_MODELS,
5115 stac925x_models,
5116 stac925x_codec_id_cfg_tbl);
5117
5118 /* Now checks for PCI ID, if codec ID is not found */
5119 if (spec->board_config < 0)
5120 spec->board_config = snd_hda_check_board_config(codec,
5121 STAC_925x_MODELS,
8e21c34c
TD		 5122 stac925x_models,
5123 stac925x_cfg_tbl);
9e507abd 5124 again:
330ee995 5125 if (spec->board_config < 0)
9a11f1aa
TI		 5126 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5127 codec->chip_name);
330ee995
TI		 5128 else
5129 stac92xx_set_config_regs(codec,
af9f341a 5130 stac925x_brd_tbl[spec->board_config]);
8e21c34c
TD		 5131
5132 spec->multiout.max_channels = 2;
5133 spec->multiout.num_dacs = 1;
5134 spec->multiout.dac_nids = stac925x_dac_nids;
5135 spec->adc_nids = stac925x_adc_nids;
5136 spec->mux_nids = stac925x_mux_nids;
5137 spec->num_muxes = 1;
9e05b7a3 5138 spec->num_adcs = 1;
a64135a2 5139 spec->num_pwrs = 0;
2c11f955
TD		 5140 switch (codec->vendor_id) {
5141 case 0x83847632: /* STAC9202 */
5142 case 0x83847633: /* STAC9202D */
5143 case 0x83847636: /* STAC9251 */
5144 case 0x83847637: /* STAC9251D */
f6e9852a 5145 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 5146 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 5147 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
5148 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 5149 break;
5150 default:
5151 spec->num_dmics = 0;
5152 break;
5153 }
8e21c34c
TD		 5154
5155 spec->init = stac925x_core_init;
5156 spec->mixer = stac925x_mixer;
6479c631
TI		 5157 spec->num_caps = 1;
5158 spec->capvols = stac925x_capvols;
5159 spec->capsws = stac925x_capsws;
8e21c34c
TD		 5160
5161 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 5162 if (!err) {
5163 if (spec->board_config < 0) {
5164 printk(KERN_WARNING "hda_codec: No auto-config is "
5165 "available, default to model=ref\n");
5166 spec->board_config = STAC_925x_REF;
5167 goto again;
5168 }
5169 err = -EINVAL;
5170 }
8e21c34c
TD		 5171 if (err < 0) {
5172 stac92xx_free(codec);
5173 return err;
5174 }
5175
5176 codec->patch_ops = stac92xx_patch_ops;
5177
5178 return 0;
5179}
5180
e1f0d669
MR		 5181static int patch_stac92hd73xx(struct hda_codec *codec)
5182{
5183 struct sigmatel_spec *spec;
5184 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
5185 int err = 0;
c21ca4a8 5186 int num_dacs;
e1f0d669
MR		 5187
5188 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5189 if (spec == NULL)
5190 return -ENOMEM;
5191
a252c81a 5192 codec->no_trigger_sense = 1;
e1f0d669 5193 codec->spec = spec;
1b0e372d 5194 spec->linear_tone_beep = 0;
e99d32b3 5195 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 5196 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
5197 spec->pin_nids = stac92hd73xx_pin_nids;
5198 spec->board_config = snd_hda_check_board_config(codec,
5199 STAC_92HD73XX_MODELS,
5200 stac92hd73xx_models,
5201 stac92hd73xx_cfg_tbl);
842ae638
TI		 5202 /* check codec subsystem id if not found */
5203 if (spec->board_config < 0)
5204 spec->board_config =
5205 snd_hda_check_board_codec_sid_config(codec,
5206 STAC_92HD73XX_MODELS, stac92hd73xx_models,
5207 stac92hd73xx_codec_id_cfg_tbl);
e1f0d669 5208again:
330ee995 5209 if (spec->board_config < 0)
9a11f1aa
TI		 5210 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5211 codec->chip_name);
330ee995
TI		 5212 else
5213 stac92xx_set_config_regs(codec,
af9f341a 5214 stac92hd73xx_brd_tbl[spec->board_config]);
e1f0d669 5215
c21ca4a8 5216 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 5217 conn, STAC92HD73_DAC_COUNT + 2) - 1;
5218
c21ca4a8 5219 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 5220 printk(KERN_WARNING "hda_codec: Could not determine "
5221 "number of channels defaulting to DAC count\n");
c21ca4a8 5222 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 5223 }
e2aec171 5224 spec->init = stac92hd73xx_core_init;
c21ca4a8 5225 switch (num_dacs) {
e1f0d669 5226 case 0x3: /* 6 Channel */
d78d7a90 5227 spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
e1f0d669
MR		 5228 break;
5229 case 0x4: /* 8 Channel */
d78d7a90 5230 spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
e1f0d669
MR		 5231 break;
5232 case 0x5: /* 10 Channel */
d78d7a90
TI		 5233 spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
5234 break;
c21ca4a8
TI		 5235 }
5236 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 5237
e1f0d669
MR		 5238 spec->aloopback_mask = 0x01;
5239 spec->aloopback_shift = 8;
5240
1cd2224c 5241 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 5242 spec->mux_nids = stac92hd73xx_mux_nids;
5243 spec->adc_nids = stac92hd73xx_adc_nids;
5244 spec->dmic_nids = stac92hd73xx_dmic_nids;
5245 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 5246 spec->smux_nids = stac92hd73xx_smux_nids;
e1f0d669
MR		 5247
5248 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
5249 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 5250 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816 5251
6479c631
TI		 5252 spec->num_caps = STAC92HD73XX_NUM_CAPS;
5253 spec->capvols = stac92hd73xx_capvols;
5254 spec->capsws = stac92hd73xx_capsws;
5255
a7662640 5256 switch (spec->board_config) {
6b3ab21e 5257 case STAC_DELL_EQ:
d654a660 5258 spec->init = dell_eq_core_init;
6b3ab21e 5259 /* fallthru */
661cd8fb
TI		 5260 case STAC_DELL_M6_AMIC:
5261 case STAC_DELL_M6_DMIC:
5262 case STAC_DELL_M6_BOTH:
2a9c7816 5263 spec->num_smuxes = 0;
c0cea0d0 5264 spec->eapd_switch = 0;
6b3ab21e 5265
661cd8fb
TI		 5266 switch (spec->board_config) {
5267 case STAC_DELL_M6_AMIC: /* Analog Mics */
330ee995 5268 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
a7662640
MR		 5269 spec->num_dmics = 0;
5270 break;
661cd8fb 5271 case STAC_DELL_M6_DMIC: /* Digital Mics */
330ee995 5272 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5273 spec->num_dmics = 1;
5274 break;
661cd8fb 5275 case STAC_DELL_M6_BOTH: /* Both */
330ee995
TI		 5276 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
5277 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5278 spec->num_dmics = 1;
5279 break;
5280 }
5281 break;
842ae638
TI		 5282 case STAC_ALIENWARE_M17X:
5283 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
5284 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
5285 spec->eapd_switch = 0;
5286 break;
a7662640
MR		 5287 default:
5288 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 5289 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 5290 spec->eapd_switch = 1;
5207e10e 5291 break;
a7662640 5292 }
af6ee302 5293 if (spec->board_config != STAC_92HD73XX_REF) {
b2c4f4d7
MR		 5294 /* GPIO0 High = Enable EAPD */
5295 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
5296 spec->gpio_data = 0x01;
5297 }
a7662640 5298
a64135a2
MR		 5299 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
5300 spec->pwr_nids = stac92hd73xx_pwr_nids;
5301
d9737751 5302 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 5303
5304 if (!err) {
5305 if (spec->board_config < 0) {
5306 printk(KERN_WARNING "hda_codec: No auto-config is "
5307 "available, default to model=ref\n");
5308 spec->board_config = STAC_92HD73XX_REF;
5309 goto again;
5310 }
5311 err = -EINVAL;
5312 }
5313
5314 if (err < 0) {
5315 stac92xx_free(codec);
5316 return err;
5317 }
5318
9e43f0de
TI		 5319 if (spec->board_config == STAC_92HD73XX_NO_JD)
5320 spec->hp_detect = 0;
5321
e1f0d669
MR		 5322 codec->patch_ops = stac92xx_patch_ops;
5323
2d34e1b3
TI		 5324 codec->proc_widget_hook = stac92hd7x_proc_hook;
5325
e1f0d669
MR		 5326 return 0;
5327}
5328
d0513fc6
MR		 5329static int patch_stac92hd83xxx(struct hda_codec *codec)
5330{
5331 struct sigmatel_spec *spec;
65557f35 5332 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 5333 int err;
65557f35 5334 int num_dacs;
d0513fc6
MR		 5335
5336 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5337 if (spec == NULL)
5338 return -ENOMEM;
5339
1cc9e8f4
C		 5340 /* reset pin power-down; Windows may leave these bits after reboot */
5341 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7EC, 0);
5342 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7ED, 0);
a252c81a 5343 codec->no_trigger_sense = 1;
d0513fc6 5344 codec->spec = spec;
1b0e372d 5345 spec->linear_tone_beep = 1;
0ffa9807 5346 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6 5347 spec->digbeep_nid = 0x21;
ab5a6ebe
VK		 5348 spec->dmic_nids = stac92hd83xxx_dmic_nids;
5349 spec->dmux_nids = stac92hd83xxx_mux_nids;
667067d8
TI		 5350 spec->mux_nids = stac92hd83xxx_mux_nids;
5351 spec->num_muxes = ARRAY_SIZE(stac92hd83xxx_mux_nids);
d0513fc6 5352 spec->adc_nids = stac92hd83xxx_adc_nids;
7570ef18 5353 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
d0513fc6
MR		 5354 spec->pwr_nids = stac92hd83xxx_pwr_nids;
5355 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
5356 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 5357 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6
MR		 5358
5359 spec->init = stac92hd83xxx_core_init;
d0513fc6 5360 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
d0513fc6 5361 spec->pin_nids = stac92hd83xxx_pin_nids;
6479c631
TI		 5362 spec->num_caps = STAC92HD83XXX_NUM_CAPS;
5363 spec->capvols = stac92hd83xxx_capvols;
5364 spec->capsws = stac92hd83xxx_capsws;
5365
d0513fc6
MR		 5366 spec->board_config = snd_hda_check_board_config(codec,
5367 STAC_92HD83XXX_MODELS,
5368 stac92hd83xxx_models,
5369 stac92hd83xxx_cfg_tbl);
5370again:
330ee995 5371 if (spec->board_config < 0)
9a11f1aa
TI		 5372 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5373 codec->chip_name);
330ee995
TI		 5374 else
5375 stac92xx_set_config_regs(codec,
af9f341a 5376 stac92hd83xxx_brd_tbl[spec->board_config]);
d0513fc6 5377
32ed3f46 5378 switch (codec->vendor_id) {
36706005
CC		 5379 case 0x111d7666:
5380 case 0x111d7667:
5381 case 0x111d7668:
5382 case 0x111d7669:
8a345a04
CC		 5383 case 0x111d76d1:
5384 case 0x111d76d9:
36706005
CC		 5385 spec->num_pins = ARRAY_SIZE(stac92hd88xxx_pin_nids);
5386 spec->pin_nids = stac92hd88xxx_pin_nids;
5387 spec->mono_nid = 0;
5388 spec->digbeep_nid = 0;
5389 spec->num_pwrs = 0;
5390 break;
32ed3f46 5391 case 0x111d7604:
a9694faa 5392 case 0x111d76d4:
32ed3f46 5393 case 0x111d7605:
ff2e7337 5394 case 0x111d76d5:
ab5a6ebe 5395 case 0x111d76e7:
32ed3f46
MR		 5396 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
5397 break;
5398 spec->num_pwrs = 0;
ab5a6ebe
VK		 5399 spec->num_dmics = stac92xx_connected_ports(codec,
5400 stac92hd83xxx_dmic_nids,
5401 STAC92HD83XXX_NUM_DMICS);
32ed3f46
MR		 5402 break;
5403 }
5404
b4e81876
TI		 5405 codec->patch_ops = stac92xx_patch_ops;
5406
dce17d4f 5407 if (find_mute_led_gpio(codec, 0))
e108c7b7
VK		 5408 snd_printd("mute LED gpio %d polarity %d\n",
5409 spec->gpio_led,
5410 spec->gpio_led_polarity);
5411
b4e81876
TI		 5412#ifdef CONFIG_SND_HDA_POWER_SAVE
5413 if (spec->gpio_led) {
5414 spec->gpio_mask |= spec->gpio_led;
5415 spec->gpio_dir |= spec->gpio_led;
5416 spec->gpio_data |= spec->gpio_led;
5417 /* register check_power_status callback. */
5418 codec->patch_ops.check_power_status =
c21bd025 5419 stac92xx_hp_check_power_status;
b4e81876
TI		 5420 }
5421#endif
5422
d0513fc6
MR		 5423 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
5424 if (!err) {
5425 if (spec->board_config < 0) {
5426 printk(KERN_WARNING "hda_codec: No auto-config is "
5427 "available, default to model=ref\n");
5428 spec->board_config = STAC_92HD83XXX_REF;
5429 goto again;
5430 }
5431 err = -EINVAL;
5432 }
5433
5434 if (err < 0) {
5435 stac92xx_free(codec);
5436 return err;
5437 }
5438
04b5efe5
CC		 5439 /* docking output support */
5440 num_dacs = snd_hda_get_connections(codec, 0xF,
8bb0ac55 5441 conn, STAC92HD83_DAC_COUNT + 1) - 1;
04b5efe5
CC		 5442 /* skip non-DAC connections */
5443 while (num_dacs >= 0 &&
5444 (get_wcaps_type(get_wcaps(codec, conn[num_dacs]))
5445 != AC_WID_AUD_OUT))
5446 num_dacs--;
5447 /* set port E and F to select the last DAC */
5448 if (num_dacs >= 0) {
5449 snd_hda_codec_write_cache(codec, 0xE, 0,
5450 AC_VERB_SET_CONNECT_SEL, num_dacs);
5451 snd_hda_codec_write_cache(codec, 0xF, 0,
8bb0ac55 5452 AC_VERB_SET_CONNECT_SEL, num_dacs);
04b5efe5 5453 }
8bb0ac55 5454
2d34e1b3
TI		 5455 codec->proc_widget_hook = stac92hd_proc_hook;
5456
d0513fc6
MR		 5457 return 0;
5458}
5459
6df703ae
HRK		 5460static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
5461 hda_nid_t dig0pin)
5462{
5463 struct sigmatel_spec *spec = codec->spec;
5464 int idx;
5465
5466 for (idx = 0; idx < spec->num_pins; idx++)
5467 if (spec->pin_nids[idx] == dig0pin)
5468 break;
5469 if ((idx + 2) >= spec->num_pins)
5470 return 0;
5471
5472 /* dig1pin case */
330ee995 5473 if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5474 return 2;
5475
5476 /* dig0pin + dig2pin case */
330ee995 5477 if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
6df703ae 5478 return 2;
330ee995 5479 if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5480 return 1;
5481 else
5482 return 0;
5483}
5484
75d1aeb9
TI		 5485/* HP dv7 bass switch - GPIO5 */
5486#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
5487static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
5488 struct snd_ctl_elem_value *ucontrol)
5489{
5490 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5491 struct sigmatel_spec *spec = codec->spec;
5492 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
5493 return 0;
5494}
5495
5496static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
5497 struct snd_ctl_elem_value *ucontrol)
5498{
5499 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5500 struct sigmatel_spec *spec = codec->spec;
5501 unsigned int gpio_data;
5502
5503 gpio_data = (spec->gpio_data & ~0x20) |
5504 (ucontrol->value.integer.value[0] ? 0x20 : 0);
5505 if (gpio_data == spec->gpio_data)
5506 return 0;
5507 spec->gpio_data = gpio_data;
5508 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
5509 return 1;
5510}
5511
5512static struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
5513 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5514 .info = stac_hp_bass_gpio_info,
5515 .get = stac_hp_bass_gpio_get,
5516 .put = stac_hp_bass_gpio_put,
5517};
5518
5519static int stac_add_hp_bass_switch(struct hda_codec *codec)
5520{
5521 struct sigmatel_spec *spec = codec->spec;
5522
5523 if (!stac_control_new(spec, &stac_hp_bass_sw_ctrl,
5524 "Bass Speaker Playback Switch", 0))
5525 return -ENOMEM;
5526
5527 spec->gpio_mask |= 0x20;
5528 spec->gpio_dir |= 0x20;
5529 spec->gpio_data |= 0x20;
5530 return 0;
5531}
5532
e035b841
MR		 5533static int patch_stac92hd71bxx(struct hda_codec *codec)
5534{
5535 struct sigmatel_spec *spec;
ca8d33fc 5536 struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
5bdaaada 5537 unsigned int pin_cfg;
e035b841
MR		 5538 int err = 0;
5539
5540 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5541 if (spec == NULL)
5542 return -ENOMEM;
5543
a252c81a 5544 codec->no_trigger_sense = 1;
e035b841 5545 codec->spec = spec;
1b0e372d 5546 spec->linear_tone_beep = 0;
8daaaa97 5547 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK		 5548 spec->num_pins = STAC92HD71BXX_NUM_PINS;
5549 switch (codec->vendor_id) {
5550 case 0x111d76b6:
5551 case 0x111d76b7:
5552 spec->pin_nids = stac92hd71bxx_pin_nids_4port;
5553 break;
5554 case 0x111d7603:
5555 case 0x111d7608:
5556 /* On 92HD75Bx 0x27 isn't a pin nid */
5557 spec->num_pins--;
5558 /* fallthrough */
5559 default:
5560 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5561 }
aafc4412 5562 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 5563 spec->board_config = snd_hda_check_board_config(codec,
5564 STAC_92HD71BXX_MODELS,
5565 stac92hd71bxx_models,
5566 stac92hd71bxx_cfg_tbl);
5567again:
330ee995 5568 if (spec->board_config < 0)
9a11f1aa
TI		 5569 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5570 codec->chip_name);
330ee995
TI		 5571 else
5572 stac92xx_set_config_regs(codec,
af9f341a 5573 stac92hd71bxx_brd_tbl[spec->board_config]);
e035b841 5574
fc64b26c 5575 if (spec->board_config != STAC_92HD71BXX_REF) {
41c3b648
TI		 5576 /* GPIO0 = EAPD */
5577 spec->gpio_mask = 0x01;
5578 spec->gpio_dir = 0x01;
5579 spec->gpio_data = 0x01;
5580 }
5581
6df703ae
HRK		 5582 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5583 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5584
6479c631
TI		 5585 spec->num_caps = STAC92HD71BXX_NUM_CAPS;
5586 spec->capvols = stac92hd71bxx_capvols;
5587 spec->capsws = stac92hd71bxx_capsws;
5588
541eee87
MR		 5589 switch (codec->vendor_id) {
5590 case 0x111d76b6: /* 4 Port without Analog Mixer */
5591 case 0x111d76b7:
23c7b521
HRK		 5592 unmute_init++;
5593 /* fallthru */
541eee87
MR		 5594 case 0x111d76b4: /* 6 Port without Analog Mixer */
5595 case 0x111d76b5:
541eee87 5596 spec->init = stac92hd71bxx_core_init;
0ffa9807 5597 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5598 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5599 stac92hd71bxx_dmic_nids,
5600 STAC92HD71BXX_NUM_DMICS);
541eee87 5601 break;
aafc4412 5602 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 5603 switch (spec->board_config) {
5604 case STAC_HP_M4:
72474be6 5605 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 5606 err = stac_add_event(spec, codec->afg,
5607 STAC_VREF_EVENT, 0x02);
5608 if (err < 0)
5609 return err;
c5d08bb5 5610 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 5611 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
5612 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 5613 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 5614 AC_USRSP_EN | err);
72474be6
MR		 5615 spec->gpio_mask |= 0x02;
5616 break;
5617 }
8daaaa97 5618 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5619 (codec->revision_id & 0xf) == 1)
8daaaa97 5620 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5621
aafc4412
MR		 5622 /* no output amps */
5623 spec->num_pwrs = 0;
aafc4412 5624 /* disable VSW */
26a27980 5625 spec->init = stac92hd71bxx_core_init;
ca8d33fc 5626 unmute_init++;
330ee995
TI		 5627 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
5628 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
6df703ae 5629 stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS - 1] = 0;
ab5a6ebe 5630 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5631 stac92hd71bxx_dmic_nids,
5632 STAC92HD71BXX_NUM_DMICS - 1);
aafc4412
MR		 5633 break;
5634 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5635 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5636 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5637
aafc4412
MR		 5638 /* no output amps */
5639 spec->num_pwrs = 0;
5640 /* fallthru */
541eee87 5641 default:
26a27980 5642 spec->init = stac92hd71bxx_core_init;
0ffa9807 5643 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5644 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5645 stac92hd71bxx_dmic_nids,
5646 STAC92HD71BXX_NUM_DMICS);
5207e10e 5647 break;
541eee87
MR		 5648 }
5649
ca8d33fc
MR		 5650 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
5651 snd_hda_sequence_write_cache(codec, unmute_init);
5652
b20f3b83
TI		 5653 /* Some HP machines seem to have unstable codec communications
5654 * especially with ATI fglrx driver. For recovering from the
5655 * CORB/RIRB stall, allow the BUS reset and keep always sync
5656 */
5657 if (spec->board_config == STAC_HP_DV5) {
5658 codec->bus->sync_write = 1;
5659 codec->bus->allow_bus_reset = 1;
5660 }
5661
d78d7a90 5662 spec->aloopback_ctl = stac92hd71bxx_loopback;
4b33c767 5663 spec->aloopback_mask = 0x50;
541eee87
MR		 5664 spec->aloopback_shift = 0;
5665
8daaaa97 5666 spec->powerdown_adcs = 1;
1cd2224c 5667 spec->digbeep_nid = 0x26;
e035b841
MR		 5668 spec->mux_nids = stac92hd71bxx_mux_nids;
5669 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 5670 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5671 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 5672
5673 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5674 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
5207e10e 5675 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
6df703ae 5676 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 5677
d38cce70
KG		 5678 snd_printdd("Found board config: %d\n", spec->board_config);
5679
6a14f585
MR		 5680 switch (spec->board_config) {
5681 case STAC_HP_M4:
6a14f585 5682 /* enable internal microphone */
330ee995 5683 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
b9aea715
MR		 5684 stac92xx_auto_set_pinctl(codec, 0x0e,
5685 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 5686 /* fallthru */
5687 case STAC_DELL_M4_2:
5688 spec->num_dmics = 0;
5689 spec->num_smuxes = 0;
5690 spec->num_dmuxes = 0;
5691 break;
5692 case STAC_DELL_M4_1:
5693 case STAC_DELL_M4_3:
5694 spec->num_dmics = 1;
5695 spec->num_smuxes = 0;
ea18aa46 5696 spec->num_dmuxes = 1;
6a14f585 5697 break;
514bf54c
JG		 5698 case STAC_HP_DV4_1222NR:
5699 spec->num_dmics = 1;
5700 /* I don't know if it needs 1 or 2 smuxes - will wait for
5701 * bug reports to fix if needed
5702 */
5703 spec->num_smuxes = 1;
5704 spec->num_dmuxes = 1;
514bf54c 5705 /* fallthrough */
2a6ce6e5
TI		 5706 case STAC_HP_DV4:
5707 spec->gpio_led = 0x01;
5708 /* fallthrough */
e2ea57a8 5709 case STAC_HP_DV5:
330ee995 5710 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
e2ea57a8 5711 stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
6e34c033
TI		 5712 /* HP dv6 gives the headphone pin as a line-out. Thus we
5713 * need to set hp_detect flag here to force to enable HP
5714 * detection.
5715 */
5716 spec->hp_detect = 1;
e2ea57a8 5717 break;
ae6241fb
CP		 5718 case STAC_HP_HDX:
5719 spec->num_dmics = 1;
5720 spec->num_dmuxes = 1;
5721 spec->num_smuxes = 1;
26ebe0a2 5722 spec->gpio_led = 0x08;
86d190e7
TI		 5723 break;
5724 }
443e26d0 5725
c357aab0 5726 if (hp_blike_system(codec->subsystem_id)) {
5bdaaada
VK		 5727 pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
5728 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
5729 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
5730 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
5731 /* It was changed in the BIOS to just satisfy MS DTM.
5732 * Lets turn it back into slaved HP
5733 */
5734 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
5735 | (AC_JACK_HP_OUT <<
5736 AC_DEFCFG_DEVICE_SHIFT);
5737 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
5738 | AC_DEFCFG_SEQUENCE)))
5739 | 0x1f;
5740 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
5741 }
5742 }
5743
dce17d4f 5744 if (find_mute_led_gpio(codec, 1))
c357aab0
VK		 5745 snd_printd("mute LED gpio %d polarity %d\n",
5746 spec->gpio_led,
5747 spec->gpio_led_polarity);
5bdaaada 5748
86d190e7
TI		 5749#ifdef CONFIG_SND_HDA_POWER_SAVE
5750 if (spec->gpio_led) {
5751 spec->gpio_mask |= spec->gpio_led;
5752 spec->gpio_dir |= spec->gpio_led;
5753 spec->gpio_data |= spec->gpio_led;
443e26d0 5754 /* register check_power_status callback. */
6fce61ae 5755 codec->patch_ops.check_power_status =
86d190e7
TI		 5756 stac92xx_hp_check_power_status;
5757 }
443e26d0 5758#endif
6a14f585 5759
c21ca4a8 5760 spec->multiout.dac_nids = spec->dac_nids;
e035b841 5761
29d4ab4d 5762 err = stac92xx_parse_auto_config(codec, 0x21, 0);
e035b841
MR		 5763 if (!err) {
5764 if (spec->board_config < 0) {
5765 printk(KERN_WARNING "hda_codec: No auto-config is "
5766 "available, default to model=ref\n");
5767 spec->board_config = STAC_92HD71BXX_REF;
5768 goto again;
5769 }
5770 err = -EINVAL;
5771 }
5772
5773 if (err < 0) {
5774 stac92xx_free(codec);
5775 return err;
5776 }
5777
75d1aeb9 5778 /* enable bass on HP dv7 */
2a6ce6e5
TI		 5779 if (spec->board_config == STAC_HP_DV4 ||
5780 spec->board_config == STAC_HP_DV5) {
75d1aeb9
TI		 5781 unsigned int cap;
5782 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
5783 cap &= AC_GPIO_IO_COUNT;
5784 if (cap >= 6)
5785 stac_add_hp_bass_switch(codec);
5786 }
5787
2d34e1b3
TI		 5788 codec->proc_widget_hook = stac92hd7x_proc_hook;
5789
e035b841 5790 return 0;
86d190e7 5791}
e035b841 5792
2f2f4251
M		 5793static int patch_stac922x(struct hda_codec *codec)
5794{
5795 struct sigmatel_spec *spec;
c7d4b2fa 5796 int err;
2f2f4251 5797
e560d8d8 5798 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5799 if (spec == NULL)
5800 return -ENOMEM;
5801
a252c81a 5802 codec->no_trigger_sense = 1;
2f2f4251 5803 codec->spec = spec;
1b0e372d 5804 spec->linear_tone_beep = 1;
a4eed138 5805 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5806 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 5807 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5808 stac922x_models,
5809 stac922x_cfg_tbl);
536319af 5810 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 5811 spec->gpio_mask = spec->gpio_dir = 0x03;
5812 spec->gpio_data = 0x03;
3fc24d85
TI		 5813 /* Intel Macs have all same PCI SSID, so we need to check
5814 * codec SSID to distinguish the exact models
5815 */
6f0778d8 5816 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5817 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 5818
5819 case 0x106b0800:
5820 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5821 break;
5d5d3bc3
IZ		 5822 case 0x106b0600:
5823 case 0x106b0700:
5824 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5825 break;
5d5d3bc3
IZ		 5826 case 0x106b0e00:
5827 case 0x106b0f00:
5828 case 0x106b1600:
5829 case 0x106b1700:
5830 case 0x106b0200:
5831 case 0x106b1e00:
5832 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5833 break;
5d5d3bc3
IZ		 5834 case 0x106b1a00:
5835 case 0x00000100:
5836 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5837 break;
5d5d3bc3
IZ		 5838 case 0x106b0a00:
5839 case 0x106b2200:
5840 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5841 break;
536319af
NB		 5842 default:
5843 spec->board_config = STAC_INTEL_MAC_V3;
5844 break;
3fc24d85
TI		 5845 }
5846 }
5847
9e507abd 5848 again:
330ee995 5849 if (spec->board_config < 0)
9a11f1aa
TI		 5850 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5851 codec->chip_name);
330ee995
TI		 5852 else
5853 stac92xx_set_config_regs(codec,
af9f341a 5854 stac922x_brd_tbl[spec->board_config]);
2f2f4251 5855
c7d4b2fa
M		 5856 spec->adc_nids = stac922x_adc_nids;
5857 spec->mux_nids = stac922x_mux_nids;
2549413e 5858 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5859 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5860 spec->num_dmics = 0;
a64135a2 5861 spec->num_pwrs = 0;
c7d4b2fa
M		 5862
5863 spec->init = stac922x_core_init;
6479c631
TI		 5864
5865 spec->num_caps = STAC922X_NUM_CAPS;
5866 spec->capvols = stac922x_capvols;
5867 spec->capsws = stac922x_capsws;
c7d4b2fa
M		 5868
5869 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5870
3cc08dc6 5871 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 5872 if (!err) {
5873 if (spec->board_config < 0) {
5874 printk(KERN_WARNING "hda_codec: No auto-config is "
5875 "available, default to model=ref\n");
5876 spec->board_config = STAC_D945_REF;
5877 goto again;
5878 }
5879 err = -EINVAL;
5880 }
3cc08dc6
MP		 5881 if (err < 0) {
5882 stac92xx_free(codec);
5883 return err;
5884 }
5885
5886 codec->patch_ops = stac92xx_patch_ops;
5887
807a4636
TI		 5888 /* Fix Mux capture level; max to 2 */
5889 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5890 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5891 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5892 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5893 (0 << AC_AMPCAP_MUTE_SHIFT));
5894
3cc08dc6
MP		 5895 return 0;
5896}
5897
5898static int patch_stac927x(struct hda_codec *codec)
5899{
5900 struct sigmatel_spec *spec;
5901 int err;
5902
5903 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5904 if (spec == NULL)
5905 return -ENOMEM;
5906
a252c81a 5907 codec->no_trigger_sense = 1;
3cc08dc6 5908 codec->spec = spec;
1b0e372d 5909 spec->linear_tone_beep = 1;
45c1d85b 5910 codec->slave_dig_outs = stac927x_slave_dig_outs;
a4eed138 5911 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5912 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 5913 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5914 stac927x_models,
5915 stac927x_cfg_tbl);
9e507abd 5916 again:
330ee995 5917 if (spec->board_config < 0)
9a11f1aa
TI		 5918 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5919 codec->chip_name);
330ee995
TI		 5920 else
5921 stac92xx_set_config_regs(codec,
af9f341a 5922 stac927x_brd_tbl[spec->board_config]);
3cc08dc6 5923
1cd2224c 5924 spec->digbeep_nid = 0x23;
8e9068b1
MR		 5925 spec->adc_nids = stac927x_adc_nids;
5926 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5927 spec->mux_nids = stac927x_mux_nids;
5928 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 5929 spec->smux_nids = stac927x_smux_nids;
5930 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5931 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5932 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 5933 spec->multiout.dac_nids = spec->dac_nids;
5934
af6ee302
TI		 5935 if (spec->board_config != STAC_D965_REF) {
5936 /* GPIO0 High = Enable EAPD */
5937 spec->eapd_mask = spec->gpio_mask = 0x01;
5938 spec->gpio_dir = spec->gpio_data = 0x01;
5939 }
5940
81d3dbde 5941 switch (spec->board_config) {
93ed1503 5942 case STAC_D965_3ST:
93ed1503 5943 case STAC_D965_5ST:
8e9068b1 5944 /* GPIO0 High = Enable EAPD */
8e9068b1 5945 spec->num_dmics = 0;
93ed1503 5946 spec->init = d965_core_init;
81d3dbde 5947 break;
8e9068b1 5948 case STAC_DELL_BIOS:
780c8be4
MR		 5949 switch (codec->subsystem_id) {
5950 case 0x10280209:
5951 case 0x1028022e:
5952 /* correct the device field to SPDIF out */
330ee995 5953 snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
780c8be4 5954 break;
86d190e7 5955 }
03d7ca17 5956 /* configure the analog microphone on some laptops */
330ee995 5957 snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
2f32d909 5958 /* correct the front output jack as a hp out */
330ee995 5959 snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
c481fca3 5960 /* correct the front input jack as a mic */
330ee995 5961 snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
c481fca3 5962 /* fallthru */
8e9068b1 5963 case STAC_DELL_3ST:
af6ee302
TI		 5964 if (codec->subsystem_id != 0x1028022f) {
5965 /* GPIO2 High = Enable EAPD */
5966 spec->eapd_mask = spec->gpio_mask = 0x04;
5967 spec->gpio_dir = spec->gpio_data = 0x04;
5968 }
7f16859a
MR		 5969 spec->dmic_nids = stac927x_dmic_nids;
5970 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5971
ccca7cdc 5972 spec->init = dell_3st_core_init;
8e9068b1 5973 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5974 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a 5975 break;
54930531
TI		 5976 case STAC_927X_VOLKNOB:
5977 spec->num_dmics = 0;
5978 spec->init = stac927x_volknob_core_init;
5979 break;
7f16859a 5980 default:
8e9068b1 5981 spec->num_dmics = 0;
8e9068b1 5982 spec->init = stac927x_core_init;
af6ee302 5983 break;
7f16859a
MR		 5984 }
5985
6479c631
TI		 5986 spec->num_caps = STAC927X_NUM_CAPS;
5987 spec->capvols = stac927x_capvols;
5988 spec->capsws = stac927x_capsws;
5989
a64135a2 5990 spec->num_pwrs = 0;
d78d7a90 5991 spec->aloopback_ctl = stac927x_loopback;
e1f0d669
MR		 5992 spec->aloopback_mask = 0x40;
5993 spec->aloopback_shift = 0;
c0cea0d0 5994 spec->eapd_switch = 1;
8e9068b1 5995
3cc08dc6 5996 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 5997 if (!err) {
5998 if (spec->board_config < 0) {
5999 printk(KERN_WARNING "hda_codec: No auto-config is "
6000 "available, default to model=ref\n");
6001 spec->board_config = STAC_D965_REF;
6002 goto again;
6003 }
6004 err = -EINVAL;
6005 }
c7d4b2fa
M		 6006 if (err < 0) {
6007 stac92xx_free(codec);
6008 return err;
6009 }
2f2f4251
M		 6010
6011 codec->patch_ops = stac92xx_patch_ops;
6012
2d34e1b3
TI		 6013 codec->proc_widget_hook = stac927x_proc_hook;
6014
52987656
TI		 6015 /*
6016 * !!FIXME!!
6017 * The STAC927x seem to require fairly long delays for certain
6018 * command sequences. With too short delays (even if the answer
6019 * is set to RIRB properly), it results in the silence output
6020 * on some hardwares like Dell.
6021 *
6022 * The below flag enables the longer delay (see get_response
6023 * in hda_intel.c).
6024 */
6025 codec->bus->needs_damn_long_delay = 1;
6026
e28d8322
TI		 6027 /* no jack detecion for ref-no-jd model */
6028 if (spec->board_config == STAC_D965_REF_NO_JD)
6029 spec->hp_detect = 0;
6030
2f2f4251
M		 6031 return 0;
6032}
6033
f3302a59
MP		 6034static int patch_stac9205(struct hda_codec *codec)
6035{
6036 struct sigmatel_spec *spec;
8259980e 6037 int err;
f3302a59
MP		 6038
6039 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6040 if (spec == NULL)
6041 return -ENOMEM;
6042
a252c81a 6043 codec->no_trigger_sense = 1;
f3302a59 6044 codec->spec = spec;
1b0e372d 6045 spec->linear_tone_beep = 1;
a4eed138 6046 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 6047 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 6048 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
6049 stac9205_models,
6050 stac9205_cfg_tbl);
9e507abd 6051 again:
330ee995 6052 if (spec->board_config < 0)
9a11f1aa
TI		 6053 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6054 codec->chip_name);
330ee995
TI		 6055 else
6056 stac92xx_set_config_regs(codec,
af9f341a 6057 stac9205_brd_tbl[spec->board_config]);
f3302a59 6058
1cd2224c 6059 spec->digbeep_nid = 0x23;
f3302a59 6060 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 6061 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 6062 spec->mux_nids = stac9205_mux_nids;
2549413e 6063 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 6064 spec->smux_nids = stac9205_smux_nids;
6065 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 6066 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 6067 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 6068 spec->dmux_nids = stac9205_dmux_nids;
1697055e 6069 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 6070 spec->num_pwrs = 0;
f3302a59
MP		 6071
6072 spec->init = stac9205_core_init;
d78d7a90 6073 spec->aloopback_ctl = stac9205_loopback;
f3302a59 6074
6479c631
TI		 6075 spec->num_caps = STAC9205_NUM_CAPS;
6076 spec->capvols = stac9205_capvols;
6077 spec->capsws = stac9205_capsws;
6078
e1f0d669
MR		 6079 spec->aloopback_mask = 0x40;
6080 spec->aloopback_shift = 0;
d9a4268e
TI		 6081 /* Turn on/off EAPD per HP plugging */
6082 if (spec->board_config != STAC_9205_EAPD)
6083 spec->eapd_switch = 1;
f3302a59 6084 spec->multiout.dac_nids = spec->dac_nids;
87d48363 6085
ae0a8ed8 6086 switch (spec->board_config){
ae0a8ed8 6087 case STAC_9205_DELL_M43:
87d48363 6088 /* Enable SPDIF in/out */
330ee995
TI		 6089 snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
6090 snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
87d48363 6091
4fe5195c 6092 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 6093 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
6094 if (err < 0)
6095 return err;
c5d08bb5 6096 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 6097 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
6098 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 6099 AC_VERB_SET_UNSOLICITED_ENABLE,
6100 AC_USRSP_EN | err);
4fe5195c
MR		 6101
6102 spec->gpio_dir = 0x0b;
0fc9dec4 6103 spec->eapd_mask = 0x01;
4fe5195c
MR		 6104 spec->gpio_mask = 0x1b;
6105 spec->gpio_mute = 0x10;
e2e7d624 6106 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 6107 * GPIO3 Low = DRM
87d48363 6108 */
4fe5195c 6109 spec->gpio_data = 0x01;
ae0a8ed8 6110 break;
b2c4f4d7
MR		 6111 case STAC_9205_REF:
6112 /* SPDIF-In enabled */
6113 break;
ae0a8ed8
TD		 6114 default:
6115 /* GPIO0 High = EAPD */
0fc9dec4 6116 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 6117 spec->gpio_data = 0x01;
ae0a8ed8
TD		 6118 break;
6119 }
33382403 6120
f3302a59 6121 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 6122 if (!err) {
6123 if (spec->board_config < 0) {
6124 printk(KERN_WARNING "hda_codec: No auto-config is "
6125 "available, default to model=ref\n");
6126 spec->board_config = STAC_9205_REF;
6127 goto again;
6128 }
6129 err = -EINVAL;
6130 }
f3302a59
MP		 6131 if (err < 0) {
6132 stac92xx_free(codec);
6133 return err;
6134 }
6135
6136 codec->patch_ops = stac92xx_patch_ops;
6137
2d34e1b3
TI		 6138 codec->proc_widget_hook = stac9205_proc_hook;
6139
f3302a59
MP		 6140 return 0;
6141}
6142
db064e50 6143/*
6d859065 6144 * STAC9872 hack
db064e50
TI		 6145 */
6146
1e137f92 6147static struct hda_verb stac9872_core_init[] = {
1624cb9a 6148 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 6149 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
6150 {}
6151};
6152
caa10b6e
TI		 6153static hda_nid_t stac9872_pin_nids[] = {
6154 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
6155 0x11, 0x13, 0x14,
6156};
6157
6158static hda_nid_t stac9872_adc_nids[] = {
6159 0x8 /*,0x6*/
6160};
6161
6162static hda_nid_t stac9872_mux_nids[] = {
6163 0x15
6164};
6165
6479c631
TI		 6166static unsigned long stac9872_capvols[] = {
6167 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT),
6168};
6169#define stac9872_capsws stac9872_capvols
6170
307282c8
TI		 6171static unsigned int stac9872_vaio_pin_configs[9] = {
6172 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030,
6173 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0,
6174 0x90a7013e
6175};
6176
6177static const char *stac9872_models[STAC_9872_MODELS] = {
6178 [STAC_9872_AUTO] = "auto",
6179 [STAC_9872_VAIO] = "vaio",
6180};
6181
6182static unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = {
6183 [STAC_9872_VAIO] = stac9872_vaio_pin_configs,
6184};
6185
6186static struct snd_pci_quirk stac9872_cfg_tbl[] = {
b04add95
TI		 6187 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
6188 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI		 6189 {} /* terminator */
6190};
6191
6d859065 6192static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 6193{
6194 struct sigmatel_spec *spec;
1e137f92 6195 int err;
db064e50 6196
db064e50
TI		 6197 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6198 if (spec == NULL)
6199 return -ENOMEM;
a252c81a 6200 codec->no_trigger_sense = 1;
db064e50 6201 codec->spec = spec;
1b0e372d 6202 spec->linear_tone_beep = 1;
b04add95
TI		 6203 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
6204 spec->pin_nids = stac9872_pin_nids;
caa10b6e
TI		 6205
6206 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
6207 stac9872_models,
6208 stac9872_cfg_tbl);
307282c8 6209 if (spec->board_config < 0)
9a11f1aa
TI		 6210 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6211 codec->chip_name);
307282c8
TI		 6212 else
6213 stac92xx_set_config_regs(codec,
6214 stac9872_brd_tbl[spec->board_config]);
db064e50 6215
1e137f92
TI		 6216 spec->multiout.dac_nids = spec->dac_nids;
6217 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
6218 spec->adc_nids = stac9872_adc_nids;
6219 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
6220 spec->mux_nids = stac9872_mux_nids;
1e137f92 6221 spec->init = stac9872_core_init;
6479c631
TI		 6222 spec->num_caps = 1;
6223 spec->capvols = stac9872_capvols;
6224 spec->capsws = stac9872_capsws;
1e137f92
TI		 6225
6226 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
6227 if (err < 0) {
6228 stac92xx_free(codec);
6229 return -EINVAL;
6230 }
6231 spec->input_mux = &spec->private_imux;
6232 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI		 6233 return 0;
6234}
6235
6236
2f2f4251
M		 6237/*
6238 * patch entries
6239 */
1289e9e8 6240static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 6241 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
6242 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
6243 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
6244 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
6245 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
6246 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
6247 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 6248 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
6249 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
6250 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
6251 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
6252 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
6253 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 6254 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
6255 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
6256 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
6257 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
6258 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
6259 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
6260 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
6261 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
6262 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
6263 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 6264 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
6265 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
6266 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
6267 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
6268 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
6269 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 6270 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
6271 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 6272 /* The following does not take into account .id=0x83847661 when subsys =
6273 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
6274 * currently not fully supported.
6275 */
6276 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
6277 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
6278 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 6279 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP		 6280 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
6281 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
6282 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
6283 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
6284 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
6285 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
6286 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
6287 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 6288 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6 6289 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
a9694faa 6290 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
d0513fc6 6291 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 6292 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
8a345a04
CC		 6293 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
6294 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
36706005
CC		 6295 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
6296 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
6297 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
6298 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
aafc4412 6299 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 6300 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
6301 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 6302 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 6303 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6304 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6305 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6306 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6307 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6308 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6309 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
6310 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4d8ec5f3
CC		 6311 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
6312 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
6313 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
6314 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
6315 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
6316 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
6317 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
6318 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
6319 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
6320 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
6321 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
6322 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
6323 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
6324 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
6325 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
ab5a6ebe
VK		 6326 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
6327 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
2f2f4251
M		 6328 {} /* terminator */
6329};
1289e9e8
TI		 6330
6331MODULE_ALIAS("snd-hda-codec-id:8384*");
6332MODULE_ALIAS("snd-hda-codec-id:111d*");
6333
6334MODULE_LICENSE("GPL");
6335MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
6336
6337static struct hda_codec_preset_list sigmatel_list = {
6338 .preset = snd_hda_preset_sigmatel,
6339 .owner = THIS_MODULE,
6340};
6341
6342static int __init patch_sigmatel_init(void)
6343{
6344 return snd_hda_add_codec_preset(&sigmatel_list);
6345}
6346
6347static void __exit patch_sigmatel_exit(void)
6348{
6349 snd_hda_delete_codec_preset(&sigmatel_list);
6350}
6351
6352module_init(patch_sigmatel_init)
6353module_exit(patch_sigmatel_exit)
Linux 6.x block layer and io_uring tree(s)