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ALSA: hda - Update model descriptions in patch_sigmatel.c
[linux-2.6-block.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
TI		 38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
58eec423
MCC		 58 STAC_9200_M4,
59 STAC_9200_M4_2,
117f257d 60 STAC_9200_PANASONIC,
f5fcc13c
TI		 61 STAC_9200_MODELS
62};
63
64enum {
65 STAC_9205_REF,
dfe495d0 66 STAC_9205_DELL_M42,
ae0a8ed8
TD		 67 STAC_9205_DELL_M43,
68 STAC_9205_DELL_M44,
f5fcc13c
TI		 69 STAC_9205_MODELS
70};
71
e1f0d669 72enum {
9e43f0de 73 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 74 STAC_92HD73XX_REF,
661cd8fb
TI		 75 STAC_DELL_M6_AMIC,
76 STAC_DELL_M6_DMIC,
77 STAC_DELL_M6_BOTH,
6b3ab21e 78 STAC_DELL_EQ,
e1f0d669
MR		 79 STAC_92HD73XX_MODELS
80};
81
d0513fc6
MR		 82enum {
83 STAC_92HD83XXX_REF,
84 STAC_92HD83XXX_MODELS
85};
86
e035b841
MR		 87enum {
88 STAC_92HD71BXX_REF,
a7662640
MR		 89 STAC_DELL_M4_1,
90 STAC_DELL_M4_2,
3a7abfd2 91 STAC_DELL_M4_3,
6a14f585 92 STAC_HP_M4,
e035b841
MR		 93 STAC_92HD71BXX_MODELS
94};
95
8e21c34c
TD		 96enum {
97 STAC_925x_REF,
9cb36c2a
MCC		 98 STAC_M1,
99 STAC_M1_2,
100 STAC_M2,
8e21c34c 101 STAC_M2_2,
9cb36c2a
MCC		 102 STAC_M3,
103 STAC_M5,
104 STAC_M6,
8e21c34c
TD		 105 STAC_925x_MODELS
106};
107
f5fcc13c
TI		 108enum {
109 STAC_D945_REF,
110 STAC_D945GTP3,
111 STAC_D945GTP5,
5d5d3bc3
IZ		 112 STAC_INTEL_MAC_V1,
113 STAC_INTEL_MAC_V2,
114 STAC_INTEL_MAC_V3,
115 STAC_INTEL_MAC_V4,
116 STAC_INTEL_MAC_V5,
536319af
NB		 117 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
118 * is given, one of the above models will be
119 * chosen according to the subsystem id. */
dfe495d0 120 /* for backward compatibility */
f5fcc13c 121 STAC_MACMINI,
3fc24d85 122 STAC_MACBOOK,
6f0778d8
NB		 123 STAC_MACBOOK_PRO_V1,
124 STAC_MACBOOK_PRO_V2,
f16928fb 125 STAC_IMAC_INTEL,
0dae0f83 126 STAC_IMAC_INTEL_20,
8c650087 127 STAC_ECS_202,
dfe495d0
TI		 128 STAC_922X_DELL_D81,
129 STAC_922X_DELL_D82,
130 STAC_922X_DELL_M81,
131 STAC_922X_DELL_M82,
f5fcc13c
TI		 132 STAC_922X_MODELS
133};
134
135enum {
e28d8322 136 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 137 STAC_D965_REF,
138 STAC_D965_3ST,
139 STAC_D965_5ST,
4ff076e5 140 STAC_DELL_3ST,
8e9068b1 141 STAC_DELL_BIOS,
f5fcc13c
TI		 142 STAC_927X_MODELS
143};
403d1944 144
74aeaabc
MR		 145struct sigmatel_event {
146 hda_nid_t nid;
c6e4c666
TI		 147 unsigned char type;
148 unsigned char tag;
74aeaabc
MR		 149 int data;
150};
151
152struct sigmatel_jack {
153 hda_nid_t nid;
154 int type;
155 struct snd_jack *jack;
156};
157
2f2f4251 158struct sigmatel_spec {
c8b6bf9b 159 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 160 unsigned int num_mixers;
161
403d1944 162 int board_config;
c0cea0d0 163 unsigned int eapd_switch: 1;
c7d4b2fa 164 unsigned int surr_switch: 1;
3cc08dc6 165 unsigned int alt_switch: 1;
82bc955f 166 unsigned int hp_detect: 1;
00ef50c2 167 unsigned int spdif_mute: 1;
c7d4b2fa 168
4fe5195c 169 /* gpio lines */
0fc9dec4 170 unsigned int eapd_mask;
4fe5195c
MR		 171 unsigned int gpio_mask;
172 unsigned int gpio_dir;
173 unsigned int gpio_data;
174 unsigned int gpio_mute;
175
8daaaa97
MR		 176 /* stream */
177 unsigned int stream_delay;
178
4fe5195c 179 /* analog loopback */
e1f0d669
MR		 180 unsigned char aloopback_mask;
181 unsigned char aloopback_shift;
8259980e 182
a64135a2
MR		 183 /* power management */
184 unsigned int num_pwrs;
d0513fc6 185 unsigned int *pwr_mapping;
a64135a2 186 hda_nid_t *pwr_nids;
b76c850f 187 hda_nid_t *dac_list;
a64135a2 188
74aeaabc
MR		 189 /* jack detection */
190 struct snd_array jacks;
191
192 /* events */
193 struct snd_array events;
194
2f2f4251 195 /* playback */
b22b4821 196 struct hda_input_mux *mono_mux;
89385035 197 struct hda_input_mux *amp_mux;
b22b4821 198 unsigned int cur_mmux;
2f2f4251 199 struct hda_multi_out multiout;
3cc08dc6 200 hda_nid_t dac_nids[5];
c21ca4a8
TI		 201 hda_nid_t hp_dacs[5];
202 hda_nid_t speaker_dacs[5];
2f2f4251
M		 203
204 /* capture */
205 hda_nid_t *adc_nids;
2f2f4251 206 unsigned int num_adcs;
dabbed6f
M		 207 hda_nid_t *mux_nids;
208 unsigned int num_muxes;
8b65727b
MP		 209 hda_nid_t *dmic_nids;
210 unsigned int num_dmics;
e1f0d669 211 hda_nid_t *dmux_nids;
1697055e 212 unsigned int num_dmuxes;
d9737751
MR		 213 hda_nid_t *smux_nids;
214 unsigned int num_smuxes;
65973632 215 const char **spdif_labels;
d9737751 216
dabbed6f 217 hda_nid_t dig_in_nid;
b22b4821 218 hda_nid_t mono_nid;
1cd2224c
MR		 219 hda_nid_t anabeep_nid;
220 hda_nid_t digbeep_nid;
2f2f4251 221
2f2f4251
M		 222 /* pin widgets */
223 hda_nid_t *pin_nids;
224 unsigned int num_pins;
2f2f4251 225 unsigned int *pin_configs;
2f2f4251
M		 226
227 /* codec specific stuff */
228 struct hda_verb *init;
c8b6bf9b 229 struct snd_kcontrol_new *mixer;
2f2f4251
M		 230
231 /* capture source */
8b65727b 232 struct hda_input_mux *dinput_mux;
e1f0d669 233 unsigned int cur_dmux[2];
c7d4b2fa 234 struct hda_input_mux *input_mux;
3cc08dc6 235 unsigned int cur_mux[3];
d9737751
MR		 236 struct hda_input_mux *sinput_mux;
237 unsigned int cur_smux[2];
2a9c7816
MR		 238 unsigned int cur_amux;
239 hda_nid_t *amp_nids;
240 unsigned int num_amps;
8daaaa97 241 unsigned int powerdown_adcs;
2f2f4251 242
403d1944
MP		 243 /* i/o switches */
244 unsigned int io_switch[2];
0fb87bb4 245 unsigned int clfe_swap;
c21ca4a8
TI		 246 hda_nid_t line_switch; /* shared line-in for input and output */
247 hda_nid_t mic_switch; /* shared mic-in for input and output */
248 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 249 unsigned int aloopback;
2f2f4251 250
c7d4b2fa
M		 251 struct hda_pcm pcm_rec[2]; /* PCM information */
252
253 /* dynamic controls and input_mux */
254 struct auto_pin_cfg autocfg;
603c4019 255 struct snd_array kctls;
8b65727b 256 struct hda_input_mux private_dimux;
c7d4b2fa 257 struct hda_input_mux private_imux;
d9737751 258 struct hda_input_mux private_smux;
89385035 259 struct hda_input_mux private_amp_mux;
b22b4821 260 struct hda_input_mux private_mono_mux;
2f2f4251
M		 261};
262
263static hda_nid_t stac9200_adc_nids[1] = {
264 0x03,
265};
266
267static hda_nid_t stac9200_mux_nids[1] = {
268 0x0c,
269};
270
271static hda_nid_t stac9200_dac_nids[1] = {
272 0x02,
273};
274
a64135a2
MR		 275static hda_nid_t stac92hd73xx_pwr_nids[8] = {
276 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
277 0x0f, 0x10, 0x11
278};
279
0ffa9807
MR		 280static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
281 0x26, 0,
282};
283
e1f0d669
MR		 284static hda_nid_t stac92hd73xx_adc_nids[2] = {
285 0x1a, 0x1b
286};
287
2a9c7816
MR		 288#define DELL_M6_AMP 2
289static hda_nid_t stac92hd73xx_amp_nids[3] = {
290 0x0b, 0x0c, 0x0e
89385035
MR		 291};
292
e1f0d669
MR		 293#define STAC92HD73XX_NUM_DMICS 2
294static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
295 0x13, 0x14, 0
296};
297
298#define STAC92HD73_DAC_COUNT 5
e1f0d669
MR		 299
300static hda_nid_t stac92hd73xx_mux_nids[4] = {
301 0x28, 0x29, 0x2a, 0x2b,
302};
303
304static hda_nid_t stac92hd73xx_dmux_nids[2] = {
305 0x20, 0x21,
306};
307
d9737751
MR		 308static hda_nid_t stac92hd73xx_smux_nids[2] = {
309 0x22, 0x23,
310};
311
d0513fc6
MR		 312#define STAC92HD83XXX_NUM_DMICS 2
313static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
314 0x11, 0x12, 0
315};
316
d0513fc6 317#define STAC92HD83_DAC_COUNT 3
d0513fc6
MR		 318
319static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
320 0x17, 0x18,
321};
322
323static hda_nid_t stac92hd83xxx_adc_nids[2] = {
324 0x15, 0x16,
325};
326
327static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
328 0xa, 0xb, 0xd, 0xe,
329};
330
0ffa9807
MR		 331static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
332 0x1e, 0,
333};
334
d0513fc6
MR		 335static unsigned int stac92hd83xxx_pwr_mapping[4] = {
336 0x03, 0x0c, 0x10, 0x40,
337};
338
a64135a2
MR		 339static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
340 0x0a, 0x0d, 0x0f
341};
342
e035b841
MR		 343static hda_nid_t stac92hd71bxx_adc_nids[2] = {
344 0x12, 0x13,
345};
346
347static hda_nid_t stac92hd71bxx_mux_nids[2] = {
348 0x1a, 0x1b
349};
350
4b33c767
MR		 351static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
352 0x1c, 0x1d,
e1f0d669
MR		 353};
354
d9737751
MR		 355static hda_nid_t stac92hd71bxx_smux_nids[2] = {
356 0x24, 0x25,
357};
358
e035b841
MR		 359#define STAC92HD71BXX_NUM_DMICS 2
360static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
361 0x18, 0x19, 0
362};
363
0ffa9807
MR		 364static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
365 0x22, 0
366};
367
8e21c34c
TD		 368static hda_nid_t stac925x_adc_nids[1] = {
369 0x03,
370};
371
372static hda_nid_t stac925x_mux_nids[1] = {
373 0x0f,
374};
375
376static hda_nid_t stac925x_dac_nids[1] = {
377 0x02,
378};
379
f6e9852a
TI		 380#define STAC925X_NUM_DMICS 1
381static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
382 0x15, 0
2c11f955
TD		 383};
384
1697055e
TI		 385static hda_nid_t stac925x_dmux_nids[1] = {
386 0x14,
387};
388
2f2f4251
M		 389static hda_nid_t stac922x_adc_nids[2] = {
390 0x06, 0x07,
391};
392
393static hda_nid_t stac922x_mux_nids[2] = {
394 0x12, 0x13,
395};
396
3cc08dc6
MP		 397static hda_nid_t stac927x_adc_nids[3] = {
398 0x07, 0x08, 0x09
399};
400
401static hda_nid_t stac927x_mux_nids[3] = {
402 0x15, 0x16, 0x17
403};
404
d9737751
MR		 405static hda_nid_t stac927x_smux_nids[1] = {
406 0x21,
407};
408
b76c850f
MR		 409static hda_nid_t stac927x_dac_nids[6] = {
410 0x02, 0x03, 0x04, 0x05, 0x06, 0
411};
412
e1f0d669
MR		 413static hda_nid_t stac927x_dmux_nids[1] = {
414 0x1b,
415};
416
7f16859a
MR		 417#define STAC927X_NUM_DMICS 2
418static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
419 0x13, 0x14, 0
420};
421
65973632
MR		 422static const char *stac927x_spdif_labels[5] = {
423 "Digital Playback", "ADAT", "Analog Mux 1",
424 "Analog Mux 2", "Analog Mux 3"
425};
426
f3302a59
MP		 427static hda_nid_t stac9205_adc_nids[2] = {
428 0x12, 0x13
429};
430
431static hda_nid_t stac9205_mux_nids[2] = {
432 0x19, 0x1a
433};
434
e1f0d669 435static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 436 0x1d,
e1f0d669
MR		 437};
438
d9737751
MR		 439static hda_nid_t stac9205_smux_nids[1] = {
440 0x21,
441};
442
f6e9852a
TI		 443#define STAC9205_NUM_DMICS 2
444static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
445 0x17, 0x18, 0
8b65727b
MP		 446};
447
c7d4b2fa 448static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 449 0x08, 0x09, 0x0d, 0x0e,
450 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 451};
452
8e21c34c
TD		 453static hda_nid_t stac925x_pin_nids[8] = {
454 0x07, 0x08, 0x0a, 0x0b,
455 0x0c, 0x0d, 0x10, 0x11,
456};
457
2f2f4251
M		 458static hda_nid_t stac922x_pin_nids[10] = {
459 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
460 0x0f, 0x10, 0x11, 0x15, 0x1b,
461};
462
a7662640 463static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 464 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
465 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 466 0x14, 0x22, 0x23
e1f0d669
MR		 467};
468
d0513fc6
MR		 469static hda_nid_t stac92hd83xxx_pin_nids[14] = {
470 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
471 0x0f, 0x10, 0x11, 0x12, 0x13,
472 0x1d, 0x1e, 0x1f, 0x20
473};
0ffa9807 474static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 475 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
476 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 477 0x1f,
e035b841
MR		 478};
479
3cc08dc6
MP		 480static hda_nid_t stac927x_pin_nids[14] = {
481 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
482 0x0f, 0x10, 0x11, 0x12, 0x13,
483 0x14, 0x21, 0x22, 0x23,
484};
485
f3302a59
MP		 486static hda_nid_t stac9205_pin_nids[12] = {
487 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
488 0x0f, 0x14, 0x16, 0x17, 0x18,
489 0x21, 0x22,
f3302a59
MP		 490};
491
89385035
MR		 492#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
493
494static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
495 struct snd_ctl_elem_value *ucontrol)
496{
497 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
498 struct sigmatel_spec *spec = codec->spec;
499 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
500
501 kcontrol->private_value ^= get_amp_nid(kcontrol);
502 kcontrol->private_value |= nid;
503
504 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
505}
506
507static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
508 struct snd_ctl_elem_value *ucontrol)
509{
510 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
511 struct sigmatel_spec *spec = codec->spec;
512 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
513
514 kcontrol->private_value ^= get_amp_nid(kcontrol);
515 kcontrol->private_value |= nid;
516
517 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
518}
519
8b65727b
MP		 520static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
521 struct snd_ctl_elem_info *uinfo)
522{
523 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
524 struct sigmatel_spec *spec = codec->spec;
525 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
526}
527
528static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
529 struct snd_ctl_elem_value *ucontrol)
530{
531 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
532 struct sigmatel_spec *spec = codec->spec;
e1f0d669 533 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 534
e1f0d669 535 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 536 return 0;
537}
538
539static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
540 struct snd_ctl_elem_value *ucontrol)
541{
542 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
543 struct sigmatel_spec *spec = codec->spec;
e1f0d669 544 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 545
546 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 547 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 548}
549
d9737751
MR		 550static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
551 struct snd_ctl_elem_info *uinfo)
552{
553 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
554 struct sigmatel_spec *spec = codec->spec;
555 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
556}
557
558static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
559 struct snd_ctl_elem_value *ucontrol)
560{
561 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
562 struct sigmatel_spec *spec = codec->spec;
563 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
564
565 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
566 return 0;
567}
568
569static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
570 struct snd_ctl_elem_value *ucontrol)
571{
572 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
573 struct sigmatel_spec *spec = codec->spec;
00ef50c2 574 struct hda_input_mux *smux = &spec->private_smux;
d9737751 575 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 576 int err, val;
577 hda_nid_t nid;
d9737751 578
00ef50c2 579 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 580 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 581 if (err < 0)
582 return err;
583
584 if (spec->spdif_mute) {
585 if (smux_idx == 0)
586 nid = spec->multiout.dig_out_nid;
587 else
588 nid = codec->slave_dig_outs[smux_idx - 1];
589 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 590 val = HDA_AMP_MUTE;
00ef50c2 591 else
c9b46f91 592 val = 0;
00ef50c2 593 /* un/mute SPDIF out */
c9b46f91
TI		 594 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
595 HDA_AMP_MUTE, val);
00ef50c2
MR		 596 }
597 return 0;
d9737751
MR		 598}
599
c8b6bf9b 600static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 601{
602 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
603 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 604 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 605}
606
c8b6bf9b 607static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 608{
609 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
610 struct sigmatel_spec *spec = codec->spec;
611 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
612
613 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
614 return 0;
615}
616
c8b6bf9b 617static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 618{
619 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
620 struct sigmatel_spec *spec = codec->spec;
621 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
622
c7d4b2fa 623 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 624 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
625}
626
b22b4821
MR		 627static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
628 struct snd_ctl_elem_info *uinfo)
629{
630 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
631 struct sigmatel_spec *spec = codec->spec;
632 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
633}
634
635static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
636 struct snd_ctl_elem_value *ucontrol)
637{
638 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
639 struct sigmatel_spec *spec = codec->spec;
640
641 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
642 return 0;
643}
644
645static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
646 struct snd_ctl_elem_value *ucontrol)
647{
648 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
649 struct sigmatel_spec *spec = codec->spec;
650
651 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
652 spec->mono_nid, &spec->cur_mmux);
653}
654
89385035
MR		 655static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
656 struct snd_ctl_elem_info *uinfo)
657{
658 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
659 struct sigmatel_spec *spec = codec->spec;
660 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
661}
662
663static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
664 struct snd_ctl_elem_value *ucontrol)
665{
666 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
667 struct sigmatel_spec *spec = codec->spec;
668
669 ucontrol->value.enumerated.item[0] = spec->cur_amux;
670 return 0;
671}
672
673static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
674 struct snd_ctl_elem_value *ucontrol)
675{
676 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
677 struct sigmatel_spec *spec = codec->spec;
678 struct snd_kcontrol *ctl =
679 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
680 if (!ctl)
681 return -EINVAL;
682
683 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
684 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
685
686 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
687 0, &spec->cur_amux);
688}
689
5f10c4a9
ML		 690#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
691
692static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
693 struct snd_ctl_elem_value *ucontrol)
694{
695 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 696 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 697 struct sigmatel_spec *spec = codec->spec;
698
e1f0d669
MR		 699 ucontrol->value.integer.value[0] = !!(spec->aloopback &
700 (spec->aloopback_mask << idx));
5f10c4a9
ML		 701 return 0;
702}
703
704static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
705 struct snd_ctl_elem_value *ucontrol)
706{
707 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
708 struct sigmatel_spec *spec = codec->spec;
e1f0d669 709 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 710 unsigned int dac_mode;
e1f0d669 711 unsigned int val, idx_val;
5f10c4a9 712
e1f0d669
MR		 713 idx_val = spec->aloopback_mask << idx;
714 if (ucontrol->value.integer.value[0])
715 val = spec->aloopback | idx_val;
716 else
717 val = spec->aloopback & ~idx_val;
68ea7b2f 718 if (spec->aloopback == val)
5f10c4a9
ML		 719 return 0;
720
68ea7b2f 721 spec->aloopback = val;
5f10c4a9 722
e1f0d669
MR		 723 /* Only return the bits defined by the shift value of the
724 * first two bytes of the mask
725 */
5f10c4a9 726 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 727 kcontrol->private_value & 0xFFFF, 0x0);
728 dac_mode >>= spec->aloopback_shift;
5f10c4a9 729
e1f0d669 730 if (spec->aloopback & idx_val) {
5f10c4a9 731 snd_hda_power_up(codec);
e1f0d669 732 dac_mode |= idx_val;
5f10c4a9
ML		 733 } else {
734 snd_hda_power_down(codec);
e1f0d669 735 dac_mode &= ~idx_val;
5f10c4a9
ML		 736 }
737
738 snd_hda_codec_write_cache(codec, codec->afg, 0,
739 kcontrol->private_value >> 16, dac_mode);
740
741 return 1;
742}
743
c7d4b2fa 744static struct hda_verb stac9200_core_init[] = {
2f2f4251 745 /* set dac0mux for dac converter */
c7d4b2fa 746 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 747 {}
748};
749
1194b5b7
TI		 750static struct hda_verb stac9200_eapd_init[] = {
751 /* set dac0mux for dac converter */
752 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
753 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
754 {}
755};
756
e1f0d669
MR		 757static struct hda_verb stac92hd73xx_6ch_core_init[] = {
758 /* set master volume and direct control */
759 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 760 /* setup adcs to point to mixer */
761 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
762 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 763 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
764 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
765 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
766 /* setup import muxs */
767 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
768 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
769 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
770 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
771 {}
772};
773
d654a660
MR		 774static struct hda_verb dell_eq_core_init[] = {
775 /* set master volume to max value without distortion
776 * and direct control */
777 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d654a660
MR		 778 /* setup adcs to point to mixer */
779 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
780 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
781 /* setup import muxs */
782 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
783 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
784 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
785 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
786 {}
787};
788
52fe0f9d 789static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 790 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d
MR		 791 /* setup adcs to point to mixer */
792 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
793 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
794 /* setup import muxs */
795 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
796 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
797 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
798 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
799 {}
800};
801
e1f0d669
MR		 802static struct hda_verb stac92hd73xx_8ch_core_init[] = {
803 /* set master volume and direct control */
804 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 805 /* setup adcs to point to mixer */
806 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
807 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 808 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
809 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
810 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
811 /* setup import muxs */
812 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
813 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
814 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
815 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
816 {}
817};
818
819static struct hda_verb stac92hd73xx_10ch_core_init[] = {
820 /* set master volume and direct control */
821 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 822 /* dac3 is connected to import3 mux */
823 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
e1f0d669
MR		 824 /* setup adcs to point to mixer */
825 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
826 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 827 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
828 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
829 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
830 /* setup import muxs */
831 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
832 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
833 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
834 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
835 {}
836};
837
d0513fc6
MR		 838static struct hda_verb stac92hd83xxx_core_init[] = {
839 /* start of config #1 */
840 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
841
842 /* start of config #2 */
843 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
844 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
845 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
846
847 /* power state controls amps */
848 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 849 {}
d0513fc6
MR		 850};
851
e035b841 852static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 853 /* set master volume and direct control */
854 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
541eee87
MR		 855 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
856 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
857 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
858 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
574f3c4f 859 {}
541eee87
MR		 860};
861
4b33c767 862#define HD_DISABLE_PORTF 2
541eee87 863static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 864 /* start of config #1 */
865
866 /* connect port 0f to audio mixer */
867 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 868 /* unmute right and left channels for node 0x0f */
869 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
870 /* start of config #2 */
871
e035b841
MR		 872 /* set master volume and direct control */
873 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
aafc4412 874 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 875 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
876 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 877 {}
878};
879
8e21c34c
TD		 880static struct hda_verb stac925x_core_init[] = {
881 /* set dac0mux for dac converter */
882 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
883 {}
884};
885
c7d4b2fa 886static struct hda_verb stac922x_core_init[] = {
2f2f4251 887 /* set master volume and direct control */
c7d4b2fa 888 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 889 {}
890};
891
93ed1503 892static struct hda_verb d965_core_init[] = {
19039bd0 893 /* set master volume and direct control */
93ed1503 894 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 895 /* unmute node 0x1b */
896 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
897 /* select node 0x03 as DAC */
898 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
899 {}
900};
901
3cc08dc6
MP		 902static struct hda_verb stac927x_core_init[] = {
903 /* set master volume and direct control */
904 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 905 /* enable analog pc beep path */
906 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 907 {}
908};
909
f3302a59
MP		 910static struct hda_verb stac9205_core_init[] = {
911 /* set master volume and direct control */
912 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 913 /* enable analog pc beep path */
914 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 915 {}
916};
917
b22b4821
MR		 918#define STAC_MONO_MUX \
919 { \
920 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
921 .name = "Mono Mux", \
922 .count = 1, \
923 .info = stac92xx_mono_mux_enum_info, \
924 .get = stac92xx_mono_mux_enum_get, \
925 .put = stac92xx_mono_mux_enum_put, \
926 }
927
89385035
MR		 928#define STAC_AMP_MUX \
929 { \
930 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
931 .name = "Amp Selector Capture Switch", \
932 .count = 1, \
933 .info = stac92xx_amp_mux_enum_info, \
934 .get = stac92xx_amp_mux_enum_get, \
935 .put = stac92xx_amp_mux_enum_put, \
936 }
937
938#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
939 { \
940 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
941 .name = xname, \
942 .index = 0, \
943 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
944 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
945 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
946 .info = stac92xx_amp_volume_info, \
947 .get = stac92xx_amp_volume_get, \
948 .put = stac92xx_amp_volume_put, \
949 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
950 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
951 }
952
9e05b7a3 953#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 954 { \
955 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
956 .name = "Input Source", \
9e05b7a3 957 .count = cnt, \
ca7c5a8b
ML		 958 .info = stac92xx_mux_enum_info, \
959 .get = stac92xx_mux_enum_get, \
960 .put = stac92xx_mux_enum_put, \
961 }
962
e1f0d669 963#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 964 { \
965 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
966 .name = "Analog Loopback", \
e1f0d669 967 .count = cnt, \
5f10c4a9
ML		 968 .info = stac92xx_aloopback_info, \
969 .get = stac92xx_aloopback_get, \
970 .put = stac92xx_aloopback_put, \
971 .private_value = verb_read | (verb_write << 16), \
972 }
973
c8b6bf9b 974static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 975 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
976 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 977 STAC_INPUT_SOURCE(1),
2f2f4251
M		 978 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
979 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 980 { } /* end */
981};
982
2a9c7816 983#define DELL_M6_MIXER 6
e1f0d669 984static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 985 /* start of config #1 */
e1f0d669
MR		 986 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
987 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
988
e1f0d669
MR		 989 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
990 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
991
2a9c7816
MR		 992 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
993 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
994
995 /* start of config #2 */
996 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
997 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
998
e1f0d669
MR		 999 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1000 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1001
2a9c7816
MR		 1002 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1003
1004 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1005 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1006
1007 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1008 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1009
e1f0d669
MR		 1010 { } /* end */
1011};
1012
1013static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1014 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1015
e1f0d669
MR		 1016 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1017 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1018
1019 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1020 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1021
1022 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1023 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1024
1025 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1026 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1027
1028 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1029 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1030
1031 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1032 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1033
1034 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1035 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1036 { } /* end */
1037};
1038
1039static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1040 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1041
e1f0d669
MR		 1042 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1043 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1044
1045 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1046 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1047
1048 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1049 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1050
1051 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1052 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1053
1054 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1055 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1056
1057 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1058 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1059
1060 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1061 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1062 { } /* end */
1063};
1064
d0513fc6
MR		 1065
1066static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1067 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1068 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1069
1070 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1071 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1072
74b7ff48
MR		 1073 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0x3, HDA_INPUT),
1074 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0x3, HDA_INPUT),
d0513fc6 1075
74b7ff48
MR		 1076 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x4, HDA_INPUT),
1077 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x4, HDA_INPUT),
d0513fc6 1078
74b7ff48
MR		 1079 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x0, HDA_INPUT),
1080 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x0, HDA_INPUT),
d0513fc6 1081
74b7ff48
MR		 1082 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x2, HDA_INPUT),
1083 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x2, HDA_INPUT),
d0513fc6
MR		 1084
1085 /*
74b7ff48
MR		 1086 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x1, HDA_INPUT),
1087 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x1, HDA_INPUT),
d0513fc6
MR		 1088 */
1089 { } /* end */
1090};
1091
541eee87 1092static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1093 STAC_INPUT_SOURCE(2),
4b33c767 1094 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1095
9b35947f
MR		 1096 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1097 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1098
1099 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1100 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1101 /* analog pc-beep replaced with digital beep support */
1102 /*
f7c5dda2
MR		 1103 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1104 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1105 */
f7c5dda2 1106
687cb98e
MR		 1107 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1108 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1109
687cb98e
MR		 1110 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1111 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1112
1113 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1114 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1115
1116 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1117 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1118 { } /* end */
1119};
1120
541eee87 1121static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1122 STAC_INPUT_SOURCE(2),
1123 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1124
541eee87
MR		 1125 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1126 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1127
1128 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1129 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1130 { } /* end */
1131};
1132
8e21c34c 1133static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1134 STAC_INPUT_SOURCE(1),
8e21c34c 1135 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1136 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1137 { } /* end */
1138};
1139
9e05b7a3 1140static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1141 STAC_INPUT_SOURCE(2),
e1f0d669 1142 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1143
1144 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1145 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1146
1147 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1148 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1149 { } /* end */
1150};
1151
19039bd0 1152/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1153static struct snd_kcontrol_new stac922x_mixer[] = {
1154 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1155 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1156 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1157
1158 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1159 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1160 { } /* end */
1161};
1162
9e05b7a3 1163
d1d985f0 1164static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1165 STAC_INPUT_SOURCE(3),
e1f0d669 1166 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1167
9e05b7a3
ML		 1168 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1169 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1170
1171 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1172 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1173
1174 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1175 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1176 { } /* end */
1177};
1178
1697055e
TI		 1179static struct snd_kcontrol_new stac_dmux_mixer = {
1180 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1181 .name = "Digital Input Source",
1182 /* count set later */
1183 .info = stac92xx_dmux_enum_info,
1184 .get = stac92xx_dmux_enum_get,
1185 .put = stac92xx_dmux_enum_put,
1186};
1187
d9737751
MR		 1188static struct snd_kcontrol_new stac_smux_mixer = {
1189 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1190 .name = "IEC958 Playback Source",
d9737751
MR		 1191 /* count set later */
1192 .info = stac92xx_smux_enum_info,
1193 .get = stac92xx_smux_enum_get,
1194 .put = stac92xx_smux_enum_put,
1195};
1196
2134ea4f
TI		 1197static const char *slave_vols[] = {
1198 "Front Playback Volume",
1199 "Surround Playback Volume",
1200 "Center Playback Volume",
1201 "LFE Playback Volume",
1202 "Side Playback Volume",
1203 "Headphone Playback Volume",
1204 "Headphone Playback Volume",
1205 "Speaker Playback Volume",
1206 "External Speaker Playback Volume",
1207 "Speaker2 Playback Volume",
1208 NULL
1209};
1210
1211static const char *slave_sws[] = {
1212 "Front Playback Switch",
1213 "Surround Playback Switch",
1214 "Center Playback Switch",
1215 "LFE Playback Switch",
1216 "Side Playback Switch",
1217 "Headphone Playback Switch",
1218 "Headphone Playback Switch",
1219 "Speaker Playback Switch",
1220 "External Speaker Playback Switch",
1221 "Speaker2 Playback Switch",
edb54a55 1222 "IEC958 Playback Switch",
2134ea4f
TI		 1223 NULL
1224};
1225
603c4019 1226static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1227static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1228
2f2f4251
M		 1229static int stac92xx_build_controls(struct hda_codec *codec)
1230{
1231 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1232 struct auto_pin_cfg *cfg = &spec->autocfg;
1233 hda_nid_t nid;
2f2f4251 1234 int err;
c7d4b2fa 1235 int i;
2f2f4251
M		 1236
1237 err = snd_hda_add_new_ctls(codec, spec->mixer);
1238 if (err < 0)
1239 return err;
c7d4b2fa
M		 1240
1241 for (i = 0; i < spec->num_mixers; i++) {
1242 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1243 if (err < 0)
1244 return err;
1245 }
1697055e
TI		 1246 if (spec->num_dmuxes > 0) {
1247 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1248 err = snd_hda_ctl_add(codec,
1697055e
TI		 1249 snd_ctl_new1(&stac_dmux_mixer, codec));
1250 if (err < 0)
1251 return err;
1252 }
d9737751 1253 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1254 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1255 struct hda_input_mux *smux = &spec->private_smux;
1256 /* check for mute support on SPDIF out */
1257 if (wcaps & AC_WCAP_OUT_AMP) {
1258 smux->items[smux->num_items].label = "Off";
1259 smux->items[smux->num_items].index = 0;
1260 smux->num_items++;
1261 spec->spdif_mute = 1;
1262 }
d9737751 1263 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1264 err = snd_hda_ctl_add(codec,
d9737751
MR		 1265 snd_ctl_new1(&stac_smux_mixer, codec));
1266 if (err < 0)
1267 return err;
1268 }
c7d4b2fa 1269
dabbed6f
M		 1270 if (spec->multiout.dig_out_nid) {
1271 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1272 if (err < 0)
1273 return err;
9a08160b
TI		 1274 err = snd_hda_create_spdif_share_sw(codec,
1275 &spec->multiout);
1276 if (err < 0)
1277 return err;
1278 spec->multiout.share_spdif = 1;
dabbed6f 1279 }
da74ae3e 1280 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1281 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1282 if (err < 0)
1283 return err;
1284 }
2134ea4f
TI		 1285
1286 /* if we have no master control, let's create it */
1287 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1288 unsigned int vmaster_tlv[4];
2134ea4f 1289 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1290 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1291 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1292 vmaster_tlv, slave_vols);
2134ea4f
TI		 1293 if (err < 0)
1294 return err;
1295 }
1296 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1297 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1298 NULL, slave_sws);
1299 if (err < 0)
1300 return err;
1301 }
1302
603c4019 1303 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1304
1305 /* create jack input elements */
1306 if (spec->hp_detect) {
1307 for (i = 0; i < cfg->hp_outs; i++) {
1308 int type = SND_JACK_HEADPHONE;
1309 nid = cfg->hp_pins[i];
1310 /* jack detection */
1311 if (cfg->hp_outs == i)
1312 type |= SND_JACK_LINEOUT;
1313 err = stac92xx_add_jack(codec, nid, type);
1314 if (err < 0)
1315 return err;
1316 }
1317 }
1318 for (i = 0; i < cfg->line_outs; i++) {
1319 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1320 SND_JACK_LINEOUT);
1321 if (err < 0)
1322 return err;
1323 }
1324 for (i = 0; i < AUTO_PIN_LAST; i++) {
1325 nid = cfg->input_pins[i];
1326 if (nid) {
1327 err = stac92xx_add_jack(codec, nid,
1328 SND_JACK_MICROPHONE);
1329 if (err < 0)
1330 return err;
1331 }
1332 }
1333
dabbed6f 1334 return 0;
2f2f4251
M		 1335}
1336
403d1944 1337static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1338 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1339 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1340};
1341
58eec423
MCC		 1342static unsigned int gateway9200_m4_pin_configs[8] = {
1343 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1344 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1345};
1346static unsigned int gateway9200_m4_2_pin_configs[8] = {
1347 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1348 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1349};
1350
1351/*
dfe495d0
TI		 1352 STAC 9200 pin configs for
1353 102801A8
1354 102801DE
1355 102801E8
1356*/
1357static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1358 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1359 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1360};
1361
1362/*
1363 STAC 9200 pin configs for
1364 102801C0
1365 102801C1
1366*/
1367static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1368 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1369 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1370};
1371
1372/*
1373 STAC 9200 pin configs for
1374 102801C4 (Dell Dimension E310)
1375 102801C5
1376 102801C7
1377 102801D9
1378 102801DA
1379 102801E3
1380*/
1381static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1382 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1383 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1384};
1385
1386
1387/*
1388 STAC 9200-32 pin configs for
1389 102801B5 (Dell Inspiron 630m)
1390 102801D8 (Dell Inspiron 640m)
1391*/
1392static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1393 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1394 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1395};
1396
1397/*
1398 STAC 9200-32 pin configs for
1399 102801C2 (Dell Latitude D620)
1400 102801C8
1401 102801CC (Dell Latitude D820)
1402 102801D4
1403 102801D6
1404*/
1405static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1406 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1407 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1408};
1409
1410/*
1411 STAC 9200-32 pin configs for
1412 102801CE (Dell XPS M1710)
1413 102801CF (Dell Precision M90)
1414*/
1415static unsigned int dell9200_m23_pin_configs[8] = {
1416 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1417 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1418};
1419
1420/*
1421 STAC 9200-32 pin configs for
1422 102801C9
1423 102801CA
1424 102801CB (Dell Latitude 120L)
1425 102801D3
1426*/
1427static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1428 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1429 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1430};
1431
1432/*
1433 STAC 9200-32 pin configs for
1434 102801BD (Dell Inspiron E1505n)
1435 102801EE
1436 102801EF
1437*/
1438static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1439 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1440 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1441};
1442
1443/*
1444 STAC 9200-32 pin configs for
1445 102801F5 (Dell Inspiron 1501)
1446 102801F6
1447*/
1448static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1449 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1450 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1451};
1452
1453/*
1454 STAC 9200-32
1455 102801CD (Dell Inspiron E1705/9400)
1456*/
1457static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1458 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1459 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1460};
1461
bf277785
TD		 1462static unsigned int oqo9200_pin_configs[8] = {
1463 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1464 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1465};
1466
dfe495d0 1467
f5fcc13c
TI		 1468static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1469 [STAC_REF] = ref9200_pin_configs,
bf277785 1470 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1471 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1472 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1473 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1474 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1475 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1476 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1477 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1478 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1479 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1480 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1481 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1482 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1483 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1484};
1485
f5fcc13c
TI		 1486static const char *stac9200_models[STAC_9200_MODELS] = {
1487 [STAC_REF] = "ref",
bf277785 1488 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1489 [STAC_9200_DELL_D21] = "dell-d21",
1490 [STAC_9200_DELL_D22] = "dell-d22",
1491 [STAC_9200_DELL_D23] = "dell-d23",
1492 [STAC_9200_DELL_M21] = "dell-m21",
1493 [STAC_9200_DELL_M22] = "dell-m22",
1494 [STAC_9200_DELL_M23] = "dell-m23",
1495 [STAC_9200_DELL_M24] = "dell-m24",
1496 [STAC_9200_DELL_M25] = "dell-m25",
1497 [STAC_9200_DELL_M26] = "dell-m26",
1498 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1499 [STAC_9200_M4] = "gateway-m4",
1500 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1501 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1502};
1503
1504static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1505 /* SigmaTel reference board */
1506 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1507 "DFI LanParty", STAC_REF),
e7377071 1508 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1509 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1510 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1511 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1512 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1513 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1514 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1516 "unknown Dell", STAC_9200_DELL_D22),
1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1518 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1520 "Dell Latitude D620", STAC_9200_DELL_M22),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1522 "unknown Dell", STAC_9200_DELL_D23),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1524 "unknown Dell", STAC_9200_DELL_D23),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1526 "unknown Dell", STAC_9200_DELL_M22),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1528 "unknown Dell", STAC_9200_DELL_M24),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1530 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1532 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1534 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1536 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1538 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1540 "Dell Precision M90", STAC_9200_DELL_M23),
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1542 "unknown Dell", STAC_9200_DELL_M22),
1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1544 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1546 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1548 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1550 "unknown Dell", STAC_9200_DELL_D23),
1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1552 "unknown Dell", STAC_9200_DELL_D23),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1554 "unknown Dell", STAC_9200_DELL_D21),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1556 "unknown Dell", STAC_9200_DELL_D23),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1558 "unknown Dell", STAC_9200_DELL_D21),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1560 "unknown Dell", STAC_9200_DELL_M25),
1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1562 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1564 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1566 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1567 /* Panasonic */
117f257d 1568 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1569 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1570 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1571 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1572 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1573 /* OQO Mobile */
1574 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1575 {} /* terminator */
1576};
1577
8e21c34c
TD		 1578static unsigned int ref925x_pin_configs[8] = {
1579 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1580 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1581};
1582
9cb36c2a
MCC		 1583static unsigned int stac925xM1_pin_configs[8] = {
1584 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1585 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1586};
1587
9cb36c2a
MCC		 1588static unsigned int stac925xM1_2_pin_configs[8] = {
1589 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1590 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1591};
58eec423 1592
9cb36c2a
MCC		 1593static unsigned int stac925xM2_pin_configs[8] = {
1594 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1595 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1596};
1597
8e21c34c 1598static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1599 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1600 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1601};
1602
9cb36c2a
MCC		 1603static unsigned int stac925xM3_pin_configs[8] = {
1604 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1605 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1606};
58eec423 1607
9cb36c2a
MCC		 1608static unsigned int stac925xM5_pin_configs[8] = {
1609 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1610 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1611};
1612
9cb36c2a
MCC		 1613static unsigned int stac925xM6_pin_configs[8] = {
1614 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1615 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1616};
1617
1618static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1619 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1620 [STAC_M1] = stac925xM1_pin_configs,
1621 [STAC_M1_2] = stac925xM1_2_pin_configs,
1622 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1623 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1624 [STAC_M3] = stac925xM3_pin_configs,
1625 [STAC_M5] = stac925xM5_pin_configs,
1626 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1627};
1628
1629static const char *stac925x_models[STAC_925x_MODELS] = {
1630 [STAC_REF] = "ref",
9cb36c2a
MCC		 1631 [STAC_M1] = "m1",
1632 [STAC_M1_2] = "m1-2",
1633 [STAC_M2] = "m2",
8e21c34c 1634 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1635 [STAC_M3] = "m3",
1636 [STAC_M5] = "m5",
1637 [STAC_M6] = "m6",
8e21c34c
TD		 1638};
1639
9cb36c2a 1640static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1641 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1642 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1643 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1644 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1645 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1646 /* Not sure about the brand name for those */
1647 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1648 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1649 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1650 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1651 {} /* terminator */
8e21c34c
TD		 1652};
1653
1654static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1655 /* SigmaTel reference board */
1656 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1657 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1658
1659 /* Default table for unknown ID */
1660 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1661
8e21c34c
TD		 1662 {} /* terminator */
1663};
1664
a7662640 1665static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1666 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1667 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1668 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1669 0x01452050,
1670};
1671
1672static unsigned int dell_m6_pin_configs[13] = {
1673 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1674 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1675 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1676 0x4f0000f0,
e1f0d669
MR		 1677};
1678
1679static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1680 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1681 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1682 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1683 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1684 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1685};
1686
1687static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1688 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1689 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI		 1690 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1691 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1692 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1693 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1694};
1695
1696static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1697 /* SigmaTel reference board */
1698 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1699 "DFI LanParty", STAC_92HD73XX_REF),
1700 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1701 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1702 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1703 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1704 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1705 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1707 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1709 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1711 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1713 "unknown Dell", STAC_DELL_M6_DMIC),
1714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1715 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1717 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1719 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1720 {} /* terminator */
1721};
1722
d0513fc6
MR		 1723static unsigned int ref92hd83xxx_pin_configs[14] = {
1724 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1725 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1726 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1727 0x01451160, 0x98560170,
1728};
1729
1730static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1731 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1732};
1733
1734static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1735 [STAC_92HD83XXX_REF] = "ref",
1736};
1737
1738static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1739 /* SigmaTel reference board */
1740 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1741 "DFI LanParty", STAC_92HD83XXX_REF),
574f3c4f 1742 {} /* terminator */
d0513fc6
MR		 1743};
1744
0ffa9807 1745static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1746 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1747 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1748 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1749};
1750
0ffa9807 1751static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1752 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1753 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1754 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1755};
1756
0ffa9807 1757static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1758 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1759 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1760 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1761};
1762
3a7abfd2
MR		 1763static unsigned int dell_m4_3_pin_configs[11] = {
1764 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1765 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1766 0x40f000f0, 0x044413b0, 0x044413b0,
1767};
1768
e035b841
MR		 1769static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1770 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1771 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1772 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1773 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1774 [STAC_HP_M4] = NULL,
e035b841
MR		 1775};
1776
1777static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1778 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1779 [STAC_DELL_M4_1] = "dell-m4-1",
1780 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1781 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1782 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1783};
1784
1785static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1786 /* SigmaTel reference board */
1787 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1788 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1789 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1790 "HP dv5", STAC_HP_M4),
1791 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1792 "HP dv7", STAC_HP_M4),
69dfaefe
TI		 1793 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fc,
1794 "HP dv7", STAC_HP_M4),
dafb70ce
GB		 1795 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3603,
1796 "HP dv5", STAC_HP_M4),
9a9e2359
MR		 1797 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1798 "unknown HP", STAC_HP_M4),
a7662640
MR		 1799 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1800 "unknown Dell", STAC_DELL_M4_1),
1801 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1802 "unknown Dell", STAC_DELL_M4_1),
1803 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1804 "unknown Dell", STAC_DELL_M4_1),
1805 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1806 "unknown Dell", STAC_DELL_M4_1),
1807 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1808 "unknown Dell", STAC_DELL_M4_1),
1809 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1810 "unknown Dell", STAC_DELL_M4_1),
1811 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1812 "unknown Dell", STAC_DELL_M4_1),
1813 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1814 "unknown Dell", STAC_DELL_M4_2),
1815 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1816 "unknown Dell", STAC_DELL_M4_2),
1817 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1818 "unknown Dell", STAC_DELL_M4_2),
1819 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1820 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1821 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1822 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1823 {} /* terminator */
1824};
1825
403d1944
MP		 1826static unsigned int ref922x_pin_configs[10] = {
1827 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1828 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1829 0x40000100, 0x40000100,
1830};
1831
dfe495d0
TI		 1832/*
1833 STAC 922X pin configs for
1834 102801A7
1835 102801AB
1836 102801A9
1837 102801D1
1838 102801D2
1839*/
1840static unsigned int dell_922x_d81_pin_configs[10] = {
1841 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1842 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1843 0x01813122, 0x400001f2,
1844};
1845
1846/*
1847 STAC 922X pin configs for
1848 102801AC
1849 102801D0
1850*/
1851static unsigned int dell_922x_d82_pin_configs[10] = {
1852 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1853 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1854 0x01813122, 0x400001f1,
1855};
1856
1857/*
1858 STAC 922X pin configs for
1859 102801BF
1860*/
1861static unsigned int dell_922x_m81_pin_configs[10] = {
1862 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1863 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1864 0x40C003f1, 0x405003f0,
1865};
1866
1867/*
1868 STAC 9221 A1 pin configs for
1869 102801D7 (Dell XPS M1210)
1870*/
1871static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1872 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1873 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1874 0x508003f3, 0x405003f4,
1875};
1876
403d1944 1877static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1878 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1879 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1880 0x02a19120, 0x40000100,
1881};
1882
1883static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1884 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1885 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1886 0x02a19320, 0x40000100,
1887};
1888
5d5d3bc3
IZ		 1889static unsigned int intel_mac_v1_pin_configs[10] = {
1890 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1891 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1892 0x400000fc, 0x400000fb,
1893};
1894
1895static unsigned int intel_mac_v2_pin_configs[10] = {
1896 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1897 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1898 0x400000fc, 0x400000fb,
6f0778d8
NB		 1899};
1900
5d5d3bc3
IZ		 1901static unsigned int intel_mac_v3_pin_configs[10] = {
1902 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1903 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1904 0x400000fc, 0x400000fb,
1905};
1906
5d5d3bc3
IZ		 1907static unsigned int intel_mac_v4_pin_configs[10] = {
1908 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1909 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1910 0x400000fc, 0x400000fb,
1911};
1912
5d5d3bc3
IZ		 1913static unsigned int intel_mac_v5_pin_configs[10] = {
1914 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1915 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1916 0x400000fc, 0x400000fb,
0dae0f83
TI		 1917};
1918
8c650087
MCC		 1919static unsigned int ecs202_pin_configs[10] = {
1920 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1921 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1922 0x9037012e, 0x40e000f2,
1923};
76c08828 1924
19039bd0 1925static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1926 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1927 [STAC_D945GTP3] = d945gtp3_pin_configs,
1928 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1929 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1930 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1931 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1932 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1933 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1934 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1935 /* for backward compatibility */
5d5d3bc3
IZ		 1936 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1937 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1938 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1939 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1940 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1941 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1942 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1943 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1944 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1945 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1946 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1947};
1948
f5fcc13c
TI		 1949static const char *stac922x_models[STAC_922X_MODELS] = {
1950 [STAC_D945_REF] = "ref",
1951 [STAC_D945GTP5] = "5stack",
1952 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1953 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1954 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1955 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1956 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1957 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1958 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1959 /* for backward compatibility */
f5fcc13c 1960 [STAC_MACMINI] = "macmini",
3fc24d85 1961 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1962 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1963 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1964 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1965 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1966 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1967 [STAC_922X_DELL_D81] = "dell-d81",
1968 [STAC_922X_DELL_D82] = "dell-d82",
1969 [STAC_922X_DELL_M81] = "dell-m81",
1970 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1971};
1972
1973static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1974 /* SigmaTel reference board */
1975 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1976 "DFI LanParty", STAC_D945_REF),
1977 /* Intel 945G based systems */
1978 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1979 "Intel D945G", STAC_D945GTP3),
1980 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1981 "Intel D945G", STAC_D945GTP3),
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1983 "Intel D945G", STAC_D945GTP3),
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1985 "Intel D945G", STAC_D945GTP3),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1987 "Intel D945G", STAC_D945GTP3),
1988 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1989 "Intel D945G", STAC_D945GTP3),
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1991 "Intel D945G", STAC_D945GTP3),
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1993 "Intel D945G", STAC_D945GTP3),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1995 "Intel D945G", STAC_D945GTP3),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1997 "Intel D945G", STAC_D945GTP3),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1999 "Intel D945G", STAC_D945GTP3),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2001 "Intel D945G", STAC_D945GTP3),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2003 "Intel D945G", STAC_D945GTP3),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2005 "Intel D945G", STAC_D945GTP3),
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2007 "Intel D945G", STAC_D945GTP3),
2008 /* Intel D945G 5-stack systems */
2009 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2010 "Intel D945G", STAC_D945GTP5),
2011 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2012 "Intel D945G", STAC_D945GTP5),
2013 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2014 "Intel D945G", STAC_D945GTP5),
2015 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2016 "Intel D945G", STAC_D945GTP5),
2017 /* Intel 945P based systems */
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2019 "Intel D945P", STAC_D945GTP3),
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2021 "Intel D945P", STAC_D945GTP3),
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2023 "Intel D945P", STAC_D945GTP3),
2024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2025 "Intel D945P", STAC_D945GTP3),
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2027 "Intel D945P", STAC_D945GTP3),
2028 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2029 "Intel D945P", STAC_D945GTP5),
2030 /* other systems */
536319af 2031 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2032 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2033 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2034 /* Dell systems */
2035 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2036 "unknown Dell", STAC_922X_DELL_D81),
2037 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2038 "unknown Dell", STAC_922X_DELL_D81),
2039 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2040 "unknown Dell", STAC_922X_DELL_D81),
2041 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2042 "unknown Dell", STAC_922X_DELL_D82),
2043 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2044 "unknown Dell", STAC_922X_DELL_M81),
2045 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2046 "unknown Dell", STAC_922X_DELL_D82),
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2048 "unknown Dell", STAC_922X_DELL_D81),
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2050 "unknown Dell", STAC_922X_DELL_D81),
2051 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2052 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 2053 /* ECS/PC Chips boards */
2054 SND_PCI_QUIRK(0x1019, 0x2144,
2055 "ECS/PC chips", STAC_ECS_202),
2056 SND_PCI_QUIRK(0x1019, 0x2608,
2057 "ECS/PC chips", STAC_ECS_202),
2058 SND_PCI_QUIRK(0x1019, 0x2633,
2059 "ECS/PC chips P17G/1333", STAC_ECS_202),
2060 SND_PCI_QUIRK(0x1019, 0x2811,
2061 "ECS/PC chips", STAC_ECS_202),
2062 SND_PCI_QUIRK(0x1019, 0x2812,
2063 "ECS/PC chips", STAC_ECS_202),
2064 SND_PCI_QUIRK(0x1019, 0x2813,
2065 "ECS/PC chips", STAC_ECS_202),
2066 SND_PCI_QUIRK(0x1019, 0x2814,
2067 "ECS/PC chips", STAC_ECS_202),
2068 SND_PCI_QUIRK(0x1019, 0x2815,
2069 "ECS/PC chips", STAC_ECS_202),
2070 SND_PCI_QUIRK(0x1019, 0x2816,
2071 "ECS/PC chips", STAC_ECS_202),
2072 SND_PCI_QUIRK(0x1019, 0x2817,
2073 "ECS/PC chips", STAC_ECS_202),
2074 SND_PCI_QUIRK(0x1019, 0x2818,
2075 "ECS/PC chips", STAC_ECS_202),
2076 SND_PCI_QUIRK(0x1019, 0x2819,
2077 "ECS/PC chips", STAC_ECS_202),
2078 SND_PCI_QUIRK(0x1019, 0x2820,
2079 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2080 {} /* terminator */
2081};
2082
3cc08dc6 2083static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2084 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2085 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2086 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2087 0x01c42190, 0x40000100,
3cc08dc6
MP		 2088};
2089
93ed1503 2090static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2091 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2092 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2093 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2094 0x40000100, 0x40000100
2095};
2096
93ed1503
TD		 2097static unsigned int d965_5st_pin_configs[14] = {
2098 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2099 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2100 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2101 0x40000100, 0x40000100
2102};
2103
4ff076e5
TD		 2104static unsigned int dell_3st_pin_configs[14] = {
2105 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2106 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2107 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2108 0x40c003fc, 0x40000100
2109};
2110
93ed1503 2111static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2112 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2113 [STAC_D965_REF] = ref927x_pin_configs,
2114 [STAC_D965_3ST] = d965_3st_pin_configs,
2115 [STAC_D965_5ST] = d965_5st_pin_configs,
2116 [STAC_DELL_3ST] = dell_3st_pin_configs,
2117 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2118};
2119
f5fcc13c 2120static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2121 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2122 [STAC_D965_REF] = "ref",
2123 [STAC_D965_3ST] = "3stack",
2124 [STAC_D965_5ST] = "5stack",
2125 [STAC_DELL_3ST] = "dell-3stack",
2126 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2127};
2128
2129static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2130 /* SigmaTel reference board */
2131 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2132 "DFI LanParty", STAC_D965_REF),
81d3dbde 2133 /* Intel 946 based systems */
f5fcc13c
TI		 2134 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2135 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2136 /* 965 based 3 stack systems */
f5fcc13c
TI		 2137 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2138 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2139 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2140 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2141 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2142 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2143 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2144 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2145 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2146 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2147 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2148 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2149 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2150 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2151 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2152 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2153 /* Dell 3 stack systems */
8e9068b1 2154 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2155 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2156 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2157 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2158 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2159 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2160 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2161 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2162 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2163 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2164 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2165 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2167 /* 965 based 5 stack systems */
f5fcc13c
TI		 2168 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2169 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2170 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2171 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2172 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2173 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2174 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2175 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2176 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2177 {} /* terminator */
2178};
2179
f3302a59
MP		 2180static unsigned int ref9205_pin_configs[12] = {
2181 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2182 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2183 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2184};
2185
dfe495d0
TI		 2186/*
2187 STAC 9205 pin configs for
2188 102801F1
2189 102801F2
2190 102801FC
2191 102801FD
2192 10280204
2193 1028021F
3fa2ef74 2194 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2195*/
2196static unsigned int dell_9205_m42_pin_configs[12] = {
2197 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2198 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2199 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2200};
2201
2202/*
2203 STAC 9205 pin configs for
2204 102801F9
2205 102801FA
2206 102801FE
2207 102801FF (Dell Precision M4300)
2208 10280206
2209 10280200
2210 10280201
2211*/
2212static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2213 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2214 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2215 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2216};
2217
dfe495d0 2218static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2219 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2220 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2221 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2222};
2223
f5fcc13c 2224static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2225 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2226 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2227 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2228 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2229};
2230
f5fcc13c
TI		 2231static const char *stac9205_models[STAC_9205_MODELS] = {
2232 [STAC_9205_REF] = "ref",
dfe495d0 2233 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2234 [STAC_9205_DELL_M43] = "dell-m43",
2235 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2236};
2237
2238static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2239 /* SigmaTel reference board */
2240 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2241 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2242 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2243 "unknown Dell", STAC_9205_DELL_M42),
2244 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2245 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2246 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2247 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2248 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2249 "Dell Precision", STAC_9205_DELL_M43),
2250 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2251 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2252 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2253 "unknown Dell", STAC_9205_DELL_M42),
2254 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2255 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2256 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2257 "Dell Precision", STAC_9205_DELL_M43),
2258 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2259 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2260 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2261 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2262 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2263 "Dell Precision", STAC_9205_DELL_M43),
2264 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2265 "Dell Precision", STAC_9205_DELL_M43),
2266 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2267 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2268 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2269 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2271 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2272 {} /* terminator */
2273};
2274
11b44bbd
RF		 2275static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2276{
2277 int i;
2278 struct sigmatel_spec *spec = codec->spec;
2279
af9f341a
TI		 2280 kfree(spec->pin_configs);
2281 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2282 GFP_KERNEL);
2283 if (!spec->pin_configs)
2284 return -ENOMEM;
11b44bbd
RF		 2285
2286 for (i = 0; i < spec->num_pins; i++) {
2287 hda_nid_t nid = spec->pin_nids[i];
2288 unsigned int pin_cfg;
2289
2290 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2291 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2292 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2293 nid, pin_cfg);
af9f341a 2294 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF		 2295 }
2296
2297 return 0;
2298}
2299
87d48363
MR		 2300static void stac92xx_set_config_reg(struct hda_codec *codec,
2301 hda_nid_t pin_nid, unsigned int pin_config)
2302{
2303 int i;
2304 snd_hda_codec_write(codec, pin_nid, 0,
2305 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2306 pin_config & 0x000000ff);
2307 snd_hda_codec_write(codec, pin_nid, 0,
2308 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2309 (pin_config & 0x0000ff00) >> 8);
2310 snd_hda_codec_write(codec, pin_nid, 0,
2311 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2312 (pin_config & 0x00ff0000) >> 16);
2313 snd_hda_codec_write(codec, pin_nid, 0,
2314 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2315 pin_config >> 24);
2316 i = snd_hda_codec_read(codec, pin_nid, 0,
2317 AC_VERB_GET_CONFIG_DEFAULT,
2318 0x00);
2319 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2320 pin_nid, i);
2321}
2322
2f2f4251
M		 2323static void stac92xx_set_config_regs(struct hda_codec *codec)
2324{
2325 int i;
2326 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2327
87d48363
MR		 2328 if (!spec->pin_configs)
2329 return;
11b44bbd 2330
87d48363
MR		 2331 for (i = 0; i < spec->num_pins; i++)
2332 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2333 spec->pin_configs[i]);
2f2f4251 2334}
2f2f4251 2335
af9f341a
TI		 2336static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2337{
2338 struct sigmatel_spec *spec = codec->spec;
2339
2340 if (!pins)
2341 return stac92xx_save_bios_config_regs(codec);
2342
2343 kfree(spec->pin_configs);
2344 spec->pin_configs = kmemdup(pins,
2345 spec->num_pins * sizeof(*pins),
2346 GFP_KERNEL);
2347 if (!spec->pin_configs)
2348 return -ENOMEM;
2349
2350 stac92xx_set_config_regs(codec);
2351 return 0;
2352}
2353
2354static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2355 unsigned int cfg)
2356{
2357 struct sigmatel_spec *spec = codec->spec;
2358 int i;
2359
2360 for (i = 0; i < spec->num_pins; i++) {
2361 if (spec->pin_nids[i] == nid) {
2362 spec->pin_configs[i] = cfg;
2363 stac92xx_set_config_reg(codec, nid, cfg);
2364 break;
2365 }
2366 }
2367}
2368
dabbed6f 2369/*
c7d4b2fa 2370 * Analog playback callbacks
dabbed6f 2371 */
c7d4b2fa
M		 2372static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2373 struct hda_codec *codec,
c8b6bf9b 2374 struct snd_pcm_substream *substream)
2f2f4251 2375{
dabbed6f 2376 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2377 if (spec->stream_delay)
2378 msleep(spec->stream_delay);
9a08160b
TI		 2379 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2380 hinfo);
2f2f4251
M		 2381}
2382
2f2f4251
M		 2383static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2384 struct hda_codec *codec,
2385 unsigned int stream_tag,
2386 unsigned int format,
c8b6bf9b 2387 struct snd_pcm_substream *substream)
2f2f4251
M		 2388{
2389 struct sigmatel_spec *spec = codec->spec;
403d1944 2390 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2391}
2392
2393static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2394 struct hda_codec *codec,
c8b6bf9b 2395 struct snd_pcm_substream *substream)
2f2f4251
M		 2396{
2397 struct sigmatel_spec *spec = codec->spec;
2398 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2399}
2400
dabbed6f
M		 2401/*
2402 * Digital playback callbacks
2403 */
2404static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2405 struct hda_codec *codec,
c8b6bf9b 2406 struct snd_pcm_substream *substream)
dabbed6f
M		 2407{
2408 struct sigmatel_spec *spec = codec->spec;
2409 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2410}
2411
2412static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2413 struct hda_codec *codec,
c8b6bf9b 2414 struct snd_pcm_substream *substream)
dabbed6f
M		 2415{
2416 struct sigmatel_spec *spec = codec->spec;
2417 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2418}
2419
6b97eb45
TI		 2420static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2421 struct hda_codec *codec,
2422 unsigned int stream_tag,
2423 unsigned int format,
2424 struct snd_pcm_substream *substream)
2425{
2426 struct sigmatel_spec *spec = codec->spec;
2427 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2428 stream_tag, format, substream);
2429}
2430
dabbed6f 2431
2f2f4251
M		 2432/*
2433 * Analog capture callbacks
2434 */
2435static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2436 struct hda_codec *codec,
2437 unsigned int stream_tag,
2438 unsigned int format,
c8b6bf9b 2439 struct snd_pcm_substream *substream)
2f2f4251
M		 2440{
2441 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2442 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2443
8daaaa97
MR		 2444 if (spec->powerdown_adcs) {
2445 msleep(40);
8c2f767b 2446 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2447 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2448 }
2449 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2450 return 0;
2451}
2452
2453static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2454 struct hda_codec *codec,
c8b6bf9b 2455 struct snd_pcm_substream *substream)
2f2f4251
M		 2456{
2457 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2458 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2459
8daaaa97
MR		 2460 snd_hda_codec_cleanup_stream(codec, nid);
2461 if (spec->powerdown_adcs)
8c2f767b 2462 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2463 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2464 return 0;
2465}
2466
dabbed6f
M		 2467static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2468 .substreams = 1,
2469 .channels_min = 2,
2470 .channels_max = 2,
2471 /* NID is set in stac92xx_build_pcms */
2472 .ops = {
2473 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2474 .close = stac92xx_dig_playback_pcm_close,
2475 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2476 },
2477};
2478
2479static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2480 .substreams = 1,
2481 .channels_min = 2,
2482 .channels_max = 2,
2483 /* NID is set in stac92xx_build_pcms */
2484};
2485
2f2f4251
M		 2486static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2487 .substreams = 1,
2488 .channels_min = 2,
c7d4b2fa 2489 .channels_max = 8,
2f2f4251
M		 2490 .nid = 0x02, /* NID to query formats and rates */
2491 .ops = {
2492 .open = stac92xx_playback_pcm_open,
2493 .prepare = stac92xx_playback_pcm_prepare,
2494 .cleanup = stac92xx_playback_pcm_cleanup
2495 },
2496};
2497
3cc08dc6
MP		 2498static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2499 .substreams = 1,
2500 .channels_min = 2,
2501 .channels_max = 2,
2502 .nid = 0x06, /* NID to query formats and rates */
2503 .ops = {
2504 .open = stac92xx_playback_pcm_open,
2505 .prepare = stac92xx_playback_pcm_prepare,
2506 .cleanup = stac92xx_playback_pcm_cleanup
2507 },
2508};
2509
2f2f4251 2510static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2511 .channels_min = 2,
2512 .channels_max = 2,
9e05b7a3 2513 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2514 .ops = {
2515 .prepare = stac92xx_capture_pcm_prepare,
2516 .cleanup = stac92xx_capture_pcm_cleanup
2517 },
2518};
2519
2520static int stac92xx_build_pcms(struct hda_codec *codec)
2521{
2522 struct sigmatel_spec *spec = codec->spec;
2523 struct hda_pcm *info = spec->pcm_rec;
2524
2525 codec->num_pcms = 1;
2526 codec->pcm_info = info;
2527
c7d4b2fa 2528 info->name = "STAC92xx Analog";
2f2f4251 2529 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2530 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2531 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2532 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2533
2534 if (spec->alt_switch) {
2535 codec->num_pcms++;
2536 info++;
2537 info->name = "STAC92xx Analog Alt";
2538 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2539 }
2f2f4251 2540
dabbed6f
M		 2541 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2542 codec->num_pcms++;
2543 info++;
2544 info->name = "STAC92xx Digital";
7ba72ba1 2545 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2546 if (spec->multiout.dig_out_nid) {
2547 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2548 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2549 }
2550 if (spec->dig_in_nid) {
2551 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2552 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2553 }
2554 }
2555
2f2f4251
M		 2556 return 0;
2557}
2558
c960a03b
TI		 2559static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2560{
2561 unsigned int pincap = snd_hda_param_read(codec, nid,
2562 AC_PAR_PIN_CAP);
2563 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2564 if (pincap & AC_PINCAP_VREF_100)
2565 return AC_PINCTL_VREF_100;
2566 if (pincap & AC_PINCAP_VREF_80)
2567 return AC_PINCTL_VREF_80;
2568 if (pincap & AC_PINCAP_VREF_50)
2569 return AC_PINCTL_VREF_50;
2570 if (pincap & AC_PINCAP_VREF_GRD)
2571 return AC_PINCTL_VREF_GRD;
2572 return 0;
2573}
2574
403d1944
MP		 2575static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2576
2577{
82beb8fd
TI		 2578 snd_hda_codec_write_cache(codec, nid, 0,
2579 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2580}
2581
7c2ba97b
MR		 2582#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2583
2584static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2585 struct snd_ctl_elem_value *ucontrol)
2586{
2587 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2588 struct sigmatel_spec *spec = codec->spec;
2589
d7a89436 2590 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2591 return 0;
2592}
2593
c6e4c666
TI		 2594static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2595 unsigned char type);
2596
7c2ba97b
MR		 2597static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2598 struct snd_ctl_elem_value *ucontrol)
2599{
2600 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2601 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2602 int nid = kcontrol->private_value;
2603
2604 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2605
2606 /* check to be sure that the ports are upto date with
2607 * switch changes
2608 */
c6e4c666 2609 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR		 2610
2611 return 1;
2612}
2613
a5ce8890 2614#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2615
2616static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2617{
2618 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2619 struct sigmatel_spec *spec = codec->spec;
2620 int io_idx = kcontrol-> private_value & 0xff;
2621
2622 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2623 return 0;
2624}
2625
2626static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2627{
2628 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2629 struct sigmatel_spec *spec = codec->spec;
2630 hda_nid_t nid = kcontrol->private_value >> 8;
2631 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2632 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2633
2634 spec->io_switch[io_idx] = val;
2635
2636 if (val)
2637 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2638 else {
2639 unsigned int pinctl = AC_PINCTL_IN_EN;
2640 if (io_idx) /* set VREF for mic */
2641 pinctl |= stac92xx_get_vref(codec, nid);
2642 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2643 }
40c1d308
JZ		 2644
2645 /* check the auto-mute again: we need to mute/unmute the speaker
2646 * appropriately according to the pin direction
2647 */
2648 if (spec->hp_detect)
c6e4c666 2649 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2650
403d1944
MP		 2651 return 1;
2652}
2653
0fb87bb4
ML		 2654#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2655
2656static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2657 struct snd_ctl_elem_value *ucontrol)
2658{
2659 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2660 struct sigmatel_spec *spec = codec->spec;
2661
2662 ucontrol->value.integer.value[0] = spec->clfe_swap;
2663 return 0;
2664}
2665
2666static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2667 struct snd_ctl_elem_value *ucontrol)
2668{
2669 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2670 struct sigmatel_spec *spec = codec->spec;
2671 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2672 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2673
68ea7b2f 2674 if (spec->clfe_swap == val)
0fb87bb4
ML		 2675 return 0;
2676
68ea7b2f 2677 spec->clfe_swap = val;
0fb87bb4
ML		 2678
2679 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2680 spec->clfe_swap ? 0x4 : 0x0);
2681
2682 return 1;
2683}
2684
7c2ba97b
MR		 2685#define STAC_CODEC_HP_SWITCH(xname) \
2686 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2687 .name = xname, \
2688 .index = 0, \
2689 .info = stac92xx_hp_switch_info, \
2690 .get = stac92xx_hp_switch_get, \
2691 .put = stac92xx_hp_switch_put, \
2692 }
2693
403d1944
MP		 2694#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2695 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2696 .name = xname, \
2697 .index = 0, \
2698 .info = stac92xx_io_switch_info, \
2699 .get = stac92xx_io_switch_get, \
2700 .put = stac92xx_io_switch_put, \
2701 .private_value = xpval, \
2702 }
2703
0fb87bb4
ML		 2704#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2705 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2706 .name = xname, \
2707 .index = 0, \
2708 .info = stac92xx_clfe_switch_info, \
2709 .get = stac92xx_clfe_switch_get, \
2710 .put = stac92xx_clfe_switch_put, \
2711 .private_value = xpval, \
2712 }
403d1944 2713
c7d4b2fa
M		 2714enum {
2715 STAC_CTL_WIDGET_VOL,
2716 STAC_CTL_WIDGET_MUTE,
09a99959 2717 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2718 STAC_CTL_WIDGET_AMP_MUX,
2719 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2720 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2721 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2722 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2723};
2724
c8b6bf9b 2725static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2726 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2727 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2728 STAC_MONO_MUX,
89385035
MR		 2729 STAC_AMP_MUX,
2730 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2731 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2732 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2733 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2734};
2735
2736/* add dynamic controls */
4d4e9bb3
TI		 2737static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2738 struct snd_kcontrol_new *ktemp,
2739 int idx, const char *name,
2740 unsigned long val)
c7d4b2fa 2741{
c8b6bf9b 2742 struct snd_kcontrol_new *knew;
c7d4b2fa 2743
603c4019
TI		 2744 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2745 knew = snd_array_new(&spec->kctls);
2746 if (!knew)
2747 return -ENOMEM;
4d4e9bb3 2748 *knew = *ktemp;
4682eee0 2749 knew->index = idx;
82fe0c58 2750 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2751 if (!knew->name)
c7d4b2fa
M		 2752 return -ENOMEM;
2753 knew->private_value = val;
c7d4b2fa
M		 2754 return 0;
2755}
2756
4d4e9bb3
TI		 2757static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2758 int type, int idx, const char *name,
2759 unsigned long val)
2760{
2761 return stac92xx_add_control_temp(spec,
2762 &stac92xx_control_templates[type],
2763 idx, name, val);
2764}
2765
4682eee0
MR		 2766
2767/* add dynamic controls */
4d4e9bb3
TI		 2768static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2769 const char *name, unsigned long val)
4682eee0
MR		 2770{
2771 return stac92xx_add_control_idx(spec, type, 0, name, val);
2772}
2773
c21ca4a8
TI		 2774/* check whether the line-input can be used as line-out */
2775static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2776{
2777 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2778 struct auto_pin_cfg *cfg = &spec->autocfg;
2779 hda_nid_t nid;
2780 unsigned int pincap;
8e9068b1 2781
c21ca4a8
TI		 2782 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2783 return 0;
2784 nid = cfg->input_pins[AUTO_PIN_LINE];
2785 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2786 if (pincap & AC_PINCAP_OUT)
2787 return nid;
2788 return 0;
2789}
403d1944 2790
c21ca4a8
TI		 2791/* check whether the mic-input can be used as line-out */
2792static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2793{
2794 struct sigmatel_spec *spec = codec->spec;
2795 struct auto_pin_cfg *cfg = &spec->autocfg;
2796 unsigned int def_conf, pincap;
2797 unsigned int mic_pin;
2798
2799 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2800 return 0;
2801 mic_pin = AUTO_PIN_MIC;
2802 for (;;) {
2803 hda_nid_t nid = cfg->input_pins[mic_pin];
2804 def_conf = snd_hda_codec_read(codec, nid, 0,
2805 AC_VERB_GET_CONFIG_DEFAULT, 0);
2806 /* some laptops have an internal analog microphone
2807 * which can't be used as a output */
2808 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2809 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2810 if (pincap & AC_PINCAP_OUT)
2811 return nid;
403d1944 2812 }
c21ca4a8
TI		 2813 if (mic_pin == AUTO_PIN_MIC)
2814 mic_pin = AUTO_PIN_FRONT_MIC;
2815 else
2816 break;
403d1944 2817 }
403d1944
MP		 2818 return 0;
2819}
2820
7b043899
SL		 2821static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2822{
2823 int i;
2824
2825 for (i = 0; i < spec->multiout.num_dacs; i++) {
2826 if (spec->multiout.dac_nids[i] == nid)
2827 return 1;
2828 }
2829
2830 return 0;
2831}
2832
c21ca4a8
TI		 2833static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2834{
2835 int i;
2836 if (is_in_dac_nids(spec, nid))
2837 return 1;
2838 for (i = 0; i < spec->autocfg.hp_outs; i++)
2839 if (spec->hp_dacs[i] == nid)
2840 return 1;
2841 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2842 if (spec->speaker_dacs[i] == nid)
2843 return 1;
2844 return 0;
2845}
2846
2847static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2848{
2849 struct sigmatel_spec *spec = codec->spec;
2850 int j, conn_len;
2851 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2852 unsigned int wcaps, wtype;
2853
2854 conn_len = snd_hda_get_connections(codec, nid, conn,
2855 HDA_MAX_CONNECTIONS);
2856 for (j = 0; j < conn_len; j++) {
2857 wcaps = snd_hda_param_read(codec, conn[j],
2858 AC_PAR_AUDIO_WIDGET_CAP);
2859 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2860 /* we check only analog outputs */
2861 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2862 continue;
2863 /* if this route has a free DAC, assign it */
2864 if (!check_all_dac_nids(spec, conn[j])) {
2865 if (conn_len > 1) {
2866 /* select this DAC in the pin's input mux */
2867 snd_hda_codec_write_cache(codec, nid, 0,
2868 AC_VERB_SET_CONNECT_SEL, j);
2869 }
2870 return conn[j];
2871 }
2872 }
2873 return 0;
2874}
2875
2876static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2877static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2878
3cc08dc6 2879/*
7b043899
SL		 2880 * Fill in the dac_nids table from the parsed pin configuration
2881 * This function only works when every pin in line_out_pins[]
2882 * contains atleast one DAC in its connection list. Some 92xx
2883 * codecs are not connected directly to a DAC, such as the 9200
2884 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2885 */
c21ca4a8 2886static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 2887{
2888 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2889 struct auto_pin_cfg *cfg = &spec->autocfg;
2890 int i;
2891 hda_nid_t nid, dac;
7b043899 2892
c7d4b2fa
M		 2893 for (i = 0; i < cfg->line_outs; i++) {
2894 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 2895 dac = get_unassigned_dac(codec, nid);
2896 if (!dac) {
df802952
TI		 2897 if (spec->multiout.num_dacs > 0) {
2898 /* we have already working output pins,
2899 * so let's drop the broken ones again
2900 */
2901 cfg->line_outs = spec->multiout.num_dacs;
2902 break;
2903 }
7b043899
SL		 2904 /* error out, no available DAC found */
2905 snd_printk(KERN_ERR
2906 "%s: No available DAC for pin 0x%x\n",
2907 __func__, nid);
2908 return -ENODEV;
2909 }
c21ca4a8
TI		 2910 add_spec_dacs(spec, dac);
2911 }
7b043899 2912
c21ca4a8
TI		 2913 /* add line-in as output */
2914 nid = check_line_out_switch(codec);
2915 if (nid) {
2916 dac = get_unassigned_dac(codec, nid);
2917 if (dac) {
2918 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2919 nid, cfg->line_outs);
2920 cfg->line_out_pins[cfg->line_outs] = nid;
2921 cfg->line_outs++;
2922 spec->line_switch = nid;
2923 add_spec_dacs(spec, dac);
2924 }
2925 }
2926 /* add mic as output */
2927 nid = check_mic_out_switch(codec);
2928 if (nid) {
2929 dac = get_unassigned_dac(codec, nid);
2930 if (dac) {
2931 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2932 nid, cfg->line_outs);
2933 cfg->line_out_pins[cfg->line_outs] = nid;
2934 cfg->line_outs++;
2935 spec->mic_switch = nid;
2936 add_spec_dacs(spec, dac);
2937 }
2938 }
c7d4b2fa 2939
c21ca4a8
TI		 2940 for (i = 0; i < cfg->hp_outs; i++) {
2941 nid = cfg->hp_pins[i];
2942 dac = get_unassigned_dac(codec, nid);
2943 if (dac) {
2944 if (!spec->multiout.hp_nid)
2945 spec->multiout.hp_nid = dac;
2946 else
2947 add_spec_extra_dacs(spec, dac);
7b043899 2948 }
c21ca4a8
TI		 2949 spec->hp_dacs[i] = dac;
2950 }
2951
2952 for (i = 0; i < cfg->speaker_outs; i++) {
2953 nid = cfg->speaker_pins[i];
2954 dac = get_unassigned_dac(codec, nid);
2955 if (dac)
2956 add_spec_extra_dacs(spec, dac);
2957 spec->speaker_dacs[i] = dac;
7b043899 2958 }
c7d4b2fa 2959
c21ca4a8 2960 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 2961 spec->multiout.num_dacs,
2962 spec->multiout.dac_nids[0],
2963 spec->multiout.dac_nids[1],
2964 spec->multiout.dac_nids[2],
2965 spec->multiout.dac_nids[3],
2966 spec->multiout.dac_nids[4]);
c21ca4a8 2967
c7d4b2fa
M		 2968 return 0;
2969}
2970
eb06ed8f
TI		 2971/* create volume control/switch for the given prefx type */
2972static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2973{
2974 char name[32];
2975 int err;
2976
2977 sprintf(name, "%s Playback Volume", pfx);
2978 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2979 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2980 if (err < 0)
2981 return err;
2982 sprintf(name, "%s Playback Switch", pfx);
2983 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2984 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2985 if (err < 0)
2986 return err;
2987 return 0;
2988}
2989
ae0afd81
MR		 2990static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2991{
c21ca4a8 2992 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 2993 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2994 return 1;
2995 } else {
2996 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2997 spec->multiout.num_dacs++;
2998 }
2999 return 0;
3000}
3001
c21ca4a8 3002static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3003{
c21ca4a8
TI		 3004 int i;
3005 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3006 if (!spec->multiout.extra_out_nid[i]) {
3007 spec->multiout.extra_out_nid[i] = nid;
3008 return 0;
3009 }
3010 }
3011 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3012 return 1;
ae0afd81
MR		 3013}
3014
76624534
TI		 3015static int is_unique_dac(struct sigmatel_spec *spec, hda_nid_t nid)
3016{
3017 int i;
3018
3019 if (spec->autocfg.line_outs != 1)
3020 return 0;
3021 if (spec->multiout.hp_nid == nid)
3022 return 0;
3023 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++)
3024 if (spec->multiout.extra_out_nid[i] == nid)
3025 return 0;
3026 return 1;
3027}
3028
c7d4b2fa 3029/* add playback controls from the parsed DAC table */
0fb87bb4 3030static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 3031 const struct auto_pin_cfg *cfg)
c7d4b2fa 3032{
76624534 3033 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI		 3034 static const char *chname[4] = {
3035 "Front", "Surround", NULL /*CLFE*/, "Side"
3036 };
d21995e3 3037 hda_nid_t nid = 0;
91589232
TI		 3038 int i, err;
3039 unsigned int wid_caps;
0fb87bb4 3040
c21ca4a8 3041 for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) {
c7d4b2fa 3042 nid = spec->multiout.dac_nids[i];
c7d4b2fa
M		 3043 if (i == 2) {
3044 /* Center/LFE */
eb06ed8f
TI		 3045 err = create_controls(spec, "Center", nid, 1);
3046 if (err < 0)
c7d4b2fa 3047 return err;
eb06ed8f
TI		 3048 err = create_controls(spec, "LFE", nid, 2);
3049 if (err < 0)
c7d4b2fa 3050 return err;
0fb87bb4
ML		 3051
3052 wid_caps = get_wcaps(codec, nid);
3053
3054 if (wid_caps & AC_WCAP_LR_SWAP) {
3055 err = stac92xx_add_control(spec,
3056 STAC_CTL_WIDGET_CLFE_SWITCH,
3057 "Swap Center/LFE Playback Switch", nid);
3058
3059 if (err < 0)
3060 return err;
3061 }
3062
c7d4b2fa 3063 } else {
76624534
TI		 3064 const char *name = chname[i];
3065 /* if it's a single DAC, assign a better name */
3066 if (!i && is_unique_dac(spec, nid)) {
3067 switch (cfg->line_out_type) {
3068 case AUTO_PIN_HP_OUT:
3069 name = "Headphone";
3070 break;
3071 case AUTO_PIN_SPEAKER_OUT:
3072 name = "Speaker";
3073 break;
3074 }
3075 }
3076 err = create_controls(spec, name, nid, 3);
eb06ed8f 3077 if (err < 0)
c7d4b2fa
M		 3078 return err;
3079 }
3080 }
3081
a9cb5c90 3082 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3083 err = stac92xx_add_control(spec,
3084 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3085 "Headphone as Line Out Switch",
3086 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3087 if (err < 0)
3088 return err;
3089 }
3090
b5895dc8 3091 if (spec->line_switch) {
c21ca4a8
TI		 3092 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3093 "Line In as Output Switch",
3094 spec->line_switch << 8);
3095 if (err < 0)
3096 return err;
b5895dc8 3097 }
403d1944 3098
b5895dc8 3099 if (spec->mic_switch) {
c21ca4a8
TI		 3100 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3101 "Mic as Output Switch",
3102 (spec->mic_switch << 8) | 1);
3103 if (err < 0)
3104 return err;
b5895dc8 3105 }
403d1944 3106
c7d4b2fa
M		 3107 return 0;
3108}
3109
eb06ed8f
TI		 3110/* add playback controls for Speaker and HP outputs */
3111static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3112 struct auto_pin_cfg *cfg)
3113{
3114 struct sigmatel_spec *spec = codec->spec;
3115 hda_nid_t nid;
c21ca4a8 3116 int i, err, nums;
eb06ed8f 3117
c21ca4a8 3118 nums = 0;
eb06ed8f 3119 for (i = 0; i < cfg->hp_outs; i++) {
c21ca4a8
TI		 3120 static const char *pfxs[] = {
3121 "Headphone", "Headphone2", "Headphone3",
3122 };
eb06ed8f
TI		 3123 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3124 if (wid_caps & AC_WCAP_UNSOL_CAP)
3125 spec->hp_detect = 1;
c21ca4a8 3126 if (nums >= ARRAY_SIZE(pfxs))
c7d4b2fa 3127 continue;
c21ca4a8
TI		 3128 nid = spec->hp_dacs[i];
3129 if (!nid)
eb06ed8f 3130 continue;
c21ca4a8
TI		 3131 err = create_controls(spec, pfxs[nums++], nid, 3);
3132 if (err < 0)
3133 return err;
1b290a51 3134 }
c21ca4a8
TI		 3135 nums = 0;
3136 for (i = 0; i < cfg->speaker_outs; i++) {
eb06ed8f
TI		 3137 static const char *pfxs[] = {
3138 "Speaker", "External Speaker", "Speaker2",
3139 };
c21ca4a8
TI		 3140 if (nums >= ARRAY_SIZE(pfxs))
3141 continue;
3142 nid = spec->speaker_dacs[i];
3143 if (!nid)
3144 continue;
3145 err = create_controls(spec, pfxs[nums++], nid, 3);
eb06ed8f
TI		 3146 if (err < 0)
3147 return err;
3148 }
c7d4b2fa
M		 3149 return 0;
3150}
3151
b22b4821 3152/* labels for mono mux outputs */
d0513fc6
MR		 3153static const char *stac92xx_mono_labels[4] = {
3154 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3155};
3156
3157/* create mono mux for mono out on capable codecs */
3158static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3159{
3160 struct sigmatel_spec *spec = codec->spec;
3161 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3162 int i, num_cons;
3163 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3164
3165 num_cons = snd_hda_get_connections(codec,
3166 spec->mono_nid,
3167 con_lst,
3168 HDA_MAX_NUM_INPUTS);
3169 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3170 return -EINVAL;
3171
3172 for (i = 0; i < num_cons; i++) {
3173 mono_mux->items[mono_mux->num_items].label =
3174 stac92xx_mono_labels[i];
3175 mono_mux->items[mono_mux->num_items].index = i;
3176 mono_mux->num_items++;
3177 }
09a99959
MR		 3178
3179 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3180 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3181}
3182
89385035
MR		 3183/* labels for amp mux outputs */
3184static const char *stac92xx_amp_labels[3] = {
4b33c767 3185 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3186};
3187
3188/* create amp out controls mux on capable codecs */
3189static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3190{
3191 struct sigmatel_spec *spec = codec->spec;
3192 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3193 int i, err;
3194
2a9c7816 3195 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3196 amp_mux->items[amp_mux->num_items].label =
3197 stac92xx_amp_labels[i];
3198 amp_mux->items[amp_mux->num_items].index = i;
3199 amp_mux->num_items++;
3200 }
3201
2a9c7816
MR		 3202 if (spec->num_amps > 1) {
3203 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3204 "Amp Selector Capture Switch", 0);
3205 if (err < 0)
3206 return err;
3207 }
89385035
MR		 3208 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3209 "Amp Capture Volume",
3210 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3211}
3212
3213
1cd2224c
MR		 3214/* create PC beep volume controls */
3215static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3216 hda_nid_t nid)
3217{
3218 struct sigmatel_spec *spec = codec->spec;
3219 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3220 int err;
3221
3222 /* check for mute support for the the amp */
3223 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3224 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3225 "PC Beep Playback Switch",
3226 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3227 if (err < 0)
3228 return err;
3229 }
3230
3231 /* check to see if there is volume support for the amp */
3232 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3233 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3234 "PC Beep Playback Volume",
3235 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3236 if (err < 0)
3237 return err;
3238 }
3239 return 0;
3240}
3241
4d4e9bb3
TI		 3242#ifdef CONFIG_SND_HDA_INPUT_BEEP
3243#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3244
3245static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3246 struct snd_ctl_elem_value *ucontrol)
3247{
3248 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3249 ucontrol->value.integer.value[0] = codec->beep->enabled;
3250 return 0;
3251}
3252
3253static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3254 struct snd_ctl_elem_value *ucontrol)
3255{
3256 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3257 int enabled = !!ucontrol->value.integer.value[0];
3258 if (codec->beep->enabled != enabled) {
3259 codec->beep->enabled = enabled;
3260 return 1;
3261 }
3262 return 0;
3263}
3264
3265static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3266 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3267 .info = stac92xx_dig_beep_switch_info,
3268 .get = stac92xx_dig_beep_switch_get,
3269 .put = stac92xx_dig_beep_switch_put,
3270};
3271
3272static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3273{
3274 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3275 0, "PC Beep Playback Switch", 0);
3276}
3277#endif
3278
4682eee0
MR		 3279static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3280{
3281 struct sigmatel_spec *spec = codec->spec;
3282 int wcaps, nid, i, err = 0;
3283
3284 for (i = 0; i < spec->num_muxes; i++) {
3285 nid = spec->mux_nids[i];
3286 wcaps = get_wcaps(codec, nid);
3287
3288 if (wcaps & AC_WCAP_OUT_AMP) {
3289 err = stac92xx_add_control_idx(spec,
3290 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3291 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3292 if (err < 0)
3293 return err;
3294 }
3295 }
3296 return 0;
3297};
3298
d9737751 3299static const char *stac92xx_spdif_labels[3] = {
65973632 3300 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3301};
3302
3303static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3304{
3305 struct sigmatel_spec *spec = codec->spec;
3306 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3307 const char **labels = spec->spdif_labels;
d9737751 3308 int i, num_cons;
65973632 3309 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3310
3311 num_cons = snd_hda_get_connections(codec,
3312 spec->smux_nids[0],
3313 con_lst,
3314 HDA_MAX_NUM_INPUTS);
65973632 3315 if (!num_cons)
d9737751
MR		 3316 return -EINVAL;
3317
65973632
MR		 3318 if (!labels)
3319 labels = stac92xx_spdif_labels;
3320
d9737751 3321 for (i = 0; i < num_cons; i++) {
65973632 3322 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3323 spdif_mux->items[spdif_mux->num_items].index = i;
3324 spdif_mux->num_items++;
3325 }
3326
3327 return 0;
3328}
3329
8b65727b 3330/* labels for dmic mux inputs */
ddc2cec4 3331static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3332 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3333 "Digital Mic 3", "Digital Mic 4"
3334};
3335
3336/* create playback/capture controls for input pins on dmic capable codecs */
3337static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3338 const struct auto_pin_cfg *cfg)
3339{
3340 struct sigmatel_spec *spec = codec->spec;
3341 struct hda_input_mux *dimux = &spec->private_dimux;
3342 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3343 int err, i, j;
3344 char name[32];
8b65727b
MP		 3345
3346 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3347 dimux->items[dimux->num_items].index = 0;
3348 dimux->num_items++;
3349
3350 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3351 hda_nid_t nid;
8b65727b
MP		 3352 int index;
3353 int num_cons;
0678accd 3354 unsigned int wcaps;
8b65727b
MP		 3355 unsigned int def_conf;
3356
3357 def_conf = snd_hda_codec_read(codec,
3358 spec->dmic_nids[i],
3359 0,
3360 AC_VERB_GET_CONFIG_DEFAULT,
3361 0);
3362 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3363 continue;
3364
0678accd 3365 nid = spec->dmic_nids[i];
8b65727b 3366 num_cons = snd_hda_get_connections(codec,
e1f0d669 3367 spec->dmux_nids[0],
8b65727b
MP		 3368 con_lst,
3369 HDA_MAX_NUM_INPUTS);
3370 for (j = 0; j < num_cons; j++)
0678accd 3371 if (con_lst[j] == nid) {
8b65727b
MP		 3372 index = j;
3373 goto found;
3374 }
3375 continue;
3376found:
d0513fc6
MR		 3377 wcaps = get_wcaps(codec, nid) &
3378 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3379
d0513fc6 3380 if (wcaps) {
0678accd
MR		 3381 sprintf(name, "%s Capture Volume",
3382 stac92xx_dmic_labels[dimux->num_items]);
3383
3384 err = stac92xx_add_control(spec,
3385 STAC_CTL_WIDGET_VOL,
3386 name,
d0513fc6
MR		 3387 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3388 (wcaps & AC_WCAP_OUT_AMP) ?
3389 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3390 if (err < 0)
3391 return err;
3392 }
3393
8b65727b
MP		 3394 dimux->items[dimux->num_items].label =
3395 stac92xx_dmic_labels[dimux->num_items];
3396 dimux->items[dimux->num_items].index = index;
3397 dimux->num_items++;
3398 }
3399
3400 return 0;
3401}
3402
c7d4b2fa
M		 3403/* create playback/capture controls for input pins */
3404static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3405{
3406 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3407 struct hda_input_mux *imux = &spec->private_imux;
3408 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3409 int i, j, k;
3410
3411 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3412 int index;
3413
3414 if (!cfg->input_pins[i])
3415 continue;
3416 index = -1;
3417 for (j = 0; j < spec->num_muxes; j++) {
3418 int num_cons;
3419 num_cons = snd_hda_get_connections(codec,
3420 spec->mux_nids[j],
3421 con_lst,
3422 HDA_MAX_NUM_INPUTS);
3423 for (k = 0; k < num_cons; k++)
3424 if (con_lst[k] == cfg->input_pins[i]) {
3425 index = k;
3426 goto found;
3427 }
c7d4b2fa 3428 }
314634bc
TI		 3429 continue;
3430 found:
3431 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3432 imux->items[imux->num_items].index = index;
3433 imux->num_items++;
c7d4b2fa
M		 3434 }
3435
7b043899 3436 if (imux->num_items) {
62fe78e9
SR		 3437 /*
3438 * Set the current input for the muxes.
3439 * The STAC9221 has two input muxes with identical source
3440 * NID lists. Hopefully this won't get confused.
3441 */
3442 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3443 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3444 AC_VERB_SET_CONNECT_SEL,
3445 imux->items[0].index);
62fe78e9
SR		 3446 }
3447 }
3448
c7d4b2fa
M		 3449 return 0;
3450}
3451
c7d4b2fa
M		 3452static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3453{
3454 struct sigmatel_spec *spec = codec->spec;
3455 int i;
3456
3457 for (i = 0; i < spec->autocfg.line_outs; i++) {
3458 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3459 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3460 }
3461}
3462
3463static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3464{
3465 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3466 int i;
c7d4b2fa 3467
eb06ed8f
TI		 3468 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3469 hda_nid_t pin;
3470 pin = spec->autocfg.hp_pins[i];
3471 if (pin) /* connect to front */
3472 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3473 }
3474 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3475 hda_nid_t pin;
3476 pin = spec->autocfg.speaker_pins[i];
3477 if (pin) /* connect to front */
3478 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3479 }
c7d4b2fa
M		 3480}
3481
3cc08dc6 3482static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3483{
3484 struct sigmatel_spec *spec = codec->spec;
3485 int err;
3486
8b65727b
MP		 3487 if ((err = snd_hda_parse_pin_def_config(codec,
3488 &spec->autocfg,
3489 spec->dmic_nids)) < 0)
c7d4b2fa 3490 return err;
82bc955f 3491 if (! spec->autocfg.line_outs)
869264c4 3492 return 0; /* can't find valid pin config */
19039bd0 3493
bcecd9bd
JZ		 3494 /* If we have no real line-out pin and multiple hp-outs, HPs should
3495 * be set up as multi-channel outputs.
3496 */
3497 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3498 spec->autocfg.hp_outs > 1) {
3499 /* Copy hp_outs to line_outs, backup line_outs in
3500 * speaker_outs so that the following routines can handle
3501 * HP pins as primary outputs.
3502 */
c21ca4a8 3503 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3504 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3505 sizeof(spec->autocfg.line_out_pins));
3506 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3507 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3508 sizeof(spec->autocfg.hp_pins));
3509 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3510 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3511 spec->autocfg.hp_outs = 0;
bcecd9bd 3512 }
09a99959 3513 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3514 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3515 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3516 u32 caps = query_amp_caps(codec,
3517 spec->autocfg.mono_out_pin, dir);
3518 hda_nid_t conn_list[1];
3519
3520 /* get the mixer node and then the mono mux if it exists */
3521 if (snd_hda_get_connections(codec,
3522 spec->autocfg.mono_out_pin, conn_list, 1) &&
3523 snd_hda_get_connections(codec, conn_list[0],
3524 conn_list, 1)) {
3525
3526 int wcaps = get_wcaps(codec, conn_list[0]);
3527 int wid_type = (wcaps & AC_WCAP_TYPE)
3528 >> AC_WCAP_TYPE_SHIFT;
3529 /* LR swap check, some stac925x have a mux that
3530 * changes the DACs output path instead of the
3531 * mono-mux path.
3532 */
3533 if (wid_type == AC_WID_AUD_SEL &&
3534 !(wcaps & AC_WCAP_LR_SWAP))
3535 spec->mono_nid = conn_list[0];
3536 }
d0513fc6
MR		 3537 if (dir) {
3538 hda_nid_t nid = spec->autocfg.mono_out_pin;
3539
3540 /* most mono outs have a least a mute/unmute switch */
3541 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3542 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3543 "Mono Playback Switch",
3544 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3545 if (err < 0)
3546 return err;
d0513fc6
MR		 3547 /* check for volume support for the amp */
3548 if ((caps & AC_AMPCAP_NUM_STEPS)
3549 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3550 err = stac92xx_add_control(spec,
3551 STAC_CTL_WIDGET_VOL,
3552 "Mono Playback Volume",
3553 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3554 if (err < 0)
3555 return err;
3556 }
09a99959
MR		 3557 }
3558
3559 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3560 AC_PINCTL_OUT_EN);
3561 }
bcecd9bd 3562
c21ca4a8
TI		 3563 if (!spec->multiout.num_dacs) {
3564 err = stac92xx_auto_fill_dac_nids(codec);
3565 if (err < 0)
19039bd0 3566 return err;
c21ca4a8 3567 }
c7d4b2fa 3568
0fb87bb4
ML		 3569 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3570
3571 if (err < 0)
3572 return err;
3573
1cd2224c
MR		 3574 /* setup analog beep controls */
3575 if (spec->anabeep_nid > 0) {
3576 err = stac92xx_auto_create_beep_ctls(codec,
3577 spec->anabeep_nid);
3578 if (err < 0)
3579 return err;
3580 }
3581
3582 /* setup digital beep controls and input device */
3583#ifdef CONFIG_SND_HDA_INPUT_BEEP
3584 if (spec->digbeep_nid > 0) {
3585 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3586 unsigned int caps;
1cd2224c
MR		 3587
3588 err = stac92xx_auto_create_beep_ctls(codec, nid);
3589 if (err < 0)
3590 return err;
3591 err = snd_hda_attach_beep_device(codec, nid);
3592 if (err < 0)
3593 return err;
4d4e9bb3
TI		 3594 /* if no beep switch is available, make its own one */
3595 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3596 if (codec->beep &&
3597 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3598 err = stac92xx_beep_switch_ctl(codec);
3599 if (err < 0)
3600 return err;
3601 }
1cd2224c
MR		 3602 }
3603#endif
3604
0fb87bb4
ML		 3605 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3606
3607 if (err < 0)
3608 return err;
3609
3610 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3611
3612 if (err < 0)
c7d4b2fa
M		 3613 return err;
3614
b22b4821
MR		 3615 if (spec->mono_nid > 0) {
3616 err = stac92xx_auto_create_mono_output_ctls(codec);
3617 if (err < 0)
3618 return err;
3619 }
2a9c7816 3620 if (spec->num_amps > 0) {
89385035
MR		 3621 err = stac92xx_auto_create_amp_output_ctls(codec);
3622 if (err < 0)
3623 return err;
3624 }
2a9c7816 3625 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3626 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3627 &spec->autocfg)) < 0)
3628 return err;
4682eee0
MR		 3629 if (spec->num_muxes > 0) {
3630 err = stac92xx_auto_create_mux_input_ctls(codec);
3631 if (err < 0)
3632 return err;
3633 }
d9737751
MR		 3634 if (spec->num_smuxes > 0) {
3635 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3636 if (err < 0)
3637 return err;
3638 }
8b65727b 3639
c7d4b2fa 3640 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3641 if (spec->multiout.max_channels > 2)
c7d4b2fa 3642 spec->surr_switch = 1;
c7d4b2fa 3643
82bc955f 3644 if (spec->autocfg.dig_out_pin)
3cc08dc6 3645 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3646 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3647 spec->dig_in_nid = dig_in;
c7d4b2fa 3648
603c4019
TI		 3649 if (spec->kctls.list)
3650 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3651
3652 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 3653 if (!spec->dinput_mux)
3654 spec->dinput_mux = &spec->private_dimux;
d9737751 3655 spec->sinput_mux = &spec->private_smux;
b22b4821 3656 spec->mono_mux = &spec->private_mono_mux;
89385035 3657 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3658 return 1;
3659}
3660
82bc955f
TI		 3661/* add playback controls for HP output */
3662static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3663 struct auto_pin_cfg *cfg)
3664{
3665 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3666 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3667 unsigned int wid_caps;
3668
3669 if (! pin)
3670 return 0;
3671
3672 wid_caps = get_wcaps(codec, pin);
505cb341 3673 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3674 spec->hp_detect = 1;
82bc955f
TI		 3675
3676 return 0;
3677}
3678
160ea0dc
RF		 3679/* add playback controls for LFE output */
3680static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3681 struct auto_pin_cfg *cfg)
3682{
3683 struct sigmatel_spec *spec = codec->spec;
3684 int err;
3685 hda_nid_t lfe_pin = 0x0;
3686 int i;
3687
3688 /*
3689 * search speaker outs and line outs for a mono speaker pin
3690 * with an amp. If one is found, add LFE controls
3691 * for it.
3692 */
3693 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3694 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3695 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3696 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3697 if (wcaps == AC_WCAP_OUT_AMP)
3698 /* found a mono speaker with an amp, must be lfe */
3699 lfe_pin = pin;
3700 }
3701
3702 /* if speaker_outs is 0, then speakers may be in line_outs */
3703 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3704 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3705 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3706 unsigned int defcfg;
8b551785 3707 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3708 AC_VERB_GET_CONFIG_DEFAULT,
3709 0x00);
8b551785 3710 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3711 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3712 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3713 if (wcaps == AC_WCAP_OUT_AMP)
3714 /* found a mono speaker with an amp,
3715 must be lfe */
3716 lfe_pin = pin;
3717 }
3718 }
3719 }
3720
3721 if (lfe_pin) {
eb06ed8f 3722 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3723 if (err < 0)
3724 return err;
3725 }
3726
3727 return 0;
3728}
3729
c7d4b2fa
M		 3730static int stac9200_parse_auto_config(struct hda_codec *codec)
3731{
3732 struct sigmatel_spec *spec = codec->spec;
3733 int err;
3734
df694daa 3735 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3736 return err;
3737
3738 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3739 return err;
3740
82bc955f
TI		 3741 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3742 return err;
3743
160ea0dc
RF		 3744 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3745 return err;
3746
355a0ec4
TI		 3747 if (spec->num_muxes > 0) {
3748 err = stac92xx_auto_create_mux_input_ctls(codec);
3749 if (err < 0)
3750 return err;
3751 }
3752
82bc955f 3753 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3754 spec->multiout.dig_out_nid = 0x05;
82bc955f 3755 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3756 spec->dig_in_nid = 0x04;
c7d4b2fa 3757
603c4019
TI		 3758 if (spec->kctls.list)
3759 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3760
3761 spec->input_mux = &spec->private_imux;
8b65727b 3762 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3763
3764 return 1;
3765}
3766
62fe78e9
SR		 3767/*
3768 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3769 * funky external mute control using GPIO pins.
3770 */
3771
76e1ddfb 3772static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3773 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3774{
3775 unsigned int gpiostate, gpiomask, gpiodir;
3776
3777 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3778 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3779 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3780
3781 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3782 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3783 gpiomask |= mask;
62fe78e9
SR		 3784
3785 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3786 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3787 gpiodir |= dir_mask;
62fe78e9 3788
76e1ddfb 3789 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3790 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3791
3792 snd_hda_codec_write(codec, codec->afg, 0,
3793 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3794 snd_hda_codec_read(codec, codec->afg, 0,
3795 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3796
3797 msleep(1);
3798
76e1ddfb
TI		 3799 snd_hda_codec_read(codec, codec->afg, 0,
3800 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3801}
3802
74aeaabc
MR		 3803static int stac92xx_add_jack(struct hda_codec *codec,
3804 hda_nid_t nid, int type)
3805{
e4973e1e 3806#ifdef CONFIG_SND_JACK
74aeaabc
MR		 3807 struct sigmatel_spec *spec = codec->spec;
3808 struct sigmatel_jack *jack;
3809 int def_conf = snd_hda_codec_read(codec, nid,
3810 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3811 int connectivity = get_defcfg_connect(def_conf);
3812 char name[32];
3813
3814 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3815 return 0;
3816
3817 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3818 jack = snd_array_new(&spec->jacks);
3819 if (!jack)
3820 return -ENOMEM;
3821 jack->nid = nid;
3822 jack->type = type;
3823
3824 sprintf(name, "%s at %s %s Jack",
3825 snd_hda_get_jack_type(def_conf),
3826 snd_hda_get_jack_connectivity(def_conf),
3827 snd_hda_get_jack_location(def_conf));
3828
3829 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI		 3830#else
3831 return 0;
3832#endif
74aeaabc
MR		 3833}
3834
c6e4c666
TI		 3835static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3836 unsigned char type, int data)
74aeaabc
MR		 3837{
3838 struct sigmatel_event *event;
3839
3840 snd_array_init(&spec->events, sizeof(*event), 32);
3841 event = snd_array_new(&spec->events);
3842 if (!event)
3843 return -ENOMEM;
3844 event->nid = nid;
c6e4c666
TI		 3845 event->type = type;
3846 event->tag = spec->events.used;
74aeaabc
MR		 3847 event->data = data;
3848
c6e4c666 3849 return event->tag;
74aeaabc
MR		 3850}
3851
c6e4c666
TI		 3852static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3853 hda_nid_t nid, unsigned char type)
74aeaabc
MR		 3854{
3855 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 3856 struct sigmatel_event *event = spec->events.list;
3857 int i;
3858
3859 for (i = 0; i < spec->events.used; i++, event++) {
3860 if (event->nid == nid && event->type == type)
3861 return event;
74aeaabc 3862 }
c6e4c666 3863 return NULL;
74aeaabc
MR		 3864}
3865
c6e4c666
TI		 3866static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3867 unsigned char tag)
314634bc 3868{
c6e4c666
TI		 3869 struct sigmatel_spec *spec = codec->spec;
3870 struct sigmatel_event *event = spec->events.list;
3871 int i;
3872
3873 for (i = 0; i < spec->events.used; i++, event++) {
3874 if (event->tag == tag)
3875 return event;
74aeaabc 3876 }
c6e4c666
TI		 3877 return NULL;
3878}
3879
3880static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3881 unsigned int type)
3882{
3883 struct sigmatel_event *event;
3884 int tag;
3885
3886 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3887 return;
3888 event = stac_get_event(codec, nid, type);
3889 if (event)
3890 tag = event->tag;
3891 else
3892 tag = stac_add_event(codec->spec, nid, type, 0);
3893 if (tag < 0)
3894 return;
3895 snd_hda_codec_write_cache(codec, nid, 0,
3896 AC_VERB_SET_UNSOLICITED_ENABLE,
3897 AC_USRSP_EN | tag);
314634bc
TI		 3898}
3899
a64135a2
MR		 3900static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3901{
3902 int i;
3903 for (i = 0; i < cfg->hp_outs; i++)
3904 if (cfg->hp_pins[i] == nid)
3905 return 1; /* nid is a HP-Out */
3906
3907 return 0; /* nid is not a HP-Out */
3908};
3909
b76c850f
MR		 3910static void stac92xx_power_down(struct hda_codec *codec)
3911{
3912 struct sigmatel_spec *spec = codec->spec;
3913
3914 /* power down inactive DACs */
3915 hda_nid_t *dac;
3916 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 3917 if (!check_all_dac_nids(spec, *dac))
8c2f767b 3918 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 3919 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3920}
3921
f73d3585
TI		 3922static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3923 int enable);
3924
c7d4b2fa
M		 3925static int stac92xx_init(struct hda_codec *codec)
3926{
3927 struct sigmatel_spec *spec = codec->spec;
82bc955f 3928 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3929 unsigned int gpio;
e4973e1e 3930 int i;
c7d4b2fa 3931
c7d4b2fa
M		 3932 snd_hda_sequence_write(codec, spec->init);
3933
8daaaa97
MR		 3934 /* power down adcs initially */
3935 if (spec->powerdown_adcs)
3936 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 3937 snd_hda_codec_write(codec,
8daaaa97
MR		 3938 spec->adc_nids[i], 0,
3939 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI		 3940
3941 /* set up GPIO */
3942 gpio = spec->gpio_data;
3943 /* turn on EAPD statically when spec->eapd_switch isn't set.
3944 * otherwise, unsol event will turn it on/off dynamically
3945 */
3946 if (!spec->eapd_switch)
3947 gpio |= spec->eapd_mask;
3948 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3949
82bc955f
TI		 3950 /* set up pins */
3951 if (spec->hp_detect) {
505cb341 3952 /* Enable unsolicited responses on the HP widget */
74aeaabc 3953 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 3954 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 3955 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 3956 }
0a07acaf
TI		 3957 /* force to enable the first line-out; the others are set up
3958 * in unsol_event
3959 */
3960 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 3961 AC_PINCTL_OUT_EN);
82bc955f 3962 /* fake event to set up pins */
c6e4c666
TI		 3963 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
3964 STAC_HP_EVENT);
82bc955f
TI		 3965 } else {
3966 stac92xx_auto_init_multi_out(codec);
3967 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 3968 for (i = 0; i < cfg->hp_outs; i++)
3969 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f
TI		 3970 }
3971 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3972 hda_nid_t nid = cfg->input_pins[i];
3973 if (nid) {
12dde4c6 3974 unsigned int pinctl, conf;
4f1e6bc3
TI		 3975 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3976 /* for mic pins, force to initialize */
3977 pinctl = stac92xx_get_vref(codec, nid);
12dde4c6
TI		 3978 pinctl |= AC_PINCTL_IN_EN;
3979 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI		 3980 } else {
3981 pinctl = snd_hda_codec_read(codec, nid, 0,
3982 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3983 /* if PINCTL already set then skip */
12dde4c6
TI		 3984 if (!(pinctl & AC_PINCTL_IN_EN)) {
3985 pinctl |= AC_PINCTL_IN_EN;
3986 stac92xx_auto_set_pinctl(codec, nid,
3987 pinctl);
3988 }
3989 }
3990 conf = snd_hda_codec_read(codec, nid, 0,
3991 AC_VERB_GET_CONFIG_DEFAULT, 0);
3992 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
3993 enable_pin_detect(codec, nid,
3994 STAC_INSERT_EVENT);
3995 stac_issue_unsol_event(codec, nid,
3996 STAC_INSERT_EVENT);
4f1e6bc3 3997 }
c960a03b 3998 }
82bc955f 3999 }
a64135a2
MR		 4000 for (i = 0; i < spec->num_dmics; i++)
4001 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4002 AC_PINCTL_IN_EN);
f73d3585
TI		 4003 if (cfg->dig_out_pin)
4004 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
4005 AC_PINCTL_OUT_EN);
4006 if (cfg->dig_in_pin)
4007 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4008 AC_PINCTL_IN_EN);
a64135a2 4009 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 4010 hda_nid_t nid = spec->pwr_nids[i];
4011 int pinctl, def_conf;
f73d3585 4012
eb632128
TI		 4013 /* power on when no jack detection is available */
4014 if (!spec->hp_detect) {
4015 stac_toggle_power_map(codec, nid, 1);
4016 continue;
4017 }
4018
4019 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI		 4020 continue; /* already has an unsol event */
4021
4022 pinctl = snd_hda_codec_read(codec, nid, 0,
4023 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4024 /* outputs are only ports capable of power management
4025 * any attempts on powering down a input port cause the
4026 * referenced VREF to act quirky.
4027 */
eb632128
TI		 4028 if (pinctl & AC_PINCTL_IN_EN) {
4029 stac_toggle_power_map(codec, nid, 1);
a64135a2 4030 continue;
eb632128 4031 }
f73d3585
TI		 4032 def_conf = snd_hda_codec_read(codec, nid, 0,
4033 AC_VERB_GET_CONFIG_DEFAULT, 0);
4034 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 4035 /* skip any ports that don't have jacks since presence
4036 * detection is useless */
f73d3585
TI		 4037 if (def_conf != AC_JACK_PORT_COMPLEX) {
4038 if (def_conf != AC_JACK_PORT_NONE)
4039 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4040 continue;
f73d3585 4041 }
12dde4c6
TI		 4042 if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) {
4043 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
4044 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
4045 }
a64135a2 4046 }
b76c850f
MR		 4047 if (spec->dac_list)
4048 stac92xx_power_down(codec);
c7d4b2fa
M		 4049 return 0;
4050}
4051
74aeaabc
MR		 4052static void stac92xx_free_jacks(struct hda_codec *codec)
4053{
e4973e1e 4054#ifdef CONFIG_SND_JACK
b94d3539 4055 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4056 struct sigmatel_spec *spec = codec->spec;
b94d3539 4057 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR		 4058 struct sigmatel_jack *jacks = spec->jacks.list;
4059 int i;
4060 for (i = 0; i < spec->jacks.used; i++)
4061 snd_device_free(codec->bus->card, &jacks[i].jack);
4062 }
4063 snd_array_free(&spec->jacks);
e4973e1e 4064#endif
74aeaabc
MR		 4065}
4066
603c4019
TI		 4067static void stac92xx_free_kctls(struct hda_codec *codec)
4068{
4069 struct sigmatel_spec *spec = codec->spec;
4070
4071 if (spec->kctls.list) {
4072 struct snd_kcontrol_new *kctl = spec->kctls.list;
4073 int i;
4074 for (i = 0; i < spec->kctls.used; i++)
4075 kfree(kctl[i].name);
4076 }
4077 snd_array_free(&spec->kctls);
4078}
4079
2f2f4251
M		 4080static void stac92xx_free(struct hda_codec *codec)
4081{
c7d4b2fa 4082 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4083
4084 if (! spec)
4085 return;
4086
af9f341a 4087 kfree(spec->pin_configs);
74aeaabc
MR		 4088 stac92xx_free_jacks(codec);
4089 snd_array_free(&spec->events);
11b44bbd 4090
c7d4b2fa 4091 kfree(spec);
1cd2224c 4092 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4093}
4094
4e55096e
M		 4095static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4096 unsigned int flag)
4097{
4098 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4099 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4100
f9acba43
TI		 4101 if (pin_ctl & AC_PINCTL_IN_EN) {
4102 /*
4103 * we need to check the current set-up direction of
4104 * shared input pins since they can be switched via
4105 * "xxx as Output" mixer switch
4106 */
4107 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4108 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4109 return;
4110 }
4111
7b043899
SL		 4112 /* if setting pin direction bits, clear the current
4113 direction bits first */
4114 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4115 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4116
82beb8fd 4117 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4118 AC_VERB_SET_PIN_WIDGET_CONTROL,
4119 pin_ctl | flag);
4120}
4121
4122static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4123 unsigned int flag)
4124{
4125 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4126 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 4127 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4128 AC_VERB_SET_PIN_WIDGET_CONTROL,
4129 pin_ctl & ~flag);
4130}
4131
e6e3ea25 4132static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4133{
4134 if (!nid)
4135 return 0;
4136 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI		 4137 & (1 << 31))
4138 return 1;
314634bc
TI		 4139 return 0;
4140}
4141
d7a89436
TI		 4142/* return non-zero if the hp-pin of the given array index isn't
4143 * a jack-detection target
4144 */
4145static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4146{
4147 struct auto_pin_cfg *cfg = &spec->autocfg;
4148
4149 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4150 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4151 return 1;
c21ca4a8 4152 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4153 return 1;
4154 /* ignore if the pin is set as line-out */
4155 if (cfg->hp_pins[i] == spec->hp_switch)
4156 return 1;
4157 return 0;
4158}
4159
c6e4c666 4160static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4161{
4162 struct sigmatel_spec *spec = codec->spec;
4163 struct auto_pin_cfg *cfg = &spec->autocfg;
4164 int i, presence;
4165
eb06ed8f 4166 presence = 0;
4fe5195c
MR		 4167 if (spec->gpio_mute)
4168 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4169 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4170
eb06ed8f 4171 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4172 if (presence)
4173 break;
d7a89436
TI		 4174 if (no_hp_sensing(spec, i))
4175 continue;
e6e3ea25
TI		 4176 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4177 if (presence) {
4178 unsigned int pinctl;
4179 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4180 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4181 if (pinctl & AC_PINCTL_IN_EN)
4182 presence = 0; /* mic- or line-input */
4183 }
eb06ed8f 4184 }
4e55096e
M		 4185
4186 if (presence) {
d7a89436 4187 /* disable lineouts */
7c2ba97b 4188 if (spec->hp_switch)
d7a89436
TI		 4189 stac92xx_reset_pinctl(codec, spec->hp_switch,
4190 AC_PINCTL_OUT_EN);
4e55096e
M		 4191 for (i = 0; i < cfg->line_outs; i++)
4192 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4193 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4194 for (i = 0; i < cfg->speaker_outs; i++)
4195 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4196 AC_PINCTL_OUT_EN);
c0cea0d0 4197 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4198 stac_gpio_set(codec, spec->gpio_mask,
4199 spec->gpio_dir, spec->gpio_data &
4200 ~spec->eapd_mask);
4e55096e 4201 } else {
d7a89436 4202 /* enable lineouts */
7c2ba97b 4203 if (spec->hp_switch)
d7a89436
TI		 4204 stac92xx_set_pinctl(codec, spec->hp_switch,
4205 AC_PINCTL_OUT_EN);
4e55096e
M		 4206 for (i = 0; i < cfg->line_outs; i++)
4207 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4208 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4209 for (i = 0; i < cfg->speaker_outs; i++)
4210 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4211 AC_PINCTL_OUT_EN);
c0cea0d0 4212 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4213 stac_gpio_set(codec, spec->gpio_mask,
4214 spec->gpio_dir, spec->gpio_data |
4215 spec->eapd_mask);
4e55096e 4216 }
d7a89436
TI		 4217 /* toggle hp outs */
4218 for (i = 0; i < cfg->hp_outs; i++) {
4219 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4220 if (no_hp_sensing(spec, i))
4221 continue;
4222 if (presence)
4223 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
4224 else
4225 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
4226 }
4e55096e
M		 4227}
4228
f73d3585
TI		 4229static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4230 int enable)
a64135a2
MR		 4231{
4232 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4233 unsigned int idx, val;
4234
4235 for (idx = 0; idx < spec->num_pwrs; idx++) {
4236 if (spec->pwr_nids[idx] == nid)
4237 break;
4238 }
4239 if (idx >= spec->num_pwrs)
4240 return;
d0513fc6
MR		 4241
4242 /* several codecs have two power down bits */
4243 if (spec->pwr_mapping)
4244 idx = spec->pwr_mapping[idx];
4245 else
4246 idx = 1 << idx;
a64135a2 4247
f73d3585
TI		 4248 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4249 if (enable)
a64135a2
MR		 4250 val &= ~idx;
4251 else
4252 val |= idx;
4253
4254 /* power down unused output ports */
4255 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4256}
4257
f73d3585
TI		 4258static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4259{
e6e3ea25 4260 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4261}
a64135a2 4262
74aeaabc
MR		 4263static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4264{
4265 struct sigmatel_spec *spec = codec->spec;
4266 struct sigmatel_jack *jacks = spec->jacks.list;
4267
4268 if (jacks) {
4269 int i;
4270 for (i = 0; i < spec->jacks.used; i++) {
4271 if (jacks->nid == nid) {
4272 unsigned int pin_ctl =
4273 snd_hda_codec_read(codec, nid,
4274 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4275 0x00);
4276 int type = jacks->type;
4277 if (type == (SND_JACK_LINEOUT
4278 | SND_JACK_HEADPHONE))
4279 type = (pin_ctl & AC_PINCTL_HP_EN)
4280 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4281 snd_jack_report(jacks->jack,
e6e3ea25 4282 get_pin_presence(codec, nid)
74aeaabc
MR		 4283 ? type : 0);
4284 }
4285 jacks++;
4286 }
4287 }
4288}
a64135a2 4289
c6e4c666
TI		 4290static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4291 unsigned char type)
4292{
4293 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4294 if (!event)
4295 return;
4296 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4297}
4298
314634bc
TI		 4299static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4300{
a64135a2 4301 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4302 struct sigmatel_event *event;
4303 int tag, data;
a64135a2 4304
c6e4c666
TI		 4305 tag = (res >> 26) & 0x7f;
4306 event = stac_get_event_from_tag(codec, tag);
4307 if (!event)
4308 return;
4309
4310 switch (event->type) {
314634bc 4311 case STAC_HP_EVENT:
c6e4c666 4312 stac92xx_hp_detect(codec);
a64135a2 4313 /* fallthru */
74aeaabc 4314 case STAC_INSERT_EVENT:
a64135a2 4315 case STAC_PWR_EVENT:
c6e4c666
TI		 4316 if (spec->num_pwrs > 0)
4317 stac92xx_pin_sense(codec, event->nid);
4318 stac92xx_report_jack(codec, event->nid);
72474be6 4319 break;
c6e4c666
TI		 4320 case STAC_VREF_EVENT:
4321 data = snd_hda_codec_read(codec, codec->afg, 0,
4322 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4323 /* toggle VREF state based on GPIOx status */
4324 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4325 !!(data & (1 << event->data)));
72474be6 4326 break;
314634bc
TI		 4327 }
4328}
4329
2d34e1b3
TI		 4330#ifdef CONFIG_PROC_FS
4331static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4332 struct hda_codec *codec, hda_nid_t nid)
4333{
4334 if (nid == codec->afg)
4335 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4336 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4337}
4338
4339static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4340 struct hda_codec *codec,
4341 unsigned int verb)
4342{
4343 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4344 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4345}
4346
4347/* stac92hd71bxx, stac92hd73xx */
4348static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4349 struct hda_codec *codec, hda_nid_t nid)
4350{
4351 stac92hd_proc_hook(buffer, codec, nid);
4352 if (nid == codec->afg)
4353 analog_loop_proc_hook(buffer, codec, 0xfa0);
4354}
4355
4356static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4357 struct hda_codec *codec, hda_nid_t nid)
4358{
4359 if (nid == codec->afg)
4360 analog_loop_proc_hook(buffer, codec, 0xfe0);
4361}
4362
4363static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4364 struct hda_codec *codec, hda_nid_t nid)
4365{
4366 if (nid == codec->afg)
4367 analog_loop_proc_hook(buffer, codec, 0xfeb);
4368}
4369#else
4370#define stac92hd_proc_hook NULL
4371#define stac92hd7x_proc_hook NULL
4372#define stac9205_proc_hook NULL
4373#define stac927x_proc_hook NULL
4374#endif
4375
cb53c626 4376#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4377static int stac92xx_resume(struct hda_codec *codec)
4378{
dc81bed1
TI		 4379 struct sigmatel_spec *spec = codec->spec;
4380
11b44bbd 4381 stac92xx_set_config_regs(codec);
2c885878 4382 stac92xx_init(codec);
82beb8fd
TI		 4383 snd_hda_codec_resume_amp(codec);
4384 snd_hda_codec_resume_cache(codec);
2c885878 4385 /* fake event to set up pins again to override cached values */
dc81bed1 4386 if (spec->hp_detect)
c6e4c666
TI		 4387 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4388 STAC_HP_EVENT);
ff6fdc37
M		 4389 return 0;
4390}
c6798d2b
MR		 4391
4392static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4393{
4394 struct sigmatel_spec *spec = codec->spec;
4395 if (spec->eapd_mask)
4396 stac_gpio_set(codec, spec->gpio_mask,
4397 spec->gpio_dir, spec->gpio_data &
4398 ~spec->eapd_mask);
4399 return 0;
4400}
ff6fdc37
M		 4401#endif
4402
2f2f4251
M		 4403static struct hda_codec_ops stac92xx_patch_ops = {
4404 .build_controls = stac92xx_build_controls,
4405 .build_pcms = stac92xx_build_pcms,
4406 .init = stac92xx_init,
4407 .free = stac92xx_free,
4e55096e 4408 .unsol_event = stac92xx_unsol_event,
cb53c626 4409#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4410 .suspend = stac92xx_suspend,
ff6fdc37
M		 4411 .resume = stac92xx_resume,
4412#endif
2f2f4251
M		 4413};
4414
4415static int patch_stac9200(struct hda_codec *codec)
4416{
4417 struct sigmatel_spec *spec;
c7d4b2fa 4418 int err;
2f2f4251 4419
e560d8d8 4420 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4421 if (spec == NULL)
4422 return -ENOMEM;
4423
4424 codec->spec = spec;
a4eed138 4425 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4426 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4427 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4428 stac9200_models,
4429 stac9200_cfg_tbl);
11b44bbd
RF		 4430 if (spec->board_config < 0) {
4431 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4432 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4433 } else
4434 err = stac_save_pin_cfgs(codec,
4435 stac9200_brd_tbl[spec->board_config]);
4436 if (err < 0) {
4437 stac92xx_free(codec);
4438 return err;
403d1944 4439 }
2f2f4251
M		 4440
4441 spec->multiout.max_channels = 2;
4442 spec->multiout.num_dacs = 1;
4443 spec->multiout.dac_nids = stac9200_dac_nids;
4444 spec->adc_nids = stac9200_adc_nids;
4445 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4446 spec->num_muxes = 1;
8b65727b 4447 spec->num_dmics = 0;
9e05b7a3 4448 spec->num_adcs = 1;
a64135a2 4449 spec->num_pwrs = 0;
c7d4b2fa 4450
58eec423
MCC		 4451 if (spec->board_config == STAC_9200_M4 ||
4452 spec->board_config == STAC_9200_M4_2 ||
bf277785 4453 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4454 spec->init = stac9200_eapd_init;
4455 else
4456 spec->init = stac9200_core_init;
2f2f4251 4457 spec->mixer = stac9200_mixer;
c7d4b2fa 4458
117f257d
TI		 4459 if (spec->board_config == STAC_9200_PANASONIC) {
4460 spec->gpio_mask = spec->gpio_dir = 0x09;
4461 spec->gpio_data = 0x00;
4462 }
4463
c7d4b2fa
M		 4464 err = stac9200_parse_auto_config(codec);
4465 if (err < 0) {
4466 stac92xx_free(codec);
4467 return err;
4468 }
2f2f4251
M		 4469
4470 codec->patch_ops = stac92xx_patch_ops;
4471
4472 return 0;
4473}
4474
8e21c34c
TD		 4475static int patch_stac925x(struct hda_codec *codec)
4476{
4477 struct sigmatel_spec *spec;
4478 int err;
4479
4480 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4481 if (spec == NULL)
4482 return -ENOMEM;
4483
4484 codec->spec = spec;
a4eed138 4485 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4486 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 4487
4488 /* Check first for codec ID */
4489 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4490 STAC_925x_MODELS,
4491 stac925x_models,
4492 stac925x_codec_id_cfg_tbl);
4493
4494 /* Now checks for PCI ID, if codec ID is not found */
4495 if (spec->board_config < 0)
4496 spec->board_config = snd_hda_check_board_config(codec,
4497 STAC_925x_MODELS,
8e21c34c
TD		 4498 stac925x_models,
4499 stac925x_cfg_tbl);
9e507abd 4500 again:
8e21c34c 4501 if (spec->board_config < 0) {
9cb36c2a 4502 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2c11f955 4503 "using BIOS defaults\n");
8e21c34c 4504 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4505 } else
4506 err = stac_save_pin_cfgs(codec,
4507 stac925x_brd_tbl[spec->board_config]);
4508 if (err < 0) {
4509 stac92xx_free(codec);
4510 return err;
8e21c34c
TD		 4511 }
4512
4513 spec->multiout.max_channels = 2;
4514 spec->multiout.num_dacs = 1;
4515 spec->multiout.dac_nids = stac925x_dac_nids;
4516 spec->adc_nids = stac925x_adc_nids;
4517 spec->mux_nids = stac925x_mux_nids;
4518 spec->num_muxes = 1;
9e05b7a3 4519 spec->num_adcs = 1;
a64135a2 4520 spec->num_pwrs = 0;
2c11f955
TD		 4521 switch (codec->vendor_id) {
4522 case 0x83847632: /* STAC9202 */
4523 case 0x83847633: /* STAC9202D */
4524 case 0x83847636: /* STAC9251 */
4525 case 0x83847637: /* STAC9251D */
f6e9852a 4526 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4527 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4528 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4529 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4530 break;
4531 default:
4532 spec->num_dmics = 0;
4533 break;
4534 }
8e21c34c
TD		 4535
4536 spec->init = stac925x_core_init;
4537 spec->mixer = stac925x_mixer;
4538
4539 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4540 if (!err) {
4541 if (spec->board_config < 0) {
4542 printk(KERN_WARNING "hda_codec: No auto-config is "
4543 "available, default to model=ref\n");
4544 spec->board_config = STAC_925x_REF;
4545 goto again;
4546 }
4547 err = -EINVAL;
4548 }
8e21c34c
TD		 4549 if (err < 0) {
4550 stac92xx_free(codec);
4551 return err;
4552 }
4553
4554 codec->patch_ops = stac92xx_patch_ops;
4555
4556 return 0;
4557}
4558
e1f0d669
MR		 4559static struct hda_input_mux stac92hd73xx_dmux = {
4560 .num_items = 4,
4561 .items = {
4562 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4563 { "Digital Mic 1", 0x09 },
4564 { "Digital Mic 2", 0x0a },
2a9c7816 4565 { "CD", 0x08 },
e1f0d669
MR		 4566 }
4567};
4568
4569static int patch_stac92hd73xx(struct hda_codec *codec)
4570{
4571 struct sigmatel_spec *spec;
4572 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4573 int err = 0;
c21ca4a8 4574 int num_dacs;
e1f0d669
MR		 4575
4576 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4577 if (spec == NULL)
4578 return -ENOMEM;
4579
4580 codec->spec = spec;
e99d32b3 4581 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4582 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4583 spec->pin_nids = stac92hd73xx_pin_nids;
4584 spec->board_config = snd_hda_check_board_config(codec,
4585 STAC_92HD73XX_MODELS,
4586 stac92hd73xx_models,
4587 stac92hd73xx_cfg_tbl);
4588again:
4589 if (spec->board_config < 0) {
4590 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4591 " STAC92HD73XX, using BIOS defaults\n");
4592 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4593 } else
4594 err = stac_save_pin_cfgs(codec,
4595 stac92hd73xx_brd_tbl[spec->board_config]);
4596 if (err < 0) {
4597 stac92xx_free(codec);
4598 return err;
e1f0d669
MR		 4599 }
4600
c21ca4a8 4601 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 4602 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4603
c21ca4a8 4604 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 4605 printk(KERN_WARNING "hda_codec: Could not determine "
4606 "number of channels defaulting to DAC count\n");
c21ca4a8 4607 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4608 }
c21ca4a8 4609 switch (num_dacs) {
e1f0d669
MR		 4610 case 0x3: /* 6 Channel */
4611 spec->mixer = stac92hd73xx_6ch_mixer;
4612 spec->init = stac92hd73xx_6ch_core_init;
4613 break;
4614 case 0x4: /* 8 Channel */
e1f0d669
MR		 4615 spec->mixer = stac92hd73xx_8ch_mixer;
4616 spec->init = stac92hd73xx_8ch_core_init;
4617 break;
4618 case 0x5: /* 10 Channel */
e1f0d669
MR		 4619 spec->mixer = stac92hd73xx_10ch_mixer;
4620 spec->init = stac92hd73xx_10ch_core_init;
c21ca4a8
TI		 4621 }
4622 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4623
e1f0d669
MR		 4624 spec->aloopback_mask = 0x01;
4625 spec->aloopback_shift = 8;
4626
1cd2224c 4627 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4628 spec->mux_nids = stac92hd73xx_mux_nids;
4629 spec->adc_nids = stac92hd73xx_adc_nids;
4630 spec->dmic_nids = stac92hd73xx_dmic_nids;
4631 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4632 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4633 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4634 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4635
4636 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4637 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4638 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4639 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4640 sizeof(stac92hd73xx_dmux));
4641
a7662640 4642 switch (spec->board_config) {
6b3ab21e 4643 case STAC_DELL_EQ:
d654a660 4644 spec->init = dell_eq_core_init;
6b3ab21e 4645 /* fallthru */
661cd8fb
TI		 4646 case STAC_DELL_M6_AMIC:
4647 case STAC_DELL_M6_DMIC:
4648 case STAC_DELL_M6_BOTH:
2a9c7816 4649 spec->num_smuxes = 0;
2a9c7816
MR		 4650 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4651 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4652 spec->eapd_switch = 0;
2a9c7816 4653 spec->num_amps = 1;
6b3ab21e 4654
c21ca4a8 4655 if (spec->board_config != STAC_DELL_EQ)
6b3ab21e 4656 spec->init = dell_m6_core_init;
661cd8fb
TI		 4657 switch (spec->board_config) {
4658 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR		 4659 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4660 spec->num_dmics = 0;
2a9c7816 4661 spec->private_dimux.num_items = 1;
a7662640 4662 break;
661cd8fb 4663 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR		 4664 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4665 spec->num_dmics = 1;
2a9c7816 4666 spec->private_dimux.num_items = 2;
a7662640 4667 break;
661cd8fb 4668 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR		 4669 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4670 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4671 spec->num_dmics = 1;
2a9c7816 4672 spec->private_dimux.num_items = 2;
a7662640
MR		 4673 break;
4674 }
4675 break;
4676 default:
4677 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4678 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4679 spec->eapd_switch = 1;
a7662640 4680 }
b2c4f4d7
MR		 4681 if (spec->board_config > STAC_92HD73XX_REF) {
4682 /* GPIO0 High = Enable EAPD */
4683 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4684 spec->gpio_data = 0x01;
4685 }
2a9c7816 4686 spec->dinput_mux = &spec->private_dimux;
a7662640 4687
a64135a2
MR		 4688 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4689 spec->pwr_nids = stac92hd73xx_pwr_nids;
4690
d9737751 4691 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4692
4693 if (!err) {
4694 if (spec->board_config < 0) {
4695 printk(KERN_WARNING "hda_codec: No auto-config is "
4696 "available, default to model=ref\n");
4697 spec->board_config = STAC_92HD73XX_REF;
4698 goto again;
4699 }
4700 err = -EINVAL;
4701 }
4702
4703 if (err < 0) {
4704 stac92xx_free(codec);
4705 return err;
4706 }
4707
9e43f0de
TI		 4708 if (spec->board_config == STAC_92HD73XX_NO_JD)
4709 spec->hp_detect = 0;
4710
e1f0d669
MR		 4711 codec->patch_ops = stac92xx_patch_ops;
4712
2d34e1b3
TI		 4713 codec->proc_widget_hook = stac92hd7x_proc_hook;
4714
e1f0d669
MR		 4715 return 0;
4716}
4717
d0513fc6
MR		 4718static struct hda_input_mux stac92hd83xxx_dmux = {
4719 .num_items = 3,
4720 .items = {
4721 { "Analog Inputs", 0x03 },
4722 { "Digital Mic 1", 0x04 },
4723 { "Digital Mic 2", 0x05 },
4724 }
4725};
4726
4727static int patch_stac92hd83xxx(struct hda_codec *codec)
4728{
4729 struct sigmatel_spec *spec;
4730 int err;
4731
4732 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4733 if (spec == NULL)
4734 return -ENOMEM;
4735
4736 codec->spec = spec;
0ffa9807 4737 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4738 spec->mono_nid = 0x19;
4739 spec->digbeep_nid = 0x21;
4740 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4741 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4742 spec->adc_nids = stac92hd83xxx_adc_nids;
4743 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4744 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4745 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 4746 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6
MR		 4747
4748 spec->init = stac92hd83xxx_core_init;
4749 switch (codec->vendor_id) {
4750 case 0x111d7605:
d0513fc6
MR		 4751 break;
4752 default:
4753 spec->num_pwrs--;
4754 spec->init++; /* switch to config #2 */
d0513fc6
MR		 4755 }
4756
4757 spec->mixer = stac92hd83xxx_mixer;
4758 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4759 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4760 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4761 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4762 spec->dinput_mux = &stac92hd83xxx_dmux;
4763 spec->pin_nids = stac92hd83xxx_pin_nids;
4764 spec->board_config = snd_hda_check_board_config(codec,
4765 STAC_92HD83XXX_MODELS,
4766 stac92hd83xxx_models,
4767 stac92hd83xxx_cfg_tbl);
4768again:
4769 if (spec->board_config < 0) {
4770 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4771 " STAC92HD83XXX, using BIOS defaults\n");
4772 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4773 } else
4774 err = stac_save_pin_cfgs(codec,
4775 stac92hd83xxx_brd_tbl[spec->board_config]);
4776 if (err < 0) {
4777 stac92xx_free(codec);
4778 return err;
d0513fc6
MR		 4779 }
4780
4781 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4782 if (!err) {
4783 if (spec->board_config < 0) {
4784 printk(KERN_WARNING "hda_codec: No auto-config is "
4785 "available, default to model=ref\n");
4786 spec->board_config = STAC_92HD83XXX_REF;
4787 goto again;
4788 }
4789 err = -EINVAL;
4790 }
4791
4792 if (err < 0) {
4793 stac92xx_free(codec);
4794 return err;
4795 }
4796
4797 codec->patch_ops = stac92xx_patch_ops;
4798
2d34e1b3
TI		 4799 codec->proc_widget_hook = stac92hd_proc_hook;
4800
d0513fc6
MR		 4801 return 0;
4802}
4803
4b33c767
MR		 4804static struct hda_input_mux stac92hd71bxx_dmux = {
4805 .num_items = 4,
4806 .items = {
4807 { "Analog Inputs", 0x00 },
4808 { "Mixer", 0x01 },
4809 { "Digital Mic 1", 0x02 },
4810 { "Digital Mic 2", 0x03 },
4811 }
4812};
4813
e035b841
MR		 4814static int patch_stac92hd71bxx(struct hda_codec *codec)
4815{
4816 struct sigmatel_spec *spec;
4817 int err = 0;
4818
4819 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4820 if (spec == NULL)
4821 return -ENOMEM;
4822
4823 codec->spec = spec;
8daaaa97 4824 codec->patch_ops = stac92xx_patch_ops;
e035b841 4825 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4826 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4827 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4828 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4829 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4830 spec->board_config = snd_hda_check_board_config(codec,
4831 STAC_92HD71BXX_MODELS,
4832 stac92hd71bxx_models,
4833 stac92hd71bxx_cfg_tbl);
4834again:
4835 if (spec->board_config < 0) {
4836 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4837 " STAC92HD71BXX, using BIOS defaults\n");
4838 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4839 } else
4840 err = stac_save_pin_cfgs(codec,
4841 stac92hd71bxx_brd_tbl[spec->board_config]);
4842 if (err < 0) {
4843 stac92xx_free(codec);
4844 return err;
e035b841
MR		 4845 }
4846
41c3b648
TI		 4847 if (spec->board_config > STAC_92HD71BXX_REF) {
4848 /* GPIO0 = EAPD */
4849 spec->gpio_mask = 0x01;
4850 spec->gpio_dir = 0x01;
4851 spec->gpio_data = 0x01;
4852 }
4853
541eee87
MR		 4854 switch (codec->vendor_id) {
4855 case 0x111d76b6: /* 4 Port without Analog Mixer */
4856 case 0x111d76b7:
4857 case 0x111d76b4: /* 6 Port without Analog Mixer */
4858 case 0x111d76b5:
4859 spec->mixer = stac92hd71bxx_mixer;
4860 spec->init = stac92hd71bxx_core_init;
0ffa9807 4861 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4862 break;
aafc4412 4863 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4864 switch (spec->board_config) {
4865 case STAC_HP_M4:
72474be6 4866 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 4867 err = stac_add_event(spec, codec->afg,
4868 STAC_VREF_EVENT, 0x02);
4869 if (err < 0)
4870 return err;
c5d08bb5 4871 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4872 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4873 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 4874 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 4875 AC_USRSP_EN | err);
72474be6
MR		 4876 spec->gpio_mask |= 0x02;
4877 break;
4878 }
8daaaa97 4879 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 4880 (codec->revision_id & 0xf) == 1)
8daaaa97 4881 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4882
aafc4412
MR		 4883 /* no output amps */
4884 spec->num_pwrs = 0;
4885 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4886 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4887
4888 /* disable VSW */
4889 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4890 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR		 4891 break;
4892 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 4893 if ((codec->revision_id & 0xf) == 1)
8daaaa97 4894 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4895
aafc4412
MR		 4896 /* no output amps */
4897 spec->num_pwrs = 0;
4898 /* fallthru */
541eee87 4899 default:
4b33c767 4900 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4901 spec->mixer = stac92hd71bxx_analog_mixer;
4902 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4903 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4904 }
4905
4b33c767 4906 spec->aloopback_mask = 0x50;
541eee87
MR		 4907 spec->aloopback_shift = 0;
4908
8daaaa97 4909 spec->powerdown_adcs = 1;
1cd2224c 4910 spec->digbeep_nid = 0x26;
e035b841
MR		 4911 spec->mux_nids = stac92hd71bxx_mux_nids;
4912 spec->adc_nids = stac92hd71bxx_adc_nids;
4913 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4914 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4915 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4916 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4917
4918 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4919 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4920
6a14f585
MR		 4921 switch (spec->board_config) {
4922 case STAC_HP_M4:
6a14f585 4923 /* enable internal microphone */
af9f341a 4924 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR		 4925 stac92xx_auto_set_pinctl(codec, 0x0e,
4926 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 4927 /* fallthru */
4928 case STAC_DELL_M4_2:
4929 spec->num_dmics = 0;
4930 spec->num_smuxes = 0;
4931 spec->num_dmuxes = 0;
4932 break;
4933 case STAC_DELL_M4_1:
4934 case STAC_DELL_M4_3:
4935 spec->num_dmics = 1;
4936 spec->num_smuxes = 0;
4937 spec->num_dmuxes = 0;
6a14f585
MR		 4938 break;
4939 default:
4940 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4941 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4942 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4943 };
4944
c21ca4a8 4945 spec->multiout.dac_nids = spec->dac_nids;
4b33c767
MR		 4946 if (spec->dinput_mux)
4947 spec->private_dimux.num_items +=
4948 spec->num_dmics -
4949 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4950
4951 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4952 if (!err) {
4953 if (spec->board_config < 0) {
4954 printk(KERN_WARNING "hda_codec: No auto-config is "
4955 "available, default to model=ref\n");
4956 spec->board_config = STAC_92HD71BXX_REF;
4957 goto again;
4958 }
4959 err = -EINVAL;
4960 }
4961
4962 if (err < 0) {
4963 stac92xx_free(codec);
4964 return err;
4965 }
4966
2d34e1b3
TI		 4967 codec->proc_widget_hook = stac92hd7x_proc_hook;
4968
e035b841
MR		 4969 return 0;
4970};
4971
2f2f4251
M		 4972static int patch_stac922x(struct hda_codec *codec)
4973{
4974 struct sigmatel_spec *spec;
c7d4b2fa 4975 int err;
2f2f4251 4976
e560d8d8 4977 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4978 if (spec == NULL)
4979 return -ENOMEM;
4980
4981 codec->spec = spec;
a4eed138 4982 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4983 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4984 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4985 stac922x_models,
4986 stac922x_cfg_tbl);
536319af 4987 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4988 spec->gpio_mask = spec->gpio_dir = 0x03;
4989 spec->gpio_data = 0x03;
3fc24d85
TI		 4990 /* Intel Macs have all same PCI SSID, so we need to check
4991 * codec SSID to distinguish the exact models
4992 */
6f0778d8 4993 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4994 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4995
4996 case 0x106b0800:
4997 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4998 break;
5d5d3bc3
IZ		 4999 case 0x106b0600:
5000 case 0x106b0700:
5001 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5002 break;
5d5d3bc3
IZ		 5003 case 0x106b0e00:
5004 case 0x106b0f00:
5005 case 0x106b1600:
5006 case 0x106b1700:
5007 case 0x106b0200:
5008 case 0x106b1e00:
5009 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5010 break;
5d5d3bc3
IZ		 5011 case 0x106b1a00:
5012 case 0x00000100:
5013 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5014 break;
5d5d3bc3
IZ		 5015 case 0x106b0a00:
5016 case 0x106b2200:
5017 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5018 break;
536319af
NB		 5019 default:
5020 spec->board_config = STAC_INTEL_MAC_V3;
5021 break;
3fc24d85
TI		 5022 }
5023 }
5024
9e507abd 5025 again:
11b44bbd
RF		 5026 if (spec->board_config < 0) {
5027 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5028 "using BIOS defaults\n");
5029 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5030 } else
5031 err = stac_save_pin_cfgs(codec,
5032 stac922x_brd_tbl[spec->board_config]);
5033 if (err < 0) {
5034 stac92xx_free(codec);
5035 return err;
403d1944 5036 }
2f2f4251 5037
c7d4b2fa
M		 5038 spec->adc_nids = stac922x_adc_nids;
5039 spec->mux_nids = stac922x_mux_nids;
2549413e 5040 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5041 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5042 spec->num_dmics = 0;
a64135a2 5043 spec->num_pwrs = 0;
c7d4b2fa
M		 5044
5045 spec->init = stac922x_core_init;
2f2f4251 5046 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 5047
5048 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5049
3cc08dc6 5050 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 5051 if (!err) {
5052 if (spec->board_config < 0) {
5053 printk(KERN_WARNING "hda_codec: No auto-config is "
5054 "available, default to model=ref\n");
5055 spec->board_config = STAC_D945_REF;
5056 goto again;
5057 }
5058 err = -EINVAL;
5059 }
3cc08dc6
MP		 5060 if (err < 0) {
5061 stac92xx_free(codec);
5062 return err;
5063 }
5064
5065 codec->patch_ops = stac92xx_patch_ops;
5066
807a4636
TI		 5067 /* Fix Mux capture level; max to 2 */
5068 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5069 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5070 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5071 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5072 (0 << AC_AMPCAP_MUTE_SHIFT));
5073
3cc08dc6
MP		 5074 return 0;
5075}
5076
5077static int patch_stac927x(struct hda_codec *codec)
5078{
5079 struct sigmatel_spec *spec;
5080 int err;
5081
5082 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5083 if (spec == NULL)
5084 return -ENOMEM;
5085
5086 codec->spec = spec;
a4eed138 5087 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5088 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 5089 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5090 stac927x_models,
5091 stac927x_cfg_tbl);
9e507abd 5092 again:
8e9068b1
MR		 5093 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5094 if (spec->board_config < 0)
5095 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5096 "STAC927x, using BIOS defaults\n");
11b44bbd 5097 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5098 } else
5099 err = stac_save_pin_cfgs(codec,
5100 stac927x_brd_tbl[spec->board_config]);
5101 if (err < 0) {
5102 stac92xx_free(codec);
5103 return err;
3cc08dc6
MP		 5104 }
5105
1cd2224c 5106 spec->digbeep_nid = 0x23;
8e9068b1
MR		 5107 spec->adc_nids = stac927x_adc_nids;
5108 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5109 spec->mux_nids = stac927x_mux_nids;
5110 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 5111 spec->smux_nids = stac927x_smux_nids;
5112 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5113 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5114 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 5115 spec->multiout.dac_nids = spec->dac_nids;
5116
81d3dbde 5117 switch (spec->board_config) {
93ed1503 5118 case STAC_D965_3ST:
93ed1503 5119 case STAC_D965_5ST:
8e9068b1 5120 /* GPIO0 High = Enable EAPD */
0fc9dec4 5121 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5122 spec->gpio_data = 0x01;
8e9068b1
MR		 5123 spec->num_dmics = 0;
5124
93ed1503 5125 spec->init = d965_core_init;
9e05b7a3 5126 spec->mixer = stac927x_mixer;
81d3dbde 5127 break;
8e9068b1 5128 case STAC_DELL_BIOS:
780c8be4
MR		 5129 switch (codec->subsystem_id) {
5130 case 0x10280209:
5131 case 0x1028022e:
5132 /* correct the device field to SPDIF out */
af9f341a 5133 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR		 5134 break;
5135 };
03d7ca17 5136 /* configure the analog microphone on some laptops */
af9f341a 5137 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5138 /* correct the front output jack as a hp out */
af9f341a 5139 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5140 /* correct the front input jack as a mic */
af9f341a 5141 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5142 /* fallthru */
8e9068b1
MR		 5143 case STAC_DELL_3ST:
5144 /* GPIO2 High = Enable EAPD */
0fc9dec4 5145 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5146 spec->gpio_data = 0x04;
7f16859a
MR		 5147 spec->dmic_nids = stac927x_dmic_nids;
5148 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5149
8e9068b1
MR		 5150 spec->init = d965_core_init;
5151 spec->mixer = stac927x_mixer;
5152 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5153 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 5154 break;
5155 default:
b2c4f4d7
MR		 5156 if (spec->board_config > STAC_D965_REF) {
5157 /* GPIO0 High = Enable EAPD */
5158 spec->eapd_mask = spec->gpio_mask = 0x01;
5159 spec->gpio_dir = spec->gpio_data = 0x01;
5160 }
8e9068b1
MR		 5161 spec->num_dmics = 0;
5162
5163 spec->init = stac927x_core_init;
5164 spec->mixer = stac927x_mixer;
7f16859a
MR		 5165 }
5166
a64135a2 5167 spec->num_pwrs = 0;
e1f0d669
MR		 5168 spec->aloopback_mask = 0x40;
5169 spec->aloopback_shift = 0;
c0cea0d0 5170 spec->eapd_switch = 1;
8e9068b1 5171
3cc08dc6 5172 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 5173 if (!err) {
5174 if (spec->board_config < 0) {
5175 printk(KERN_WARNING "hda_codec: No auto-config is "
5176 "available, default to model=ref\n");
5177 spec->board_config = STAC_D965_REF;
5178 goto again;
5179 }
5180 err = -EINVAL;
5181 }
c7d4b2fa
M		 5182 if (err < 0) {
5183 stac92xx_free(codec);
5184 return err;
5185 }
2f2f4251
M		 5186
5187 codec->patch_ops = stac92xx_patch_ops;
5188
2d34e1b3
TI		 5189 codec->proc_widget_hook = stac927x_proc_hook;
5190
52987656
TI		 5191 /*
5192 * !!FIXME!!
5193 * The STAC927x seem to require fairly long delays for certain
5194 * command sequences. With too short delays (even if the answer
5195 * is set to RIRB properly), it results in the silence output
5196 * on some hardwares like Dell.
5197 *
5198 * The below flag enables the longer delay (see get_response
5199 * in hda_intel.c).
5200 */
5201 codec->bus->needs_damn_long_delay = 1;
5202
e28d8322
TI		 5203 /* no jack detecion for ref-no-jd model */
5204 if (spec->board_config == STAC_D965_REF_NO_JD)
5205 spec->hp_detect = 0;
5206
2f2f4251
M		 5207 return 0;
5208}
5209
f3302a59
MP		 5210static int patch_stac9205(struct hda_codec *codec)
5211{
5212 struct sigmatel_spec *spec;
8259980e 5213 int err;
f3302a59
MP		 5214
5215 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5216 if (spec == NULL)
5217 return -ENOMEM;
5218
5219 codec->spec = spec;
a4eed138 5220 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5221 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 5222 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5223 stac9205_models,
5224 stac9205_cfg_tbl);
9e507abd 5225 again:
11b44bbd
RF		 5226 if (spec->board_config < 0) {
5227 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5228 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5229 } else
5230 err = stac_save_pin_cfgs(codec,
5231 stac9205_brd_tbl[spec->board_config]);
5232 if (err < 0) {
5233 stac92xx_free(codec);
5234 return err;
f3302a59
MP		 5235 }
5236
1cd2224c 5237 spec->digbeep_nid = 0x23;
f3302a59 5238 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5239 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5240 spec->mux_nids = stac9205_mux_nids;
2549413e 5241 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 5242 spec->smux_nids = stac9205_smux_nids;
5243 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5244 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5245 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5246 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5247 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5248 spec->num_pwrs = 0;
f3302a59
MP		 5249
5250 spec->init = stac9205_core_init;
5251 spec->mixer = stac9205_mixer;
5252
e1f0d669
MR		 5253 spec->aloopback_mask = 0x40;
5254 spec->aloopback_shift = 0;
c0cea0d0 5255 spec->eapd_switch = 1;
f3302a59 5256 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5257
ae0a8ed8 5258 switch (spec->board_config){
ae0a8ed8 5259 case STAC_9205_DELL_M43:
87d48363 5260 /* Enable SPDIF in/out */
af9f341a
TI		 5261 stac_change_pin_config(codec, 0x1f, 0x01441030);
5262 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5263
4fe5195c 5264 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 5265 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5266 if (err < 0)
5267 return err;
c5d08bb5 5268 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 5269 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5270 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 5271 AC_VERB_SET_UNSOLICITED_ENABLE,
5272 AC_USRSP_EN | err);
4fe5195c
MR		 5273
5274 spec->gpio_dir = 0x0b;
0fc9dec4 5275 spec->eapd_mask = 0x01;
4fe5195c
MR		 5276 spec->gpio_mask = 0x1b;
5277 spec->gpio_mute = 0x10;
e2e7d624 5278 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5279 * GPIO3 Low = DRM
87d48363 5280 */
4fe5195c 5281 spec->gpio_data = 0x01;
ae0a8ed8 5282 break;
b2c4f4d7
MR		 5283 case STAC_9205_REF:
5284 /* SPDIF-In enabled */
5285 break;
ae0a8ed8
TD		 5286 default:
5287 /* GPIO0 High = EAPD */
0fc9dec4 5288 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5289 spec->gpio_data = 0x01;
ae0a8ed8
TD		 5290 break;
5291 }
33382403 5292
f3302a59 5293 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5294 if (!err) {
5295 if (spec->board_config < 0) {
5296 printk(KERN_WARNING "hda_codec: No auto-config is "
5297 "available, default to model=ref\n");
5298 spec->board_config = STAC_9205_REF;
5299 goto again;
5300 }
5301 err = -EINVAL;
5302 }
f3302a59
MP		 5303 if (err < 0) {
5304 stac92xx_free(codec);
5305 return err;
5306 }
5307
5308 codec->patch_ops = stac92xx_patch_ops;
5309
2d34e1b3
TI		 5310 codec->proc_widget_hook = stac9205_proc_hook;
5311
f3302a59
MP		 5312 return 0;
5313}
5314
db064e50 5315/*
6d859065 5316 * STAC9872 hack
db064e50
TI		 5317 */
5318
99ccc560 5319/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 5320static hda_nid_t vaio_dacs[] = { 0x2 };
5321#define VAIO_HP_DAC 0x5
5322static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5323static hda_nid_t vaio_mux_nids[] = { 0x15 };
5324
5325static struct hda_input_mux vaio_mux = {
a3a2f429 5326 .num_items = 3,
db064e50 5327 .items = {
d773781c 5328 /* { "HP", 0x0 }, */
1624cb9a
TI		 5329 { "Mic Jack", 0x1 },
5330 { "Internal Mic", 0x2 },
db064e50
TI		 5331 { "PCM", 0x3 },
5332 }
5333};
5334
5335static struct hda_verb vaio_init[] = {
5336 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5337 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 5338 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5339 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5340 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5341 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5342 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 5343 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5344 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5345 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5346 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5347 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5348 {}
5349};
5350
6d859065
GM		 5351static struct hda_verb vaio_ar_init[] = {
5352 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5353 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5354 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5355 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5356/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5357 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5358 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5359 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5360 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5361/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5362 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5363 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5364 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5365 {}
5366};
5367
db064e50 5368static struct snd_kcontrol_new vaio_mixer[] = {
127e82e3
TI		 5369 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5370 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5371 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5372 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
db064e50
TI		 5373 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5374 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5375 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5376 {
5377 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5378 .name = "Capture Source",
5379 .count = 1,
5380 .info = stac92xx_mux_enum_info,
5381 .get = stac92xx_mux_enum_get,
5382 .put = stac92xx_mux_enum_put,
5383 },
5384 {}
5385};
5386
6d859065 5387static struct snd_kcontrol_new vaio_ar_mixer[] = {
127e82e3
TI		 5388 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5389 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5390 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5391 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
6d859065
GM		 5392 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5393 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5394 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5395 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5396 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5397 {
5398 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5399 .name = "Capture Source",
5400 .count = 1,
5401 .info = stac92xx_mux_enum_info,
5402 .get = stac92xx_mux_enum_get,
5403 .put = stac92xx_mux_enum_put,
5404 },
5405 {}
5406};
5407
5408static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 5409 .build_controls = stac92xx_build_controls,
5410 .build_pcms = stac92xx_build_pcms,
5411 .init = stac92xx_init,
5412 .free = stac92xx_free,
cb53c626 5413#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 5414 .resume = stac92xx_resume,
5415#endif
5416};
5417
72e7b0dd
TI		 5418static int stac9872_vaio_init(struct hda_codec *codec)
5419{
5420 int err;
5421
5422 err = stac92xx_init(codec);
5423 if (err < 0)
5424 return err;
5425 if (codec->patch_ops.unsol_event)
5426 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5427 return 0;
5428}
5429
5430static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5431{
e6e3ea25 5432 if (get_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 5433 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5434 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5435 } else {
5436 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5437 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5438 }
5439}
5440
5441static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5442{
5443 switch (res >> 26) {
5444 case STAC_HP_EVENT:
5445 stac9872_vaio_hp_detect(codec, res);
5446 break;
5447 }
5448}
5449
5450static struct hda_codec_ops stac9872_vaio_patch_ops = {
5451 .build_controls = stac92xx_build_controls,
5452 .build_pcms = stac92xx_build_pcms,
5453 .init = stac9872_vaio_init,
5454 .free = stac92xx_free,
5455 .unsol_event = stac9872_vaio_unsol_event,
5456#ifdef CONFIG_PM
5457 .resume = stac92xx_resume,
5458#endif
5459};
5460
6d859065
GM		 5461enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5462 CXD9872RD_VAIO,
5463 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5464 STAC9872AK_VAIO,
5465 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5466 STAC9872K_VAIO,
5467 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5468 CXD9872AKD_VAIO,
5469 STAC_9872_MODELS,
5470};
5471
5472static const char *stac9872_models[STAC_9872_MODELS] = {
5473 [CXD9872RD_VAIO] = "vaio",
5474 [CXD9872AKD_VAIO] = "vaio-ar",
5475};
5476
5477static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5478 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5479 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5480 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5481 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5482 {}
5483};
5484
6d859065 5485static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5486{
5487 struct sigmatel_spec *spec;
5488 int board_config;
5489
f5fcc13c
TI		 5490 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5491 stac9872_models,
5492 stac9872_cfg_tbl);
db064e50
TI		 5493 if (board_config < 0)
5494 /* unknown config, let generic-parser do its job... */
5495 return snd_hda_parse_generic_codec(codec);
5496
5497 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5498 if (spec == NULL)
5499 return -ENOMEM;
5500
5501 codec->spec = spec;
5502 switch (board_config) {
6d859065
GM		 5503 case CXD9872RD_VAIO:
5504 case STAC9872AK_VAIO:
5505 case STAC9872K_VAIO:
db064e50
TI		 5506 spec->mixer = vaio_mixer;
5507 spec->init = vaio_init;
5508 spec->multiout.max_channels = 2;
5509 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5510 spec->multiout.dac_nids = vaio_dacs;
5511 spec->multiout.hp_nid = VAIO_HP_DAC;
5512 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5513 spec->adc_nids = vaio_adcs;
a64135a2 5514 spec->num_pwrs = 0;
db064e50
TI		 5515 spec->input_mux = &vaio_mux;
5516 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5517 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5518 break;
6d859065
GM		 5519
5520 case CXD9872AKD_VAIO:
5521 spec->mixer = vaio_ar_mixer;
5522 spec->init = vaio_ar_init;
5523 spec->multiout.max_channels = 2;
5524 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5525 spec->multiout.dac_nids = vaio_dacs;
5526 spec->multiout.hp_nid = VAIO_HP_DAC;
5527 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5528 spec->num_pwrs = 0;
6d859065
GM		 5529 spec->adc_nids = vaio_adcs;
5530 spec->input_mux = &vaio_mux;
5531 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5532 codec->patch_ops = stac9872_patch_ops;
6d859065 5533 break;
db064e50
TI		 5534 }
5535
db064e50
TI		 5536 return 0;
5537}
5538
5539
2f2f4251
M		 5540/*
5541 * patch entries
5542 */
1289e9e8 5543static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 5544 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5545 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5546 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5547 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5548 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5549 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5550 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5551 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5552 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5553 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5554 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5555 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5556 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5557 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5558 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5559 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5560 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5561 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5562 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5563 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5564 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5565 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5566 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5567 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5568 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5569 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5570 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5571 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5572 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5573 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5574 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5575 /* The following does not take into account .id=0x83847661 when subsys =
5576 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5577 * currently not fully supported.
5578 */
5579 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5580 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5581 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5582 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5583 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5584 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5585 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5586 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5587 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5588 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5589 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5590 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5591 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5592 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5593 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5594 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5595 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5596 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5597 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5598 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5599 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5600 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5601 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5602 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5603 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5604 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5605 {} /* terminator */
5606};
1289e9e8
TI		 5607
5608MODULE_ALIAS("snd-hda-codec-id:8384*");
5609MODULE_ALIAS("snd-hda-codec-id:111d*");
5610
5611MODULE_LICENSE("GPL");
5612MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5613
5614static struct hda_codec_preset_list sigmatel_list = {
5615 .preset = snd_hda_preset_sigmatel,
5616 .owner = THIS_MODULE,
5617};
5618
5619static int __init patch_sigmatel_init(void)
5620{
5621 return snd_hda_add_codec_preset(&sigmatel_list);
5622}
5623
5624static void __exit patch_sigmatel_exit(void)
5625{
5626 snd_hda_delete_codec_preset(&sigmatel_list);
5627}
5628
5629module_init(patch_sigmatel_init)
5630module_exit(patch_sigmatel_exit)
Linux 6.x block layer and io_uring tree(s)