ALSA: hda - Add missing terminator in slave dig-out array
[linux-block.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
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1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
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8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
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27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
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34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
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38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
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45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
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48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
58eec423
MCC
58 STAC_9200_M4,
59 STAC_9200_M4_2,
117f257d 60 STAC_9200_PANASONIC,
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61 STAC_9200_MODELS
62};
63
64enum {
65 STAC_9205_REF,
dfe495d0 66 STAC_9205_DELL_M42,
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67 STAC_9205_DELL_M43,
68 STAC_9205_DELL_M44,
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69 STAC_9205_MODELS
70};
71
e1f0d669 72enum {
9e43f0de 73 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 74 STAC_92HD73XX_REF,
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TI
75 STAC_DELL_M6_AMIC,
76 STAC_DELL_M6_DMIC,
77 STAC_DELL_M6_BOTH,
6b3ab21e 78 STAC_DELL_EQ,
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79 STAC_92HD73XX_MODELS
80};
81
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82enum {
83 STAC_92HD83XXX_REF,
32ed3f46 84 STAC_92HD83XXX_PWR_REF,
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85 STAC_92HD83XXX_MODELS
86};
87
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88enum {
89 STAC_92HD71BXX_REF,
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90 STAC_DELL_M4_1,
91 STAC_DELL_M4_2,
3a7abfd2 92 STAC_DELL_M4_3,
6a14f585 93 STAC_HP_M4,
1b0652eb 94 STAC_HP_DV5,
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95 STAC_92HD71BXX_MODELS
96};
97
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98enum {
99 STAC_925x_REF,
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100 STAC_M1,
101 STAC_M1_2,
102 STAC_M2,
8e21c34c 103 STAC_M2_2,
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104 STAC_M3,
105 STAC_M5,
106 STAC_M6,
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107 STAC_925x_MODELS
108};
109
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110enum {
111 STAC_D945_REF,
112 STAC_D945GTP3,
113 STAC_D945GTP5,
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114 STAC_INTEL_MAC_V1,
115 STAC_INTEL_MAC_V2,
116 STAC_INTEL_MAC_V3,
117 STAC_INTEL_MAC_V4,
118 STAC_INTEL_MAC_V5,
536319af
NB
119 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
120 * is given, one of the above models will be
121 * chosen according to the subsystem id. */
dfe495d0 122 /* for backward compatibility */
f5fcc13c 123 STAC_MACMINI,
3fc24d85 124 STAC_MACBOOK,
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NB
125 STAC_MACBOOK_PRO_V1,
126 STAC_MACBOOK_PRO_V2,
f16928fb 127 STAC_IMAC_INTEL,
0dae0f83 128 STAC_IMAC_INTEL_20,
8c650087 129 STAC_ECS_202,
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130 STAC_922X_DELL_D81,
131 STAC_922X_DELL_D82,
132 STAC_922X_DELL_M81,
133 STAC_922X_DELL_M82,
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134 STAC_922X_MODELS
135};
136
137enum {
e28d8322 138 STAC_D965_REF_NO_JD, /* no jack-detection */
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139 STAC_D965_REF,
140 STAC_D965_3ST,
141 STAC_D965_5ST,
4ff076e5 142 STAC_DELL_3ST,
8e9068b1 143 STAC_DELL_BIOS,
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144 STAC_927X_MODELS
145};
403d1944 146
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147struct sigmatel_event {
148 hda_nid_t nid;
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149 unsigned char type;
150 unsigned char tag;
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151 int data;
152};
153
154struct sigmatel_jack {
155 hda_nid_t nid;
156 int type;
157 struct snd_jack *jack;
158};
159
2f2f4251 160struct sigmatel_spec {
c8b6bf9b 161 struct snd_kcontrol_new *mixers[4];
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162 unsigned int num_mixers;
163
403d1944 164 int board_config;
c0cea0d0 165 unsigned int eapd_switch: 1;
c7d4b2fa 166 unsigned int surr_switch: 1;
3cc08dc6 167 unsigned int alt_switch: 1;
82bc955f 168 unsigned int hp_detect: 1;
00ef50c2 169 unsigned int spdif_mute: 1;
c7d4b2fa 170
4fe5195c 171 /* gpio lines */
0fc9dec4 172 unsigned int eapd_mask;
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173 unsigned int gpio_mask;
174 unsigned int gpio_dir;
175 unsigned int gpio_data;
176 unsigned int gpio_mute;
177
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178 /* stream */
179 unsigned int stream_delay;
180
4fe5195c 181 /* analog loopback */
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182 unsigned char aloopback_mask;
183 unsigned char aloopback_shift;
8259980e 184
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185 /* power management */
186 unsigned int num_pwrs;
d0513fc6 187 unsigned int *pwr_mapping;
a64135a2 188 hda_nid_t *pwr_nids;
b76c850f 189 hda_nid_t *dac_list;
a64135a2 190
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191 /* jack detection */
192 struct snd_array jacks;
193
194 /* events */
195 struct snd_array events;
196
2f2f4251 197 /* playback */
b22b4821 198 struct hda_input_mux *mono_mux;
89385035 199 struct hda_input_mux *amp_mux;
b22b4821 200 unsigned int cur_mmux;
2f2f4251 201 struct hda_multi_out multiout;
3cc08dc6 202 hda_nid_t dac_nids[5];
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203 hda_nid_t hp_dacs[5];
204 hda_nid_t speaker_dacs[5];
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205
206 /* capture */
207 hda_nid_t *adc_nids;
2f2f4251 208 unsigned int num_adcs;
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209 hda_nid_t *mux_nids;
210 unsigned int num_muxes;
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211 hda_nid_t *dmic_nids;
212 unsigned int num_dmics;
e1f0d669 213 hda_nid_t *dmux_nids;
1697055e 214 unsigned int num_dmuxes;
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215 hda_nid_t *smux_nids;
216 unsigned int num_smuxes;
65973632 217 const char **spdif_labels;
d9737751 218
dabbed6f 219 hda_nid_t dig_in_nid;
b22b4821 220 hda_nid_t mono_nid;
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221 hda_nid_t anabeep_nid;
222 hda_nid_t digbeep_nid;
2f2f4251 223
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224 /* pin widgets */
225 hda_nid_t *pin_nids;
226 unsigned int num_pins;
2f2f4251 227 unsigned int *pin_configs;
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228
229 /* codec specific stuff */
230 struct hda_verb *init;
c8b6bf9b 231 struct snd_kcontrol_new *mixer;
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232
233 /* capture source */
8b65727b 234 struct hda_input_mux *dinput_mux;
e1f0d669 235 unsigned int cur_dmux[2];
c7d4b2fa 236 struct hda_input_mux *input_mux;
3cc08dc6 237 unsigned int cur_mux[3];
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238 struct hda_input_mux *sinput_mux;
239 unsigned int cur_smux[2];
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240 unsigned int cur_amux;
241 hda_nid_t *amp_nids;
242 unsigned int num_amps;
8daaaa97 243 unsigned int powerdown_adcs;
2f2f4251 244
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245 /* i/o switches */
246 unsigned int io_switch[2];
0fb87bb4 247 unsigned int clfe_swap;
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248 hda_nid_t line_switch; /* shared line-in for input and output */
249 hda_nid_t mic_switch; /* shared mic-in for input and output */
250 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 251 unsigned int aloopback;
2f2f4251 252
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253 struct hda_pcm pcm_rec[2]; /* PCM information */
254
255 /* dynamic controls and input_mux */
256 struct auto_pin_cfg autocfg;
603c4019 257 struct snd_array kctls;
8b65727b 258 struct hda_input_mux private_dimux;
c7d4b2fa 259 struct hda_input_mux private_imux;
d9737751 260 struct hda_input_mux private_smux;
89385035 261 struct hda_input_mux private_amp_mux;
b22b4821 262 struct hda_input_mux private_mono_mux;
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263};
264
265static hda_nid_t stac9200_adc_nids[1] = {
266 0x03,
267};
268
269static hda_nid_t stac9200_mux_nids[1] = {
270 0x0c,
271};
272
273static hda_nid_t stac9200_dac_nids[1] = {
274 0x02,
275};
276
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277static hda_nid_t stac92hd73xx_pwr_nids[8] = {
278 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
279 0x0f, 0x10, 0x11
280};
281
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282static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
283 0x26, 0,
284};
285
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286static hda_nid_t stac92hd73xx_adc_nids[2] = {
287 0x1a, 0x1b
288};
289
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290#define DELL_M6_AMP 2
291static hda_nid_t stac92hd73xx_amp_nids[3] = {
292 0x0b, 0x0c, 0x0e
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293};
294
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295#define STAC92HD73XX_NUM_DMICS 2
296static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
297 0x13, 0x14, 0
298};
299
300#define STAC92HD73_DAC_COUNT 5
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301
302static hda_nid_t stac92hd73xx_mux_nids[4] = {
303 0x28, 0x29, 0x2a, 0x2b,
304};
305
306static hda_nid_t stac92hd73xx_dmux_nids[2] = {
307 0x20, 0x21,
308};
309
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310static hda_nid_t stac92hd73xx_smux_nids[2] = {
311 0x22, 0x23,
312};
313
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314#define STAC92HD83XXX_NUM_DMICS 2
315static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
316 0x11, 0x12, 0
317};
318
d0513fc6 319#define STAC92HD83_DAC_COUNT 3
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320
321static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
322 0x17, 0x18,
323};
324
325static hda_nid_t stac92hd83xxx_adc_nids[2] = {
326 0x15, 0x16,
327};
328
329static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
330 0xa, 0xb, 0xd, 0xe,
331};
332
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333static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
334 0x1e, 0,
335};
336
d0513fc6 337static unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 338 0x03, 0x0c, 0x20, 0x40,
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339};
340
9248f269 341static hda_nid_t stac92hd83xxx_amp_nids[1] = {
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342 0xc,
343};
344
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345static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
346 0x0a, 0x0d, 0x0f
347};
348
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349static hda_nid_t stac92hd71bxx_adc_nids[2] = {
350 0x12, 0x13,
351};
352
353static hda_nid_t stac92hd71bxx_mux_nids[2] = {
354 0x1a, 0x1b
355};
356
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357static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
358 0x1c, 0x1d,
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359};
360
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361static hda_nid_t stac92hd71bxx_smux_nids[2] = {
362 0x24, 0x25,
363};
364
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365#define STAC92HD71BXX_NUM_DMICS 2
366static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
367 0x18, 0x19, 0
368};
369
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370static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
371 0x22, 0
372};
373
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374static hda_nid_t stac925x_adc_nids[1] = {
375 0x03,
376};
377
378static hda_nid_t stac925x_mux_nids[1] = {
379 0x0f,
380};
381
382static hda_nid_t stac925x_dac_nids[1] = {
383 0x02,
384};
385
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TI
386#define STAC925X_NUM_DMICS 1
387static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
388 0x15, 0
2c11f955
TD
389};
390
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391static hda_nid_t stac925x_dmux_nids[1] = {
392 0x14,
393};
394
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395static hda_nid_t stac922x_adc_nids[2] = {
396 0x06, 0x07,
397};
398
399static hda_nid_t stac922x_mux_nids[2] = {
400 0x12, 0x13,
401};
402
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MP
403static hda_nid_t stac927x_adc_nids[3] = {
404 0x07, 0x08, 0x09
405};
406
407static hda_nid_t stac927x_mux_nids[3] = {
408 0x15, 0x16, 0x17
409};
410
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411static hda_nid_t stac927x_smux_nids[1] = {
412 0x21,
413};
414
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415static hda_nid_t stac927x_dac_nids[6] = {
416 0x02, 0x03, 0x04, 0x05, 0x06, 0
417};
418
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419static hda_nid_t stac927x_dmux_nids[1] = {
420 0x1b,
421};
422
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423#define STAC927X_NUM_DMICS 2
424static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
425 0x13, 0x14, 0
426};
427
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428static const char *stac927x_spdif_labels[5] = {
429 "Digital Playback", "ADAT", "Analog Mux 1",
430 "Analog Mux 2", "Analog Mux 3"
431};
432
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MP
433static hda_nid_t stac9205_adc_nids[2] = {
434 0x12, 0x13
435};
436
437static hda_nid_t stac9205_mux_nids[2] = {
438 0x19, 0x1a
439};
440
e1f0d669 441static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 442 0x1d,
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443};
444
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445static hda_nid_t stac9205_smux_nids[1] = {
446 0x21,
447};
448
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449#define STAC9205_NUM_DMICS 2
450static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
451 0x17, 0x18, 0
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452};
453
c7d4b2fa 454static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD
455 0x08, 0x09, 0x0d, 0x0e,
456 0x0f, 0x10, 0x11, 0x12,
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457};
458
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459static hda_nid_t stac925x_pin_nids[8] = {
460 0x07, 0x08, 0x0a, 0x0b,
461 0x0c, 0x0d, 0x10, 0x11,
462};
463
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464static hda_nid_t stac922x_pin_nids[10] = {
465 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
466 0x0f, 0x10, 0x11, 0x15, 0x1b,
467};
468
a7662640 469static hda_nid_t stac92hd73xx_pin_nids[13] = {
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470 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
471 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 472 0x14, 0x22, 0x23
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473};
474
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475static hda_nid_t stac92hd83xxx_pin_nids[14] = {
476 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
477 0x0f, 0x10, 0x11, 0x12, 0x13,
478 0x1d, 0x1e, 0x1f, 0x20
479};
0ffa9807 480static hda_nid_t stac92hd71bxx_pin_nids[11] = {
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481 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
482 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 483 0x1f,
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484};
485
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486static hda_nid_t stac927x_pin_nids[14] = {
487 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
488 0x0f, 0x10, 0x11, 0x12, 0x13,
489 0x14, 0x21, 0x22, 0x23,
490};
491
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492static hda_nid_t stac9205_pin_nids[12] = {
493 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
494 0x0f, 0x14, 0x16, 0x17, 0x18,
495 0x21, 0x22,
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496};
497
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498#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
499
500static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
501 struct snd_ctl_elem_value *ucontrol)
502{
503 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
504 struct sigmatel_spec *spec = codec->spec;
505 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
506
507 kcontrol->private_value ^= get_amp_nid(kcontrol);
508 kcontrol->private_value |= nid;
509
510 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
511}
512
513static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
514 struct snd_ctl_elem_value *ucontrol)
515{
516 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
517 struct sigmatel_spec *spec = codec->spec;
518 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
519
520 kcontrol->private_value ^= get_amp_nid(kcontrol);
521 kcontrol->private_value |= nid;
522
523 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
524}
525
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526static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
527 struct snd_ctl_elem_info *uinfo)
528{
529 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
530 struct sigmatel_spec *spec = codec->spec;
531 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
532}
533
534static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
535 struct snd_ctl_elem_value *ucontrol)
536{
537 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
538 struct sigmatel_spec *spec = codec->spec;
e1f0d669 539 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 540
e1f0d669 541 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
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MP
542 return 0;
543}
544
545static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
546 struct snd_ctl_elem_value *ucontrol)
547{
548 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
549 struct sigmatel_spec *spec = codec->spec;
e1f0d669 550 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP
551
552 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 553 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP
554}
555
d9737751
MR
556static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
557 struct snd_ctl_elem_info *uinfo)
558{
559 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
560 struct sigmatel_spec *spec = codec->spec;
561 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
562}
563
564static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
565 struct snd_ctl_elem_value *ucontrol)
566{
567 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
568 struct sigmatel_spec *spec = codec->spec;
569 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
570
571 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
572 return 0;
573}
574
575static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
576 struct snd_ctl_elem_value *ucontrol)
577{
578 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
579 struct sigmatel_spec *spec = codec->spec;
00ef50c2 580 struct hda_input_mux *smux = &spec->private_smux;
d9737751 581 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR
582 int err, val;
583 hda_nid_t nid;
d9737751 584
00ef50c2 585 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 586 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR
587 if (err < 0)
588 return err;
589
590 if (spec->spdif_mute) {
591 if (smux_idx == 0)
592 nid = spec->multiout.dig_out_nid;
593 else
594 nid = codec->slave_dig_outs[smux_idx - 1];
595 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 596 val = HDA_AMP_MUTE;
00ef50c2 597 else
c9b46f91 598 val = 0;
00ef50c2 599 /* un/mute SPDIF out */
c9b46f91
TI
600 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
601 HDA_AMP_MUTE, val);
00ef50c2
MR
602 }
603 return 0;
d9737751
MR
604}
605
c8b6bf9b 606static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M
607{
608 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
609 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 610 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M
611}
612
c8b6bf9b 613static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
614{
615 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
616 struct sigmatel_spec *spec = codec->spec;
617 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
618
619 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
620 return 0;
621}
622
c8b6bf9b 623static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
624{
625 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
626 struct sigmatel_spec *spec = codec->spec;
627 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
628
c7d4b2fa 629 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M
630 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
631}
632
b22b4821
MR
633static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
634 struct snd_ctl_elem_info *uinfo)
635{
636 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
637 struct sigmatel_spec *spec = codec->spec;
638 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
639}
640
641static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
642 struct snd_ctl_elem_value *ucontrol)
643{
644 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
645 struct sigmatel_spec *spec = codec->spec;
646
647 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
648 return 0;
649}
650
651static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
652 struct snd_ctl_elem_value *ucontrol)
653{
654 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
655 struct sigmatel_spec *spec = codec->spec;
656
657 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
658 spec->mono_nid, &spec->cur_mmux);
659}
660
89385035
MR
661static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
662 struct snd_ctl_elem_info *uinfo)
663{
664 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
665 struct sigmatel_spec *spec = codec->spec;
666 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
667}
668
669static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
670 struct snd_ctl_elem_value *ucontrol)
671{
672 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
673 struct sigmatel_spec *spec = codec->spec;
674
675 ucontrol->value.enumerated.item[0] = spec->cur_amux;
676 return 0;
677}
678
679static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
680 struct snd_ctl_elem_value *ucontrol)
681{
682 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
683 struct sigmatel_spec *spec = codec->spec;
684 struct snd_kcontrol *ctl =
685 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
686 if (!ctl)
687 return -EINVAL;
688
689 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
690 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
691
692 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
693 0, &spec->cur_amux);
694}
695
5f10c4a9
ML
696#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
697
698static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
699 struct snd_ctl_elem_value *ucontrol)
700{
701 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 702 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML
703 struct sigmatel_spec *spec = codec->spec;
704
e1f0d669
MR
705 ucontrol->value.integer.value[0] = !!(spec->aloopback &
706 (spec->aloopback_mask << idx));
5f10c4a9
ML
707 return 0;
708}
709
710static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
711 struct snd_ctl_elem_value *ucontrol)
712{
713 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
714 struct sigmatel_spec *spec = codec->spec;
e1f0d669 715 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 716 unsigned int dac_mode;
e1f0d669 717 unsigned int val, idx_val;
5f10c4a9 718
e1f0d669
MR
719 idx_val = spec->aloopback_mask << idx;
720 if (ucontrol->value.integer.value[0])
721 val = spec->aloopback | idx_val;
722 else
723 val = spec->aloopback & ~idx_val;
68ea7b2f 724 if (spec->aloopback == val)
5f10c4a9
ML
725 return 0;
726
68ea7b2f 727 spec->aloopback = val;
5f10c4a9 728
e1f0d669
MR
729 /* Only return the bits defined by the shift value of the
730 * first two bytes of the mask
731 */
5f10c4a9 732 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR
733 kcontrol->private_value & 0xFFFF, 0x0);
734 dac_mode >>= spec->aloopback_shift;
5f10c4a9 735
e1f0d669 736 if (spec->aloopback & idx_val) {
5f10c4a9 737 snd_hda_power_up(codec);
e1f0d669 738 dac_mode |= idx_val;
5f10c4a9
ML
739 } else {
740 snd_hda_power_down(codec);
e1f0d669 741 dac_mode &= ~idx_val;
5f10c4a9
ML
742 }
743
744 snd_hda_codec_write_cache(codec, codec->afg, 0,
745 kcontrol->private_value >> 16, dac_mode);
746
747 return 1;
748}
749
c7d4b2fa 750static struct hda_verb stac9200_core_init[] = {
2f2f4251 751 /* set dac0mux for dac converter */
c7d4b2fa 752 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M
753 {}
754};
755
1194b5b7
TI
756static struct hda_verb stac9200_eapd_init[] = {
757 /* set dac0mux for dac converter */
758 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
759 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
760 {}
761};
762
e1f0d669
MR
763static struct hda_verb stac92hd73xx_6ch_core_init[] = {
764 /* set master volume and direct control */
765 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
766 /* setup adcs to point to mixer */
767 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
768 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
769 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
770 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
771 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
772 /* setup import muxs */
773 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
774 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
775 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
776 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
777 {}
778};
779
d654a660
MR
780static struct hda_verb dell_eq_core_init[] = {
781 /* set master volume to max value without distortion
782 * and direct control */
783 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d654a660
MR
784 /* setup adcs to point to mixer */
785 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
786 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
787 /* setup import muxs */
788 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
789 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
790 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
791 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
792 {}
793};
794
52fe0f9d 795static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 796 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d
MR
797 /* setup adcs to point to mixer */
798 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
799 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
800 /* setup import muxs */
801 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
802 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
803 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
804 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
805 {}
806};
807
e1f0d669
MR
808static struct hda_verb stac92hd73xx_8ch_core_init[] = {
809 /* set master volume and direct control */
810 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
811 /* setup adcs to point to mixer */
812 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
813 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
814 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
815 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
816 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
817 /* setup import muxs */
818 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
819 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
820 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
821 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
822 {}
823};
824
825static struct hda_verb stac92hd73xx_10ch_core_init[] = {
826 /* set master volume and direct control */
827 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
828 /* dac3 is connected to import3 mux */
829 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
e1f0d669
MR
830 /* setup adcs to point to mixer */
831 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
832 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR
833 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
834 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
835 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
836 /* setup import muxs */
837 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
838 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
839 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
840 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
841 {}
842};
843
d0513fc6 844static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR
845 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
846 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
847 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
848
849 /* power state controls amps */
850 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 851 {}
d0513fc6
MR
852};
853
e035b841 854static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR
855 /* set master volume and direct control */
856 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
541eee87
MR
857 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
858 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
859 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
860 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
574f3c4f 861 {}
541eee87
MR
862};
863
4b33c767 864#define HD_DISABLE_PORTF 2
541eee87 865static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR
866 /* start of config #1 */
867
868 /* connect port 0f to audio mixer */
869 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR
870 /* unmute right and left channels for node 0x0f */
871 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
872 /* start of config #2 */
873
e035b841
MR
874 /* set master volume and direct control */
875 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
aafc4412 876 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR
877 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
878 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
879 {}
880};
881
8e21c34c
TD
882static struct hda_verb stac925x_core_init[] = {
883 /* set dac0mux for dac converter */
884 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI
885 /* mute the master volume */
886 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD
887 {}
888};
889
c7d4b2fa 890static struct hda_verb stac922x_core_init[] = {
2f2f4251 891 /* set master volume and direct control */
c7d4b2fa 892 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M
893 {}
894};
895
93ed1503 896static struct hda_verb d965_core_init[] = {
19039bd0 897 /* set master volume and direct control */
93ed1503 898 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI
899 /* unmute node 0x1b */
900 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
901 /* select node 0x03 as DAC */
902 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
903 {}
904};
905
3cc08dc6
MP
906static struct hda_verb stac927x_core_init[] = {
907 /* set master volume and direct control */
908 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR
909 /* enable analog pc beep path */
910 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP
911 {}
912};
913
f3302a59
MP
914static struct hda_verb stac9205_core_init[] = {
915 /* set master volume and direct control */
916 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR
917 /* enable analog pc beep path */
918 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP
919 {}
920};
921
b22b4821
MR
922#define STAC_MONO_MUX \
923 { \
924 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
925 .name = "Mono Mux", \
926 .count = 1, \
927 .info = stac92xx_mono_mux_enum_info, \
928 .get = stac92xx_mono_mux_enum_get, \
929 .put = stac92xx_mono_mux_enum_put, \
930 }
931
89385035
MR
932#define STAC_AMP_MUX \
933 { \
934 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
935 .name = "Amp Selector Capture Switch", \
936 .count = 1, \
937 .info = stac92xx_amp_mux_enum_info, \
938 .get = stac92xx_amp_mux_enum_get, \
939 .put = stac92xx_amp_mux_enum_put, \
940 }
941
942#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
943 { \
944 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
945 .name = xname, \
946 .index = 0, \
947 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
948 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
949 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
950 .info = stac92xx_amp_volume_info, \
951 .get = stac92xx_amp_volume_get, \
952 .put = stac92xx_amp_volume_put, \
953 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
954 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
955 }
956
9e05b7a3 957#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML
958 { \
959 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
960 .name = "Input Source", \
9e05b7a3 961 .count = cnt, \
ca7c5a8b
ML
962 .info = stac92xx_mux_enum_info, \
963 .get = stac92xx_mux_enum_get, \
964 .put = stac92xx_mux_enum_put, \
965 }
966
e1f0d669 967#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML
968 { \
969 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
970 .name = "Analog Loopback", \
e1f0d669 971 .count = cnt, \
5f10c4a9
ML
972 .info = stac92xx_aloopback_info, \
973 .get = stac92xx_aloopback_get, \
974 .put = stac92xx_aloopback_put, \
975 .private_value = verb_read | (verb_write << 16), \
976 }
977
c8b6bf9b 978static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M
979 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
980 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 981 STAC_INPUT_SOURCE(1),
2f2f4251
M
982 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
983 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M
984 { } /* end */
985};
986
2a9c7816 987#define DELL_M6_MIXER 6
e1f0d669 988static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 989 /* start of config #1 */
e1f0d669
MR
990 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
991 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
992
e1f0d669
MR
993 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
994 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
995
2a9c7816
MR
996 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
997 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
998
999 /* start of config #2 */
1000 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1001 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1002
e1f0d669
MR
1003 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1004 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1005
2a9c7816
MR
1006 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1007
1008 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1009 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1010
1011 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1012 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1013
e1f0d669
MR
1014 { } /* end */
1015};
1016
1017static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR
1018 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1019
e1f0d669
MR
1020 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1021 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1022
1023 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1024 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1025
1026 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1027 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1028
1029 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1030 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1031
1032 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1033 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1034
1035 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1036 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1037
1038 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1039 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1040 { } /* end */
1041};
1042
1043static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR
1044 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1045
e1f0d669
MR
1046 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1047 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1048
1049 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1050 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1051
1052 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1053 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1054
1055 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1056 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1057
1058 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1059 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1060
1061 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1062 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1063
1064 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1065 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1066 { } /* end */
1067};
1068
d0513fc6
MR
1069
1070static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1071 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1072 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1073
1074 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1075 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1076
74b7ff48
MR
1077 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0x3, HDA_INPUT),
1078 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0x3, HDA_INPUT),
d0513fc6 1079
74b7ff48
MR
1080 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x4, HDA_INPUT),
1081 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x4, HDA_INPUT),
d0513fc6 1082
74b7ff48
MR
1083 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x0, HDA_INPUT),
1084 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x0, HDA_INPUT),
d0513fc6 1085
74b7ff48
MR
1086 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x2, HDA_INPUT),
1087 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x2, HDA_INPUT),
d0513fc6
MR
1088
1089 /*
74b7ff48
MR
1090 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x1, HDA_INPUT),
1091 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x1, HDA_INPUT),
d0513fc6
MR
1092 */
1093 { } /* end */
1094};
1095
541eee87 1096static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1097 STAC_INPUT_SOURCE(2),
4b33c767 1098 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1099
9b35947f
MR
1100 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1101 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR
1102
1103 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1104 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR
1105 /* analog pc-beep replaced with digital beep support */
1106 /*
f7c5dda2
MR
1107 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1108 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1109 */
f7c5dda2 1110
687cb98e
MR
1111 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1112 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1113
687cb98e
MR
1114 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1115 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR
1116
1117 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1118 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1119
1120 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1121 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR
1122 { } /* end */
1123};
1124
541eee87 1125static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR
1126 STAC_INPUT_SOURCE(2),
1127 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1128
541eee87
MR
1129 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1130 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR
1131
1132 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1133 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR
1134 { } /* end */
1135};
1136
8e21c34c 1137static struct snd_kcontrol_new stac925x_mixer[] = {
c9280d68
TI
1138 HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
1139 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
9e05b7a3 1140 STAC_INPUT_SOURCE(1),
8e21c34c 1141 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1142 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD
1143 { } /* end */
1144};
1145
9e05b7a3 1146static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1147 STAC_INPUT_SOURCE(2),
e1f0d669 1148 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML
1149
1150 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1151 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1152
1153 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1154 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M
1155 { } /* end */
1156};
1157
19039bd0 1158/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML
1159static struct snd_kcontrol_new stac922x_mixer[] = {
1160 STAC_INPUT_SOURCE(2),
9e05b7a3
ML
1161 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1162 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML
1163
1164 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1165 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI
1166 { } /* end */
1167};
1168
9e05b7a3 1169
d1d985f0 1170static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1171 STAC_INPUT_SOURCE(3),
e1f0d669 1172 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1173
9e05b7a3
ML
1174 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1175 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1176
1177 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1178 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML
1179
1180 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1181 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP
1182 { } /* end */
1183};
1184
1697055e
TI
1185static struct snd_kcontrol_new stac_dmux_mixer = {
1186 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1187 .name = "Digital Input Source",
1188 /* count set later */
1189 .info = stac92xx_dmux_enum_info,
1190 .get = stac92xx_dmux_enum_get,
1191 .put = stac92xx_dmux_enum_put,
1192};
1193
d9737751
MR
1194static struct snd_kcontrol_new stac_smux_mixer = {
1195 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1196 .name = "IEC958 Playback Source",
d9737751
MR
1197 /* count set later */
1198 .info = stac92xx_smux_enum_info,
1199 .get = stac92xx_smux_enum_get,
1200 .put = stac92xx_smux_enum_put,
1201};
1202
2134ea4f
TI
1203static const char *slave_vols[] = {
1204 "Front Playback Volume",
1205 "Surround Playback Volume",
1206 "Center Playback Volume",
1207 "LFE Playback Volume",
1208 "Side Playback Volume",
1209 "Headphone Playback Volume",
1210 "Headphone Playback Volume",
1211 "Speaker Playback Volume",
1212 "External Speaker Playback Volume",
1213 "Speaker2 Playback Volume",
1214 NULL
1215};
1216
1217static const char *slave_sws[] = {
1218 "Front Playback Switch",
1219 "Surround Playback Switch",
1220 "Center Playback Switch",
1221 "LFE Playback Switch",
1222 "Side Playback Switch",
1223 "Headphone Playback Switch",
1224 "Headphone Playback Switch",
1225 "Speaker Playback Switch",
1226 "External Speaker Playback Switch",
1227 "Speaker2 Playback Switch",
edb54a55 1228 "IEC958 Playback Switch",
2134ea4f
TI
1229 NULL
1230};
1231
603c4019 1232static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1233static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1234
2f2f4251
M
1235static int stac92xx_build_controls(struct hda_codec *codec)
1236{
1237 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI
1238 struct auto_pin_cfg *cfg = &spec->autocfg;
1239 hda_nid_t nid;
2f2f4251 1240 int err;
c7d4b2fa 1241 int i;
2f2f4251
M
1242
1243 err = snd_hda_add_new_ctls(codec, spec->mixer);
1244 if (err < 0)
1245 return err;
c7d4b2fa
M
1246
1247 for (i = 0; i < spec->num_mixers; i++) {
1248 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1249 if (err < 0)
1250 return err;
1251 }
1697055e
TI
1252 if (spec->num_dmuxes > 0) {
1253 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1254 err = snd_hda_ctl_add(codec,
1697055e
TI
1255 snd_ctl_new1(&stac_dmux_mixer, codec));
1256 if (err < 0)
1257 return err;
1258 }
d9737751 1259 if (spec->num_smuxes > 0) {
00ef50c2
MR
1260 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1261 struct hda_input_mux *smux = &spec->private_smux;
1262 /* check for mute support on SPDIF out */
1263 if (wcaps & AC_WCAP_OUT_AMP) {
1264 smux->items[smux->num_items].label = "Off";
1265 smux->items[smux->num_items].index = 0;
1266 smux->num_items++;
1267 spec->spdif_mute = 1;
1268 }
d9737751 1269 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1270 err = snd_hda_ctl_add(codec,
d9737751
MR
1271 snd_ctl_new1(&stac_smux_mixer, codec));
1272 if (err < 0)
1273 return err;
1274 }
c7d4b2fa 1275
dabbed6f
M
1276 if (spec->multiout.dig_out_nid) {
1277 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1278 if (err < 0)
1279 return err;
9a08160b
TI
1280 err = snd_hda_create_spdif_share_sw(codec,
1281 &spec->multiout);
1282 if (err < 0)
1283 return err;
1284 spec->multiout.share_spdif = 1;
dabbed6f 1285 }
da74ae3e 1286 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M
1287 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1288 if (err < 0)
1289 return err;
1290 }
2134ea4f
TI
1291
1292 /* if we have no master control, let's create it */
1293 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1294 unsigned int vmaster_tlv[4];
2134ea4f 1295 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1296 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1297 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1298 vmaster_tlv, slave_vols);
2134ea4f
TI
1299 if (err < 0)
1300 return err;
1301 }
1302 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1303 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1304 NULL, slave_sws);
1305 if (err < 0)
1306 return err;
1307 }
1308
603c4019 1309 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI
1310
1311 /* create jack input elements */
1312 if (spec->hp_detect) {
1313 for (i = 0; i < cfg->hp_outs; i++) {
1314 int type = SND_JACK_HEADPHONE;
1315 nid = cfg->hp_pins[i];
1316 /* jack detection */
1317 if (cfg->hp_outs == i)
1318 type |= SND_JACK_LINEOUT;
1319 err = stac92xx_add_jack(codec, nid, type);
1320 if (err < 0)
1321 return err;
1322 }
1323 }
1324 for (i = 0; i < cfg->line_outs; i++) {
1325 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1326 SND_JACK_LINEOUT);
1327 if (err < 0)
1328 return err;
1329 }
1330 for (i = 0; i < AUTO_PIN_LAST; i++) {
1331 nid = cfg->input_pins[i];
1332 if (nid) {
1333 err = stac92xx_add_jack(codec, nid,
1334 SND_JACK_MICROPHONE);
1335 if (err < 0)
1336 return err;
1337 }
1338 }
1339
dabbed6f 1340 return 0;
2f2f4251
M
1341}
1342
403d1944 1343static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1344 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M
1345 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1346};
1347
58eec423
MCC
1348static unsigned int gateway9200_m4_pin_configs[8] = {
1349 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1350 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1351};
1352static unsigned int gateway9200_m4_2_pin_configs[8] = {
1353 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1354 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1355};
1356
1357/*
dfe495d0
TI
1358 STAC 9200 pin configs for
1359 102801A8
1360 102801DE
1361 102801E8
1362*/
1363static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI
1364 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1365 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI
1366};
1367
1368/*
1369 STAC 9200 pin configs for
1370 102801C0
1371 102801C1
1372*/
1373static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI
1374 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1375 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1376};
1377
1378/*
1379 STAC 9200 pin configs for
1380 102801C4 (Dell Dimension E310)
1381 102801C5
1382 102801C7
1383 102801D9
1384 102801DA
1385 102801E3
1386*/
1387static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI
1388 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1389 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1390};
1391
1392
1393/*
1394 STAC 9200-32 pin configs for
1395 102801B5 (Dell Inspiron 630m)
1396 102801D8 (Dell Inspiron 640m)
1397*/
1398static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI
1399 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1400 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1401};
1402
1403/*
1404 STAC 9200-32 pin configs for
1405 102801C2 (Dell Latitude D620)
1406 102801C8
1407 102801CC (Dell Latitude D820)
1408 102801D4
1409 102801D6
1410*/
1411static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI
1412 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1413 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI
1414};
1415
1416/*
1417 STAC 9200-32 pin configs for
1418 102801CE (Dell XPS M1710)
1419 102801CF (Dell Precision M90)
1420*/
1421static unsigned int dell9200_m23_pin_configs[8] = {
1422 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1423 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1424};
1425
1426/*
1427 STAC 9200-32 pin configs for
1428 102801C9
1429 102801CA
1430 102801CB (Dell Latitude 120L)
1431 102801D3
1432*/
1433static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI
1434 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1435 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1436};
1437
1438/*
1439 STAC 9200-32 pin configs for
1440 102801BD (Dell Inspiron E1505n)
1441 102801EE
1442 102801EF
1443*/
1444static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI
1445 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1446 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1447};
1448
1449/*
1450 STAC 9200-32 pin configs for
1451 102801F5 (Dell Inspiron 1501)
1452 102801F6
1453*/
1454static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI
1455 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1456 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1457};
1458
1459/*
1460 STAC 9200-32
1461 102801CD (Dell Inspiron E1705/9400)
1462*/
1463static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI
1464 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1465 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI
1466};
1467
bf277785
TD
1468static unsigned int oqo9200_pin_configs[8] = {
1469 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1470 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1471};
1472
dfe495d0 1473
f5fcc13c
TI
1474static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1475 [STAC_REF] = ref9200_pin_configs,
bf277785 1476 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI
1477 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1478 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1479 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1480 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1481 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1482 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1483 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1484 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1485 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1486 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC
1487 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1488 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1489 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP
1490};
1491
f5fcc13c
TI
1492static const char *stac9200_models[STAC_9200_MODELS] = {
1493 [STAC_REF] = "ref",
bf277785 1494 [STAC_9200_OQO] = "oqo",
dfe495d0
TI
1495 [STAC_9200_DELL_D21] = "dell-d21",
1496 [STAC_9200_DELL_D22] = "dell-d22",
1497 [STAC_9200_DELL_D23] = "dell-d23",
1498 [STAC_9200_DELL_M21] = "dell-m21",
1499 [STAC_9200_DELL_M22] = "dell-m22",
1500 [STAC_9200_DELL_M23] = "dell-m23",
1501 [STAC_9200_DELL_M24] = "dell-m24",
1502 [STAC_9200_DELL_M25] = "dell-m25",
1503 [STAC_9200_DELL_M26] = "dell-m26",
1504 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC
1505 [STAC_9200_M4] = "gateway-m4",
1506 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1507 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI
1508};
1509
1510static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1511 /* SigmaTel reference board */
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1513 "DFI LanParty", STAC_REF),
e7377071 1514 /* Dell laptops have BIOS problem */
dfe495d0
TI
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1516 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI
1518 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1520 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1522 "unknown Dell", STAC_9200_DELL_D22),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1524 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI
1526 "Dell Latitude D620", STAC_9200_DELL_M22),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1528 "unknown Dell", STAC_9200_DELL_D23),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1530 "unknown Dell", STAC_9200_DELL_D23),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1532 "unknown Dell", STAC_9200_DELL_M22),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1534 "unknown Dell", STAC_9200_DELL_M24),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1536 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1538 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1540 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1542 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1544 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI
1546 "Dell Precision M90", STAC_9200_DELL_M23),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1548 "unknown Dell", STAC_9200_DELL_M22),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1550 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1552 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI
1554 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1556 "unknown Dell", STAC_9200_DELL_D23),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1558 "unknown Dell", STAC_9200_DELL_D23),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1560 "unknown Dell", STAC_9200_DELL_D21),
1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1562 "unknown Dell", STAC_9200_DELL_D23),
1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1564 "unknown Dell", STAC_9200_DELL_D21),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1566 "unknown Dell", STAC_9200_DELL_M25),
1567 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1568 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1569 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI
1570 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1571 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1572 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1573 /* Panasonic */
117f257d 1574 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1575 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC
1576 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1577 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1578 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD
1579 /* OQO Mobile */
1580 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP
1581 {} /* terminator */
1582};
1583
8e21c34c
TD
1584static unsigned int ref925x_pin_configs[8] = {
1585 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1586 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD
1587};
1588
9cb36c2a
MCC
1589static unsigned int stac925xM1_pin_configs[8] = {
1590 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1591 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD
1592};
1593
9cb36c2a
MCC
1594static unsigned int stac925xM1_2_pin_configs[8] = {
1595 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1596 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1597};
58eec423 1598
9cb36c2a
MCC
1599static unsigned int stac925xM2_pin_configs[8] = {
1600 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1601 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD
1602};
1603
8e21c34c 1604static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC
1605 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1606 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1607};
1608
9cb36c2a
MCC
1609static unsigned int stac925xM3_pin_configs[8] = {
1610 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1611 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1612};
58eec423 1613
9cb36c2a
MCC
1614static unsigned int stac925xM5_pin_configs[8] = {
1615 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1616 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1617};
1618
9cb36c2a
MCC
1619static unsigned int stac925xM6_pin_configs[8] = {
1620 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1621 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD
1622};
1623
1624static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1625 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC
1626 [STAC_M1] = stac925xM1_pin_configs,
1627 [STAC_M1_2] = stac925xM1_2_pin_configs,
1628 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1629 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC
1630 [STAC_M3] = stac925xM3_pin_configs,
1631 [STAC_M5] = stac925xM5_pin_configs,
1632 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD
1633};
1634
1635static const char *stac925x_models[STAC_925x_MODELS] = {
1636 [STAC_REF] = "ref",
9cb36c2a
MCC
1637 [STAC_M1] = "m1",
1638 [STAC_M1_2] = "m1-2",
1639 [STAC_M2] = "m2",
8e21c34c 1640 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC
1641 [STAC_M3] = "m3",
1642 [STAC_M5] = "m5",
1643 [STAC_M6] = "m6",
8e21c34c
TD
1644};
1645
9cb36c2a 1646static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC
1647 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1648 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1649 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1650 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1651 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC
1652 /* Not sure about the brand name for those */
1653 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1654 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1655 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1656 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1657 {} /* terminator */
8e21c34c
TD
1658};
1659
1660static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1661 /* SigmaTel reference board */
1662 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1663 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC
1664
1665 /* Default table for unknown ID */
1666 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1667
8e21c34c
TD
1668 {} /* terminator */
1669};
1670
a7662640 1671static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR
1672 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1673 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1674 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR
1675 0x01452050,
1676};
1677
1678static unsigned int dell_m6_pin_configs[13] = {
1679 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1680 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1681 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1682 0x4f0000f0,
e1f0d669
MR
1683};
1684
1685static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1686 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI
1687 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1688 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1689 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1690 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR
1691};
1692
1693static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1694 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1695 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI
1696 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1697 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1698 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1699 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR
1700};
1701
1702static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1703 /* SigmaTel reference board */
1704 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR
1705 "DFI LanParty", STAC_92HD73XX_REF),
1706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1707 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1709 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1711 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1713 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1715 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1717 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI
1719 "unknown Dell", STAC_DELL_M6_DMIC),
1720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1721 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1723 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS
1724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1725 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR
1726 {} /* terminator */
1727};
1728
d0513fc6
MR
1729static unsigned int ref92hd83xxx_pin_configs[14] = {
1730 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1731 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1732 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1733 0x01451160, 0x98560170,
1734};
1735
1736static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1737 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1738 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
d0513fc6
MR
1739};
1740
1741static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1742 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1743 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
d0513fc6
MR
1744};
1745
1746static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1747 /* SigmaTel reference board */
1748 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1749 "DFI LanParty", STAC_92HD83XXX_REF),
574f3c4f 1750 {} /* terminator */
d0513fc6
MR
1751};
1752
0ffa9807 1753static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1754 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1755 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1756 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR
1757};
1758
0ffa9807 1759static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1760 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1761 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1762 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1763};
1764
0ffa9807 1765static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR
1766 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1767 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1768 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR
1769};
1770
3a7abfd2
MR
1771static unsigned int dell_m4_3_pin_configs[11] = {
1772 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1773 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1774 0x40f000f0, 0x044413b0, 0x044413b0,
1775};
1776
e035b841
MR
1777static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1778 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR
1779 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1780 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1781 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1782 [STAC_HP_M4] = NULL,
1b0652eb 1783 [STAC_HP_DV5] = NULL,
e035b841
MR
1784};
1785
1786static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1787 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR
1788 [STAC_DELL_M4_1] = "dell-m4-1",
1789 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1790 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1791 [STAC_HP_M4] = "hp-m4",
1b0652eb 1792 [STAC_HP_DV5] = "hp-dv5",
e035b841
MR
1793};
1794
1795static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1796 /* SigmaTel reference board */
1797 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1798 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI
1799 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1800 "HP dv5", STAC_HP_M4),
1801 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
92258a3e 1802 "HP dv7", STAC_HP_DV5),
e0c0e943
TI
1803 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f7,
1804 "HP dv4", STAC_HP_DV5),
69dfaefe
TI
1805 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fc,
1806 "HP dv7", STAC_HP_M4),
42de55cb
TI
1807 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3600,
1808 "HP dv5", STAC_HP_DV5),
dafb70ce 1809 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3603,
1b0652eb 1810 "HP dv5", STAC_HP_DV5),
9a9e2359
MR
1811 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1812 "unknown HP", STAC_HP_M4),
a7662640
MR
1813 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1814 "unknown Dell", STAC_DELL_M4_1),
1815 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1816 "unknown Dell", STAC_DELL_M4_1),
1817 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1818 "unknown Dell", STAC_DELL_M4_1),
1819 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1820 "unknown Dell", STAC_DELL_M4_1),
1821 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1822 "unknown Dell", STAC_DELL_M4_1),
1823 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1824 "unknown Dell", STAC_DELL_M4_1),
1825 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1826 "unknown Dell", STAC_DELL_M4_1),
1827 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1828 "unknown Dell", STAC_DELL_M4_2),
1829 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1830 "unknown Dell", STAC_DELL_M4_2),
1831 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1832 "unknown Dell", STAC_DELL_M4_2),
1833 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1834 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR
1835 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1836 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR
1837 {} /* terminator */
1838};
1839
403d1944
MP
1840static unsigned int ref922x_pin_configs[10] = {
1841 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1842 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M
1843 0x40000100, 0x40000100,
1844};
1845
dfe495d0
TI
1846/*
1847 STAC 922X pin configs for
1848 102801A7
1849 102801AB
1850 102801A9
1851 102801D1
1852 102801D2
1853*/
1854static unsigned int dell_922x_d81_pin_configs[10] = {
1855 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1856 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1857 0x01813122, 0x400001f2,
1858};
1859
1860/*
1861 STAC 922X pin configs for
1862 102801AC
1863 102801D0
1864*/
1865static unsigned int dell_922x_d82_pin_configs[10] = {
1866 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1867 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1868 0x01813122, 0x400001f1,
1869};
1870
1871/*
1872 STAC 922X pin configs for
1873 102801BF
1874*/
1875static unsigned int dell_922x_m81_pin_configs[10] = {
1876 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1877 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1878 0x40C003f1, 0x405003f0,
1879};
1880
1881/*
1882 STAC 9221 A1 pin configs for
1883 102801D7 (Dell XPS M1210)
1884*/
1885static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ
1886 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1887 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI
1888 0x508003f3, 0x405003f4,
1889};
1890
403d1944 1891static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1892 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP
1893 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1894 0x02a19120, 0x40000100,
1895};
1896
1897static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP
1898 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1899 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP
1900 0x02a19320, 0x40000100,
1901};
1902
5d5d3bc3
IZ
1903static unsigned int intel_mac_v1_pin_configs[10] = {
1904 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1905 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1906 0x400000fc, 0x400000fb,
1907};
1908
1909static unsigned int intel_mac_v2_pin_configs[10] = {
1910 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1911 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1912 0x400000fc, 0x400000fb,
6f0778d8
NB
1913};
1914
5d5d3bc3
IZ
1915static unsigned int intel_mac_v3_pin_configs[10] = {
1916 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1917 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI
1918 0x400000fc, 0x400000fb,
1919};
1920
5d5d3bc3
IZ
1921static unsigned int intel_mac_v4_pin_configs[10] = {
1922 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1923 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF
1924 0x400000fc, 0x400000fb,
1925};
1926
5d5d3bc3
IZ
1927static unsigned int intel_mac_v5_pin_configs[10] = {
1928 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1929 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1930 0x400000fc, 0x400000fb,
0dae0f83
TI
1931};
1932
8c650087
MCC
1933static unsigned int ecs202_pin_configs[10] = {
1934 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1935 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1936 0x9037012e, 0x40e000f2,
1937};
76c08828 1938
19039bd0 1939static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1940 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI
1941 [STAC_D945GTP3] = d945gtp3_pin_configs,
1942 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ
1943 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1944 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1945 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1946 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1947 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1948 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1949 /* for backward compatibility */
5d5d3bc3
IZ
1950 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1951 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1952 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1953 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1954 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1955 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1956 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI
1957 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1958 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1959 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1960 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP
1961};
1962
f5fcc13c
TI
1963static const char *stac922x_models[STAC_922X_MODELS] = {
1964 [STAC_D945_REF] = "ref",
1965 [STAC_D945GTP5] = "5stack",
1966 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ
1967 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1968 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1969 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1970 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1971 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1972 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1973 /* for backward compatibility */
f5fcc13c 1974 [STAC_MACMINI] = "macmini",
3fc24d85 1975 [STAC_MACBOOK] = "macbook",
6f0778d8
NB
1976 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1977 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1978 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1979 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1980 [STAC_ECS_202] = "ecs202",
dfe495d0
TI
1981 [STAC_922X_DELL_D81] = "dell-d81",
1982 [STAC_922X_DELL_D82] = "dell-d82",
1983 [STAC_922X_DELL_M81] = "dell-m81",
1984 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI
1985};
1986
1987static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1988 /* SigmaTel reference board */
1989 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1990 "DFI LanParty", STAC_D945_REF),
1991 /* Intel 945G based systems */
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1993 "Intel D945G", STAC_D945GTP3),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1995 "Intel D945G", STAC_D945GTP3),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1997 "Intel D945G", STAC_D945GTP3),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1999 "Intel D945G", STAC_D945GTP3),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2001 "Intel D945G", STAC_D945GTP3),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2003 "Intel D945G", STAC_D945GTP3),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2005 "Intel D945G", STAC_D945GTP3),
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2007 "Intel D945G", STAC_D945GTP3),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2009 "Intel D945G", STAC_D945GTP3),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2011 "Intel D945G", STAC_D945GTP3),
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2013 "Intel D945G", STAC_D945GTP3),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2015 "Intel D945G", STAC_D945GTP3),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2017 "Intel D945G", STAC_D945GTP3),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2019 "Intel D945G", STAC_D945GTP3),
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2021 "Intel D945G", STAC_D945GTP3),
2022 /* Intel D945G 5-stack systems */
2023 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2024 "Intel D945G", STAC_D945GTP5),
2025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2026 "Intel D945G", STAC_D945GTP5),
2027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2028 "Intel D945G", STAC_D945GTP5),
2029 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2030 "Intel D945G", STAC_D945GTP5),
2031 /* Intel 945P based systems */
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2033 "Intel D945P", STAC_D945GTP3),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2035 "Intel D945P", STAC_D945GTP3),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2037 "Intel D945P", STAC_D945GTP3),
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2039 "Intel D945P", STAC_D945GTP3),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2041 "Intel D945P", STAC_D945GTP3),
2042 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2043 "Intel D945P", STAC_D945GTP5),
2044 /* other systems */
536319af 2045 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2046 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2047 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI
2048 /* Dell systems */
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2050 "unknown Dell", STAC_922X_DELL_D81),
2051 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2052 "unknown Dell", STAC_922X_DELL_D81),
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2054 "unknown Dell", STAC_922X_DELL_D81),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2056 "unknown Dell", STAC_922X_DELL_D82),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2058 "unknown Dell", STAC_922X_DELL_M81),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2060 "unknown Dell", STAC_922X_DELL_D82),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2062 "unknown Dell", STAC_922X_DELL_D81),
2063 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2064 "unknown Dell", STAC_922X_DELL_D81),
2065 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2066 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC
2067 /* ECS/PC Chips boards */
2068 SND_PCI_QUIRK(0x1019, 0x2144,
2069 "ECS/PC chips", STAC_ECS_202),
2070 SND_PCI_QUIRK(0x1019, 0x2608,
2071 "ECS/PC chips", STAC_ECS_202),
2072 SND_PCI_QUIRK(0x1019, 0x2633,
2073 "ECS/PC chips P17G/1333", STAC_ECS_202),
2074 SND_PCI_QUIRK(0x1019, 0x2811,
2075 "ECS/PC chips", STAC_ECS_202),
2076 SND_PCI_QUIRK(0x1019, 0x2812,
2077 "ECS/PC chips", STAC_ECS_202),
2078 SND_PCI_QUIRK(0x1019, 0x2813,
2079 "ECS/PC chips", STAC_ECS_202),
2080 SND_PCI_QUIRK(0x1019, 0x2814,
2081 "ECS/PC chips", STAC_ECS_202),
2082 SND_PCI_QUIRK(0x1019, 0x2815,
2083 "ECS/PC chips", STAC_ECS_202),
2084 SND_PCI_QUIRK(0x1019, 0x2816,
2085 "ECS/PC chips", STAC_ECS_202),
2086 SND_PCI_QUIRK(0x1019, 0x2817,
2087 "ECS/PC chips", STAC_ECS_202),
2088 SND_PCI_QUIRK(0x1019, 0x2818,
2089 "ECS/PC chips", STAC_ECS_202),
2090 SND_PCI_QUIRK(0x1019, 0x2819,
2091 "ECS/PC chips", STAC_ECS_202),
2092 SND_PCI_QUIRK(0x1019, 0x2820,
2093 "ECS/PC chips", STAC_ECS_202),
403d1944
MP
2094 {} /* terminator */
2095};
2096
3cc08dc6 2097static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD
2098 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2099 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2100 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2101 0x01c42190, 0x40000100,
3cc08dc6
MP
2102};
2103
93ed1503 2104static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD
2105 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2106 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2107 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2108 0x40000100, 0x40000100
2109};
2110
93ed1503
TD
2111static unsigned int d965_5st_pin_configs[14] = {
2112 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2113 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2114 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2115 0x40000100, 0x40000100
2116};
2117
4ff076e5
TD
2118static unsigned int dell_3st_pin_configs[14] = {
2119 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2120 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2121 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD
2122 0x40c003fc, 0x40000100
2123};
2124
93ed1503 2125static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2126 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR
2127 [STAC_D965_REF] = ref927x_pin_configs,
2128 [STAC_D965_3ST] = d965_3st_pin_configs,
2129 [STAC_D965_5ST] = d965_5st_pin_configs,
2130 [STAC_DELL_3ST] = dell_3st_pin_configs,
2131 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP
2132};
2133
f5fcc13c 2134static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2135 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR
2136 [STAC_D965_REF] = "ref",
2137 [STAC_D965_3ST] = "3stack",
2138 [STAC_D965_5ST] = "5stack",
2139 [STAC_DELL_3ST] = "dell-3stack",
2140 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI
2141};
2142
2143static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2144 /* SigmaTel reference board */
2145 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2146 "DFI LanParty", STAC_D965_REF),
81d3dbde 2147 /* Intel 946 based systems */
f5fcc13c
TI
2148 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2149 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2150 /* 965 based 3 stack systems */
f5fcc13c
TI
2151 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2152 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2153 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2154 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2155 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2157 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2158 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2159 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2160 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2161 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2162 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2163 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2164 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2165 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2166 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2167 /* Dell 3 stack systems */
8e9068b1 2168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD
2170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2172 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR
2173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR
2177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2181 /* 965 based 5 stack systems */
f5fcc13c
TI
2182 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2183 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2184 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2185 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2186 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2187 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2188 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2189 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2190 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP
2191 {} /* terminator */
2192};
2193
f3302a59
MP
2194static unsigned int ref9205_pin_configs[12] = {
2195 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2196 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2197 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP
2198};
2199
dfe495d0
TI
2200/*
2201 STAC 9205 pin configs for
2202 102801F1
2203 102801F2
2204 102801FC
2205 102801FD
2206 10280204
2207 1028021F
3fa2ef74 2208 10280228 (Dell Vostro 1500)
dfe495d0
TI
2209*/
2210static unsigned int dell_9205_m42_pin_configs[12] = {
2211 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2212 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2213 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2214};
2215
2216/*
2217 STAC 9205 pin configs for
2218 102801F9
2219 102801FA
2220 102801FE
2221 102801FF (Dell Precision M4300)
2222 10280206
2223 10280200
2224 10280201
2225*/
2226static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD
2227 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2228 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2229 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2230};
2231
dfe495d0 2232static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD
2233 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2234 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2235 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2236};
2237
f5fcc13c 2238static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2239 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI
2240 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2241 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2242 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP
2243};
2244
f5fcc13c
TI
2245static const char *stac9205_models[STAC_9205_MODELS] = {
2246 [STAC_9205_REF] = "ref",
dfe495d0 2247 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD
2248 [STAC_9205_DELL_M43] = "dell-m43",
2249 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI
2250};
2251
2252static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2253 /* SigmaTel reference board */
2254 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2255 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI
2256 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2257 "unknown Dell", STAC_9205_DELL_M42),
2258 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2259 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2260 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2261 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2262 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2263 "Dell Precision", STAC_9205_DELL_M43),
2264 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2265 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI
2266 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2267 "unknown Dell", STAC_9205_DELL_M42),
2268 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2269 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD
2270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2271 "Dell Precision", STAC_9205_DELL_M43),
2272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2273 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI
2274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2275 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI
2276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2277 "Dell Precision", STAC_9205_DELL_M43),
2278 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2279 "Dell Precision", STAC_9205_DELL_M43),
2280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2281 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2283 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR
2284 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2285 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP
2286 {} /* terminator */
2287};
2288
11b44bbd
RF
2289static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2290{
2291 int i;
2292 struct sigmatel_spec *spec = codec->spec;
2293
af9f341a
TI
2294 kfree(spec->pin_configs);
2295 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2296 GFP_KERNEL);
2297 if (!spec->pin_configs)
2298 return -ENOMEM;
11b44bbd
RF
2299
2300 for (i = 0; i < spec->num_pins; i++) {
2301 hda_nid_t nid = spec->pin_nids[i];
2302 unsigned int pin_cfg;
2303
2304 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2305 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2306 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2307 nid, pin_cfg);
af9f341a 2308 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF
2309 }
2310
2311 return 0;
2312}
2313
87d48363
MR
2314static void stac92xx_set_config_reg(struct hda_codec *codec,
2315 hda_nid_t pin_nid, unsigned int pin_config)
2316{
2317 int i;
2318 snd_hda_codec_write(codec, pin_nid, 0,
2319 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2320 pin_config & 0x000000ff);
2321 snd_hda_codec_write(codec, pin_nid, 0,
2322 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2323 (pin_config & 0x0000ff00) >> 8);
2324 snd_hda_codec_write(codec, pin_nid, 0,
2325 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2326 (pin_config & 0x00ff0000) >> 16);
2327 snd_hda_codec_write(codec, pin_nid, 0,
2328 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2329 pin_config >> 24);
2330 i = snd_hda_codec_read(codec, pin_nid, 0,
2331 AC_VERB_GET_CONFIG_DEFAULT,
2332 0x00);
2333 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2334 pin_nid, i);
2335}
2336
2f2f4251
M
2337static void stac92xx_set_config_regs(struct hda_codec *codec)
2338{
2339 int i;
2340 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2341
87d48363
MR
2342 if (!spec->pin_configs)
2343 return;
11b44bbd 2344
87d48363
MR
2345 for (i = 0; i < spec->num_pins; i++)
2346 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2347 spec->pin_configs[i]);
2f2f4251 2348}
2f2f4251 2349
af9f341a
TI
2350static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2351{
2352 struct sigmatel_spec *spec = codec->spec;
2353
2354 if (!pins)
2355 return stac92xx_save_bios_config_regs(codec);
2356
2357 kfree(spec->pin_configs);
2358 spec->pin_configs = kmemdup(pins,
2359 spec->num_pins * sizeof(*pins),
2360 GFP_KERNEL);
2361 if (!spec->pin_configs)
2362 return -ENOMEM;
2363
2364 stac92xx_set_config_regs(codec);
2365 return 0;
2366}
2367
2368static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2369 unsigned int cfg)
2370{
2371 struct sigmatel_spec *spec = codec->spec;
2372 int i;
2373
2374 for (i = 0; i < spec->num_pins; i++) {
2375 if (spec->pin_nids[i] == nid) {
2376 spec->pin_configs[i] = cfg;
2377 stac92xx_set_config_reg(codec, nid, cfg);
2378 break;
2379 }
2380 }
2381}
2382
dabbed6f 2383/*
c7d4b2fa 2384 * Analog playback callbacks
dabbed6f 2385 */
c7d4b2fa
M
2386static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2387 struct hda_codec *codec,
c8b6bf9b 2388 struct snd_pcm_substream *substream)
2f2f4251 2389{
dabbed6f 2390 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR
2391 if (spec->stream_delay)
2392 msleep(spec->stream_delay);
9a08160b
TI
2393 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2394 hinfo);
2f2f4251
M
2395}
2396
2f2f4251
M
2397static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2398 struct hda_codec *codec,
2399 unsigned int stream_tag,
2400 unsigned int format,
c8b6bf9b 2401 struct snd_pcm_substream *substream)
2f2f4251
M
2402{
2403 struct sigmatel_spec *spec = codec->spec;
403d1944 2404 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M
2405}
2406
2407static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2408 struct hda_codec *codec,
c8b6bf9b 2409 struct snd_pcm_substream *substream)
2f2f4251
M
2410{
2411 struct sigmatel_spec *spec = codec->spec;
2412 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2413}
2414
dabbed6f
M
2415/*
2416 * Digital playback callbacks
2417 */
2418static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2419 struct hda_codec *codec,
c8b6bf9b 2420 struct snd_pcm_substream *substream)
dabbed6f
M
2421{
2422 struct sigmatel_spec *spec = codec->spec;
2423 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2424}
2425
2426static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2427 struct hda_codec *codec,
c8b6bf9b 2428 struct snd_pcm_substream *substream)
dabbed6f
M
2429{
2430 struct sigmatel_spec *spec = codec->spec;
2431 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2432}
2433
6b97eb45
TI
2434static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2435 struct hda_codec *codec,
2436 unsigned int stream_tag,
2437 unsigned int format,
2438 struct snd_pcm_substream *substream)
2439{
2440 struct sigmatel_spec *spec = codec->spec;
2441 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2442 stream_tag, format, substream);
2443}
2444
dabbed6f 2445
2f2f4251
M
2446/*
2447 * Analog capture callbacks
2448 */
2449static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2450 struct hda_codec *codec,
2451 unsigned int stream_tag,
2452 unsigned int format,
c8b6bf9b 2453 struct snd_pcm_substream *substream)
2f2f4251
M
2454{
2455 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2456 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2457
8daaaa97
MR
2458 if (spec->powerdown_adcs) {
2459 msleep(40);
8c2f767b 2460 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR
2461 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2462 }
2463 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M
2464 return 0;
2465}
2466
2467static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2468 struct hda_codec *codec,
c8b6bf9b 2469 struct snd_pcm_substream *substream)
2f2f4251
M
2470{
2471 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2472 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2473
8daaaa97
MR
2474 snd_hda_codec_cleanup_stream(codec, nid);
2475 if (spec->powerdown_adcs)
8c2f767b 2476 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2477 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M
2478 return 0;
2479}
2480
dabbed6f
M
2481static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2482 .substreams = 1,
2483 .channels_min = 2,
2484 .channels_max = 2,
2485 /* NID is set in stac92xx_build_pcms */
2486 .ops = {
2487 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI
2488 .close = stac92xx_dig_playback_pcm_close,
2489 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M
2490 },
2491};
2492
2493static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2494 .substreams = 1,
2495 .channels_min = 2,
2496 .channels_max = 2,
2497 /* NID is set in stac92xx_build_pcms */
2498};
2499
2f2f4251
M
2500static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2501 .substreams = 1,
2502 .channels_min = 2,
c7d4b2fa 2503 .channels_max = 8,
2f2f4251
M
2504 .nid = 0x02, /* NID to query formats and rates */
2505 .ops = {
2506 .open = stac92xx_playback_pcm_open,
2507 .prepare = stac92xx_playback_pcm_prepare,
2508 .cleanup = stac92xx_playback_pcm_cleanup
2509 },
2510};
2511
3cc08dc6
MP
2512static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2513 .substreams = 1,
2514 .channels_min = 2,
2515 .channels_max = 2,
2516 .nid = 0x06, /* NID to query formats and rates */
2517 .ops = {
2518 .open = stac92xx_playback_pcm_open,
2519 .prepare = stac92xx_playback_pcm_prepare,
2520 .cleanup = stac92xx_playback_pcm_cleanup
2521 },
2522};
2523
2f2f4251 2524static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M
2525 .channels_min = 2,
2526 .channels_max = 2,
9e05b7a3 2527 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M
2528 .ops = {
2529 .prepare = stac92xx_capture_pcm_prepare,
2530 .cleanup = stac92xx_capture_pcm_cleanup
2531 },
2532};
2533
2534static int stac92xx_build_pcms(struct hda_codec *codec)
2535{
2536 struct sigmatel_spec *spec = codec->spec;
2537 struct hda_pcm *info = spec->pcm_rec;
2538
2539 codec->num_pcms = 1;
2540 codec->pcm_info = info;
2541
c7d4b2fa 2542 info->name = "STAC92xx Analog";
2f2f4251 2543 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI
2544 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2545 spec->multiout.dac_nids[0];
2f2f4251 2546 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2547 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2548 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP
2549
2550 if (spec->alt_switch) {
2551 codec->num_pcms++;
2552 info++;
2553 info->name = "STAC92xx Analog Alt";
2554 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2555 }
2f2f4251 2556
dabbed6f
M
2557 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2558 codec->num_pcms++;
2559 info++;
2560 info->name = "STAC92xx Digital";
7ba72ba1 2561 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M
2562 if (spec->multiout.dig_out_nid) {
2563 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2564 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2565 }
2566 if (spec->dig_in_nid) {
2567 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2568 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2569 }
2570 }
2571
2f2f4251
M
2572 return 0;
2573}
2574
c960a03b
TI
2575static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2576{
2577 unsigned int pincap = snd_hda_param_read(codec, nid,
2578 AC_PAR_PIN_CAP);
2579 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2580 if (pincap & AC_PINCAP_VREF_100)
2581 return AC_PINCTL_VREF_100;
2582 if (pincap & AC_PINCAP_VREF_80)
2583 return AC_PINCTL_VREF_80;
2584 if (pincap & AC_PINCAP_VREF_50)
2585 return AC_PINCTL_VREF_50;
2586 if (pincap & AC_PINCAP_VREF_GRD)
2587 return AC_PINCTL_VREF_GRD;
2588 return 0;
2589}
2590
403d1944
MP
2591static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2592
2593{
82beb8fd
TI
2594 snd_hda_codec_write_cache(codec, nid, 0,
2595 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP
2596}
2597
7c2ba97b
MR
2598#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2599
2600static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2601 struct snd_ctl_elem_value *ucontrol)
2602{
2603 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2604 struct sigmatel_spec *spec = codec->spec;
2605
d7a89436 2606 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR
2607 return 0;
2608}
2609
c6e4c666
TI
2610static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2611 unsigned char type);
2612
7c2ba97b
MR
2613static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2614 struct snd_ctl_elem_value *ucontrol)
2615{
2616 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2617 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI
2618 int nid = kcontrol->private_value;
2619
2620 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR
2621
2622 /* check to be sure that the ports are upto date with
2623 * switch changes
2624 */
c6e4c666 2625 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR
2626
2627 return 1;
2628}
2629
a5ce8890 2630#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP
2631
2632static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2633{
2634 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2635 struct sigmatel_spec *spec = codec->spec;
2636 int io_idx = kcontrol-> private_value & 0xff;
2637
2638 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2639 return 0;
2640}
2641
2642static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2643{
2644 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2645 struct sigmatel_spec *spec = codec->spec;
2646 hda_nid_t nid = kcontrol->private_value >> 8;
2647 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2648 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP
2649
2650 spec->io_switch[io_idx] = val;
2651
2652 if (val)
2653 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI
2654 else {
2655 unsigned int pinctl = AC_PINCTL_IN_EN;
2656 if (io_idx) /* set VREF for mic */
2657 pinctl |= stac92xx_get_vref(codec, nid);
2658 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2659 }
40c1d308
JZ
2660
2661 /* check the auto-mute again: we need to mute/unmute the speaker
2662 * appropriately according to the pin direction
2663 */
2664 if (spec->hp_detect)
c6e4c666 2665 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2666
403d1944
MP
2667 return 1;
2668}
2669
0fb87bb4
ML
2670#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2671
2672static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2673 struct snd_ctl_elem_value *ucontrol)
2674{
2675 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2676 struct sigmatel_spec *spec = codec->spec;
2677
2678 ucontrol->value.integer.value[0] = spec->clfe_swap;
2679 return 0;
2680}
2681
2682static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2683 struct snd_ctl_elem_value *ucontrol)
2684{
2685 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2686 struct sigmatel_spec *spec = codec->spec;
2687 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2688 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2689
68ea7b2f 2690 if (spec->clfe_swap == val)
0fb87bb4
ML
2691 return 0;
2692
68ea7b2f 2693 spec->clfe_swap = val;
0fb87bb4
ML
2694
2695 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2696 spec->clfe_swap ? 0x4 : 0x0);
2697
2698 return 1;
2699}
2700
7c2ba97b
MR
2701#define STAC_CODEC_HP_SWITCH(xname) \
2702 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2703 .name = xname, \
2704 .index = 0, \
2705 .info = stac92xx_hp_switch_info, \
2706 .get = stac92xx_hp_switch_get, \
2707 .put = stac92xx_hp_switch_put, \
2708 }
2709
403d1944
MP
2710#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2711 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2712 .name = xname, \
2713 .index = 0, \
2714 .info = stac92xx_io_switch_info, \
2715 .get = stac92xx_io_switch_get, \
2716 .put = stac92xx_io_switch_put, \
2717 .private_value = xpval, \
2718 }
2719
0fb87bb4
ML
2720#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2721 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2722 .name = xname, \
2723 .index = 0, \
2724 .info = stac92xx_clfe_switch_info, \
2725 .get = stac92xx_clfe_switch_get, \
2726 .put = stac92xx_clfe_switch_put, \
2727 .private_value = xpval, \
2728 }
403d1944 2729
c7d4b2fa
M
2730enum {
2731 STAC_CTL_WIDGET_VOL,
2732 STAC_CTL_WIDGET_MUTE,
09a99959 2733 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR
2734 STAC_CTL_WIDGET_AMP_MUX,
2735 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2736 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2737 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2738 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M
2739};
2740
c8b6bf9b 2741static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M
2742 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2743 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2744 STAC_MONO_MUX,
89385035
MR
2745 STAC_AMP_MUX,
2746 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2747 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2748 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2749 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M
2750};
2751
2752/* add dynamic controls */
4d4e9bb3
TI
2753static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2754 struct snd_kcontrol_new *ktemp,
2755 int idx, const char *name,
2756 unsigned long val)
c7d4b2fa 2757{
c8b6bf9b 2758 struct snd_kcontrol_new *knew;
c7d4b2fa 2759
603c4019
TI
2760 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2761 knew = snd_array_new(&spec->kctls);
2762 if (!knew)
2763 return -ENOMEM;
4d4e9bb3 2764 *knew = *ktemp;
4682eee0 2765 knew->index = idx;
82fe0c58 2766 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2767 if (!knew->name)
c7d4b2fa
M
2768 return -ENOMEM;
2769 knew->private_value = val;
c7d4b2fa
M
2770 return 0;
2771}
2772
4d4e9bb3
TI
2773static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2774 int type, int idx, const char *name,
2775 unsigned long val)
2776{
2777 return stac92xx_add_control_temp(spec,
2778 &stac92xx_control_templates[type],
2779 idx, name, val);
2780}
2781
4682eee0
MR
2782
2783/* add dynamic controls */
4d4e9bb3
TI
2784static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2785 const char *name, unsigned long val)
4682eee0
MR
2786{
2787 return stac92xx_add_control_idx(spec, type, 0, name, val);
2788}
2789
c21ca4a8
TI
2790/* check whether the line-input can be used as line-out */
2791static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP
2792{
2793 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2794 struct auto_pin_cfg *cfg = &spec->autocfg;
2795 hda_nid_t nid;
2796 unsigned int pincap;
8e9068b1 2797
c21ca4a8
TI
2798 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2799 return 0;
2800 nid = cfg->input_pins[AUTO_PIN_LINE];
2801 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2802 if (pincap & AC_PINCAP_OUT)
2803 return nid;
2804 return 0;
2805}
403d1944 2806
c21ca4a8
TI
2807/* check whether the mic-input can be used as line-out */
2808static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2809{
2810 struct sigmatel_spec *spec = codec->spec;
2811 struct auto_pin_cfg *cfg = &spec->autocfg;
2812 unsigned int def_conf, pincap;
2813 unsigned int mic_pin;
2814
2815 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2816 return 0;
2817 mic_pin = AUTO_PIN_MIC;
2818 for (;;) {
2819 hda_nid_t nid = cfg->input_pins[mic_pin];
2820 def_conf = snd_hda_codec_read(codec, nid, 0,
2821 AC_VERB_GET_CONFIG_DEFAULT, 0);
2822 /* some laptops have an internal analog microphone
2823 * which can't be used as a output */
2824 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2825 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2826 if (pincap & AC_PINCAP_OUT)
2827 return nid;
403d1944 2828 }
c21ca4a8
TI
2829 if (mic_pin == AUTO_PIN_MIC)
2830 mic_pin = AUTO_PIN_FRONT_MIC;
2831 else
2832 break;
403d1944 2833 }
403d1944
MP
2834 return 0;
2835}
2836
7b043899
SL
2837static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2838{
2839 int i;
2840
2841 for (i = 0; i < spec->multiout.num_dacs; i++) {
2842 if (spec->multiout.dac_nids[i] == nid)
2843 return 1;
2844 }
2845
2846 return 0;
2847}
2848
c21ca4a8
TI
2849static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2850{
2851 int i;
2852 if (is_in_dac_nids(spec, nid))
2853 return 1;
2854 for (i = 0; i < spec->autocfg.hp_outs; i++)
2855 if (spec->hp_dacs[i] == nid)
2856 return 1;
2857 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2858 if (spec->speaker_dacs[i] == nid)
2859 return 1;
2860 return 0;
2861}
2862
2863static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2864{
2865 struct sigmatel_spec *spec = codec->spec;
2866 int j, conn_len;
2867 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2868 unsigned int wcaps, wtype;
2869
2870 conn_len = snd_hda_get_connections(codec, nid, conn,
2871 HDA_MAX_CONNECTIONS);
2872 for (j = 0; j < conn_len; j++) {
2873 wcaps = snd_hda_param_read(codec, conn[j],
2874 AC_PAR_AUDIO_WIDGET_CAP);
2875 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2876 /* we check only analog outputs */
2877 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2878 continue;
2879 /* if this route has a free DAC, assign it */
2880 if (!check_all_dac_nids(spec, conn[j])) {
2881 if (conn_len > 1) {
2882 /* select this DAC in the pin's input mux */
2883 snd_hda_codec_write_cache(codec, nid, 0,
2884 AC_VERB_SET_CONNECT_SEL, j);
2885 }
2886 return conn[j];
2887 }
2888 }
2889 return 0;
2890}
2891
2892static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2893static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2894
3cc08dc6 2895/*
7b043899
SL
2896 * Fill in the dac_nids table from the parsed pin configuration
2897 * This function only works when every pin in line_out_pins[]
2898 * contains atleast one DAC in its connection list. Some 92xx
2899 * codecs are not connected directly to a DAC, such as the 9200
2900 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2901 */
c21ca4a8 2902static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M
2903{
2904 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2905 struct auto_pin_cfg *cfg = &spec->autocfg;
2906 int i;
2907 hda_nid_t nid, dac;
7b043899 2908
c7d4b2fa
M
2909 for (i = 0; i < cfg->line_outs; i++) {
2910 nid = cfg->line_out_pins[i];
c21ca4a8
TI
2911 dac = get_unassigned_dac(codec, nid);
2912 if (!dac) {
df802952
TI
2913 if (spec->multiout.num_dacs > 0) {
2914 /* we have already working output pins,
2915 * so let's drop the broken ones again
2916 */
2917 cfg->line_outs = spec->multiout.num_dacs;
2918 break;
2919 }
7b043899
SL
2920 /* error out, no available DAC found */
2921 snd_printk(KERN_ERR
2922 "%s: No available DAC for pin 0x%x\n",
2923 __func__, nid);
2924 return -ENODEV;
2925 }
c21ca4a8
TI
2926 add_spec_dacs(spec, dac);
2927 }
7b043899 2928
c21ca4a8
TI
2929 /* add line-in as output */
2930 nid = check_line_out_switch(codec);
2931 if (nid) {
2932 dac = get_unassigned_dac(codec, nid);
2933 if (dac) {
2934 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2935 nid, cfg->line_outs);
2936 cfg->line_out_pins[cfg->line_outs] = nid;
2937 cfg->line_outs++;
2938 spec->line_switch = nid;
2939 add_spec_dacs(spec, dac);
2940 }
2941 }
2942 /* add mic as output */
2943 nid = check_mic_out_switch(codec);
2944 if (nid) {
2945 dac = get_unassigned_dac(codec, nid);
2946 if (dac) {
2947 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2948 nid, cfg->line_outs);
2949 cfg->line_out_pins[cfg->line_outs] = nid;
2950 cfg->line_outs++;
2951 spec->mic_switch = nid;
2952 add_spec_dacs(spec, dac);
2953 }
2954 }
c7d4b2fa 2955
c21ca4a8
TI
2956 for (i = 0; i < cfg->hp_outs; i++) {
2957 nid = cfg->hp_pins[i];
2958 dac = get_unassigned_dac(codec, nid);
2959 if (dac) {
2960 if (!spec->multiout.hp_nid)
2961 spec->multiout.hp_nid = dac;
2962 else
2963 add_spec_extra_dacs(spec, dac);
7b043899 2964 }
c21ca4a8
TI
2965 spec->hp_dacs[i] = dac;
2966 }
2967
2968 for (i = 0; i < cfg->speaker_outs; i++) {
2969 nid = cfg->speaker_pins[i];
2970 dac = get_unassigned_dac(codec, nid);
2971 if (dac)
2972 add_spec_extra_dacs(spec, dac);
2973 spec->speaker_dacs[i] = dac;
7b043899 2974 }
c7d4b2fa 2975
c21ca4a8 2976 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL
2977 spec->multiout.num_dacs,
2978 spec->multiout.dac_nids[0],
2979 spec->multiout.dac_nids[1],
2980 spec->multiout.dac_nids[2],
2981 spec->multiout.dac_nids[3],
2982 spec->multiout.dac_nids[4]);
c21ca4a8 2983
c7d4b2fa
M
2984 return 0;
2985}
2986
eb06ed8f
TI
2987/* create volume control/switch for the given prefx type */
2988static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2989{
2990 char name[32];
2991 int err;
2992
2993 sprintf(name, "%s Playback Volume", pfx);
2994 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2995 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2996 if (err < 0)
2997 return err;
2998 sprintf(name, "%s Playback Switch", pfx);
2999 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
3000 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3001 if (err < 0)
3002 return err;
3003 return 0;
3004}
3005
ae0afd81
MR
3006static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3007{
c21ca4a8 3008 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR
3009 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3010 return 1;
3011 } else {
3012 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3013 spec->multiout.num_dacs++;
3014 }
3015 return 0;
3016}
3017
c21ca4a8 3018static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3019{
c21ca4a8
TI
3020 int i;
3021 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3022 if (!spec->multiout.extra_out_nid[i]) {
3023 spec->multiout.extra_out_nid[i] = nid;
3024 return 0;
3025 }
3026 }
3027 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3028 return 1;
ae0afd81
MR
3029}
3030
76624534
TI
3031static int is_unique_dac(struct sigmatel_spec *spec, hda_nid_t nid)
3032{
3033 int i;
3034
3035 if (spec->autocfg.line_outs != 1)
3036 return 0;
3037 if (spec->multiout.hp_nid == nid)
3038 return 0;
3039 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++)
3040 if (spec->multiout.extra_out_nid[i] == nid)
3041 return 0;
3042 return 1;
3043}
3044
c7d4b2fa 3045/* add playback controls from the parsed DAC table */
0fb87bb4 3046static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 3047 const struct auto_pin_cfg *cfg)
c7d4b2fa 3048{
76624534 3049 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI
3050 static const char *chname[4] = {
3051 "Front", "Surround", NULL /*CLFE*/, "Side"
3052 };
d21995e3 3053 hda_nid_t nid = 0;
91589232
TI
3054 int i, err;
3055 unsigned int wid_caps;
0fb87bb4 3056
c21ca4a8 3057 for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) {
c7d4b2fa 3058 nid = spec->multiout.dac_nids[i];
c7d4b2fa
M
3059 if (i == 2) {
3060 /* Center/LFE */
eb06ed8f
TI
3061 err = create_controls(spec, "Center", nid, 1);
3062 if (err < 0)
c7d4b2fa 3063 return err;
eb06ed8f
TI
3064 err = create_controls(spec, "LFE", nid, 2);
3065 if (err < 0)
c7d4b2fa 3066 return err;
0fb87bb4
ML
3067
3068 wid_caps = get_wcaps(codec, nid);
3069
3070 if (wid_caps & AC_WCAP_LR_SWAP) {
3071 err = stac92xx_add_control(spec,
3072 STAC_CTL_WIDGET_CLFE_SWITCH,
3073 "Swap Center/LFE Playback Switch", nid);
3074
3075 if (err < 0)
3076 return err;
3077 }
3078
c7d4b2fa 3079 } else {
76624534
TI
3080 const char *name = chname[i];
3081 /* if it's a single DAC, assign a better name */
3082 if (!i && is_unique_dac(spec, nid)) {
3083 switch (cfg->line_out_type) {
3084 case AUTO_PIN_HP_OUT:
3085 name = "Headphone";
3086 break;
3087 case AUTO_PIN_SPEAKER_OUT:
3088 name = "Speaker";
3089 break;
3090 }
3091 }
3092 err = create_controls(spec, name, nid, 3);
eb06ed8f 3093 if (err < 0)
c7d4b2fa
M
3094 return err;
3095 }
3096 }
3097
a9cb5c90 3098 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR
3099 err = stac92xx_add_control(spec,
3100 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI
3101 "Headphone as Line Out Switch",
3102 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR
3103 if (err < 0)
3104 return err;
3105 }
3106
b5895dc8 3107 if (spec->line_switch) {
c21ca4a8
TI
3108 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3109 "Line In as Output Switch",
3110 spec->line_switch << 8);
3111 if (err < 0)
3112 return err;
b5895dc8 3113 }
403d1944 3114
b5895dc8 3115 if (spec->mic_switch) {
c21ca4a8
TI
3116 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3117 "Mic as Output Switch",
3118 (spec->mic_switch << 8) | 1);
3119 if (err < 0)
3120 return err;
b5895dc8 3121 }
403d1944 3122
c7d4b2fa
M
3123 return 0;
3124}
3125
eb06ed8f
TI
3126/* add playback controls for Speaker and HP outputs */
3127static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3128 struct auto_pin_cfg *cfg)
3129{
3130 struct sigmatel_spec *spec = codec->spec;
3131 hda_nid_t nid;
c21ca4a8 3132 int i, err, nums;
eb06ed8f 3133
c21ca4a8 3134 nums = 0;
eb06ed8f 3135 for (i = 0; i < cfg->hp_outs; i++) {
c21ca4a8
TI
3136 static const char *pfxs[] = {
3137 "Headphone", "Headphone2", "Headphone3",
3138 };
eb06ed8f
TI
3139 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3140 if (wid_caps & AC_WCAP_UNSOL_CAP)
3141 spec->hp_detect = 1;
c21ca4a8 3142 if (nums >= ARRAY_SIZE(pfxs))
c7d4b2fa 3143 continue;
c21ca4a8
TI
3144 nid = spec->hp_dacs[i];
3145 if (!nid)
eb06ed8f 3146 continue;
c21ca4a8
TI
3147 err = create_controls(spec, pfxs[nums++], nid, 3);
3148 if (err < 0)
3149 return err;
1b290a51 3150 }
c21ca4a8
TI
3151 nums = 0;
3152 for (i = 0; i < cfg->speaker_outs; i++) {
eb06ed8f
TI
3153 static const char *pfxs[] = {
3154 "Speaker", "External Speaker", "Speaker2",
3155 };
c21ca4a8
TI
3156 if (nums >= ARRAY_SIZE(pfxs))
3157 continue;
3158 nid = spec->speaker_dacs[i];
3159 if (!nid)
3160 continue;
3161 err = create_controls(spec, pfxs[nums++], nid, 3);
eb06ed8f
TI
3162 if (err < 0)
3163 return err;
3164 }
c7d4b2fa
M
3165 return 0;
3166}
3167
b22b4821 3168/* labels for mono mux outputs */
d0513fc6
MR
3169static const char *stac92xx_mono_labels[4] = {
3170 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR
3171};
3172
3173/* create mono mux for mono out on capable codecs */
3174static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3175{
3176 struct sigmatel_spec *spec = codec->spec;
3177 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3178 int i, num_cons;
3179 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3180
3181 num_cons = snd_hda_get_connections(codec,
3182 spec->mono_nid,
3183 con_lst,
3184 HDA_MAX_NUM_INPUTS);
3185 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3186 return -EINVAL;
3187
3188 for (i = 0; i < num_cons; i++) {
3189 mono_mux->items[mono_mux->num_items].label =
3190 stac92xx_mono_labels[i];
3191 mono_mux->items[mono_mux->num_items].index = i;
3192 mono_mux->num_items++;
3193 }
09a99959
MR
3194
3195 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3196 "Mono Mux", spec->mono_nid);
b22b4821
MR
3197}
3198
89385035
MR
3199/* labels for amp mux outputs */
3200static const char *stac92xx_amp_labels[3] = {
4b33c767 3201 "Front Microphone", "Microphone", "Line In",
89385035
MR
3202};
3203
3204/* create amp out controls mux on capable codecs */
3205static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3206{
3207 struct sigmatel_spec *spec = codec->spec;
3208 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3209 int i, err;
3210
2a9c7816 3211 for (i = 0; i < spec->num_amps; i++) {
89385035
MR
3212 amp_mux->items[amp_mux->num_items].label =
3213 stac92xx_amp_labels[i];
3214 amp_mux->items[amp_mux->num_items].index = i;
3215 amp_mux->num_items++;
3216 }
3217
2a9c7816
MR
3218 if (spec->num_amps > 1) {
3219 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3220 "Amp Selector Capture Switch", 0);
3221 if (err < 0)
3222 return err;
3223 }
89385035
MR
3224 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3225 "Amp Capture Volume",
3226 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3227}
3228
3229
1cd2224c
MR
3230/* create PC beep volume controls */
3231static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3232 hda_nid_t nid)
3233{
3234 struct sigmatel_spec *spec = codec->spec;
3235 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3236 int err;
3237
3238 /* check for mute support for the the amp */
3239 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3240 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3241 "PC Beep Playback Switch",
3242 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3243 if (err < 0)
3244 return err;
3245 }
3246
3247 /* check to see if there is volume support for the amp */
3248 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3249 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3250 "PC Beep Playback Volume",
3251 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3252 if (err < 0)
3253 return err;
3254 }
3255 return 0;
3256}
3257
4d4e9bb3
TI
3258#ifdef CONFIG_SND_HDA_INPUT_BEEP
3259#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3260
3261static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3262 struct snd_ctl_elem_value *ucontrol)
3263{
3264 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3265 ucontrol->value.integer.value[0] = codec->beep->enabled;
3266 return 0;
3267}
3268
3269static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3270 struct snd_ctl_elem_value *ucontrol)
3271{
3272 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3273 int enabled = !!ucontrol->value.integer.value[0];
3274 if (codec->beep->enabled != enabled) {
3275 codec->beep->enabled = enabled;
3276 return 1;
3277 }
3278 return 0;
3279}
3280
3281static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3282 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3283 .info = stac92xx_dig_beep_switch_info,
3284 .get = stac92xx_dig_beep_switch_get,
3285 .put = stac92xx_dig_beep_switch_put,
3286};
3287
3288static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3289{
3290 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3291 0, "PC Beep Playback Switch", 0);
3292}
3293#endif
3294
4682eee0
MR
3295static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3296{
3297 struct sigmatel_spec *spec = codec->spec;
3298 int wcaps, nid, i, err = 0;
3299
3300 for (i = 0; i < spec->num_muxes; i++) {
3301 nid = spec->mux_nids[i];
3302 wcaps = get_wcaps(codec, nid);
3303
3304 if (wcaps & AC_WCAP_OUT_AMP) {
3305 err = stac92xx_add_control_idx(spec,
3306 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3307 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3308 if (err < 0)
3309 return err;
3310 }
3311 }
3312 return 0;
3313};
3314
d9737751 3315static const char *stac92xx_spdif_labels[3] = {
65973632 3316 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR
3317};
3318
3319static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3320{
3321 struct sigmatel_spec *spec = codec->spec;
3322 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3323 const char **labels = spec->spdif_labels;
d9737751 3324 int i, num_cons;
65973632 3325 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR
3326
3327 num_cons = snd_hda_get_connections(codec,
3328 spec->smux_nids[0],
3329 con_lst,
3330 HDA_MAX_NUM_INPUTS);
65973632 3331 if (!num_cons)
d9737751
MR
3332 return -EINVAL;
3333
65973632
MR
3334 if (!labels)
3335 labels = stac92xx_spdif_labels;
3336
d9737751 3337 for (i = 0; i < num_cons; i++) {
65973632 3338 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR
3339 spdif_mux->items[spdif_mux->num_items].index = i;
3340 spdif_mux->num_items++;
3341 }
3342
3343 return 0;
3344}
3345
8b65727b 3346/* labels for dmic mux inputs */
ddc2cec4 3347static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP
3348 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3349 "Digital Mic 3", "Digital Mic 4"
3350};
3351
3352/* create playback/capture controls for input pins on dmic capable codecs */
3353static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3354 const struct auto_pin_cfg *cfg)
3355{
3356 struct sigmatel_spec *spec = codec->spec;
3357 struct hda_input_mux *dimux = &spec->private_dimux;
3358 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR
3359 int err, i, j;
3360 char name[32];
8b65727b
MP
3361
3362 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3363 dimux->items[dimux->num_items].index = 0;
3364 dimux->num_items++;
3365
3366 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3367 hda_nid_t nid;
8b65727b
MP
3368 int index;
3369 int num_cons;
0678accd 3370 unsigned int wcaps;
8b65727b
MP
3371 unsigned int def_conf;
3372
3373 def_conf = snd_hda_codec_read(codec,
3374 spec->dmic_nids[i],
3375 0,
3376 AC_VERB_GET_CONFIG_DEFAULT,
3377 0);
3378 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3379 continue;
3380
0678accd 3381 nid = spec->dmic_nids[i];
8b65727b 3382 num_cons = snd_hda_get_connections(codec,
e1f0d669 3383 spec->dmux_nids[0],
8b65727b
MP
3384 con_lst,
3385 HDA_MAX_NUM_INPUTS);
3386 for (j = 0; j < num_cons; j++)
0678accd 3387 if (con_lst[j] == nid) {
8b65727b
MP
3388 index = j;
3389 goto found;
3390 }
3391 continue;
3392found:
d0513fc6
MR
3393 wcaps = get_wcaps(codec, nid) &
3394 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3395
d0513fc6 3396 if (wcaps) {
0678accd
MR
3397 sprintf(name, "%s Capture Volume",
3398 stac92xx_dmic_labels[dimux->num_items]);
3399
3400 err = stac92xx_add_control(spec,
3401 STAC_CTL_WIDGET_VOL,
3402 name,
d0513fc6
MR
3403 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3404 (wcaps & AC_WCAP_OUT_AMP) ?
3405 HDA_OUTPUT : HDA_INPUT));
0678accd
MR
3406 if (err < 0)
3407 return err;
3408 }
3409
8b65727b
MP
3410 dimux->items[dimux->num_items].label =
3411 stac92xx_dmic_labels[dimux->num_items];
3412 dimux->items[dimux->num_items].index = index;
3413 dimux->num_items++;
3414 }
3415
3416 return 0;
3417}
3418
c7d4b2fa
M
3419/* create playback/capture controls for input pins */
3420static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3421{
3422 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
3423 struct hda_input_mux *imux = &spec->private_imux;
3424 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3425 int i, j, k;
3426
3427 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI
3428 int index;
3429
3430 if (!cfg->input_pins[i])
3431 continue;
3432 index = -1;
3433 for (j = 0; j < spec->num_muxes; j++) {
3434 int num_cons;
3435 num_cons = snd_hda_get_connections(codec,
3436 spec->mux_nids[j],
3437 con_lst,
3438 HDA_MAX_NUM_INPUTS);
3439 for (k = 0; k < num_cons; k++)
3440 if (con_lst[k] == cfg->input_pins[i]) {
3441 index = k;
3442 goto found;
3443 }
c7d4b2fa 3444 }
314634bc
TI
3445 continue;
3446 found:
3447 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3448 imux->items[imux->num_items].index = index;
3449 imux->num_items++;
c7d4b2fa
M
3450 }
3451
7b043899 3452 if (imux->num_items) {
62fe78e9
SR
3453 /*
3454 * Set the current input for the muxes.
3455 * The STAC9221 has two input muxes with identical source
3456 * NID lists. Hopefully this won't get confused.
3457 */
3458 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI
3459 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3460 AC_VERB_SET_CONNECT_SEL,
3461 imux->items[0].index);
62fe78e9
SR
3462 }
3463 }
3464
c7d4b2fa
M
3465 return 0;
3466}
3467
c7d4b2fa
M
3468static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3469{
3470 struct sigmatel_spec *spec = codec->spec;
3471 int i;
3472
3473 for (i = 0; i < spec->autocfg.line_outs; i++) {
3474 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3475 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3476 }
3477}
3478
3479static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3480{
3481 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3482 int i;
c7d4b2fa 3483
eb06ed8f
TI
3484 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3485 hda_nid_t pin;
3486 pin = spec->autocfg.hp_pins[i];
3487 if (pin) /* connect to front */
3488 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3489 }
3490 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3491 hda_nid_t pin;
3492 pin = spec->autocfg.speaker_pins[i];
3493 if (pin) /* connect to front */
3494 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3495 }
c7d4b2fa
M
3496}
3497
3cc08dc6 3498static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M
3499{
3500 struct sigmatel_spec *spec = codec->spec;
3501 int err;
3502
8b65727b
MP
3503 if ((err = snd_hda_parse_pin_def_config(codec,
3504 &spec->autocfg,
3505 spec->dmic_nids)) < 0)
c7d4b2fa 3506 return err;
82bc955f 3507 if (! spec->autocfg.line_outs)
869264c4 3508 return 0; /* can't find valid pin config */
19039bd0 3509
bcecd9bd
JZ
3510 /* If we have no real line-out pin and multiple hp-outs, HPs should
3511 * be set up as multi-channel outputs.
3512 */
3513 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3514 spec->autocfg.hp_outs > 1) {
3515 /* Copy hp_outs to line_outs, backup line_outs in
3516 * speaker_outs so that the following routines can handle
3517 * HP pins as primary outputs.
3518 */
c21ca4a8 3519 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ
3520 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3521 sizeof(spec->autocfg.line_out_pins));
3522 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3523 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3524 sizeof(spec->autocfg.hp_pins));
3525 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI
3526 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3527 spec->autocfg.hp_outs = 0;
bcecd9bd 3528 }
09a99959 3529 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR
3530 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3531 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR
3532 u32 caps = query_amp_caps(codec,
3533 spec->autocfg.mono_out_pin, dir);
3534 hda_nid_t conn_list[1];
3535
3536 /* get the mixer node and then the mono mux if it exists */
3537 if (snd_hda_get_connections(codec,
3538 spec->autocfg.mono_out_pin, conn_list, 1) &&
3539 snd_hda_get_connections(codec, conn_list[0],
3540 conn_list, 1)) {
3541
3542 int wcaps = get_wcaps(codec, conn_list[0]);
3543 int wid_type = (wcaps & AC_WCAP_TYPE)
3544 >> AC_WCAP_TYPE_SHIFT;
3545 /* LR swap check, some stac925x have a mux that
3546 * changes the DACs output path instead of the
3547 * mono-mux path.
3548 */
3549 if (wid_type == AC_WID_AUD_SEL &&
3550 !(wcaps & AC_WCAP_LR_SWAP))
3551 spec->mono_nid = conn_list[0];
3552 }
d0513fc6
MR
3553 if (dir) {
3554 hda_nid_t nid = spec->autocfg.mono_out_pin;
3555
3556 /* most mono outs have a least a mute/unmute switch */
3557 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3558 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3559 "Mono Playback Switch",
3560 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR
3561 if (err < 0)
3562 return err;
d0513fc6
MR
3563 /* check for volume support for the amp */
3564 if ((caps & AC_AMPCAP_NUM_STEPS)
3565 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3566 err = stac92xx_add_control(spec,
3567 STAC_CTL_WIDGET_VOL,
3568 "Mono Playback Volume",
3569 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3570 if (err < 0)
3571 return err;
3572 }
09a99959
MR
3573 }
3574
3575 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3576 AC_PINCTL_OUT_EN);
3577 }
bcecd9bd 3578
c21ca4a8
TI
3579 if (!spec->multiout.num_dacs) {
3580 err = stac92xx_auto_fill_dac_nids(codec);
3581 if (err < 0)
19039bd0 3582 return err;
c9280d68
TI
3583 err = stac92xx_auto_create_multi_out_ctls(codec,
3584 &spec->autocfg);
3585 if (err < 0)
3586 return err;
c21ca4a8 3587 }
c7d4b2fa 3588
1cd2224c
MR
3589 /* setup analog beep controls */
3590 if (spec->anabeep_nid > 0) {
3591 err = stac92xx_auto_create_beep_ctls(codec,
3592 spec->anabeep_nid);
3593 if (err < 0)
3594 return err;
3595 }
3596
3597 /* setup digital beep controls and input device */
3598#ifdef CONFIG_SND_HDA_INPUT_BEEP
3599 if (spec->digbeep_nid > 0) {
3600 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3601 unsigned int caps;
1cd2224c
MR
3602
3603 err = stac92xx_auto_create_beep_ctls(codec, nid);
3604 if (err < 0)
3605 return err;
3606 err = snd_hda_attach_beep_device(codec, nid);
3607 if (err < 0)
3608 return err;
4d4e9bb3
TI
3609 /* if no beep switch is available, make its own one */
3610 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3611 if (codec->beep &&
3612 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3613 err = stac92xx_beep_switch_ctl(codec);
3614 if (err < 0)
3615 return err;
3616 }
1cd2224c
MR
3617 }
3618#endif
3619
0fb87bb4
ML
3620 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3621
3622 if (err < 0)
3623 return err;
3624
3625 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3626
3627 if (err < 0)
c7d4b2fa
M
3628 return err;
3629
b22b4821
MR
3630 if (spec->mono_nid > 0) {
3631 err = stac92xx_auto_create_mono_output_ctls(codec);
3632 if (err < 0)
3633 return err;
3634 }
2a9c7816 3635 if (spec->num_amps > 0) {
89385035
MR
3636 err = stac92xx_auto_create_amp_output_ctls(codec);
3637 if (err < 0)
3638 return err;
3639 }
2a9c7816 3640 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP
3641 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3642 &spec->autocfg)) < 0)
3643 return err;
4682eee0
MR
3644 if (spec->num_muxes > 0) {
3645 err = stac92xx_auto_create_mux_input_ctls(codec);
3646 if (err < 0)
3647 return err;
3648 }
d9737751
MR
3649 if (spec->num_smuxes > 0) {
3650 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3651 if (err < 0)
3652 return err;
3653 }
8b65727b 3654
c7d4b2fa 3655 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3656 if (spec->multiout.max_channels > 2)
c7d4b2fa 3657 spec->surr_switch = 1;
c7d4b2fa 3658
82bc955f 3659 if (spec->autocfg.dig_out_pin)
3cc08dc6 3660 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3661 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3662 spec->dig_in_nid = dig_in;
c7d4b2fa 3663
603c4019
TI
3664 if (spec->kctls.list)
3665 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3666
3667 spec->input_mux = &spec->private_imux;
f8ccbf65
MR
3668 if (!spec->dinput_mux)
3669 spec->dinput_mux = &spec->private_dimux;
d9737751 3670 spec->sinput_mux = &spec->private_smux;
b22b4821 3671 spec->mono_mux = &spec->private_mono_mux;
89385035 3672 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M
3673 return 1;
3674}
3675
82bc955f
TI
3676/* add playback controls for HP output */
3677static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3678 struct auto_pin_cfg *cfg)
3679{
3680 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3681 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI
3682 unsigned int wid_caps;
3683
3684 if (! pin)
3685 return 0;
3686
3687 wid_caps = get_wcaps(codec, pin);
505cb341 3688 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3689 spec->hp_detect = 1;
82bc955f
TI
3690
3691 return 0;
3692}
3693
160ea0dc
RF
3694/* add playback controls for LFE output */
3695static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3696 struct auto_pin_cfg *cfg)
3697{
3698 struct sigmatel_spec *spec = codec->spec;
3699 int err;
3700 hda_nid_t lfe_pin = 0x0;
3701 int i;
3702
3703 /*
3704 * search speaker outs and line outs for a mono speaker pin
3705 * with an amp. If one is found, add LFE controls
3706 * for it.
3707 */
3708 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3709 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3710 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3711 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3712 if (wcaps == AC_WCAP_OUT_AMP)
3713 /* found a mono speaker with an amp, must be lfe */
3714 lfe_pin = pin;
3715 }
3716
3717 /* if speaker_outs is 0, then speakers may be in line_outs */
3718 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3719 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3720 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3721 unsigned int defcfg;
8b551785 3722 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF
3723 AC_VERB_GET_CONFIG_DEFAULT,
3724 0x00);
8b551785 3725 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3726 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3727 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3728 if (wcaps == AC_WCAP_OUT_AMP)
3729 /* found a mono speaker with an amp,
3730 must be lfe */
3731 lfe_pin = pin;
3732 }
3733 }
3734 }
3735
3736 if (lfe_pin) {
eb06ed8f 3737 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF
3738 if (err < 0)
3739 return err;
3740 }
3741
3742 return 0;
3743}
3744
c7d4b2fa
M
3745static int stac9200_parse_auto_config(struct hda_codec *codec)
3746{
3747 struct sigmatel_spec *spec = codec->spec;
3748 int err;
3749
df694daa 3750 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M
3751 return err;
3752
3753 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3754 return err;
3755
82bc955f
TI
3756 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3757 return err;
3758
160ea0dc
RF
3759 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3760 return err;
3761
355a0ec4
TI
3762 if (spec->num_muxes > 0) {
3763 err = stac92xx_auto_create_mux_input_ctls(codec);
3764 if (err < 0)
3765 return err;
3766 }
3767
82bc955f 3768 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3769 spec->multiout.dig_out_nid = 0x05;
82bc955f 3770 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3771 spec->dig_in_nid = 0x04;
c7d4b2fa 3772
603c4019
TI
3773 if (spec->kctls.list)
3774 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3775
3776 spec->input_mux = &spec->private_imux;
8b65727b 3777 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M
3778
3779 return 1;
3780}
3781
62fe78e9
SR
3782/*
3783 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3784 * funky external mute control using GPIO pins.
3785 */
3786
76e1ddfb 3787static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3788 unsigned int dir_mask, unsigned int data)
62fe78e9
SR
3789{
3790 unsigned int gpiostate, gpiomask, gpiodir;
3791
3792 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3793 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3794 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR
3795
3796 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3797 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3798 gpiomask |= mask;
62fe78e9
SR
3799
3800 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3801 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3802 gpiodir |= dir_mask;
62fe78e9 3803
76e1ddfb 3804 /* Configure GPIOx as CMOS */
62fe78e9
SR
3805 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3806
3807 snd_hda_codec_write(codec, codec->afg, 0,
3808 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI
3809 snd_hda_codec_read(codec, codec->afg, 0,
3810 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR
3811
3812 msleep(1);
3813
76e1ddfb
TI
3814 snd_hda_codec_read(codec, codec->afg, 0,
3815 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR
3816}
3817
74aeaabc
MR
3818static int stac92xx_add_jack(struct hda_codec *codec,
3819 hda_nid_t nid, int type)
3820{
e4973e1e 3821#ifdef CONFIG_SND_JACK
74aeaabc
MR
3822 struct sigmatel_spec *spec = codec->spec;
3823 struct sigmatel_jack *jack;
3824 int def_conf = snd_hda_codec_read(codec, nid,
3825 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3826 int connectivity = get_defcfg_connect(def_conf);
3827 char name[32];
3828
3829 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3830 return 0;
3831
3832 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3833 jack = snd_array_new(&spec->jacks);
3834 if (!jack)
3835 return -ENOMEM;
3836 jack->nid = nid;
3837 jack->type = type;
3838
3839 sprintf(name, "%s at %s %s Jack",
3840 snd_hda_get_jack_type(def_conf),
3841 snd_hda_get_jack_connectivity(def_conf),
3842 snd_hda_get_jack_location(def_conf));
3843
3844 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI
3845#else
3846 return 0;
3847#endif
74aeaabc
MR
3848}
3849
c6e4c666
TI
3850static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3851 unsigned char type, int data)
74aeaabc
MR
3852{
3853 struct sigmatel_event *event;
3854
3855 snd_array_init(&spec->events, sizeof(*event), 32);
3856 event = snd_array_new(&spec->events);
3857 if (!event)
3858 return -ENOMEM;
3859 event->nid = nid;
c6e4c666
TI
3860 event->type = type;
3861 event->tag = spec->events.used;
74aeaabc
MR
3862 event->data = data;
3863
c6e4c666 3864 return event->tag;
74aeaabc
MR
3865}
3866
c6e4c666
TI
3867static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3868 hda_nid_t nid, unsigned char type)
74aeaabc
MR
3869{
3870 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
3871 struct sigmatel_event *event = spec->events.list;
3872 int i;
3873
3874 for (i = 0; i < spec->events.used; i++, event++) {
3875 if (event->nid == nid && event->type == type)
3876 return event;
74aeaabc 3877 }
c6e4c666 3878 return NULL;
74aeaabc
MR
3879}
3880
c6e4c666
TI
3881static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3882 unsigned char tag)
314634bc 3883{
c6e4c666
TI
3884 struct sigmatel_spec *spec = codec->spec;
3885 struct sigmatel_event *event = spec->events.list;
3886 int i;
3887
3888 for (i = 0; i < spec->events.used; i++, event++) {
3889 if (event->tag == tag)
3890 return event;
74aeaabc 3891 }
c6e4c666
TI
3892 return NULL;
3893}
3894
3895static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3896 unsigned int type)
3897{
3898 struct sigmatel_event *event;
3899 int tag;
3900
3901 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3902 return;
3903 event = stac_get_event(codec, nid, type);
3904 if (event)
3905 tag = event->tag;
3906 else
3907 tag = stac_add_event(codec->spec, nid, type, 0);
3908 if (tag < 0)
3909 return;
3910 snd_hda_codec_write_cache(codec, nid, 0,
3911 AC_VERB_SET_UNSOLICITED_ENABLE,
3912 AC_USRSP_EN | tag);
314634bc
TI
3913}
3914
a64135a2
MR
3915static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3916{
3917 int i;
3918 for (i = 0; i < cfg->hp_outs; i++)
3919 if (cfg->hp_pins[i] == nid)
3920 return 1; /* nid is a HP-Out */
3921
3922 return 0; /* nid is not a HP-Out */
3923};
3924
b76c850f
MR
3925static void stac92xx_power_down(struct hda_codec *codec)
3926{
3927 struct sigmatel_spec *spec = codec->spec;
3928
3929 /* power down inactive DACs */
3930 hda_nid_t *dac;
3931 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 3932 if (!check_all_dac_nids(spec, *dac))
8c2f767b 3933 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR
3934 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3935}
3936
f73d3585
TI
3937static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3938 int enable);
3939
c7d4b2fa
M
3940static int stac92xx_init(struct hda_codec *codec)
3941{
3942 struct sigmatel_spec *spec = codec->spec;
82bc955f 3943 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3944 unsigned int gpio;
e4973e1e 3945 int i;
c7d4b2fa 3946
c7d4b2fa
M
3947 snd_hda_sequence_write(codec, spec->init);
3948
8daaaa97
MR
3949 /* power down adcs initially */
3950 if (spec->powerdown_adcs)
3951 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 3952 snd_hda_codec_write(codec,
8daaaa97
MR
3953 spec->adc_nids[i], 0,
3954 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI
3955
3956 /* set up GPIO */
3957 gpio = spec->gpio_data;
3958 /* turn on EAPD statically when spec->eapd_switch isn't set.
3959 * otherwise, unsol event will turn it on/off dynamically
3960 */
3961 if (!spec->eapd_switch)
3962 gpio |= spec->eapd_mask;
3963 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3964
82bc955f
TI
3965 /* set up pins */
3966 if (spec->hp_detect) {
505cb341 3967 /* Enable unsolicited responses on the HP widget */
74aeaabc 3968 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 3969 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 3970 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 3971 }
0a07acaf
TI
3972 /* force to enable the first line-out; the others are set up
3973 * in unsol_event
3974 */
3975 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 3976 AC_PINCTL_OUT_EN);
82bc955f 3977 /* fake event to set up pins */
c6e4c666
TI
3978 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
3979 STAC_HP_EVENT);
82bc955f
TI
3980 } else {
3981 stac92xx_auto_init_multi_out(codec);
3982 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI
3983 for (i = 0; i < cfg->hp_outs; i++)
3984 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f
TI
3985 }
3986 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI
3987 hda_nid_t nid = cfg->input_pins[i];
3988 if (nid) {
12dde4c6 3989 unsigned int pinctl, conf;
4f1e6bc3
TI
3990 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3991 /* for mic pins, force to initialize */
3992 pinctl = stac92xx_get_vref(codec, nid);
12dde4c6
TI
3993 pinctl |= AC_PINCTL_IN_EN;
3994 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI
3995 } else {
3996 pinctl = snd_hda_codec_read(codec, nid, 0,
3997 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3998 /* if PINCTL already set then skip */
12dde4c6
TI
3999 if (!(pinctl & AC_PINCTL_IN_EN)) {
4000 pinctl |= AC_PINCTL_IN_EN;
4001 stac92xx_auto_set_pinctl(codec, nid,
4002 pinctl);
4003 }
4004 }
4005 conf = snd_hda_codec_read(codec, nid, 0,
4006 AC_VERB_GET_CONFIG_DEFAULT, 0);
4007 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4008 enable_pin_detect(codec, nid,
4009 STAC_INSERT_EVENT);
4010 stac_issue_unsol_event(codec, nid,
4011 STAC_INSERT_EVENT);
4f1e6bc3 4012 }
c960a03b 4013 }
82bc955f 4014 }
a64135a2
MR
4015 for (i = 0; i < spec->num_dmics; i++)
4016 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4017 AC_PINCTL_IN_EN);
f73d3585
TI
4018 if (cfg->dig_out_pin)
4019 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
4020 AC_PINCTL_OUT_EN);
4021 if (cfg->dig_in_pin)
4022 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4023 AC_PINCTL_IN_EN);
a64135a2 4024 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI
4025 hda_nid_t nid = spec->pwr_nids[i];
4026 int pinctl, def_conf;
f73d3585 4027
eb632128
TI
4028 /* power on when no jack detection is available */
4029 if (!spec->hp_detect) {
4030 stac_toggle_power_map(codec, nid, 1);
4031 continue;
4032 }
4033
4034 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI
4035 continue; /* already has an unsol event */
4036
4037 pinctl = snd_hda_codec_read(codec, nid, 0,
4038 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR
4039 /* outputs are only ports capable of power management
4040 * any attempts on powering down a input port cause the
4041 * referenced VREF to act quirky.
4042 */
eb632128
TI
4043 if (pinctl & AC_PINCTL_IN_EN) {
4044 stac_toggle_power_map(codec, nid, 1);
a64135a2 4045 continue;
eb632128 4046 }
f73d3585
TI
4047 def_conf = snd_hda_codec_read(codec, nid, 0,
4048 AC_VERB_GET_CONFIG_DEFAULT, 0);
4049 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR
4050 /* skip any ports that don't have jacks since presence
4051 * detection is useless */
f73d3585
TI
4052 if (def_conf != AC_JACK_PORT_COMPLEX) {
4053 if (def_conf != AC_JACK_PORT_NONE)
4054 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4055 continue;
f73d3585 4056 }
12dde4c6
TI
4057 if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) {
4058 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
4059 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
4060 }
a64135a2 4061 }
b76c850f
MR
4062 if (spec->dac_list)
4063 stac92xx_power_down(codec);
c7d4b2fa
M
4064 return 0;
4065}
4066
74aeaabc
MR
4067static void stac92xx_free_jacks(struct hda_codec *codec)
4068{
e4973e1e 4069#ifdef CONFIG_SND_JACK
b94d3539 4070 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4071 struct sigmatel_spec *spec = codec->spec;
b94d3539 4072 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR
4073 struct sigmatel_jack *jacks = spec->jacks.list;
4074 int i;
4075 for (i = 0; i < spec->jacks.used; i++)
4076 snd_device_free(codec->bus->card, &jacks[i].jack);
4077 }
4078 snd_array_free(&spec->jacks);
e4973e1e 4079#endif
74aeaabc
MR
4080}
4081
603c4019
TI
4082static void stac92xx_free_kctls(struct hda_codec *codec)
4083{
4084 struct sigmatel_spec *spec = codec->spec;
4085
4086 if (spec->kctls.list) {
4087 struct snd_kcontrol_new *kctl = spec->kctls.list;
4088 int i;
4089 for (i = 0; i < spec->kctls.used; i++)
4090 kfree(kctl[i].name);
4091 }
4092 snd_array_free(&spec->kctls);
4093}
4094
2f2f4251
M
4095static void stac92xx_free(struct hda_codec *codec)
4096{
c7d4b2fa 4097 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
4098
4099 if (! spec)
4100 return;
4101
af9f341a 4102 kfree(spec->pin_configs);
74aeaabc
MR
4103 stac92xx_free_jacks(codec);
4104 snd_array_free(&spec->events);
11b44bbd 4105
c7d4b2fa 4106 kfree(spec);
1cd2224c 4107 snd_hda_detach_beep_device(codec);
2f2f4251
M
4108}
4109
4e55096e
M
4110static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4111 unsigned int flag)
4112{
4113 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4114 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4115
f9acba43
TI
4116 if (pin_ctl & AC_PINCTL_IN_EN) {
4117 /*
4118 * we need to check the current set-up direction of
4119 * shared input pins since they can be switched via
4120 * "xxx as Output" mixer switch
4121 */
4122 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4123 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI
4124 return;
4125 }
4126
7b043899
SL
4127 /* if setting pin direction bits, clear the current
4128 direction bits first */
4129 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4130 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4131
82beb8fd 4132 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M
4133 AC_VERB_SET_PIN_WIDGET_CONTROL,
4134 pin_ctl | flag);
4135}
4136
4137static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4138 unsigned int flag)
4139{
4140 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4141 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 4142 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M
4143 AC_VERB_SET_PIN_WIDGET_CONTROL,
4144 pin_ctl & ~flag);
4145}
4146
e6e3ea25 4147static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI
4148{
4149 if (!nid)
4150 return 0;
4151 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI
4152 & (1 << 31))
4153 return 1;
314634bc
TI
4154 return 0;
4155}
4156
d7a89436
TI
4157/* return non-zero if the hp-pin of the given array index isn't
4158 * a jack-detection target
4159 */
4160static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4161{
4162 struct auto_pin_cfg *cfg = &spec->autocfg;
4163
4164 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4165 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4166 return 1;
c21ca4a8 4167 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI
4168 return 1;
4169 /* ignore if the pin is set as line-out */
4170 if (cfg->hp_pins[i] == spec->hp_switch)
4171 return 1;
4172 return 0;
4173}
4174
c6e4c666 4175static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M
4176{
4177 struct sigmatel_spec *spec = codec->spec;
4178 struct auto_pin_cfg *cfg = &spec->autocfg;
4179 int i, presence;
4180
eb06ed8f 4181 presence = 0;
4fe5195c
MR
4182 if (spec->gpio_mute)
4183 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4184 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4185
eb06ed8f 4186 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI
4187 if (presence)
4188 break;
d7a89436
TI
4189 if (no_hp_sensing(spec, i))
4190 continue;
e6e3ea25
TI
4191 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4192 if (presence) {
4193 unsigned int pinctl;
4194 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4195 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4196 if (pinctl & AC_PINCTL_IN_EN)
4197 presence = 0; /* mic- or line-input */
4198 }
eb06ed8f 4199 }
4e55096e
M
4200
4201 if (presence) {
d7a89436 4202 /* disable lineouts */
7c2ba97b 4203 if (spec->hp_switch)
d7a89436
TI
4204 stac92xx_reset_pinctl(codec, spec->hp_switch,
4205 AC_PINCTL_OUT_EN);
4e55096e
M
4206 for (i = 0; i < cfg->line_outs; i++)
4207 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4208 AC_PINCTL_OUT_EN);
eb06ed8f
TI
4209 for (i = 0; i < cfg->speaker_outs; i++)
4210 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4211 AC_PINCTL_OUT_EN);
c0cea0d0 4212 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR
4213 stac_gpio_set(codec, spec->gpio_mask,
4214 spec->gpio_dir, spec->gpio_data &
4215 ~spec->eapd_mask);
4e55096e 4216 } else {
d7a89436 4217 /* enable lineouts */
7c2ba97b 4218 if (spec->hp_switch)
d7a89436
TI
4219 stac92xx_set_pinctl(codec, spec->hp_switch,
4220 AC_PINCTL_OUT_EN);
4e55096e
M
4221 for (i = 0; i < cfg->line_outs; i++)
4222 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4223 AC_PINCTL_OUT_EN);
eb06ed8f
TI
4224 for (i = 0; i < cfg->speaker_outs; i++)
4225 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4226 AC_PINCTL_OUT_EN);
c0cea0d0 4227 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR
4228 stac_gpio_set(codec, spec->gpio_mask,
4229 spec->gpio_dir, spec->gpio_data |
4230 spec->eapd_mask);
4e55096e 4231 }
d7a89436
TI
4232 /* toggle hp outs */
4233 for (i = 0; i < cfg->hp_outs; i++) {
4234 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4235 if (no_hp_sensing(spec, i))
4236 continue;
4237 if (presence)
4238 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI
4239#if 0 /* FIXME */
4240/* Resetting the pinctl like below may lead to (a sort of) regressions
4241 * on some devices since they use the HP pin actually for line/speaker
4242 * outs although the default pin config shows a different pin (that is
4243 * wrong and useless).
4244 *
4245 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4246 * But, disabling the code below just works around it, and I'm too tired of
4247 * bug reports with such devices...
4248 */
d7a89436
TI
4249 else
4250 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4251#endif /* FIXME */
d7a89436 4252 }
4e55096e
M
4253}
4254
f73d3585
TI
4255static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4256 int enable)
a64135a2
MR
4257{
4258 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI
4259 unsigned int idx, val;
4260
4261 for (idx = 0; idx < spec->num_pwrs; idx++) {
4262 if (spec->pwr_nids[idx] == nid)
4263 break;
4264 }
4265 if (idx >= spec->num_pwrs)
4266 return;
d0513fc6
MR
4267
4268 /* several codecs have two power down bits */
4269 if (spec->pwr_mapping)
4270 idx = spec->pwr_mapping[idx];
4271 else
4272 idx = 1 << idx;
a64135a2 4273
f73d3585
TI
4274 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4275 if (enable)
a64135a2
MR
4276 val &= ~idx;
4277 else
4278 val |= idx;
4279
4280 /* power down unused output ports */
4281 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR
4282}
4283
f73d3585
TI
4284static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4285{
e6e3ea25 4286 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4287}
a64135a2 4288
74aeaabc
MR
4289static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4290{
4291 struct sigmatel_spec *spec = codec->spec;
4292 struct sigmatel_jack *jacks = spec->jacks.list;
4293
4294 if (jacks) {
4295 int i;
4296 for (i = 0; i < spec->jacks.used; i++) {
4297 if (jacks->nid == nid) {
4298 unsigned int pin_ctl =
4299 snd_hda_codec_read(codec, nid,
4300 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4301 0x00);
4302 int type = jacks->type;
4303 if (type == (SND_JACK_LINEOUT
4304 | SND_JACK_HEADPHONE))
4305 type = (pin_ctl & AC_PINCTL_HP_EN)
4306 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4307 snd_jack_report(jacks->jack,
e6e3ea25 4308 get_pin_presence(codec, nid)
74aeaabc
MR
4309 ? type : 0);
4310 }
4311 jacks++;
4312 }
4313 }
4314}
a64135a2 4315
c6e4c666
TI
4316static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4317 unsigned char type)
4318{
4319 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4320 if (!event)
4321 return;
4322 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4323}
4324
314634bc
TI
4325static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4326{
a64135a2 4327 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
4328 struct sigmatel_event *event;
4329 int tag, data;
a64135a2 4330
c6e4c666
TI
4331 tag = (res >> 26) & 0x7f;
4332 event = stac_get_event_from_tag(codec, tag);
4333 if (!event)
4334 return;
4335
4336 switch (event->type) {
314634bc 4337 case STAC_HP_EVENT:
c6e4c666 4338 stac92xx_hp_detect(codec);
a64135a2 4339 /* fallthru */
74aeaabc 4340 case STAC_INSERT_EVENT:
a64135a2 4341 case STAC_PWR_EVENT:
c6e4c666
TI
4342 if (spec->num_pwrs > 0)
4343 stac92xx_pin_sense(codec, event->nid);
4344 stac92xx_report_jack(codec, event->nid);
72474be6 4345 break;
c6e4c666
TI
4346 case STAC_VREF_EVENT:
4347 data = snd_hda_codec_read(codec, codec->afg, 0,
4348 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR
4349 /* toggle VREF state based on GPIOx status */
4350 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4351 !!(data & (1 << event->data)));
72474be6 4352 break;
314634bc
TI
4353 }
4354}
4355
2d34e1b3
TI
4356#ifdef CONFIG_PROC_FS
4357static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4358 struct hda_codec *codec, hda_nid_t nid)
4359{
4360 if (nid == codec->afg)
4361 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4362 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4363}
4364
4365static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4366 struct hda_codec *codec,
4367 unsigned int verb)
4368{
4369 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4370 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4371}
4372
4373/* stac92hd71bxx, stac92hd73xx */
4374static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4375 struct hda_codec *codec, hda_nid_t nid)
4376{
4377 stac92hd_proc_hook(buffer, codec, nid);
4378 if (nid == codec->afg)
4379 analog_loop_proc_hook(buffer, codec, 0xfa0);
4380}
4381
4382static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4383 struct hda_codec *codec, hda_nid_t nid)
4384{
4385 if (nid == codec->afg)
4386 analog_loop_proc_hook(buffer, codec, 0xfe0);
4387}
4388
4389static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4390 struct hda_codec *codec, hda_nid_t nid)
4391{
4392 if (nid == codec->afg)
4393 analog_loop_proc_hook(buffer, codec, 0xfeb);
4394}
4395#else
4396#define stac92hd_proc_hook NULL
4397#define stac92hd7x_proc_hook NULL
4398#define stac9205_proc_hook NULL
4399#define stac927x_proc_hook NULL
4400#endif
4401
cb53c626 4402#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M
4403static int stac92xx_resume(struct hda_codec *codec)
4404{
dc81bed1
TI
4405 struct sigmatel_spec *spec = codec->spec;
4406
11b44bbd 4407 stac92xx_set_config_regs(codec);
2c885878 4408 stac92xx_init(codec);
82beb8fd
TI
4409 snd_hda_codec_resume_amp(codec);
4410 snd_hda_codec_resume_cache(codec);
2c885878 4411 /* fake event to set up pins again to override cached values */
dc81bed1 4412 if (spec->hp_detect)
c6e4c666
TI
4413 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4414 STAC_HP_EVENT);
ff6fdc37
M
4415 return 0;
4416}
c6798d2b
MR
4417
4418static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4419{
4420 struct sigmatel_spec *spec = codec->spec;
4421 if (spec->eapd_mask)
4422 stac_gpio_set(codec, spec->gpio_mask,
4423 spec->gpio_dir, spec->gpio_data &
4424 ~spec->eapd_mask);
4425 return 0;
4426}
ff6fdc37
M
4427#endif
4428
2f2f4251
M
4429static struct hda_codec_ops stac92xx_patch_ops = {
4430 .build_controls = stac92xx_build_controls,
4431 .build_pcms = stac92xx_build_pcms,
4432 .init = stac92xx_init,
4433 .free = stac92xx_free,
4e55096e 4434 .unsol_event = stac92xx_unsol_event,
cb53c626 4435#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4436 .suspend = stac92xx_suspend,
ff6fdc37
M
4437 .resume = stac92xx_resume,
4438#endif
2f2f4251
M
4439};
4440
4441static int patch_stac9200(struct hda_codec *codec)
4442{
4443 struct sigmatel_spec *spec;
c7d4b2fa 4444 int err;
2f2f4251 4445
e560d8d8 4446 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
4447 if (spec == NULL)
4448 return -ENOMEM;
4449
4450 codec->spec = spec;
a4eed138 4451 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4452 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI
4453 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4454 stac9200_models,
4455 stac9200_cfg_tbl);
11b44bbd
RF
4456 if (spec->board_config < 0) {
4457 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4458 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4459 } else
4460 err = stac_save_pin_cfgs(codec,
4461 stac9200_brd_tbl[spec->board_config]);
4462 if (err < 0) {
4463 stac92xx_free(codec);
4464 return err;
403d1944 4465 }
2f2f4251
M
4466
4467 spec->multiout.max_channels = 2;
4468 spec->multiout.num_dacs = 1;
4469 spec->multiout.dac_nids = stac9200_dac_nids;
4470 spec->adc_nids = stac9200_adc_nids;
4471 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4472 spec->num_muxes = 1;
8b65727b 4473 spec->num_dmics = 0;
9e05b7a3 4474 spec->num_adcs = 1;
a64135a2 4475 spec->num_pwrs = 0;
c7d4b2fa 4476
58eec423
MCC
4477 if (spec->board_config == STAC_9200_M4 ||
4478 spec->board_config == STAC_9200_M4_2 ||
bf277785 4479 spec->board_config == STAC_9200_OQO)
1194b5b7
TI
4480 spec->init = stac9200_eapd_init;
4481 else
4482 spec->init = stac9200_core_init;
2f2f4251 4483 spec->mixer = stac9200_mixer;
c7d4b2fa 4484
117f257d
TI
4485 if (spec->board_config == STAC_9200_PANASONIC) {
4486 spec->gpio_mask = spec->gpio_dir = 0x09;
4487 spec->gpio_data = 0x00;
4488 }
4489
c7d4b2fa
M
4490 err = stac9200_parse_auto_config(codec);
4491 if (err < 0) {
4492 stac92xx_free(codec);
4493 return err;
4494 }
2f2f4251 4495
2acc9dcb
TI
4496 /* CF-74 has no headphone detection, and the driver should *NOT*
4497 * do detection and HP/speaker toggle because the hardware does it.
4498 */
4499 if (spec->board_config == STAC_9200_PANASONIC)
4500 spec->hp_detect = 0;
4501
2f2f4251
M
4502 codec->patch_ops = stac92xx_patch_ops;
4503
4504 return 0;
4505}
4506
8e21c34c
TD
4507static int patch_stac925x(struct hda_codec *codec)
4508{
4509 struct sigmatel_spec *spec;
4510 int err;
4511
4512 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4513 if (spec == NULL)
4514 return -ENOMEM;
4515
4516 codec->spec = spec;
a4eed138 4517 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4518 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC
4519
4520 /* Check first for codec ID */
4521 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4522 STAC_925x_MODELS,
4523 stac925x_models,
4524 stac925x_codec_id_cfg_tbl);
4525
4526 /* Now checks for PCI ID, if codec ID is not found */
4527 if (spec->board_config < 0)
4528 spec->board_config = snd_hda_check_board_config(codec,
4529 STAC_925x_MODELS,
8e21c34c
TD
4530 stac925x_models,
4531 stac925x_cfg_tbl);
9e507abd 4532 again:
8e21c34c 4533 if (spec->board_config < 0) {
9cb36c2a 4534 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2c11f955 4535 "using BIOS defaults\n");
8e21c34c 4536 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4537 } else
4538 err = stac_save_pin_cfgs(codec,
4539 stac925x_brd_tbl[spec->board_config]);
4540 if (err < 0) {
4541 stac92xx_free(codec);
4542 return err;
8e21c34c
TD
4543 }
4544
4545 spec->multiout.max_channels = 2;
4546 spec->multiout.num_dacs = 1;
4547 spec->multiout.dac_nids = stac925x_dac_nids;
4548 spec->adc_nids = stac925x_adc_nids;
4549 spec->mux_nids = stac925x_mux_nids;
4550 spec->num_muxes = 1;
9e05b7a3 4551 spec->num_adcs = 1;
a64135a2 4552 spec->num_pwrs = 0;
2c11f955
TD
4553 switch (codec->vendor_id) {
4554 case 0x83847632: /* STAC9202 */
4555 case 0x83847633: /* STAC9202D */
4556 case 0x83847636: /* STAC9251 */
4557 case 0x83847637: /* STAC9251D */
f6e9852a 4558 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4559 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI
4560 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4561 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD
4562 break;
4563 default:
4564 spec->num_dmics = 0;
4565 break;
4566 }
8e21c34c
TD
4567
4568 spec->init = stac925x_core_init;
4569 spec->mixer = stac925x_mixer;
4570
4571 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI
4572 if (!err) {
4573 if (spec->board_config < 0) {
4574 printk(KERN_WARNING "hda_codec: No auto-config is "
4575 "available, default to model=ref\n");
4576 spec->board_config = STAC_925x_REF;
4577 goto again;
4578 }
4579 err = -EINVAL;
4580 }
8e21c34c
TD
4581 if (err < 0) {
4582 stac92xx_free(codec);
4583 return err;
4584 }
4585
4586 codec->patch_ops = stac92xx_patch_ops;
4587
4588 return 0;
4589}
4590
e1f0d669
MR
4591static struct hda_input_mux stac92hd73xx_dmux = {
4592 .num_items = 4,
4593 .items = {
4594 { "Analog Inputs", 0x0b },
e1f0d669
MR
4595 { "Digital Mic 1", 0x09 },
4596 { "Digital Mic 2", 0x0a },
2a9c7816 4597 { "CD", 0x08 },
e1f0d669
MR
4598 }
4599};
4600
4601static int patch_stac92hd73xx(struct hda_codec *codec)
4602{
4603 struct sigmatel_spec *spec;
4604 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4605 int err = 0;
c21ca4a8 4606 int num_dacs;
e1f0d669
MR
4607
4608 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4609 if (spec == NULL)
4610 return -ENOMEM;
4611
4612 codec->spec = spec;
e99d32b3 4613 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR
4614 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4615 spec->pin_nids = stac92hd73xx_pin_nids;
4616 spec->board_config = snd_hda_check_board_config(codec,
4617 STAC_92HD73XX_MODELS,
4618 stac92hd73xx_models,
4619 stac92hd73xx_cfg_tbl);
4620again:
4621 if (spec->board_config < 0) {
4622 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4623 " STAC92HD73XX, using BIOS defaults\n");
4624 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4625 } else
4626 err = stac_save_pin_cfgs(codec,
4627 stac92hd73xx_brd_tbl[spec->board_config]);
4628 if (err < 0) {
4629 stac92xx_free(codec);
4630 return err;
e1f0d669
MR
4631 }
4632
c21ca4a8 4633 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR
4634 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4635
c21ca4a8 4636 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR
4637 printk(KERN_WARNING "hda_codec: Could not determine "
4638 "number of channels defaulting to DAC count\n");
c21ca4a8 4639 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4640 }
c21ca4a8 4641 switch (num_dacs) {
e1f0d669
MR
4642 case 0x3: /* 6 Channel */
4643 spec->mixer = stac92hd73xx_6ch_mixer;
4644 spec->init = stac92hd73xx_6ch_core_init;
4645 break;
4646 case 0x4: /* 8 Channel */
e1f0d669
MR
4647 spec->mixer = stac92hd73xx_8ch_mixer;
4648 spec->init = stac92hd73xx_8ch_core_init;
4649 break;
4650 case 0x5: /* 10 Channel */
e1f0d669
MR
4651 spec->mixer = stac92hd73xx_10ch_mixer;
4652 spec->init = stac92hd73xx_10ch_core_init;
c21ca4a8
TI
4653 }
4654 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4655
e1f0d669
MR
4656 spec->aloopback_mask = 0x01;
4657 spec->aloopback_shift = 8;
4658
1cd2224c 4659 spec->digbeep_nid = 0x1c;
e1f0d669
MR
4660 spec->mux_nids = stac92hd73xx_mux_nids;
4661 spec->adc_nids = stac92hd73xx_adc_nids;
4662 spec->dmic_nids = stac92hd73xx_dmic_nids;
4663 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4664 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4665 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4666 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR
4667
4668 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4669 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4670 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR
4671 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4672 sizeof(stac92hd73xx_dmux));
4673
a7662640 4674 switch (spec->board_config) {
6b3ab21e 4675 case STAC_DELL_EQ:
d654a660 4676 spec->init = dell_eq_core_init;
6b3ab21e 4677 /* fallthru */
661cd8fb
TI
4678 case STAC_DELL_M6_AMIC:
4679 case STAC_DELL_M6_DMIC:
4680 case STAC_DELL_M6_BOTH:
2a9c7816 4681 spec->num_smuxes = 0;
2a9c7816
MR
4682 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4683 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4684 spec->eapd_switch = 0;
2a9c7816 4685 spec->num_amps = 1;
6b3ab21e 4686
c21ca4a8 4687 if (spec->board_config != STAC_DELL_EQ)
6b3ab21e 4688 spec->init = dell_m6_core_init;
661cd8fb
TI
4689 switch (spec->board_config) {
4690 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR
4691 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4692 spec->num_dmics = 0;
2a9c7816 4693 spec->private_dimux.num_items = 1;
a7662640 4694 break;
661cd8fb 4695 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR
4696 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4697 spec->num_dmics = 1;
2a9c7816 4698 spec->private_dimux.num_items = 2;
a7662640 4699 break;
661cd8fb 4700 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR
4701 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4702 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4703 spec->num_dmics = 1;
2a9c7816 4704 spec->private_dimux.num_items = 2;
a7662640
MR
4705 break;
4706 }
4707 break;
4708 default:
4709 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4710 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4711 spec->eapd_switch = 1;
a7662640 4712 }
b2c4f4d7
MR
4713 if (spec->board_config > STAC_92HD73XX_REF) {
4714 /* GPIO0 High = Enable EAPD */
4715 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4716 spec->gpio_data = 0x01;
4717 }
2a9c7816 4718 spec->dinput_mux = &spec->private_dimux;
a7662640 4719
a64135a2
MR
4720 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4721 spec->pwr_nids = stac92hd73xx_pwr_nids;
4722
d9737751 4723 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR
4724
4725 if (!err) {
4726 if (spec->board_config < 0) {
4727 printk(KERN_WARNING "hda_codec: No auto-config is "
4728 "available, default to model=ref\n");
4729 spec->board_config = STAC_92HD73XX_REF;
4730 goto again;
4731 }
4732 err = -EINVAL;
4733 }
4734
4735 if (err < 0) {
4736 stac92xx_free(codec);
4737 return err;
4738 }
4739
9e43f0de
TI
4740 if (spec->board_config == STAC_92HD73XX_NO_JD)
4741 spec->hp_detect = 0;
4742
e1f0d669
MR
4743 codec->patch_ops = stac92xx_patch_ops;
4744
2d34e1b3
TI
4745 codec->proc_widget_hook = stac92hd7x_proc_hook;
4746
e1f0d669
MR
4747 return 0;
4748}
4749
d0513fc6
MR
4750static struct hda_input_mux stac92hd83xxx_dmux = {
4751 .num_items = 3,
4752 .items = {
4753 { "Analog Inputs", 0x03 },
4754 { "Digital Mic 1", 0x04 },
4755 { "Digital Mic 2", 0x05 },
4756 }
4757};
4758
4759static int patch_stac92hd83xxx(struct hda_codec *codec)
4760{
4761 struct sigmatel_spec *spec;
65557f35 4762 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 4763 int err;
65557f35 4764 int num_dacs;
d0513fc6
MR
4765
4766 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4767 if (spec == NULL)
4768 return -ENOMEM;
4769
4770 codec->spec = spec;
0ffa9807 4771 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR
4772 spec->mono_nid = 0x19;
4773 spec->digbeep_nid = 0x21;
4774 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4775 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4776 spec->adc_nids = stac92hd83xxx_adc_nids;
4777 spec->pwr_nids = stac92hd83xxx_pwr_nids;
c15c5060 4778 spec->amp_nids = stac92hd83xxx_amp_nids;
d0513fc6
MR
4779 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4780 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 4781 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 4782
65557f35
MR
4783
4784 /* set port 0xe to select the last DAC
4785 */
4786 num_dacs = snd_hda_get_connections(codec, 0x0e,
4787 conn, STAC92HD83_DAC_COUNT + 1) - 1;
4788
4789 snd_hda_codec_write_cache(codec, 0xe, 0,
4790 AC_VERB_SET_CONNECT_SEL, num_dacs);
4791
d0513fc6 4792 spec->init = stac92hd83xxx_core_init;
d0513fc6
MR
4793 spec->mixer = stac92hd83xxx_mixer;
4794 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4795 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4796 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
c15c5060 4797 spec->num_amps = ARRAY_SIZE(stac92hd83xxx_amp_nids);
d0513fc6
MR
4798 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4799 spec->dinput_mux = &stac92hd83xxx_dmux;
4800 spec->pin_nids = stac92hd83xxx_pin_nids;
4801 spec->board_config = snd_hda_check_board_config(codec,
4802 STAC_92HD83XXX_MODELS,
4803 stac92hd83xxx_models,
4804 stac92hd83xxx_cfg_tbl);
4805again:
4806 if (spec->board_config < 0) {
4807 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4808 " STAC92HD83XXX, using BIOS defaults\n");
4809 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4810 } else
4811 err = stac_save_pin_cfgs(codec,
4812 stac92hd83xxx_brd_tbl[spec->board_config]);
4813 if (err < 0) {
4814 stac92xx_free(codec);
4815 return err;
d0513fc6
MR
4816 }
4817
32ed3f46
MR
4818 switch (codec->vendor_id) {
4819 case 0x111d7604:
4820 case 0x111d7605:
4821 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
4822 break;
4823 spec->num_pwrs = 0;
4824 break;
4825 }
4826
d0513fc6
MR
4827 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4828 if (!err) {
4829 if (spec->board_config < 0) {
4830 printk(KERN_WARNING "hda_codec: No auto-config is "
4831 "available, default to model=ref\n");
4832 spec->board_config = STAC_92HD83XXX_REF;
4833 goto again;
4834 }
4835 err = -EINVAL;
4836 }
4837
4838 if (err < 0) {
4839 stac92xx_free(codec);
4840 return err;
4841 }
4842
4843 codec->patch_ops = stac92xx_patch_ops;
4844
2d34e1b3
TI
4845 codec->proc_widget_hook = stac92hd_proc_hook;
4846
d0513fc6
MR
4847 return 0;
4848}
4849
4b33c767
MR
4850static struct hda_input_mux stac92hd71bxx_dmux = {
4851 .num_items = 4,
4852 .items = {
4853 { "Analog Inputs", 0x00 },
4854 { "Mixer", 0x01 },
4855 { "Digital Mic 1", 0x02 },
4856 { "Digital Mic 2", 0x03 },
4857 }
4858};
4859
e035b841
MR
4860static int patch_stac92hd71bxx(struct hda_codec *codec)
4861{
4862 struct sigmatel_spec *spec;
4863 int err = 0;
4864
4865 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4866 if (spec == NULL)
4867 return -ENOMEM;
4868
4869 codec->spec = spec;
8daaaa97 4870 codec->patch_ops = stac92xx_patch_ops;
e035b841 4871 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4872 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4873 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR
4874 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4875 sizeof(stac92hd71bxx_dmux));
e035b841
MR
4876 spec->board_config = snd_hda_check_board_config(codec,
4877 STAC_92HD71BXX_MODELS,
4878 stac92hd71bxx_models,
4879 stac92hd71bxx_cfg_tbl);
4880again:
4881 if (spec->board_config < 0) {
4882 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4883 " STAC92HD71BXX, using BIOS defaults\n");
4884 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
4885 } else
4886 err = stac_save_pin_cfgs(codec,
4887 stac92hd71bxx_brd_tbl[spec->board_config]);
4888 if (err < 0) {
4889 stac92xx_free(codec);
4890 return err;
e035b841
MR
4891 }
4892
41c3b648
TI
4893 if (spec->board_config > STAC_92HD71BXX_REF) {
4894 /* GPIO0 = EAPD */
4895 spec->gpio_mask = 0x01;
4896 spec->gpio_dir = 0x01;
4897 spec->gpio_data = 0x01;
4898 }
4899
541eee87
MR
4900 switch (codec->vendor_id) {
4901 case 0x111d76b6: /* 4 Port without Analog Mixer */
4902 case 0x111d76b7:
4903 case 0x111d76b4: /* 6 Port without Analog Mixer */
4904 case 0x111d76b5:
4905 spec->mixer = stac92hd71bxx_mixer;
4906 spec->init = stac92hd71bxx_core_init;
0ffa9807 4907 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4908 break;
aafc4412 4909 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI
4910 switch (spec->board_config) {
4911 case STAC_HP_M4:
72474be6 4912 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI
4913 err = stac_add_event(spec, codec->afg,
4914 STAC_VREF_EVENT, 0x02);
4915 if (err < 0)
4916 return err;
c5d08bb5 4917 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR
4918 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4919 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 4920 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 4921 AC_USRSP_EN | err);
72474be6
MR
4922 spec->gpio_mask |= 0x02;
4923 break;
4924 }
8daaaa97 4925 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 4926 (codec->revision_id & 0xf) == 1)
8daaaa97 4927 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4928
aafc4412
MR
4929 /* no output amps */
4930 spec->num_pwrs = 0;
4931 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4932 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR
4933
4934 /* disable VSW */
4935 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4936 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR
4937 break;
4938 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 4939 if ((codec->revision_id & 0xf) == 1)
8daaaa97 4940 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4941
aafc4412
MR
4942 /* no output amps */
4943 spec->num_pwrs = 0;
4944 /* fallthru */
541eee87 4945 default:
4b33c767 4946 spec->dinput_mux = &spec->private_dimux;
541eee87
MR
4947 spec->mixer = stac92hd71bxx_analog_mixer;
4948 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4949 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR
4950 }
4951
4b33c767 4952 spec->aloopback_mask = 0x50;
541eee87
MR
4953 spec->aloopback_shift = 0;
4954
8daaaa97 4955 spec->powerdown_adcs = 1;
1cd2224c 4956 spec->digbeep_nid = 0x26;
e035b841
MR
4957 spec->mux_nids = stac92hd71bxx_mux_nids;
4958 spec->adc_nids = stac92hd71bxx_adc_nids;
4959 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4960 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4961 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4962 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR
4963
4964 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4965 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4966
6a14f585
MR
4967 switch (spec->board_config) {
4968 case STAC_HP_M4:
6a14f585 4969 /* enable internal microphone */
af9f341a 4970 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR
4971 stac92xx_auto_set_pinctl(codec, 0x0e,
4972 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR
4973 /* fallthru */
4974 case STAC_DELL_M4_2:
4975 spec->num_dmics = 0;
4976 spec->num_smuxes = 0;
4977 spec->num_dmuxes = 0;
4978 break;
4979 case STAC_DELL_M4_1:
4980 case STAC_DELL_M4_3:
4981 spec->num_dmics = 1;
4982 spec->num_smuxes = 0;
4983 spec->num_dmuxes = 0;
6a14f585
MR
4984 break;
4985 default:
4986 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4987 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4988 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4989 };
4990
c21ca4a8 4991 spec->multiout.dac_nids = spec->dac_nids;
4b33c767
MR
4992 if (spec->dinput_mux)
4993 spec->private_dimux.num_items +=
4994 spec->num_dmics -
4995 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR
4996
4997 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4998 if (!err) {
4999 if (spec->board_config < 0) {
5000 printk(KERN_WARNING "hda_codec: No auto-config is "
5001 "available, default to model=ref\n");
5002 spec->board_config = STAC_92HD71BXX_REF;
5003 goto again;
5004 }
5005 err = -EINVAL;
5006 }
5007
5008 if (err < 0) {
5009 stac92xx_free(codec);
5010 return err;
5011 }
5012
2d34e1b3
TI
5013 codec->proc_widget_hook = stac92hd7x_proc_hook;
5014
e035b841
MR
5015 return 0;
5016};
5017
2f2f4251
M
5018static int patch_stac922x(struct hda_codec *codec)
5019{
5020 struct sigmatel_spec *spec;
c7d4b2fa 5021 int err;
2f2f4251 5022
e560d8d8 5023 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
5024 if (spec == NULL)
5025 return -ENOMEM;
5026
5027 codec->spec = spec;
a4eed138 5028 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5029 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI
5030 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5031 stac922x_models,
5032 stac922x_cfg_tbl);
536319af 5033 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR
5034 spec->gpio_mask = spec->gpio_dir = 0x03;
5035 spec->gpio_data = 0x03;
3fc24d85
TI
5036 /* Intel Macs have all same PCI SSID, so we need to check
5037 * codec SSID to distinguish the exact models
5038 */
6f0778d8 5039 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5040 switch (codec->subsystem_id) {
5d5d3bc3
IZ
5041
5042 case 0x106b0800:
5043 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5044 break;
5d5d3bc3
IZ
5045 case 0x106b0600:
5046 case 0x106b0700:
5047 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5048 break;
5d5d3bc3
IZ
5049 case 0x106b0e00:
5050 case 0x106b0f00:
5051 case 0x106b1600:
5052 case 0x106b1700:
5053 case 0x106b0200:
5054 case 0x106b1e00:
5055 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5056 break;
5d5d3bc3
IZ
5057 case 0x106b1a00:
5058 case 0x00000100:
5059 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5060 break;
5d5d3bc3
IZ
5061 case 0x106b0a00:
5062 case 0x106b2200:
5063 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5064 break;
536319af
NB
5065 default:
5066 spec->board_config = STAC_INTEL_MAC_V3;
5067 break;
3fc24d85
TI
5068 }
5069 }
5070
9e507abd 5071 again:
11b44bbd
RF
5072 if (spec->board_config < 0) {
5073 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5074 "using BIOS defaults\n");
5075 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5076 } else
5077 err = stac_save_pin_cfgs(codec,
5078 stac922x_brd_tbl[spec->board_config]);
5079 if (err < 0) {
5080 stac92xx_free(codec);
5081 return err;
403d1944 5082 }
2f2f4251 5083
c7d4b2fa
M
5084 spec->adc_nids = stac922x_adc_nids;
5085 spec->mux_nids = stac922x_mux_nids;
2549413e 5086 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5087 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5088 spec->num_dmics = 0;
a64135a2 5089 spec->num_pwrs = 0;
c7d4b2fa
M
5090
5091 spec->init = stac922x_core_init;
2f2f4251 5092 spec->mixer = stac922x_mixer;
c7d4b2fa
M
5093
5094 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5095
3cc08dc6 5096 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI
5097 if (!err) {
5098 if (spec->board_config < 0) {
5099 printk(KERN_WARNING "hda_codec: No auto-config is "
5100 "available, default to model=ref\n");
5101 spec->board_config = STAC_D945_REF;
5102 goto again;
5103 }
5104 err = -EINVAL;
5105 }
3cc08dc6
MP
5106 if (err < 0) {
5107 stac92xx_free(codec);
5108 return err;
5109 }
5110
5111 codec->patch_ops = stac92xx_patch_ops;
5112
807a4636
TI
5113 /* Fix Mux capture level; max to 2 */
5114 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5115 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5116 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5117 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5118 (0 << AC_AMPCAP_MUTE_SHIFT));
5119
3cc08dc6
MP
5120 return 0;
5121}
5122
5123static int patch_stac927x(struct hda_codec *codec)
5124{
5125 struct sigmatel_spec *spec;
5126 int err;
5127
5128 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5129 if (spec == NULL)
5130 return -ENOMEM;
5131
5132 codec->spec = spec;
a4eed138 5133 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5134 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI
5135 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5136 stac927x_models,
5137 stac927x_cfg_tbl);
9e507abd 5138 again:
8e9068b1
MR
5139 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5140 if (spec->board_config < 0)
5141 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5142 "STAC927x, using BIOS defaults\n");
11b44bbd 5143 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5144 } else
5145 err = stac_save_pin_cfgs(codec,
5146 stac927x_brd_tbl[spec->board_config]);
5147 if (err < 0) {
5148 stac92xx_free(codec);
5149 return err;
3cc08dc6
MP
5150 }
5151
1cd2224c 5152 spec->digbeep_nid = 0x23;
8e9068b1
MR
5153 spec->adc_nids = stac927x_adc_nids;
5154 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5155 spec->mux_nids = stac927x_mux_nids;
5156 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR
5157 spec->smux_nids = stac927x_smux_nids;
5158 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5159 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5160 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR
5161 spec->multiout.dac_nids = spec->dac_nids;
5162
81d3dbde 5163 switch (spec->board_config) {
93ed1503 5164 case STAC_D965_3ST:
93ed1503 5165 case STAC_D965_5ST:
8e9068b1 5166 /* GPIO0 High = Enable EAPD */
0fc9dec4 5167 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5168 spec->gpio_data = 0x01;
8e9068b1
MR
5169 spec->num_dmics = 0;
5170
93ed1503 5171 spec->init = d965_core_init;
9e05b7a3 5172 spec->mixer = stac927x_mixer;
81d3dbde 5173 break;
8e9068b1 5174 case STAC_DELL_BIOS:
780c8be4
MR
5175 switch (codec->subsystem_id) {
5176 case 0x10280209:
5177 case 0x1028022e:
5178 /* correct the device field to SPDIF out */
af9f341a 5179 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR
5180 break;
5181 };
03d7ca17 5182 /* configure the analog microphone on some laptops */
af9f341a 5183 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5184 /* correct the front output jack as a hp out */
af9f341a 5185 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5186 /* correct the front input jack as a mic */
af9f341a 5187 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5188 /* fallthru */
8e9068b1
MR
5189 case STAC_DELL_3ST:
5190 /* GPIO2 High = Enable EAPD */
0fc9dec4 5191 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5192 spec->gpio_data = 0x04;
7f16859a
MR
5193 spec->dmic_nids = stac927x_dmic_nids;
5194 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5195
8e9068b1
MR
5196 spec->init = d965_core_init;
5197 spec->mixer = stac927x_mixer;
5198 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5199 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR
5200 break;
5201 default:
b2c4f4d7
MR
5202 if (spec->board_config > STAC_D965_REF) {
5203 /* GPIO0 High = Enable EAPD */
5204 spec->eapd_mask = spec->gpio_mask = 0x01;
5205 spec->gpio_dir = spec->gpio_data = 0x01;
5206 }
8e9068b1
MR
5207 spec->num_dmics = 0;
5208
5209 spec->init = stac927x_core_init;
5210 spec->mixer = stac927x_mixer;
7f16859a
MR
5211 }
5212
a64135a2 5213 spec->num_pwrs = 0;
e1f0d669
MR
5214 spec->aloopback_mask = 0x40;
5215 spec->aloopback_shift = 0;
c0cea0d0 5216 spec->eapd_switch = 1;
8e9068b1 5217
3cc08dc6 5218 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI
5219 if (!err) {
5220 if (spec->board_config < 0) {
5221 printk(KERN_WARNING "hda_codec: No auto-config is "
5222 "available, default to model=ref\n");
5223 spec->board_config = STAC_D965_REF;
5224 goto again;
5225 }
5226 err = -EINVAL;
5227 }
c7d4b2fa
M
5228 if (err < 0) {
5229 stac92xx_free(codec);
5230 return err;
5231 }
2f2f4251
M
5232
5233 codec->patch_ops = stac92xx_patch_ops;
5234
2d34e1b3
TI
5235 codec->proc_widget_hook = stac927x_proc_hook;
5236
52987656
TI
5237 /*
5238 * !!FIXME!!
5239 * The STAC927x seem to require fairly long delays for certain
5240 * command sequences. With too short delays (even if the answer
5241 * is set to RIRB properly), it results in the silence output
5242 * on some hardwares like Dell.
5243 *
5244 * The below flag enables the longer delay (see get_response
5245 * in hda_intel.c).
5246 */
5247 codec->bus->needs_damn_long_delay = 1;
5248
e28d8322
TI
5249 /* no jack detecion for ref-no-jd model */
5250 if (spec->board_config == STAC_D965_REF_NO_JD)
5251 spec->hp_detect = 0;
5252
2f2f4251
M
5253 return 0;
5254}
5255
f3302a59
MP
5256static int patch_stac9205(struct hda_codec *codec)
5257{
5258 struct sigmatel_spec *spec;
8259980e 5259 int err;
f3302a59
MP
5260
5261 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5262 if (spec == NULL)
5263 return -ENOMEM;
5264
5265 codec->spec = spec;
a4eed138 5266 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5267 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI
5268 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5269 stac9205_models,
5270 stac9205_cfg_tbl);
9e507abd 5271 again:
11b44bbd
RF
5272 if (spec->board_config < 0) {
5273 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5274 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI
5275 } else
5276 err = stac_save_pin_cfgs(codec,
5277 stac9205_brd_tbl[spec->board_config]);
5278 if (err < 0) {
5279 stac92xx_free(codec);
5280 return err;
f3302a59
MP
5281 }
5282
1cd2224c 5283 spec->digbeep_nid = 0x23;
f3302a59 5284 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5285 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5286 spec->mux_nids = stac9205_mux_nids;
2549413e 5287 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR
5288 spec->smux_nids = stac9205_smux_nids;
5289 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5290 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5291 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5292 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5293 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5294 spec->num_pwrs = 0;
f3302a59
MP
5295
5296 spec->init = stac9205_core_init;
5297 spec->mixer = stac9205_mixer;
5298
e1f0d669
MR
5299 spec->aloopback_mask = 0x40;
5300 spec->aloopback_shift = 0;
c0cea0d0 5301 spec->eapd_switch = 1;
f3302a59 5302 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5303
ae0a8ed8 5304 switch (spec->board_config){
ae0a8ed8 5305 case STAC_9205_DELL_M43:
87d48363 5306 /* Enable SPDIF in/out */
af9f341a
TI
5307 stac_change_pin_config(codec, 0x1f, 0x01441030);
5308 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5309
4fe5195c 5310 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI
5311 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5312 if (err < 0)
5313 return err;
c5d08bb5 5314 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR
5315 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5316 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI
5317 AC_VERB_SET_UNSOLICITED_ENABLE,
5318 AC_USRSP_EN | err);
4fe5195c
MR
5319
5320 spec->gpio_dir = 0x0b;
0fc9dec4 5321 spec->eapd_mask = 0x01;
4fe5195c
MR
5322 spec->gpio_mask = 0x1b;
5323 spec->gpio_mute = 0x10;
e2e7d624 5324 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5325 * GPIO3 Low = DRM
87d48363 5326 */
4fe5195c 5327 spec->gpio_data = 0x01;
ae0a8ed8 5328 break;
b2c4f4d7
MR
5329 case STAC_9205_REF:
5330 /* SPDIF-In enabled */
5331 break;
ae0a8ed8
TD
5332 default:
5333 /* GPIO0 High = EAPD */
0fc9dec4 5334 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5335 spec->gpio_data = 0x01;
ae0a8ed8
TD
5336 break;
5337 }
33382403 5338
f3302a59 5339 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI
5340 if (!err) {
5341 if (spec->board_config < 0) {
5342 printk(KERN_WARNING "hda_codec: No auto-config is "
5343 "available, default to model=ref\n");
5344 spec->board_config = STAC_9205_REF;
5345 goto again;
5346 }
5347 err = -EINVAL;
5348 }
f3302a59
MP
5349 if (err < 0) {
5350 stac92xx_free(codec);
5351 return err;
5352 }
5353
5354 codec->patch_ops = stac92xx_patch_ops;
5355
2d34e1b3
TI
5356 codec->proc_widget_hook = stac9205_proc_hook;
5357
f3302a59
MP
5358 return 0;
5359}
5360
db064e50 5361/*
6d859065 5362 * STAC9872 hack
db064e50
TI
5363 */
5364
99ccc560 5365/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI
5366static hda_nid_t vaio_dacs[] = { 0x2 };
5367#define VAIO_HP_DAC 0x5
5368static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5369static hda_nid_t vaio_mux_nids[] = { 0x15 };
5370
5371static struct hda_input_mux vaio_mux = {
a3a2f429 5372 .num_items = 3,
db064e50 5373 .items = {
d773781c 5374 /* { "HP", 0x0 }, */
1624cb9a
TI
5375 { "Mic Jack", 0x1 },
5376 { "Internal Mic", 0x2 },
db064e50
TI
5377 { "PCM", 0x3 },
5378 }
5379};
5380
5381static struct hda_verb vaio_init[] = {
5382 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5383 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI
5384 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5385 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5386 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5387 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5388 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI
5389 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5390 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5391 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5392 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5393 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5394 {}
5395};
5396
6d859065
GM
5397static struct hda_verb vaio_ar_init[] = {
5398 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5399 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5400 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5401 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5402/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5403 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5404 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM
5405 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5406 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5407/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5408 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5409 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5410 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5411 {}
5412};
5413
db064e50 5414static struct snd_kcontrol_new vaio_mixer[] = {
127e82e3
TI
5415 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5416 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5417 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5418 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
db064e50
TI
5419 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5420 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5421 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5422 {
5423 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5424 .name = "Capture Source",
5425 .count = 1,
5426 .info = stac92xx_mux_enum_info,
5427 .get = stac92xx_mux_enum_get,
5428 .put = stac92xx_mux_enum_put,
5429 },
5430 {}
5431};
5432
6d859065 5433static struct snd_kcontrol_new vaio_ar_mixer[] = {
127e82e3
TI
5434 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5435 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5436 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5437 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
6d859065
GM
5438 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5439 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5440 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5441 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5442 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5443 {
5444 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5445 .name = "Capture Source",
5446 .count = 1,
5447 .info = stac92xx_mux_enum_info,
5448 .get = stac92xx_mux_enum_get,
5449 .put = stac92xx_mux_enum_put,
5450 },
5451 {}
5452};
5453
5454static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI
5455 .build_controls = stac92xx_build_controls,
5456 .build_pcms = stac92xx_build_pcms,
5457 .init = stac92xx_init,
5458 .free = stac92xx_free,
cb53c626 5459#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI
5460 .resume = stac92xx_resume,
5461#endif
5462};
5463
72e7b0dd
TI
5464static int stac9872_vaio_init(struct hda_codec *codec)
5465{
5466 int err;
5467
5468 err = stac92xx_init(codec);
5469 if (err < 0)
5470 return err;
5471 if (codec->patch_ops.unsol_event)
5472 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5473 return 0;
5474}
5475
5476static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5477{
e6e3ea25 5478 if (get_pin_presence(codec, 0x0a)) {
72e7b0dd
TI
5479 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5480 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5481 } else {
5482 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5483 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5484 }
5485}
5486
5487static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5488{
5489 switch (res >> 26) {
5490 case STAC_HP_EVENT:
5491 stac9872_vaio_hp_detect(codec, res);
5492 break;
5493 }
5494}
5495
5496static struct hda_codec_ops stac9872_vaio_patch_ops = {
5497 .build_controls = stac92xx_build_controls,
5498 .build_pcms = stac92xx_build_pcms,
5499 .init = stac9872_vaio_init,
5500 .free = stac92xx_free,
5501 .unsol_event = stac9872_vaio_unsol_event,
5502#ifdef CONFIG_PM
5503 .resume = stac92xx_resume,
5504#endif
5505};
5506
6d859065
GM
5507enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5508 CXD9872RD_VAIO,
5509 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5510 STAC9872AK_VAIO,
5511 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5512 STAC9872K_VAIO,
5513 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI
5514 CXD9872AKD_VAIO,
5515 STAC_9872_MODELS,
5516};
5517
5518static const char *stac9872_models[STAC_9872_MODELS] = {
5519 [CXD9872RD_VAIO] = "vaio",
5520 [CXD9872AKD_VAIO] = "vaio-ar",
5521};
5522
5523static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5524 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5525 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5526 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5527 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI
5528 {}
5529};
5530
6d859065 5531static int patch_stac9872(struct hda_codec *codec)
db064e50
TI
5532{
5533 struct sigmatel_spec *spec;
5534 int board_config;
5535
f5fcc13c
TI
5536 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5537 stac9872_models,
5538 stac9872_cfg_tbl);
db064e50
TI
5539 if (board_config < 0)
5540 /* unknown config, let generic-parser do its job... */
5541 return snd_hda_parse_generic_codec(codec);
5542
5543 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5544 if (spec == NULL)
5545 return -ENOMEM;
5546
5547 codec->spec = spec;
5548 switch (board_config) {
6d859065
GM
5549 case CXD9872RD_VAIO:
5550 case STAC9872AK_VAIO:
5551 case STAC9872K_VAIO:
db064e50
TI
5552 spec->mixer = vaio_mixer;
5553 spec->init = vaio_init;
5554 spec->multiout.max_channels = 2;
5555 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5556 spec->multiout.dac_nids = vaio_dacs;
5557 spec->multiout.hp_nid = VAIO_HP_DAC;
5558 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5559 spec->adc_nids = vaio_adcs;
a64135a2 5560 spec->num_pwrs = 0;
db064e50
TI
5561 spec->input_mux = &vaio_mux;
5562 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5563 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5564 break;
6d859065
GM
5565
5566 case CXD9872AKD_VAIO:
5567 spec->mixer = vaio_ar_mixer;
5568 spec->init = vaio_ar_init;
5569 spec->multiout.max_channels = 2;
5570 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5571 spec->multiout.dac_nids = vaio_dacs;
5572 spec->multiout.hp_nid = VAIO_HP_DAC;
5573 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5574 spec->num_pwrs = 0;
6d859065
GM
5575 spec->adc_nids = vaio_adcs;
5576 spec->input_mux = &vaio_mux;
5577 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5578 codec->patch_ops = stac9872_patch_ops;
6d859065 5579 break;
db064e50
TI
5580 }
5581
db064e50
TI
5582 return 0;
5583}
5584
5585
2f2f4251
M
5586/*
5587 * patch entries
5588 */
1289e9e8 5589static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M
5590 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5591 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5592 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5593 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5594 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5595 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5596 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP
5597 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5598 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5599 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5600 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5601 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5602 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP
5603 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5604 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5605 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5606 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5607 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5608 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5609 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5610 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5611 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5612 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD
5613 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5614 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5615 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5616 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5617 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5618 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI
5619 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5620 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM
5621 /* The following does not take into account .id=0x83847661 when subsys =
5622 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5623 * currently not fully supported.
5624 */
5625 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5626 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5627 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP
5628 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5629 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5630 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5631 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5632 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5633 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5634 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5635 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5636 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR
5637 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5638 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5639 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR
5640 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5641 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5642 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR
5643 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5644 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5645 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5646 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5647 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5648 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5649 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5650 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M
5651 {} /* terminator */
5652};
1289e9e8
TI
5653
5654MODULE_ALIAS("snd-hda-codec-id:8384*");
5655MODULE_ALIAS("snd-hda-codec-id:111d*");
5656
5657MODULE_LICENSE("GPL");
5658MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5659
5660static struct hda_codec_preset_list sigmatel_list = {
5661 .preset = snd_hda_preset_sigmatel,
5662 .owner = THIS_MODULE,
5663};
5664
5665static int __init patch_sigmatel_init(void)
5666{
5667 return snd_hda_add_codec_preset(&sigmatel_list);
5668}
5669
5670static void __exit patch_sigmatel_exit(void)
5671{
5672 snd_hda_delete_codec_preset(&sigmatel_list);
5673}
5674
5675module_init(patch_sigmatel_init)
5676module_exit(patch_sigmatel_exit)