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[ALSA] hda-codec - Add Dell T3400 support
[linux-block.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
35
4e55096e 36#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 37#define STAC_PWR_EVENT 0x20
38#define STAC_HP_EVENT 0x30
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
dfe495d0
TI		 42 STAC_9200_DELL_D21,
43 STAC_9200_DELL_D22,
44 STAC_9200_DELL_D23,
45 STAC_9200_DELL_M21,
46 STAC_9200_DELL_M22,
47 STAC_9200_DELL_M23,
48 STAC_9200_DELL_M24,
49 STAC_9200_DELL_M25,
50 STAC_9200_DELL_M26,
51 STAC_9200_DELL_M27,
1194b5b7 52 STAC_9200_GATEWAY,
f5fcc13c
TI		 53 STAC_9200_MODELS
54};
55
56enum {
57 STAC_9205_REF,
dfe495d0 58 STAC_9205_DELL_M42,
ae0a8ed8
TD		 59 STAC_9205_DELL_M43,
60 STAC_9205_DELL_M44,
f5fcc13c
TI		 61 STAC_9205_MODELS
62};
63
e1f0d669
MR		 64enum {
65 STAC_92HD73XX_REF,
66 STAC_92HD73XX_MODELS
67};
68
e035b841
MR		 69enum {
70 STAC_92HD71BXX_REF,
71 STAC_92HD71BXX_MODELS
72};
73
8e21c34c
TD		 74enum {
75 STAC_925x_REF,
76 STAC_M2_2,
77 STAC_MA6,
2c11f955 78 STAC_PA6,
8e21c34c
TD		 79 STAC_925x_MODELS
80};
81
f5fcc13c
TI		 82enum {
83 STAC_D945_REF,
84 STAC_D945GTP3,
85 STAC_D945GTP5,
5d5d3bc3
IZ		 86 STAC_INTEL_MAC_V1,
87 STAC_INTEL_MAC_V2,
88 STAC_INTEL_MAC_V3,
89 STAC_INTEL_MAC_V4,
90 STAC_INTEL_MAC_V5,
dfe495d0 91 /* for backward compatibility */
f5fcc13c 92 STAC_MACMINI,
3fc24d85 93 STAC_MACBOOK,
6f0778d8
NB		 94 STAC_MACBOOK_PRO_V1,
95 STAC_MACBOOK_PRO_V2,
f16928fb 96 STAC_IMAC_INTEL,
0dae0f83 97 STAC_IMAC_INTEL_20,
dfe495d0
TI		 98 STAC_922X_DELL_D81,
99 STAC_922X_DELL_D82,
100 STAC_922X_DELL_M81,
101 STAC_922X_DELL_M82,
f5fcc13c
TI		 102 STAC_922X_MODELS
103};
104
105enum {
106 STAC_D965_REF,
107 STAC_D965_3ST,
108 STAC_D965_5ST,
4ff076e5 109 STAC_DELL_3ST,
8e9068b1 110 STAC_DELL_BIOS,
f5fcc13c
TI		 111 STAC_927X_MODELS
112};
403d1944 113
2f2f4251 114struct sigmatel_spec {
c8b6bf9b 115 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 116 unsigned int num_mixers;
117
403d1944 118 int board_config;
c7d4b2fa 119 unsigned int surr_switch: 1;
403d1944
MP		 120 unsigned int line_switch: 1;
121 unsigned int mic_switch: 1;
3cc08dc6 122 unsigned int alt_switch: 1;
82bc955f 123 unsigned int hp_detect: 1;
c7d4b2fa 124
8259980e 125 unsigned int gpio_mask, gpio_data;
e1f0d669
MR		 126 unsigned char aloopback_mask;
127 unsigned char aloopback_shift;
8259980e 128
a64135a2
MR		 129 /* power management */
130 unsigned int num_pwrs;
131 hda_nid_t *pwr_nids;
132
2f2f4251 133 /* playback */
b22b4821
MR		 134 struct hda_input_mux *mono_mux;
135 unsigned int cur_mmux;
2f2f4251 136 struct hda_multi_out multiout;
3cc08dc6 137 hda_nid_t dac_nids[5];
2f2f4251
M		 138
139 /* capture */
140 hda_nid_t *adc_nids;
2f2f4251 141 unsigned int num_adcs;
dabbed6f
M		 142 hda_nid_t *mux_nids;
143 unsigned int num_muxes;
8b65727b
MP		 144 hda_nid_t *dmic_nids;
145 unsigned int num_dmics;
e1f0d669 146 hda_nid_t *dmux_nids;
1697055e 147 unsigned int num_dmuxes;
dabbed6f 148 hda_nid_t dig_in_nid;
b22b4821 149 hda_nid_t mono_nid;
2f2f4251 150
2f2f4251
M		 151 /* pin widgets */
152 hda_nid_t *pin_nids;
153 unsigned int num_pins;
2f2f4251 154 unsigned int *pin_configs;
11b44bbd 155 unsigned int *bios_pin_configs;
2f2f4251
M		 156
157 /* codec specific stuff */
158 struct hda_verb *init;
c8b6bf9b 159 struct snd_kcontrol_new *mixer;
2f2f4251
M		 160
161 /* capture source */
8b65727b 162 struct hda_input_mux *dinput_mux;
e1f0d669 163 unsigned int cur_dmux[2];
c7d4b2fa 164 struct hda_input_mux *input_mux;
3cc08dc6 165 unsigned int cur_mux[3];
2f2f4251 166
403d1944
MP		 167 /* i/o switches */
168 unsigned int io_switch[2];
0fb87bb4 169 unsigned int clfe_swap;
5f10c4a9 170 unsigned int aloopback;
2f2f4251 171
c7d4b2fa
M		 172 struct hda_pcm pcm_rec[2]; /* PCM information */
173
174 /* dynamic controls and input_mux */
175 struct auto_pin_cfg autocfg;
176 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 177 struct snd_kcontrol_new *kctl_alloc;
8b65727b 178 struct hda_input_mux private_dimux;
c7d4b2fa 179 struct hda_input_mux private_imux;
b22b4821 180 struct hda_input_mux private_mono_mux;
2134ea4f
TI		 181
182 /* virtual master */
183 unsigned int vmaster_tlv[4];
2f2f4251
M		 184};
185
186static hda_nid_t stac9200_adc_nids[1] = {
187 0x03,
188};
189
190static hda_nid_t stac9200_mux_nids[1] = {
191 0x0c,
192};
193
194static hda_nid_t stac9200_dac_nids[1] = {
195 0x02,
196};
197
a64135a2
MR		 198static hda_nid_t stac92hd73xx_pwr_nids[8] = {
199 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
200 0x0f, 0x10, 0x11
201};
202
e1f0d669
MR		 203static hda_nid_t stac92hd73xx_adc_nids[2] = {
204 0x1a, 0x1b
205};
206
207#define STAC92HD73XX_NUM_DMICS 2
208static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
209 0x13, 0x14, 0
210};
211
212#define STAC92HD73_DAC_COUNT 5
213static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
214 0x15, 0x16, 0x17, 0x18, 0x19,
215};
216
217static hda_nid_t stac92hd73xx_mux_nids[4] = {
218 0x28, 0x29, 0x2a, 0x2b,
219};
220
221static hda_nid_t stac92hd73xx_dmux_nids[2] = {
222 0x20, 0x21,
223};
224
a64135a2
MR		 225static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
226 0x0a, 0x0d, 0x0f
227};
228
e035b841
MR		 229static hda_nid_t stac92hd71bxx_adc_nids[2] = {
230 0x12, 0x13,
231};
232
233static hda_nid_t stac92hd71bxx_mux_nids[2] = {
234 0x1a, 0x1b
235};
236
e1f0d669
MR		 237static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
238 0x1c,
239};
240
e035b841
MR		 241static hda_nid_t stac92hd71bxx_dac_nids[2] = {
242 0x10, /*0x11, */
243};
244
245#define STAC92HD71BXX_NUM_DMICS 2
246static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
247 0x18, 0x19, 0
248};
249
8e21c34c
TD		 250static hda_nid_t stac925x_adc_nids[1] = {
251 0x03,
252};
253
254static hda_nid_t stac925x_mux_nids[1] = {
255 0x0f,
256};
257
258static hda_nid_t stac925x_dac_nids[1] = {
259 0x02,
260};
261
f6e9852a
TI		 262#define STAC925X_NUM_DMICS 1
263static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
264 0x15, 0
2c11f955
TD		 265};
266
1697055e
TI		 267static hda_nid_t stac925x_dmux_nids[1] = {
268 0x14,
269};
270
2f2f4251
M		 271static hda_nid_t stac922x_adc_nids[2] = {
272 0x06, 0x07,
273};
274
275static hda_nid_t stac922x_mux_nids[2] = {
276 0x12, 0x13,
277};
278
3cc08dc6
MP		 279static hda_nid_t stac927x_adc_nids[3] = {
280 0x07, 0x08, 0x09
281};
282
283static hda_nid_t stac927x_mux_nids[3] = {
284 0x15, 0x16, 0x17
285};
286
e1f0d669
MR		 287static hda_nid_t stac927x_dmux_nids[1] = {
288 0x1b,
289};
290
7f16859a
MR		 291#define STAC927X_NUM_DMICS 2
292static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
293 0x13, 0x14, 0
294};
295
f3302a59
MP		 296static hda_nid_t stac9205_adc_nids[2] = {
297 0x12, 0x13
298};
299
300static hda_nid_t stac9205_mux_nids[2] = {
301 0x19, 0x1a
302};
303
e1f0d669 304static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 305 0x1d,
e1f0d669
MR		 306};
307
f6e9852a
TI		 308#define STAC9205_NUM_DMICS 2
309static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
310 0x17, 0x18, 0
8b65727b
MP		 311};
312
c7d4b2fa 313static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 314 0x08, 0x09, 0x0d, 0x0e,
315 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 316};
317
8e21c34c
TD		 318static hda_nid_t stac925x_pin_nids[8] = {
319 0x07, 0x08, 0x0a, 0x0b,
320 0x0c, 0x0d, 0x10, 0x11,
321};
322
2f2f4251
M		 323static hda_nid_t stac922x_pin_nids[10] = {
324 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
325 0x0f, 0x10, 0x11, 0x15, 0x1b,
326};
327
e1f0d669
MR		 328static hda_nid_t stac92hd73xx_pin_nids[12] = {
329 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
330 0x0f, 0x10, 0x11, 0x12, 0x13,
331 0x14, 0x22
332};
333
e035b841
MR		 334static hda_nid_t stac92hd71bxx_pin_nids[10] = {
335 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
336 0x0f, 0x14, 0x18, 0x19, 0x1e,
337};
338
3cc08dc6
MP		 339static hda_nid_t stac927x_pin_nids[14] = {
340 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
341 0x0f, 0x10, 0x11, 0x12, 0x13,
342 0x14, 0x21, 0x22, 0x23,
343};
344
f3302a59
MP		 345static hda_nid_t stac9205_pin_nids[12] = {
346 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
347 0x0f, 0x14, 0x16, 0x17, 0x18,
348 0x21, 0x22,
f3302a59
MP		 349};
350
8b65727b
MP		 351static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
352 struct snd_ctl_elem_info *uinfo)
353{
354 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
355 struct sigmatel_spec *spec = codec->spec;
356 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
357}
358
359static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
360 struct snd_ctl_elem_value *ucontrol)
361{
362 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
363 struct sigmatel_spec *spec = codec->spec;
e1f0d669 364 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 365
e1f0d669 366 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 367 return 0;
368}
369
370static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
371 struct snd_ctl_elem_value *ucontrol)
372{
373 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
374 struct sigmatel_spec *spec = codec->spec;
e1f0d669 375 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 376
377 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 378 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 379}
380
c8b6bf9b 381static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 382{
383 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
384 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 385 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 386}
387
c8b6bf9b 388static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 389{
390 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
391 struct sigmatel_spec *spec = codec->spec;
392 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
393
394 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
395 return 0;
396}
397
c8b6bf9b 398static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 399{
400 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
401 struct sigmatel_spec *spec = codec->spec;
402 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
403
c7d4b2fa 404 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 405 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
406}
407
b22b4821
MR		 408static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
409 struct snd_ctl_elem_info *uinfo)
410{
411 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
412 struct sigmatel_spec *spec = codec->spec;
413 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
414}
415
416static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
417 struct snd_ctl_elem_value *ucontrol)
418{
419 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
420 struct sigmatel_spec *spec = codec->spec;
421
422 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
423 return 0;
424}
425
426static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
427 struct snd_ctl_elem_value *ucontrol)
428{
429 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
430 struct sigmatel_spec *spec = codec->spec;
431
432 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
433 spec->mono_nid, &spec->cur_mmux);
434}
435
5f10c4a9
ML		 436#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
437
438static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
439 struct snd_ctl_elem_value *ucontrol)
440{
441 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 442 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 443 struct sigmatel_spec *spec = codec->spec;
444
e1f0d669
MR		 445 ucontrol->value.integer.value[0] = !!(spec->aloopback &
446 (spec->aloopback_mask << idx));
5f10c4a9
ML		 447 return 0;
448}
449
450static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
451 struct snd_ctl_elem_value *ucontrol)
452{
453 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
454 struct sigmatel_spec *spec = codec->spec;
e1f0d669 455 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 456 unsigned int dac_mode;
e1f0d669 457 unsigned int val, idx_val;
5f10c4a9 458
e1f0d669
MR		 459 idx_val = spec->aloopback_mask << idx;
460 if (ucontrol->value.integer.value[0])
461 val = spec->aloopback | idx_val;
462 else
463 val = spec->aloopback & ~idx_val;
68ea7b2f 464 if (spec->aloopback == val)
5f10c4a9
ML		 465 return 0;
466
68ea7b2f 467 spec->aloopback = val;
5f10c4a9 468
e1f0d669
MR		 469 /* Only return the bits defined by the shift value of the
470 * first two bytes of the mask
471 */
5f10c4a9 472 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 473 kcontrol->private_value & 0xFFFF, 0x0);
474 dac_mode >>= spec->aloopback_shift;
5f10c4a9 475
e1f0d669 476 if (spec->aloopback & idx_val) {
5f10c4a9 477 snd_hda_power_up(codec);
e1f0d669 478 dac_mode |= idx_val;
5f10c4a9
ML		 479 } else {
480 snd_hda_power_down(codec);
e1f0d669 481 dac_mode &= ~idx_val;
5f10c4a9
ML		 482 }
483
484 snd_hda_codec_write_cache(codec, codec->afg, 0,
485 kcontrol->private_value >> 16, dac_mode);
486
487 return 1;
488}
489
c7d4b2fa 490static struct hda_verb stac9200_core_init[] = {
2f2f4251 491 /* set dac0mux for dac converter */
c7d4b2fa 492 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 493 {}
494};
495
1194b5b7
TI		 496static struct hda_verb stac9200_eapd_init[] = {
497 /* set dac0mux for dac converter */
498 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
499 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
500 {}
501};
502
e1f0d669
MR		 503static struct hda_verb stac92hd73xx_6ch_core_init[] = {
504 /* set master volume and direct control */
505 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
506 /* setup audio connections */
507 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
508 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
509 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
510 /* setup adcs to point to mixer */
511 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
512 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 513 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
514 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
515 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
516 /* setup import muxs */
517 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
518 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
519 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
520 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
521 {}
522};
523
524static struct hda_verb stac92hd73xx_8ch_core_init[] = {
525 /* set master volume and direct control */
526 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
527 /* setup audio connections */
528 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
529 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
530 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
531 /* connect hp ports to dac3 */
532 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
533 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
534 /* setup adcs to point to mixer */
535 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
536 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 537 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
538 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
539 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
540 /* setup import muxs */
541 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
542 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
543 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
544 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
545 {}
546};
547
548static struct hda_verb stac92hd73xx_10ch_core_init[] = {
549 /* set master volume and direct control */
550 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
551 /* setup audio connections */
552 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
553 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
554 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
555 /* dac3 is connected to import3 mux */
556 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
557 /* connect hp ports to dac4 */
558 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
559 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
560 /* setup adcs to point to mixer */
561 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
562 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 563 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
564 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
565 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
566 /* setup import muxs */
567 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
568 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
569 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
570 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
571 {}
572};
573
e035b841 574static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 575 /* set master volume and direct control */
576 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
577 /* connect headphone jack to dac1 */
578 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
579 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
580 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
581 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
582 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
583 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 584};
585
586static struct hda_verb stac92hd71bxx_analog_core_init[] = {
e035b841
MR		 587 /* set master volume and direct control */
588 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
589 /* connect headphone jack to dac1 */
590 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
9b35947f
MR		 591 /* connect ports 0d and 0f to audio mixer */
592 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
593 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
a64135a2 594 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
9b35947f
MR		 595 /* unmute dac0 input in audio mixer */
596 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
e035b841
MR		 597 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
598 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
599 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
600 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 601 {}
602};
603
8e21c34c
TD		 604static struct hda_verb stac925x_core_init[] = {
605 /* set dac0mux for dac converter */
606 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
607 {}
608};
609
c7d4b2fa 610static struct hda_verb stac922x_core_init[] = {
2f2f4251 611 /* set master volume and direct control */
c7d4b2fa 612 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 613 {}
614};
615
93ed1503 616static struct hda_verb d965_core_init[] = {
19039bd0 617 /* set master volume and direct control */
93ed1503 618 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 619 /* unmute node 0x1b */
620 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
621 /* select node 0x03 as DAC */
622 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
623 {}
624};
625
3cc08dc6
MP		 626static struct hda_verb stac927x_core_init[] = {
627 /* set master volume and direct control */
628 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
629 {}
630};
631
f3302a59
MP		 632static struct hda_verb stac9205_core_init[] = {
633 /* set master volume and direct control */
634 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
635 {}
636};
637
b22b4821
MR		 638#define STAC_MONO_MUX \
639 { \
640 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
641 .name = "Mono Mux", \
642 .count = 1, \
643 .info = stac92xx_mono_mux_enum_info, \
644 .get = stac92xx_mono_mux_enum_get, \
645 .put = stac92xx_mono_mux_enum_put, \
646 }
647
9e05b7a3 648#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 649 { \
650 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
651 .name = "Input Source", \
9e05b7a3 652 .count = cnt, \
ca7c5a8b
ML		 653 .info = stac92xx_mux_enum_info, \
654 .get = stac92xx_mux_enum_get, \
655 .put = stac92xx_mux_enum_put, \
656 }
657
e1f0d669 658#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 659 { \
660 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
661 .name = "Analog Loopback", \
e1f0d669 662 .count = cnt, \
5f10c4a9
ML		 663 .info = stac92xx_aloopback_info, \
664 .get = stac92xx_aloopback_get, \
665 .put = stac92xx_aloopback_put, \
666 .private_value = verb_read | (verb_write << 16), \
667 }
668
c8b6bf9b 669static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 670 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
671 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 672 STAC_INPUT_SOURCE(1),
2f2f4251
M		 673 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
674 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 675 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 676 { } /* end */
677};
678
e1f0d669 679static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 680 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
681
e1f0d669
MR		 682 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
683 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
684
685 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
686 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
687
688 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
689 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
690
691 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
692 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
693
694 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
695 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
696
697 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
698 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
699
700 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
701 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
702 { } /* end */
703};
704
705static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 706 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
707
e1f0d669
MR		 708 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
709 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
710
711 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
712 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
713
714 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
715 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
716
717 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
718 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
719
720 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
721 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
722
723 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
724 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
725
726 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
727 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
728 { } /* end */
729};
730
731static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 732 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
733
e1f0d669
MR		 734 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
735 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
736
737 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
738 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
739
740 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
741 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
742
743 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
744 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
745
746 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
747 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
748
749 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
750 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
751
752 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
753 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
754 { } /* end */
755};
756
541eee87 757static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 758 STAC_INPUT_SOURCE(2),
e035b841 759
9b35947f
MR		 760 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
761 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
762 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
763
764 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
765 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
766 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 767
9b35947f
MR		 768 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
769 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 770 { } /* end */
771};
772
541eee87 773static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 774 STAC_INPUT_SOURCE(2),
775 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
776
541eee87
MR		 777 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
778 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
779 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
780
781 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
782 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
783 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
784 { } /* end */
785};
786
8e21c34c 787static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 788 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 789 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
790 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
791 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
792 { } /* end */
793};
794
9e05b7a3 795static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 796 STAC_INPUT_SOURCE(2),
e1f0d669 797 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 798
799 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
800 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
801 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
802
803 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
804 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
805 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
806
2f2f4251
M		 807 { } /* end */
808};
809
19039bd0 810/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 811static struct snd_kcontrol_new stac922x_mixer[] = {
812 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 813 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
814 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
815 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
816
817 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
818 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
819 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 820 { } /* end */
821};
822
9e05b7a3 823
d1d985f0 824static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 825 STAC_INPUT_SOURCE(3),
e1f0d669 826 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 827
9e05b7a3
ML		 828 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
829 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
830 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
831
832 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
833 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
834 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
835
836 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
837 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
838 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 839 { } /* end */
840};
841
1697055e
TI		 842static struct snd_kcontrol_new stac_dmux_mixer = {
843 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
844 .name = "Digital Input Source",
845 /* count set later */
846 .info = stac92xx_dmux_enum_info,
847 .get = stac92xx_dmux_enum_get,
848 .put = stac92xx_dmux_enum_put,
849};
850
2134ea4f
TI		 851static const char *slave_vols[] = {
852 "Front Playback Volume",
853 "Surround Playback Volume",
854 "Center Playback Volume",
855 "LFE Playback Volume",
856 "Side Playback Volume",
857 "Headphone Playback Volume",
858 "Headphone Playback Volume",
859 "Speaker Playback Volume",
860 "External Speaker Playback Volume",
861 "Speaker2 Playback Volume",
862 NULL
863};
864
865static const char *slave_sws[] = {
866 "Front Playback Switch",
867 "Surround Playback Switch",
868 "Center Playback Switch",
869 "LFE Playback Switch",
870 "Side Playback Switch",
871 "Headphone Playback Switch",
872 "Headphone Playback Switch",
873 "Speaker Playback Switch",
874 "External Speaker Playback Switch",
875 "Speaker2 Playback Switch",
edb54a55 876 "IEC958 Playback Switch",
2134ea4f
TI		 877 NULL
878};
879
2f2f4251
M		 880static int stac92xx_build_controls(struct hda_codec *codec)
881{
882 struct sigmatel_spec *spec = codec->spec;
883 int err;
c7d4b2fa 884 int i;
2f2f4251
M		 885
886 err = snd_hda_add_new_ctls(codec, spec->mixer);
887 if (err < 0)
888 return err;
c7d4b2fa
M		 889
890 for (i = 0; i < spec->num_mixers; i++) {
891 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
892 if (err < 0)
893 return err;
894 }
1697055e
TI		 895 if (spec->num_dmuxes > 0) {
896 stac_dmux_mixer.count = spec->num_dmuxes;
897 err = snd_ctl_add(codec->bus->card,
898 snd_ctl_new1(&stac_dmux_mixer, codec));
899 if (err < 0)
900 return err;
901 }
c7d4b2fa 902
dabbed6f
M		 903 if (spec->multiout.dig_out_nid) {
904 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
905 if (err < 0)
906 return err;
907 }
908 if (spec->dig_in_nid) {
909 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
910 if (err < 0)
911 return err;
912 }
2134ea4f
TI		 913
914 /* if we have no master control, let's create it */
915 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
916 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
917 HDA_OUTPUT, spec->vmaster_tlv);
918 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
919 spec->vmaster_tlv, slave_vols);
920 if (err < 0)
921 return err;
922 }
923 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
924 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
925 NULL, slave_sws);
926 if (err < 0)
927 return err;
928 }
929
dabbed6f 930 return 0;
2f2f4251
M		 931}
932
403d1944 933static unsigned int ref9200_pin_configs[8] = {
dabbed6f 934 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 935 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
936};
937
dfe495d0
TI		 938/*
939 STAC 9200 pin configs for
940 102801A8
941 102801DE
942 102801E8
943*/
944static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 945 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
946 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 947};
948
949/*
950 STAC 9200 pin configs for
951 102801C0
952 102801C1
953*/
954static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 955 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
956 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 957};
958
959/*
960 STAC 9200 pin configs for
961 102801C4 (Dell Dimension E310)
962 102801C5
963 102801C7
964 102801D9
965 102801DA
966 102801E3
967*/
968static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 969 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
970 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 971};
972
973
974/*
975 STAC 9200-32 pin configs for
976 102801B5 (Dell Inspiron 630m)
977 102801D8 (Dell Inspiron 640m)
978*/
979static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 980 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
981 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 982};
983
984/*
985 STAC 9200-32 pin configs for
986 102801C2 (Dell Latitude D620)
987 102801C8
988 102801CC (Dell Latitude D820)
989 102801D4
990 102801D6
991*/
992static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 993 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
994 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 995};
996
997/*
998 STAC 9200-32 pin configs for
999 102801CE (Dell XPS M1710)
1000 102801CF (Dell Precision M90)
1001*/
1002static unsigned int dell9200_m23_pin_configs[8] = {
1003 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1004 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1005};
1006
1007/*
1008 STAC 9200-32 pin configs for
1009 102801C9
1010 102801CA
1011 102801CB (Dell Latitude 120L)
1012 102801D3
1013*/
1014static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1015 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1016 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1017};
1018
1019/*
1020 STAC 9200-32 pin configs for
1021 102801BD (Dell Inspiron E1505n)
1022 102801EE
1023 102801EF
1024*/
1025static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1026 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1027 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1028};
1029
1030/*
1031 STAC 9200-32 pin configs for
1032 102801F5 (Dell Inspiron 1501)
1033 102801F6
1034*/
1035static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1036 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1037 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1038};
1039
1040/*
1041 STAC 9200-32
1042 102801CD (Dell Inspiron E1705/9400)
1043*/
1044static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1045 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1046 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1047};
1048
1049
f5fcc13c
TI		 1050static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1051 [STAC_REF] = ref9200_pin_configs,
dfe495d0
TI		 1052 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1053 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1054 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1055 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1056 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1057 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1058 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1059 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1060 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1061 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 1062};
1063
f5fcc13c
TI		 1064static const char *stac9200_models[STAC_9200_MODELS] = {
1065 [STAC_REF] = "ref",
dfe495d0
TI		 1066 [STAC_9200_DELL_D21] = "dell-d21",
1067 [STAC_9200_DELL_D22] = "dell-d22",
1068 [STAC_9200_DELL_D23] = "dell-d23",
1069 [STAC_9200_DELL_M21] = "dell-m21",
1070 [STAC_9200_DELL_M22] = "dell-m22",
1071 [STAC_9200_DELL_M23] = "dell-m23",
1072 [STAC_9200_DELL_M24] = "dell-m24",
1073 [STAC_9200_DELL_M25] = "dell-m25",
1074 [STAC_9200_DELL_M26] = "dell-m26",
1075 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1076 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 1077};
1078
1079static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1080 /* SigmaTel reference board */
1081 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1082 "DFI LanParty", STAC_REF),
e7377071 1083 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1084 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1085 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1086 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1087 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1088 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1089 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1090 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1091 "unknown Dell", STAC_9200_DELL_D22),
1092 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1093 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1094 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1095 "Dell Latitude D620", STAC_9200_DELL_M22),
1096 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1097 "unknown Dell", STAC_9200_DELL_D23),
1098 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1099 "unknown Dell", STAC_9200_DELL_D23),
1100 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1101 "unknown Dell", STAC_9200_DELL_M22),
1102 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1103 "unknown Dell", STAC_9200_DELL_M24),
1104 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1105 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1106 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1107 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1108 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1109 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1110 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1111 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1112 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1113 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1114 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1115 "Dell Precision M90", STAC_9200_DELL_M23),
1116 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1117 "unknown Dell", STAC_9200_DELL_M22),
1118 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1119 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1120 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1121 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1122 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1123 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1124 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1125 "unknown Dell", STAC_9200_DELL_D23),
1126 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1127 "unknown Dell", STAC_9200_DELL_D23),
1128 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1129 "unknown Dell", STAC_9200_DELL_D21),
1130 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1131 "unknown Dell", STAC_9200_DELL_D23),
1132 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1133 "unknown Dell", STAC_9200_DELL_D21),
1134 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1135 "unknown Dell", STAC_9200_DELL_M25),
1136 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1137 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1138 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1139 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1140 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1141 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 1142 /* Panasonic */
1143 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 1144 /* Gateway machines needs EAPD to be set on resume */
1145 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1146 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1147 STAC_9200_GATEWAY),
1148 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1149 STAC_9200_GATEWAY),
403d1944
MP		 1150 {} /* terminator */
1151};
1152
8e21c34c
TD		 1153static unsigned int ref925x_pin_configs[8] = {
1154 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1155 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1156};
1157
1158static unsigned int stac925x_MA6_pin_configs[8] = {
1159 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1160 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1161};
1162
2c11f955
TD		 1163static unsigned int stac925x_PA6_pin_configs[8] = {
1164 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1165 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1166};
1167
8e21c34c 1168static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1169 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1170 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1171};
1172
1173static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1174 [STAC_REF] = ref925x_pin_configs,
1175 [STAC_M2_2] = stac925xM2_2_pin_configs,
1176 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1177 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1178};
1179
1180static const char *stac925x_models[STAC_925x_MODELS] = {
1181 [STAC_REF] = "ref",
1182 [STAC_M2_2] = "m2-2",
1183 [STAC_MA6] = "m6",
2c11f955 1184 [STAC_PA6] = "pa6",
8e21c34c
TD		 1185};
1186
1187static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1188 /* SigmaTel reference board */
1189 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1190 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1191 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1192 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1193 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1194 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1195 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1196 {} /* terminator */
1197};
1198
e1f0d669
MR		 1199static unsigned int ref92hd73xx_pin_configs[12] = {
1200 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1201 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1202 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
1203};
1204
1205static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
1206 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1207};
1208
1209static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1210 [STAC_92HD73XX_REF] = "ref",
1211};
1212
1213static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1214 /* SigmaTel reference board */
1215 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1216 "DFI LanParty", STAC_92HD73XX_REF),
1217 {} /* terminator */
1218};
1219
e035b841
MR		 1220static unsigned int ref92hd71bxx_pin_configs[10] = {
1221 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1222 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
e035b841
MR		 1223 0x90a000f0, 0x01452050,
1224};
1225
1226static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1227 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
1228};
1229
1230static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1231 [STAC_92HD71BXX_REF] = "ref",
1232};
1233
1234static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1235 /* SigmaTel reference board */
1236 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1237 "DFI LanParty", STAC_92HD71BXX_REF),
1238 {} /* terminator */
1239};
1240
403d1944
MP		 1241static unsigned int ref922x_pin_configs[10] = {
1242 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1243 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1244 0x40000100, 0x40000100,
1245};
1246
dfe495d0
TI		 1247/*
1248 STAC 922X pin configs for
1249 102801A7
1250 102801AB
1251 102801A9
1252 102801D1
1253 102801D2
1254*/
1255static unsigned int dell_922x_d81_pin_configs[10] = {
1256 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1257 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1258 0x01813122, 0x400001f2,
1259};
1260
1261/*
1262 STAC 922X pin configs for
1263 102801AC
1264 102801D0
1265*/
1266static unsigned int dell_922x_d82_pin_configs[10] = {
1267 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1268 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1269 0x01813122, 0x400001f1,
1270};
1271
1272/*
1273 STAC 922X pin configs for
1274 102801BF
1275*/
1276static unsigned int dell_922x_m81_pin_configs[10] = {
1277 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1278 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1279 0x40C003f1, 0x405003f0,
1280};
1281
1282/*
1283 STAC 9221 A1 pin configs for
1284 102801D7 (Dell XPS M1210)
1285*/
1286static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1287 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1288 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1289 0x508003f3, 0x405003f4,
1290};
1291
403d1944 1292static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1293 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1294 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1295 0x02a19120, 0x40000100,
1296};
1297
1298static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1299 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1300 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1301 0x02a19320, 0x40000100,
1302};
1303
5d5d3bc3
IZ		 1304static unsigned int intel_mac_v1_pin_configs[10] = {
1305 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1306 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1307 0x400000fc, 0x400000fb,
1308};
1309
1310static unsigned int intel_mac_v2_pin_configs[10] = {
1311 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1312 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1313 0x400000fc, 0x400000fb,
6f0778d8
NB		 1314};
1315
5d5d3bc3
IZ		 1316static unsigned int intel_mac_v3_pin_configs[10] = {
1317 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1318 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1319 0x400000fc, 0x400000fb,
1320};
1321
5d5d3bc3
IZ		 1322static unsigned int intel_mac_v4_pin_configs[10] = {
1323 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1324 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1325 0x400000fc, 0x400000fb,
1326};
1327
5d5d3bc3
IZ		 1328static unsigned int intel_mac_v5_pin_configs[10] = {
1329 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1330 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1331 0x400000fc, 0x400000fb,
0dae0f83
TI		 1332};
1333
76c08828 1334
19039bd0 1335static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1336 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1337 [STAC_D945GTP3] = d945gtp3_pin_configs,
1338 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1339 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1340 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1341 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1342 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1343 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 1344 /* for backward compatibility */
5d5d3bc3
IZ		 1345 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1346 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1347 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1348 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1349 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1350 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1351 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1352 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1353 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1354 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1355};
1356
f5fcc13c
TI		 1357static const char *stac922x_models[STAC_922X_MODELS] = {
1358 [STAC_D945_REF] = "ref",
1359 [STAC_D945GTP5] = "5stack",
1360 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1361 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1362 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1363 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1364 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1365 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 1366 /* for backward compatibility */
f5fcc13c 1367 [STAC_MACMINI] = "macmini",
3fc24d85 1368 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1369 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1370 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1371 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1372 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1373 [STAC_922X_DELL_D81] = "dell-d81",
1374 [STAC_922X_DELL_D82] = "dell-d82",
1375 [STAC_922X_DELL_M81] = "dell-m81",
1376 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1377};
1378
1379static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1380 /* SigmaTel reference board */
1381 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1382 "DFI LanParty", STAC_D945_REF),
1383 /* Intel 945G based systems */
1384 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1385 "Intel D945G", STAC_D945GTP3),
1386 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1387 "Intel D945G", STAC_D945GTP3),
1388 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1389 "Intel D945G", STAC_D945GTP3),
1390 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1391 "Intel D945G", STAC_D945GTP3),
1392 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1393 "Intel D945G", STAC_D945GTP3),
1394 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1395 "Intel D945G", STAC_D945GTP3),
1396 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1397 "Intel D945G", STAC_D945GTP3),
1398 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1399 "Intel D945G", STAC_D945GTP3),
1400 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1401 "Intel D945G", STAC_D945GTP3),
1402 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1403 "Intel D945G", STAC_D945GTP3),
1404 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1405 "Intel D945G", STAC_D945GTP3),
1406 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1407 "Intel D945G", STAC_D945GTP3),
1408 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1409 "Intel D945G", STAC_D945GTP3),
1410 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1411 "Intel D945G", STAC_D945GTP3),
1412 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1413 "Intel D945G", STAC_D945GTP3),
1414 /* Intel D945G 5-stack systems */
1415 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1416 "Intel D945G", STAC_D945GTP5),
1417 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1418 "Intel D945G", STAC_D945GTP5),
1419 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1420 "Intel D945G", STAC_D945GTP5),
1421 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1422 "Intel D945G", STAC_D945GTP5),
1423 /* Intel 945P based systems */
1424 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1425 "Intel D945P", STAC_D945GTP3),
1426 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1427 "Intel D945P", STAC_D945GTP3),
1428 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1429 "Intel D945P", STAC_D945GTP3),
1430 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1431 "Intel D945P", STAC_D945GTP3),
1432 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1433 "Intel D945P", STAC_D945GTP3),
1434 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1435 "Intel D945P", STAC_D945GTP5),
1436 /* other systems */
1437 /* Apple Mac Mini (early 2006) */
1438 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1439 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1440 /* Dell systems */
1441 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1442 "unknown Dell", STAC_922X_DELL_D81),
1443 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1444 "unknown Dell", STAC_922X_DELL_D81),
1445 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1446 "unknown Dell", STAC_922X_DELL_D81),
1447 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1448 "unknown Dell", STAC_922X_DELL_D82),
1449 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1450 "unknown Dell", STAC_922X_DELL_M81),
1451 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1452 "unknown Dell", STAC_922X_DELL_D82),
1453 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1454 "unknown Dell", STAC_922X_DELL_D81),
1455 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1456 "unknown Dell", STAC_922X_DELL_D81),
1457 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1458 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1459 {} /* terminator */
1460};
1461
3cc08dc6 1462static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1463 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1464 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1465 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1466 0x01c42190, 0x40000100,
3cc08dc6
MP		 1467};
1468
93ed1503 1469static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1470 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1471 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1472 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1473 0x40000100, 0x40000100
1474};
1475
93ed1503
TD		 1476static unsigned int d965_5st_pin_configs[14] = {
1477 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1478 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1479 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1480 0x40000100, 0x40000100
1481};
1482
4ff076e5
TD		 1483static unsigned int dell_3st_pin_configs[14] = {
1484 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1485 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1486 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1487 0x40c003fc, 0x40000100
1488};
1489
93ed1503 1490static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1491 [STAC_D965_REF] = ref927x_pin_configs,
1492 [STAC_D965_3ST] = d965_3st_pin_configs,
1493 [STAC_D965_5ST] = d965_5st_pin_configs,
1494 [STAC_DELL_3ST] = dell_3st_pin_configs,
1495 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1496};
1497
f5fcc13c 1498static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1499 [STAC_D965_REF] = "ref",
1500 [STAC_D965_3ST] = "3stack",
1501 [STAC_D965_5ST] = "5stack",
1502 [STAC_DELL_3ST] = "dell-3stack",
1503 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1504};
1505
1506static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1507 /* SigmaTel reference board */
1508 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1509 "DFI LanParty", STAC_D965_REF),
81d3dbde 1510 /* Intel 946 based systems */
f5fcc13c
TI		 1511 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1513 /* 965 based 3 stack systems */
f5fcc13c
TI		 1514 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1517 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1530 /* Dell 3 stack systems */
8e9068b1 1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1535 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1
MR		 1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1544 /* 965 based 5 stack systems */
f5fcc13c
TI		 1545 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1546 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1548 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1550 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1551 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1552 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1554 {} /* terminator */
1555};
1556
f3302a59
MP		 1557static unsigned int ref9205_pin_configs[12] = {
1558 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 1559 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 1560 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1561};
1562
dfe495d0
TI		 1563/*
1564 STAC 9205 pin configs for
1565 102801F1
1566 102801F2
1567 102801FC
1568 102801FD
1569 10280204
1570 1028021F
3fa2ef74 1571 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1572*/
1573static unsigned int dell_9205_m42_pin_configs[12] = {
1574 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1575 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1576 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1577};
1578
1579/*
1580 STAC 9205 pin configs for
1581 102801F9
1582 102801FA
1583 102801FE
1584 102801FF (Dell Precision M4300)
1585 10280206
1586 10280200
1587 10280201
1588*/
1589static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1590 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1591 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1592 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1593};
1594
dfe495d0 1595static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1596 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1597 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1598 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1599};
1600
f5fcc13c 1601static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1602 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1603 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1604 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1605 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1606};
1607
f5fcc13c
TI		 1608static const char *stac9205_models[STAC_9205_MODELS] = {
1609 [STAC_9205_REF] = "ref",
dfe495d0 1610 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1611 [STAC_9205_DELL_M43] = "dell-m43",
1612 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1613};
1614
1615static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1616 /* SigmaTel reference board */
1617 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1618 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1619 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1620 "unknown Dell", STAC_9205_DELL_M42),
1621 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1622 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1623 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1624 "Dell Precision", STAC_9205_DELL_M43),
1625 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1626 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1627 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1628 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1629 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1630 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1631 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1632 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1633 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1634 "unknown Dell", STAC_9205_DELL_M42),
1635 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1636 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1637 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1638 "Dell Precision", STAC_9205_DELL_M43),
1639 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1640 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1641 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1642 "Dell Precision", STAC_9205_DELL_M43),
1643 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1644 "Dell Inspiron", STAC_9205_DELL_M44),
1645 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1646 "Dell Inspiron", STAC_9205_DELL_M44),
1647 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1648 "Dell Inspiron", STAC_9205_DELL_M44),
1649 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1650 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1651 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1652 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1653 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1654 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 1655 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1656 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 1657 {} /* terminator */
1658};
1659
11b44bbd
RF		 1660static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1661{
1662 int i;
1663 struct sigmatel_spec *spec = codec->spec;
1664
1665 if (! spec->bios_pin_configs) {
1666 spec->bios_pin_configs = kcalloc(spec->num_pins,
1667 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1668 if (! spec->bios_pin_configs)
1669 return -ENOMEM;
1670 }
1671
1672 for (i = 0; i < spec->num_pins; i++) {
1673 hda_nid_t nid = spec->pin_nids[i];
1674 unsigned int pin_cfg;
1675
1676 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1677 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1678 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1679 nid, pin_cfg);
1680 spec->bios_pin_configs[i] = pin_cfg;
1681 }
1682
1683 return 0;
1684}
1685
87d48363
MR		 1686static void stac92xx_set_config_reg(struct hda_codec *codec,
1687 hda_nid_t pin_nid, unsigned int pin_config)
1688{
1689 int i;
1690 snd_hda_codec_write(codec, pin_nid, 0,
1691 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1692 pin_config & 0x000000ff);
1693 snd_hda_codec_write(codec, pin_nid, 0,
1694 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1695 (pin_config & 0x0000ff00) >> 8);
1696 snd_hda_codec_write(codec, pin_nid, 0,
1697 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1698 (pin_config & 0x00ff0000) >> 16);
1699 snd_hda_codec_write(codec, pin_nid, 0,
1700 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1701 pin_config >> 24);
1702 i = snd_hda_codec_read(codec, pin_nid, 0,
1703 AC_VERB_GET_CONFIG_DEFAULT,
1704 0x00);
1705 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1706 pin_nid, i);
1707}
1708
2f2f4251
M		 1709static void stac92xx_set_config_regs(struct hda_codec *codec)
1710{
1711 int i;
1712 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1713
87d48363
MR		 1714 if (!spec->pin_configs)
1715 return;
11b44bbd 1716
87d48363
MR		 1717 for (i = 0; i < spec->num_pins; i++)
1718 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1719 spec->pin_configs[i]);
2f2f4251 1720}
2f2f4251 1721
dabbed6f 1722/*
c7d4b2fa 1723 * Analog playback callbacks
dabbed6f 1724 */
c7d4b2fa
M		 1725static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1726 struct hda_codec *codec,
c8b6bf9b 1727 struct snd_pcm_substream *substream)
2f2f4251 1728{
dabbed6f 1729 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 1730 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 1731}
1732
2f2f4251
M		 1733static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1734 struct hda_codec *codec,
1735 unsigned int stream_tag,
1736 unsigned int format,
c8b6bf9b 1737 struct snd_pcm_substream *substream)
2f2f4251
M		 1738{
1739 struct sigmatel_spec *spec = codec->spec;
403d1944 1740 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1741}
1742
1743static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1744 struct hda_codec *codec,
c8b6bf9b 1745 struct snd_pcm_substream *substream)
2f2f4251
M		 1746{
1747 struct sigmatel_spec *spec = codec->spec;
1748 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1749}
1750
dabbed6f
M		 1751/*
1752 * Digital playback callbacks
1753 */
1754static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1755 struct hda_codec *codec,
c8b6bf9b 1756 struct snd_pcm_substream *substream)
dabbed6f
M		 1757{
1758 struct sigmatel_spec *spec = codec->spec;
1759 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1760}
1761
1762static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1763 struct hda_codec *codec,
c8b6bf9b 1764 struct snd_pcm_substream *substream)
dabbed6f
M		 1765{
1766 struct sigmatel_spec *spec = codec->spec;
1767 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1768}
1769
6b97eb45
TI		 1770static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1771 struct hda_codec *codec,
1772 unsigned int stream_tag,
1773 unsigned int format,
1774 struct snd_pcm_substream *substream)
1775{
1776 struct sigmatel_spec *spec = codec->spec;
1777 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1778 stream_tag, format, substream);
1779}
1780
dabbed6f 1781
2f2f4251
M		 1782/*
1783 * Analog capture callbacks
1784 */
1785static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1786 struct hda_codec *codec,
1787 unsigned int stream_tag,
1788 unsigned int format,
c8b6bf9b 1789 struct snd_pcm_substream *substream)
2f2f4251
M		 1790{
1791 struct sigmatel_spec *spec = codec->spec;
1792
1793 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1794 stream_tag, 0, format);
1795 return 0;
1796}
1797
1798static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1799 struct hda_codec *codec,
c8b6bf9b 1800 struct snd_pcm_substream *substream)
2f2f4251
M		 1801{
1802 struct sigmatel_spec *spec = codec->spec;
1803
1804 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1805 return 0;
1806}
1807
dabbed6f
M		 1808static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1809 .substreams = 1,
1810 .channels_min = 2,
1811 .channels_max = 2,
1812 /* NID is set in stac92xx_build_pcms */
1813 .ops = {
1814 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1815 .close = stac92xx_dig_playback_pcm_close,
1816 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1817 },
1818};
1819
1820static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1821 .substreams = 1,
1822 .channels_min = 2,
1823 .channels_max = 2,
1824 /* NID is set in stac92xx_build_pcms */
1825};
1826
2f2f4251
M		 1827static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1828 .substreams = 1,
1829 .channels_min = 2,
c7d4b2fa 1830 .channels_max = 8,
2f2f4251
M		 1831 .nid = 0x02, /* NID to query formats and rates */
1832 .ops = {
1833 .open = stac92xx_playback_pcm_open,
1834 .prepare = stac92xx_playback_pcm_prepare,
1835 .cleanup = stac92xx_playback_pcm_cleanup
1836 },
1837};
1838
3cc08dc6
MP		 1839static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1840 .substreams = 1,
1841 .channels_min = 2,
1842 .channels_max = 2,
1843 .nid = 0x06, /* NID to query formats and rates */
1844 .ops = {
1845 .open = stac92xx_playback_pcm_open,
1846 .prepare = stac92xx_playback_pcm_prepare,
1847 .cleanup = stac92xx_playback_pcm_cleanup
1848 },
1849};
1850
2f2f4251 1851static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1852 .channels_min = 2,
1853 .channels_max = 2,
9e05b7a3 1854 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1855 .ops = {
1856 .prepare = stac92xx_capture_pcm_prepare,
1857 .cleanup = stac92xx_capture_pcm_cleanup
1858 },
1859};
1860
1861static int stac92xx_build_pcms(struct hda_codec *codec)
1862{
1863 struct sigmatel_spec *spec = codec->spec;
1864 struct hda_pcm *info = spec->pcm_rec;
1865
1866 codec->num_pcms = 1;
1867 codec->pcm_info = info;
1868
c7d4b2fa 1869 info->name = "STAC92xx Analog";
2f2f4251 1870 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1871 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 1872 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 1873 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 1874
1875 if (spec->alt_switch) {
1876 codec->num_pcms++;
1877 info++;
1878 info->name = "STAC92xx Analog Alt";
1879 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1880 }
2f2f4251 1881
dabbed6f
M		 1882 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1883 codec->num_pcms++;
1884 info++;
1885 info->name = "STAC92xx Digital";
1886 if (spec->multiout.dig_out_nid) {
1887 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1888 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1889 }
1890 if (spec->dig_in_nid) {
1891 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1892 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1893 }
1894 }
1895
2f2f4251
M		 1896 return 0;
1897}
1898
c960a03b
TI		 1899static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1900{
1901 unsigned int pincap = snd_hda_param_read(codec, nid,
1902 AC_PAR_PIN_CAP);
1903 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1904 if (pincap & AC_PINCAP_VREF_100)
1905 return AC_PINCTL_VREF_100;
1906 if (pincap & AC_PINCAP_VREF_80)
1907 return AC_PINCTL_VREF_80;
1908 if (pincap & AC_PINCAP_VREF_50)
1909 return AC_PINCTL_VREF_50;
1910 if (pincap & AC_PINCAP_VREF_GRD)
1911 return AC_PINCTL_VREF_GRD;
1912 return 0;
1913}
1914
403d1944
MP		 1915static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1916
1917{
82beb8fd
TI		 1918 snd_hda_codec_write_cache(codec, nid, 0,
1919 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1920}
1921
a5ce8890 1922#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1923
1924static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1925{
1926 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1927 struct sigmatel_spec *spec = codec->spec;
1928 int io_idx = kcontrol-> private_value & 0xff;
1929
1930 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1931 return 0;
1932}
1933
1934static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1935{
1936 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1937 struct sigmatel_spec *spec = codec->spec;
1938 hda_nid_t nid = kcontrol->private_value >> 8;
1939 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 1940 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 1941
1942 spec->io_switch[io_idx] = val;
1943
1944 if (val)
1945 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1946 else {
1947 unsigned int pinctl = AC_PINCTL_IN_EN;
1948 if (io_idx) /* set VREF for mic */
1949 pinctl |= stac92xx_get_vref(codec, nid);
1950 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1951 }
40c1d308
JZ		 1952
1953 /* check the auto-mute again: we need to mute/unmute the speaker
1954 * appropriately according to the pin direction
1955 */
1956 if (spec->hp_detect)
1957 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
1958
403d1944
MP		 1959 return 1;
1960}
1961
0fb87bb4
ML		 1962#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
1963
1964static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
1965 struct snd_ctl_elem_value *ucontrol)
1966{
1967 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1968 struct sigmatel_spec *spec = codec->spec;
1969
1970 ucontrol->value.integer.value[0] = spec->clfe_swap;
1971 return 0;
1972}
1973
1974static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
1975 struct snd_ctl_elem_value *ucontrol)
1976{
1977 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1978 struct sigmatel_spec *spec = codec->spec;
1979 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 1980 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 1981
68ea7b2f 1982 if (spec->clfe_swap == val)
0fb87bb4
ML		 1983 return 0;
1984
68ea7b2f 1985 spec->clfe_swap = val;
0fb87bb4
ML		 1986
1987 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
1988 spec->clfe_swap ? 0x4 : 0x0);
1989
1990 return 1;
1991}
1992
403d1944
MP		 1993#define STAC_CODEC_IO_SWITCH(xname, xpval) \
1994 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1995 .name = xname, \
1996 .index = 0, \
1997 .info = stac92xx_io_switch_info, \
1998 .get = stac92xx_io_switch_get, \
1999 .put = stac92xx_io_switch_put, \
2000 .private_value = xpval, \
2001 }
2002
0fb87bb4
ML		 2003#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2004 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2005 .name = xname, \
2006 .index = 0, \
2007 .info = stac92xx_clfe_switch_info, \
2008 .get = stac92xx_clfe_switch_get, \
2009 .put = stac92xx_clfe_switch_put, \
2010 .private_value = xpval, \
2011 }
403d1944 2012
c7d4b2fa
M		 2013enum {
2014 STAC_CTL_WIDGET_VOL,
2015 STAC_CTL_WIDGET_MUTE,
09a99959 2016 STAC_CTL_WIDGET_MONO_MUX,
403d1944 2017 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2018 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2019};
2020
c8b6bf9b 2021static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2022 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2023 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2024 STAC_MONO_MUX,
403d1944 2025 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2026 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2027};
2028
2029/* add dynamic controls */
2030static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2031{
c8b6bf9b 2032 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2033
2034 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2035 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2036
2037 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2038 if (! knew)
2039 return -ENOMEM;
2040 if (spec->kctl_alloc) {
2041 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2042 kfree(spec->kctl_alloc);
2043 }
2044 spec->kctl_alloc = knew;
2045 spec->num_kctl_alloc = num;
2046 }
2047
2048 knew = &spec->kctl_alloc[spec->num_kctl_used];
2049 *knew = stac92xx_control_templates[type];
82fe0c58 2050 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2051 if (! knew->name)
2052 return -ENOMEM;
2053 knew->private_value = val;
2054 spec->num_kctl_used++;
2055 return 0;
2056}
2057
403d1944
MP		 2058/* flag inputs as additional dynamic lineouts */
2059static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2060{
2061 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2062 unsigned int wcaps, wtype;
2063 int i, num_dacs = 0;
2064
2065 /* use the wcaps cache to count all DACs available for line-outs */
2066 for (i = 0; i < codec->num_nodes; i++) {
2067 wcaps = codec->wcaps[i];
2068 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2069
7b043899
SL		 2070 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2071 num_dacs++;
2072 }
403d1944 2073
7b043899
SL		 2074 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2075
403d1944
MP		 2076 switch (cfg->line_outs) {
2077 case 3:
2078 /* add line-in as side */
7b043899 2079 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2080 cfg->line_out_pins[cfg->line_outs] =
2081 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2082 spec->line_switch = 1;
2083 cfg->line_outs++;
2084 }
2085 break;
2086 case 2:
2087 /* add line-in as clfe and mic as side */
7b043899 2088 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2089 cfg->line_out_pins[cfg->line_outs] =
2090 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2091 spec->line_switch = 1;
2092 cfg->line_outs++;
2093 }
7b043899 2094 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2095 cfg->line_out_pins[cfg->line_outs] =
2096 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2097 spec->mic_switch = 1;
2098 cfg->line_outs++;
2099 }
2100 break;
2101 case 1:
2102 /* add line-in as surr and mic as clfe */
7b043899 2103 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2104 cfg->line_out_pins[cfg->line_outs] =
2105 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2106 spec->line_switch = 1;
2107 cfg->line_outs++;
2108 }
7b043899 2109 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2110 cfg->line_out_pins[cfg->line_outs] =
2111 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2112 spec->mic_switch = 1;
2113 cfg->line_outs++;
2114 }
2115 break;
2116 }
2117
2118 return 0;
2119}
2120
7b043899
SL		 2121
2122static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2123{
2124 int i;
2125
2126 for (i = 0; i < spec->multiout.num_dacs; i++) {
2127 if (spec->multiout.dac_nids[i] == nid)
2128 return 1;
2129 }
2130
2131 return 0;
2132}
2133
3cc08dc6 2134/*
7b043899
SL		 2135 * Fill in the dac_nids table from the parsed pin configuration
2136 * This function only works when every pin in line_out_pins[]
2137 * contains atleast one DAC in its connection list. Some 92xx
2138 * codecs are not connected directly to a DAC, such as the 9200
2139 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2140 */
19039bd0 2141static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2142 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2143{
2144 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2145 int i, j, conn_len = 0;
2146 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2147 unsigned int wcaps, wtype;
2148
c7d4b2fa
M		 2149 for (i = 0; i < cfg->line_outs; i++) {
2150 nid = cfg->line_out_pins[i];
7b043899
SL		 2151 conn_len = snd_hda_get_connections(codec, nid, conn,
2152 HDA_MAX_CONNECTIONS);
2153 for (j = 0; j < conn_len; j++) {
2154 wcaps = snd_hda_param_read(codec, conn[j],
2155 AC_PAR_AUDIO_WIDGET_CAP);
2156 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2157 if (wtype != AC_WID_AUD_OUT ||
2158 (wcaps & AC_WCAP_DIGITAL))
2159 continue;
2160 /* conn[j] is a DAC routed to this line-out */
2161 if (!is_in_dac_nids(spec, conn[j]))
2162 break;
2163 }
2164
2165 if (j == conn_len) {
df802952
TI		 2166 if (spec->multiout.num_dacs > 0) {
2167 /* we have already working output pins,
2168 * so let's drop the broken ones again
2169 */
2170 cfg->line_outs = spec->multiout.num_dacs;
2171 break;
2172 }
7b043899
SL		 2173 /* error out, no available DAC found */
2174 snd_printk(KERN_ERR
2175 "%s: No available DAC for pin 0x%x\n",
2176 __func__, nid);
2177 return -ENODEV;
2178 }
2179
2180 spec->multiout.dac_nids[i] = conn[j];
2181 spec->multiout.num_dacs++;
2182 if (conn_len > 1) {
2183 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2184 snd_hda_codec_write_cache(codec, nid, 0,
2185 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2186
7b043899
SL		 2187 }
2188 }
c7d4b2fa 2189
7b043899
SL		 2190 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2191 spec->multiout.num_dacs,
2192 spec->multiout.dac_nids[0],
2193 spec->multiout.dac_nids[1],
2194 spec->multiout.dac_nids[2],
2195 spec->multiout.dac_nids[3],
2196 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2197 return 0;
2198}
2199
eb06ed8f
TI		 2200/* create volume control/switch for the given prefx type */
2201static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2202{
2203 char name[32];
2204 int err;
2205
2206 sprintf(name, "%s Playback Volume", pfx);
2207 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2208 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2209 if (err < 0)
2210 return err;
2211 sprintf(name, "%s Playback Switch", pfx);
2212 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2213 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2214 if (err < 0)
2215 return err;
2216 return 0;
2217}
2218
c7d4b2fa 2219/* add playback controls from the parsed DAC table */
0fb87bb4 2220static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2221 const struct auto_pin_cfg *cfg)
c7d4b2fa 2222{
19039bd0
TI		 2223 static const char *chname[4] = {
2224 "Front", "Surround", NULL /*CLFE*/, "Side"
2225 };
c7d4b2fa
M		 2226 hda_nid_t nid;
2227 int i, err;
2228
0fb87bb4 2229 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2230 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2231
2232
c7d4b2fa 2233 for (i = 0; i < cfg->line_outs; i++) {
403d1944 2234 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2235 continue;
2236
2237 nid = spec->multiout.dac_nids[i];
2238
2239 if (i == 2) {
2240 /* Center/LFE */
eb06ed8f
TI		 2241 err = create_controls(spec, "Center", nid, 1);
2242 if (err < 0)
c7d4b2fa 2243 return err;
eb06ed8f
TI		 2244 err = create_controls(spec, "LFE", nid, 2);
2245 if (err < 0)
c7d4b2fa 2246 return err;
0fb87bb4
ML		 2247
2248 wid_caps = get_wcaps(codec, nid);
2249
2250 if (wid_caps & AC_WCAP_LR_SWAP) {
2251 err = stac92xx_add_control(spec,
2252 STAC_CTL_WIDGET_CLFE_SWITCH,
2253 "Swap Center/LFE Playback Switch", nid);
2254
2255 if (err < 0)
2256 return err;
2257 }
2258
c7d4b2fa 2259 } else {
eb06ed8f
TI		 2260 err = create_controls(spec, chname[i], nid, 3);
2261 if (err < 0)
c7d4b2fa
M		 2262 return err;
2263 }
2264 }
2265
b5895dc8
MR		 2266 if (spec->line_switch) {
2267 nid = cfg->input_pins[AUTO_PIN_LINE];
2268 pincap = snd_hda_param_read(codec, nid,
2269 AC_PAR_PIN_CAP);
2270 if (pincap & AC_PINCAP_OUT) {
2271 err = stac92xx_add_control(spec,
2272 STAC_CTL_WIDGET_IO_SWITCH,
2273 "Line In as Output Switch", nid << 8);
2274 if (err < 0)
2275 return err;
2276 }
2277 }
403d1944 2278
b5895dc8
MR		 2279 if (spec->mic_switch) {
2280 nid = cfg->input_pins[AUTO_PIN_MIC];
2281 pincap = snd_hda_param_read(codec, nid,
2282 AC_PAR_PIN_CAP);
2283 if (pincap & AC_PINCAP_OUT) {
2284 err = stac92xx_add_control(spec,
2285 STAC_CTL_WIDGET_IO_SWITCH,
2286 "Mic as Output Switch", (nid << 8) | 1);
2287 if (err < 0)
2288 return err;
2289 }
2290 }
403d1944 2291
c7d4b2fa
M		 2292 return 0;
2293}
2294
eb06ed8f 2295static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 2296{
7b043899
SL		 2297 if (is_in_dac_nids(spec, nid))
2298 return 1;
eb06ed8f
TI		 2299 if (spec->multiout.hp_nid == nid)
2300 return 1;
2301 return 0;
2302}
c7d4b2fa 2303
eb06ed8f
TI		 2304static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2305{
2306 if (!spec->multiout.hp_nid)
2307 spec->multiout.hp_nid = nid;
2308 else if (spec->multiout.num_dacs > 4) {
2309 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2310 return 1;
2311 } else {
2312 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2313 spec->multiout.num_dacs++;
2314 }
2315 return 0;
2316}
4e55096e 2317
eb06ed8f
TI		 2318/* add playback controls for Speaker and HP outputs */
2319static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2320 struct auto_pin_cfg *cfg)
2321{
2322 struct sigmatel_spec *spec = codec->spec;
2323 hda_nid_t nid;
2324 int i, old_num_dacs, err;
2325
2326 old_num_dacs = spec->multiout.num_dacs;
2327 for (i = 0; i < cfg->hp_outs; i++) {
2328 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2329 if (wid_caps & AC_WCAP_UNSOL_CAP)
2330 spec->hp_detect = 1;
2331 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2332 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2333 if (check_in_dac_nids(spec, nid))
2334 nid = 0;
2335 if (! nid)
c7d4b2fa 2336 continue;
eb06ed8f
TI		 2337 add_spec_dacs(spec, nid);
2338 }
2339 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2340 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2341 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2342 if (check_in_dac_nids(spec, nid))
2343 nid = 0;
eb06ed8f
TI		 2344 if (! nid)
2345 continue;
2346 add_spec_dacs(spec, nid);
c7d4b2fa 2347 }
1b290a51
MR		 2348 for (i = 0; i < cfg->line_outs; i++) {
2349 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2350 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2351 if (check_in_dac_nids(spec, nid))
2352 nid = 0;
2353 if (! nid)
2354 continue;
2355 add_spec_dacs(spec, nid);
2356 }
eb06ed8f
TI		 2357 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2358 static const char *pfxs[] = {
2359 "Speaker", "External Speaker", "Speaker2",
2360 };
2361 err = create_controls(spec, pfxs[i - old_num_dacs],
2362 spec->multiout.dac_nids[i], 3);
2363 if (err < 0)
2364 return err;
2365 }
2366 if (spec->multiout.hp_nid) {
2367 const char *pfx;
6020c008 2368 if (old_num_dacs == spec->multiout.num_dacs)
eb06ed8f
TI		 2369 pfx = "Master";
2370 else
2371 pfx = "Headphone";
2372 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
2373 if (err < 0)
2374 return err;
2375 }
c7d4b2fa
M		 2376
2377 return 0;
2378}
2379
b22b4821
MR		 2380/* labels for mono mux outputs */
2381static const char *stac92xx_mono_labels[3] = {
2382 "DAC0", "DAC1", "Mixer"
2383};
2384
2385/* create mono mux for mono out on capable codecs */
2386static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2387{
2388 struct sigmatel_spec *spec = codec->spec;
2389 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2390 int i, num_cons;
2391 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2392
2393 num_cons = snd_hda_get_connections(codec,
2394 spec->mono_nid,
2395 con_lst,
2396 HDA_MAX_NUM_INPUTS);
2397 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2398 return -EINVAL;
2399
2400 for (i = 0; i < num_cons; i++) {
2401 mono_mux->items[mono_mux->num_items].label =
2402 stac92xx_mono_labels[i];
2403 mono_mux->items[mono_mux->num_items].index = i;
2404 mono_mux->num_items++;
2405 }
09a99959
MR		 2406
2407 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2408 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2409}
2410
8b65727b 2411/* labels for dmic mux inputs */
ddc2cec4 2412static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2413 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2414 "Digital Mic 3", "Digital Mic 4"
2415};
2416
2417/* create playback/capture controls for input pins on dmic capable codecs */
2418static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2419 const struct auto_pin_cfg *cfg)
2420{
2421 struct sigmatel_spec *spec = codec->spec;
2422 struct hda_input_mux *dimux = &spec->private_dimux;
2423 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2424 int err, i, j;
2425 char name[32];
8b65727b
MP		 2426
2427 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2428 dimux->items[dimux->num_items].index = 0;
2429 dimux->num_items++;
2430
2431 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2432 hda_nid_t nid;
8b65727b
MP		 2433 int index;
2434 int num_cons;
0678accd 2435 unsigned int wcaps;
8b65727b
MP		 2436 unsigned int def_conf;
2437
2438 def_conf = snd_hda_codec_read(codec,
2439 spec->dmic_nids[i],
2440 0,
2441 AC_VERB_GET_CONFIG_DEFAULT,
2442 0);
2443 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2444 continue;
2445
0678accd 2446 nid = spec->dmic_nids[i];
8b65727b 2447 num_cons = snd_hda_get_connections(codec,
e1f0d669 2448 spec->dmux_nids[0],
8b65727b
MP		 2449 con_lst,
2450 HDA_MAX_NUM_INPUTS);
2451 for (j = 0; j < num_cons; j++)
0678accd 2452 if (con_lst[j] == nid) {
8b65727b
MP		 2453 index = j;
2454 goto found;
2455 }
2456 continue;
2457found:
0678accd
MR		 2458 wcaps = get_wcaps(codec, nid);
2459
2460 if (wcaps & AC_WCAP_OUT_AMP) {
2461 sprintf(name, "%s Capture Volume",
2462 stac92xx_dmic_labels[dimux->num_items]);
2463
2464 err = stac92xx_add_control(spec,
2465 STAC_CTL_WIDGET_VOL,
2466 name,
2467 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2468 if (err < 0)
2469 return err;
2470 }
2471
8b65727b
MP		 2472 dimux->items[dimux->num_items].label =
2473 stac92xx_dmic_labels[dimux->num_items];
2474 dimux->items[dimux->num_items].index = index;
2475 dimux->num_items++;
2476 }
2477
2478 return 0;
2479}
2480
c7d4b2fa
M		 2481/* create playback/capture controls for input pins */
2482static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2483{
2484 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2485 struct hda_input_mux *imux = &spec->private_imux;
2486 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2487 int i, j, k;
2488
2489 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2490 int index;
2491
2492 if (!cfg->input_pins[i])
2493 continue;
2494 index = -1;
2495 for (j = 0; j < spec->num_muxes; j++) {
2496 int num_cons;
2497 num_cons = snd_hda_get_connections(codec,
2498 spec->mux_nids[j],
2499 con_lst,
2500 HDA_MAX_NUM_INPUTS);
2501 for (k = 0; k < num_cons; k++)
2502 if (con_lst[k] == cfg->input_pins[i]) {
2503 index = k;
2504 goto found;
2505 }
c7d4b2fa 2506 }
314634bc
TI		 2507 continue;
2508 found:
2509 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2510 imux->items[imux->num_items].index = index;
2511 imux->num_items++;
c7d4b2fa
M		 2512 }
2513
7b043899 2514 if (imux->num_items) {
62fe78e9
SR		 2515 /*
2516 * Set the current input for the muxes.
2517 * The STAC9221 has two input muxes with identical source
2518 * NID lists. Hopefully this won't get confused.
2519 */
2520 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2521 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2522 AC_VERB_SET_CONNECT_SEL,
2523 imux->items[0].index);
62fe78e9
SR		 2524 }
2525 }
2526
c7d4b2fa
M		 2527 return 0;
2528}
2529
c7d4b2fa
M		 2530static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2531{
2532 struct sigmatel_spec *spec = codec->spec;
2533 int i;
2534
2535 for (i = 0; i < spec->autocfg.line_outs; i++) {
2536 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2537 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2538 }
2539}
2540
2541static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2542{
2543 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2544 int i;
c7d4b2fa 2545
eb06ed8f
TI		 2546 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2547 hda_nid_t pin;
2548 pin = spec->autocfg.hp_pins[i];
2549 if (pin) /* connect to front */
2550 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2551 }
2552 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2553 hda_nid_t pin;
2554 pin = spec->autocfg.speaker_pins[i];
2555 if (pin) /* connect to front */
2556 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2557 }
c7d4b2fa
M		 2558}
2559
3cc08dc6 2560static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2561{
2562 struct sigmatel_spec *spec = codec->spec;
2563 int err;
bcecd9bd 2564 int hp_speaker_swap = 0;
c7d4b2fa 2565
8b65727b
MP		 2566 if ((err = snd_hda_parse_pin_def_config(codec,
2567 &spec->autocfg,
2568 spec->dmic_nids)) < 0)
c7d4b2fa 2569 return err;
82bc955f 2570 if (! spec->autocfg.line_outs)
869264c4 2571 return 0; /* can't find valid pin config */
19039bd0 2572
bcecd9bd
JZ		 2573 /* If we have no real line-out pin and multiple hp-outs, HPs should
2574 * be set up as multi-channel outputs.
2575 */
2576 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2577 spec->autocfg.hp_outs > 1) {
2578 /* Copy hp_outs to line_outs, backup line_outs in
2579 * speaker_outs so that the following routines can handle
2580 * HP pins as primary outputs.
2581 */
2582 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2583 sizeof(spec->autocfg.line_out_pins));
2584 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2585 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2586 sizeof(spec->autocfg.hp_pins));
2587 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2588 hp_speaker_swap = 1;
2589 }
09a99959
MR		 2590 if (spec->autocfg.mono_out_pin) {
2591 int dir = (get_wcaps(codec, spec->autocfg.mono_out_pin)
2592 & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
2593 u32 caps = query_amp_caps(codec,
2594 spec->autocfg.mono_out_pin, dir);
2595 hda_nid_t conn_list[1];
2596
2597 /* get the mixer node and then the mono mux if it exists */
2598 if (snd_hda_get_connections(codec,
2599 spec->autocfg.mono_out_pin, conn_list, 1) &&
2600 snd_hda_get_connections(codec, conn_list[0],
2601 conn_list, 1)) {
2602
2603 int wcaps = get_wcaps(codec, conn_list[0]);
2604 int wid_type = (wcaps & AC_WCAP_TYPE)
2605 >> AC_WCAP_TYPE_SHIFT;
2606 /* LR swap check, some stac925x have a mux that
2607 * changes the DACs output path instead of the
2608 * mono-mux path.
2609 */
2610 if (wid_type == AC_WID_AUD_SEL &&
2611 !(wcaps & AC_WCAP_LR_SWAP))
2612 spec->mono_nid = conn_list[0];
2613 }
2614 /* all mono outs have a least a mute/unmute switch */
2615 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2616 "Mono Playback Switch",
2617 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2618 1, 0, dir));
2619 if (err < 0)
2620 return err;
2621 /* check to see if there is volume support for the amp */
2622 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2623 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2624 "Mono Playback Volume",
2625 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2626 1, 0, dir));
2627 if (err < 0)
2628 return err;
2629 }
2630
2631 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
2632 AC_PINCTL_OUT_EN);
2633 }
bcecd9bd 2634
403d1944
MP		 2635 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2636 return err;
19039bd0
TI		 2637 if (spec->multiout.num_dacs == 0)
2638 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2639 return err;
c7d4b2fa 2640
0fb87bb4
ML		 2641 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2642
2643 if (err < 0)
2644 return err;
2645
bcecd9bd
JZ		 2646 if (hp_speaker_swap == 1) {
2647 /* Restore the hp_outs and line_outs */
2648 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2649 sizeof(spec->autocfg.line_out_pins));
2650 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2651 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2652 sizeof(spec->autocfg.speaker_pins));
2653 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2654 memset(spec->autocfg.speaker_pins, 0,
2655 sizeof(spec->autocfg.speaker_pins));
2656 spec->autocfg.speaker_outs = 0;
2657 }
2658
0fb87bb4
ML		 2659 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2660
2661 if (err < 0)
2662 return err;
2663
2664 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2665
2666 if (err < 0)
c7d4b2fa
M		 2667 return err;
2668
b22b4821
MR		 2669 if (spec->mono_nid > 0) {
2670 err = stac92xx_auto_create_mono_output_ctls(codec);
2671 if (err < 0)
2672 return err;
2673 }
2674
8b65727b
MP		 2675 if (spec->num_dmics > 0)
2676 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2677 &spec->autocfg)) < 0)
2678 return err;
2679
c7d4b2fa 2680 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2681 if (spec->multiout.max_channels > 2)
c7d4b2fa 2682 spec->surr_switch = 1;
c7d4b2fa 2683
82bc955f 2684 if (spec->autocfg.dig_out_pin)
3cc08dc6 2685 spec->multiout.dig_out_nid = dig_out;
82bc955f 2686 if (spec->autocfg.dig_in_pin)
3cc08dc6 2687 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2688
2689 if (spec->kctl_alloc)
2690 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2691
2692 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 2693 if (!spec->dinput_mux)
2694 spec->dinput_mux = &spec->private_dimux;
b22b4821 2695 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 2696
2697 return 1;
2698}
2699
82bc955f
TI		 2700/* add playback controls for HP output */
2701static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2702 struct auto_pin_cfg *cfg)
2703{
2704 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2705 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2706 unsigned int wid_caps;
2707
2708 if (! pin)
2709 return 0;
2710
2711 wid_caps = get_wcaps(codec, pin);
505cb341 2712 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2713 spec->hp_detect = 1;
82bc955f
TI		 2714
2715 return 0;
2716}
2717
160ea0dc
RF		 2718/* add playback controls for LFE output */
2719static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2720 struct auto_pin_cfg *cfg)
2721{
2722 struct sigmatel_spec *spec = codec->spec;
2723 int err;
2724 hda_nid_t lfe_pin = 0x0;
2725 int i;
2726
2727 /*
2728 * search speaker outs and line outs for a mono speaker pin
2729 * with an amp. If one is found, add LFE controls
2730 * for it.
2731 */
2732 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2733 hda_nid_t pin = spec->autocfg.speaker_pins[i];
2734 unsigned long wcaps = get_wcaps(codec, pin);
2735 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2736 if (wcaps == AC_WCAP_OUT_AMP)
2737 /* found a mono speaker with an amp, must be lfe */
2738 lfe_pin = pin;
2739 }
2740
2741 /* if speaker_outs is 0, then speakers may be in line_outs */
2742 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2743 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2744 hda_nid_t pin = spec->autocfg.line_out_pins[i];
2745 unsigned long cfg;
2746 cfg = snd_hda_codec_read(codec, pin, 0,
2747 AC_VERB_GET_CONFIG_DEFAULT,
2748 0x00);
2749 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
2750 unsigned long wcaps = get_wcaps(codec, pin);
2751 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2752 if (wcaps == AC_WCAP_OUT_AMP)
2753 /* found a mono speaker with an amp,
2754 must be lfe */
2755 lfe_pin = pin;
2756 }
2757 }
2758 }
2759
2760 if (lfe_pin) {
eb06ed8f 2761 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2762 if (err < 0)
2763 return err;
2764 }
2765
2766 return 0;
2767}
2768
c7d4b2fa
M		 2769static int stac9200_parse_auto_config(struct hda_codec *codec)
2770{
2771 struct sigmatel_spec *spec = codec->spec;
2772 int err;
2773
df694daa 2774 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2775 return err;
2776
2777 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2778 return err;
2779
82bc955f
TI		 2780 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2781 return err;
2782
160ea0dc
RF		 2783 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2784 return err;
2785
82bc955f 2786 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2787 spec->multiout.dig_out_nid = 0x05;
82bc955f 2788 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2789 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2790
2791 if (spec->kctl_alloc)
2792 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2793
2794 spec->input_mux = &spec->private_imux;
8b65727b 2795 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2796
2797 return 1;
2798}
2799
62fe78e9
SR		 2800/*
2801 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2802 * funky external mute control using GPIO pins.
2803 */
2804
76e1ddfb
TI		 2805static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
2806 unsigned int data)
62fe78e9
SR		 2807{
2808 unsigned int gpiostate, gpiomask, gpiodir;
2809
2810 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2811 AC_VERB_GET_GPIO_DATA, 0);
76e1ddfb 2812 gpiostate = (gpiostate & ~mask) | (data & mask);
62fe78e9
SR		 2813
2814 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2815 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 2816 gpiomask |= mask;
62fe78e9
SR		 2817
2818 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2819 AC_VERB_GET_GPIO_DIRECTION, 0);
76e1ddfb 2820 gpiodir |= mask;
62fe78e9 2821
76e1ddfb 2822 /* Configure GPIOx as CMOS */
62fe78e9
SR		 2823 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2824
2825 snd_hda_codec_write(codec, codec->afg, 0,
2826 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 2827 snd_hda_codec_read(codec, codec->afg, 0,
2828 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 2829
2830 msleep(1);
2831
76e1ddfb
TI		 2832 snd_hda_codec_read(codec, codec->afg, 0,
2833 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 2834}
2835
314634bc
TI		 2836static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2837 unsigned int event)
2838{
2839 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2840 snd_hda_codec_write_cache(codec, nid, 0,
2841 AC_VERB_SET_UNSOLICITED_ENABLE,
2842 (AC_USRSP_EN | event));
314634bc
TI		 2843}
2844
a64135a2
MR		 2845static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
2846{
2847 int i;
2848 for (i = 0; i < cfg->hp_outs; i++)
2849 if (cfg->hp_pins[i] == nid)
2850 return 1; /* nid is a HP-Out */
2851
2852 return 0; /* nid is not a HP-Out */
2853};
2854
c7d4b2fa
M		 2855static int stac92xx_init(struct hda_codec *codec)
2856{
2857 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2858 struct auto_pin_cfg *cfg = &spec->autocfg;
2859 int i;
c7d4b2fa 2860
c7d4b2fa
M		 2861 snd_hda_sequence_write(codec, spec->init);
2862
82bc955f
TI		 2863 /* set up pins */
2864 if (spec->hp_detect) {
505cb341 2865 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2866 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2867 enable_pin_detect(codec, cfg->hp_pins[i],
2868 STAC_HP_EVENT);
0a07acaf
TI		 2869 /* force to enable the first line-out; the others are set up
2870 * in unsol_event
2871 */
2872 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2873 AC_PINCTL_OUT_EN);
eb995a8c 2874 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2875 /* fake event to set up pins */
2876 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2877 } else {
2878 stac92xx_auto_init_multi_out(codec);
2879 stac92xx_auto_init_hp_out(codec);
2880 }
2881 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2882 hda_nid_t nid = cfg->input_pins[i];
2883 if (nid) {
2884 unsigned int pinctl = AC_PINCTL_IN_EN;
2885 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2886 pinctl |= stac92xx_get_vref(codec, nid);
2887 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2888 }
82bc955f 2889 }
a64135a2
MR		 2890 for (i = 0; i < spec->num_dmics; i++)
2891 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
2892 AC_PINCTL_IN_EN);
2893 for (i = 0; i < spec->num_pwrs; i++) {
2894 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
2895 ? STAC_HP_EVENT : STAC_PWR_EVENT;
2896 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
2897 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2898 /* outputs are only ports capable of power management
2899 * any attempts on powering down a input port cause the
2900 * referenced VREF to act quirky.
2901 */
2902 if (pinctl & AC_PINCTL_IN_EN)
2903 continue;
2904 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
2905 codec->patch_ops.unsol_event(codec, (event | i) << 26);
2906 }
8b65727b 2907
82bc955f
TI		 2908 if (cfg->dig_out_pin)
2909 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
2910 AC_PINCTL_OUT_EN);
2911 if (cfg->dig_in_pin)
2912 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
2913 AC_PINCTL_IN_EN);
2914
76e1ddfb 2915 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_data);
62fe78e9 2916
c7d4b2fa
M		 2917 return 0;
2918}
2919
2f2f4251
M		 2920static void stac92xx_free(struct hda_codec *codec)
2921{
c7d4b2fa
M		 2922 struct sigmatel_spec *spec = codec->spec;
2923 int i;
2924
2925 if (! spec)
2926 return;
2927
2928 if (spec->kctl_alloc) {
2929 for (i = 0; i < spec->num_kctl_used; i++)
2930 kfree(spec->kctl_alloc[i].name);
2931 kfree(spec->kctl_alloc);
2932 }
2933
11b44bbd
RF		 2934 if (spec->bios_pin_configs)
2935 kfree(spec->bios_pin_configs);
2936
c7d4b2fa 2937 kfree(spec);
2f2f4251
M		 2938}
2939
4e55096e
M		 2940static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
2941 unsigned int flag)
2942{
2943 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2944 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 2945
f9acba43
TI		 2946 if (pin_ctl & AC_PINCTL_IN_EN) {
2947 /*
2948 * we need to check the current set-up direction of
2949 * shared input pins since they can be switched via
2950 * "xxx as Output" mixer switch
2951 */
2952 struct sigmatel_spec *spec = codec->spec;
2953 struct auto_pin_cfg *cfg = &spec->autocfg;
2954 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
2955 spec->line_switch) ||
2956 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
2957 spec->mic_switch))
2958 return;
2959 }
2960
7b043899
SL		 2961 /* if setting pin direction bits, clear the current
2962 direction bits first */
2963 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
2964 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
2965
82beb8fd 2966 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2967 AC_VERB_SET_PIN_WIDGET_CONTROL,
2968 pin_ctl | flag);
2969}
2970
2971static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
2972 unsigned int flag)
2973{
2974 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2975 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 2976 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2977 AC_VERB_SET_PIN_WIDGET_CONTROL,
2978 pin_ctl & ~flag);
2979}
2980
40c1d308 2981static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 2982{
2983 if (!nid)
2984 return 0;
2985 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 2986 & (1 << 31)) {
2987 unsigned int pinctl;
2988 pinctl = snd_hda_codec_read(codec, nid, 0,
2989 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2990 if (pinctl & AC_PINCTL_IN_EN)
2991 return 0; /* mic- or line-input */
2992 else
2993 return 1; /* HP-output */
2994 }
314634bc
TI		 2995 return 0;
2996}
2997
2998static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 2999{
3000 struct sigmatel_spec *spec = codec->spec;
3001 struct auto_pin_cfg *cfg = &spec->autocfg;
3002 int i, presence;
3003
eb06ed8f
TI		 3004 presence = 0;
3005 for (i = 0; i < cfg->hp_outs; i++) {
40c1d308 3006 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
314634bc
TI		 3007 if (presence)
3008 break;
eb06ed8f 3009 }
4e55096e
M		 3010
3011 if (presence) {
3012 /* disable lineouts, enable hp */
3013 for (i = 0; i < cfg->line_outs; i++)
3014 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3015 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3016 for (i = 0; i < cfg->speaker_outs; i++)
3017 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3018 AC_PINCTL_OUT_EN);
4e55096e
M		 3019 } else {
3020 /* enable lineouts, disable hp */
3021 for (i = 0; i < cfg->line_outs; i++)
3022 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3023 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3024 for (i = 0; i < cfg->speaker_outs; i++)
3025 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3026 AC_PINCTL_OUT_EN);
4e55096e
M		 3027 }
3028}
3029
a64135a2
MR		 3030static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3031{
3032 struct sigmatel_spec *spec = codec->spec;
3033 hda_nid_t nid = spec->pwr_nids[idx];
3034 int presence, val;
3035 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3036 & 0x000000ff;
3037 presence = get_hp_pin_presence(codec, nid);
3038 idx = 1 << idx;
3039
3040 if (presence)
3041 val &= ~idx;
3042 else
3043 val |= idx;
3044
3045 /* power down unused output ports */
3046 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3047};
3048
314634bc
TI		 3049static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3050{
a64135a2
MR		 3051 struct sigmatel_spec *spec = codec->spec;
3052 int idx = res >> 26 & 0x0f;
3053
3054 switch ((res >> 26) & 0x30) {
314634bc
TI		 3055 case STAC_HP_EVENT:
3056 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3057 /* fallthru */
3058 case STAC_PWR_EVENT:
3059 if (spec->num_pwrs > 0)
3060 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3061 }
3062}
3063
cb53c626 3064#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3065static int stac92xx_resume(struct hda_codec *codec)
3066{
dc81bed1
TI		 3067 struct sigmatel_spec *spec = codec->spec;
3068
11b44bbd 3069 stac92xx_set_config_regs(codec);
dc81bed1 3070 snd_hda_sequence_write(codec, spec->init);
76e1ddfb 3071 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_data);
82beb8fd
TI		 3072 snd_hda_codec_resume_amp(codec);
3073 snd_hda_codec_resume_cache(codec);
dc81bed1
TI		 3074 /* invoke unsolicited event to reset the HP state */
3075 if (spec->hp_detect)
3076 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3077 return 0;
3078}
3079#endif
3080
2f2f4251
M		 3081static struct hda_codec_ops stac92xx_patch_ops = {
3082 .build_controls = stac92xx_build_controls,
3083 .build_pcms = stac92xx_build_pcms,
3084 .init = stac92xx_init,
3085 .free = stac92xx_free,
4e55096e 3086 .unsol_event = stac92xx_unsol_event,
cb53c626 3087#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3088 .resume = stac92xx_resume,
3089#endif
2f2f4251
M		 3090};
3091
3092static int patch_stac9200(struct hda_codec *codec)
3093{
3094 struct sigmatel_spec *spec;
c7d4b2fa 3095 int err;
2f2f4251 3096
e560d8d8 3097 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3098 if (spec == NULL)
3099 return -ENOMEM;
3100
3101 codec->spec = spec;
a4eed138 3102 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3103 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3104 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3105 stac9200_models,
3106 stac9200_cfg_tbl);
11b44bbd
RF		 3107 if (spec->board_config < 0) {
3108 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3109 err = stac92xx_save_bios_config_regs(codec);
3110 if (err < 0) {
3111 stac92xx_free(codec);
3112 return err;
3113 }
3114 spec->pin_configs = spec->bios_pin_configs;
3115 } else {
403d1944
MP		 3116 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3117 stac92xx_set_config_regs(codec);
3118 }
2f2f4251
M		 3119
3120 spec->multiout.max_channels = 2;
3121 spec->multiout.num_dacs = 1;
3122 spec->multiout.dac_nids = stac9200_dac_nids;
3123 spec->adc_nids = stac9200_adc_nids;
3124 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3125 spec->num_muxes = 1;
8b65727b 3126 spec->num_dmics = 0;
9e05b7a3 3127 spec->num_adcs = 1;
a64135a2 3128 spec->num_pwrs = 0;
c7d4b2fa 3129
1194b5b7
TI		 3130 if (spec->board_config == STAC_9200_GATEWAY)
3131 spec->init = stac9200_eapd_init;
3132 else
3133 spec->init = stac9200_core_init;
2f2f4251 3134 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 3135
3136 err = stac9200_parse_auto_config(codec);
3137 if (err < 0) {
3138 stac92xx_free(codec);
3139 return err;
3140 }
2f2f4251
M		 3141
3142 codec->patch_ops = stac92xx_patch_ops;
3143
3144 return 0;
3145}
3146
8e21c34c
TD		 3147static int patch_stac925x(struct hda_codec *codec)
3148{
3149 struct sigmatel_spec *spec;
3150 int err;
3151
3152 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3153 if (spec == NULL)
3154 return -ENOMEM;
3155
3156 codec->spec = spec;
a4eed138 3157 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3158 spec->pin_nids = stac925x_pin_nids;
3159 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3160 stac925x_models,
3161 stac925x_cfg_tbl);
9e507abd 3162 again:
8e21c34c 3163 if (spec->board_config < 0) {
2c11f955
TD		 3164 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3165 "using BIOS defaults\n");
8e21c34c
TD		 3166 err = stac92xx_save_bios_config_regs(codec);
3167 if (err < 0) {
3168 stac92xx_free(codec);
3169 return err;
3170 }
3171 spec->pin_configs = spec->bios_pin_configs;
3172 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3173 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3174 stac92xx_set_config_regs(codec);
3175 }
3176
3177 spec->multiout.max_channels = 2;
3178 spec->multiout.num_dacs = 1;
3179 spec->multiout.dac_nids = stac925x_dac_nids;
3180 spec->adc_nids = stac925x_adc_nids;
3181 spec->mux_nids = stac925x_mux_nids;
3182 spec->num_muxes = 1;
9e05b7a3 3183 spec->num_adcs = 1;
a64135a2 3184 spec->num_pwrs = 0;
2c11f955
TD		 3185 switch (codec->vendor_id) {
3186 case 0x83847632: /* STAC9202 */
3187 case 0x83847633: /* STAC9202D */
3188 case 0x83847636: /* STAC9251 */
3189 case 0x83847637: /* STAC9251D */
f6e9852a 3190 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3191 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3192 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3193 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3194 break;
3195 default:
3196 spec->num_dmics = 0;
3197 break;
3198 }
8e21c34c
TD		 3199
3200 spec->init = stac925x_core_init;
3201 spec->mixer = stac925x_mixer;
3202
3203 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3204 if (!err) {
3205 if (spec->board_config < 0) {
3206 printk(KERN_WARNING "hda_codec: No auto-config is "
3207 "available, default to model=ref\n");
3208 spec->board_config = STAC_925x_REF;
3209 goto again;
3210 }
3211 err = -EINVAL;
3212 }
8e21c34c
TD		 3213 if (err < 0) {
3214 stac92xx_free(codec);
3215 return err;
3216 }
3217
3218 codec->patch_ops = stac92xx_patch_ops;
3219
3220 return 0;
3221}
3222
e1f0d669
MR		 3223static struct hda_input_mux stac92hd73xx_dmux = {
3224 .num_items = 4,
3225 .items = {
3226 { "Analog Inputs", 0x0b },
3227 { "CD", 0x08 },
3228 { "Digital Mic 1", 0x09 },
3229 { "Digital Mic 2", 0x0a },
3230 }
3231};
3232
3233static int patch_stac92hd73xx(struct hda_codec *codec)
3234{
3235 struct sigmatel_spec *spec;
3236 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3237 int err = 0;
3238
3239 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3240 if (spec == NULL)
3241 return -ENOMEM;
3242
3243 codec->spec = spec;
3244 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3245 spec->pin_nids = stac92hd73xx_pin_nids;
3246 spec->board_config = snd_hda_check_board_config(codec,
3247 STAC_92HD73XX_MODELS,
3248 stac92hd73xx_models,
3249 stac92hd73xx_cfg_tbl);
3250again:
3251 if (spec->board_config < 0) {
3252 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3253 " STAC92HD73XX, using BIOS defaults\n");
3254 err = stac92xx_save_bios_config_regs(codec);
3255 if (err < 0) {
3256 stac92xx_free(codec);
3257 return err;
3258 }
3259 spec->pin_configs = spec->bios_pin_configs;
3260 } else {
3261 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3262 stac92xx_set_config_regs(codec);
3263 }
3264
3265 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3266 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3267
3268 if (spec->multiout.num_dacs < 0) {
3269 printk(KERN_WARNING "hda_codec: Could not determine "
3270 "number of channels defaulting to DAC count\n");
3271 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3272 }
3273
3274 switch (spec->multiout.num_dacs) {
3275 case 0x3: /* 6 Channel */
3276 spec->mixer = stac92hd73xx_6ch_mixer;
3277 spec->init = stac92hd73xx_6ch_core_init;
3278 break;
3279 case 0x4: /* 8 Channel */
3280 spec->multiout.hp_nid = 0x18;
3281 spec->mixer = stac92hd73xx_8ch_mixer;
3282 spec->init = stac92hd73xx_8ch_core_init;
3283 break;
3284 case 0x5: /* 10 Channel */
3285 spec->multiout.hp_nid = 0x19;
3286 spec->mixer = stac92hd73xx_10ch_mixer;
3287 spec->init = stac92hd73xx_10ch_core_init;
3288 };
3289
3290 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3291 spec->aloopback_mask = 0x01;
3292 spec->aloopback_shift = 8;
3293
3294 spec->mux_nids = stac92hd73xx_mux_nids;
3295 spec->adc_nids = stac92hd73xx_adc_nids;
3296 spec->dmic_nids = stac92hd73xx_dmic_nids;
3297 spec->dmux_nids = stac92hd73xx_dmux_nids;
3298
3299 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3300 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
3301 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
1697055e 3302 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3303 spec->dinput_mux = &stac92hd73xx_dmux;
3304 /* GPIO0 High = Enable EAPD */
3305 spec->gpio_mask = spec->gpio_data = 0x000001;
e1f0d669 3306
a64135a2
MR		 3307 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3308 spec->pwr_nids = stac92hd73xx_pwr_nids;
3309
e1f0d669
MR		 3310 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3311
3312 if (!err) {
3313 if (spec->board_config < 0) {
3314 printk(KERN_WARNING "hda_codec: No auto-config is "
3315 "available, default to model=ref\n");
3316 spec->board_config = STAC_92HD73XX_REF;
3317 goto again;
3318 }
3319 err = -EINVAL;
3320 }
3321
3322 if (err < 0) {
3323 stac92xx_free(codec);
3324 return err;
3325 }
3326
3327 codec->patch_ops = stac92xx_patch_ops;
3328
3329 return 0;
3330}
3331
e035b841
MR		 3332static int patch_stac92hd71bxx(struct hda_codec *codec)
3333{
3334 struct sigmatel_spec *spec;
3335 int err = 0;
3336
3337 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3338 if (spec == NULL)
3339 return -ENOMEM;
3340
3341 codec->spec = spec;
3342 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
3343 spec->pin_nids = stac92hd71bxx_pin_nids;
3344 spec->board_config = snd_hda_check_board_config(codec,
3345 STAC_92HD71BXX_MODELS,
3346 stac92hd71bxx_models,
3347 stac92hd71bxx_cfg_tbl);
3348again:
3349 if (spec->board_config < 0) {
3350 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3351 " STAC92HD71BXX, using BIOS defaults\n");
3352 err = stac92xx_save_bios_config_regs(codec);
3353 if (err < 0) {
3354 stac92xx_free(codec);
3355 return err;
3356 }
3357 spec->pin_configs = spec->bios_pin_configs;
3358 } else {
3359 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3360 stac92xx_set_config_regs(codec);
3361 }
3362
541eee87
MR		 3363 switch (codec->vendor_id) {
3364 case 0x111d76b6: /* 4 Port without Analog Mixer */
3365 case 0x111d76b7:
3366 case 0x111d76b4: /* 6 Port without Analog Mixer */
3367 case 0x111d76b5:
3368 spec->mixer = stac92hd71bxx_mixer;
3369 spec->init = stac92hd71bxx_core_init;
3370 break;
3371 default:
3372 spec->mixer = stac92hd71bxx_analog_mixer;
3373 spec->init = stac92hd71bxx_analog_core_init;
3374 }
3375
3376 spec->aloopback_mask = 0x20;
3377 spec->aloopback_shift = 0;
3378
e035b841 3379 spec->gpio_mask = spec->gpio_data = 0x00000001; /* GPIO0 High = EAPD */
e035b841 3380
e035b841
MR		 3381 spec->mux_nids = stac92hd71bxx_mux_nids;
3382 spec->adc_nids = stac92hd71bxx_adc_nids;
3383 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3384 spec->dmux_nids = stac92hd71bxx_dmux_nids;
e035b841
MR		 3385
3386 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3387 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3388 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 3389 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 3390
a64135a2
MR		 3391 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
3392 spec->pwr_nids = stac92hd71bxx_pwr_nids;
3393
e035b841
MR		 3394 spec->multiout.num_dacs = 2;
3395 spec->multiout.hp_nid = 0x11;
3396 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3397
3398 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3399 if (!err) {
3400 if (spec->board_config < 0) {
3401 printk(KERN_WARNING "hda_codec: No auto-config is "
3402 "available, default to model=ref\n");
3403 spec->board_config = STAC_92HD71BXX_REF;
3404 goto again;
3405 }
3406 err = -EINVAL;
3407 }
3408
3409 if (err < 0) {
3410 stac92xx_free(codec);
3411 return err;
3412 }
3413
3414 codec->patch_ops = stac92xx_patch_ops;
3415
3416 return 0;
3417};
3418
2f2f4251
M		 3419static int patch_stac922x(struct hda_codec *codec)
3420{
3421 struct sigmatel_spec *spec;
c7d4b2fa 3422 int err;
2f2f4251 3423
e560d8d8 3424 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3425 if (spec == NULL)
3426 return -ENOMEM;
3427
3428 codec->spec = spec;
a4eed138 3429 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3430 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3431 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3432 stac922x_models,
3433 stac922x_cfg_tbl);
5d5d3bc3 3434 if (spec->board_config == STAC_INTEL_MAC_V3) {
76e1ddfb 3435 spec->gpio_mask = spec->gpio_data = 0x03;
3fc24d85
TI		 3436 /* Intel Macs have all same PCI SSID, so we need to check
3437 * codec SSID to distinguish the exact models
3438 */
6f0778d8 3439 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 3440 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 3441
3442 case 0x106b0800:
3443 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 3444 break;
5d5d3bc3
IZ		 3445 case 0x106b0600:
3446 case 0x106b0700:
3447 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 3448 break;
5d5d3bc3
IZ		 3449 case 0x106b0e00:
3450 case 0x106b0f00:
3451 case 0x106b1600:
3452 case 0x106b1700:
3453 case 0x106b0200:
3454 case 0x106b1e00:
3455 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 3456 break;
5d5d3bc3
IZ		 3457 case 0x106b1a00:
3458 case 0x00000100:
3459 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 3460 break;
5d5d3bc3
IZ		 3461 case 0x106b0a00:
3462 case 0x106b2200:
3463 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 3464 break;
3fc24d85
TI		 3465 }
3466 }
3467
9e507abd 3468 again:
11b44bbd
RF		 3469 if (spec->board_config < 0) {
3470 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3471 "using BIOS defaults\n");
3472 err = stac92xx_save_bios_config_regs(codec);
3473 if (err < 0) {
3474 stac92xx_free(codec);
3475 return err;
3476 }
3477 spec->pin_configs = spec->bios_pin_configs;
3478 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 3479 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3480 stac92xx_set_config_regs(codec);
3481 }
2f2f4251 3482
c7d4b2fa
M		 3483 spec->adc_nids = stac922x_adc_nids;
3484 spec->mux_nids = stac922x_mux_nids;
2549413e 3485 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 3486 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 3487 spec->num_dmics = 0;
a64135a2 3488 spec->num_pwrs = 0;
c7d4b2fa
M		 3489
3490 spec->init = stac922x_core_init;
2f2f4251 3491 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 3492
3493 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 3494
3cc08dc6 3495 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 3496 if (!err) {
3497 if (spec->board_config < 0) {
3498 printk(KERN_WARNING "hda_codec: No auto-config is "
3499 "available, default to model=ref\n");
3500 spec->board_config = STAC_D945_REF;
3501 goto again;
3502 }
3503 err = -EINVAL;
3504 }
3cc08dc6
MP		 3505 if (err < 0) {
3506 stac92xx_free(codec);
3507 return err;
3508 }
3509
3510 codec->patch_ops = stac92xx_patch_ops;
3511
807a4636
TI		 3512 /* Fix Mux capture level; max to 2 */
3513 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3514 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3515 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3516 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3517 (0 << AC_AMPCAP_MUTE_SHIFT));
3518
3cc08dc6
MP		 3519 return 0;
3520}
3521
3522static int patch_stac927x(struct hda_codec *codec)
3523{
3524 struct sigmatel_spec *spec;
3525 int err;
3526
3527 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3528 if (spec == NULL)
3529 return -ENOMEM;
3530
3531 codec->spec = spec;
a4eed138 3532 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 3533 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 3534 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3535 stac927x_models,
3536 stac927x_cfg_tbl);
9e507abd 3537 again:
8e9068b1
MR		 3538 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3539 if (spec->board_config < 0)
3540 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3541 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 3542 err = stac92xx_save_bios_config_regs(codec);
3543 if (err < 0) {
3544 stac92xx_free(codec);
3545 return err;
3546 }
3547 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 3548 } else {
3cc08dc6
MP		 3549 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3550 stac92xx_set_config_regs(codec);
3551 }
3552
8e9068b1
MR		 3553 spec->adc_nids = stac927x_adc_nids;
3554 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3555 spec->mux_nids = stac927x_mux_nids;
3556 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
3557 spec->multiout.dac_nids = spec->dac_nids;
3558
81d3dbde 3559 switch (spec->board_config) {
93ed1503 3560 case STAC_D965_3ST:
93ed1503 3561 case STAC_D965_5ST:
8e9068b1
MR		 3562 /* GPIO0 High = Enable EAPD */
3563 spec->gpio_mask = spec->gpio_data = 0x00000001;
3564 spec->num_dmics = 0;
3565
93ed1503 3566 spec->init = d965_core_init;
9e05b7a3 3567 spec->mixer = stac927x_mixer;
81d3dbde 3568 break;
8e9068b1 3569 case STAC_DELL_BIOS:
2f32d909
MR		 3570 /* correct the front output jack as a hp out */
3571 stac92xx_set_config_reg(codec, 0x0f, 0x02270110);
c481fca3
MR		 3572 /* correct the front input jack as a mic */
3573 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
3574 /* fallthru */
8e9068b1
MR		 3575 case STAC_DELL_3ST:
3576 /* GPIO2 High = Enable EAPD */
3577 spec->gpio_mask = spec->gpio_data = 0x00000004;
7f16859a
MR		 3578 spec->dmic_nids = stac927x_dmic_nids;
3579 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 3580
8e9068b1
MR		 3581 spec->init = d965_core_init;
3582 spec->mixer = stac927x_mixer;
3583 spec->dmux_nids = stac927x_dmux_nids;
1697055e 3584 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 3585 break;
3586 default:
f1f208d0
MR		 3587 /* GPIO0 High = Enable EAPD */
3588 spec->gpio_mask = spec->gpio_data = 0x00000001;
8e9068b1
MR		 3589 spec->num_dmics = 0;
3590
3591 spec->init = stac927x_core_init;
3592 spec->mixer = stac927x_mixer;
7f16859a
MR		 3593 }
3594
a64135a2 3595 spec->num_pwrs = 0;
e1f0d669
MR		 3596 spec->aloopback_mask = 0x40;
3597 spec->aloopback_shift = 0;
8e9068b1 3598
3cc08dc6 3599 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3600 if (!err) {
3601 if (spec->board_config < 0) {
3602 printk(KERN_WARNING "hda_codec: No auto-config is "
3603 "available, default to model=ref\n");
3604 spec->board_config = STAC_D965_REF;
3605 goto again;
3606 }
3607 err = -EINVAL;
3608 }
c7d4b2fa
M		 3609 if (err < 0) {
3610 stac92xx_free(codec);
3611 return err;
3612 }
2f2f4251
M		 3613
3614 codec->patch_ops = stac92xx_patch_ops;
3615
52987656
TI		 3616 /*
3617 * !!FIXME!!
3618 * The STAC927x seem to require fairly long delays for certain
3619 * command sequences. With too short delays (even if the answer
3620 * is set to RIRB properly), it results in the silence output
3621 * on some hardwares like Dell.
3622 *
3623 * The below flag enables the longer delay (see get_response
3624 * in hda_intel.c).
3625 */
3626 codec->bus->needs_damn_long_delay = 1;
3627
2f2f4251
M		 3628 return 0;
3629}
3630
f3302a59
MP		 3631static int patch_stac9205(struct hda_codec *codec)
3632{
3633 struct sigmatel_spec *spec;
8259980e 3634 int err;
f3302a59
MP		 3635
3636 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3637 if (spec == NULL)
3638 return -ENOMEM;
3639
3640 codec->spec = spec;
a4eed138 3641 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3642 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3643 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3644 stac9205_models,
3645 stac9205_cfg_tbl);
9e507abd 3646 again:
11b44bbd
RF		 3647 if (spec->board_config < 0) {
3648 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3649 err = stac92xx_save_bios_config_regs(codec);
3650 if (err < 0) {
3651 stac92xx_free(codec);
3652 return err;
3653 }
3654 spec->pin_configs = spec->bios_pin_configs;
3655 } else {
f3302a59
MP		 3656 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3657 stac92xx_set_config_regs(codec);
3658 }
3659
3660 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3661 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3662 spec->mux_nids = stac9205_mux_nids;
2549413e 3663 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3664 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3665 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 3666 spec->dmux_nids = stac9205_dmux_nids;
1697055e 3667 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 3668 spec->num_pwrs = 0;
f3302a59
MP		 3669
3670 spec->init = stac9205_core_init;
3671 spec->mixer = stac9205_mixer;
3672
e1f0d669
MR		 3673 spec->aloopback_mask = 0x40;
3674 spec->aloopback_shift = 0;
f3302a59 3675 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3676
ae0a8ed8 3677 switch (spec->board_config){
ae0a8ed8 3678 case STAC_9205_DELL_M43:
87d48363
MR		 3679 /* Enable SPDIF in/out */
3680 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3681 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3682
e2e7d624
MR		 3683 spec->gpio_mask = 0x0000000b;
3684 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
3685 * GPIO3 High = DRM
87d48363 3686 */
e2e7d624 3687 spec->gpio_data = 0x00000009;
ae0a8ed8
TD		 3688 break;
3689 default:
3690 /* GPIO0 High = EAPD */
3691 spec->gpio_mask = spec->gpio_data = 0x00000001;
3692 break;
3693 }
33382403 3694
f3302a59 3695 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 3696 if (!err) {
3697 if (spec->board_config < 0) {
3698 printk(KERN_WARNING "hda_codec: No auto-config is "
3699 "available, default to model=ref\n");
3700 spec->board_config = STAC_9205_REF;
3701 goto again;
3702 }
3703 err = -EINVAL;
3704 }
f3302a59
MP		 3705 if (err < 0) {
3706 stac92xx_free(codec);
3707 return err;
3708 }
3709
3710 codec->patch_ops = stac92xx_patch_ops;
3711
3712 return 0;
3713}
3714
db064e50 3715/*
6d859065 3716 * STAC9872 hack
db064e50
TI		 3717 */
3718
99ccc560 3719/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 3720static hda_nid_t vaio_dacs[] = { 0x2 };
3721#define VAIO_HP_DAC 0x5
3722static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
3723static hda_nid_t vaio_mux_nids[] = { 0x15 };
3724
3725static struct hda_input_mux vaio_mux = {
a3a2f429 3726 .num_items = 3,
db064e50 3727 .items = {
d773781c 3728 /* { "HP", 0x0 }, */
1624cb9a
TI		 3729 { "Mic Jack", 0x1 },
3730 { "Internal Mic", 0x2 },
db064e50
TI		 3731 { "PCM", 0x3 },
3732 }
3733};
3734
3735static struct hda_verb vaio_init[] = {
3736 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 3737 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 3738 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3739 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3740 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3741 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3742 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 3743 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3744 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3745 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3746 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3747 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3748 {}
3749};
3750
6d859065
GM		 3751static struct hda_verb vaio_ar_init[] = {
3752 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
3753 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3754 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3755 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3756/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
3757 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3758 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 3759 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3760 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3761/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
3762 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3763 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3764 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3765 {}
3766};
3767
db064e50 3768/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3769static struct hda_bind_ctls vaio_bind_master_vol = {
3770 .ops = &snd_hda_bind_vol,
3771 .values = {
3772 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3773 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3774 0
3775 },
3776};
db064e50
TI		 3777
3778/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3779static struct hda_bind_ctls vaio_bind_master_sw = {
3780 .ops = &snd_hda_bind_sw,
3781 .values = {
3782 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3783 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3784 0,
3785 },
3786};
db064e50
TI		 3787
3788static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 3789 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3790 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 3791 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3792 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3793 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3794 {
3795 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3796 .name = "Capture Source",
3797 .count = 1,
3798 .info = stac92xx_mux_enum_info,
3799 .get = stac92xx_mux_enum_get,
3800 .put = stac92xx_mux_enum_put,
3801 },
3802 {}
3803};
3804
6d859065 3805static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 3806 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3807 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 3808 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3809 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3810 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3811 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
3812 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
3813 {
3814 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3815 .name = "Capture Source",
3816 .count = 1,
3817 .info = stac92xx_mux_enum_info,
3818 .get = stac92xx_mux_enum_get,
3819 .put = stac92xx_mux_enum_put,
3820 },
3821 {}
3822};
3823
3824static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 3825 .build_controls = stac92xx_build_controls,
3826 .build_pcms = stac92xx_build_pcms,
3827 .init = stac92xx_init,
3828 .free = stac92xx_free,
cb53c626 3829#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 3830 .resume = stac92xx_resume,
3831#endif
3832};
3833
72e7b0dd
TI		 3834static int stac9872_vaio_init(struct hda_codec *codec)
3835{
3836 int err;
3837
3838 err = stac92xx_init(codec);
3839 if (err < 0)
3840 return err;
3841 if (codec->patch_ops.unsol_event)
3842 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3843 return 0;
3844}
3845
3846static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
3847{
40c1d308 3848 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 3849 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3850 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3851 } else {
3852 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3853 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3854 }
3855}
3856
3857static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
3858{
3859 switch (res >> 26) {
3860 case STAC_HP_EVENT:
3861 stac9872_vaio_hp_detect(codec, res);
3862 break;
3863 }
3864}
3865
3866static struct hda_codec_ops stac9872_vaio_patch_ops = {
3867 .build_controls = stac92xx_build_controls,
3868 .build_pcms = stac92xx_build_pcms,
3869 .init = stac9872_vaio_init,
3870 .free = stac92xx_free,
3871 .unsol_event = stac9872_vaio_unsol_event,
3872#ifdef CONFIG_PM
3873 .resume = stac92xx_resume,
3874#endif
3875};
3876
6d859065
GM		 3877enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
3878 CXD9872RD_VAIO,
3879 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
3880 STAC9872AK_VAIO,
3881 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
3882 STAC9872K_VAIO,
3883 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 3884 CXD9872AKD_VAIO,
3885 STAC_9872_MODELS,
3886};
3887
3888static const char *stac9872_models[STAC_9872_MODELS] = {
3889 [CXD9872RD_VAIO] = "vaio",
3890 [CXD9872AKD_VAIO] = "vaio-ar",
3891};
3892
3893static struct snd_pci_quirk stac9872_cfg_tbl[] = {
3894 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
3895 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
3896 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 3897 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 3898 {}
3899};
3900
6d859065 3901static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 3902{
3903 struct sigmatel_spec *spec;
3904 int board_config;
3905
f5fcc13c
TI		 3906 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
3907 stac9872_models,
3908 stac9872_cfg_tbl);
db064e50
TI		 3909 if (board_config < 0)
3910 /* unknown config, let generic-parser do its job... */
3911 return snd_hda_parse_generic_codec(codec);
3912
3913 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3914 if (spec == NULL)
3915 return -ENOMEM;
3916
3917 codec->spec = spec;
3918 switch (board_config) {
6d859065
GM		 3919 case CXD9872RD_VAIO:
3920 case STAC9872AK_VAIO:
3921 case STAC9872K_VAIO:
db064e50
TI		 3922 spec->mixer = vaio_mixer;
3923 spec->init = vaio_init;
3924 spec->multiout.max_channels = 2;
3925 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3926 spec->multiout.dac_nids = vaio_dacs;
3927 spec->multiout.hp_nid = VAIO_HP_DAC;
3928 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3929 spec->adc_nids = vaio_adcs;
a64135a2 3930 spec->num_pwrs = 0;
db064e50
TI		 3931 spec->input_mux = &vaio_mux;
3932 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3933 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 3934 break;
6d859065
GM		 3935
3936 case CXD9872AKD_VAIO:
3937 spec->mixer = vaio_ar_mixer;
3938 spec->init = vaio_ar_init;
3939 spec->multiout.max_channels = 2;
3940 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3941 spec->multiout.dac_nids = vaio_dacs;
3942 spec->multiout.hp_nid = VAIO_HP_DAC;
3943 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 3944 spec->num_pwrs = 0;
6d859065
GM		 3945 spec->adc_nids = vaio_adcs;
3946 spec->input_mux = &vaio_mux;
3947 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3948 codec->patch_ops = stac9872_patch_ops;
6d859065 3949 break;
db064e50
TI		 3950 }
3951
db064e50
TI		 3952 return 0;
3953}
3954
3955
2f2f4251
M		 3956/*
3957 * patch entries
3958 */
3959struct hda_codec_preset snd_hda_preset_sigmatel[] = {
3960 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
3961 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
3962 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
3963 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
3964 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
3965 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
3966 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 3967 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
3968 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
3969 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
3970 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
3971 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
3972 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 3973 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
3974 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
3975 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
3976 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
3977 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
3978 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
3979 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
3980 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
3981 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
3982 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 3983 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
3984 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
3985 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
3986 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
3987 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
3988 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 3989 /* The following does not take into account .id=0x83847661 when subsys =
3990 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
3991 * currently not fully supported.
3992 */
3993 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
3994 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
3995 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 3996 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
3997 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
3998 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
3999 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4000 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4001 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4002 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4003 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
541eee87
MR		 4004 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4005 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4006 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 4007 { .id = 0x111d7608, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
4008 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4009 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4010 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4011 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4012 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4013 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4014 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4015 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 4016 {} /* terminator */
4017};
Linux 6.x block layer and io_uring tree(s)