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Merge branch 'topic/hda-config-pm-cleanup' into for-next
[linux-2.6-block.git] / sound / pci / hda / patch_cirrus.c
CommitLineData
d0fa1179 1// SPDX-License-Identifier: GPL-2.0-or-later
e5f14248
TI		 2/*
3 * HD audio interface patch for Cirrus Logic CS420x chip
4 *
5 * Copyright (c) 2009 Takashi Iwai <tiwai@suse.de>
e5f14248
TI		 6 */
7
8#include <linux/init.h>
e5f14248 9#include <linux/slab.h>
da155d5b 10#include <linux/module.h>
e5f14248 11#include <sound/core.h>
6cc7e93f 12#include <linux/pci.h>
1077a024 13#include <sound/tlv.h>
be57bfff 14#include <sound/hda_codec.h>
e5f14248 15#include "hda_local.h"
128bc4ba 16#include "hda_auto_parser.h"
1835a0f9 17#include "hda_jack.h"
1077a024 18#include "hda_generic.h"
e5f14248
TI		 19
20/*
21 */
22
23struct cs_spec {
1077a024 24 struct hda_gen_spec gen;
e5f14248 25
ed208255
TI		 26 unsigned int gpio_mask;
27 unsigned int gpio_dir;
28 unsigned int gpio_data;
6dfeb703
TI		 29 unsigned int gpio_eapd_hp; /* EAPD GPIO bit for headphones */
30 unsigned int gpio_eapd_speaker; /* EAPD GPIO bit for speakers */
ed208255 31
56487c27
TH		 32 /* CS421x */
33 unsigned int spdif_detect:1;
1077a024 34 unsigned int spdif_present:1;
56487c27
TH		 35 unsigned int sense_b:1;
36 hda_nid_t vendor_nid;
0c52db8c
TI		 37
38 /* for MBP SPDIF control */
39 int (*spdif_sw_put)(struct snd_kcontrol *kcontrol,
40 struct snd_ctl_elem_value *ucontrol);
e5f14248
TI		 41};
42
56487c27 43/* available models with CS420x */
a6bae205 44enum {
4e7d7c60 45 CS420X_MBP53,
a6bae205 46 CS420X_MBP55,
1a5ba2e9 47 CS420X_IMAC27,
b35aabd7
TI		 48 CS420X_GPIO_13,
49 CS420X_GPIO_23,
ef596a57 50 CS420X_MBP101,
ffe4d12b 51 CS420X_MBP81,
6ab982e8 52 CS420X_MBA42,
a6bae205 53 CS420X_AUTO,
03efce75
TI		 54 /* aliases */
55 CS420X_IMAC27_122 = CS420X_GPIO_23,
56 CS420X_APPLE = CS420X_GPIO_13,
a6bae205
TI		 57};
58
56487c27
TH		 59/* CS421x boards */
60enum {
61 CS421X_CDB4210,
b35aabd7 62 CS421X_SENSE_B,
4af16107 63 CS421X_STUMPY,
56487c27
TH		 64};
65
40c20fa0
TI		 66/* Vendor-specific processing widget */
67#define CS420X_VENDOR_NID 0x11
68#define CS_DIG_OUT1_PIN_NID 0x10
69#define CS_DIG_OUT2_PIN_NID 0x15
16337e02
DB		 70#define CS_DMIC1_PIN_NID 0x0e
71#define CS_DMIC2_PIN_NID 0x12
40c20fa0
TI		 72
73/* coef indices */
74#define IDX_SPDIF_STAT 0x0000
75#define IDX_SPDIF_CTL 0x0001
76#define IDX_ADC_CFG 0x0002
77/* SZC bitmask, 4 modes below:
78 * 0 = immediate,
79 * 1 = digital immediate, analog zero-cross
80 * 2 = digtail & analog soft-ramp
81 * 3 = digital soft-ramp, analog zero-cross
82 */
83#define CS_COEF_ADC_SZC_MASK (3 << 0)
84#define CS_COEF_ADC_MIC_SZC_MODE (3 << 0) /* SZC setup for mic */
85#define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */
86/* PGA mode: 0 = differential, 1 = signle-ended */
87#define CS_COEF_ADC_MIC_PGA_MODE (1 << 5) /* PGA setup for mic */
88#define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */
89#define IDX_DAC_CFG 0x0003
90/* SZC bitmask, 4 modes below:
91 * 0 = Immediate
92 * 1 = zero-cross
93 * 2 = soft-ramp
94 * 3 = soft-ramp on zero-cross
95 */
96#define CS_COEF_DAC_HP_SZC_MODE (3 << 0) /* nid 0x02 */
97#define CS_COEF_DAC_LO_SZC_MODE (3 << 2) /* nid 0x03 */
98#define CS_COEF_DAC_SPK_SZC_MODE (3 << 4) /* nid 0x04 */
99
100#define IDX_BEEP_CFG 0x0004
101/* 0x0008 - test reg key */
102/* 0x0009 - 0x0014 -> 12 test regs */
103/* 0x0015 - visibility reg */
104
b5bf0a92
BW		 105/* Cirrus Logic CS4208 */
106#define CS4208_VENDOR_NID 0x24
107
56487c27
TH		 108/*
109 * Cirrus Logic CS4210
110 *
111 * 1 DAC => HP(sense) / Speakers,
112 * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
113 * 1 SPDIF OUT => SPDIF Trasmitter(sense)
61a9aba1 114 */
56487c27
TH		 115#define CS4210_DAC_NID 0x02
116#define CS4210_ADC_NID 0x03
5660ffd0 117#define CS4210_VENDOR_NID 0x0B
56487c27
TH		 118#define CS421X_DMIC_PIN_NID 0x09 /* Port E */
119#define CS421X_SPDIF_PIN_NID 0x0A /* Port H */
120
1077a024
TI		 121#define CS421X_IDX_DEV_CFG 0x01
122#define CS421X_IDX_ADC_CFG 0x02
123#define CS421X_IDX_DAC_CFG 0x03
124#define CS421X_IDX_SPK_CTL 0x04
e5f14248 125
1077a024
TI		 126/* Cirrus Logic CS4213 is like CS4210 but does not have SPDIF input/output */
127#define CS4213_VENDOR_NID 0x09
e5f14248 128
21a4dc43 129
1077a024 130static inline int cs_vendor_coef_get(struct hda_codec *codec, unsigned int idx)
e5f14248
TI		 131{
132 struct cs_spec *spec = codec->spec;
61a9aba1 133
1077a024
TI		 134 snd_hda_codec_write(codec, spec->vendor_nid, 0,
135 AC_VERB_SET_COEF_INDEX, idx);
136 return snd_hda_codec_read(codec, spec->vendor_nid, 0,
137 AC_VERB_GET_PROC_COEF, 0);
e5f14248
TI		 138}
139
1077a024
TI		 140static inline void cs_vendor_coef_set(struct hda_codec *codec, unsigned int idx,
141 unsigned int coef)
e5f14248
TI		 142{
143 struct cs_spec *spec = codec->spec;
61a9aba1 144
1077a024
TI		 145 snd_hda_codec_write(codec, spec->vendor_nid, 0,
146 AC_VERB_SET_COEF_INDEX, idx);
147 snd_hda_codec_write(codec, spec->vendor_nid, 0,
148 AC_VERB_SET_PROC_COEF, coef);
e5f14248
TI		 149}
150
21a4dc43
TI		 151/*
152 * auto-mute and auto-mic switching
56487c27
TH		 153 * CS421x auto-output redirecting
154 * HP/SPK/SPDIF
21a4dc43
TI		 155 */
156
1077a024 157static void cs_automute(struct hda_codec *codec)
e5f14248
TI		 158{
159 struct cs_spec *spec = codec->spec;
e5f14248 160
1077a024
TI		 161 /* mute HPs if spdif jack (SENSE_B) is present */
162 spec->gen.master_mute = !!(spec->spdif_present && spec->sense_b);
56487c27 163
1077a024 164 snd_hda_gen_update_outputs(codec);
78e2a928 165
be8cf445 166 if (spec->gpio_eapd_hp || spec->gpio_eapd_speaker) {
1f7c6658
TI		 167 if (spec->gen.automute_speaker)
168 spec->gpio_data = spec->gen.hp_jack_present ?
169 spec->gpio_eapd_hp : spec->gpio_eapd_speaker;
170 else
171 spec->gpio_data =
172 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
3a385167 173 snd_hda_codec_write(codec, 0x01, 0,
039eb753 174 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
3a385167 175 }
e5f14248
TI		 176}
177
1077a024 178static bool is_active_pin(struct hda_codec *codec, hda_nid_t nid)
e5f14248 179{
1077a024 180 unsigned int val;
61a9aba1 181
1077a024
TI		 182 val = snd_hda_codec_get_pincfg(codec, nid);
183 return (get_defcfg_connect(val) != AC_JACK_PORT_NONE);
e5f14248
TI		 184}
185
1077a024 186static void init_input_coef(struct hda_codec *codec)
e5f14248
TI		 187{
188 struct cs_spec *spec = codec->spec;
40c20fa0 189 unsigned int coef;
e5f14248 190
5660ffd0
DH		 191 /* CS420x has multiple ADC, CS421x has single ADC */
192 if (spec->vendor_nid == CS420X_VENDOR_NID) {
16337e02 193 coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG);
56487c27 194 if (is_active_pin(codec, CS_DMIC2_PIN_NID))
16337e02 195 coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */
56487c27 196 if (is_active_pin(codec, CS_DMIC1_PIN_NID))
16337e02 197 coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off
56487c27
TH		 198 * No effect if SPDIF_OUT2 is
199 * selected in IDX_SPDIF_CTL.
61a9aba1 200 */
16337e02
DB		 201
202 cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef);
56487c27 203 }
40c20fa0
TI		 204}
205
c42d4782 206static const struct hda_verb cs_coef_init_verbs[] = {
40c20fa0
TI		 207 {0x11, AC_VERB_SET_PROC_STATE, 1},
208 {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG},
209 {0x11, AC_VERB_SET_PROC_COEF,
210 (0x002a /* DAC1/2/3 SZCMode Soft Ramp */
211 | 0x0040 /* Mute DACs on FIFO error */
212 | 0x1000 /* Enable DACs High Pass Filter */
213 | 0x0400 /* Disable Coefficient Auto increment */
214 )},
829e87e0
TI		 215 /* ADC1/2 - Digital and Analog Soft Ramp */
216 {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
217 {0x11, AC_VERB_SET_PROC_COEF, 0x000a},
40c20fa0 218 /* Beep */
5a83b4b5 219 {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG},
40c20fa0
TI		 220 {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */
221
222 {} /* terminator */
223};
224
b5bf0a92
BW		 225static const struct hda_verb cs4208_coef_init_verbs[] = {
226 {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
227 {0x24, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
228 {0x24, AC_VERB_SET_COEF_INDEX, 0x0033},
229 {0x24, AC_VERB_SET_PROC_COEF, 0x0001}, /* A1 ICS */
230 {0x24, AC_VERB_SET_COEF_INDEX, 0x0034},
231 {0x24, AC_VERB_SET_PROC_COEF, 0x1C01}, /* A1 Enable, A Thresh = 300mV */
232 {} /* terminator */
233};
234
a769cbcf
BA		 235/* Errata: CS4207 rev C0/C1/C2 Silicon
236 *
237 * http://www.cirrus.com/en/pubs/errata/ER880C3.pdf
238 *
239 * 6. At high temperature (TA > +85°C), the digital supply current (IVD)
240 * may be excessive (up to an additional 200 μA), which is most easily
241 * observed while the part is being held in reset (RESET# active low).
242 *
243 * Root Cause: At initial powerup of the device, the logic that drives
244 * the clock and write enable to the S/PDIF SRC RAMs is not properly
245 * initialized.
246 * Certain random patterns will cause a steady leakage current in those
247 * RAM cells. The issue will resolve once the SRCs are used (turned on).
248 *
249 * Workaround: The following verb sequence briefly turns on the S/PDIF SRC
250 * blocks, which will alleviate the issue.
251 */
252
c42d4782 253static const struct hda_verb cs_errata_init_verbs[] = {
a769cbcf
BA		 254 {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
255 {0x11, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
256
257 {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
258 {0x11, AC_VERB_SET_PROC_COEF, 0x9999},
259 {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
260 {0x11, AC_VERB_SET_PROC_COEF, 0xa412},
261 {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
262 {0x11, AC_VERB_SET_PROC_COEF, 0x0009},
263
264 {0x07, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Rx: D0 */
265 {0x08, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Tx: D0 */
266
267 {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
268 {0x11, AC_VERB_SET_PROC_COEF, 0x2412},
269 {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
270 {0x11, AC_VERB_SET_PROC_COEF, 0x0000},
271 {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
272 {0x11, AC_VERB_SET_PROC_COEF, 0x0008},
273 {0x11, AC_VERB_SET_PROC_STATE, 0x00},
a769cbcf
BA		 274 {} /* terminator */
275};
276
40c20fa0 277/* SPDIF setup */
1077a024 278static void init_digital_coef(struct hda_codec *codec)
40c20fa0
TI		 279{
280 unsigned int coef;
281
282 coef = 0x0002; /* SRC_MUTE soft-mute on SPDIF (if no lock) */
283 coef |= 0x0008; /* Replace with mute on error */
284 if (is_active_pin(codec, CS_DIG_OUT2_PIN_NID))
285 coef |= 0x4000; /* RX to TX1 or TX2 Loopthru / SPDIF2
286 * SPDIF_OUT2 is shared with GPIO1 and
287 * DMIC_SDA2.
288 */
289 cs_vendor_coef_set(codec, IDX_SPDIF_CTL, coef);
e5f14248
TI		 290}
291
292static int cs_init(struct hda_codec *codec)
293{
294 struct cs_spec *spec = codec->spec;
295
be8cf445
TI		 296 if (spec->vendor_nid == CS420X_VENDOR_NID) {
297 /* init_verb sequence for C0/C1/C2 errata*/
298 snd_hda_sequence_write(codec, cs_errata_init_verbs);
299 snd_hda_sequence_write(codec, cs_coef_init_verbs);
b5bf0a92
BW		 300 } else if (spec->vendor_nid == CS4208_VENDOR_NID) {
301 snd_hda_sequence_write(codec, cs4208_coef_init_verbs);
be8cf445 302 }
ed208255 303
1077a024 304 snd_hda_gen_init(codec);
98415eac 305
ed208255
TI		 306 if (spec->gpio_mask) {
307 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
308 spec->gpio_mask);
309 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
310 spec->gpio_dir);
311 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
312 spec->gpio_data);
313 }
314
be8cf445
TI		 315 if (spec->vendor_nid == CS420X_VENDOR_NID) {
316 init_input_coef(codec);
317 init_digital_coef(codec);
318 }
01a61e12
TI		 319
320 return 0;
e5f14248
TI		 321}
322
0c52db8c
TI		 323static int cs_build_controls(struct hda_codec *codec)
324{
325 int err;
326
327 err = snd_hda_gen_build_controls(codec);
328 if (err < 0)
329 return err;
330 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_BUILD);
331 return 0;
332}
333
1077a024 334#define cs_free snd_hda_gen_free
e5f14248 335
c42d4782 336static const struct hda_codec_ops cs_patch_ops = {
0c52db8c 337 .build_controls = cs_build_controls,
1077a024 338 .build_pcms = snd_hda_gen_build_pcms,
e5f14248
TI		 339 .init = cs_init,
340 .free = cs_free,
5c2e4e0a 341 .unsol_event = snd_hda_jack_unsol_event,
e5f14248
TI		 342};
343
344static int cs_parse_auto_config(struct hda_codec *codec)
345{
346 struct cs_spec *spec = codec->spec;
347 int err;
de3df8a9 348 int i;
e5f14248 349
1077a024 350 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
ed208255
TI		 351 if (err < 0)
352 return err;
353
1077a024 354 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
e5f14248
TI		 355 if (err < 0)
356 return err;
1077a024 357
de3df8a9
TI		 358 /* keep the ADCs powered up when it's dynamically switchable */
359 if (spec->gen.dyn_adc_switch) {
360 unsigned int done = 0;
61a9aba1 361
de3df8a9
TI		 362 for (i = 0; i < spec->gen.input_mux.num_items; i++) {
363 int idx = spec->gen.dyn_adc_idx[i];
61a9aba1 364
de3df8a9
TI		 365 if (done & (1 << idx))
366 continue;
367 snd_hda_gen_fix_pin_power(codec,
368 spec->gen.adc_nids[idx]);
369 done |= 1 << idx;
370 }
371 }
372
e5f14248
TI		 373 return 0;
374}
375
b35aabd7
TI		 376static const struct hda_model_fixup cs420x_models[] = {
377 { .id = CS420X_MBP53, .name = "mbp53" },
378 { .id = CS420X_MBP55, .name = "mbp55" },
379 { .id = CS420X_IMAC27, .name = "imac27" },
380 { .id = CS420X_IMAC27_122, .name = "imac27_122" },
381 { .id = CS420X_APPLE, .name = "apple" },
ef596a57 382 { .id = CS420X_MBP101, .name = "mbp101" },
ffe4d12b 383 { .id = CS420X_MBP81, .name = "mbp81" },
6ab982e8 384 { .id = CS420X_MBA42, .name = "mba42" },
b35aabd7 385 {}
a6bae205
TI		 386};
387
b35aabd7 388static const struct snd_pci_quirk cs420x_fixup_tbl[] = {
4e7d7c60 389 SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53),
87232dd4 390 SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55),
a6bae205 391 SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55),
f46119b7 392 SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55),
6dfeb703
TI		 393 /* this conflicts with too many other models */
394 /*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/
6dfeb703 395
b35aabd7 396 /* codec SSID */
031f335c 397 SND_PCI_QUIRK(0x106b, 0x0600, "iMac 14,1", CS420X_IMAC27_122),
74bba640 398 SND_PCI_QUIRK(0x106b, 0x0900, "iMac 12,1", CS420X_IMAC27_122),
ffe4d12b 399 SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81),
7e5bea19 400 SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122),
ef596a57 401 SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101),
2ddee91a 402 SND_PCI_QUIRK(0x106b, 0x5600, "MacBookAir 5,2", CS420X_MBP81),
6ab982e8 403 SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42),
6dfeb703 404 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
a6bae205
TI		 405 {} /* terminator */
406};
407
b35aabd7 408static const struct hda_pintbl mbp53_pincfgs[] = {
4e7d7c60
VW		 409 { 0x09, 0x012b4050 },
410 { 0x0a, 0x90100141 },
411 { 0x0b, 0x90100140 },
412 { 0x0c, 0x018b3020 },
413 { 0x0d, 0x90a00110 },
414 { 0x0e, 0x400000f0 },
415 { 0x0f, 0x01cbe030 },
416 { 0x10, 0x014be060 },
417 { 0x12, 0x400000f0 },
418 { 0x15, 0x400000f0 },
419 {} /* terminator */
420};
421
b35aabd7 422static const struct hda_pintbl mbp55_pincfgs[] = {
a6bae205
TI		 423 { 0x09, 0x012b4030 },
424 { 0x0a, 0x90100121 },
425 { 0x0b, 0x90100120 },
426 { 0x0c, 0x400000f0 },
427 { 0x0d, 0x90a00110 },
428 { 0x0e, 0x400000f0 },
429 { 0x0f, 0x400000f0 },
430 { 0x10, 0x014be040 },
431 { 0x12, 0x400000f0 },
432 { 0x15, 0x400000f0 },
433 {} /* terminator */
434};
435
b35aabd7 436static const struct hda_pintbl imac27_pincfgs[] = {
1a5ba2e9
RAE		 437 { 0x09, 0x012b4050 },
438 { 0x0a, 0x90100140 },
439 { 0x0b, 0x90100142 },
440 { 0x0c, 0x018b3020 },
441 { 0x0d, 0x90a00110 },
442 { 0x0e, 0x400000f0 },
443 { 0x0f, 0x01cbe030 },
444 { 0x10, 0x014be060 },
445 { 0x12, 0x01ab9070 },
446 { 0x15, 0x400000f0 },
447 {} /* terminator */
448};
449
ef596a57
TI		 450static const struct hda_pintbl mbp101_pincfgs[] = {
451 { 0x0d, 0x40ab90f0 },
452 { 0x0e, 0x90a600f0 },
453 { 0x12, 0x50a600f0 },
454 {} /* terminator */
455};
456
6ab982e8
TI		 457static const struct hda_pintbl mba42_pincfgs[] = {
458 { 0x09, 0x012b4030 }, /* HP */
459 { 0x0a, 0x400000f0 },
460 { 0x0b, 0x90100120 }, /* speaker */
461 { 0x0c, 0x400000f0 },
462 { 0x0d, 0x90a00110 }, /* mic */
463 { 0x0e, 0x400000f0 },
464 { 0x0f, 0x400000f0 },
465 { 0x10, 0x400000f0 },
466 { 0x12, 0x400000f0 },
467 { 0x15, 0x400000f0 },
468 {} /* terminator */
469};
470
b5bf0a92
BW		 471static const struct hda_pintbl mba6_pincfgs[] = {
472 { 0x10, 0x032120f0 }, /* HP */
473 { 0x11, 0x500000f0 },
474 { 0x12, 0x90100010 }, /* Speaker */
475 { 0x13, 0x500000f0 },
476 { 0x14, 0x500000f0 },
477 { 0x15, 0x770000f0 },
478 { 0x16, 0x770000f0 },
479 { 0x17, 0x430000f0 },
480 { 0x18, 0x43ab9030 }, /* Mic */
481 { 0x19, 0x770000f0 },
482 { 0x1a, 0x770000f0 },
483 { 0x1b, 0x770000f0 },
484 { 0x1c, 0x90a00090 },
485 { 0x1d, 0x500000f0 },
486 { 0x1e, 0x500000f0 },
487 { 0x1f, 0x500000f0 },
488 { 0x20, 0x500000f0 },
489 { 0x21, 0x430000f0 },
490 { 0x22, 0x430000f0 },
491 {} /* terminator */
492};
493
b35aabd7
TI		 494static void cs420x_fixup_gpio_13(struct hda_codec *codec,
495 const struct hda_fixup *fix, int action)
496{
497 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
498 struct cs_spec *spec = codec->spec;
61a9aba1 499
b35aabd7
TI		 500 spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */
501 spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
502 spec->gpio_mask = spec->gpio_dir =
503 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
504 }
505}
a6bae205 506
b35aabd7
TI		 507static void cs420x_fixup_gpio_23(struct hda_codec *codec,
508 const struct hda_fixup *fix, int action)
a6bae205 509{
b35aabd7
TI		 510 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
511 struct cs_spec *spec = codec->spec;
61a9aba1 512
b35aabd7
TI		 513 spec->gpio_eapd_hp = 4; /* GPIO2 = headphones */
514 spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
515 spec->gpio_mask = spec->gpio_dir =
516 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
517 }
a6bae205
TI		 518}
519
b35aabd7
TI		 520static const struct hda_fixup cs420x_fixups[] = {
521 [CS420X_MBP53] = {
522 .type = HDA_FIXUP_PINS,
523 .v.pins = mbp53_pincfgs,
524 .chained = true,
525 .chain_id = CS420X_APPLE,
526 },
527 [CS420X_MBP55] = {
528 .type = HDA_FIXUP_PINS,
529 .v.pins = mbp55_pincfgs,
530 .chained = true,
531 .chain_id = CS420X_GPIO_13,
532 },
533 [CS420X_IMAC27] = {
534 .type = HDA_FIXUP_PINS,
535 .v.pins = imac27_pincfgs,
536 .chained = true,
537 .chain_id = CS420X_GPIO_13,
538 },
539 [CS420X_GPIO_13] = {
540 .type = HDA_FIXUP_FUNC,
541 .v.func = cs420x_fixup_gpio_13,
542 },
543 [CS420X_GPIO_23] = {
544 .type = HDA_FIXUP_FUNC,
545 .v.func = cs420x_fixup_gpio_23,
546 },
ef596a57
TI		 547 [CS420X_MBP101] = {
548 .type = HDA_FIXUP_PINS,
549 .v.pins = mbp101_pincfgs,
550 .chained = true,
ef596a57
TI		 551 .chain_id = CS420X_GPIO_13,
552 },
ffe4d12b
TI		 553 [CS420X_MBP81] = {
554 .type = HDA_FIXUP_VERBS,
555 .v.verbs = (const struct hda_verb[]) {
556 /* internal mic ADC2: right only, single ended */
557 {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
558 {0x11, AC_VERB_SET_PROC_COEF, 0x102a},
559 {}
560 },
561 .chained = true,
562 .chain_id = CS420X_GPIO_13,
563 },
6ab982e8
TI		 564 [CS420X_MBA42] = {
565 .type = HDA_FIXUP_PINS,
566 .v.pins = mba42_pincfgs,
567 .chained = true,
568 .chain_id = CS420X_GPIO_13,
569 },
b35aabd7
TI		 570};
571
1077a024 572static struct cs_spec *cs_alloc_spec(struct hda_codec *codec, int vendor_nid)
e5f14248
TI		 573{
574 struct cs_spec *spec;
e5f14248
TI		 575
576 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
577 if (!spec)
1077a024 578 return NULL;
e5f14248 579 codec->spec = spec;
1077a024 580 spec->vendor_nid = vendor_nid;
3e19fec3 581 codec->power_save_node = 1;
1077a024
TI		 582 snd_hda_gen_spec_init(&spec->gen);
583
584 return spec;
585}
586
587static int patch_cs420x(struct hda_codec *codec)
588{
589 struct cs_spec *spec;
590 int err;
e5f14248 591
1077a024
TI		 592 spec = cs_alloc_spec(codec, CS420X_VENDOR_NID);
593 if (!spec)
594 return -ENOMEM;
56487c27 595
225068ab 596 codec->patch_ops = cs_patch_ops;
6d3073e1 597 spec->gen.automute_hook = cs_automute;
bad994f5 598 codec->single_adc_amp = 1;
6d3073e1 599
b35aabd7
TI		 600 snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl,
601 cs420x_fixups);
602 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
e5f14248 603
ed208255 604 err = cs_parse_auto_config(codec);
21a4dc43
TI		 605 if (err < 0)
606 goto error;
607
b35aabd7
TI		 608 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
609
e5f14248
TI		 610 return 0;
611
612 error:
c5e0b6db 613 cs_free(codec);
e5f14248
TI		 614 return err;
615}
616
be8cf445
TI		 617/*
618 * CS4208 support:
b5bf0a92 619 * Its layout is no longer compatible with CS4206/CS4207
be8cf445
TI		 620 */
621enum {
885845d7 622 CS4208_MAC_AUTO,
b5bf0a92 623 CS4208_MBA6,
0c52db8c 624 CS4208_MBP11,
2154cc0e 625 CS4208_MACMINI,
be8cf445
TI		 626 CS4208_GPIO0,
627};
628
629static const struct hda_model_fixup cs4208_models[] = {
630 { .id = CS4208_GPIO0, .name = "gpio0" },
b5bf0a92 631 { .id = CS4208_MBA6, .name = "mba6" },
0c52db8c 632 { .id = CS4208_MBP11, .name = "mbp11" },
2154cc0e 633 { .id = CS4208_MACMINI, .name = "macmini" },
be8cf445
TI		 634 {}
635};
636
637static const struct snd_pci_quirk cs4208_fixup_tbl[] = {
885845d7
TI		 638 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS4208_MAC_AUTO),
639 {} /* terminator */
640};
641
642/* codec SSID matching */
643static const struct snd_pci_quirk cs4208_mac_fixup_tbl[] = {
0c52db8c 644 SND_PCI_QUIRK(0x106b, 0x5e00, "MacBookPro 11,2", CS4208_MBP11),
2154cc0e 645 SND_PCI_QUIRK(0x106b, 0x6c00, "MacMini 7,1", CS4208_MACMINI),
b5bf0a92
BW		 646 SND_PCI_QUIRK(0x106b, 0x7100, "MacBookAir 6,1", CS4208_MBA6),
647 SND_PCI_QUIRK(0x106b, 0x7200, "MacBookAir 6,2", CS4208_MBA6),
e8ff581f 648 SND_PCI_QUIRK(0x106b, 0x7b00, "MacBookPro 12,1", CS4208_MBP11),
be8cf445
TI		 649 {} /* terminator */
650};
651
652static void cs4208_fixup_gpio0(struct hda_codec *codec,
653 const struct hda_fixup *fix, int action)
654{
655 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
656 struct cs_spec *spec = codec->spec;
61a9aba1 657
be8cf445
TI		 658 spec->gpio_eapd_hp = 0;
659 spec->gpio_eapd_speaker = 1;
660 spec->gpio_mask = spec->gpio_dir =
661 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
662 }
663}
664
885845d7
TI		 665static const struct hda_fixup cs4208_fixups[];
666
667/* remap the fixup from codec SSID and apply it */
668static void cs4208_fixup_mac(struct hda_codec *codec,
669 const struct hda_fixup *fix, int action)
670{
671 if (action != HDA_FIXUP_ACT_PRE_PROBE)
672 return;
f5662e1c
DH		 673
674 codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
885845d7 675 snd_hda_pick_fixup(codec, NULL, cs4208_mac_fixup_tbl, cs4208_fixups);
f5662e1c 676 if (codec->fixup_id == HDA_FIXUP_ID_NOT_SET)
885845d7
TI		 677 codec->fixup_id = CS4208_GPIO0; /* default fixup */
678 snd_hda_apply_fixup(codec, action);
679}
680
2154cc0e
TI		 681/* MacMini 7,1 has the inverted jack detection */
682static void cs4208_fixup_macmini(struct hda_codec *codec,
683 const struct hda_fixup *fix, int action)
684{
685 static const struct hda_pintbl pincfgs[] = {
686 { 0x18, 0x00ab9150 }, /* mic (audio-in) jack: disable detect */
687 { 0x21, 0x004be140 }, /* SPDIF: disable detect */
688 { }
689 };
690
691 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
692 /* HP pin (0x10) has an inverted detection */
693 codec->inv_jack_detect = 1;
694 /* disable the bogus Mic and SPDIF jack detections */
695 snd_hda_apply_pincfgs(codec, pincfgs);
696 }
697}
698
0c52db8c
TI		 699static int cs4208_spdif_sw_put(struct snd_kcontrol *kcontrol,
700 struct snd_ctl_elem_value *ucontrol)
701{
702 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
703 struct cs_spec *spec = codec->spec;
704 hda_nid_t pin = spec->gen.autocfg.dig_out_pins[0];
705 int pinctl = ucontrol->value.integer.value[0] ? PIN_OUT : 0;
706
707 snd_hda_set_pin_ctl_cache(codec, pin, pinctl);
708 return spec->spdif_sw_put(kcontrol, ucontrol);
709}
710
711/* hook the SPDIF switch */
712static void cs4208_fixup_spdif_switch(struct hda_codec *codec,
713 const struct hda_fixup *fix, int action)
714{
715 if (action == HDA_FIXUP_ACT_BUILD) {
716 struct cs_spec *spec = codec->spec;
717 struct snd_kcontrol *kctl;
718
719 if (!spec->gen.autocfg.dig_out_pins[0])
720 return;
721 kctl = snd_hda_find_mixer_ctl(codec, "IEC958 Playback Switch");
722 if (!kctl)
723 return;
724 spec->spdif_sw_put = kctl->put;
725 kctl->put = cs4208_spdif_sw_put;
726 }
727}
728
be8cf445 729static const struct hda_fixup cs4208_fixups[] = {
b5bf0a92
BW		 730 [CS4208_MBA6] = {
731 .type = HDA_FIXUP_PINS,
732 .v.pins = mba6_pincfgs,
733 .chained = true,
734 .chain_id = CS4208_GPIO0,
735 },
0c52db8c
TI		 736 [CS4208_MBP11] = {
737 .type = HDA_FIXUP_FUNC,
738 .v.func = cs4208_fixup_spdif_switch,
739 .chained = true,
740 .chain_id = CS4208_GPIO0,
741 },
2154cc0e
TI		 742 [CS4208_MACMINI] = {
743 .type = HDA_FIXUP_FUNC,
744 .v.func = cs4208_fixup_macmini,
745 .chained = true,
746 .chain_id = CS4208_GPIO0,
747 },
be8cf445
TI		 748 [CS4208_GPIO0] = {
749 .type = HDA_FIXUP_FUNC,
750 .v.func = cs4208_fixup_gpio0,
751 },
885845d7
TI		 752 [CS4208_MAC_AUTO] = {
753 .type = HDA_FIXUP_FUNC,
754 .v.func = cs4208_fixup_mac,
755 },
be8cf445
TI		 756};
757
b5bf0a92
BW		 758/* correct the 0dB offset of input pins */
759static void cs4208_fix_amp_caps(struct hda_codec *codec, hda_nid_t adc)
760{
761 unsigned int caps;
762
763 caps = query_amp_caps(codec, adc, HDA_INPUT);
764 caps &= ~(AC_AMPCAP_OFFSET);
765 caps |= 0x02;
766 snd_hda_override_amp_caps(codec, adc, HDA_INPUT, caps);
767}
768
be8cf445
TI		 769static int patch_cs4208(struct hda_codec *codec)
770{
771 struct cs_spec *spec;
772 int err;
773
b5bf0a92 774 spec = cs_alloc_spec(codec, CS4208_VENDOR_NID);
be8cf445
TI		 775 if (!spec)
776 return -ENOMEM;
777
225068ab 778 codec->patch_ops = cs_patch_ops;
be8cf445 779 spec->gen.automute_hook = cs_automute;
a1114a8c
TI		 780 /* exclude NID 0x10 (HP) from output volumes due to different steps */
781 spec->gen.out_vol_mask = 1ULL << 0x10;
be8cf445
TI		 782
783 snd_hda_pick_fixup(codec, cs4208_models, cs4208_fixup_tbl,
784 cs4208_fixups);
785 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
786
b5bf0a92
BW		 787 snd_hda_override_wcaps(codec, 0x18,
788 get_wcaps(codec, 0x18) | AC_WCAP_STEREO);
789 cs4208_fix_amp_caps(codec, 0x18);
790 cs4208_fix_amp_caps(codec, 0x1b);
791 cs4208_fix_amp_caps(codec, 0x1c);
792
be8cf445
TI		 793 err = cs_parse_auto_config(codec);
794 if (err < 0)
795 goto error;
796
be8cf445
TI		 797 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
798
799 return 0;
800
801 error:
802 cs_free(codec);
803 return err;
804}
805
56487c27
TH		 806/*
807 * Cirrus Logic CS4210
808 *
809 * 1 DAC => HP(sense) / Speakers,
810 * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
811 * 1 SPDIF OUT => SPDIF Trasmitter(sense)
61a9aba1 812 */
56487c27
TH		 813
814/* CS4210 board names */
b35aabd7
TI		 815static const struct hda_model_fixup cs421x_models[] = {
816 { .id = CS421X_CDB4210, .name = "cdb4210" },
4af16107 817 { .id = CS421X_STUMPY, .name = "stumpy" },
b35aabd7 818 {}
56487c27
TH		 819};
820
b35aabd7 821static const struct snd_pci_quirk cs421x_fixup_tbl[] = {
56487c27
TH		 822 /* Test Intel board + CDB2410 */
823 SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210),
824 {} /* terminator */
825};
826
827/* CS4210 board pinconfigs */
828/* Default CS4210 (CDB4210)*/
b35aabd7 829static const struct hda_pintbl cdb4210_pincfgs[] = {
56487c27
TH		 830 { 0x05, 0x0321401f },
831 { 0x06, 0x90170010 },
832 { 0x07, 0x03813031 },
833 { 0x08, 0xb7a70037 },
834 { 0x09, 0xb7a6003e },
835 { 0x0a, 0x034510f0 },
836 {} /* terminator */
837};
838
4af16107
DR		 839/* Stumpy ChromeBox */
840static const struct hda_pintbl stumpy_pincfgs[] = {
841 { 0x05, 0x022120f0 },
842 { 0x06, 0x901700f0 },
843 { 0x07, 0x02a120f0 },
844 { 0x08, 0x77a70037 },
845 { 0x09, 0x77a6003e },
846 { 0x0a, 0x434510f0 },
847 {} /* terminator */
848};
849
b35aabd7
TI		 850/* Setup GPIO/SENSE for each board (if used) */
851static void cs421x_fixup_sense_b(struct hda_codec *codec,
852 const struct hda_fixup *fix, int action)
853{
854 struct cs_spec *spec = codec->spec;
61a9aba1 855
b35aabd7
TI		 856 if (action == HDA_FIXUP_ACT_PRE_PROBE)
857 spec->sense_b = 1;
858}
859
860static const struct hda_fixup cs421x_fixups[] = {
861 [CS421X_CDB4210] = {
862 .type = HDA_FIXUP_PINS,
863 .v.pins = cdb4210_pincfgs,
864 .chained = true,
865 .chain_id = CS421X_SENSE_B,
866 },
867 [CS421X_SENSE_B] = {
868 .type = HDA_FIXUP_FUNC,
869 .v.func = cs421x_fixup_sense_b,
4af16107
DR		 870 },
871 [CS421X_STUMPY] = {
872 .type = HDA_FIXUP_PINS,
873 .v.pins = stumpy_pincfgs,
874 },
56487c27
TH		 875};
876
877static const struct hda_verb cs421x_coef_init_verbs[] = {
878 {0x0B, AC_VERB_SET_PROC_STATE, 1},
879 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG},
880 /*
61a9aba1
SB		 881 * Disable Coefficient Index Auto-Increment(DAI)=1,
882 * PDREF=0
883 */
56487c27
TH		 884 {0x0B, AC_VERB_SET_PROC_COEF, 0x0001 },
885
886 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG},
887 /* ADC SZCMode = Digital Soft Ramp */
888 {0x0B, AC_VERB_SET_PROC_COEF, 0x0002 },
889
890 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG},
891 {0x0B, AC_VERB_SET_PROC_COEF,
892 (0x0002 /* DAC SZCMode = Digital Soft Ramp */
893 | 0x0004 /* Mute DAC on FIFO error */
894 | 0x0008 /* Enable DAC High Pass Filter */
895 )},
896 {} /* terminator */
897};
898
899/* Errata: CS4210 rev A1 Silicon
900 *
901 * http://www.cirrus.com/en/pubs/errata/
902 *
903 * Description:
904 * 1. Performance degredation is present in the ADC.
905 * 2. Speaker output is not completely muted upon HP detect.
906 * 3. Noise is present when clipping occurs on the amplified
907 * speaker outputs.
908 *
909 * Workaround:
910 * The following verb sequence written to the registers during
911 * initialization will correct the issues listed above.
912 */
913
914static const struct hda_verb cs421x_coef_init_verbs_A1_silicon_fixes[] = {
915 {0x0B, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
916
917 {0x0B, AC_VERB_SET_COEF_INDEX, 0x0006},
918 {0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */
919
920 {0x0B, AC_VERB_SET_COEF_INDEX, 0x000A},
921 {0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */
922
923 {0x0B, AC_VERB_SET_COEF_INDEX, 0x0011},
924 {0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */
925
926 {0x0B, AC_VERB_SET_COEF_INDEX, 0x001A},
927 {0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */
928
929 {0x0B, AC_VERB_SET_COEF_INDEX, 0x001B},
930 {0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */
931
932 {} /* terminator */
933};
934
935/* Speaker Amp Gain is controlled by the vendor widget's coef 4 */
936static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0);
937
938static int cs421x_boost_vol_info(struct snd_kcontrol *kcontrol,
939 struct snd_ctl_elem_info *uinfo)
940{
941 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
942 uinfo->count = 1;
943 uinfo->value.integer.min = 0;
944 uinfo->value.integer.max = 3;
945 return 0;
946}
947
948static int cs421x_boost_vol_get(struct snd_kcontrol *kcontrol,
949 struct snd_ctl_elem_value *ucontrol)
950{
951 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
952
953 ucontrol->value.integer.value[0] =
954 cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003;
955 return 0;
956}
957
958static int cs421x_boost_vol_put(struct snd_kcontrol *kcontrol,
959 struct snd_ctl_elem_value *ucontrol)
960{
961 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
962
963 unsigned int vol = ucontrol->value.integer.value[0];
964 unsigned int coef =
965 cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL);
966 unsigned int original_coef = coef;
967
968 coef &= ~0x0003;
969 coef |= (vol & 0x0003);
61a9aba1 970 if (original_coef != coef) {
56487c27
TH		 971 cs_vendor_coef_set(codec, CS421X_IDX_SPK_CTL, coef);
972 return 1;
973 }
61a9aba1
SB		 974
975 return 0;
56487c27
TH		 976}
977
1077a024 978static const struct snd_kcontrol_new cs421x_speaker_boost_ctl = {
56487c27
TH		 979
980 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
981 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
982 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
983 .name = "Speaker Boost Playback Volume",
984 .info = cs421x_boost_vol_info,
985 .get = cs421x_boost_vol_get,
986 .put = cs421x_boost_vol_put,
987 .tlv = { .p = cs421x_speaker_boost_db_scale },
988};
989
5660ffd0 990static void cs4210_pinmux_init(struct hda_codec *codec)
56487c27
TH		 991{
992 struct cs_spec *spec = codec->spec;
993 unsigned int def_conf, coef;
994
995 /* GPIO, DMIC_SCL, DMIC_SDA and SENSE_B are multiplexed */
996 coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
997
998 if (spec->gpio_mask)
999 coef |= 0x0008; /* B1,B2 are GPIOs */
1000 else
1001 coef &= ~0x0008;
1002
1003 if (spec->sense_b)
1004 coef |= 0x0010; /* B2 is SENSE_B, not inverted */
1005 else
1006 coef &= ~0x0010;
1007
1008 cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
1009
1010 if ((spec->gpio_mask || spec->sense_b) &&
1011 is_active_pin(codec, CS421X_DMIC_PIN_NID)) {
1012
1013 /*
61a9aba1
SB		 1014 * GPIO or SENSE_B forced - disconnect the DMIC pin.
1015 */
56487c27
TH		 1016 def_conf = snd_hda_codec_get_pincfg(codec, CS421X_DMIC_PIN_NID);
1017 def_conf &= ~AC_DEFCFG_PORT_CONN;
1018 def_conf |= (AC_JACK_PORT_NONE << AC_DEFCFG_PORT_CONN_SHIFT);
1019 snd_hda_codec_set_pincfg(codec, CS421X_DMIC_PIN_NID, def_conf);
1020 }
1021}
1022
1077a024 1023static void cs4210_spdif_automute(struct hda_codec *codec,
1a4f69d5 1024 struct hda_jack_callback *tbl)
56487c27
TH		 1025{
1026 struct cs_spec *spec = codec->spec;
1077a024
TI		 1027 bool spdif_present = false;
1028 hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0];
1029
1030 /* detect on spdif is specific to CS4210 */
1031 if (!spec->spdif_detect ||
1032 spec->vendor_nid != CS4210_VENDOR_NID)
1033 return;
1034
1035 spdif_present = snd_hda_jack_detect(codec, spdif_pin);
1036 if (spdif_present == spec->spdif_present)
1037 return;
1038
1039 spec->spdif_present = spdif_present;
1040 /* SPDIF TX on/off */
44008f08 1041 snd_hda_set_pin_ctl(codec, spdif_pin, spdif_present ? PIN_OUT : 0);
56487c27 1042
1077a024
TI		 1043 cs_automute(codec);
1044}
1045
1046static void parse_cs421x_digital(struct hda_codec *codec)
1047{
1048 struct cs_spec *spec = codec->spec;
1049 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
1050 int i;
56487c27
TH		 1051
1052 for (i = 0; i < cfg->dig_outs; i++) {
1053 hda_nid_t nid = cfg->dig_out_pins[i];
61a9aba1 1054
56487c27 1055 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) {
56487c27 1056 spec->spdif_detect = 1;
1077a024 1057 snd_hda_jack_detect_enable_callback(codec, nid,
1077a024 1058 cs4210_spdif_automute);
56487c27
TH		 1059 }
1060 }
1061}
1062
1063static int cs421x_init(struct hda_codec *codec)
1064{
1065 struct cs_spec *spec = codec->spec;
1066
5660ffd0
DH		 1067 if (spec->vendor_nid == CS4210_VENDOR_NID) {
1068 snd_hda_sequence_write(codec, cs421x_coef_init_verbs);
1069 snd_hda_sequence_write(codec, cs421x_coef_init_verbs_A1_silicon_fixes);
1070 cs4210_pinmux_init(codec);
1071 }
56487c27 1072
1077a024
TI		 1073 snd_hda_gen_init(codec);
1074
56487c27
TH		 1075 if (spec->gpio_mask) {
1076 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
1077 spec->gpio_mask);
1078 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
1079 spec->gpio_dir);
1080 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
1081 spec->gpio_data);
1082 }
1083
1077a024 1084 init_input_coef(codec);
56487c27 1085
1077a024 1086 cs4210_spdif_automute(codec, NULL);
56487c27
TH		 1087
1088 return 0;
1089}
1090
1077a024 1091static void fix_volume_caps(struct hda_codec *codec, hda_nid_t dac)
56487c27 1092{
1077a024 1093 unsigned int caps;
56487c27 1094
1077a024
TI		 1095 /* set the upper-limit for mixer amp to 0dB */
1096 caps = query_amp_caps(codec, dac, HDA_OUTPUT);
1097 caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT);
1098 caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f)
1099 << AC_AMPCAP_NUM_STEPS_SHIFT;
1100 snd_hda_override_amp_caps(codec, dac, HDA_OUTPUT, caps);
56487c27
TH		 1101}
1102
1103static int cs421x_parse_auto_config(struct hda_codec *codec)
1104{
1105 struct cs_spec *spec = codec->spec;
1077a024 1106 hda_nid_t dac = CS4210_DAC_NID;
56487c27
TH		 1107 int err;
1108
1077a024
TI		 1109 fix_volume_caps(codec, dac);
1110
1111 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
56487c27
TH		 1112 if (err < 0)
1113 return err;
1077a024
TI		 1114
1115 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
56487c27
TH		 1116 if (err < 0)
1117 return err;
1077a024
TI		 1118
1119 parse_cs421x_digital(codec);
0785b0ec
TI		 1120
1121 if (spec->gen.autocfg.speaker_outs &&
1122 spec->vendor_nid == CS4210_VENDOR_NID) {
1123 if (!snd_hda_gen_add_kctl(&spec->gen, NULL,
1124 &cs421x_speaker_boost_ctl))
1125 return -ENOMEM;
1126 }
1127
56487c27
TH		 1128 return 0;
1129}
1130
56487c27 1131/*
61a9aba1
SB		 1132 * Manage PDREF, when transitioning to D3hot
1133 * (DAC,ADC) -> D3, PDREF=1, AFG->D3
1134 */
68cb2b55 1135static int cs421x_suspend(struct hda_codec *codec)
56487c27 1136{
5660ffd0 1137 struct cs_spec *spec = codec->spec;
56487c27
TH		 1138 unsigned int coef;
1139
1140 snd_hda_shutup_pins(codec);
1141
1142 snd_hda_codec_write(codec, CS4210_DAC_NID, 0,
1143 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
1144 snd_hda_codec_write(codec, CS4210_ADC_NID, 0,
1145 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
1146
5660ffd0
DH		 1147 if (spec->vendor_nid == CS4210_VENDOR_NID) {
1148 coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
1149 coef |= 0x0004; /* PDREF */
1150 cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
1151 }
56487c27
TH		 1152
1153 return 0;
1154}
56487c27 1155
00e17f76 1156static const struct hda_codec_ops cs421x_patch_ops = {
0785b0ec 1157 .build_controls = snd_hda_gen_build_controls,
1077a024 1158 .build_pcms = snd_hda_gen_build_pcms,
56487c27
TH		 1159 .init = cs421x_init,
1160 .free = cs_free,
5c2e4e0a 1161 .unsol_event = snd_hda_jack_unsol_event,
56487c27 1162 .suspend = cs421x_suspend,
56487c27
TH		 1163};
1164
5660ffd0 1165static int patch_cs4210(struct hda_codec *codec)
56487c27
TH		 1166{
1167 struct cs_spec *spec;
1168 int err;
1169
1077a024 1170 spec = cs_alloc_spec(codec, CS4210_VENDOR_NID);
56487c27
TH		 1171 if (!spec)
1172 return -ENOMEM;
56487c27 1173
225068ab 1174 codec->patch_ops = cs421x_patch_ops;
6d3073e1
TI		 1175 spec->gen.automute_hook = cs_automute;
1176
b35aabd7
TI		 1177 snd_hda_pick_fixup(codec, cs421x_models, cs421x_fixup_tbl,
1178 cs421x_fixups);
1179 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
56487c27
TH		 1180
1181 /*
61a9aba1
SB		 1182 * Update the GPIO/DMIC/SENSE_B pinmux before the configuration
1183 * is auto-parsed. If GPIO or SENSE_B is forced, DMIC input
1184 * is disabled.
1185 */
5660ffd0 1186 cs4210_pinmux_init(codec);
56487c27
TH		 1187
1188 err = cs421x_parse_auto_config(codec);
1189 if (err < 0)
1190 goto error;
1191
b35aabd7
TI		 1192 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
1193
5660ffd0
DH		 1194 return 0;
1195
1196 error:
c5e0b6db 1197 cs_free(codec);
5660ffd0
DH		 1198 return err;
1199}
1200
1201static int patch_cs4213(struct hda_codec *codec)
1202{
1203 struct cs_spec *spec;
1204 int err;
1205
1077a024 1206 spec = cs_alloc_spec(codec, CS4213_VENDOR_NID);
5660ffd0
DH		 1207 if (!spec)
1208 return -ENOMEM;
5660ffd0 1209
225068ab
TI		 1210 codec->patch_ops = cs421x_patch_ops;
1211
5660ffd0
DH		 1212 err = cs421x_parse_auto_config(codec);
1213 if (err < 0)
1214 goto error;
56487c27
TH		 1215
1216 return 0;
1217
1218 error:
c5e0b6db 1219 cs_free(codec);
56487c27
TH		 1220 return err;
1221}
1222
e5f14248
TI		 1223/*
1224 * patch entries
1225 */
b9a94a9c
TI		 1226static const struct hda_device_id snd_hda_id_cirrus[] = {
1227 HDA_CODEC_ENTRY(0x10134206, "CS4206", patch_cs420x),
1228 HDA_CODEC_ENTRY(0x10134207, "CS4207", patch_cs420x),
1229 HDA_CODEC_ENTRY(0x10134208, "CS4208", patch_cs4208),
1230 HDA_CODEC_ENTRY(0x10134210, "CS4210", patch_cs4210),
1231 HDA_CODEC_ENTRY(0x10134213, "CS4213", patch_cs4213),
e5f14248
TI		 1232 {} /* terminator */
1233};
b9a94a9c 1234MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_cirrus);
e5f14248
TI		 1235
1236MODULE_LICENSE("GPL");
1237MODULE_DESCRIPTION("Cirrus Logic HD-audio codec");
1238
d8a766a1 1239static struct hda_codec_driver cirrus_driver = {
b9a94a9c 1240 .id = snd_hda_id_cirrus,
e5f14248
TI		 1241};
1242
d8a766a1 1243module_hda_codec_driver(cirrus_driver);
Linux 6.x block layer and io_uring tree(s)