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Merge remote-tracking branches 'regulator/topic/load', 'regulator/topic/max77802...
[linux-2.6-block.git] / sound / pci / hda / patch_cirrus.c
CommitLineData
e5f14248
TI		 1/*
2 * HD audio interface patch for Cirrus Logic CS420x chip
3 *
4 * Copyright (c) 2009 Takashi Iwai <tiwai@suse.de>
5 *
6 * This driver is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This driver is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/init.h>
e5f14248 22#include <linux/slab.h>
da155d5b 23#include <linux/module.h>
e5f14248 24#include <sound/core.h>
1077a024 25#include <sound/tlv.h>
e5f14248
TI		 26#include "hda_codec.h"
27#include "hda_local.h"
128bc4ba 28#include "hda_auto_parser.h"
1835a0f9 29#include "hda_jack.h"
1077a024 30#include "hda_generic.h"
e5f14248
TI		 31
32/*
33 */
34
35struct cs_spec {
1077a024 36 struct hda_gen_spec gen;
e5f14248 37
ed208255
TI		 38 unsigned int gpio_mask;
39 unsigned int gpio_dir;
40 unsigned int gpio_data;
6dfeb703
TI		 41 unsigned int gpio_eapd_hp; /* EAPD GPIO bit for headphones */
42 unsigned int gpio_eapd_speaker; /* EAPD GPIO bit for speakers */
ed208255 43
56487c27
TH		 44 /* CS421x */
45 unsigned int spdif_detect:1;
1077a024 46 unsigned int spdif_present:1;
56487c27
TH		 47 unsigned int sense_b:1;
48 hda_nid_t vendor_nid;
0c52db8c
TI		 49
50 /* for MBP SPDIF control */
51 int (*spdif_sw_put)(struct snd_kcontrol *kcontrol,
52 struct snd_ctl_elem_value *ucontrol);
e5f14248
TI		 53};
54
56487c27 55/* available models with CS420x */
a6bae205 56enum {
4e7d7c60 57 CS420X_MBP53,
a6bae205 58 CS420X_MBP55,
1a5ba2e9 59 CS420X_IMAC27,
b35aabd7
TI		 60 CS420X_GPIO_13,
61 CS420X_GPIO_23,
ef596a57 62 CS420X_MBP101,
ffe4d12b 63 CS420X_MBP81,
6ab982e8 64 CS420X_MBA42,
a6bae205 65 CS420X_AUTO,
03efce75
TI		 66 /* aliases */
67 CS420X_IMAC27_122 = CS420X_GPIO_23,
68 CS420X_APPLE = CS420X_GPIO_13,
a6bae205
TI		 69};
70
56487c27
TH		 71/* CS421x boards */
72enum {
73 CS421X_CDB4210,
b35aabd7 74 CS421X_SENSE_B,
4af16107 75 CS421X_STUMPY,
56487c27
TH		 76};
77
40c20fa0
TI		 78/* Vendor-specific processing widget */
79#define CS420X_VENDOR_NID 0x11
80#define CS_DIG_OUT1_PIN_NID 0x10
81#define CS_DIG_OUT2_PIN_NID 0x15
16337e02
DB		 82#define CS_DMIC1_PIN_NID 0x0e
83#define CS_DMIC2_PIN_NID 0x12
40c20fa0
TI		 84
85/* coef indices */
86#define IDX_SPDIF_STAT 0x0000
87#define IDX_SPDIF_CTL 0x0001
88#define IDX_ADC_CFG 0x0002
89/* SZC bitmask, 4 modes below:
90 * 0 = immediate,
91 * 1 = digital immediate, analog zero-cross
92 * 2 = digtail & analog soft-ramp
93 * 3 = digital soft-ramp, analog zero-cross
94 */
95#define CS_COEF_ADC_SZC_MASK (3 << 0)
96#define CS_COEF_ADC_MIC_SZC_MODE (3 << 0) /* SZC setup for mic */
97#define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */
98/* PGA mode: 0 = differential, 1 = signle-ended */
99#define CS_COEF_ADC_MIC_PGA_MODE (1 << 5) /* PGA setup for mic */
100#define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */
101#define IDX_DAC_CFG 0x0003
102/* SZC bitmask, 4 modes below:
103 * 0 = Immediate
104 * 1 = zero-cross
105 * 2 = soft-ramp
106 * 3 = soft-ramp on zero-cross
107 */
108#define CS_COEF_DAC_HP_SZC_MODE (3 << 0) /* nid 0x02 */
109#define CS_COEF_DAC_LO_SZC_MODE (3 << 2) /* nid 0x03 */
110#define CS_COEF_DAC_SPK_SZC_MODE (3 << 4) /* nid 0x04 */
111
112#define IDX_BEEP_CFG 0x0004
113/* 0x0008 - test reg key */
114/* 0x0009 - 0x0014 -> 12 test regs */
115/* 0x0015 - visibility reg */
116
b5bf0a92
BW		 117/* Cirrus Logic CS4208 */
118#define CS4208_VENDOR_NID 0x24
119
56487c27
TH		 120/*
121 * Cirrus Logic CS4210
122 *
123 * 1 DAC => HP(sense) / Speakers,
124 * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
125 * 1 SPDIF OUT => SPDIF Trasmitter(sense)
126*/
127#define CS4210_DAC_NID 0x02
128#define CS4210_ADC_NID 0x03
5660ffd0 129#define CS4210_VENDOR_NID 0x0B
56487c27
TH		 130#define CS421X_DMIC_PIN_NID 0x09 /* Port E */
131#define CS421X_SPDIF_PIN_NID 0x0A /* Port H */
132
1077a024
TI		 133#define CS421X_IDX_DEV_CFG 0x01
134#define CS421X_IDX_ADC_CFG 0x02
135#define CS421X_IDX_DAC_CFG 0x03
136#define CS421X_IDX_SPK_CTL 0x04
e5f14248 137
1077a024
TI		 138/* Cirrus Logic CS4213 is like CS4210 but does not have SPDIF input/output */
139#define CS4213_VENDOR_NID 0x09
e5f14248 140
21a4dc43 141
1077a024 142static inline int cs_vendor_coef_get(struct hda_codec *codec, unsigned int idx)
e5f14248
TI		 143{
144 struct cs_spec *spec = codec->spec;
1077a024
TI		 145 snd_hda_codec_write(codec, spec->vendor_nid, 0,
146 AC_VERB_SET_COEF_INDEX, idx);
147 return snd_hda_codec_read(codec, spec->vendor_nid, 0,
148 AC_VERB_GET_PROC_COEF, 0);
e5f14248
TI		 149}
150
1077a024
TI		 151static inline void cs_vendor_coef_set(struct hda_codec *codec, unsigned int idx,
152 unsigned int coef)
e5f14248
TI		 153{
154 struct cs_spec *spec = codec->spec;
1077a024
TI		 155 snd_hda_codec_write(codec, spec->vendor_nid, 0,
156 AC_VERB_SET_COEF_INDEX, idx);
157 snd_hda_codec_write(codec, spec->vendor_nid, 0,
158 AC_VERB_SET_PROC_COEF, coef);
e5f14248
TI		 159}
160
21a4dc43
TI		 161/*
162 * auto-mute and auto-mic switching
56487c27
TH		 163 * CS421x auto-output redirecting
164 * HP/SPK/SPDIF
21a4dc43
TI		 165 */
166
1077a024 167static void cs_automute(struct hda_codec *codec)
e5f14248
TI		 168{
169 struct cs_spec *spec = codec->spec;
e5f14248 170
1077a024
TI		 171 /* mute HPs if spdif jack (SENSE_B) is present */
172 spec->gen.master_mute = !!(spec->spdif_present && spec->sense_b);
56487c27 173
1077a024 174 snd_hda_gen_update_outputs(codec);
78e2a928 175
be8cf445 176 if (spec->gpio_eapd_hp || spec->gpio_eapd_speaker) {
039eb753 177 spec->gpio_data = spec->gen.hp_jack_present ?
6dfeb703 178 spec->gpio_eapd_hp : spec->gpio_eapd_speaker;
3a385167 179 snd_hda_codec_write(codec, 0x01, 0,
039eb753 180 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
3a385167 181 }
e5f14248
TI		 182}
183
1077a024 184static bool is_active_pin(struct hda_codec *codec, hda_nid_t nid)
e5f14248 185{
1077a024
TI		 186 unsigned int val;
187 val = snd_hda_codec_get_pincfg(codec, nid);
188 return (get_defcfg_connect(val) != AC_JACK_PORT_NONE);
e5f14248
TI		 189}
190
1077a024 191static void init_input_coef(struct hda_codec *codec)
e5f14248
TI		 192{
193 struct cs_spec *spec = codec->spec;
40c20fa0 194 unsigned int coef;
e5f14248 195
5660ffd0
DH		 196 /* CS420x has multiple ADC, CS421x has single ADC */
197 if (spec->vendor_nid == CS420X_VENDOR_NID) {
16337e02 198 coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG);
56487c27 199 if (is_active_pin(codec, CS_DMIC2_PIN_NID))
16337e02 200 coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */
56487c27 201 if (is_active_pin(codec, CS_DMIC1_PIN_NID))
16337e02 202 coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off
56487c27
TH		 203 * No effect if SPDIF_OUT2 is
204 * selected in IDX_SPDIF_CTL.
205 */
16337e02
DB		 206
207 cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef);
56487c27 208 }
40c20fa0
TI		 209}
210
c42d4782 211static const struct hda_verb cs_coef_init_verbs[] = {
40c20fa0
TI		 212 {0x11, AC_VERB_SET_PROC_STATE, 1},
213 {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG},
214 {0x11, AC_VERB_SET_PROC_COEF,
215 (0x002a /* DAC1/2/3 SZCMode Soft Ramp */
216 | 0x0040 /* Mute DACs on FIFO error */
217 | 0x1000 /* Enable DACs High Pass Filter */
218 | 0x0400 /* Disable Coefficient Auto increment */
219 )},
829e87e0
TI		 220 /* ADC1/2 - Digital and Analog Soft Ramp */
221 {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
222 {0x11, AC_VERB_SET_PROC_COEF, 0x000a},
40c20fa0 223 /* Beep */
5a83b4b5 224 {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG},
40c20fa0
TI		 225 {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */
226
227 {} /* terminator */
228};
229
b5bf0a92
BW		 230static const struct hda_verb cs4208_coef_init_verbs[] = {
231 {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
232 {0x24, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
233 {0x24, AC_VERB_SET_COEF_INDEX, 0x0033},
234 {0x24, AC_VERB_SET_PROC_COEF, 0x0001}, /* A1 ICS */
235 {0x24, AC_VERB_SET_COEF_INDEX, 0x0034},
236 {0x24, AC_VERB_SET_PROC_COEF, 0x1C01}, /* A1 Enable, A Thresh = 300mV */
237 {} /* terminator */
238};
239
a769cbcf
BA		 240/* Errata: CS4207 rev C0/C1/C2 Silicon
241 *
242 * http://www.cirrus.com/en/pubs/errata/ER880C3.pdf
243 *
244 * 6. At high temperature (TA > +85°C), the digital supply current (IVD)
245 * may be excessive (up to an additional 200 μA), which is most easily
246 * observed while the part is being held in reset (RESET# active low).
247 *
248 * Root Cause: At initial powerup of the device, the logic that drives
249 * the clock and write enable to the S/PDIF SRC RAMs is not properly
250 * initialized.
251 * Certain random patterns will cause a steady leakage current in those
252 * RAM cells. The issue will resolve once the SRCs are used (turned on).
253 *
254 * Workaround: The following verb sequence briefly turns on the S/PDIF SRC
255 * blocks, which will alleviate the issue.
256 */
257
c42d4782 258static const struct hda_verb cs_errata_init_verbs[] = {
a769cbcf
BA		 259 {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
260 {0x11, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
261
262 {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
263 {0x11, AC_VERB_SET_PROC_COEF, 0x9999},
264 {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
265 {0x11, AC_VERB_SET_PROC_COEF, 0xa412},
266 {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
267 {0x11, AC_VERB_SET_PROC_COEF, 0x0009},
268
269 {0x07, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Rx: D0 */
270 {0x08, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Tx: D0 */
271
272 {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
273 {0x11, AC_VERB_SET_PROC_COEF, 0x2412},
274 {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
275 {0x11, AC_VERB_SET_PROC_COEF, 0x0000},
276 {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
277 {0x11, AC_VERB_SET_PROC_COEF, 0x0008},
278 {0x11, AC_VERB_SET_PROC_STATE, 0x00},
279
38c07641 280#if 0 /* Don't to set to D3 as we are in power-up sequence */
a769cbcf
BA		 281 {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */
282 {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */
283 /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */
38c07641 284#endif
a769cbcf
BA		 285
286 {} /* terminator */
287};
288
40c20fa0 289/* SPDIF setup */
1077a024 290static void init_digital_coef(struct hda_codec *codec)
40c20fa0
TI		 291{
292 unsigned int coef;
293
294 coef = 0x0002; /* SRC_MUTE soft-mute on SPDIF (if no lock) */
295 coef |= 0x0008; /* Replace with mute on error */
296 if (is_active_pin(codec, CS_DIG_OUT2_PIN_NID))
297 coef |= 0x4000; /* RX to TX1 or TX2 Loopthru / SPDIF2
298 * SPDIF_OUT2 is shared with GPIO1 and
299 * DMIC_SDA2.
300 */
301 cs_vendor_coef_set(codec, IDX_SPDIF_CTL, coef);
e5f14248
TI		 302}
303
304static int cs_init(struct hda_codec *codec)
305{
306 struct cs_spec *spec = codec->spec;
307
be8cf445
TI		 308 if (spec->vendor_nid == CS420X_VENDOR_NID) {
309 /* init_verb sequence for C0/C1/C2 errata*/
310 snd_hda_sequence_write(codec, cs_errata_init_verbs);
311 snd_hda_sequence_write(codec, cs_coef_init_verbs);
b5bf0a92
BW		 312 } else if (spec->vendor_nid == CS4208_VENDOR_NID) {
313 snd_hda_sequence_write(codec, cs4208_coef_init_verbs);
be8cf445 314 }
ed208255 315
1077a024 316 snd_hda_gen_init(codec);
98415eac 317
ed208255
TI		 318 if (spec->gpio_mask) {
319 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
320 spec->gpio_mask);
321 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
322 spec->gpio_dir);
323 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
324 spec->gpio_data);
325 }
326
be8cf445
TI		 327 if (spec->vendor_nid == CS420X_VENDOR_NID) {
328 init_input_coef(codec);
329 init_digital_coef(codec);
330 }
01a61e12
TI		 331
332 return 0;
e5f14248
TI		 333}
334
0c52db8c
TI		 335static int cs_build_controls(struct hda_codec *codec)
336{
337 int err;
338
339 err = snd_hda_gen_build_controls(codec);
340 if (err < 0)
341 return err;
342 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_BUILD);
343 return 0;
344}
345
1077a024 346#define cs_free snd_hda_gen_free
e5f14248 347
c42d4782 348static const struct hda_codec_ops cs_patch_ops = {
0c52db8c 349 .build_controls = cs_build_controls,
1077a024 350 .build_pcms = snd_hda_gen_build_pcms,
e5f14248
TI		 351 .init = cs_init,
352 .free = cs_free,
5c2e4e0a 353 .unsol_event = snd_hda_jack_unsol_event,
e5f14248
TI		 354};
355
356static int cs_parse_auto_config(struct hda_codec *codec)
357{
358 struct cs_spec *spec = codec->spec;
359 int err;
360
1077a024 361 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
ed208255
TI		 362 if (err < 0)
363 return err;
364
1077a024 365 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
e5f14248
TI		 366 if (err < 0)
367 return err;
1077a024 368
e5f14248
TI		 369 return 0;
370}
371
b35aabd7
TI		 372static const struct hda_model_fixup cs420x_models[] = {
373 { .id = CS420X_MBP53, .name = "mbp53" },
374 { .id = CS420X_MBP55, .name = "mbp55" },
375 { .id = CS420X_IMAC27, .name = "imac27" },
376 { .id = CS420X_IMAC27_122, .name = "imac27_122" },
377 { .id = CS420X_APPLE, .name = "apple" },
ef596a57 378 { .id = CS420X_MBP101, .name = "mbp101" },
ffe4d12b 379 { .id = CS420X_MBP81, .name = "mbp81" },
6ab982e8 380 { .id = CS420X_MBA42, .name = "mba42" },
b35aabd7 381 {}
a6bae205
TI		 382};
383
b35aabd7 384static const struct snd_pci_quirk cs420x_fixup_tbl[] = {
4e7d7c60 385 SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53),
87232dd4 386 SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55),
a6bae205 387 SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55),
f46119b7 388 SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55),
6dfeb703
TI		 389 /* this conflicts with too many other models */
390 /*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/
6dfeb703 391
b35aabd7 392 /* codec SSID */
ffe4d12b 393 SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81),
7e5bea19 394 SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122),
ef596a57 395 SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101),
2ddee91a 396 SND_PCI_QUIRK(0x106b, 0x5600, "MacBookAir 5,2", CS420X_MBP81),
6ab982e8 397 SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42),
6dfeb703 398 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
a6bae205
TI		 399 {} /* terminator */
400};
401
b35aabd7 402static const struct hda_pintbl mbp53_pincfgs[] = {
4e7d7c60
VW		 403 { 0x09, 0x012b4050 },
404 { 0x0a, 0x90100141 },
405 { 0x0b, 0x90100140 },
406 { 0x0c, 0x018b3020 },
407 { 0x0d, 0x90a00110 },
408 { 0x0e, 0x400000f0 },
409 { 0x0f, 0x01cbe030 },
410 { 0x10, 0x014be060 },
411 { 0x12, 0x400000f0 },
412 { 0x15, 0x400000f0 },
413 {} /* terminator */
414};
415
b35aabd7 416static const struct hda_pintbl mbp55_pincfgs[] = {
a6bae205
TI		 417 { 0x09, 0x012b4030 },
418 { 0x0a, 0x90100121 },
419 { 0x0b, 0x90100120 },
420 { 0x0c, 0x400000f0 },
421 { 0x0d, 0x90a00110 },
422 { 0x0e, 0x400000f0 },
423 { 0x0f, 0x400000f0 },
424 { 0x10, 0x014be040 },
425 { 0x12, 0x400000f0 },
426 { 0x15, 0x400000f0 },
427 {} /* terminator */
428};
429
b35aabd7 430static const struct hda_pintbl imac27_pincfgs[] = {
1a5ba2e9
RAE		 431 { 0x09, 0x012b4050 },
432 { 0x0a, 0x90100140 },
433 { 0x0b, 0x90100142 },
434 { 0x0c, 0x018b3020 },
435 { 0x0d, 0x90a00110 },
436 { 0x0e, 0x400000f0 },
437 { 0x0f, 0x01cbe030 },
438 { 0x10, 0x014be060 },
439 { 0x12, 0x01ab9070 },
440 { 0x15, 0x400000f0 },
441 {} /* terminator */
442};
443
ef596a57
TI		 444static const struct hda_pintbl mbp101_pincfgs[] = {
445 { 0x0d, 0x40ab90f0 },
446 { 0x0e, 0x90a600f0 },
447 { 0x12, 0x50a600f0 },
448 {} /* terminator */
449};
450
6ab982e8
TI		 451static const struct hda_pintbl mba42_pincfgs[] = {
452 { 0x09, 0x012b4030 }, /* HP */
453 { 0x0a, 0x400000f0 },
454 { 0x0b, 0x90100120 }, /* speaker */
455 { 0x0c, 0x400000f0 },
456 { 0x0d, 0x90a00110 }, /* mic */
457 { 0x0e, 0x400000f0 },
458 { 0x0f, 0x400000f0 },
459 { 0x10, 0x400000f0 },
460 { 0x12, 0x400000f0 },
461 { 0x15, 0x400000f0 },
462 {} /* terminator */
463};
464
b5bf0a92
BW		 465static const struct hda_pintbl mba6_pincfgs[] = {
466 { 0x10, 0x032120f0 }, /* HP */
467 { 0x11, 0x500000f0 },
468 { 0x12, 0x90100010 }, /* Speaker */
469 { 0x13, 0x500000f0 },
470 { 0x14, 0x500000f0 },
471 { 0x15, 0x770000f0 },
472 { 0x16, 0x770000f0 },
473 { 0x17, 0x430000f0 },
474 { 0x18, 0x43ab9030 }, /* Mic */
475 { 0x19, 0x770000f0 },
476 { 0x1a, 0x770000f0 },
477 { 0x1b, 0x770000f0 },
478 { 0x1c, 0x90a00090 },
479 { 0x1d, 0x500000f0 },
480 { 0x1e, 0x500000f0 },
481 { 0x1f, 0x500000f0 },
482 { 0x20, 0x500000f0 },
483 { 0x21, 0x430000f0 },
484 { 0x22, 0x430000f0 },
485 {} /* terminator */
486};
487
b35aabd7
TI		 488static void cs420x_fixup_gpio_13(struct hda_codec *codec,
489 const struct hda_fixup *fix, int action)
490{
491 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
492 struct cs_spec *spec = codec->spec;
493 spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */
494 spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
495 spec->gpio_mask = spec->gpio_dir =
496 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
497 }
498}
a6bae205 499
b35aabd7
TI		 500static void cs420x_fixup_gpio_23(struct hda_codec *codec,
501 const struct hda_fixup *fix, int action)
a6bae205 502{
b35aabd7
TI		 503 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
504 struct cs_spec *spec = codec->spec;
505 spec->gpio_eapd_hp = 4; /* GPIO2 = headphones */
506 spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
507 spec->gpio_mask = spec->gpio_dir =
508 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
509 }
a6bae205
TI		 510}
511
b35aabd7
TI		 512static const struct hda_fixup cs420x_fixups[] = {
513 [CS420X_MBP53] = {
514 .type = HDA_FIXUP_PINS,
515 .v.pins = mbp53_pincfgs,
516 .chained = true,
517 .chain_id = CS420X_APPLE,
518 },
519 [CS420X_MBP55] = {
520 .type = HDA_FIXUP_PINS,
521 .v.pins = mbp55_pincfgs,
522 .chained = true,
523 .chain_id = CS420X_GPIO_13,
524 },
525 [CS420X_IMAC27] = {
526 .type = HDA_FIXUP_PINS,
527 .v.pins = imac27_pincfgs,
528 .chained = true,
529 .chain_id = CS420X_GPIO_13,
530 },
531 [CS420X_GPIO_13] = {
532 .type = HDA_FIXUP_FUNC,
533 .v.func = cs420x_fixup_gpio_13,
534 },
535 [CS420X_GPIO_23] = {
536 .type = HDA_FIXUP_FUNC,
537 .v.func = cs420x_fixup_gpio_23,
538 },
ef596a57
TI		 539 [CS420X_MBP101] = {
540 .type = HDA_FIXUP_PINS,
541 .v.pins = mbp101_pincfgs,
542 .chained = true,
ef596a57
TI		 543 .chain_id = CS420X_GPIO_13,
544 },
ffe4d12b
TI		 545 [CS420X_MBP81] = {
546 .type = HDA_FIXUP_VERBS,
547 .v.verbs = (const struct hda_verb[]) {
548 /* internal mic ADC2: right only, single ended */
549 {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
550 {0x11, AC_VERB_SET_PROC_COEF, 0x102a},
551 {}
552 },
553 .chained = true,
554 .chain_id = CS420X_GPIO_13,
555 },
6ab982e8
TI		 556 [CS420X_MBA42] = {
557 .type = HDA_FIXUP_PINS,
558 .v.pins = mba42_pincfgs,
559 .chained = true,
560 .chain_id = CS420X_GPIO_13,
561 },
b35aabd7
TI		 562};
563
1077a024 564static struct cs_spec *cs_alloc_spec(struct hda_codec *codec, int vendor_nid)
e5f14248
TI		 565{
566 struct cs_spec *spec;
e5f14248
TI		 567
568 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
569 if (!spec)
1077a024 570 return NULL;
e5f14248 571 codec->spec = spec;
1077a024
TI		 572 spec->vendor_nid = vendor_nid;
573 snd_hda_gen_spec_init(&spec->gen);
574
575 return spec;
576}
577
578static int patch_cs420x(struct hda_codec *codec)
579{
580 struct cs_spec *spec;
581 int err;
e5f14248 582
1077a024
TI		 583 spec = cs_alloc_spec(codec, CS420X_VENDOR_NID);
584 if (!spec)
585 return -ENOMEM;
56487c27 586
225068ab 587 codec->patch_ops = cs_patch_ops;
6d3073e1 588 spec->gen.automute_hook = cs_automute;
bad994f5 589 codec->single_adc_amp = 1;
6d3073e1 590
b35aabd7
TI		 591 snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl,
592 cs420x_fixups);
593 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
e5f14248 594
ed208255 595 err = cs_parse_auto_config(codec);
21a4dc43
TI		 596 if (err < 0)
597 goto error;
598
b35aabd7
TI		 599 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
600
e5f14248
TI		 601 return 0;
602
603 error:
c5e0b6db 604 cs_free(codec);
e5f14248
TI		 605 return err;
606}
607
be8cf445
TI		 608/*
609 * CS4208 support:
b5bf0a92 610 * Its layout is no longer compatible with CS4206/CS4207
be8cf445
TI		 611 */
612enum {
885845d7 613 CS4208_MAC_AUTO,
b5bf0a92 614 CS4208_MBA6,
0c52db8c 615 CS4208_MBP11,
be8cf445
TI		 616 CS4208_GPIO0,
617};
618
619static const struct hda_model_fixup cs4208_models[] = {
620 { .id = CS4208_GPIO0, .name = "gpio0" },
b5bf0a92 621 { .id = CS4208_MBA6, .name = "mba6" },
0c52db8c 622 { .id = CS4208_MBP11, .name = "mbp11" },
be8cf445
TI		 623 {}
624};
625
626static const struct snd_pci_quirk cs4208_fixup_tbl[] = {
885845d7
TI		 627 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS4208_MAC_AUTO),
628 {} /* terminator */
629};
630
631/* codec SSID matching */
632static const struct snd_pci_quirk cs4208_mac_fixup_tbl[] = {
0c52db8c 633 SND_PCI_QUIRK(0x106b, 0x5e00, "MacBookPro 11,2", CS4208_MBP11),
b5bf0a92
BW		 634 SND_PCI_QUIRK(0x106b, 0x7100, "MacBookAir 6,1", CS4208_MBA6),
635 SND_PCI_QUIRK(0x106b, 0x7200, "MacBookAir 6,2", CS4208_MBA6),
e8ff581f 636 SND_PCI_QUIRK(0x106b, 0x7b00, "MacBookPro 12,1", CS4208_MBP11),
be8cf445
TI		 637 {} /* terminator */
638};
639
640static void cs4208_fixup_gpio0(struct hda_codec *codec,
641 const struct hda_fixup *fix, int action)
642{
643 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
644 struct cs_spec *spec = codec->spec;
645 spec->gpio_eapd_hp = 0;
646 spec->gpio_eapd_speaker = 1;
647 spec->gpio_mask = spec->gpio_dir =
648 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
649 }
650}
651
885845d7
TI		 652static const struct hda_fixup cs4208_fixups[];
653
654/* remap the fixup from codec SSID and apply it */
655static void cs4208_fixup_mac(struct hda_codec *codec,
656 const struct hda_fixup *fix, int action)
657{
658 if (action != HDA_FIXUP_ACT_PRE_PROBE)
659 return;
f5662e1c
DH		 660
661 codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
885845d7 662 snd_hda_pick_fixup(codec, NULL, cs4208_mac_fixup_tbl, cs4208_fixups);
f5662e1c 663 if (codec->fixup_id == HDA_FIXUP_ID_NOT_SET)
885845d7
TI		 664 codec->fixup_id = CS4208_GPIO0; /* default fixup */
665 snd_hda_apply_fixup(codec, action);
666}
667
0c52db8c
TI		 668static int cs4208_spdif_sw_put(struct snd_kcontrol *kcontrol,
669 struct snd_ctl_elem_value *ucontrol)
670{
671 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
672 struct cs_spec *spec = codec->spec;
673 hda_nid_t pin = spec->gen.autocfg.dig_out_pins[0];
674 int pinctl = ucontrol->value.integer.value[0] ? PIN_OUT : 0;
675
676 snd_hda_set_pin_ctl_cache(codec, pin, pinctl);
677 return spec->spdif_sw_put(kcontrol, ucontrol);
678}
679
680/* hook the SPDIF switch */
681static void cs4208_fixup_spdif_switch(struct hda_codec *codec,
682 const struct hda_fixup *fix, int action)
683{
684 if (action == HDA_FIXUP_ACT_BUILD) {
685 struct cs_spec *spec = codec->spec;
686 struct snd_kcontrol *kctl;
687
688 if (!spec->gen.autocfg.dig_out_pins[0])
689 return;
690 kctl = snd_hda_find_mixer_ctl(codec, "IEC958 Playback Switch");
691 if (!kctl)
692 return;
693 spec->spdif_sw_put = kctl->put;
694 kctl->put = cs4208_spdif_sw_put;
695 }
696}
697
be8cf445 698static const struct hda_fixup cs4208_fixups[] = {
b5bf0a92
BW		 699 [CS4208_MBA6] = {
700 .type = HDA_FIXUP_PINS,
701 .v.pins = mba6_pincfgs,
702 .chained = true,
703 .chain_id = CS4208_GPIO0,
704 },
0c52db8c
TI		 705 [CS4208_MBP11] = {
706 .type = HDA_FIXUP_FUNC,
707 .v.func = cs4208_fixup_spdif_switch,
708 .chained = true,
709 .chain_id = CS4208_GPIO0,
710 },
be8cf445
TI		 711 [CS4208_GPIO0] = {
712 .type = HDA_FIXUP_FUNC,
713 .v.func = cs4208_fixup_gpio0,
714 },
885845d7
TI		 715 [CS4208_MAC_AUTO] = {
716 .type = HDA_FIXUP_FUNC,
717 .v.func = cs4208_fixup_mac,
718 },
be8cf445
TI		 719};
720
b5bf0a92
BW		 721/* correct the 0dB offset of input pins */
722static void cs4208_fix_amp_caps(struct hda_codec *codec, hda_nid_t adc)
723{
724 unsigned int caps;
725
726 caps = query_amp_caps(codec, adc, HDA_INPUT);
727 caps &= ~(AC_AMPCAP_OFFSET);
728 caps |= 0x02;
729 snd_hda_override_amp_caps(codec, adc, HDA_INPUT, caps);
730}
731
be8cf445
TI		 732static int patch_cs4208(struct hda_codec *codec)
733{
734 struct cs_spec *spec;
735 int err;
736
b5bf0a92 737 spec = cs_alloc_spec(codec, CS4208_VENDOR_NID);
be8cf445
TI		 738 if (!spec)
739 return -ENOMEM;
740
225068ab 741 codec->patch_ops = cs_patch_ops;
be8cf445 742 spec->gen.automute_hook = cs_automute;
a1114a8c
TI		 743 /* exclude NID 0x10 (HP) from output volumes due to different steps */
744 spec->gen.out_vol_mask = 1ULL << 0x10;
be8cf445
TI		 745
746 snd_hda_pick_fixup(codec, cs4208_models, cs4208_fixup_tbl,
747 cs4208_fixups);
748 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
749
b5bf0a92
BW		 750 snd_hda_override_wcaps(codec, 0x18,
751 get_wcaps(codec, 0x18) | AC_WCAP_STEREO);
752 cs4208_fix_amp_caps(codec, 0x18);
753 cs4208_fix_amp_caps(codec, 0x1b);
754 cs4208_fix_amp_caps(codec, 0x1c);
755
be8cf445
TI		 756 err = cs_parse_auto_config(codec);
757 if (err < 0)
758 goto error;
759
be8cf445
TI		 760 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
761
762 return 0;
763
764 error:
765 cs_free(codec);
766 return err;
767}
768
56487c27
TH		 769/*
770 * Cirrus Logic CS4210
771 *
772 * 1 DAC => HP(sense) / Speakers,
773 * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
774 * 1 SPDIF OUT => SPDIF Trasmitter(sense)
775*/
776
777/* CS4210 board names */
b35aabd7
TI		 778static const struct hda_model_fixup cs421x_models[] = {
779 { .id = CS421X_CDB4210, .name = "cdb4210" },
4af16107 780 { .id = CS421X_STUMPY, .name = "stumpy" },
b35aabd7 781 {}
56487c27
TH		 782};
783
b35aabd7 784static const struct snd_pci_quirk cs421x_fixup_tbl[] = {
56487c27
TH		 785 /* Test Intel board + CDB2410 */
786 SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210),
787 {} /* terminator */
788};
789
790/* CS4210 board pinconfigs */
791/* Default CS4210 (CDB4210)*/
b35aabd7 792static const struct hda_pintbl cdb4210_pincfgs[] = {
56487c27
TH		 793 { 0x05, 0x0321401f },
794 { 0x06, 0x90170010 },
795 { 0x07, 0x03813031 },
796 { 0x08, 0xb7a70037 },
797 { 0x09, 0xb7a6003e },
798 { 0x0a, 0x034510f0 },
799 {} /* terminator */
800};
801
4af16107
DR		 802/* Stumpy ChromeBox */
803static const struct hda_pintbl stumpy_pincfgs[] = {
804 { 0x05, 0x022120f0 },
805 { 0x06, 0x901700f0 },
806 { 0x07, 0x02a120f0 },
807 { 0x08, 0x77a70037 },
808 { 0x09, 0x77a6003e },
809 { 0x0a, 0x434510f0 },
810 {} /* terminator */
811};
812
b35aabd7
TI		 813/* Setup GPIO/SENSE for each board (if used) */
814static void cs421x_fixup_sense_b(struct hda_codec *codec,
815 const struct hda_fixup *fix, int action)
816{
817 struct cs_spec *spec = codec->spec;
818 if (action == HDA_FIXUP_ACT_PRE_PROBE)
819 spec->sense_b = 1;
820}
821
822static const struct hda_fixup cs421x_fixups[] = {
823 [CS421X_CDB4210] = {
824 .type = HDA_FIXUP_PINS,
825 .v.pins = cdb4210_pincfgs,
826 .chained = true,
827 .chain_id = CS421X_SENSE_B,
828 },
829 [CS421X_SENSE_B] = {
830 .type = HDA_FIXUP_FUNC,
831 .v.func = cs421x_fixup_sense_b,
4af16107
DR		 832 },
833 [CS421X_STUMPY] = {
834 .type = HDA_FIXUP_PINS,
835 .v.pins = stumpy_pincfgs,
836 },
56487c27
TH		 837};
838
839static const struct hda_verb cs421x_coef_init_verbs[] = {
840 {0x0B, AC_VERB_SET_PROC_STATE, 1},
841 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG},
842 /*
843 Disable Coefficient Index Auto-Increment(DAI)=1,
844 PDREF=0
845 */
846 {0x0B, AC_VERB_SET_PROC_COEF, 0x0001 },
847
848 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG},
849 /* ADC SZCMode = Digital Soft Ramp */
850 {0x0B, AC_VERB_SET_PROC_COEF, 0x0002 },
851
852 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG},
853 {0x0B, AC_VERB_SET_PROC_COEF,
854 (0x0002 /* DAC SZCMode = Digital Soft Ramp */
855 | 0x0004 /* Mute DAC on FIFO error */
856 | 0x0008 /* Enable DAC High Pass Filter */
857 )},
858 {} /* terminator */
859};
860
861/* Errata: CS4210 rev A1 Silicon
862 *
863 * http://www.cirrus.com/en/pubs/errata/
864 *
865 * Description:
866 * 1. Performance degredation is present in the ADC.
867 * 2. Speaker output is not completely muted upon HP detect.
868 * 3. Noise is present when clipping occurs on the amplified
869 * speaker outputs.
870 *
871 * Workaround:
872 * The following verb sequence written to the registers during
873 * initialization will correct the issues listed above.
874 */
875
876static const struct hda_verb cs421x_coef_init_verbs_A1_silicon_fixes[] = {
877 {0x0B, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
878
879 {0x0B, AC_VERB_SET_COEF_INDEX, 0x0006},
880 {0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */
881
882 {0x0B, AC_VERB_SET_COEF_INDEX, 0x000A},
883 {0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */
884
885 {0x0B, AC_VERB_SET_COEF_INDEX, 0x0011},
886 {0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */
887
888 {0x0B, AC_VERB_SET_COEF_INDEX, 0x001A},
889 {0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */
890
891 {0x0B, AC_VERB_SET_COEF_INDEX, 0x001B},
892 {0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */
893
894 {} /* terminator */
895};
896
897/* Speaker Amp Gain is controlled by the vendor widget's coef 4 */
898static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0);
899
900static int cs421x_boost_vol_info(struct snd_kcontrol *kcontrol,
901 struct snd_ctl_elem_info *uinfo)
902{
903 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
904 uinfo->count = 1;
905 uinfo->value.integer.min = 0;
906 uinfo->value.integer.max = 3;
907 return 0;
908}
909
910static int cs421x_boost_vol_get(struct snd_kcontrol *kcontrol,
911 struct snd_ctl_elem_value *ucontrol)
912{
913 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
914
915 ucontrol->value.integer.value[0] =
916 cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003;
917 return 0;
918}
919
920static int cs421x_boost_vol_put(struct snd_kcontrol *kcontrol,
921 struct snd_ctl_elem_value *ucontrol)
922{
923 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
924
925 unsigned int vol = ucontrol->value.integer.value[0];
926 unsigned int coef =
927 cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL);
928 unsigned int original_coef = coef;
929
930 coef &= ~0x0003;
931 coef |= (vol & 0x0003);
932 if (original_coef == coef)
933 return 0;
934 else {
935 cs_vendor_coef_set(codec, CS421X_IDX_SPK_CTL, coef);
936 return 1;
937 }
938}
939
1077a024 940static const struct snd_kcontrol_new cs421x_speaker_boost_ctl = {
56487c27
TH		 941
942 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
943 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
944 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
945 .name = "Speaker Boost Playback Volume",
946 .info = cs421x_boost_vol_info,
947 .get = cs421x_boost_vol_get,
948 .put = cs421x_boost_vol_put,
949 .tlv = { .p = cs421x_speaker_boost_db_scale },
950};
951
5660ffd0 952static void cs4210_pinmux_init(struct hda_codec *codec)
56487c27
TH		 953{
954 struct cs_spec *spec = codec->spec;
955 unsigned int def_conf, coef;
956
957 /* GPIO, DMIC_SCL, DMIC_SDA and SENSE_B are multiplexed */
958 coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
959
960 if (spec->gpio_mask)
961 coef |= 0x0008; /* B1,B2 are GPIOs */
962 else
963 coef &= ~0x0008;
964
965 if (spec->sense_b)
966 coef |= 0x0010; /* B2 is SENSE_B, not inverted */
967 else
968 coef &= ~0x0010;
969
970 cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
971
972 if ((spec->gpio_mask || spec->sense_b) &&
973 is_active_pin(codec, CS421X_DMIC_PIN_NID)) {
974
975 /*
976 GPIO or SENSE_B forced - disconnect the DMIC pin.
977 */
978 def_conf = snd_hda_codec_get_pincfg(codec, CS421X_DMIC_PIN_NID);
979 def_conf &= ~AC_DEFCFG_PORT_CONN;
980 def_conf |= (AC_JACK_PORT_NONE << AC_DEFCFG_PORT_CONN_SHIFT);
981 snd_hda_codec_set_pincfg(codec, CS421X_DMIC_PIN_NID, def_conf);
982 }
983}
984
1077a024 985static void cs4210_spdif_automute(struct hda_codec *codec,
1a4f69d5 986 struct hda_jack_callback *tbl)
56487c27
TH		 987{
988 struct cs_spec *spec = codec->spec;
1077a024
TI		 989 bool spdif_present = false;
990 hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0];
991
992 /* detect on spdif is specific to CS4210 */
993 if (!spec->spdif_detect ||
994 spec->vendor_nid != CS4210_VENDOR_NID)
995 return;
996
997 spdif_present = snd_hda_jack_detect(codec, spdif_pin);
998 if (spdif_present == spec->spdif_present)
999 return;
1000
1001 spec->spdif_present = spdif_present;
1002 /* SPDIF TX on/off */
44008f08 1003 snd_hda_set_pin_ctl(codec, spdif_pin, spdif_present ? PIN_OUT : 0);
56487c27 1004
1077a024
TI		 1005 cs_automute(codec);
1006}
1007
1008static void parse_cs421x_digital(struct hda_codec *codec)
1009{
1010 struct cs_spec *spec = codec->spec;
1011 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
1012 int i;
56487c27
TH		 1013
1014 for (i = 0; i < cfg->dig_outs; i++) {
1015 hda_nid_t nid = cfg->dig_out_pins[i];
56487c27 1016 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) {
56487c27 1017 spec->spdif_detect = 1;
1077a024 1018 snd_hda_jack_detect_enable_callback(codec, nid,
1077a024 1019 cs4210_spdif_automute);
56487c27
TH		 1020 }
1021 }
1022}
1023
1024static int cs421x_init(struct hda_codec *codec)
1025{
1026 struct cs_spec *spec = codec->spec;
1027
5660ffd0
DH		 1028 if (spec->vendor_nid == CS4210_VENDOR_NID) {
1029 snd_hda_sequence_write(codec, cs421x_coef_init_verbs);
1030 snd_hda_sequence_write(codec, cs421x_coef_init_verbs_A1_silicon_fixes);
1031 cs4210_pinmux_init(codec);
1032 }
56487c27 1033
1077a024
TI		 1034 snd_hda_gen_init(codec);
1035
56487c27
TH		 1036 if (spec->gpio_mask) {
1037 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
1038 spec->gpio_mask);
1039 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
1040 spec->gpio_dir);
1041 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
1042 spec->gpio_data);
1043 }
1044
1077a024 1045 init_input_coef(codec);
56487c27 1046
1077a024 1047 cs4210_spdif_automute(codec, NULL);
56487c27
TH		 1048
1049 return 0;
1050}
1051
1077a024 1052static int cs421x_build_controls(struct hda_codec *codec)
56487c27 1053{
56487c27 1054 struct cs_spec *spec = codec->spec;
56487c27 1055 int err;
56487c27 1056
1077a024 1057 err = snd_hda_gen_build_controls(codec);
56487c27
TH		 1058 if (err < 0)
1059 return err;
56487c27 1060
1077a024
TI		 1061 if (spec->gen.autocfg.speaker_outs &&
1062 spec->vendor_nid == CS4210_VENDOR_NID) {
56487c27 1063 err = snd_hda_ctl_add(codec, 0,
1077a024 1064 snd_ctl_new1(&cs421x_speaker_boost_ctl, codec));
56487c27
TH		 1065 if (err < 0)
1066 return err;
1067 }
01a61e12 1068 return 0;
56487c27
TH		 1069}
1070
1077a024 1071static void fix_volume_caps(struct hda_codec *codec, hda_nid_t dac)
56487c27 1072{
1077a024 1073 unsigned int caps;
56487c27 1074
1077a024
TI		 1075 /* set the upper-limit for mixer amp to 0dB */
1076 caps = query_amp_caps(codec, dac, HDA_OUTPUT);
1077 caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT);
1078 caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f)
1079 << AC_AMPCAP_NUM_STEPS_SHIFT;
1080 snd_hda_override_amp_caps(codec, dac, HDA_OUTPUT, caps);
56487c27
TH		 1081}
1082
1083static int cs421x_parse_auto_config(struct hda_codec *codec)
1084{
1085 struct cs_spec *spec = codec->spec;
1077a024 1086 hda_nid_t dac = CS4210_DAC_NID;
56487c27
TH		 1087 int err;
1088
1077a024
TI		 1089 fix_volume_caps(codec, dac);
1090
1091 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
56487c27
TH		 1092 if (err < 0)
1093 return err;
1077a024
TI		 1094
1095 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
56487c27
TH		 1096 if (err < 0)
1097 return err;
1077a024
TI		 1098
1099 parse_cs421x_digital(codec);
56487c27
TH		 1100 return 0;
1101}
1102
1103#ifdef CONFIG_PM
1104/*
1105 Manage PDREF, when transitioning to D3hot
1106 (DAC,ADC) -> D3, PDREF=1, AFG->D3
1107*/
68cb2b55 1108static int cs421x_suspend(struct hda_codec *codec)
56487c27 1109{
5660ffd0 1110 struct cs_spec *spec = codec->spec;
56487c27
TH		 1111 unsigned int coef;
1112
1113 snd_hda_shutup_pins(codec);
1114
1115 snd_hda_codec_write(codec, CS4210_DAC_NID, 0,
1116 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
1117 snd_hda_codec_write(codec, CS4210_ADC_NID, 0,
1118 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
1119
5660ffd0
DH		 1120 if (spec->vendor_nid == CS4210_VENDOR_NID) {
1121 coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
1122 coef |= 0x0004; /* PDREF */
1123 cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
1124 }
56487c27
TH		 1125
1126 return 0;
1127}
1128#endif
1129
00e17f76 1130static const struct hda_codec_ops cs421x_patch_ops = {
56487c27 1131 .build_controls = cs421x_build_controls,
1077a024 1132 .build_pcms = snd_hda_gen_build_pcms,
56487c27
TH		 1133 .init = cs421x_init,
1134 .free = cs_free,
5c2e4e0a 1135 .unsol_event = snd_hda_jack_unsol_event,
56487c27
TH		 1136#ifdef CONFIG_PM
1137 .suspend = cs421x_suspend,
1138#endif
1139};
1140
5660ffd0 1141static int patch_cs4210(struct hda_codec *codec)
56487c27
TH		 1142{
1143 struct cs_spec *spec;
1144 int err;
1145
1077a024 1146 spec = cs_alloc_spec(codec, CS4210_VENDOR_NID);
56487c27
TH		 1147 if (!spec)
1148 return -ENOMEM;
56487c27 1149
225068ab 1150 codec->patch_ops = cs421x_patch_ops;
6d3073e1
TI		 1151 spec->gen.automute_hook = cs_automute;
1152
b35aabd7
TI		 1153 snd_hda_pick_fixup(codec, cs421x_models, cs421x_fixup_tbl,
1154 cs421x_fixups);
1155 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
56487c27
TH		 1156
1157 /*
1158 Update the GPIO/DMIC/SENSE_B pinmux before the configuration
1159 is auto-parsed. If GPIO or SENSE_B is forced, DMIC input
1160 is disabled.
1161 */
5660ffd0 1162 cs4210_pinmux_init(codec);
56487c27
TH		 1163
1164 err = cs421x_parse_auto_config(codec);
1165 if (err < 0)
1166 goto error;
1167
b35aabd7
TI		 1168 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
1169
5660ffd0
DH		 1170 return 0;
1171
1172 error:
c5e0b6db 1173 cs_free(codec);
5660ffd0
DH		 1174 return err;
1175}
1176
1177static int patch_cs4213(struct hda_codec *codec)
1178{
1179 struct cs_spec *spec;
1180 int err;
1181
1077a024 1182 spec = cs_alloc_spec(codec, CS4213_VENDOR_NID);
5660ffd0
DH		 1183 if (!spec)
1184 return -ENOMEM;
5660ffd0 1185
225068ab
TI		 1186 codec->patch_ops = cs421x_patch_ops;
1187
5660ffd0
DH		 1188 err = cs421x_parse_auto_config(codec);
1189 if (err < 0)
1190 goto error;
56487c27
TH		 1191
1192 return 0;
1193
1194 error:
c5e0b6db 1195 cs_free(codec);
56487c27
TH		 1196 return err;
1197}
1198
e5f14248
TI		 1199
1200/*
1201 * patch entries
1202 */
c42d4782 1203static const struct hda_codec_preset snd_hda_preset_cirrus[] = {
e5f14248
TI		 1204 { .id = 0x10134206, .name = "CS4206", .patch = patch_cs420x },
1205 { .id = 0x10134207, .name = "CS4207", .patch = patch_cs420x },
be8cf445 1206 { .id = 0x10134208, .name = "CS4208", .patch = patch_cs4208 },
5660ffd0
DH		 1207 { .id = 0x10134210, .name = "CS4210", .patch = patch_cs4210 },
1208 { .id = 0x10134213, .name = "CS4213", .patch = patch_cs4213 },
e5f14248
TI		 1209 {} /* terminator */
1210};
1211
1212MODULE_ALIAS("snd-hda-codec-id:10134206");
1213MODULE_ALIAS("snd-hda-codec-id:10134207");
be8cf445 1214MODULE_ALIAS("snd-hda-codec-id:10134208");
56487c27 1215MODULE_ALIAS("snd-hda-codec-id:10134210");
5660ffd0 1216MODULE_ALIAS("snd-hda-codec-id:10134213");
e5f14248
TI		 1217
1218MODULE_LICENSE("GPL");
1219MODULE_DESCRIPTION("Cirrus Logic HD-audio codec");
1220
d8a766a1 1221static struct hda_codec_driver cirrus_driver = {
e5f14248 1222 .preset = snd_hda_preset_cirrus,
e5f14248
TI		 1223};
1224
d8a766a1 1225module_hda_codec_driver(cirrus_driver);
Linux 6.x block layer and io_uring tree(s)