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Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
[linux-2.6-block.git] / sound / pci / hda / patch_cirrus.c
CommitLineData
e5f14248
TI		 1/*
2 * HD audio interface patch for Cirrus Logic CS420x chip
3 *
4 * Copyright (c) 2009 Takashi Iwai <tiwai@suse.de>
5 *
6 * This driver is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This driver is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/init.h>
e5f14248 22#include <linux/slab.h>
da155d5b 23#include <linux/module.h>
e5f14248 24#include <sound/core.h>
1077a024 25#include <sound/tlv.h>
e5f14248
TI		 26#include "hda_codec.h"
27#include "hda_local.h"
128bc4ba 28#include "hda_auto_parser.h"
1835a0f9 29#include "hda_jack.h"
1077a024 30#include "hda_generic.h"
e5f14248
TI		 31
32/*
33 */
34
35struct cs_spec {
1077a024 36 struct hda_gen_spec gen;
e5f14248 37
ed208255
TI		 38 unsigned int gpio_mask;
39 unsigned int gpio_dir;
40 unsigned int gpio_data;
6dfeb703
TI		 41 unsigned int gpio_eapd_hp; /* EAPD GPIO bit for headphones */
42 unsigned int gpio_eapd_speaker; /* EAPD GPIO bit for speakers */
ed208255 43
56487c27
TH		 44 /* CS421x */
45 unsigned int spdif_detect:1;
1077a024 46 unsigned int spdif_present:1;
56487c27
TH		 47 unsigned int sense_b:1;
48 hda_nid_t vendor_nid;
0c52db8c
TI		 49
50 /* for MBP SPDIF control */
51 int (*spdif_sw_put)(struct snd_kcontrol *kcontrol,
52 struct snd_ctl_elem_value *ucontrol);
e5f14248
TI		 53};
54
56487c27 55/* available models with CS420x */
a6bae205 56enum {
4e7d7c60 57 CS420X_MBP53,
a6bae205 58 CS420X_MBP55,
1a5ba2e9 59 CS420X_IMAC27,
b35aabd7
TI		 60 CS420X_GPIO_13,
61 CS420X_GPIO_23,
ef596a57 62 CS420X_MBP101,
ffe4d12b 63 CS420X_MBP81,
6ab982e8 64 CS420X_MBA42,
a6bae205 65 CS420X_AUTO,
03efce75
TI		 66 /* aliases */
67 CS420X_IMAC27_122 = CS420X_GPIO_23,
68 CS420X_APPLE = CS420X_GPIO_13,
a6bae205
TI		 69};
70
56487c27
TH		 71/* CS421x boards */
72enum {
73 CS421X_CDB4210,
b35aabd7 74 CS421X_SENSE_B,
4af16107 75 CS421X_STUMPY,
56487c27
TH		 76};
77
40c20fa0
TI		 78/* Vendor-specific processing widget */
79#define CS420X_VENDOR_NID 0x11
80#define CS_DIG_OUT1_PIN_NID 0x10
81#define CS_DIG_OUT2_PIN_NID 0x15
16337e02
DB		 82#define CS_DMIC1_PIN_NID 0x0e
83#define CS_DMIC2_PIN_NID 0x12
40c20fa0
TI		 84
85/* coef indices */
86#define IDX_SPDIF_STAT 0x0000
87#define IDX_SPDIF_CTL 0x0001
88#define IDX_ADC_CFG 0x0002
89/* SZC bitmask, 4 modes below:
90 * 0 = immediate,
91 * 1 = digital immediate, analog zero-cross
92 * 2 = digtail & analog soft-ramp
93 * 3 = digital soft-ramp, analog zero-cross
94 */
95#define CS_COEF_ADC_SZC_MASK (3 << 0)
96#define CS_COEF_ADC_MIC_SZC_MODE (3 << 0) /* SZC setup for mic */
97#define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */
98/* PGA mode: 0 = differential, 1 = signle-ended */
99#define CS_COEF_ADC_MIC_PGA_MODE (1 << 5) /* PGA setup for mic */
100#define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */
101#define IDX_DAC_CFG 0x0003
102/* SZC bitmask, 4 modes below:
103 * 0 = Immediate
104 * 1 = zero-cross
105 * 2 = soft-ramp
106 * 3 = soft-ramp on zero-cross
107 */
108#define CS_COEF_DAC_HP_SZC_MODE (3 << 0) /* nid 0x02 */
109#define CS_COEF_DAC_LO_SZC_MODE (3 << 2) /* nid 0x03 */
110#define CS_COEF_DAC_SPK_SZC_MODE (3 << 4) /* nid 0x04 */
111
112#define IDX_BEEP_CFG 0x0004
113/* 0x0008 - test reg key */
114/* 0x0009 - 0x0014 -> 12 test regs */
115/* 0x0015 - visibility reg */
116
b5bf0a92
BW		 117/* Cirrus Logic CS4208 */
118#define CS4208_VENDOR_NID 0x24
119
56487c27
TH		 120/*
121 * Cirrus Logic CS4210
122 *
123 * 1 DAC => HP(sense) / Speakers,
124 * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
125 * 1 SPDIF OUT => SPDIF Trasmitter(sense)
126*/
127#define CS4210_DAC_NID 0x02
128#define CS4210_ADC_NID 0x03
5660ffd0 129#define CS4210_VENDOR_NID 0x0B
56487c27
TH		 130#define CS421X_DMIC_PIN_NID 0x09 /* Port E */
131#define CS421X_SPDIF_PIN_NID 0x0A /* Port H */
132
1077a024
TI		 133#define CS421X_IDX_DEV_CFG 0x01
134#define CS421X_IDX_ADC_CFG 0x02
135#define CS421X_IDX_DAC_CFG 0x03
136#define CS421X_IDX_SPK_CTL 0x04
e5f14248 137
1077a024 138#define SPDIF_EVENT 0x04
6a92934d 139
1077a024
TI		 140/* Cirrus Logic CS4213 is like CS4210 but does not have SPDIF input/output */
141#define CS4213_VENDOR_NID 0x09
e5f14248 142
21a4dc43 143
1077a024 144static inline int cs_vendor_coef_get(struct hda_codec *codec, unsigned int idx)
e5f14248
TI		 145{
146 struct cs_spec *spec = codec->spec;
1077a024
TI		 147 snd_hda_codec_write(codec, spec->vendor_nid, 0,
148 AC_VERB_SET_COEF_INDEX, idx);
149 return snd_hda_codec_read(codec, spec->vendor_nid, 0,
150 AC_VERB_GET_PROC_COEF, 0);
e5f14248
TI		 151}
152
1077a024
TI		 153static inline void cs_vendor_coef_set(struct hda_codec *codec, unsigned int idx,
154 unsigned int coef)
e5f14248
TI		 155{
156 struct cs_spec *spec = codec->spec;
1077a024
TI		 157 snd_hda_codec_write(codec, spec->vendor_nid, 0,
158 AC_VERB_SET_COEF_INDEX, idx);
159 snd_hda_codec_write(codec, spec->vendor_nid, 0,
160 AC_VERB_SET_PROC_COEF, coef);
e5f14248
TI		 161}
162
21a4dc43
TI		 163/*
164 * auto-mute and auto-mic switching
56487c27
TH		 165 * CS421x auto-output redirecting
166 * HP/SPK/SPDIF
21a4dc43
TI		 167 */
168
1077a024 169static void cs_automute(struct hda_codec *codec)
e5f14248
TI		 170{
171 struct cs_spec *spec = codec->spec;
e5f14248 172
1077a024
TI		 173 /* mute HPs if spdif jack (SENSE_B) is present */
174 spec->gen.master_mute = !!(spec->spdif_present && spec->sense_b);
56487c27 175
1077a024 176 snd_hda_gen_update_outputs(codec);
78e2a928 177
be8cf445 178 if (spec->gpio_eapd_hp || spec->gpio_eapd_speaker) {
039eb753 179 spec->gpio_data = spec->gen.hp_jack_present ?
6dfeb703 180 spec->gpio_eapd_hp : spec->gpio_eapd_speaker;
3a385167 181 snd_hda_codec_write(codec, 0x01, 0,
039eb753 182 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
3a385167 183 }
e5f14248
TI		 184}
185
1077a024 186static bool is_active_pin(struct hda_codec *codec, hda_nid_t nid)
e5f14248 187{
1077a024
TI		 188 unsigned int val;
189 val = snd_hda_codec_get_pincfg(codec, nid);
190 return (get_defcfg_connect(val) != AC_JACK_PORT_NONE);
e5f14248
TI		 191}
192
1077a024 193static void init_input_coef(struct hda_codec *codec)
e5f14248
TI		 194{
195 struct cs_spec *spec = codec->spec;
40c20fa0 196 unsigned int coef;
e5f14248 197
5660ffd0
DH		 198 /* CS420x has multiple ADC, CS421x has single ADC */
199 if (spec->vendor_nid == CS420X_VENDOR_NID) {
16337e02 200 coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG);
56487c27 201 if (is_active_pin(codec, CS_DMIC2_PIN_NID))
16337e02 202 coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */
56487c27 203 if (is_active_pin(codec, CS_DMIC1_PIN_NID))
16337e02 204 coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off
56487c27
TH		 205 * No effect if SPDIF_OUT2 is
206 * selected in IDX_SPDIF_CTL.
207 */
16337e02
DB		 208
209 cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef);
56487c27 210 }
40c20fa0
TI		 211}
212
c42d4782 213static const struct hda_verb cs_coef_init_verbs[] = {
40c20fa0
TI		 214 {0x11, AC_VERB_SET_PROC_STATE, 1},
215 {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG},
216 {0x11, AC_VERB_SET_PROC_COEF,
217 (0x002a /* DAC1/2/3 SZCMode Soft Ramp */
218 | 0x0040 /* Mute DACs on FIFO error */
219 | 0x1000 /* Enable DACs High Pass Filter */
220 | 0x0400 /* Disable Coefficient Auto increment */
221 )},
829e87e0
TI		 222 /* ADC1/2 - Digital and Analog Soft Ramp */
223 {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
224 {0x11, AC_VERB_SET_PROC_COEF, 0x000a},
40c20fa0 225 /* Beep */
5a83b4b5 226 {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG},
40c20fa0
TI		 227 {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */
228
229 {} /* terminator */
230};
231
b5bf0a92
BW		 232static const struct hda_verb cs4208_coef_init_verbs[] = {
233 {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
234 {0x24, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
235 {0x24, AC_VERB_SET_COEF_INDEX, 0x0033},
236 {0x24, AC_VERB_SET_PROC_COEF, 0x0001}, /* A1 ICS */
237 {0x24, AC_VERB_SET_COEF_INDEX, 0x0034},
238 {0x24, AC_VERB_SET_PROC_COEF, 0x1C01}, /* A1 Enable, A Thresh = 300mV */
239 {} /* terminator */
240};
241
a769cbcf
BA		 242/* Errata: CS4207 rev C0/C1/C2 Silicon
243 *
244 * http://www.cirrus.com/en/pubs/errata/ER880C3.pdf
245 *
246 * 6. At high temperature (TA > +85°C), the digital supply current (IVD)
247 * may be excessive (up to an additional 200 μA), which is most easily
248 * observed while the part is being held in reset (RESET# active low).
249 *
250 * Root Cause: At initial powerup of the device, the logic that drives
251 * the clock and write enable to the S/PDIF SRC RAMs is not properly
252 * initialized.
253 * Certain random patterns will cause a steady leakage current in those
254 * RAM cells. The issue will resolve once the SRCs are used (turned on).
255 *
256 * Workaround: The following verb sequence briefly turns on the S/PDIF SRC
257 * blocks, which will alleviate the issue.
258 */
259
c42d4782 260static const struct hda_verb cs_errata_init_verbs[] = {
a769cbcf
BA		 261 {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
262 {0x11, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
263
264 {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
265 {0x11, AC_VERB_SET_PROC_COEF, 0x9999},
266 {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
267 {0x11, AC_VERB_SET_PROC_COEF, 0xa412},
268 {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
269 {0x11, AC_VERB_SET_PROC_COEF, 0x0009},
270
271 {0x07, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Rx: D0 */
272 {0x08, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Tx: D0 */
273
274 {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
275 {0x11, AC_VERB_SET_PROC_COEF, 0x2412},
276 {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
277 {0x11, AC_VERB_SET_PROC_COEF, 0x0000},
278 {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
279 {0x11, AC_VERB_SET_PROC_COEF, 0x0008},
280 {0x11, AC_VERB_SET_PROC_STATE, 0x00},
281
38c07641 282#if 0 /* Don't to set to D3 as we are in power-up sequence */
a769cbcf
BA		 283 {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */
284 {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */
285 /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */
38c07641 286#endif
a769cbcf
BA		 287
288 {} /* terminator */
289};
290
40c20fa0 291/* SPDIF setup */
1077a024 292static void init_digital_coef(struct hda_codec *codec)
40c20fa0
TI		 293{
294 unsigned int coef;
295
296 coef = 0x0002; /* SRC_MUTE soft-mute on SPDIF (if no lock) */
297 coef |= 0x0008; /* Replace with mute on error */
298 if (is_active_pin(codec, CS_DIG_OUT2_PIN_NID))
299 coef |= 0x4000; /* RX to TX1 or TX2 Loopthru / SPDIF2
300 * SPDIF_OUT2 is shared with GPIO1 and
301 * DMIC_SDA2.
302 */
303 cs_vendor_coef_set(codec, IDX_SPDIF_CTL, coef);
e5f14248
TI		 304}
305
306static int cs_init(struct hda_codec *codec)
307{
308 struct cs_spec *spec = codec->spec;
309
be8cf445
TI		 310 if (spec->vendor_nid == CS420X_VENDOR_NID) {
311 /* init_verb sequence for C0/C1/C2 errata*/
312 snd_hda_sequence_write(codec, cs_errata_init_verbs);
313 snd_hda_sequence_write(codec, cs_coef_init_verbs);
b5bf0a92
BW		 314 } else if (spec->vendor_nid == CS4208_VENDOR_NID) {
315 snd_hda_sequence_write(codec, cs4208_coef_init_verbs);
be8cf445 316 }
ed208255 317
1077a024 318 snd_hda_gen_init(codec);
98415eac 319
ed208255
TI		 320 if (spec->gpio_mask) {
321 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
322 spec->gpio_mask);
323 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
324 spec->gpio_dir);
325 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
326 spec->gpio_data);
327 }
328
be8cf445
TI		 329 if (spec->vendor_nid == CS420X_VENDOR_NID) {
330 init_input_coef(codec);
331 init_digital_coef(codec);
332 }
01a61e12
TI		 333
334 return 0;
e5f14248
TI		 335}
336
0c52db8c
TI		 337static int cs_build_controls(struct hda_codec *codec)
338{
339 int err;
340
341 err = snd_hda_gen_build_controls(codec);
342 if (err < 0)
343 return err;
344 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_BUILD);
345 return 0;
346}
347
1077a024 348#define cs_free snd_hda_gen_free
e5f14248 349
c42d4782 350static const struct hda_codec_ops cs_patch_ops = {
0c52db8c 351 .build_controls = cs_build_controls,
1077a024 352 .build_pcms = snd_hda_gen_build_pcms,
e5f14248
TI		 353 .init = cs_init,
354 .free = cs_free,
5c2e4e0a 355 .unsol_event = snd_hda_jack_unsol_event,
e5f14248
TI		 356};
357
358static int cs_parse_auto_config(struct hda_codec *codec)
359{
360 struct cs_spec *spec = codec->spec;
361 int err;
362
1077a024 363 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
ed208255
TI		 364 if (err < 0)
365 return err;
366
1077a024 367 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
e5f14248
TI		 368 if (err < 0)
369 return err;
1077a024 370
e5f14248
TI		 371 return 0;
372}
373
b35aabd7
TI		 374static const struct hda_model_fixup cs420x_models[] = {
375 { .id = CS420X_MBP53, .name = "mbp53" },
376 { .id = CS420X_MBP55, .name = "mbp55" },
377 { .id = CS420X_IMAC27, .name = "imac27" },
378 { .id = CS420X_IMAC27_122, .name = "imac27_122" },
379 { .id = CS420X_APPLE, .name = "apple" },
ef596a57 380 { .id = CS420X_MBP101, .name = "mbp101" },
ffe4d12b 381 { .id = CS420X_MBP81, .name = "mbp81" },
6ab982e8 382 { .id = CS420X_MBA42, .name = "mba42" },
b35aabd7 383 {}
a6bae205
TI		 384};
385
b35aabd7 386static const struct snd_pci_quirk cs420x_fixup_tbl[] = {
4e7d7c60 387 SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53),
87232dd4 388 SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55),
a6bae205 389 SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55),
f46119b7 390 SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55),
6dfeb703
TI		 391 /* this conflicts with too many other models */
392 /*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/
6dfeb703 393
b35aabd7 394 /* codec SSID */
ffe4d12b 395 SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81),
7e5bea19 396 SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122),
ef596a57 397 SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101),
6ab982e8 398 SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42),
6dfeb703 399 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
a6bae205
TI		 400 {} /* terminator */
401};
402
b35aabd7 403static const struct hda_pintbl mbp53_pincfgs[] = {
4e7d7c60
VW		 404 { 0x09, 0x012b4050 },
405 { 0x0a, 0x90100141 },
406 { 0x0b, 0x90100140 },
407 { 0x0c, 0x018b3020 },
408 { 0x0d, 0x90a00110 },
409 { 0x0e, 0x400000f0 },
410 { 0x0f, 0x01cbe030 },
411 { 0x10, 0x014be060 },
412 { 0x12, 0x400000f0 },
413 { 0x15, 0x400000f0 },
414 {} /* terminator */
415};
416
b35aabd7 417static const struct hda_pintbl mbp55_pincfgs[] = {
a6bae205
TI		 418 { 0x09, 0x012b4030 },
419 { 0x0a, 0x90100121 },
420 { 0x0b, 0x90100120 },
421 { 0x0c, 0x400000f0 },
422 { 0x0d, 0x90a00110 },
423 { 0x0e, 0x400000f0 },
424 { 0x0f, 0x400000f0 },
425 { 0x10, 0x014be040 },
426 { 0x12, 0x400000f0 },
427 { 0x15, 0x400000f0 },
428 {} /* terminator */
429};
430
b35aabd7 431static const struct hda_pintbl imac27_pincfgs[] = {
1a5ba2e9
RAE		 432 { 0x09, 0x012b4050 },
433 { 0x0a, 0x90100140 },
434 { 0x0b, 0x90100142 },
435 { 0x0c, 0x018b3020 },
436 { 0x0d, 0x90a00110 },
437 { 0x0e, 0x400000f0 },
438 { 0x0f, 0x01cbe030 },
439 { 0x10, 0x014be060 },
440 { 0x12, 0x01ab9070 },
441 { 0x15, 0x400000f0 },
442 {} /* terminator */
443};
444
ef596a57
TI		 445static const struct hda_pintbl mbp101_pincfgs[] = {
446 { 0x0d, 0x40ab90f0 },
447 { 0x0e, 0x90a600f0 },
448 { 0x12, 0x50a600f0 },
449 {} /* terminator */
450};
451
6ab982e8
TI		 452static const struct hda_pintbl mba42_pincfgs[] = {
453 { 0x09, 0x012b4030 }, /* HP */
454 { 0x0a, 0x400000f0 },
455 { 0x0b, 0x90100120 }, /* speaker */
456 { 0x0c, 0x400000f0 },
457 { 0x0d, 0x90a00110 }, /* mic */
458 { 0x0e, 0x400000f0 },
459 { 0x0f, 0x400000f0 },
460 { 0x10, 0x400000f0 },
461 { 0x12, 0x400000f0 },
462 { 0x15, 0x400000f0 },
463 {} /* terminator */
464};
465
b5bf0a92
BW		 466static const struct hda_pintbl mba6_pincfgs[] = {
467 { 0x10, 0x032120f0 }, /* HP */
468 { 0x11, 0x500000f0 },
469 { 0x12, 0x90100010 }, /* Speaker */
470 { 0x13, 0x500000f0 },
471 { 0x14, 0x500000f0 },
472 { 0x15, 0x770000f0 },
473 { 0x16, 0x770000f0 },
474 { 0x17, 0x430000f0 },
475 { 0x18, 0x43ab9030 }, /* Mic */
476 { 0x19, 0x770000f0 },
477 { 0x1a, 0x770000f0 },
478 { 0x1b, 0x770000f0 },
479 { 0x1c, 0x90a00090 },
480 { 0x1d, 0x500000f0 },
481 { 0x1e, 0x500000f0 },
482 { 0x1f, 0x500000f0 },
483 { 0x20, 0x500000f0 },
484 { 0x21, 0x430000f0 },
485 { 0x22, 0x430000f0 },
486 {} /* terminator */
487};
488
b35aabd7
TI		 489static void cs420x_fixup_gpio_13(struct hda_codec *codec,
490 const struct hda_fixup *fix, int action)
491{
492 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
493 struct cs_spec *spec = codec->spec;
494 spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */
495 spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
496 spec->gpio_mask = spec->gpio_dir =
497 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
498 }
499}
a6bae205 500
b35aabd7
TI		 501static void cs420x_fixup_gpio_23(struct hda_codec *codec,
502 const struct hda_fixup *fix, int action)
a6bae205 503{
b35aabd7
TI		 504 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
505 struct cs_spec *spec = codec->spec;
506 spec->gpio_eapd_hp = 4; /* GPIO2 = headphones */
507 spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
508 spec->gpio_mask = spec->gpio_dir =
509 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
510 }
a6bae205
TI		 511}
512
b35aabd7
TI		 513static const struct hda_fixup cs420x_fixups[] = {
514 [CS420X_MBP53] = {
515 .type = HDA_FIXUP_PINS,
516 .v.pins = mbp53_pincfgs,
517 .chained = true,
518 .chain_id = CS420X_APPLE,
519 },
520 [CS420X_MBP55] = {
521 .type = HDA_FIXUP_PINS,
522 .v.pins = mbp55_pincfgs,
523 .chained = true,
524 .chain_id = CS420X_GPIO_13,
525 },
526 [CS420X_IMAC27] = {
527 .type = HDA_FIXUP_PINS,
528 .v.pins = imac27_pincfgs,
529 .chained = true,
530 .chain_id = CS420X_GPIO_13,
531 },
532 [CS420X_GPIO_13] = {
533 .type = HDA_FIXUP_FUNC,
534 .v.func = cs420x_fixup_gpio_13,
535 },
536 [CS420X_GPIO_23] = {
537 .type = HDA_FIXUP_FUNC,
538 .v.func = cs420x_fixup_gpio_23,
539 },
ef596a57
TI		 540 [CS420X_MBP101] = {
541 .type = HDA_FIXUP_PINS,
542 .v.pins = mbp101_pincfgs,
543 .chained = true,
ef596a57
TI		 544 .chain_id = CS420X_GPIO_13,
545 },
ffe4d12b
TI		 546 [CS420X_MBP81] = {
547 .type = HDA_FIXUP_VERBS,
548 .v.verbs = (const struct hda_verb[]) {
549 /* internal mic ADC2: right only, single ended */
550 {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
551 {0x11, AC_VERB_SET_PROC_COEF, 0x102a},
552 {}
553 },
554 .chained = true,
555 .chain_id = CS420X_GPIO_13,
556 },
6ab982e8
TI		 557 [CS420X_MBA42] = {
558 .type = HDA_FIXUP_PINS,
559 .v.pins = mba42_pincfgs,
560 .chained = true,
561 .chain_id = CS420X_GPIO_13,
562 },
b35aabd7
TI		 563};
564
1077a024 565static struct cs_spec *cs_alloc_spec(struct hda_codec *codec, int vendor_nid)
e5f14248
TI		 566{
567 struct cs_spec *spec;
e5f14248
TI		 568
569 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
570 if (!spec)
1077a024 571 return NULL;
e5f14248 572 codec->spec = spec;
1077a024
TI		 573 spec->vendor_nid = vendor_nid;
574 snd_hda_gen_spec_init(&spec->gen);
575
576 return spec;
577}
578
579static int patch_cs420x(struct hda_codec *codec)
580{
581 struct cs_spec *spec;
582 int err;
e5f14248 583
1077a024
TI		 584 spec = cs_alloc_spec(codec, CS420X_VENDOR_NID);
585 if (!spec)
586 return -ENOMEM;
56487c27 587
6d3073e1
TI		 588 spec->gen.automute_hook = cs_automute;
589
b35aabd7
TI		 590 snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl,
591 cs420x_fixups);
592 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
e5f14248 593
ed208255 594 err = cs_parse_auto_config(codec);
21a4dc43
TI		 595 if (err < 0)
596 goto error;
597
e5f14248
TI		 598 codec->patch_ops = cs_patch_ops;
599
b35aabd7
TI		 600 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
601
e5f14248
TI		 602 return 0;
603
604 error:
c5e0b6db 605 cs_free(codec);
e5f14248
TI		 606 return err;
607}
608
be8cf445
TI		 609/*
610 * CS4208 support:
b5bf0a92 611 * Its layout is no longer compatible with CS4206/CS4207
be8cf445
TI		 612 */
613enum {
885845d7 614 CS4208_MAC_AUTO,
b5bf0a92 615 CS4208_MBA6,
0c52db8c 616 CS4208_MBP11,
be8cf445
TI		 617 CS4208_GPIO0,
618};
619
620static const struct hda_model_fixup cs4208_models[] = {
621 { .id = CS4208_GPIO0, .name = "gpio0" },
b5bf0a92 622 { .id = CS4208_MBA6, .name = "mba6" },
0c52db8c 623 { .id = CS4208_MBP11, .name = "mbp11" },
be8cf445
TI		 624 {}
625};
626
627static const struct snd_pci_quirk cs4208_fixup_tbl[] = {
885845d7
TI		 628 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS4208_MAC_AUTO),
629 {} /* terminator */
630};
631
632/* codec SSID matching */
633static const struct snd_pci_quirk cs4208_mac_fixup_tbl[] = {
0c52db8c 634 SND_PCI_QUIRK(0x106b, 0x5e00, "MacBookPro 11,2", CS4208_MBP11),
b5bf0a92
BW		 635 SND_PCI_QUIRK(0x106b, 0x7100, "MacBookAir 6,1", CS4208_MBA6),
636 SND_PCI_QUIRK(0x106b, 0x7200, "MacBookAir 6,2", CS4208_MBA6),
be8cf445
TI		 637 {} /* terminator */
638};
639
640static void cs4208_fixup_gpio0(struct hda_codec *codec,
641 const struct hda_fixup *fix, int action)
642{
643 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
644 struct cs_spec *spec = codec->spec;
645 spec->gpio_eapd_hp = 0;
646 spec->gpio_eapd_speaker = 1;
647 spec->gpio_mask = spec->gpio_dir =
648 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
649 }
650}
651
885845d7
TI		 652static const struct hda_fixup cs4208_fixups[];
653
654/* remap the fixup from codec SSID and apply it */
655static void cs4208_fixup_mac(struct hda_codec *codec,
656 const struct hda_fixup *fix, int action)
657{
658 if (action != HDA_FIXUP_ACT_PRE_PROBE)
659 return;
660 snd_hda_pick_fixup(codec, NULL, cs4208_mac_fixup_tbl, cs4208_fixups);
661 if (codec->fixup_id < 0 || codec->fixup_id == CS4208_MAC_AUTO)
662 codec->fixup_id = CS4208_GPIO0; /* default fixup */
663 snd_hda_apply_fixup(codec, action);
664}
665
0c52db8c
TI		 666static int cs4208_spdif_sw_put(struct snd_kcontrol *kcontrol,
667 struct snd_ctl_elem_value *ucontrol)
668{
669 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
670 struct cs_spec *spec = codec->spec;
671 hda_nid_t pin = spec->gen.autocfg.dig_out_pins[0];
672 int pinctl = ucontrol->value.integer.value[0] ? PIN_OUT : 0;
673
674 snd_hda_set_pin_ctl_cache(codec, pin, pinctl);
675 return spec->spdif_sw_put(kcontrol, ucontrol);
676}
677
678/* hook the SPDIF switch */
679static void cs4208_fixup_spdif_switch(struct hda_codec *codec,
680 const struct hda_fixup *fix, int action)
681{
682 if (action == HDA_FIXUP_ACT_BUILD) {
683 struct cs_spec *spec = codec->spec;
684 struct snd_kcontrol *kctl;
685
686 if (!spec->gen.autocfg.dig_out_pins[0])
687 return;
688 kctl = snd_hda_find_mixer_ctl(codec, "IEC958 Playback Switch");
689 if (!kctl)
690 return;
691 spec->spdif_sw_put = kctl->put;
692 kctl->put = cs4208_spdif_sw_put;
693 }
694}
695
be8cf445 696static const struct hda_fixup cs4208_fixups[] = {
b5bf0a92
BW		 697 [CS4208_MBA6] = {
698 .type = HDA_FIXUP_PINS,
699 .v.pins = mba6_pincfgs,
700 .chained = true,
701 .chain_id = CS4208_GPIO0,
702 },
0c52db8c
TI		 703 [CS4208_MBP11] = {
704 .type = HDA_FIXUP_FUNC,
705 .v.func = cs4208_fixup_spdif_switch,
706 .chained = true,
707 .chain_id = CS4208_GPIO0,
708 },
be8cf445
TI		 709 [CS4208_GPIO0] = {
710 .type = HDA_FIXUP_FUNC,
711 .v.func = cs4208_fixup_gpio0,
712 },
885845d7
TI		 713 [CS4208_MAC_AUTO] = {
714 .type = HDA_FIXUP_FUNC,
715 .v.func = cs4208_fixup_mac,
716 },
be8cf445
TI		 717};
718
b5bf0a92
BW		 719/* correct the 0dB offset of input pins */
720static void cs4208_fix_amp_caps(struct hda_codec *codec, hda_nid_t adc)
721{
722 unsigned int caps;
723
724 caps = query_amp_caps(codec, adc, HDA_INPUT);
725 caps &= ~(AC_AMPCAP_OFFSET);
726 caps |= 0x02;
727 snd_hda_override_amp_caps(codec, adc, HDA_INPUT, caps);
728}
729
be8cf445
TI		 730static int patch_cs4208(struct hda_codec *codec)
731{
732 struct cs_spec *spec;
733 int err;
734
b5bf0a92 735 spec = cs_alloc_spec(codec, CS4208_VENDOR_NID);
be8cf445
TI		 736 if (!spec)
737 return -ENOMEM;
738
739 spec->gen.automute_hook = cs_automute;
a1114a8c
TI		 740 /* exclude NID 0x10 (HP) from output volumes due to different steps */
741 spec->gen.out_vol_mask = 1ULL << 0x10;
be8cf445
TI		 742
743 snd_hda_pick_fixup(codec, cs4208_models, cs4208_fixup_tbl,
744 cs4208_fixups);
745 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
746
b5bf0a92
BW		 747 snd_hda_override_wcaps(codec, 0x18,
748 get_wcaps(codec, 0x18) | AC_WCAP_STEREO);
749 cs4208_fix_amp_caps(codec, 0x18);
750 cs4208_fix_amp_caps(codec, 0x1b);
751 cs4208_fix_amp_caps(codec, 0x1c);
752
be8cf445
TI		 753 err = cs_parse_auto_config(codec);
754 if (err < 0)
755 goto error;
756
757 codec->patch_ops = cs_patch_ops;
758
759 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
760
761 return 0;
762
763 error:
764 cs_free(codec);
765 return err;
766}
767
56487c27
TH		 768/*
769 * Cirrus Logic CS4210
770 *
771 * 1 DAC => HP(sense) / Speakers,
772 * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
773 * 1 SPDIF OUT => SPDIF Trasmitter(sense)
774*/
775
776/* CS4210 board names */
b35aabd7
TI		 777static const struct hda_model_fixup cs421x_models[] = {
778 { .id = CS421X_CDB4210, .name = "cdb4210" },
4af16107 779 { .id = CS421X_STUMPY, .name = "stumpy" },
b35aabd7 780 {}
56487c27
TH		 781};
782
b35aabd7 783static const struct snd_pci_quirk cs421x_fixup_tbl[] = {
56487c27
TH		 784 /* Test Intel board + CDB2410 */
785 SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210),
786 {} /* terminator */
787};
788
789/* CS4210 board pinconfigs */
790/* Default CS4210 (CDB4210)*/
b35aabd7 791static const struct hda_pintbl cdb4210_pincfgs[] = {
56487c27
TH		 792 { 0x05, 0x0321401f },
793 { 0x06, 0x90170010 },
794 { 0x07, 0x03813031 },
795 { 0x08, 0xb7a70037 },
796 { 0x09, 0xb7a6003e },
797 { 0x0a, 0x034510f0 },
798 {} /* terminator */
799};
800
4af16107
DR		 801/* Stumpy ChromeBox */
802static const struct hda_pintbl stumpy_pincfgs[] = {
803 { 0x05, 0x022120f0 },
804 { 0x06, 0x901700f0 },
805 { 0x07, 0x02a120f0 },
806 { 0x08, 0x77a70037 },
807 { 0x09, 0x77a6003e },
808 { 0x0a, 0x434510f0 },
809 {} /* terminator */
810};
811
b35aabd7
TI		 812/* Setup GPIO/SENSE for each board (if used) */
813static void cs421x_fixup_sense_b(struct hda_codec *codec,
814 const struct hda_fixup *fix, int action)
815{
816 struct cs_spec *spec = codec->spec;
817 if (action == HDA_FIXUP_ACT_PRE_PROBE)
818 spec->sense_b = 1;
819}
820
821static const struct hda_fixup cs421x_fixups[] = {
822 [CS421X_CDB4210] = {
823 .type = HDA_FIXUP_PINS,
824 .v.pins = cdb4210_pincfgs,
825 .chained = true,
826 .chain_id = CS421X_SENSE_B,
827 },
828 [CS421X_SENSE_B] = {
829 .type = HDA_FIXUP_FUNC,
830 .v.func = cs421x_fixup_sense_b,
4af16107
DR		 831 },
832 [CS421X_STUMPY] = {
833 .type = HDA_FIXUP_PINS,
834 .v.pins = stumpy_pincfgs,
835 },
56487c27
TH		 836};
837
838static const struct hda_verb cs421x_coef_init_verbs[] = {
839 {0x0B, AC_VERB_SET_PROC_STATE, 1},
840 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG},
841 /*
842 Disable Coefficient Index Auto-Increment(DAI)=1,
843 PDREF=0
844 */
845 {0x0B, AC_VERB_SET_PROC_COEF, 0x0001 },
846
847 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG},
848 /* ADC SZCMode = Digital Soft Ramp */
849 {0x0B, AC_VERB_SET_PROC_COEF, 0x0002 },
850
851 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG},
852 {0x0B, AC_VERB_SET_PROC_COEF,
853 (0x0002 /* DAC SZCMode = Digital Soft Ramp */
854 | 0x0004 /* Mute DAC on FIFO error */
855 | 0x0008 /* Enable DAC High Pass Filter */
856 )},
857 {} /* terminator */
858};
859
860/* Errata: CS4210 rev A1 Silicon
861 *
862 * http://www.cirrus.com/en/pubs/errata/
863 *
864 * Description:
865 * 1. Performance degredation is present in the ADC.
866 * 2. Speaker output is not completely muted upon HP detect.
867 * 3. Noise is present when clipping occurs on the amplified
868 * speaker outputs.
869 *
870 * Workaround:
871 * The following verb sequence written to the registers during
872 * initialization will correct the issues listed above.
873 */
874
875static const struct hda_verb cs421x_coef_init_verbs_A1_silicon_fixes[] = {
876 {0x0B, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
877
878 {0x0B, AC_VERB_SET_COEF_INDEX, 0x0006},
879 {0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */
880
881 {0x0B, AC_VERB_SET_COEF_INDEX, 0x000A},
882 {0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */
883
884 {0x0B, AC_VERB_SET_COEF_INDEX, 0x0011},
885 {0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */
886
887 {0x0B, AC_VERB_SET_COEF_INDEX, 0x001A},
888 {0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */
889
890 {0x0B, AC_VERB_SET_COEF_INDEX, 0x001B},
891 {0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */
892
893 {} /* terminator */
894};
895
896/* Speaker Amp Gain is controlled by the vendor widget's coef 4 */
897static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0);
898
899static int cs421x_boost_vol_info(struct snd_kcontrol *kcontrol,
900 struct snd_ctl_elem_info *uinfo)
901{
902 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
903 uinfo->count = 1;
904 uinfo->value.integer.min = 0;
905 uinfo->value.integer.max = 3;
906 return 0;
907}
908
909static int cs421x_boost_vol_get(struct snd_kcontrol *kcontrol,
910 struct snd_ctl_elem_value *ucontrol)
911{
912 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
913
914 ucontrol->value.integer.value[0] =
915 cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003;
916 return 0;
917}
918
919static int cs421x_boost_vol_put(struct snd_kcontrol *kcontrol,
920 struct snd_ctl_elem_value *ucontrol)
921{
922 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
923
924 unsigned int vol = ucontrol->value.integer.value[0];
925 unsigned int coef =
926 cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL);
927 unsigned int original_coef = coef;
928
929 coef &= ~0x0003;
930 coef |= (vol & 0x0003);
931 if (original_coef == coef)
932 return 0;
933 else {
934 cs_vendor_coef_set(codec, CS421X_IDX_SPK_CTL, coef);
935 return 1;
936 }
937}
938
1077a024 939static const struct snd_kcontrol_new cs421x_speaker_boost_ctl = {
56487c27
TH		 940
941 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
942 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
943 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
944 .name = "Speaker Boost Playback Volume",
945 .info = cs421x_boost_vol_info,
946 .get = cs421x_boost_vol_get,
947 .put = cs421x_boost_vol_put,
948 .tlv = { .p = cs421x_speaker_boost_db_scale },
949};
950
5660ffd0 951static void cs4210_pinmux_init(struct hda_codec *codec)
56487c27
TH		 952{
953 struct cs_spec *spec = codec->spec;
954 unsigned int def_conf, coef;
955
956 /* GPIO, DMIC_SCL, DMIC_SDA and SENSE_B are multiplexed */
957 coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
958
959 if (spec->gpio_mask)
960 coef |= 0x0008; /* B1,B2 are GPIOs */
961 else
962 coef &= ~0x0008;
963
964 if (spec->sense_b)
965 coef |= 0x0010; /* B2 is SENSE_B, not inverted */
966 else
967 coef &= ~0x0010;
968
969 cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
970
971 if ((spec->gpio_mask || spec->sense_b) &&
972 is_active_pin(codec, CS421X_DMIC_PIN_NID)) {
973
974 /*
975 GPIO or SENSE_B forced - disconnect the DMIC pin.
976 */
977 def_conf = snd_hda_codec_get_pincfg(codec, CS421X_DMIC_PIN_NID);
978 def_conf &= ~AC_DEFCFG_PORT_CONN;
979 def_conf |= (AC_JACK_PORT_NONE << AC_DEFCFG_PORT_CONN_SHIFT);
980 snd_hda_codec_set_pincfg(codec, CS421X_DMIC_PIN_NID, def_conf);
981 }
982}
983
1077a024
TI		 984static void cs4210_spdif_automute(struct hda_codec *codec,
985 struct hda_jack_tbl *tbl)
56487c27
TH		 986{
987 struct cs_spec *spec = codec->spec;
1077a024
TI		 988 bool spdif_present = false;
989 hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0];
990
991 /* detect on spdif is specific to CS4210 */
992 if (!spec->spdif_detect ||
993 spec->vendor_nid != CS4210_VENDOR_NID)
994 return;
995
996 spdif_present = snd_hda_jack_detect(codec, spdif_pin);
997 if (spdif_present == spec->spdif_present)
998 return;
999
1000 spec->spdif_present = spdif_present;
1001 /* SPDIF TX on/off */
1002 if (spdif_present)
1003 snd_hda_set_pin_ctl(codec, spdif_pin,
1004 spdif_present ? PIN_OUT : 0);
56487c27 1005
1077a024
TI		 1006 cs_automute(codec);
1007}
1008
1009static void parse_cs421x_digital(struct hda_codec *codec)
1010{
1011 struct cs_spec *spec = codec->spec;
1012 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
1013 int i;
56487c27
TH		 1014
1015 for (i = 0; i < cfg->dig_outs; i++) {
1016 hda_nid_t nid = cfg->dig_out_pins[i];
56487c27 1017 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) {
56487c27 1018 spec->spdif_detect = 1;
1077a024
TI		 1019 snd_hda_jack_detect_enable_callback(codec, nid,
1020 SPDIF_EVENT,
1021 cs4210_spdif_automute);
56487c27
TH		 1022 }
1023 }
1024}
1025
1026static int cs421x_init(struct hda_codec *codec)
1027{
1028 struct cs_spec *spec = codec->spec;
1029
5660ffd0
DH		 1030 if (spec->vendor_nid == CS4210_VENDOR_NID) {
1031 snd_hda_sequence_write(codec, cs421x_coef_init_verbs);
1032 snd_hda_sequence_write(codec, cs421x_coef_init_verbs_A1_silicon_fixes);
1033 cs4210_pinmux_init(codec);
1034 }
56487c27 1035
1077a024
TI		 1036 snd_hda_gen_init(codec);
1037
56487c27
TH		 1038 if (spec->gpio_mask) {
1039 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
1040 spec->gpio_mask);
1041 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
1042 spec->gpio_dir);
1043 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
1044 spec->gpio_data);
1045 }
1046
1077a024 1047 init_input_coef(codec);
56487c27 1048
1077a024 1049 cs4210_spdif_automute(codec, NULL);
56487c27
TH		 1050
1051 return 0;
1052}
1053
1077a024 1054static int cs421x_build_controls(struct hda_codec *codec)
56487c27 1055{
56487c27 1056 struct cs_spec *spec = codec->spec;
56487c27 1057 int err;
56487c27 1058
1077a024 1059 err = snd_hda_gen_build_controls(codec);
56487c27
TH		 1060 if (err < 0)
1061 return err;
56487c27 1062
1077a024
TI		 1063 if (spec->gen.autocfg.speaker_outs &&
1064 spec->vendor_nid == CS4210_VENDOR_NID) {
56487c27 1065 err = snd_hda_ctl_add(codec, 0,
1077a024 1066 snd_ctl_new1(&cs421x_speaker_boost_ctl, codec));
56487c27
TH		 1067 if (err < 0)
1068 return err;
1069 }
01a61e12 1070 return 0;
56487c27
TH		 1071}
1072
1077a024 1073static void fix_volume_caps(struct hda_codec *codec, hda_nid_t dac)
56487c27 1074{
1077a024 1075 unsigned int caps;
56487c27 1076
1077a024
TI		 1077 /* set the upper-limit for mixer amp to 0dB */
1078 caps = query_amp_caps(codec, dac, HDA_OUTPUT);
1079 caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT);
1080 caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f)
1081 << AC_AMPCAP_NUM_STEPS_SHIFT;
1082 snd_hda_override_amp_caps(codec, dac, HDA_OUTPUT, caps);
56487c27
TH		 1083}
1084
1085static int cs421x_parse_auto_config(struct hda_codec *codec)
1086{
1087 struct cs_spec *spec = codec->spec;
1077a024 1088 hda_nid_t dac = CS4210_DAC_NID;
56487c27
TH		 1089 int err;
1090
1077a024
TI		 1091 fix_volume_caps(codec, dac);
1092
1093 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
56487c27
TH		 1094 if (err < 0)
1095 return err;
1077a024
TI		 1096
1097 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
56487c27
TH		 1098 if (err < 0)
1099 return err;
1077a024
TI		 1100
1101 parse_cs421x_digital(codec);
56487c27
TH		 1102 return 0;
1103}
1104
1105#ifdef CONFIG_PM
1106/*
1107 Manage PDREF, when transitioning to D3hot
1108 (DAC,ADC) -> D3, PDREF=1, AFG->D3
1109*/
68cb2b55 1110static int cs421x_suspend(struct hda_codec *codec)
56487c27 1111{
5660ffd0 1112 struct cs_spec *spec = codec->spec;
56487c27
TH		 1113 unsigned int coef;
1114
1115 snd_hda_shutup_pins(codec);
1116
1117 snd_hda_codec_write(codec, CS4210_DAC_NID, 0,
1118 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
1119 snd_hda_codec_write(codec, CS4210_ADC_NID, 0,
1120 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
1121
5660ffd0
DH		 1122 if (spec->vendor_nid == CS4210_VENDOR_NID) {
1123 coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
1124 coef |= 0x0004; /* PDREF */
1125 cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
1126 }
56487c27
TH		 1127
1128 return 0;
1129}
1130#endif
1131
00e17f76 1132static const struct hda_codec_ops cs421x_patch_ops = {
56487c27 1133 .build_controls = cs421x_build_controls,
1077a024 1134 .build_pcms = snd_hda_gen_build_pcms,
56487c27
TH		 1135 .init = cs421x_init,
1136 .free = cs_free,
5c2e4e0a 1137 .unsol_event = snd_hda_jack_unsol_event,
56487c27
TH		 1138#ifdef CONFIG_PM
1139 .suspend = cs421x_suspend,
1140#endif
1141};
1142
5660ffd0 1143static int patch_cs4210(struct hda_codec *codec)
56487c27
TH		 1144{
1145 struct cs_spec *spec;
1146 int err;
1147
1077a024 1148 spec = cs_alloc_spec(codec, CS4210_VENDOR_NID);
56487c27
TH		 1149 if (!spec)
1150 return -ENOMEM;
56487c27 1151
6d3073e1
TI		 1152 spec->gen.automute_hook = cs_automute;
1153
b35aabd7
TI		 1154 snd_hda_pick_fixup(codec, cs421x_models, cs421x_fixup_tbl,
1155 cs421x_fixups);
1156 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
56487c27
TH		 1157
1158 /*
1159 Update the GPIO/DMIC/SENSE_B pinmux before the configuration
1160 is auto-parsed. If GPIO or SENSE_B is forced, DMIC input
1161 is disabled.
1162 */
5660ffd0 1163 cs4210_pinmux_init(codec);
56487c27
TH		 1164
1165 err = cs421x_parse_auto_config(codec);
1166 if (err < 0)
1167 goto error;
1168
5660ffd0
DH		 1169 codec->patch_ops = cs421x_patch_ops;
1170
b35aabd7
TI		 1171 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
1172
5660ffd0
DH		 1173 return 0;
1174
1175 error:
c5e0b6db 1176 cs_free(codec);
5660ffd0
DH		 1177 return err;
1178}
1179
1180static int patch_cs4213(struct hda_codec *codec)
1181{
1182 struct cs_spec *spec;
1183 int err;
1184
1077a024 1185 spec = cs_alloc_spec(codec, CS4213_VENDOR_NID);
5660ffd0
DH		 1186 if (!spec)
1187 return -ENOMEM;
5660ffd0
DH		 1188
1189 err = cs421x_parse_auto_config(codec);
1190 if (err < 0)
1191 goto error;
56487c27 1192
5660ffd0 1193 codec->patch_ops = cs421x_patch_ops;
56487c27
TH		 1194 return 0;
1195
1196 error:
c5e0b6db 1197 cs_free(codec);
56487c27
TH		 1198 return err;
1199}
1200
e5f14248
TI		 1201
1202/*
1203 * patch entries
1204 */
c42d4782 1205static const struct hda_codec_preset snd_hda_preset_cirrus[] = {
e5f14248
TI		 1206 { .id = 0x10134206, .name = "CS4206", .patch = patch_cs420x },
1207 { .id = 0x10134207, .name = "CS4207", .patch = patch_cs420x },
be8cf445 1208 { .id = 0x10134208, .name = "CS4208", .patch = patch_cs4208 },
5660ffd0
DH		 1209 { .id = 0x10134210, .name = "CS4210", .patch = patch_cs4210 },
1210 { .id = 0x10134213, .name = "CS4213", .patch = patch_cs4213 },
e5f14248
TI		 1211 {} /* terminator */
1212};
1213
1214MODULE_ALIAS("snd-hda-codec-id:10134206");
1215MODULE_ALIAS("snd-hda-codec-id:10134207");
be8cf445 1216MODULE_ALIAS("snd-hda-codec-id:10134208");
56487c27 1217MODULE_ALIAS("snd-hda-codec-id:10134210");
5660ffd0 1218MODULE_ALIAS("snd-hda-codec-id:10134213");
e5f14248
TI		 1219
1220MODULE_LICENSE("GPL");
1221MODULE_DESCRIPTION("Cirrus Logic HD-audio codec");
1222
1223static struct hda_codec_preset_list cirrus_list = {
1224 .preset = snd_hda_preset_cirrus,
1225 .owner = THIS_MODULE,
1226};
1227
1228static int __init patch_cirrus_init(void)
1229{
1230 return snd_hda_add_codec_preset(&cirrus_list);
1231}
1232
1233static void __exit patch_cirrus_exit(void)
1234{
1235 snd_hda_delete_codec_preset(&cirrus_list);
1236}
1237
1238module_init(patch_cirrus_init)
1239module_exit(patch_cirrus_exit)
Linux 6.x block layer and io_uring tree(s)