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ALSA: Convert strlcpy to strscpy when return value is unused
[linux-2.6-block.git] / sound / pci / fm801.c
CommitLineData
c942fddf 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT		 2/*
3 * The driver for the ForteMedia FM801 based soundcards
c1017a4c 4 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 5 */
6
1da177e4
LT		 7#include <linux/delay.h>
8#include <linux/init.h>
9#include <linux/interrupt.h>
215dacc2 10#include <linux/io.h>
1da177e4
LT		 11#include <linux/pci.h>
12#include <linux/slab.h>
65a77217 13#include <linux/module.h>
1da177e4
LT		 14#include <sound/core.h>
15#include <sound/pcm.h>
666c70ff 16#include <sound/tlv.h>
1da177e4
LT		 17#include <sound/ac97_codec.h>
18#include <sound/mpu401.h>
19#include <sound/opl3.h>
20#include <sound/initval.h>
21
efce4bb9 22#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d647f0b7 23#include <media/drv-intf/tea575x.h>
1da177e4
LT		 24#endif
25
c1017a4c 26MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT		 27MODULE_DESCRIPTION("ForteMedia FM801");
28MODULE_LICENSE("GPL");
29MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801},"
30 "{Genius,SoundMaker Live 5.1}}");
31
32static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
33static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 34static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
1da177e4
LT		 35/*
36 * Enable TEA575x tuner
37 * 1 = MediaForte 256-PCS
d7ba858a 38 * 2 = MediaForte 256-PCP
1da177e4 39 * 3 = MediaForte 64-PCR
fb716c0b 40 * 16 = setup tuner only (this is additional bit), i.e. SF64-PCR FM card
1da177e4
LT		 41 * High 16-bits are video (radio) device number + 1
42 */
6581f4e7 43static int tea575x_tuner[SNDRV_CARDS];
d4ecc83b 44static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
1da177e4
LT		 45
46module_param_array(index, int, NULL, 0444);
47MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
48module_param_array(id, charp, NULL, 0444);
49MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
50module_param_array(enable, bool, NULL, 0444);
51MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
52module_param_array(tea575x_tuner, int, NULL, 0444);
d7ba858a 53MODULE_PARM_DESC(tea575x_tuner, "TEA575x tuner access method (0 = auto, 1 = SF256-PCS, 2=SF256-PCP, 3=SF64-PCR, 8=disable, +16=tuner-only).");
d4ecc83b
HV		 54module_param_array(radio_nr, int, NULL, 0444);
55MODULE_PARM_DESC(radio_nr, "Radio device numbers");
56
fb716c0b 57
c37279b9 58#define TUNER_DISABLED (1<<3)
fb716c0b
OZ		 59#define TUNER_ONLY (1<<4)
60#define TUNER_TYPE_MASK (~TUNER_ONLY & 0xFFFF)
1da177e4
LT		 61
62/*
63 * Direct registers
64 */
65
215dacc2
AS		 66#define fm801_writew(chip,reg,value) outw((value), chip->port + FM801_##reg)
67#define fm801_readw(chip,reg) inw(chip->port + FM801_##reg)
68
69#define fm801_writel(chip,reg,value) outl((value), chip->port + FM801_##reg)
1da177e4
LT		 70
71#define FM801_PCM_VOL 0x00 /* PCM Output Volume */
72#define FM801_FM_VOL 0x02 /* FM Output Volume */
73#define FM801_I2S_VOL 0x04 /* I2S Volume */
74#define FM801_REC_SRC 0x06 /* Record Source */
75#define FM801_PLY_CTRL 0x08 /* Playback Control */
76#define FM801_PLY_COUNT 0x0a /* Playback Count */
77#define FM801_PLY_BUF1 0x0c /* Playback Bufer I */
78#define FM801_PLY_BUF2 0x10 /* Playback Buffer II */
79#define FM801_CAP_CTRL 0x14 /* Capture Control */
80#define FM801_CAP_COUNT 0x16 /* Capture Count */
81#define FM801_CAP_BUF1 0x18 /* Capture Buffer I */
82#define FM801_CAP_BUF2 0x1c /* Capture Buffer II */
83#define FM801_CODEC_CTRL 0x22 /* Codec Control */
84#define FM801_I2S_MODE 0x24 /* I2S Mode Control */
85#define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */
86#define FM801_I2C_CTRL 0x29 /* I2C Control */
87#define FM801_AC97_CMD 0x2a /* AC'97 Command */
88#define FM801_AC97_DATA 0x2c /* AC'97 Data */
89#define FM801_MPU401_DATA 0x30 /* MPU401 Data */
90#define FM801_MPU401_CMD 0x31 /* MPU401 Command */
91#define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */
92#define FM801_GEN_CTRL 0x54 /* General Control */
93#define FM801_IRQ_MASK 0x56 /* Interrupt Mask */
94#define FM801_IRQ_STATUS 0x5a /* Interrupt Status */
95#define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */
96#define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */
97#define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */
98#define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */
99#define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */
100
b1e9ed26
TI		 101/* codec access */
102#define FM801_AC97_READ (1<<7) /* read=1, write=0 */
103#define FM801_AC97_VALID (1<<8) /* port valid=1 */
104#define FM801_AC97_BUSY (1<<9) /* busy=1 */
105#define FM801_AC97_ADDR_SHIFT 10 /* codec id (2bit) */
1da177e4
LT		 106
107/* playback and record control register bits */
108#define FM801_BUF1_LAST (1<<1)
109#define FM801_BUF2_LAST (1<<2)
110#define FM801_START (1<<5)
111#define FM801_PAUSE (1<<6)
112#define FM801_IMMED_STOP (1<<7)
113#define FM801_RATE_SHIFT 8
114#define FM801_RATE_MASK (15 << FM801_RATE_SHIFT)
115#define FM801_CHANNELS_4 (1<<12) /* playback only */
116#define FM801_CHANNELS_6 (2<<12) /* playback only */
117#define FM801_CHANNELS_6MS (3<<12) /* playback only */
118#define FM801_CHANNELS_MASK (3<<12)
119#define FM801_16BIT (1<<14)
120#define FM801_STEREO (1<<15)
121
122/* IRQ status bits */
123#define FM801_IRQ_PLAYBACK (1<<8)
124#define FM801_IRQ_CAPTURE (1<<9)
125#define FM801_IRQ_VOLUME (1<<14)
126#define FM801_IRQ_MPU (1<<15)
127
128/* GPIO control register */
129#define FM801_GPIO_GP0 (1<<0) /* read/write */
130#define FM801_GPIO_GP1 (1<<1)
131#define FM801_GPIO_GP2 (1<<2)
132#define FM801_GPIO_GP3 (1<<3)
133#define FM801_GPIO_GP(x) (1<<(0+(x)))
134#define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/
135#define FM801_GPIO_GD1 (1<<9)
136#define FM801_GPIO_GD2 (1<<10)
137#define FM801_GPIO_GD3 (1<<11)
138#define FM801_GPIO_GD(x) (1<<(8+(x)))
139#define FM801_GPIO_GS0 (1<<12) /* function select: */
140#define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */
141#define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */
142#define FM801_GPIO_GS3 (1<<15)
143#define FM801_GPIO_GS(x) (1<<(12+(x)))
144
052c233e
AS		 145/**
146 * struct fm801 - describes FM801 chip
af8c5dff
PLB		 147 * @dev: device for this chio
148 * @irq: irq number
052c233e
AS		 149 * @port: I/O port number
150 * @multichannel: multichannel support
151 * @secondary: secondary codec
152 * @secondary_addr: address of the secondary codec
153 * @tea575x_tuner: tuner access method & flags
154 * @ply_ctrl: playback control
155 * @cap_ctrl: capture control
af8c5dff
PLB		 156 * @ply_buffer: playback buffer
157 * @ply_buf: playback buffer index
158 * @ply_count: playback buffer count
159 * @ply_size: playback buffer size
160 * @ply_pos: playback position
161 * @cap_buffer: capture buffer
162 * @cap_buf: capture buffer index
163 * @cap_count: capture buffer count
164 * @cap_size: capture buffer size
165 * @cap_pos: capture position
166 * @ac97_bus: ac97 bus handle
167 * @ac97: ac97 handle
168 * @ac97_sec: ac97 secondary handle
169 * @card: ALSA card
170 * @pcm: PCM devices
171 * @rmidi: rmidi device
172 * @playback_substream: substream for playback
173 * @capture_substream: substream for capture
174 * @p_dma_size: playback DMA size
175 * @c_dma_size: capture DMA size
176 * @reg_lock: lock
177 * @proc_entry: /proc entry
178 * @v4l2_dev: v4l2 device
179 * @tea: tea575a structure
180 * @saved_regs: context saved during suspend
1da177e4 181 */
a5f22156 182struct fm801 {
d3d33aab 183 struct device *dev;
1da177e4
LT		 184 int irq;
185
052c233e
AS		 186 unsigned long port;
187 unsigned int multichannel: 1,
188 secondary: 1;
189 unsigned char secondary_addr;
190 unsigned int tea575x_tuner;
1da177e4 191
052c233e
AS		 192 unsigned short ply_ctrl;
193 unsigned short cap_ctrl;
1da177e4
LT		 194
195 unsigned long ply_buffer;
196 unsigned int ply_buf;
197 unsigned int ply_count;
198 unsigned int ply_size;
199 unsigned int ply_pos;
200
201 unsigned long cap_buffer;
202 unsigned int cap_buf;
203 unsigned int cap_count;
204 unsigned int cap_size;
205 unsigned int cap_pos;
206
a5f22156
TI		 207 struct snd_ac97_bus *ac97_bus;
208 struct snd_ac97 *ac97;
209 struct snd_ac97 *ac97_sec;
1da177e4 210
a5f22156
TI		 211 struct snd_card *card;
212 struct snd_pcm *pcm;
213 struct snd_rawmidi *rmidi;
214 struct snd_pcm_substream *playback_substream;
215 struct snd_pcm_substream *capture_substream;
1da177e4
LT		 216 unsigned int p_dma_size;
217 unsigned int c_dma_size;
218
219 spinlock_t reg_lock;
a5f22156 220 struct snd_info_entry *proc_entry;
1da177e4 221
fdb62b50 222#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b 223 struct v4l2_device v4l2_dev;
a5f22156 224 struct snd_tea575x tea;
1da177e4 225#endif
b1e9ed26 226
c7561cd8 227#ifdef CONFIG_PM_SLEEP
b1e9ed26
TI		 228 u16 saved_regs[0x20];
229#endif
1da177e4
LT		 230};
231
4b5c15f7
AS		 232/*
233 * IO accessors
234 */
235
236static inline void fm801_iowrite16(struct fm801 *chip, unsigned short offset, u16 value)
237{
238 outw(value, chip->port + offset);
239}
240
241static inline u16 fm801_ioread16(struct fm801 *chip, unsigned short offset)
242{
243 return inw(chip->port + offset);
244}
245
9baa3c34 246static const struct pci_device_id snd_fm801_ids[] = {
1da177e4 247 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */
26be8659 248 { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */
1da177e4
LT		 249 { 0, }
250};
251
252MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
253
254/*
255 * common I/O routines
256 */
257
02fd1a76
AS		 258static bool fm801_ac97_is_ready(struct fm801 *chip, unsigned int iterations)
259{
260 unsigned int idx;
261
262 for (idx = 0; idx < iterations; idx++) {
263 if (!(fm801_readw(chip, AC97_CMD) & FM801_AC97_BUSY))
264 return true;
265 udelay(10);
266 }
267 return false;
268}
269
270static bool fm801_ac97_is_valid(struct fm801 *chip, unsigned int iterations)
271{
272 unsigned int idx;
273
274 for (idx = 0; idx < iterations; idx++) {
275 if (fm801_readw(chip, AC97_CMD) & FM801_AC97_VALID)
276 return true;
277 udelay(10);
278 }
279 return false;
280}
281
a5f22156 282static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg,
1da177e4
LT		 283 unsigned short mask, unsigned short value)
284{
285 int change;
286 unsigned long flags;
287 unsigned short old, new;
288
289 spin_lock_irqsave(&chip->reg_lock, flags);
4b5c15f7 290 old = fm801_ioread16(chip, reg);
1da177e4
LT		 291 new = (old & ~mask) | value;
292 change = old != new;
293 if (change)
4b5c15f7 294 fm801_iowrite16(chip, reg, new);
1da177e4
LT		 295 spin_unlock_irqrestore(&chip->reg_lock, flags);
296 return change;
297}
298
a5f22156 299static void snd_fm801_codec_write(struct snd_ac97 *ac97,
1da177e4
LT		 300 unsigned short reg,
301 unsigned short val)
302{
a5f22156 303 struct fm801 *chip = ac97->private_data;
1da177e4
LT		 304
305 /*
306 * Wait until the codec interface is not ready..
307 */
02fd1a76
AS		 308 if (!fm801_ac97_is_ready(chip, 100)) {
309 dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
310 return;
1da177e4 311 }
1da177e4 312
1da177e4 313 /* write data and address */
215dacc2
AS		 314 fm801_writew(chip, AC97_DATA, val);
315 fm801_writew(chip, AC97_CMD, reg | (ac97->addr << FM801_AC97_ADDR_SHIFT));
1da177e4
LT		 316 /*
317 * Wait until the write command is not completed..
02fd1a76
AS		 318 */
319 if (!fm801_ac97_is_ready(chip, 1000))
320 dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
321 ac97->num);
1da177e4
LT		 322}
323
a5f22156 324static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 325{
a5f22156 326 struct fm801 *chip = ac97->private_data;
1da177e4
LT		 327
328 /*
329 * Wait until the codec interface is not ready..
330 */
02fd1a76
AS		 331 if (!fm801_ac97_is_ready(chip, 100)) {
332 dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
333 return 0;
1da177e4 334 }
1da177e4 335
1da177e4 336 /* read command */
215dacc2
AS		 337 fm801_writew(chip, AC97_CMD,
338 reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
02fd1a76
AS		 339 if (!fm801_ac97_is_ready(chip, 100)) {
340 dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
341 ac97->num);
342 return 0;
1da177e4 343 }
1da177e4 344
02fd1a76
AS		 345 if (!fm801_ac97_is_valid(chip, 1000)) {
346 dev_err(chip->card->dev,
347 "AC'97 interface #%d is not valid (2)\n", ac97->num);
348 return 0;
1da177e4 349 }
1da177e4 350
215dacc2 351 return fm801_readw(chip, AC97_DATA);
1da177e4
LT		 352}
353
d71a13f4 354static const unsigned int rates[] = {
1da177e4
LT		 355 5500, 8000, 9600, 11025,
356 16000, 19200, 22050, 32000,
357 38400, 44100, 48000
358};
359
d71a13f4 360static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
1da177e4
LT		 361 .count = ARRAY_SIZE(rates),
362 .list = rates,
363 .mask = 0,
364};
365
d71a13f4 366static const unsigned int channels[] = {
1da177e4
LT		 367 2, 4, 6
368};
369
d71a13f4 370static const struct snd_pcm_hw_constraint_list hw_constraints_channels = {
5e4968e2 371 .count = ARRAY_SIZE(channels),
1da177e4
LT		 372 .list = channels,
373 .mask = 0,
374};
375
376/*
377 * Sample rate routines
378 */
379
380static unsigned short snd_fm801_rate_bits(unsigned int rate)
381{
382 unsigned int idx;
383
384 for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
385 if (rates[idx] == rate)
386 return idx;
387 snd_BUG();
388 return ARRAY_SIZE(rates) - 1;
389}
390
391/*
392 * PCM part
393 */
394
a5f22156 395static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 396 int cmd)
397{
a5f22156 398 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 399
400 spin_lock(&chip->reg_lock);
401 switch (cmd) {
402 case SNDRV_PCM_TRIGGER_START:
403 chip->ply_ctrl &= ~(FM801_BUF1_LAST |
404 FM801_BUF2_LAST |
405 FM801_PAUSE);
406 chip->ply_ctrl |= FM801_START |
407 FM801_IMMED_STOP;
408 break;
409 case SNDRV_PCM_TRIGGER_STOP:
410 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
411 break;
412 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
b1e9ed26 413 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 414 chip->ply_ctrl |= FM801_PAUSE;
415 break;
416 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
b1e9ed26 417 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 418 chip->ply_ctrl &= ~FM801_PAUSE;
419 break;
420 default:
421 spin_unlock(&chip->reg_lock);
422 snd_BUG();
423 return -EINVAL;
424 }
215dacc2 425 fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
1da177e4
LT		 426 spin_unlock(&chip->reg_lock);
427 return 0;
428}
429
a5f22156 430static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 431 int cmd)
432{
a5f22156 433 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 434
435 spin_lock(&chip->reg_lock);
436 switch (cmd) {
437 case SNDRV_PCM_TRIGGER_START:
438 chip->cap_ctrl &= ~(FM801_BUF1_LAST |
439 FM801_BUF2_LAST |
440 FM801_PAUSE);
441 chip->cap_ctrl |= FM801_START |
442 FM801_IMMED_STOP;
443 break;
444 case SNDRV_PCM_TRIGGER_STOP:
445 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
446 break;
447 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
b1e9ed26 448 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 449 chip->cap_ctrl |= FM801_PAUSE;
450 break;
451 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
b1e9ed26 452 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 453 chip->cap_ctrl &= ~FM801_PAUSE;
454 break;
455 default:
456 spin_unlock(&chip->reg_lock);
457 snd_BUG();
458 return -EINVAL;
459 }
215dacc2 460 fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
1da177e4
LT		 461 spin_unlock(&chip->reg_lock);
462 return 0;
463}
464
a5f22156 465static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 466{
a5f22156
TI		 467 struct fm801 *chip = snd_pcm_substream_chip(substream);
468 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 469
470 chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
471 chip->ply_count = snd_pcm_lib_period_bytes(substream);
472 spin_lock_irq(&chip->reg_lock);
473 chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
474 FM801_STEREO | FM801_RATE_MASK |
475 FM801_CHANNELS_MASK);
476 if (snd_pcm_format_width(runtime->format) == 16)
477 chip->ply_ctrl |= FM801_16BIT;
478 if (runtime->channels > 1) {
479 chip->ply_ctrl |= FM801_STEREO;
480 if (runtime->channels == 4)
481 chip->ply_ctrl |= FM801_CHANNELS_4;
482 else if (runtime->channels == 6)
483 chip->ply_ctrl |= FM801_CHANNELS_6;
484 }
485 chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
486 chip->ply_buf = 0;
215dacc2
AS		 487 fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
488 fm801_writew(chip, PLY_COUNT, chip->ply_count - 1);
1da177e4
LT		 489 chip->ply_buffer = runtime->dma_addr;
490 chip->ply_pos = 0;
215dacc2
AS		 491 fm801_writel(chip, PLY_BUF1, chip->ply_buffer);
492 fm801_writel(chip, PLY_BUF2,
493 chip->ply_buffer + (chip->ply_count % chip->ply_size));
1da177e4
LT		 494 spin_unlock_irq(&chip->reg_lock);
495 return 0;
496}
497
a5f22156 498static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 499{
a5f22156
TI		 500 struct fm801 *chip = snd_pcm_substream_chip(substream);
501 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 502
503 chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
504 chip->cap_count = snd_pcm_lib_period_bytes(substream);
505 spin_lock_irq(&chip->reg_lock);
506 chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
507 FM801_STEREO | FM801_RATE_MASK);
508 if (snd_pcm_format_width(runtime->format) == 16)
509 chip->cap_ctrl |= FM801_16BIT;
510 if (runtime->channels > 1)
511 chip->cap_ctrl |= FM801_STEREO;
512 chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
513 chip->cap_buf = 0;
215dacc2
AS		 514 fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
515 fm801_writew(chip, CAP_COUNT, chip->cap_count - 1);
1da177e4
LT		 516 chip->cap_buffer = runtime->dma_addr;
517 chip->cap_pos = 0;
215dacc2
AS		 518 fm801_writel(chip, CAP_BUF1, chip->cap_buffer);
519 fm801_writel(chip, CAP_BUF2,
520 chip->cap_buffer + (chip->cap_count % chip->cap_size));
1da177e4
LT		 521 spin_unlock_irq(&chip->reg_lock);
522 return 0;
523}
524
a5f22156 525static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 526{
a5f22156 527 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 528 size_t ptr;
529
530 if (!(chip->ply_ctrl & FM801_START))
531 return 0;
532 spin_lock(&chip->reg_lock);
215dacc2
AS		 533 ptr = chip->ply_pos + (chip->ply_count - 1) - fm801_readw(chip, PLY_COUNT);
534 if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_PLAYBACK) {
1da177e4
LT		 535 ptr += chip->ply_count;
536 ptr %= chip->ply_size;
537 }
538 spin_unlock(&chip->reg_lock);
539 return bytes_to_frames(substream->runtime, ptr);
540}
541
a5f22156 542static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 543{
a5f22156 544 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 545 size_t ptr;
546
547 if (!(chip->cap_ctrl & FM801_START))
548 return 0;
549 spin_lock(&chip->reg_lock);
215dacc2
AS		 550 ptr = chip->cap_pos + (chip->cap_count - 1) - fm801_readw(chip, CAP_COUNT);
551 if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_CAPTURE) {
1da177e4
LT		 552 ptr += chip->cap_count;
553 ptr %= chip->cap_size;
554 }
555 spin_unlock(&chip->reg_lock);
556 return bytes_to_frames(substream->runtime, ptr);
557}
558
7d12e780 559static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id)
1da177e4 560{
a5f22156 561 struct fm801 *chip = dev_id;
1da177e4
LT		 562 unsigned short status;
563 unsigned int tmp;
564
215dacc2 565 status = fm801_readw(chip, IRQ_STATUS);
1da177e4
LT		 566 status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
567 if (! status)
568 return IRQ_NONE;
569 /* ack first */
215dacc2 570 fm801_writew(chip, IRQ_STATUS, status);
1da177e4
LT		 571 if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
572 spin_lock(&chip->reg_lock);
573 chip->ply_buf++;
574 chip->ply_pos += chip->ply_count;
575 chip->ply_pos %= chip->ply_size;
576 tmp = chip->ply_pos + chip->ply_count;
577 tmp %= chip->ply_size;
215dacc2
AS		 578 if (chip->ply_buf & 1)
579 fm801_writel(chip, PLY_BUF1, chip->ply_buffer + tmp);
580 else
581 fm801_writel(chip, PLY_BUF2, chip->ply_buffer + tmp);
1da177e4
LT		 582 spin_unlock(&chip->reg_lock);
583 snd_pcm_period_elapsed(chip->playback_substream);
584 }
585 if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
586 spin_lock(&chip->reg_lock);
587 chip->cap_buf++;
588 chip->cap_pos += chip->cap_count;
589 chip->cap_pos %= chip->cap_size;
590 tmp = chip->cap_pos + chip->cap_count;
591 tmp %= chip->cap_size;
215dacc2
AS		 592 if (chip->cap_buf & 1)
593 fm801_writel(chip, CAP_BUF1, chip->cap_buffer + tmp);
594 else
595 fm801_writel(chip, CAP_BUF2, chip->cap_buffer + tmp);
1da177e4
LT		 596 spin_unlock(&chip->reg_lock);
597 snd_pcm_period_elapsed(chip->capture_substream);
598 }
599 if (chip->rmidi && (status & FM801_IRQ_MPU))
7d12e780 600 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
997c87da
AS		 601 if (status & FM801_IRQ_VOLUME) {
602 /* TODO */
603 }
1da177e4
LT		 604
605 return IRQ_HANDLED;
606}
607
dee49895 608static const struct snd_pcm_hardware snd_fm801_playback =
1da177e4
LT		 609{
610 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
611 SNDRV_PCM_INFO_BLOCK_TRANSFER |
b1e9ed26 612 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
1da177e4
LT		 613 SNDRV_PCM_INFO_MMAP_VALID),
614 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
615 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
616 .rate_min = 5500,
617 .rate_max = 48000,
618 .channels_min = 1,
619 .channels_max = 2,
620 .buffer_bytes_max = (128*1024),
621 .period_bytes_min = 64,
622 .period_bytes_max = (128*1024),
623 .periods_min = 1,
624 .periods_max = 1024,
625 .fifo_size = 0,
626};
627
dee49895 628static const struct snd_pcm_hardware snd_fm801_capture =
1da177e4
LT		 629{
630 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
631 SNDRV_PCM_INFO_BLOCK_TRANSFER |
b1e9ed26 632 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
1da177e4
LT		 633 SNDRV_PCM_INFO_MMAP_VALID),
634 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
635 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
636 .rate_min = 5500,
637 .rate_max = 48000,
638 .channels_min = 1,
639 .channels_max = 2,
640 .buffer_bytes_max = (128*1024),
641 .period_bytes_min = 64,
642 .period_bytes_max = (128*1024),
643 .periods_min = 1,
644 .periods_max = 1024,
645 .fifo_size = 0,
646};
647
a5f22156 648static int snd_fm801_playback_open(struct snd_pcm_substream *substream)
1da177e4 649{
a5f22156
TI		 650 struct fm801 *chip = snd_pcm_substream_chip(substream);
651 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 652 int err;
653
654 chip->playback_substream = substream;
655 runtime->hw = snd_fm801_playback;
a5f22156
TI		 656 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
657 &hw_constraints_rates);
1da177e4
LT		 658 if (chip->multichannel) {
659 runtime->hw.channels_max = 6;
a5f22156
TI		 660 snd_pcm_hw_constraint_list(runtime, 0,
661 SNDRV_PCM_HW_PARAM_CHANNELS,
662 &hw_constraints_channels);
1da177e4
LT		 663 }
664 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
665 return err;
666 return 0;
667}
668
a5f22156 669static int snd_fm801_capture_open(struct snd_pcm_substream *substream)
1da177e4 670{
a5f22156
TI		 671 struct fm801 *chip = snd_pcm_substream_chip(substream);
672 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 673 int err;
674
675 chip->capture_substream = substream;
676 runtime->hw = snd_fm801_capture;
a5f22156
TI		 677 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
678 &hw_constraints_rates);
1da177e4
LT		 679 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
680 return err;
681 return 0;
682}
683
a5f22156 684static int snd_fm801_playback_close(struct snd_pcm_substream *substream)
1da177e4 685{
a5f22156 686 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 687
688 chip->playback_substream = NULL;
689 return 0;
690}
691
a5f22156 692static int snd_fm801_capture_close(struct snd_pcm_substream *substream)
1da177e4 693{
a5f22156 694 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 695
696 chip->capture_substream = NULL;
697 return 0;
698}
699
6769e988 700static const struct snd_pcm_ops snd_fm801_playback_ops = {
1da177e4
LT		 701 .open = snd_fm801_playback_open,
702 .close = snd_fm801_playback_close,
1da177e4
LT		 703 .prepare = snd_fm801_playback_prepare,
704 .trigger = snd_fm801_playback_trigger,
705 .pointer = snd_fm801_playback_pointer,
706};
707
6769e988 708static const struct snd_pcm_ops snd_fm801_capture_ops = {
1da177e4
LT		 709 .open = snd_fm801_capture_open,
710 .close = snd_fm801_capture_close,
1da177e4
LT		 711 .prepare = snd_fm801_capture_prepare,
712 .trigger = snd_fm801_capture_trigger,
713 .pointer = snd_fm801_capture_pointer,
714};
715
483337f9 716static int snd_fm801_pcm(struct fm801 *chip, int device)
1da177e4 717{
d3d33aab 718 struct pci_dev *pdev = to_pci_dev(chip->dev);
a5f22156 719 struct snd_pcm *pcm;
1da177e4
LT		 720 int err;
721
1da177e4
LT		 722 if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0)
723 return err;
724
725 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
726 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
727
728 pcm->private_data = chip;
1da177e4
LT		 729 pcm->info_flags = 0;
730 strcpy(pcm->name, "FM801");
731 chip->pcm = pcm;
732
247ed102
TI		 733 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &pdev->dev,
734 chip->multichannel ? 128*1024 : 64*1024, 128*1024);
1da177e4 735
483337f9 736 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
e36e3b86
TI		 737 snd_pcm_alt_chmaps,
738 chip->multichannel ? 6 : 2, 0,
739 NULL);
1da177e4
LT		 740}
741
742/*
743 * TEA5757 radio
744 */
745
fdb62b50 746#ifdef CONFIG_SND_FM801_TEA575X_BOOL
1da177e4 747
938a1566
OZ		 748/* GPIO to TEA575x maps */
749struct snd_fm801_tea575x_gpio {
750 u8 data, clk, wren, most;
d7ba858a 751 char *name;
938a1566 752};
1da177e4 753
fb537cd0 754static const struct snd_fm801_tea575x_gpio snd_fm801_tea575x_gpios[] = {
d7ba858a
OZ		 755 { .data = 1, .clk = 3, .wren = 2, .most = 0, .name = "SF256-PCS" },
756 { .data = 1, .clk = 0, .wren = 2, .most = 3, .name = "SF256-PCP" },
757 { .data = 2, .clk = 0, .wren = 1, .most = 3, .name = "SF64-PCR" },
938a1566 758};
1da177e4 759
8e699d2c
TI		 760#define get_tea575x_gpio(chip) \
761 (&snd_fm801_tea575x_gpios[((chip)->tea575x_tuner & TUNER_TYPE_MASK) - 1])
762
938a1566 763static void snd_fm801_tea575x_set_pins(struct snd_tea575x *tea, u8 pins)
1da177e4 764{
a5f22156 765 struct fm801 *chip = tea->private_data;
215dacc2 766 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 767 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
1da177e4 768
938a1566
OZ		 769 reg &= ~(FM801_GPIO_GP(gpio.data) |
770 FM801_GPIO_GP(gpio.clk) |
771 FM801_GPIO_GP(gpio.wren));
1da177e4 772
938a1566
OZ		 773 reg |= (pins & TEA575X_DATA) ? FM801_GPIO_GP(gpio.data) : 0;
774 reg |= (pins & TEA575X_CLK) ? FM801_GPIO_GP(gpio.clk) : 0;
775 /* WRITE_ENABLE is inverted */
776 reg |= (pins & TEA575X_WREN) ? 0 : FM801_GPIO_GP(gpio.wren);
1da177e4 777
215dacc2 778 fm801_writew(chip, GPIO_CTRL, reg);
1da177e4
LT		 779}
780
938a1566 781static u8 snd_fm801_tea575x_get_pins(struct snd_tea575x *tea)
1da177e4 782{
a5f22156 783 struct fm801 *chip = tea->private_data;
215dacc2 784 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 785 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
effded75
DC		 786 u8 ret;
787
788 ret = 0;
789 if (reg & FM801_GPIO_GP(gpio.data))
790 ret |= TEA575X_DATA;
791 if (reg & FM801_GPIO_GP(gpio.most))
792 ret |= TEA575X_MOST;
793 return ret;
1da177e4
LT		 794}
795
938a1566 796static void snd_fm801_tea575x_set_direction(struct snd_tea575x *tea, bool output)
1da177e4 797{
a5f22156 798 struct fm801 *chip = tea->private_data;
215dacc2 799 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 800 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
1da177e4 801
1da177e4 802 /* use GPIO lines and set write enable bit */
938a1566
OZ		 803 reg |= FM801_GPIO_GS(gpio.data) |
804 FM801_GPIO_GS(gpio.wren) |
805 FM801_GPIO_GS(gpio.clk) |
806 FM801_GPIO_GS(gpio.most);
807 if (output) {
808 /* all of lines are in the write direction */
809 /* clear data and clock lines */
810 reg &= ~(FM801_GPIO_GD(gpio.data) |
811 FM801_GPIO_GD(gpio.wren) |
812 FM801_GPIO_GD(gpio.clk) |
813 FM801_GPIO_GP(gpio.data) |
814 FM801_GPIO_GP(gpio.clk) |
815 FM801_GPIO_GP(gpio.wren));
816 } else {
817 /* use GPIO lines, set data direction to input */
818 reg |= FM801_GPIO_GD(gpio.data) |
819 FM801_GPIO_GD(gpio.most) |
820 FM801_GPIO_GP(gpio.data) |
821 FM801_GPIO_GP(gpio.most) |
822 FM801_GPIO_GP(gpio.wren);
823 /* all of lines are in the write direction, except data */
824 /* clear data, write enable and clock lines */
825 reg &= ~(FM801_GPIO_GD(gpio.wren) |
826 FM801_GPIO_GD(gpio.clk) |
827 FM801_GPIO_GP(gpio.clk));
1da177e4
LT		 828 }
829
215dacc2 830 fm801_writew(chip, GPIO_CTRL, reg);
69252128
AS		 831}
832
22dbec26 833static const struct snd_tea575x_ops snd_fm801_tea_ops = {
938a1566
OZ		 834 .set_pins = snd_fm801_tea575x_set_pins,
835 .get_pins = snd_fm801_tea575x_get_pins,
836 .set_direction = snd_fm801_tea575x_set_direction,
1da177e4
LT		 837};
838#endif
839
840/*
841 * Mixer routines
842 */
843
844#define FM801_SINGLE(xname, reg, shift, mask, invert) \
845{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
846 .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
847 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
848
a5f22156
TI		 849static int snd_fm801_info_single(struct snd_kcontrol *kcontrol,
850 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 851{
852 int mask = (kcontrol->private_value >> 16) & 0xff;
853
854 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
855 uinfo->count = 1;
856 uinfo->value.integer.min = 0;
857 uinfo->value.integer.max = mask;
858 return 0;
859}
860
a5f22156
TI		 861static int snd_fm801_get_single(struct snd_kcontrol *kcontrol,
862 struct snd_ctl_elem_value *ucontrol)
1da177e4 863{
a5f22156 864 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 865 int reg = kcontrol->private_value & 0xff;
866 int shift = (kcontrol->private_value >> 8) & 0xff;
867 int mask = (kcontrol->private_value >> 16) & 0xff;
868 int invert = (kcontrol->private_value >> 24) & 0xff;
4b5c15f7 869 long *value = ucontrol->value.integer.value;
1da177e4 870
4b5c15f7 871 value[0] = (fm801_ioread16(chip, reg) >> shift) & mask;
1da177e4 872 if (invert)
4b5c15f7 873 value[0] = mask - value[0];
1da177e4
LT		 874 return 0;
875}
876
a5f22156
TI		 877static int snd_fm801_put_single(struct snd_kcontrol *kcontrol,
878 struct snd_ctl_elem_value *ucontrol)
1da177e4 879{
a5f22156 880 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 881 int reg = kcontrol->private_value & 0xff;
882 int shift = (kcontrol->private_value >> 8) & 0xff;
883 int mask = (kcontrol->private_value >> 16) & 0xff;
884 int invert = (kcontrol->private_value >> 24) & 0xff;
885 unsigned short val;
886
887 val = (ucontrol->value.integer.value[0] & mask);
888 if (invert)
889 val = mask - val;
890 return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
891}
892
893#define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
894{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
895 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
896 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
666c70ff
TI		 897#define FM801_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
898{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
899 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
900 .name = xname, .info = snd_fm801_info_double, \
901 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
902 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
903 .tlv = { .p = (xtlv) } }
1da177e4 904
a5f22156
TI		 905static int snd_fm801_info_double(struct snd_kcontrol *kcontrol,
906 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 907{
908 int mask = (kcontrol->private_value >> 16) & 0xff;
909
910 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
911 uinfo->count = 2;
912 uinfo->value.integer.min = 0;
913 uinfo->value.integer.max = mask;
914 return 0;
915}
916
a5f22156
TI		 917static int snd_fm801_get_double(struct snd_kcontrol *kcontrol,
918 struct snd_ctl_elem_value *ucontrol)
1da177e4 919{
a5f22156 920 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 921 int reg = kcontrol->private_value & 0xff;
922 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
923 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
924 int mask = (kcontrol->private_value >> 16) & 0xff;
925 int invert = (kcontrol->private_value >> 24) & 0xff;
4b5c15f7 926 long *value = ucontrol->value.integer.value;
1da177e4
LT		 927
928 spin_lock_irq(&chip->reg_lock);
4b5c15f7
AS		 929 value[0] = (fm801_ioread16(chip, reg) >> shift_left) & mask;
930 value[1] = (fm801_ioread16(chip, reg) >> shift_right) & mask;
1da177e4
LT		 931 spin_unlock_irq(&chip->reg_lock);
932 if (invert) {
4b5c15f7
AS		 933 value[0] = mask - value[0];
934 value[1] = mask - value[1];
1da177e4
LT		 935 }
936 return 0;
937}
938
a5f22156
TI		 939static int snd_fm801_put_double(struct snd_kcontrol *kcontrol,
940 struct snd_ctl_elem_value *ucontrol)
1da177e4 941{
a5f22156 942 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 943 int reg = kcontrol->private_value & 0xff;
944 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
945 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
946 int mask = (kcontrol->private_value >> 16) & 0xff;
947 int invert = (kcontrol->private_value >> 24) & 0xff;
948 unsigned short val1, val2;
949
950 val1 = ucontrol->value.integer.value[0] & mask;
951 val2 = ucontrol->value.integer.value[1] & mask;
952 if (invert) {
953 val1 = mask - val1;
954 val2 = mask - val2;
955 }
956 return snd_fm801_update_bits(chip, reg,
957 (mask << shift_left) | (mask << shift_right),
958 (val1 << shift_left ) | (val2 << shift_right));
959}
960
a5f22156
TI		 961static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol,
962 struct snd_ctl_elem_info *uinfo)
1da177e4 963{
ca776a28 964 static const char * const texts[5] = {
1da177e4
LT		 965 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
966 };
967
ca776a28 968 return snd_ctl_enum_info(uinfo, 1, 5, texts);
1da177e4
LT		 969}
970
a5f22156
TI		 971static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol,
972 struct snd_ctl_elem_value *ucontrol)
1da177e4 973{
a5f22156 974 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 975 unsigned short val;
976
215dacc2 977 val = fm801_readw(chip, REC_SRC) & 7;
1da177e4
LT		 978 if (val > 4)
979 val = 4;
980 ucontrol->value.enumerated.item[0] = val;
981 return 0;
982}
983
a5f22156
TI		 984static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol,
985 struct snd_ctl_elem_value *ucontrol)
1da177e4 986{
a5f22156 987 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 988 unsigned short val;
989
990 if ((val = ucontrol->value.enumerated.item[0]) > 4)
991 return -EINVAL;
992 return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
993}
994
0cb29ea0 995static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -3450, 150, 0);
666c70ff 996
a5f22156 997#define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls)
1da177e4 998
b4e5e707 999static const struct snd_kcontrol_new snd_fm801_controls[] = {
666c70ff
TI		 1000FM801_DOUBLE_TLV("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1,
1001 db_scale_dsp),
1da177e4 1002FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
666c70ff
TI		 1003FM801_DOUBLE_TLV("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1,
1004 db_scale_dsp),
1da177e4 1005FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
666c70ff
TI		 1006FM801_DOUBLE_TLV("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1,
1007 db_scale_dsp),
1da177e4
LT		 1008FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
1009{
1010 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1011 .name = "Digital Capture Source",
1012 .info = snd_fm801_info_mux,
1013 .get = snd_fm801_get_mux,
1014 .put = snd_fm801_put_mux,
1015}
1016};
1017
a5f22156 1018#define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi)
1da177e4 1019
b4e5e707 1020static const struct snd_kcontrol_new snd_fm801_controls_multi[] = {
1da177e4
LT		 1021FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1022FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
10e8d78a
CL		 1023FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0),
1024FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0),
1025FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0),
1026FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0),
1da177e4
LT		 1027};
1028
a5f22156 1029static void snd_fm801_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1030{
a5f22156 1031 struct fm801 *chip = bus->private_data;
1da177e4
LT		 1032 chip->ac97_bus = NULL;
1033}
1034
a5f22156 1035static void snd_fm801_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1036{
a5f22156 1037 struct fm801 *chip = ac97->private_data;
1da177e4
LT		 1038 if (ac97->num == 0) {
1039 chip->ac97 = NULL;
1040 } else {
1041 chip->ac97_sec = NULL;
1042 }
1043}
1044
e23e7a14 1045static int snd_fm801_mixer(struct fm801 *chip)
1da177e4 1046{
a5f22156 1047 struct snd_ac97_template ac97;
1da177e4
LT		 1048 unsigned int i;
1049 int err;
51055da5 1050 static const struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1051 .write = snd_fm801_codec_write,
1052 .read = snd_fm801_codec_read,
1053 };
1054
1055 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1056 return err;
1057 chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus;
1058
1059 memset(&ac97, 0, sizeof(ac97));
1060 ac97.private_data = chip;
1061 ac97.private_free = snd_fm801_mixer_free_ac97;
1062 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1063 return err;
1064 if (chip->secondary) {
1065 ac97.num = 1;
1066 ac97.addr = chip->secondary_addr;
1067 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
1068 return err;
1069 }
ef1ffbe7
ZJ		 1070 for (i = 0; i < FM801_CONTROLS; i++) {
1071 err = snd_ctl_add(chip->card,
1072 snd_ctl_new1(&snd_fm801_controls[i], chip));
1073 if (err < 0)
1074 return err;
1075 }
1da177e4 1076 if (chip->multichannel) {
ef1ffbe7
ZJ		 1077 for (i = 0; i < FM801_CONTROLS_MULTI; i++) {
1078 err = snd_ctl_add(chip->card,
1079 snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1080 if (err < 0)
1081 return err;
1082 }
1da177e4
LT		 1083 }
1084 return 0;
1085}
1086
1087/*
1088 * initialization routines
1089 */
1090
b1e9ed26
TI		 1091static int wait_for_codec(struct fm801 *chip, unsigned int codec_id,
1092 unsigned short reg, unsigned long waits)
1093{
1094 unsigned long timeout = jiffies + waits;
1095
215dacc2
AS		 1096 fm801_writew(chip, AC97_CMD,
1097 reg | (codec_id << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
b1e9ed26
TI		 1098 udelay(5);
1099 do {
215dacc2
AS		 1100 if ((fm801_readw(chip, AC97_CMD) &
1101 (FM801_AC97_VALID | FM801_AC97_BUSY)) == FM801_AC97_VALID)
b1e9ed26
TI		 1102 return 0;
1103 schedule_timeout_uninterruptible(1);
1104 } while (time_after(timeout, jiffies));
1105 return -EIO;
1106}
1107
b56fa687 1108static int reset_codec(struct fm801 *chip)
b1e9ed26 1109{
b1e9ed26 1110 /* codec cold reset + AC'97 warm reset */
215dacc2
AS		 1111 fm801_writew(chip, CODEC_CTRL, (1 << 5) | (1 << 6));
1112 fm801_readw(chip, CODEC_CTRL); /* flush posting data */
b1e9ed26 1113 udelay(100);
215dacc2 1114 fm801_writew(chip, CODEC_CTRL, 0);
b1e9ed26 1115
b56fa687
AS		 1116 return wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750));
1117}
1118
1119static void snd_fm801_chip_multichannel_init(struct fm801 *chip)
1120{
1121 unsigned short cmdw;
b1e9ed26
TI		 1122
1123 if (chip->multichannel) {
1124 if (chip->secondary_addr) {
1125 wait_for_codec(chip, chip->secondary_addr,
1126 AC97_VENDOR_ID1, msecs_to_jiffies(50));
1127 } else {
1128 /* my card has the secondary codec */
1129 /* at address #3, so the loop is inverted */
58e4334e
HH		 1130 int i;
1131 for (i = 3; i > 0; i--) {
1132 if (!wait_for_codec(chip, i, AC97_VENDOR_ID1,
b1e9ed26 1133 msecs_to_jiffies(50))) {
215dacc2 1134 cmdw = fm801_readw(chip, AC97_DATA);
b1e9ed26
TI		 1135 if (cmdw != 0xffff && cmdw != 0) {
1136 chip->secondary = 1;
58e4334e 1137 chip->secondary_addr = i;
b1e9ed26
TI		 1138 break;
1139 }
1140 }
1141 }
1142 }
1143
1144 /* the recovery phase, it seems that probing for non-existing codec might */
1145 /* cause timeout problems */
1146 wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750));
1147 }
b56fa687 1148}
b1e9ed26 1149
b56fa687
AS		 1150static void snd_fm801_chip_init(struct fm801 *chip)
1151{
1152 unsigned short cmdw;
6bbe13ec 1153
b1e9ed26 1154 /* init volume */
215dacc2
AS		 1155 fm801_writew(chip, PCM_VOL, 0x0808);
1156 fm801_writew(chip, FM_VOL, 0x9f1f);
1157 fm801_writew(chip, I2S_VOL, 0x8808);
b1e9ed26
TI		 1158
1159 /* I2S control - I2S mode */
215dacc2 1160 fm801_writew(chip, I2S_MODE, 0x0003);
b1e9ed26 1161
6bbe13ec 1162 /* interrupt setup */
215dacc2 1163 cmdw = fm801_readw(chip, IRQ_MASK);
6bbe13ec
JK		 1164 if (chip->irq < 0)
1165 cmdw |= 0x00c3; /* mask everything, no PCM nor MPU */
1166 else
1167 cmdw &= ~0x0083; /* unmask MPU, PLAYBACK & CAPTURE */
215dacc2 1168 fm801_writew(chip, IRQ_MASK, cmdw);
b1e9ed26
TI		 1169
1170 /* interrupt clear */
215dacc2
AS		 1171 fm801_writew(chip, IRQ_STATUS,
1172 FM801_IRQ_PLAYBACK | FM801_IRQ_CAPTURE | FM801_IRQ_MPU);
b1e9ed26
TI		 1173}
1174
a5f22156 1175static int snd_fm801_free(struct fm801 *chip)
1da177e4
LT		 1176{
1177 unsigned short cmdw;
1178
1179 if (chip->irq < 0)
1180 goto __end_hw;
1181
1182 /* interrupt setup - mask everything */
215dacc2 1183 cmdw = fm801_readw(chip, IRQ_MASK);
1da177e4 1184 cmdw |= 0x00c3;
215dacc2 1185 fm801_writew(chip, IRQ_MASK, cmdw);
1da177e4 1186
d3d33aab 1187 devm_free_irq(chip->dev, chip->irq, chip);
e97e98c6 1188
1da177e4 1189 __end_hw:
fdb62b50 1190#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b 1191 if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
c37279b9 1192 snd_tea575x_exit(&chip->tea);
d4ecc83b
HV		 1193 v4l2_device_unregister(&chip->v4l2_dev);
1194 }
1da177e4 1195#endif
1da177e4
LT		 1196 return 0;
1197}
1198
a5f22156 1199static int snd_fm801_dev_free(struct snd_device *device)
1da177e4 1200{
a5f22156 1201 struct fm801 *chip = device->device_data;
1da177e4
LT		 1202 return snd_fm801_free(chip);
1203}
1204
e23e7a14
BP		 1205static int snd_fm801_create(struct snd_card *card,
1206 struct pci_dev *pci,
1207 int tea575x_tuner,
1208 int radio_nr,
1209 struct fm801 **rchip)
1da177e4 1210{
a5f22156 1211 struct fm801 *chip;
1da177e4 1212 int err;
efb0ad25 1213 static const struct snd_device_ops ops = {
1da177e4
LT		 1214 .dev_free = snd_fm801_dev_free,
1215 };
1216
1217 *rchip = NULL;
5618955c 1218 if ((err = pcim_enable_device(pci)) < 0)
1da177e4 1219 return err;
5618955c
AS		 1220 chip = devm_kzalloc(&pci->dev, sizeof(*chip), GFP_KERNEL);
1221 if (chip == NULL)
1da177e4 1222 return -ENOMEM;
1da177e4
LT		 1223 spin_lock_init(&chip->reg_lock);
1224 chip->card = card;
d3d33aab 1225 chip->dev = &pci->dev;
1da177e4 1226 chip->irq = -1;
6bbe13ec 1227 chip->tea575x_tuner = tea575x_tuner;
5618955c 1228 if ((err = pci_request_regions(pci, "FM801")) < 0)
1da177e4 1229 return err;
1da177e4 1230 chip->port = pci_resource_start(pci, 0);
b56fa687
AS		 1231
1232 if (pci->revision >= 0xb1) /* FM801-AU */
1233 chip->multichannel = 1;
1234
1235 if (!(chip->tea575x_tuner & TUNER_ONLY)) {
1236 if (reset_codec(chip) < 0) {
1237 dev_info(chip->card->dev,
1238 "Primary AC'97 codec not found, assume SF64-PCR (tuner-only)\n");
1239 chip->tea575x_tuner = 3 | TUNER_ONLY;
1240 } else {
1241 snd_fm801_chip_multichannel_init(chip);
1242 }
1243 }
1244
b56fa687 1245 if ((chip->tea575x_tuner & TUNER_ONLY) == 0) {
5618955c
AS		 1246 if (devm_request_irq(&pci->dev, pci->irq, snd_fm801_interrupt,
1247 IRQF_SHARED, KBUILD_MODNAME, chip)) {
1248 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
6bbe13ec
JK		 1249 snd_fm801_free(chip);
1250 return -EBUSY;
1251 }
1252 chip->irq = pci->irq;
e41dbd20 1253 card->sync_irq = chip->irq;
6bbe13ec 1254 pci_set_master(pci);
1da177e4 1255 }
1da177e4 1256
610e1ae9
AS		 1257 snd_fm801_chip_init(chip);
1258
1da177e4
LT		 1259 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1260 snd_fm801_free(chip);
1261 return err;
1262 }
1263
fdb62b50 1264#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b
HV		 1265 err = v4l2_device_register(&pci->dev, &chip->v4l2_dev);
1266 if (err < 0) {
1267 snd_fm801_free(chip);
1268 return err;
1269 }
1270 chip->tea.v4l2_dev = &chip->v4l2_dev;
1271 chip->tea.radio_nr = radio_nr;
d7ba858a
OZ		 1272 chip->tea.private_data = chip;
1273 chip->tea.ops = &snd_fm801_tea_ops;
10ca7201 1274 sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci));
b56fa687
AS		 1275 if ((chip->tea575x_tuner & TUNER_TYPE_MASK) > 0 &&
1276 (chip->tea575x_tuner & TUNER_TYPE_MASK) < 4) {
5daf53a6 1277 if (snd_tea575x_init(&chip->tea, THIS_MODULE)) {
9c7f9abf 1278 dev_err(card->dev, "TEA575x radio not found\n");
d4ecc83b 1279 snd_fm801_free(chip);
96760015
DC		 1280 return -ENODEV;
1281 }
b56fa687
AS		 1282 } else if ((chip->tea575x_tuner & TUNER_TYPE_MASK) == 0) {
1283 unsigned int tuner_only = chip->tea575x_tuner & TUNER_ONLY;
dbec6719 1284
d7ba858a
OZ		 1285 /* autodetect tuner connection */
1286 for (tea575x_tuner = 1; tea575x_tuner <= 3; tea575x_tuner++) {
1287 chip->tea575x_tuner = tea575x_tuner;
5daf53a6 1288 if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) {
9c7f9abf
TI		 1289 dev_info(card->dev,
1290 "detected TEA575x radio type %s\n",
8e699d2c 1291 get_tea575x_gpio(chip)->name);
d7ba858a
OZ		 1292 break;
1293 }
1294 }
96760015 1295 if (tea575x_tuner == 4) {
9c7f9abf 1296 dev_err(card->dev, "TEA575x radio not found\n");
c37279b9 1297 chip->tea575x_tuner = TUNER_DISABLED;
96760015 1298 }
dbec6719
AS		 1299
1300 chip->tea575x_tuner |= tuner_only;
96760015 1301 }
c37279b9 1302 if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
75b1a8f9 1303 strscpy(chip->tea.card, get_tea575x_gpio(chip)->name,
c37279b9
BH		 1304 sizeof(chip->tea.card));
1305 }
1da177e4
LT		 1306#endif
1307
1308 *rchip = chip;
1309 return 0;
1310}
1311
e23e7a14
BP		 1312static int snd_card_fm801_probe(struct pci_dev *pci,
1313 const struct pci_device_id *pci_id)
1da177e4
LT		 1314{
1315 static int dev;
a5f22156
TI		 1316 struct snd_card *card;
1317 struct fm801 *chip;
1318 struct snd_opl3 *opl3;
1da177e4
LT		 1319 int err;
1320
1321 if (dev >= SNDRV_CARDS)
1322 return -ENODEV;
1323 if (!enable[dev]) {
1324 dev++;
1325 return -ENOENT;
1326 }
1327
60c5772b
TI		 1328 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1329 0, &card);
e58de7ba
TI		 1330 if (err < 0)
1331 return err;
d4ecc83b 1332 if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], radio_nr[dev], &chip)) < 0) {
1da177e4
LT		 1333 snd_card_free(card);
1334 return err;
1335 }
b1e9ed26 1336 card->private_data = chip;
1da177e4
LT		 1337
1338 strcpy(card->driver, "FM801");
1339 strcpy(card->shortname, "ForteMedia FM801-");
1340 strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1341 sprintf(card->longname, "%s at 0x%lx, irq %i",
1342 card->shortname, chip->port, chip->irq);
1343
fb716c0b 1344 if (chip->tea575x_tuner & TUNER_ONLY)
e0a5d82a
AS		 1345 goto __fm801_tuner_only;
1346
483337f9 1347 if ((err = snd_fm801_pcm(chip, 0)) < 0) {
1da177e4
LT		 1348 snd_card_free(card);
1349 return err;
1350 }
1351 if ((err = snd_fm801_mixer(chip)) < 0) {
1352 snd_card_free(card);
1353 return err;
1354 }
1355 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
215dacc2 1356 chip->port + FM801_MPU401_DATA,
dba8b469
CL		 1357 MPU401_INFO_INTEGRATED |
1358 MPU401_INFO_IRQ_HOOK,
1359 -1, &chip->rmidi)) < 0) {
1da177e4
LT		 1360 snd_card_free(card);
1361 return err;
1362 }
215dacc2
AS		 1363 if ((err = snd_opl3_create(card, chip->port + FM801_OPL3_BANK0,
1364 chip->port + FM801_OPL3_BANK1,
1da177e4
LT		 1365 OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) {
1366 snd_card_free(card);
1367 return err;
1368 }
1369 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1370 snd_card_free(card);
1371 return err;
1372 }
1373
e0a5d82a 1374 __fm801_tuner_only:
1da177e4
LT		 1375 if ((err = snd_card_register(card)) < 0) {
1376 snd_card_free(card);
1377 return err;
1378 }
1379 pci_set_drvdata(pci, card);
1380 dev++;
1381 return 0;
1382}
1383
e23e7a14 1384static void snd_card_fm801_remove(struct pci_dev *pci)
1da177e4
LT		 1385{
1386 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT		 1387}
1388
c7561cd8 1389#ifdef CONFIG_PM_SLEEP
8045d0fc 1390static const unsigned char saved_regs[] = {
b1e9ed26
TI		 1391 FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC,
1392 FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2,
1393 FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2,
1394 FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL,
1395};
1396
68cb2b55 1397static int snd_fm801_suspend(struct device *dev)
b1e9ed26 1398{
68cb2b55 1399 struct snd_card *card = dev_get_drvdata(dev);
b1e9ed26
TI		 1400 struct fm801 *chip = card->private_data;
1401 int i;
1402
1403 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
14da04b5 1404
b1e9ed26 1405 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
37ba8fca
AS		 1406 chip->saved_regs[i] = fm801_ioread16(chip, saved_regs[i]);
1407
14da04b5
AS		 1408 if (chip->tea575x_tuner & TUNER_ONLY) {
1409 /* FIXME: tea575x suspend */
1410 } else {
14da04b5
AS		 1411 snd_ac97_suspend(chip->ac97);
1412 snd_ac97_suspend(chip->ac97_sec);
1413 }
1414
b1e9ed26
TI		 1415 return 0;
1416}
1417
68cb2b55 1418static int snd_fm801_resume(struct device *dev)
b1e9ed26 1419{
68cb2b55 1420 struct snd_card *card = dev_get_drvdata(dev);
b1e9ed26
TI		 1421 struct fm801 *chip = card->private_data;
1422 int i;
1423
b56fa687
AS		 1424 if (chip->tea575x_tuner & TUNER_ONLY) {
1425 snd_fm801_chip_init(chip);
1426 } else {
1427 reset_codec(chip);
1428 snd_fm801_chip_multichannel_init(chip);
1429 snd_fm801_chip_init(chip);
14da04b5
AS		 1430 snd_ac97_resume(chip->ac97);
1431 snd_ac97_resume(chip->ac97_sec);
b56fa687 1432 }
14da04b5 1433
b1e9ed26 1434 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
4b5c15f7 1435 fm801_iowrite16(chip, saved_regs[i], chip->saved_regs[i]);
b1e9ed26 1436
cb41f271
AS		 1437#ifdef CONFIG_SND_FM801_TEA575X_BOOL
1438 if (!(chip->tea575x_tuner & TUNER_DISABLED))
1439 snd_tea575x_set_freq(&chip->tea);
1440#endif
b1e9ed26
TI		 1441
1442 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1443 return 0;
1444}
68cb2b55
TI		 1445
1446static SIMPLE_DEV_PM_OPS(snd_fm801_pm, snd_fm801_suspend, snd_fm801_resume);
1447#define SND_FM801_PM_OPS &snd_fm801_pm
1448#else
1449#define SND_FM801_PM_OPS NULL
c7561cd8 1450#endif /* CONFIG_PM_SLEEP */
b1e9ed26 1451
e9f66d9b 1452static struct pci_driver fm801_driver = {
3733e424 1453 .name = KBUILD_MODNAME,
1da177e4
LT		 1454 .id_table = snd_fm801_ids,
1455 .probe = snd_card_fm801_probe,
e23e7a14 1456 .remove = snd_card_fm801_remove,
68cb2b55
TI		 1457 .driver = {
1458 .pm = SND_FM801_PM_OPS,
1459 },
1da177e4
LT		 1460};
1461
e9f66d9b 1462module_pci_driver(fm801_driver);
Linux 6.x block layer and io_uring tree(s)