ALSA: fm801: introduce macros to access the hardware
[linux-2.6-block.git] / sound / pci / fm801.c
CommitLineData
1da177e4
LT
1/*
2 * The driver for the ForteMedia FM801 based soundcards
c1017a4c 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4 4 *
e0a5d82a 5 * Support FM only card by Andy Shevchenko <andy@smile.org.ua>
1da177e4
LT
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
1da177e4
LT
23#include <linux/delay.h>
24#include <linux/init.h>
25#include <linux/interrupt.h>
215dacc2 26#include <linux/io.h>
1da177e4
LT
27#include <linux/pci.h>
28#include <linux/slab.h>
65a77217 29#include <linux/module.h>
1da177e4
LT
30#include <sound/core.h>
31#include <sound/pcm.h>
666c70ff 32#include <sound/tlv.h>
1da177e4
LT
33#include <sound/ac97_codec.h>
34#include <sound/mpu401.h>
35#include <sound/opl3.h>
36#include <sound/initval.h>
37
efce4bb9 38#ifdef CONFIG_SND_FM801_TEA575X_BOOL
59b56459 39#include <media/tea575x.h>
1da177e4
LT
40#endif
41
c1017a4c 42MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT
43MODULE_DESCRIPTION("ForteMedia FM801");
44MODULE_LICENSE("GPL");
45MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801},"
46 "{Genius,SoundMaker Live 5.1}}");
47
48static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
49static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 50static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
1da177e4
LT
51/*
52 * Enable TEA575x tuner
53 * 1 = MediaForte 256-PCS
d7ba858a 54 * 2 = MediaForte 256-PCP
1da177e4 55 * 3 = MediaForte 64-PCR
fb716c0b 56 * 16 = setup tuner only (this is additional bit), i.e. SF64-PCR FM card
1da177e4
LT
57 * High 16-bits are video (radio) device number + 1
58 */
6581f4e7 59static int tea575x_tuner[SNDRV_CARDS];
d4ecc83b 60static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
1da177e4
LT
61
62module_param_array(index, int, NULL, 0444);
63MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
64module_param_array(id, charp, NULL, 0444);
65MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
66module_param_array(enable, bool, NULL, 0444);
67MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
68module_param_array(tea575x_tuner, int, NULL, 0444);
d7ba858a 69MODULE_PARM_DESC(tea575x_tuner, "TEA575x tuner access method (0 = auto, 1 = SF256-PCS, 2=SF256-PCP, 3=SF64-PCR, 8=disable, +16=tuner-only).");
d4ecc83b
HV
70module_param_array(radio_nr, int, NULL, 0444);
71MODULE_PARM_DESC(radio_nr, "Radio device numbers");
72
fb716c0b 73
c37279b9 74#define TUNER_DISABLED (1<<3)
fb716c0b
OZ
75#define TUNER_ONLY (1<<4)
76#define TUNER_TYPE_MASK (~TUNER_ONLY & 0xFFFF)
1da177e4
LT
77
78/*
79 * Direct registers
80 */
81
215dacc2
AS
82#define fm801_writew(chip,reg,value) outw((value), chip->port + FM801_##reg)
83#define fm801_readw(chip,reg) inw(chip->port + FM801_##reg)
84
85#define fm801_writel(chip,reg,value) outl((value), chip->port + FM801_##reg)
1da177e4
LT
86
87#define FM801_PCM_VOL 0x00 /* PCM Output Volume */
88#define FM801_FM_VOL 0x02 /* FM Output Volume */
89#define FM801_I2S_VOL 0x04 /* I2S Volume */
90#define FM801_REC_SRC 0x06 /* Record Source */
91#define FM801_PLY_CTRL 0x08 /* Playback Control */
92#define FM801_PLY_COUNT 0x0a /* Playback Count */
93#define FM801_PLY_BUF1 0x0c /* Playback Bufer I */
94#define FM801_PLY_BUF2 0x10 /* Playback Buffer II */
95#define FM801_CAP_CTRL 0x14 /* Capture Control */
96#define FM801_CAP_COUNT 0x16 /* Capture Count */
97#define FM801_CAP_BUF1 0x18 /* Capture Buffer I */
98#define FM801_CAP_BUF2 0x1c /* Capture Buffer II */
99#define FM801_CODEC_CTRL 0x22 /* Codec Control */
100#define FM801_I2S_MODE 0x24 /* I2S Mode Control */
101#define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */
102#define FM801_I2C_CTRL 0x29 /* I2C Control */
103#define FM801_AC97_CMD 0x2a /* AC'97 Command */
104#define FM801_AC97_DATA 0x2c /* AC'97 Data */
105#define FM801_MPU401_DATA 0x30 /* MPU401 Data */
106#define FM801_MPU401_CMD 0x31 /* MPU401 Command */
107#define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */
108#define FM801_GEN_CTRL 0x54 /* General Control */
109#define FM801_IRQ_MASK 0x56 /* Interrupt Mask */
110#define FM801_IRQ_STATUS 0x5a /* Interrupt Status */
111#define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */
112#define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */
113#define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */
114#define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */
115#define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */
116
b1e9ed26
TI
117/* codec access */
118#define FM801_AC97_READ (1<<7) /* read=1, write=0 */
119#define FM801_AC97_VALID (1<<8) /* port valid=1 */
120#define FM801_AC97_BUSY (1<<9) /* busy=1 */
121#define FM801_AC97_ADDR_SHIFT 10 /* codec id (2bit) */
1da177e4
LT
122
123/* playback and record control register bits */
124#define FM801_BUF1_LAST (1<<1)
125#define FM801_BUF2_LAST (1<<2)
126#define FM801_START (1<<5)
127#define FM801_PAUSE (1<<6)
128#define FM801_IMMED_STOP (1<<7)
129#define FM801_RATE_SHIFT 8
130#define FM801_RATE_MASK (15 << FM801_RATE_SHIFT)
131#define FM801_CHANNELS_4 (1<<12) /* playback only */
132#define FM801_CHANNELS_6 (2<<12) /* playback only */
133#define FM801_CHANNELS_6MS (3<<12) /* playback only */
134#define FM801_CHANNELS_MASK (3<<12)
135#define FM801_16BIT (1<<14)
136#define FM801_STEREO (1<<15)
137
138/* IRQ status bits */
139#define FM801_IRQ_PLAYBACK (1<<8)
140#define FM801_IRQ_CAPTURE (1<<9)
141#define FM801_IRQ_VOLUME (1<<14)
142#define FM801_IRQ_MPU (1<<15)
143
144/* GPIO control register */
145#define FM801_GPIO_GP0 (1<<0) /* read/write */
146#define FM801_GPIO_GP1 (1<<1)
147#define FM801_GPIO_GP2 (1<<2)
148#define FM801_GPIO_GP3 (1<<3)
149#define FM801_GPIO_GP(x) (1<<(0+(x)))
150#define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/
151#define FM801_GPIO_GD1 (1<<9)
152#define FM801_GPIO_GD2 (1<<10)
153#define FM801_GPIO_GD3 (1<<11)
154#define FM801_GPIO_GD(x) (1<<(8+(x)))
155#define FM801_GPIO_GS0 (1<<12) /* function select: */
156#define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */
157#define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */
158#define FM801_GPIO_GS3 (1<<15)
159#define FM801_GPIO_GS(x) (1<<(12+(x)))
160
161/*
162
163 */
164
a5f22156 165struct fm801 {
1da177e4
LT
166 int irq;
167
168 unsigned long port; /* I/O port number */
169 unsigned int multichannel: 1, /* multichannel support */
170 secondary: 1; /* secondary codec */
171 unsigned char secondary_addr; /* address of the secondary codec */
fb716c0b 172 unsigned int tea575x_tuner; /* tuner access method & flags */
1da177e4
LT
173
174 unsigned short ply_ctrl; /* playback control */
175 unsigned short cap_ctrl; /* capture control */
176
177 unsigned long ply_buffer;
178 unsigned int ply_buf;
179 unsigned int ply_count;
180 unsigned int ply_size;
181 unsigned int ply_pos;
182
183 unsigned long cap_buffer;
184 unsigned int cap_buf;
185 unsigned int cap_count;
186 unsigned int cap_size;
187 unsigned int cap_pos;
188
a5f22156
TI
189 struct snd_ac97_bus *ac97_bus;
190 struct snd_ac97 *ac97;
191 struct snd_ac97 *ac97_sec;
1da177e4
LT
192
193 struct pci_dev *pci;
a5f22156
TI
194 struct snd_card *card;
195 struct snd_pcm *pcm;
196 struct snd_rawmidi *rmidi;
197 struct snd_pcm_substream *playback_substream;
198 struct snd_pcm_substream *capture_substream;
1da177e4
LT
199 unsigned int p_dma_size;
200 unsigned int c_dma_size;
201
202 spinlock_t reg_lock;
a5f22156 203 struct snd_info_entry *proc_entry;
1da177e4 204
fdb62b50 205#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b 206 struct v4l2_device v4l2_dev;
a5f22156 207 struct snd_tea575x tea;
1da177e4 208#endif
b1e9ed26 209
c7561cd8 210#ifdef CONFIG_PM_SLEEP
b1e9ed26
TI
211 u16 saved_regs[0x20];
212#endif
1da177e4
LT
213};
214
cebe41d4 215static DEFINE_PCI_DEVICE_TABLE(snd_fm801_ids) = {
1da177e4 216 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */
26be8659 217 { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */
1da177e4
LT
218 { 0, }
219};
220
221MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
222
223/*
224 * common I/O routines
225 */
226
a5f22156 227static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg,
1da177e4
LT
228 unsigned short mask, unsigned short value)
229{
230 int change;
231 unsigned long flags;
232 unsigned short old, new;
233
234 spin_lock_irqsave(&chip->reg_lock, flags);
235 old = inw(chip->port + reg);
236 new = (old & ~mask) | value;
237 change = old != new;
238 if (change)
239 outw(new, chip->port + reg);
240 spin_unlock_irqrestore(&chip->reg_lock, flags);
241 return change;
242}
243
a5f22156 244static void snd_fm801_codec_write(struct snd_ac97 *ac97,
1da177e4
LT
245 unsigned short reg,
246 unsigned short val)
247{
a5f22156 248 struct fm801 *chip = ac97->private_data;
1da177e4
LT
249 int idx;
250
251 /*
252 * Wait until the codec interface is not ready..
253 */
254 for (idx = 0; idx < 100; idx++) {
215dacc2 255 if (!(fm801_readw(chip, AC97_CMD) & FM801_AC97_BUSY))
1da177e4
LT
256 goto ok1;
257 udelay(10);
258 }
9c7f9abf 259 dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
1da177e4
LT
260 return;
261
262 ok1:
263 /* write data and address */
215dacc2
AS
264 fm801_writew(chip, AC97_DATA, val);
265 fm801_writew(chip, AC97_CMD, reg | (ac97->addr << FM801_AC97_ADDR_SHIFT));
1da177e4
LT
266 /*
267 * Wait until the write command is not completed..
268 */
269 for (idx = 0; idx < 1000; idx++) {
215dacc2 270 if (!(fm801_readw(chip, AC97_CMD) & FM801_AC97_BUSY))
1da177e4
LT
271 return;
272 udelay(10);
273 }
9c7f9abf 274 dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n", ac97->num);
1da177e4
LT
275}
276
a5f22156 277static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 278{
a5f22156 279 struct fm801 *chip = ac97->private_data;
1da177e4
LT
280 int idx;
281
282 /*
283 * Wait until the codec interface is not ready..
284 */
285 for (idx = 0; idx < 100; idx++) {
215dacc2 286 if (!(fm801_readw(chip, AC97_CMD) & FM801_AC97_BUSY))
1da177e4
LT
287 goto ok1;
288 udelay(10);
289 }
9c7f9abf 290 dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
1da177e4
LT
291 return 0;
292
293 ok1:
294 /* read command */
215dacc2
AS
295 fm801_writew(chip, AC97_CMD,
296 reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
1da177e4 297 for (idx = 0; idx < 100; idx++) {
215dacc2 298 if (!(fm801_readw(chip, AC97_CMD) & FM801_AC97_BUSY))
1da177e4
LT
299 goto ok2;
300 udelay(10);
301 }
9c7f9abf 302 dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n", ac97->num);
1da177e4
LT
303 return 0;
304
305 ok2:
306 for (idx = 0; idx < 1000; idx++) {
215dacc2 307 if (fm801_readw(chip, AC97_CMD) & FM801_AC97_VALID)
1da177e4
LT
308 goto ok3;
309 udelay(10);
310 }
9c7f9abf 311 dev_err(chip->card->dev, "AC'97 interface #%d is not valid (2)\n", ac97->num);
1da177e4
LT
312 return 0;
313
314 ok3:
215dacc2 315 return fm801_readw(chip, AC97_DATA);
1da177e4
LT
316}
317
318static unsigned int rates[] = {
319 5500, 8000, 9600, 11025,
320 16000, 19200, 22050, 32000,
321 38400, 44100, 48000
322};
323
a5f22156 324static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
1da177e4
LT
325 .count = ARRAY_SIZE(rates),
326 .list = rates,
327 .mask = 0,
328};
329
330static unsigned int channels[] = {
331 2, 4, 6
332};
333
a5f22156 334static struct snd_pcm_hw_constraint_list hw_constraints_channels = {
5e4968e2 335 .count = ARRAY_SIZE(channels),
1da177e4
LT
336 .list = channels,
337 .mask = 0,
338};
339
340/*
341 * Sample rate routines
342 */
343
344static unsigned short snd_fm801_rate_bits(unsigned int rate)
345{
346 unsigned int idx;
347
348 for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
349 if (rates[idx] == rate)
350 return idx;
351 snd_BUG();
352 return ARRAY_SIZE(rates) - 1;
353}
354
355/*
356 * PCM part
357 */
358
a5f22156 359static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
360 int cmd)
361{
a5f22156 362 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
363
364 spin_lock(&chip->reg_lock);
365 switch (cmd) {
366 case SNDRV_PCM_TRIGGER_START:
367 chip->ply_ctrl &= ~(FM801_BUF1_LAST |
368 FM801_BUF2_LAST |
369 FM801_PAUSE);
370 chip->ply_ctrl |= FM801_START |
371 FM801_IMMED_STOP;
372 break;
373 case SNDRV_PCM_TRIGGER_STOP:
374 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
375 break;
376 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
b1e9ed26 377 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT
378 chip->ply_ctrl |= FM801_PAUSE;
379 break;
380 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
b1e9ed26 381 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT
382 chip->ply_ctrl &= ~FM801_PAUSE;
383 break;
384 default:
385 spin_unlock(&chip->reg_lock);
386 snd_BUG();
387 return -EINVAL;
388 }
215dacc2 389 fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
1da177e4
LT
390 spin_unlock(&chip->reg_lock);
391 return 0;
392}
393
a5f22156 394static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
395 int cmd)
396{
a5f22156 397 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
398
399 spin_lock(&chip->reg_lock);
400 switch (cmd) {
401 case SNDRV_PCM_TRIGGER_START:
402 chip->cap_ctrl &= ~(FM801_BUF1_LAST |
403 FM801_BUF2_LAST |
404 FM801_PAUSE);
405 chip->cap_ctrl |= FM801_START |
406 FM801_IMMED_STOP;
407 break;
408 case SNDRV_PCM_TRIGGER_STOP:
409 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
410 break;
411 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
b1e9ed26 412 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT
413 chip->cap_ctrl |= FM801_PAUSE;
414 break;
415 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
b1e9ed26 416 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT
417 chip->cap_ctrl &= ~FM801_PAUSE;
418 break;
419 default:
420 spin_unlock(&chip->reg_lock);
421 snd_BUG();
422 return -EINVAL;
423 }
215dacc2 424 fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
1da177e4
LT
425 spin_unlock(&chip->reg_lock);
426 return 0;
427}
428
a5f22156
TI
429static int snd_fm801_hw_params(struct snd_pcm_substream *substream,
430 struct snd_pcm_hw_params *hw_params)
1da177e4
LT
431{
432 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
433}
434
a5f22156 435static int snd_fm801_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT
436{
437 return snd_pcm_lib_free_pages(substream);
438}
439
a5f22156 440static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 441{
a5f22156
TI
442 struct fm801 *chip = snd_pcm_substream_chip(substream);
443 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
444
445 chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
446 chip->ply_count = snd_pcm_lib_period_bytes(substream);
447 spin_lock_irq(&chip->reg_lock);
448 chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
449 FM801_STEREO | FM801_RATE_MASK |
450 FM801_CHANNELS_MASK);
451 if (snd_pcm_format_width(runtime->format) == 16)
452 chip->ply_ctrl |= FM801_16BIT;
453 if (runtime->channels > 1) {
454 chip->ply_ctrl |= FM801_STEREO;
455 if (runtime->channels == 4)
456 chip->ply_ctrl |= FM801_CHANNELS_4;
457 else if (runtime->channels == 6)
458 chip->ply_ctrl |= FM801_CHANNELS_6;
459 }
460 chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
461 chip->ply_buf = 0;
215dacc2
AS
462 fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
463 fm801_writew(chip, PLY_COUNT, chip->ply_count - 1);
1da177e4
LT
464 chip->ply_buffer = runtime->dma_addr;
465 chip->ply_pos = 0;
215dacc2
AS
466 fm801_writel(chip, PLY_BUF1, chip->ply_buffer);
467 fm801_writel(chip, PLY_BUF2,
468 chip->ply_buffer + (chip->ply_count % chip->ply_size));
1da177e4
LT
469 spin_unlock_irq(&chip->reg_lock);
470 return 0;
471}
472
a5f22156 473static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 474{
a5f22156
TI
475 struct fm801 *chip = snd_pcm_substream_chip(substream);
476 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
477
478 chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
479 chip->cap_count = snd_pcm_lib_period_bytes(substream);
480 spin_lock_irq(&chip->reg_lock);
481 chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
482 FM801_STEREO | FM801_RATE_MASK);
483 if (snd_pcm_format_width(runtime->format) == 16)
484 chip->cap_ctrl |= FM801_16BIT;
485 if (runtime->channels > 1)
486 chip->cap_ctrl |= FM801_STEREO;
487 chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
488 chip->cap_buf = 0;
215dacc2
AS
489 fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
490 fm801_writew(chip, CAP_COUNT, chip->cap_count - 1);
1da177e4
LT
491 chip->cap_buffer = runtime->dma_addr;
492 chip->cap_pos = 0;
215dacc2
AS
493 fm801_writel(chip, CAP_BUF1, chip->cap_buffer);
494 fm801_writel(chip, CAP_BUF2,
495 chip->cap_buffer + (chip->cap_count % chip->cap_size));
1da177e4
LT
496 spin_unlock_irq(&chip->reg_lock);
497 return 0;
498}
499
a5f22156 500static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 501{
a5f22156 502 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
503 size_t ptr;
504
505 if (!(chip->ply_ctrl & FM801_START))
506 return 0;
507 spin_lock(&chip->reg_lock);
215dacc2
AS
508 ptr = chip->ply_pos + (chip->ply_count - 1) - fm801_readw(chip, PLY_COUNT);
509 if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_PLAYBACK) {
1da177e4
LT
510 ptr += chip->ply_count;
511 ptr %= chip->ply_size;
512 }
513 spin_unlock(&chip->reg_lock);
514 return bytes_to_frames(substream->runtime, ptr);
515}
516
a5f22156 517static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 518{
a5f22156 519 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
520 size_t ptr;
521
522 if (!(chip->cap_ctrl & FM801_START))
523 return 0;
524 spin_lock(&chip->reg_lock);
215dacc2
AS
525 ptr = chip->cap_pos + (chip->cap_count - 1) - fm801_readw(chip, CAP_COUNT);
526 if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_CAPTURE) {
1da177e4
LT
527 ptr += chip->cap_count;
528 ptr %= chip->cap_size;
529 }
530 spin_unlock(&chip->reg_lock);
531 return bytes_to_frames(substream->runtime, ptr);
532}
533
7d12e780 534static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id)
1da177e4 535{
a5f22156 536 struct fm801 *chip = dev_id;
1da177e4
LT
537 unsigned short status;
538 unsigned int tmp;
539
215dacc2 540 status = fm801_readw(chip, IRQ_STATUS);
1da177e4
LT
541 status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
542 if (! status)
543 return IRQ_NONE;
544 /* ack first */
215dacc2 545 fm801_writew(chip, IRQ_STATUS, status);
1da177e4
LT
546 if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
547 spin_lock(&chip->reg_lock);
548 chip->ply_buf++;
549 chip->ply_pos += chip->ply_count;
550 chip->ply_pos %= chip->ply_size;
551 tmp = chip->ply_pos + chip->ply_count;
552 tmp %= chip->ply_size;
215dacc2
AS
553 if (chip->ply_buf & 1)
554 fm801_writel(chip, PLY_BUF1, chip->ply_buffer + tmp);
555 else
556 fm801_writel(chip, PLY_BUF2, chip->ply_buffer + tmp);
1da177e4
LT
557 spin_unlock(&chip->reg_lock);
558 snd_pcm_period_elapsed(chip->playback_substream);
559 }
560 if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
561 spin_lock(&chip->reg_lock);
562 chip->cap_buf++;
563 chip->cap_pos += chip->cap_count;
564 chip->cap_pos %= chip->cap_size;
565 tmp = chip->cap_pos + chip->cap_count;
566 tmp %= chip->cap_size;
215dacc2
AS
567 if (chip->cap_buf & 1)
568 fm801_writel(chip, CAP_BUF1, chip->cap_buffer + tmp);
569 else
570 fm801_writel(chip, CAP_BUF2, chip->cap_buffer + tmp);
1da177e4
LT
571 spin_unlock(&chip->reg_lock);
572 snd_pcm_period_elapsed(chip->capture_substream);
573 }
574 if (chip->rmidi && (status & FM801_IRQ_MPU))
7d12e780 575 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT
576 if (status & FM801_IRQ_VOLUME)
577 ;/* TODO */
578
579 return IRQ_HANDLED;
580}
581
a5f22156 582static struct snd_pcm_hardware snd_fm801_playback =
1da177e4
LT
583{
584 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
585 SNDRV_PCM_INFO_BLOCK_TRANSFER |
b1e9ed26 586 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
1da177e4
LT
587 SNDRV_PCM_INFO_MMAP_VALID),
588 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
589 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
590 .rate_min = 5500,
591 .rate_max = 48000,
592 .channels_min = 1,
593 .channels_max = 2,
594 .buffer_bytes_max = (128*1024),
595 .period_bytes_min = 64,
596 .period_bytes_max = (128*1024),
597 .periods_min = 1,
598 .periods_max = 1024,
599 .fifo_size = 0,
600};
601
a5f22156 602static struct snd_pcm_hardware snd_fm801_capture =
1da177e4
LT
603{
604 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
605 SNDRV_PCM_INFO_BLOCK_TRANSFER |
b1e9ed26 606 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
1da177e4
LT
607 SNDRV_PCM_INFO_MMAP_VALID),
608 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
609 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
610 .rate_min = 5500,
611 .rate_max = 48000,
612 .channels_min = 1,
613 .channels_max = 2,
614 .buffer_bytes_max = (128*1024),
615 .period_bytes_min = 64,
616 .period_bytes_max = (128*1024),
617 .periods_min = 1,
618 .periods_max = 1024,
619 .fifo_size = 0,
620};
621
a5f22156 622static int snd_fm801_playback_open(struct snd_pcm_substream *substream)
1da177e4 623{
a5f22156
TI
624 struct fm801 *chip = snd_pcm_substream_chip(substream);
625 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
626 int err;
627
628 chip->playback_substream = substream;
629 runtime->hw = snd_fm801_playback;
a5f22156
TI
630 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
631 &hw_constraints_rates);
1da177e4
LT
632 if (chip->multichannel) {
633 runtime->hw.channels_max = 6;
a5f22156
TI
634 snd_pcm_hw_constraint_list(runtime, 0,
635 SNDRV_PCM_HW_PARAM_CHANNELS,
636 &hw_constraints_channels);
1da177e4
LT
637 }
638 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
639 return err;
640 return 0;
641}
642
a5f22156 643static int snd_fm801_capture_open(struct snd_pcm_substream *substream)
1da177e4 644{
a5f22156
TI
645 struct fm801 *chip = snd_pcm_substream_chip(substream);
646 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
647 int err;
648
649 chip->capture_substream = substream;
650 runtime->hw = snd_fm801_capture;
a5f22156
TI
651 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
652 &hw_constraints_rates);
1da177e4
LT
653 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
654 return err;
655 return 0;
656}
657
a5f22156 658static int snd_fm801_playback_close(struct snd_pcm_substream *substream)
1da177e4 659{
a5f22156 660 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
661
662 chip->playback_substream = NULL;
663 return 0;
664}
665
a5f22156 666static int snd_fm801_capture_close(struct snd_pcm_substream *substream)
1da177e4 667{
a5f22156 668 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
669
670 chip->capture_substream = NULL;
671 return 0;
672}
673
a5f22156 674static struct snd_pcm_ops snd_fm801_playback_ops = {
1da177e4
LT
675 .open = snd_fm801_playback_open,
676 .close = snd_fm801_playback_close,
677 .ioctl = snd_pcm_lib_ioctl,
678 .hw_params = snd_fm801_hw_params,
679 .hw_free = snd_fm801_hw_free,
680 .prepare = snd_fm801_playback_prepare,
681 .trigger = snd_fm801_playback_trigger,
682 .pointer = snd_fm801_playback_pointer,
683};
684
a5f22156 685static struct snd_pcm_ops snd_fm801_capture_ops = {
1da177e4
LT
686 .open = snd_fm801_capture_open,
687 .close = snd_fm801_capture_close,
688 .ioctl = snd_pcm_lib_ioctl,
689 .hw_params = snd_fm801_hw_params,
690 .hw_free = snd_fm801_hw_free,
691 .prepare = snd_fm801_capture_prepare,
692 .trigger = snd_fm801_capture_trigger,
693 .pointer = snd_fm801_capture_pointer,
694};
695
e23e7a14 696static int snd_fm801_pcm(struct fm801 *chip, int device, struct snd_pcm **rpcm)
1da177e4 697{
a5f22156 698 struct snd_pcm *pcm;
1da177e4
LT
699 int err;
700
701 if (rpcm)
702 *rpcm = NULL;
703 if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0)
704 return err;
705
706 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
707 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
708
709 pcm->private_data = chip;
1da177e4
LT
710 pcm->info_flags = 0;
711 strcpy(pcm->name, "FM801");
712 chip->pcm = pcm;
713
714 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
715 snd_dma_pci_data(chip->pci),
716 chip->multichannel ? 128*1024 : 64*1024, 128*1024);
717
e36e3b86
TI
718 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
719 snd_pcm_alt_chmaps,
720 chip->multichannel ? 6 : 2, 0,
721 NULL);
722 if (err < 0)
723 return err;
724
1da177e4
LT
725 if (rpcm)
726 *rpcm = pcm;
727 return 0;
728}
729
730/*
731 * TEA5757 radio
732 */
733
fdb62b50 734#ifdef CONFIG_SND_FM801_TEA575X_BOOL
1da177e4 735
938a1566
OZ
736/* GPIO to TEA575x maps */
737struct snd_fm801_tea575x_gpio {
738 u8 data, clk, wren, most;
d7ba858a 739 char *name;
938a1566 740};
1da177e4 741
938a1566 742static struct snd_fm801_tea575x_gpio snd_fm801_tea575x_gpios[] = {
d7ba858a
OZ
743 { .data = 1, .clk = 3, .wren = 2, .most = 0, .name = "SF256-PCS" },
744 { .data = 1, .clk = 0, .wren = 2, .most = 3, .name = "SF256-PCP" },
745 { .data = 2, .clk = 0, .wren = 1, .most = 3, .name = "SF64-PCR" },
938a1566 746};
1da177e4 747
8e699d2c
TI
748#define get_tea575x_gpio(chip) \
749 (&snd_fm801_tea575x_gpios[((chip)->tea575x_tuner & TUNER_TYPE_MASK) - 1])
750
938a1566 751static void snd_fm801_tea575x_set_pins(struct snd_tea575x *tea, u8 pins)
1da177e4 752{
a5f22156 753 struct fm801 *chip = tea->private_data;
215dacc2 754 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 755 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
1da177e4 756
938a1566
OZ
757 reg &= ~(FM801_GPIO_GP(gpio.data) |
758 FM801_GPIO_GP(gpio.clk) |
759 FM801_GPIO_GP(gpio.wren));
1da177e4 760
938a1566
OZ
761 reg |= (pins & TEA575X_DATA) ? FM801_GPIO_GP(gpio.data) : 0;
762 reg |= (pins & TEA575X_CLK) ? FM801_GPIO_GP(gpio.clk) : 0;
763 /* WRITE_ENABLE is inverted */
764 reg |= (pins & TEA575X_WREN) ? 0 : FM801_GPIO_GP(gpio.wren);
1da177e4 765
215dacc2 766 fm801_writew(chip, GPIO_CTRL, reg);
1da177e4
LT
767}
768
938a1566 769static u8 snd_fm801_tea575x_get_pins(struct snd_tea575x *tea)
1da177e4 770{
a5f22156 771 struct fm801 *chip = tea->private_data;
215dacc2 772 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 773 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
effded75
DC
774 u8 ret;
775
776 ret = 0;
777 if (reg & FM801_GPIO_GP(gpio.data))
778 ret |= TEA575X_DATA;
779 if (reg & FM801_GPIO_GP(gpio.most))
780 ret |= TEA575X_MOST;
781 return ret;
1da177e4
LT
782}
783
938a1566 784static void snd_fm801_tea575x_set_direction(struct snd_tea575x *tea, bool output)
1da177e4 785{
a5f22156 786 struct fm801 *chip = tea->private_data;
215dacc2 787 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 788 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
1da177e4 789
1da177e4 790 /* use GPIO lines and set write enable bit */
938a1566
OZ
791 reg |= FM801_GPIO_GS(gpio.data) |
792 FM801_GPIO_GS(gpio.wren) |
793 FM801_GPIO_GS(gpio.clk) |
794 FM801_GPIO_GS(gpio.most);
795 if (output) {
796 /* all of lines are in the write direction */
797 /* clear data and clock lines */
798 reg &= ~(FM801_GPIO_GD(gpio.data) |
799 FM801_GPIO_GD(gpio.wren) |
800 FM801_GPIO_GD(gpio.clk) |
801 FM801_GPIO_GP(gpio.data) |
802 FM801_GPIO_GP(gpio.clk) |
803 FM801_GPIO_GP(gpio.wren));
804 } else {
805 /* use GPIO lines, set data direction to input */
806 reg |= FM801_GPIO_GD(gpio.data) |
807 FM801_GPIO_GD(gpio.most) |
808 FM801_GPIO_GP(gpio.data) |
809 FM801_GPIO_GP(gpio.most) |
810 FM801_GPIO_GP(gpio.wren);
811 /* all of lines are in the write direction, except data */
812 /* clear data, write enable and clock lines */
813 reg &= ~(FM801_GPIO_GD(gpio.wren) |
814 FM801_GPIO_GD(gpio.clk) |
815 FM801_GPIO_GP(gpio.clk));
1da177e4
LT
816 }
817
215dacc2 818 fm801_writew(chip, GPIO_CTRL, reg);
69252128
AS
819}
820
938a1566
OZ
821static struct snd_tea575x_ops snd_fm801_tea_ops = {
822 .set_pins = snd_fm801_tea575x_set_pins,
823 .get_pins = snd_fm801_tea575x_get_pins,
824 .set_direction = snd_fm801_tea575x_set_direction,
1da177e4
LT
825};
826#endif
827
828/*
829 * Mixer routines
830 */
831
832#define FM801_SINGLE(xname, reg, shift, mask, invert) \
833{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
834 .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
835 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
836
a5f22156
TI
837static int snd_fm801_info_single(struct snd_kcontrol *kcontrol,
838 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
839{
840 int mask = (kcontrol->private_value >> 16) & 0xff;
841
842 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
843 uinfo->count = 1;
844 uinfo->value.integer.min = 0;
845 uinfo->value.integer.max = mask;
846 return 0;
847}
848
a5f22156
TI
849static int snd_fm801_get_single(struct snd_kcontrol *kcontrol,
850 struct snd_ctl_elem_value *ucontrol)
1da177e4 851{
a5f22156 852 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
853 int reg = kcontrol->private_value & 0xff;
854 int shift = (kcontrol->private_value >> 8) & 0xff;
855 int mask = (kcontrol->private_value >> 16) & 0xff;
856 int invert = (kcontrol->private_value >> 24) & 0xff;
857
858 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask;
859 if (invert)
860 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
861 return 0;
862}
863
a5f22156
TI
864static int snd_fm801_put_single(struct snd_kcontrol *kcontrol,
865 struct snd_ctl_elem_value *ucontrol)
1da177e4 866{
a5f22156 867 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
868 int reg = kcontrol->private_value & 0xff;
869 int shift = (kcontrol->private_value >> 8) & 0xff;
870 int mask = (kcontrol->private_value >> 16) & 0xff;
871 int invert = (kcontrol->private_value >> 24) & 0xff;
872 unsigned short val;
873
874 val = (ucontrol->value.integer.value[0] & mask);
875 if (invert)
876 val = mask - val;
877 return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
878}
879
880#define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
881{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
882 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
883 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
666c70ff
TI
884#define FM801_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
885{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
886 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
887 .name = xname, .info = snd_fm801_info_double, \
888 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
889 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
890 .tlv = { .p = (xtlv) } }
1da177e4 891
a5f22156
TI
892static int snd_fm801_info_double(struct snd_kcontrol *kcontrol,
893 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
894{
895 int mask = (kcontrol->private_value >> 16) & 0xff;
896
897 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
898 uinfo->count = 2;
899 uinfo->value.integer.min = 0;
900 uinfo->value.integer.max = mask;
901 return 0;
902}
903
a5f22156
TI
904static int snd_fm801_get_double(struct snd_kcontrol *kcontrol,
905 struct snd_ctl_elem_value *ucontrol)
1da177e4 906{
a5f22156 907 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
908 int reg = kcontrol->private_value & 0xff;
909 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
910 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
911 int mask = (kcontrol->private_value >> 16) & 0xff;
912 int invert = (kcontrol->private_value >> 24) & 0xff;
913
914 spin_lock_irq(&chip->reg_lock);
915 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask;
916 ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask;
917 spin_unlock_irq(&chip->reg_lock);
918 if (invert) {
919 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
920 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
921 }
922 return 0;
923}
924
a5f22156
TI
925static int snd_fm801_put_double(struct snd_kcontrol *kcontrol,
926 struct snd_ctl_elem_value *ucontrol)
1da177e4 927{
a5f22156 928 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
929 int reg = kcontrol->private_value & 0xff;
930 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
931 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
932 int mask = (kcontrol->private_value >> 16) & 0xff;
933 int invert = (kcontrol->private_value >> 24) & 0xff;
934 unsigned short val1, val2;
935
936 val1 = ucontrol->value.integer.value[0] & mask;
937 val2 = ucontrol->value.integer.value[1] & mask;
938 if (invert) {
939 val1 = mask - val1;
940 val2 = mask - val2;
941 }
942 return snd_fm801_update_bits(chip, reg,
943 (mask << shift_left) | (mask << shift_right),
944 (val1 << shift_left ) | (val2 << shift_right));
945}
946
a5f22156
TI
947static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol,
948 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
949{
950 static char *texts[5] = {
951 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
952 };
953
954 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
955 uinfo->count = 1;
956 uinfo->value.enumerated.items = 5;
957 if (uinfo->value.enumerated.item > 4)
958 uinfo->value.enumerated.item = 4;
959 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
960 return 0;
961}
962
a5f22156
TI
963static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol,
964 struct snd_ctl_elem_value *ucontrol)
1da177e4 965{
a5f22156 966 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
967 unsigned short val;
968
215dacc2 969 val = fm801_readw(chip, REC_SRC) & 7;
1da177e4
LT
970 if (val > 4)
971 val = 4;
972 ucontrol->value.enumerated.item[0] = val;
973 return 0;
974}
975
a5f22156
TI
976static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol,
977 struct snd_ctl_elem_value *ucontrol)
1da177e4 978{
a5f22156 979 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
980 unsigned short val;
981
982 if ((val = ucontrol->value.enumerated.item[0]) > 4)
983 return -EINVAL;
984 return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
985}
986
0cb29ea0 987static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -3450, 150, 0);
666c70ff 988
a5f22156 989#define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls)
1da177e4 990
e23e7a14 991static struct snd_kcontrol_new snd_fm801_controls[] = {
666c70ff
TI
992FM801_DOUBLE_TLV("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1,
993 db_scale_dsp),
1da177e4 994FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
666c70ff
TI
995FM801_DOUBLE_TLV("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1,
996 db_scale_dsp),
1da177e4 997FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
666c70ff
TI
998FM801_DOUBLE_TLV("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1,
999 db_scale_dsp),
1da177e4
LT
1000FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
1001{
1002 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1003 .name = "Digital Capture Source",
1004 .info = snd_fm801_info_mux,
1005 .get = snd_fm801_get_mux,
1006 .put = snd_fm801_put_mux,
1007}
1008};
1009
a5f22156 1010#define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi)
1da177e4 1011
e23e7a14 1012static struct snd_kcontrol_new snd_fm801_controls_multi[] = {
1da177e4
LT
1013FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1014FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
10e8d78a
CL
1015FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0),
1016FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0),
1017FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0),
1018FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0),
1da177e4
LT
1019};
1020
a5f22156 1021static void snd_fm801_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1022{
a5f22156 1023 struct fm801 *chip = bus->private_data;
1da177e4
LT
1024 chip->ac97_bus = NULL;
1025}
1026
a5f22156 1027static void snd_fm801_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1028{
a5f22156 1029 struct fm801 *chip = ac97->private_data;
1da177e4
LT
1030 if (ac97->num == 0) {
1031 chip->ac97 = NULL;
1032 } else {
1033 chip->ac97_sec = NULL;
1034 }
1035}
1036
e23e7a14 1037static int snd_fm801_mixer(struct fm801 *chip)
1da177e4 1038{
a5f22156 1039 struct snd_ac97_template ac97;
1da177e4
LT
1040 unsigned int i;
1041 int err;
a5f22156 1042 static struct snd_ac97_bus_ops ops = {
1da177e4
LT
1043 .write = snd_fm801_codec_write,
1044 .read = snd_fm801_codec_read,
1045 };
1046
1047 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1048 return err;
1049 chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus;
1050
1051 memset(&ac97, 0, sizeof(ac97));
1052 ac97.private_data = chip;
1053 ac97.private_free = snd_fm801_mixer_free_ac97;
1054 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1055 return err;
1056 if (chip->secondary) {
1057 ac97.num = 1;
1058 ac97.addr = chip->secondary_addr;
1059 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
1060 return err;
1061 }
1062 for (i = 0; i < FM801_CONTROLS; i++)
1063 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip));
1064 if (chip->multichannel) {
1065 for (i = 0; i < FM801_CONTROLS_MULTI; i++)
1066 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1067 }
1068 return 0;
1069}
1070
1071/*
1072 * initialization routines
1073 */
1074
b1e9ed26
TI
1075static int wait_for_codec(struct fm801 *chip, unsigned int codec_id,
1076 unsigned short reg, unsigned long waits)
1077{
1078 unsigned long timeout = jiffies + waits;
1079
215dacc2
AS
1080 fm801_writew(chip, AC97_CMD,
1081 reg | (codec_id << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
b1e9ed26
TI
1082 udelay(5);
1083 do {
215dacc2
AS
1084 if ((fm801_readw(chip, AC97_CMD) &
1085 (FM801_AC97_VALID | FM801_AC97_BUSY)) == FM801_AC97_VALID)
b1e9ed26
TI
1086 return 0;
1087 schedule_timeout_uninterruptible(1);
1088 } while (time_after(timeout, jiffies));
1089 return -EIO;
1090}
1091
1092static int snd_fm801_chip_init(struct fm801 *chip, int resume)
1093{
b1e9ed26
TI
1094 unsigned short cmdw;
1095
fb716c0b 1096 if (chip->tea575x_tuner & TUNER_ONLY)
e0a5d82a
AS
1097 goto __ac97_ok;
1098
b1e9ed26 1099 /* codec cold reset + AC'97 warm reset */
215dacc2
AS
1100 fm801_writew(chip, CODEC_CTRL, (1 << 5) | (1 << 6));
1101 fm801_readw(chip, CODEC_CTRL); /* flush posting data */
b1e9ed26 1102 udelay(100);
215dacc2 1103 fm801_writew(chip, CODEC_CTRL, 0);
b1e9ed26 1104
fb716c0b
OZ
1105 if (wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750)) < 0)
1106 if (!resume) {
9c7f9abf
TI
1107 dev_info(chip->card->dev,
1108 "Primary AC'97 codec not found, assume SF64-PCR (tuner-only)\n");
fb716c0b
OZ
1109 chip->tea575x_tuner = 3 | TUNER_ONLY;
1110 goto __ac97_ok;
1111 }
b1e9ed26
TI
1112
1113 if (chip->multichannel) {
1114 if (chip->secondary_addr) {
1115 wait_for_codec(chip, chip->secondary_addr,
1116 AC97_VENDOR_ID1, msecs_to_jiffies(50));
1117 } else {
1118 /* my card has the secondary codec */
1119 /* at address #3, so the loop is inverted */
58e4334e
HH
1120 int i;
1121 for (i = 3; i > 0; i--) {
1122 if (!wait_for_codec(chip, i, AC97_VENDOR_ID1,
b1e9ed26 1123 msecs_to_jiffies(50))) {
215dacc2 1124 cmdw = fm801_readw(chip, AC97_DATA);
b1e9ed26
TI
1125 if (cmdw != 0xffff && cmdw != 0) {
1126 chip->secondary = 1;
58e4334e 1127 chip->secondary_addr = i;
b1e9ed26
TI
1128 break;
1129 }
1130 }
1131 }
1132 }
1133
1134 /* the recovery phase, it seems that probing for non-existing codec might */
1135 /* cause timeout problems */
1136 wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750));
1137 }
1138
6bbe13ec
JK
1139 __ac97_ok:
1140
b1e9ed26 1141 /* init volume */
215dacc2
AS
1142 fm801_writew(chip, PCM_VOL, 0x0808);
1143 fm801_writew(chip, FM_VOL, 0x9f1f);
1144 fm801_writew(chip, I2S_VOL, 0x8808);
b1e9ed26
TI
1145
1146 /* I2S control - I2S mode */
215dacc2 1147 fm801_writew(chip, I2S_MODE, 0x0003);
b1e9ed26 1148
6bbe13ec 1149 /* interrupt setup */
215dacc2 1150 cmdw = fm801_readw(chip, IRQ_MASK);
6bbe13ec
JK
1151 if (chip->irq < 0)
1152 cmdw |= 0x00c3; /* mask everything, no PCM nor MPU */
1153 else
1154 cmdw &= ~0x0083; /* unmask MPU, PLAYBACK & CAPTURE */
215dacc2 1155 fm801_writew(chip, IRQ_MASK, cmdw);
b1e9ed26
TI
1156
1157 /* interrupt clear */
215dacc2
AS
1158 fm801_writew(chip, IRQ_STATUS,
1159 FM801_IRQ_PLAYBACK | FM801_IRQ_CAPTURE | FM801_IRQ_MPU);
b1e9ed26
TI
1160
1161 return 0;
1162}
1163
1164
a5f22156 1165static int snd_fm801_free(struct fm801 *chip)
1da177e4
LT
1166{
1167 unsigned short cmdw;
1168
1169 if (chip->irq < 0)
1170 goto __end_hw;
1171
1172 /* interrupt setup - mask everything */
215dacc2 1173 cmdw = fm801_readw(chip, IRQ_MASK);
1da177e4 1174 cmdw |= 0x00c3;
215dacc2 1175 fm801_writew(chip, IRQ_MASK, cmdw);
1da177e4
LT
1176
1177 __end_hw:
fdb62b50 1178#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b 1179 if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
c37279b9 1180 snd_tea575x_exit(&chip->tea);
d4ecc83b
HV
1181 v4l2_device_unregister(&chip->v4l2_dev);
1182 }
1da177e4
LT
1183#endif
1184 if (chip->irq >= 0)
a5f22156 1185 free_irq(chip->irq, chip);
1da177e4
LT
1186 pci_release_regions(chip->pci);
1187 pci_disable_device(chip->pci);
1188
1189 kfree(chip);
1190 return 0;
1191}
1192
a5f22156 1193static int snd_fm801_dev_free(struct snd_device *device)
1da177e4 1194{
a5f22156 1195 struct fm801 *chip = device->device_data;
1da177e4
LT
1196 return snd_fm801_free(chip);
1197}
1198
e23e7a14
BP
1199static int snd_fm801_create(struct snd_card *card,
1200 struct pci_dev *pci,
1201 int tea575x_tuner,
1202 int radio_nr,
1203 struct fm801 **rchip)
1da177e4 1204{
a5f22156 1205 struct fm801 *chip;
1da177e4 1206 int err;
a5f22156 1207 static struct snd_device_ops ops = {
1da177e4
LT
1208 .dev_free = snd_fm801_dev_free,
1209 };
1210
1211 *rchip = NULL;
1212 if ((err = pci_enable_device(pci)) < 0)
1213 return err;
e560d8d8 1214 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT
1215 if (chip == NULL) {
1216 pci_disable_device(pci);
1217 return -ENOMEM;
1218 }
1219 spin_lock_init(&chip->reg_lock);
1220 chip->card = card;
1221 chip->pci = pci;
1222 chip->irq = -1;
6bbe13ec 1223 chip->tea575x_tuner = tea575x_tuner;
1da177e4
LT
1224 if ((err = pci_request_regions(pci, "FM801")) < 0) {
1225 kfree(chip);
1226 pci_disable_device(pci);
1227 return err;
1228 }
1229 chip->port = pci_resource_start(pci, 0);
fb716c0b 1230 if ((tea575x_tuner & TUNER_ONLY) == 0) {
437a5a46 1231 if (request_irq(pci->irq, snd_fm801_interrupt, IRQF_SHARED,
934c2b6d 1232 KBUILD_MODNAME, chip)) {
9c7f9abf 1233 dev_err(card->dev, "unable to grab IRQ %d\n", chip->irq);
6bbe13ec
JK
1234 snd_fm801_free(chip);
1235 return -EBUSY;
1236 }
1237 chip->irq = pci->irq;
1238 pci_set_master(pci);
1da177e4 1239 }
1da177e4 1240
44c10138 1241 if (pci->revision >= 0xb1) /* FM801-AU */
1da177e4
LT
1242 chip->multichannel = 1;
1243
b1e9ed26 1244 snd_fm801_chip_init(chip, 0);
fb716c0b
OZ
1245 /* init might set tuner access method */
1246 tea575x_tuner = chip->tea575x_tuner;
1247
1248 if (chip->irq >= 0 && (tea575x_tuner & TUNER_ONLY)) {
1249 pci_clear_master(pci);
1250 free_irq(chip->irq, chip);
1251 chip->irq = -1;
1252 }
1da177e4
LT
1253
1254 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1255 snd_fm801_free(chip);
1256 return err;
1257 }
1258
fdb62b50 1259#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b
HV
1260 err = v4l2_device_register(&pci->dev, &chip->v4l2_dev);
1261 if (err < 0) {
1262 snd_fm801_free(chip);
1263 return err;
1264 }
1265 chip->tea.v4l2_dev = &chip->v4l2_dev;
1266 chip->tea.radio_nr = radio_nr;
d7ba858a
OZ
1267 chip->tea.private_data = chip;
1268 chip->tea.ops = &snd_fm801_tea_ops;
10ca7201 1269 sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci));
fb716c0b
OZ
1270 if ((tea575x_tuner & TUNER_TYPE_MASK) > 0 &&
1271 (tea575x_tuner & TUNER_TYPE_MASK) < 4) {
5daf53a6 1272 if (snd_tea575x_init(&chip->tea, THIS_MODULE)) {
9c7f9abf 1273 dev_err(card->dev, "TEA575x radio not found\n");
d4ecc83b 1274 snd_fm801_free(chip);
96760015
DC
1275 return -ENODEV;
1276 }
1277 } else if ((tea575x_tuner & TUNER_TYPE_MASK) == 0) {
d7ba858a
OZ
1278 /* autodetect tuner connection */
1279 for (tea575x_tuner = 1; tea575x_tuner <= 3; tea575x_tuner++) {
1280 chip->tea575x_tuner = tea575x_tuner;
5daf53a6 1281 if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) {
9c7f9abf
TI
1282 dev_info(card->dev,
1283 "detected TEA575x radio type %s\n",
8e699d2c 1284 get_tea575x_gpio(chip)->name);
d7ba858a
OZ
1285 break;
1286 }
1287 }
96760015 1288 if (tea575x_tuner == 4) {
9c7f9abf 1289 dev_err(card->dev, "TEA575x radio not found\n");
c37279b9 1290 chip->tea575x_tuner = TUNER_DISABLED;
96760015
DC
1291 }
1292 }
c37279b9 1293 if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
8e699d2c 1294 strlcpy(chip->tea.card, get_tea575x_gpio(chip)->name,
c37279b9
BH
1295 sizeof(chip->tea.card));
1296 }
1da177e4
LT
1297#endif
1298
1299 *rchip = chip;
1300 return 0;
1301}
1302
e23e7a14
BP
1303static int snd_card_fm801_probe(struct pci_dev *pci,
1304 const struct pci_device_id *pci_id)
1da177e4
LT
1305{
1306 static int dev;
a5f22156
TI
1307 struct snd_card *card;
1308 struct fm801 *chip;
1309 struct snd_opl3 *opl3;
1da177e4
LT
1310 int err;
1311
1312 if (dev >= SNDRV_CARDS)
1313 return -ENODEV;
1314 if (!enable[dev]) {
1315 dev++;
1316 return -ENOENT;
1317 }
1318
60c5772b
TI
1319 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1320 0, &card);
e58de7ba
TI
1321 if (err < 0)
1322 return err;
d4ecc83b 1323 if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], radio_nr[dev], &chip)) < 0) {
1da177e4
LT
1324 snd_card_free(card);
1325 return err;
1326 }
b1e9ed26 1327 card->private_data = chip;
1da177e4
LT
1328
1329 strcpy(card->driver, "FM801");
1330 strcpy(card->shortname, "ForteMedia FM801-");
1331 strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1332 sprintf(card->longname, "%s at 0x%lx, irq %i",
1333 card->shortname, chip->port, chip->irq);
1334
fb716c0b 1335 if (chip->tea575x_tuner & TUNER_ONLY)
e0a5d82a
AS
1336 goto __fm801_tuner_only;
1337
1da177e4
LT
1338 if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) {
1339 snd_card_free(card);
1340 return err;
1341 }
1342 if ((err = snd_fm801_mixer(chip)) < 0) {
1343 snd_card_free(card);
1344 return err;
1345 }
1346 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
215dacc2 1347 chip->port + FM801_MPU401_DATA,
dba8b469
CL
1348 MPU401_INFO_INTEGRATED |
1349 MPU401_INFO_IRQ_HOOK,
1350 -1, &chip->rmidi)) < 0) {
1da177e4
LT
1351 snd_card_free(card);
1352 return err;
1353 }
215dacc2
AS
1354 if ((err = snd_opl3_create(card, chip->port + FM801_OPL3_BANK0,
1355 chip->port + FM801_OPL3_BANK1,
1da177e4
LT
1356 OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) {
1357 snd_card_free(card);
1358 return err;
1359 }
1360 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1361 snd_card_free(card);
1362 return err;
1363 }
1364
e0a5d82a 1365 __fm801_tuner_only:
1da177e4
LT
1366 if ((err = snd_card_register(card)) < 0) {
1367 snd_card_free(card);
1368 return err;
1369 }
1370 pci_set_drvdata(pci, card);
1371 dev++;
1372 return 0;
1373}
1374
e23e7a14 1375static void snd_card_fm801_remove(struct pci_dev *pci)
1da177e4
LT
1376{
1377 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT
1378}
1379
c7561cd8 1380#ifdef CONFIG_PM_SLEEP
b1e9ed26
TI
1381static unsigned char saved_regs[] = {
1382 FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC,
1383 FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2,
1384 FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2,
1385 FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL,
1386};
1387
68cb2b55 1388static int snd_fm801_suspend(struct device *dev)
b1e9ed26 1389{
68cb2b55
TI
1390 struct pci_dev *pci = to_pci_dev(dev);
1391 struct snd_card *card = dev_get_drvdata(dev);
b1e9ed26
TI
1392 struct fm801 *chip = card->private_data;
1393 int i;
1394
1395 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1396 snd_pcm_suspend_all(chip->pcm);
1397 snd_ac97_suspend(chip->ac97);
1398 snd_ac97_suspend(chip->ac97_sec);
1399 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
1400 chip->saved_regs[i] = inw(chip->port + saved_regs[i]);
1401 /* FIXME: tea575x suspend */
1402
b1e9ed26
TI
1403 pci_disable_device(pci);
1404 pci_save_state(pci);
68cb2b55 1405 pci_set_power_state(pci, PCI_D3hot);
b1e9ed26
TI
1406 return 0;
1407}
1408
68cb2b55 1409static int snd_fm801_resume(struct device *dev)
b1e9ed26 1410{
68cb2b55
TI
1411 struct pci_dev *pci = to_pci_dev(dev);
1412 struct snd_card *card = dev_get_drvdata(dev);
b1e9ed26
TI
1413 struct fm801 *chip = card->private_data;
1414 int i;
1415
b1e9ed26 1416 pci_set_power_state(pci, PCI_D0);
30b35399
TI
1417 pci_restore_state(pci);
1418 if (pci_enable_device(pci) < 0) {
9c7f9abf 1419 dev_err(dev, "pci_enable_device failed, disabling device\n");
30b35399
TI
1420 snd_card_disconnect(card);
1421 return -EIO;
1422 }
b1e9ed26
TI
1423 pci_set_master(pci);
1424
1425 snd_fm801_chip_init(chip, 1);
1426 snd_ac97_resume(chip->ac97);
1427 snd_ac97_resume(chip->ac97_sec);
1428 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
1429 outw(chip->saved_regs[i], chip->port + saved_regs[i]);
1430
1431 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1432 return 0;
1433}
68cb2b55
TI
1434
1435static SIMPLE_DEV_PM_OPS(snd_fm801_pm, snd_fm801_suspend, snd_fm801_resume);
1436#define SND_FM801_PM_OPS &snd_fm801_pm
1437#else
1438#define SND_FM801_PM_OPS NULL
c7561cd8 1439#endif /* CONFIG_PM_SLEEP */
b1e9ed26 1440
e9f66d9b 1441static struct pci_driver fm801_driver = {
3733e424 1442 .name = KBUILD_MODNAME,
1da177e4
LT
1443 .id_table = snd_fm801_ids,
1444 .probe = snd_card_fm801_probe,
e23e7a14 1445 .remove = snd_card_fm801_remove,
68cb2b55
TI
1446 .driver = {
1447 .pm = SND_FM801_PM_OPS,
1448 },
1da177e4
LT
1449};
1450
e9f66d9b 1451module_pci_driver(fm801_driver);