Merge tag 'arc-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
[linux-2.6-block.git] / sound / pci / fm801.c
CommitLineData
1da177e4
LT
1/*
2 * The driver for the ForteMedia FM801 based soundcards
c1017a4c 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4 4 *
1da177e4
LT
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
1da177e4
LT
15 */
16
1da177e4
LT
17#include <linux/delay.h>
18#include <linux/init.h>
19#include <linux/interrupt.h>
215dacc2 20#include <linux/io.h>
1da177e4
LT
21#include <linux/pci.h>
22#include <linux/slab.h>
65a77217 23#include <linux/module.h>
1da177e4
LT
24#include <sound/core.h>
25#include <sound/pcm.h>
666c70ff 26#include <sound/tlv.h>
1da177e4
LT
27#include <sound/ac97_codec.h>
28#include <sound/mpu401.h>
29#include <sound/opl3.h>
30#include <sound/initval.h>
31
efce4bb9 32#ifdef CONFIG_SND_FM801_TEA575X_BOOL
59b56459 33#include <media/tea575x.h>
1da177e4
LT
34#endif
35
c1017a4c 36MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT
37MODULE_DESCRIPTION("ForteMedia FM801");
38MODULE_LICENSE("GPL");
39MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801},"
40 "{Genius,SoundMaker Live 5.1}}");
41
42static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
43static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 44static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
1da177e4
LT
45/*
46 * Enable TEA575x tuner
47 * 1 = MediaForte 256-PCS
d7ba858a 48 * 2 = MediaForte 256-PCP
1da177e4 49 * 3 = MediaForte 64-PCR
fb716c0b 50 * 16 = setup tuner only (this is additional bit), i.e. SF64-PCR FM card
1da177e4
LT
51 * High 16-bits are video (radio) device number + 1
52 */
6581f4e7 53static int tea575x_tuner[SNDRV_CARDS];
d4ecc83b 54static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
1da177e4
LT
55
56module_param_array(index, int, NULL, 0444);
57MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
58module_param_array(id, charp, NULL, 0444);
59MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
60module_param_array(enable, bool, NULL, 0444);
61MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
62module_param_array(tea575x_tuner, int, NULL, 0444);
d7ba858a 63MODULE_PARM_DESC(tea575x_tuner, "TEA575x tuner access method (0 = auto, 1 = SF256-PCS, 2=SF256-PCP, 3=SF64-PCR, 8=disable, +16=tuner-only).");
d4ecc83b
HV
64module_param_array(radio_nr, int, NULL, 0444);
65MODULE_PARM_DESC(radio_nr, "Radio device numbers");
66
fb716c0b 67
c37279b9 68#define TUNER_DISABLED (1<<3)
fb716c0b
OZ
69#define TUNER_ONLY (1<<4)
70#define TUNER_TYPE_MASK (~TUNER_ONLY & 0xFFFF)
1da177e4
LT
71
72/*
73 * Direct registers
74 */
75
215dacc2
AS
76#define fm801_writew(chip,reg,value) outw((value), chip->port + FM801_##reg)
77#define fm801_readw(chip,reg) inw(chip->port + FM801_##reg)
78
79#define fm801_writel(chip,reg,value) outl((value), chip->port + FM801_##reg)
1da177e4
LT
80
81#define FM801_PCM_VOL 0x00 /* PCM Output Volume */
82#define FM801_FM_VOL 0x02 /* FM Output Volume */
83#define FM801_I2S_VOL 0x04 /* I2S Volume */
84#define FM801_REC_SRC 0x06 /* Record Source */
85#define FM801_PLY_CTRL 0x08 /* Playback Control */
86#define FM801_PLY_COUNT 0x0a /* Playback Count */
87#define FM801_PLY_BUF1 0x0c /* Playback Bufer I */
88#define FM801_PLY_BUF2 0x10 /* Playback Buffer II */
89#define FM801_CAP_CTRL 0x14 /* Capture Control */
90#define FM801_CAP_COUNT 0x16 /* Capture Count */
91#define FM801_CAP_BUF1 0x18 /* Capture Buffer I */
92#define FM801_CAP_BUF2 0x1c /* Capture Buffer II */
93#define FM801_CODEC_CTRL 0x22 /* Codec Control */
94#define FM801_I2S_MODE 0x24 /* I2S Mode Control */
95#define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */
96#define FM801_I2C_CTRL 0x29 /* I2C Control */
97#define FM801_AC97_CMD 0x2a /* AC'97 Command */
98#define FM801_AC97_DATA 0x2c /* AC'97 Data */
99#define FM801_MPU401_DATA 0x30 /* MPU401 Data */
100#define FM801_MPU401_CMD 0x31 /* MPU401 Command */
101#define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */
102#define FM801_GEN_CTRL 0x54 /* General Control */
103#define FM801_IRQ_MASK 0x56 /* Interrupt Mask */
104#define FM801_IRQ_STATUS 0x5a /* Interrupt Status */
105#define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */
106#define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */
107#define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */
108#define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */
109#define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */
110
b1e9ed26
TI
111/* codec access */
112#define FM801_AC97_READ (1<<7) /* read=1, write=0 */
113#define FM801_AC97_VALID (1<<8) /* port valid=1 */
114#define FM801_AC97_BUSY (1<<9) /* busy=1 */
115#define FM801_AC97_ADDR_SHIFT 10 /* codec id (2bit) */
1da177e4
LT
116
117/* playback and record control register bits */
118#define FM801_BUF1_LAST (1<<1)
119#define FM801_BUF2_LAST (1<<2)
120#define FM801_START (1<<5)
121#define FM801_PAUSE (1<<6)
122#define FM801_IMMED_STOP (1<<7)
123#define FM801_RATE_SHIFT 8
124#define FM801_RATE_MASK (15 << FM801_RATE_SHIFT)
125#define FM801_CHANNELS_4 (1<<12) /* playback only */
126#define FM801_CHANNELS_6 (2<<12) /* playback only */
127#define FM801_CHANNELS_6MS (3<<12) /* playback only */
128#define FM801_CHANNELS_MASK (3<<12)
129#define FM801_16BIT (1<<14)
130#define FM801_STEREO (1<<15)
131
132/* IRQ status bits */
133#define FM801_IRQ_PLAYBACK (1<<8)
134#define FM801_IRQ_CAPTURE (1<<9)
135#define FM801_IRQ_VOLUME (1<<14)
136#define FM801_IRQ_MPU (1<<15)
137
138/* GPIO control register */
139#define FM801_GPIO_GP0 (1<<0) /* read/write */
140#define FM801_GPIO_GP1 (1<<1)
141#define FM801_GPIO_GP2 (1<<2)
142#define FM801_GPIO_GP3 (1<<3)
143#define FM801_GPIO_GP(x) (1<<(0+(x)))
144#define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/
145#define FM801_GPIO_GD1 (1<<9)
146#define FM801_GPIO_GD2 (1<<10)
147#define FM801_GPIO_GD3 (1<<11)
148#define FM801_GPIO_GD(x) (1<<(8+(x)))
149#define FM801_GPIO_GS0 (1<<12) /* function select: */
150#define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */
151#define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */
152#define FM801_GPIO_GS3 (1<<15)
153#define FM801_GPIO_GS(x) (1<<(12+(x)))
154
052c233e
AS
155/**
156 * struct fm801 - describes FM801 chip
157 * @port: I/O port number
158 * @multichannel: multichannel support
159 * @secondary: secondary codec
160 * @secondary_addr: address of the secondary codec
161 * @tea575x_tuner: tuner access method & flags
162 * @ply_ctrl: playback control
163 * @cap_ctrl: capture control
1da177e4 164 */
a5f22156 165struct fm801 {
1da177e4
LT
166 int irq;
167
052c233e
AS
168 unsigned long port;
169 unsigned int multichannel: 1,
170 secondary: 1;
171 unsigned char secondary_addr;
172 unsigned int tea575x_tuner;
1da177e4 173
052c233e
AS
174 unsigned short ply_ctrl;
175 unsigned short cap_ctrl;
1da177e4
LT
176
177 unsigned long ply_buffer;
178 unsigned int ply_buf;
179 unsigned int ply_count;
180 unsigned int ply_size;
181 unsigned int ply_pos;
182
183 unsigned long cap_buffer;
184 unsigned int cap_buf;
185 unsigned int cap_count;
186 unsigned int cap_size;
187 unsigned int cap_pos;
188
a5f22156
TI
189 struct snd_ac97_bus *ac97_bus;
190 struct snd_ac97 *ac97;
191 struct snd_ac97 *ac97_sec;
1da177e4
LT
192
193 struct pci_dev *pci;
a5f22156
TI
194 struct snd_card *card;
195 struct snd_pcm *pcm;
196 struct snd_rawmidi *rmidi;
197 struct snd_pcm_substream *playback_substream;
198 struct snd_pcm_substream *capture_substream;
1da177e4
LT
199 unsigned int p_dma_size;
200 unsigned int c_dma_size;
201
202 spinlock_t reg_lock;
a5f22156 203 struct snd_info_entry *proc_entry;
1da177e4 204
fdb62b50 205#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b 206 struct v4l2_device v4l2_dev;
a5f22156 207 struct snd_tea575x tea;
1da177e4 208#endif
b1e9ed26 209
c7561cd8 210#ifdef CONFIG_PM_SLEEP
b1e9ed26
TI
211 u16 saved_regs[0x20];
212#endif
1da177e4
LT
213};
214
9baa3c34 215static const struct pci_device_id snd_fm801_ids[] = {
1da177e4 216 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */
26be8659 217 { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */
1da177e4
LT
218 { 0, }
219};
220
221MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
222
223/*
224 * common I/O routines
225 */
226
02fd1a76
AS
227static bool fm801_ac97_is_ready(struct fm801 *chip, unsigned int iterations)
228{
229 unsigned int idx;
230
231 for (idx = 0; idx < iterations; idx++) {
232 if (!(fm801_readw(chip, AC97_CMD) & FM801_AC97_BUSY))
233 return true;
234 udelay(10);
235 }
236 return false;
237}
238
239static bool fm801_ac97_is_valid(struct fm801 *chip, unsigned int iterations)
240{
241 unsigned int idx;
242
243 for (idx = 0; idx < iterations; idx++) {
244 if (fm801_readw(chip, AC97_CMD) & FM801_AC97_VALID)
245 return true;
246 udelay(10);
247 }
248 return false;
249}
250
a5f22156 251static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg,
1da177e4
LT
252 unsigned short mask, unsigned short value)
253{
254 int change;
255 unsigned long flags;
256 unsigned short old, new;
257
258 spin_lock_irqsave(&chip->reg_lock, flags);
259 old = inw(chip->port + reg);
260 new = (old & ~mask) | value;
261 change = old != new;
262 if (change)
263 outw(new, chip->port + reg);
264 spin_unlock_irqrestore(&chip->reg_lock, flags);
265 return change;
266}
267
a5f22156 268static void snd_fm801_codec_write(struct snd_ac97 *ac97,
1da177e4
LT
269 unsigned short reg,
270 unsigned short val)
271{
a5f22156 272 struct fm801 *chip = ac97->private_data;
1da177e4
LT
273
274 /*
275 * Wait until the codec interface is not ready..
276 */
02fd1a76
AS
277 if (!fm801_ac97_is_ready(chip, 100)) {
278 dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
279 return;
1da177e4 280 }
1da177e4 281
1da177e4 282 /* write data and address */
215dacc2
AS
283 fm801_writew(chip, AC97_DATA, val);
284 fm801_writew(chip, AC97_CMD, reg | (ac97->addr << FM801_AC97_ADDR_SHIFT));
1da177e4
LT
285 /*
286 * Wait until the write command is not completed..
02fd1a76
AS
287 */
288 if (!fm801_ac97_is_ready(chip, 1000))
289 dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
290 ac97->num);
1da177e4
LT
291}
292
a5f22156 293static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg)
1da177e4 294{
a5f22156 295 struct fm801 *chip = ac97->private_data;
1da177e4
LT
296
297 /*
298 * Wait until the codec interface is not ready..
299 */
02fd1a76
AS
300 if (!fm801_ac97_is_ready(chip, 100)) {
301 dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
302 return 0;
1da177e4 303 }
1da177e4 304
1da177e4 305 /* read command */
215dacc2
AS
306 fm801_writew(chip, AC97_CMD,
307 reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
02fd1a76
AS
308 if (!fm801_ac97_is_ready(chip, 100)) {
309 dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
310 ac97->num);
311 return 0;
1da177e4 312 }
1da177e4 313
02fd1a76
AS
314 if (!fm801_ac97_is_valid(chip, 1000)) {
315 dev_err(chip->card->dev,
316 "AC'97 interface #%d is not valid (2)\n", ac97->num);
317 return 0;
1da177e4 318 }
1da177e4 319
215dacc2 320 return fm801_readw(chip, AC97_DATA);
1da177e4
LT
321}
322
323static unsigned int rates[] = {
324 5500, 8000, 9600, 11025,
325 16000, 19200, 22050, 32000,
326 38400, 44100, 48000
327};
328
a5f22156 329static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
1da177e4
LT
330 .count = ARRAY_SIZE(rates),
331 .list = rates,
332 .mask = 0,
333};
334
335static unsigned int channels[] = {
336 2, 4, 6
337};
338
a5f22156 339static struct snd_pcm_hw_constraint_list hw_constraints_channels = {
5e4968e2 340 .count = ARRAY_SIZE(channels),
1da177e4
LT
341 .list = channels,
342 .mask = 0,
343};
344
345/*
346 * Sample rate routines
347 */
348
349static unsigned short snd_fm801_rate_bits(unsigned int rate)
350{
351 unsigned int idx;
352
353 for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
354 if (rates[idx] == rate)
355 return idx;
356 snd_BUG();
357 return ARRAY_SIZE(rates) - 1;
358}
359
360/*
361 * PCM part
362 */
363
a5f22156 364static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
365 int cmd)
366{
a5f22156 367 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
368
369 spin_lock(&chip->reg_lock);
370 switch (cmd) {
371 case SNDRV_PCM_TRIGGER_START:
372 chip->ply_ctrl &= ~(FM801_BUF1_LAST |
373 FM801_BUF2_LAST |
374 FM801_PAUSE);
375 chip->ply_ctrl |= FM801_START |
376 FM801_IMMED_STOP;
377 break;
378 case SNDRV_PCM_TRIGGER_STOP:
379 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
380 break;
381 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
b1e9ed26 382 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT
383 chip->ply_ctrl |= FM801_PAUSE;
384 break;
385 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
b1e9ed26 386 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT
387 chip->ply_ctrl &= ~FM801_PAUSE;
388 break;
389 default:
390 spin_unlock(&chip->reg_lock);
391 snd_BUG();
392 return -EINVAL;
393 }
215dacc2 394 fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
1da177e4
LT
395 spin_unlock(&chip->reg_lock);
396 return 0;
397}
398
a5f22156 399static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT
400 int cmd)
401{
a5f22156 402 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
403
404 spin_lock(&chip->reg_lock);
405 switch (cmd) {
406 case SNDRV_PCM_TRIGGER_START:
407 chip->cap_ctrl &= ~(FM801_BUF1_LAST |
408 FM801_BUF2_LAST |
409 FM801_PAUSE);
410 chip->cap_ctrl |= FM801_START |
411 FM801_IMMED_STOP;
412 break;
413 case SNDRV_PCM_TRIGGER_STOP:
414 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
415 break;
416 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
b1e9ed26 417 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT
418 chip->cap_ctrl |= FM801_PAUSE;
419 break;
420 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
b1e9ed26 421 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT
422 chip->cap_ctrl &= ~FM801_PAUSE;
423 break;
424 default:
425 spin_unlock(&chip->reg_lock);
426 snd_BUG();
427 return -EINVAL;
428 }
215dacc2 429 fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
1da177e4
LT
430 spin_unlock(&chip->reg_lock);
431 return 0;
432}
433
a5f22156
TI
434static int snd_fm801_hw_params(struct snd_pcm_substream *substream,
435 struct snd_pcm_hw_params *hw_params)
1da177e4
LT
436{
437 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
438}
439
a5f22156 440static int snd_fm801_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT
441{
442 return snd_pcm_lib_free_pages(substream);
443}
444
a5f22156 445static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 446{
a5f22156
TI
447 struct fm801 *chip = snd_pcm_substream_chip(substream);
448 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
449
450 chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
451 chip->ply_count = snd_pcm_lib_period_bytes(substream);
452 spin_lock_irq(&chip->reg_lock);
453 chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
454 FM801_STEREO | FM801_RATE_MASK |
455 FM801_CHANNELS_MASK);
456 if (snd_pcm_format_width(runtime->format) == 16)
457 chip->ply_ctrl |= FM801_16BIT;
458 if (runtime->channels > 1) {
459 chip->ply_ctrl |= FM801_STEREO;
460 if (runtime->channels == 4)
461 chip->ply_ctrl |= FM801_CHANNELS_4;
462 else if (runtime->channels == 6)
463 chip->ply_ctrl |= FM801_CHANNELS_6;
464 }
465 chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
466 chip->ply_buf = 0;
215dacc2
AS
467 fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
468 fm801_writew(chip, PLY_COUNT, chip->ply_count - 1);
1da177e4
LT
469 chip->ply_buffer = runtime->dma_addr;
470 chip->ply_pos = 0;
215dacc2
AS
471 fm801_writel(chip, PLY_BUF1, chip->ply_buffer);
472 fm801_writel(chip, PLY_BUF2,
473 chip->ply_buffer + (chip->ply_count % chip->ply_size));
1da177e4
LT
474 spin_unlock_irq(&chip->reg_lock);
475 return 0;
476}
477
a5f22156 478static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 479{
a5f22156
TI
480 struct fm801 *chip = snd_pcm_substream_chip(substream);
481 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
482
483 chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
484 chip->cap_count = snd_pcm_lib_period_bytes(substream);
485 spin_lock_irq(&chip->reg_lock);
486 chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
487 FM801_STEREO | FM801_RATE_MASK);
488 if (snd_pcm_format_width(runtime->format) == 16)
489 chip->cap_ctrl |= FM801_16BIT;
490 if (runtime->channels > 1)
491 chip->cap_ctrl |= FM801_STEREO;
492 chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
493 chip->cap_buf = 0;
215dacc2
AS
494 fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
495 fm801_writew(chip, CAP_COUNT, chip->cap_count - 1);
1da177e4
LT
496 chip->cap_buffer = runtime->dma_addr;
497 chip->cap_pos = 0;
215dacc2
AS
498 fm801_writel(chip, CAP_BUF1, chip->cap_buffer);
499 fm801_writel(chip, CAP_BUF2,
500 chip->cap_buffer + (chip->cap_count % chip->cap_size));
1da177e4
LT
501 spin_unlock_irq(&chip->reg_lock);
502 return 0;
503}
504
a5f22156 505static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 506{
a5f22156 507 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
508 size_t ptr;
509
510 if (!(chip->ply_ctrl & FM801_START))
511 return 0;
512 spin_lock(&chip->reg_lock);
215dacc2
AS
513 ptr = chip->ply_pos + (chip->ply_count - 1) - fm801_readw(chip, PLY_COUNT);
514 if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_PLAYBACK) {
1da177e4
LT
515 ptr += chip->ply_count;
516 ptr %= chip->ply_size;
517 }
518 spin_unlock(&chip->reg_lock);
519 return bytes_to_frames(substream->runtime, ptr);
520}
521
a5f22156 522static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 523{
a5f22156 524 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
525 size_t ptr;
526
527 if (!(chip->cap_ctrl & FM801_START))
528 return 0;
529 spin_lock(&chip->reg_lock);
215dacc2
AS
530 ptr = chip->cap_pos + (chip->cap_count - 1) - fm801_readw(chip, CAP_COUNT);
531 if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_CAPTURE) {
1da177e4
LT
532 ptr += chip->cap_count;
533 ptr %= chip->cap_size;
534 }
535 spin_unlock(&chip->reg_lock);
536 return bytes_to_frames(substream->runtime, ptr);
537}
538
7d12e780 539static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id)
1da177e4 540{
a5f22156 541 struct fm801 *chip = dev_id;
1da177e4
LT
542 unsigned short status;
543 unsigned int tmp;
544
215dacc2 545 status = fm801_readw(chip, IRQ_STATUS);
1da177e4
LT
546 status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
547 if (! status)
548 return IRQ_NONE;
549 /* ack first */
215dacc2 550 fm801_writew(chip, IRQ_STATUS, status);
1da177e4
LT
551 if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
552 spin_lock(&chip->reg_lock);
553 chip->ply_buf++;
554 chip->ply_pos += chip->ply_count;
555 chip->ply_pos %= chip->ply_size;
556 tmp = chip->ply_pos + chip->ply_count;
557 tmp %= chip->ply_size;
215dacc2
AS
558 if (chip->ply_buf & 1)
559 fm801_writel(chip, PLY_BUF1, chip->ply_buffer + tmp);
560 else
561 fm801_writel(chip, PLY_BUF2, chip->ply_buffer + tmp);
1da177e4
LT
562 spin_unlock(&chip->reg_lock);
563 snd_pcm_period_elapsed(chip->playback_substream);
564 }
565 if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
566 spin_lock(&chip->reg_lock);
567 chip->cap_buf++;
568 chip->cap_pos += chip->cap_count;
569 chip->cap_pos %= chip->cap_size;
570 tmp = chip->cap_pos + chip->cap_count;
571 tmp %= chip->cap_size;
215dacc2
AS
572 if (chip->cap_buf & 1)
573 fm801_writel(chip, CAP_BUF1, chip->cap_buffer + tmp);
574 else
575 fm801_writel(chip, CAP_BUF2, chip->cap_buffer + tmp);
1da177e4
LT
576 spin_unlock(&chip->reg_lock);
577 snd_pcm_period_elapsed(chip->capture_substream);
578 }
579 if (chip->rmidi && (status & FM801_IRQ_MPU))
7d12e780 580 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT
581 if (status & FM801_IRQ_VOLUME)
582 ;/* TODO */
583
584 return IRQ_HANDLED;
585}
586
a5f22156 587static struct snd_pcm_hardware snd_fm801_playback =
1da177e4
LT
588{
589 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
590 SNDRV_PCM_INFO_BLOCK_TRANSFER |
b1e9ed26 591 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
1da177e4
LT
592 SNDRV_PCM_INFO_MMAP_VALID),
593 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
594 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
595 .rate_min = 5500,
596 .rate_max = 48000,
597 .channels_min = 1,
598 .channels_max = 2,
599 .buffer_bytes_max = (128*1024),
600 .period_bytes_min = 64,
601 .period_bytes_max = (128*1024),
602 .periods_min = 1,
603 .periods_max = 1024,
604 .fifo_size = 0,
605};
606
a5f22156 607static struct snd_pcm_hardware snd_fm801_capture =
1da177e4
LT
608{
609 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
610 SNDRV_PCM_INFO_BLOCK_TRANSFER |
b1e9ed26 611 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
1da177e4
LT
612 SNDRV_PCM_INFO_MMAP_VALID),
613 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
614 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
615 .rate_min = 5500,
616 .rate_max = 48000,
617 .channels_min = 1,
618 .channels_max = 2,
619 .buffer_bytes_max = (128*1024),
620 .period_bytes_min = 64,
621 .period_bytes_max = (128*1024),
622 .periods_min = 1,
623 .periods_max = 1024,
624 .fifo_size = 0,
625};
626
a5f22156 627static int snd_fm801_playback_open(struct snd_pcm_substream *substream)
1da177e4 628{
a5f22156
TI
629 struct fm801 *chip = snd_pcm_substream_chip(substream);
630 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
631 int err;
632
633 chip->playback_substream = substream;
634 runtime->hw = snd_fm801_playback;
a5f22156
TI
635 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
636 &hw_constraints_rates);
1da177e4
LT
637 if (chip->multichannel) {
638 runtime->hw.channels_max = 6;
a5f22156
TI
639 snd_pcm_hw_constraint_list(runtime, 0,
640 SNDRV_PCM_HW_PARAM_CHANNELS,
641 &hw_constraints_channels);
1da177e4
LT
642 }
643 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
644 return err;
645 return 0;
646}
647
a5f22156 648static int snd_fm801_capture_open(struct snd_pcm_substream *substream)
1da177e4 649{
a5f22156
TI
650 struct fm801 *chip = snd_pcm_substream_chip(substream);
651 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
652 int err;
653
654 chip->capture_substream = substream;
655 runtime->hw = snd_fm801_capture;
a5f22156
TI
656 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
657 &hw_constraints_rates);
1da177e4
LT
658 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
659 return err;
660 return 0;
661}
662
a5f22156 663static int snd_fm801_playback_close(struct snd_pcm_substream *substream)
1da177e4 664{
a5f22156 665 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
666
667 chip->playback_substream = NULL;
668 return 0;
669}
670
a5f22156 671static int snd_fm801_capture_close(struct snd_pcm_substream *substream)
1da177e4 672{
a5f22156 673 struct fm801 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
674
675 chip->capture_substream = NULL;
676 return 0;
677}
678
a5f22156 679static struct snd_pcm_ops snd_fm801_playback_ops = {
1da177e4
LT
680 .open = snd_fm801_playback_open,
681 .close = snd_fm801_playback_close,
682 .ioctl = snd_pcm_lib_ioctl,
683 .hw_params = snd_fm801_hw_params,
684 .hw_free = snd_fm801_hw_free,
685 .prepare = snd_fm801_playback_prepare,
686 .trigger = snd_fm801_playback_trigger,
687 .pointer = snd_fm801_playback_pointer,
688};
689
a5f22156 690static struct snd_pcm_ops snd_fm801_capture_ops = {
1da177e4
LT
691 .open = snd_fm801_capture_open,
692 .close = snd_fm801_capture_close,
693 .ioctl = snd_pcm_lib_ioctl,
694 .hw_params = snd_fm801_hw_params,
695 .hw_free = snd_fm801_hw_free,
696 .prepare = snd_fm801_capture_prepare,
697 .trigger = snd_fm801_capture_trigger,
698 .pointer = snd_fm801_capture_pointer,
699};
700
483337f9 701static int snd_fm801_pcm(struct fm801 *chip, int device)
1da177e4 702{
a5f22156 703 struct snd_pcm *pcm;
1da177e4
LT
704 int err;
705
1da177e4
LT
706 if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0)
707 return err;
708
709 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
710 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
711
712 pcm->private_data = chip;
1da177e4
LT
713 pcm->info_flags = 0;
714 strcpy(pcm->name, "FM801");
715 chip->pcm = pcm;
716
717 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
718 snd_dma_pci_data(chip->pci),
719 chip->multichannel ? 128*1024 : 64*1024, 128*1024);
720
483337f9 721 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
e36e3b86
TI
722 snd_pcm_alt_chmaps,
723 chip->multichannel ? 6 : 2, 0,
724 NULL);
1da177e4
LT
725}
726
727/*
728 * TEA5757 radio
729 */
730
fdb62b50 731#ifdef CONFIG_SND_FM801_TEA575X_BOOL
1da177e4 732
938a1566
OZ
733/* GPIO to TEA575x maps */
734struct snd_fm801_tea575x_gpio {
735 u8 data, clk, wren, most;
d7ba858a 736 char *name;
938a1566 737};
1da177e4 738
938a1566 739static struct snd_fm801_tea575x_gpio snd_fm801_tea575x_gpios[] = {
d7ba858a
OZ
740 { .data = 1, .clk = 3, .wren = 2, .most = 0, .name = "SF256-PCS" },
741 { .data = 1, .clk = 0, .wren = 2, .most = 3, .name = "SF256-PCP" },
742 { .data = 2, .clk = 0, .wren = 1, .most = 3, .name = "SF64-PCR" },
938a1566 743};
1da177e4 744
8e699d2c
TI
745#define get_tea575x_gpio(chip) \
746 (&snd_fm801_tea575x_gpios[((chip)->tea575x_tuner & TUNER_TYPE_MASK) - 1])
747
938a1566 748static void snd_fm801_tea575x_set_pins(struct snd_tea575x *tea, u8 pins)
1da177e4 749{
a5f22156 750 struct fm801 *chip = tea->private_data;
215dacc2 751 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 752 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
1da177e4 753
938a1566
OZ
754 reg &= ~(FM801_GPIO_GP(gpio.data) |
755 FM801_GPIO_GP(gpio.clk) |
756 FM801_GPIO_GP(gpio.wren));
1da177e4 757
938a1566
OZ
758 reg |= (pins & TEA575X_DATA) ? FM801_GPIO_GP(gpio.data) : 0;
759 reg |= (pins & TEA575X_CLK) ? FM801_GPIO_GP(gpio.clk) : 0;
760 /* WRITE_ENABLE is inverted */
761 reg |= (pins & TEA575X_WREN) ? 0 : FM801_GPIO_GP(gpio.wren);
1da177e4 762
215dacc2 763 fm801_writew(chip, GPIO_CTRL, reg);
1da177e4
LT
764}
765
938a1566 766static u8 snd_fm801_tea575x_get_pins(struct snd_tea575x *tea)
1da177e4 767{
a5f22156 768 struct fm801 *chip = tea->private_data;
215dacc2 769 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 770 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
effded75
DC
771 u8 ret;
772
773 ret = 0;
774 if (reg & FM801_GPIO_GP(gpio.data))
775 ret |= TEA575X_DATA;
776 if (reg & FM801_GPIO_GP(gpio.most))
777 ret |= TEA575X_MOST;
778 return ret;
1da177e4
LT
779}
780
938a1566 781static void snd_fm801_tea575x_set_direction(struct snd_tea575x *tea, bool output)
1da177e4 782{
a5f22156 783 struct fm801 *chip = tea->private_data;
215dacc2 784 unsigned short reg = fm801_readw(chip, GPIO_CTRL);
8e699d2c 785 struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
1da177e4 786
1da177e4 787 /* use GPIO lines and set write enable bit */
938a1566
OZ
788 reg |= FM801_GPIO_GS(gpio.data) |
789 FM801_GPIO_GS(gpio.wren) |
790 FM801_GPIO_GS(gpio.clk) |
791 FM801_GPIO_GS(gpio.most);
792 if (output) {
793 /* all of lines are in the write direction */
794 /* clear data and clock lines */
795 reg &= ~(FM801_GPIO_GD(gpio.data) |
796 FM801_GPIO_GD(gpio.wren) |
797 FM801_GPIO_GD(gpio.clk) |
798 FM801_GPIO_GP(gpio.data) |
799 FM801_GPIO_GP(gpio.clk) |
800 FM801_GPIO_GP(gpio.wren));
801 } else {
802 /* use GPIO lines, set data direction to input */
803 reg |= FM801_GPIO_GD(gpio.data) |
804 FM801_GPIO_GD(gpio.most) |
805 FM801_GPIO_GP(gpio.data) |
806 FM801_GPIO_GP(gpio.most) |
807 FM801_GPIO_GP(gpio.wren);
808 /* all of lines are in the write direction, except data */
809 /* clear data, write enable and clock lines */
810 reg &= ~(FM801_GPIO_GD(gpio.wren) |
811 FM801_GPIO_GD(gpio.clk) |
812 FM801_GPIO_GP(gpio.clk));
1da177e4
LT
813 }
814
215dacc2 815 fm801_writew(chip, GPIO_CTRL, reg);
69252128
AS
816}
817
938a1566
OZ
818static struct snd_tea575x_ops snd_fm801_tea_ops = {
819 .set_pins = snd_fm801_tea575x_set_pins,
820 .get_pins = snd_fm801_tea575x_get_pins,
821 .set_direction = snd_fm801_tea575x_set_direction,
1da177e4
LT
822};
823#endif
824
825/*
826 * Mixer routines
827 */
828
829#define FM801_SINGLE(xname, reg, shift, mask, invert) \
830{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
831 .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
832 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
833
a5f22156
TI
834static int snd_fm801_info_single(struct snd_kcontrol *kcontrol,
835 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
836{
837 int mask = (kcontrol->private_value >> 16) & 0xff;
838
839 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
840 uinfo->count = 1;
841 uinfo->value.integer.min = 0;
842 uinfo->value.integer.max = mask;
843 return 0;
844}
845
a5f22156
TI
846static int snd_fm801_get_single(struct snd_kcontrol *kcontrol,
847 struct snd_ctl_elem_value *ucontrol)
1da177e4 848{
a5f22156 849 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
850 int reg = kcontrol->private_value & 0xff;
851 int shift = (kcontrol->private_value >> 8) & 0xff;
852 int mask = (kcontrol->private_value >> 16) & 0xff;
853 int invert = (kcontrol->private_value >> 24) & 0xff;
854
855 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask;
856 if (invert)
857 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
858 return 0;
859}
860
a5f22156
TI
861static int snd_fm801_put_single(struct snd_kcontrol *kcontrol,
862 struct snd_ctl_elem_value *ucontrol)
1da177e4 863{
a5f22156 864 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
865 int reg = kcontrol->private_value & 0xff;
866 int shift = (kcontrol->private_value >> 8) & 0xff;
867 int mask = (kcontrol->private_value >> 16) & 0xff;
868 int invert = (kcontrol->private_value >> 24) & 0xff;
869 unsigned short val;
870
871 val = (ucontrol->value.integer.value[0] & mask);
872 if (invert)
873 val = mask - val;
874 return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
875}
876
877#define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
878{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
879 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
880 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
666c70ff
TI
881#define FM801_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
882{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
883 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
884 .name = xname, .info = snd_fm801_info_double, \
885 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
886 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
887 .tlv = { .p = (xtlv) } }
1da177e4 888
a5f22156
TI
889static int snd_fm801_info_double(struct snd_kcontrol *kcontrol,
890 struct snd_ctl_elem_info *uinfo)
1da177e4
LT
891{
892 int mask = (kcontrol->private_value >> 16) & 0xff;
893
894 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
895 uinfo->count = 2;
896 uinfo->value.integer.min = 0;
897 uinfo->value.integer.max = mask;
898 return 0;
899}
900
a5f22156
TI
901static int snd_fm801_get_double(struct snd_kcontrol *kcontrol,
902 struct snd_ctl_elem_value *ucontrol)
1da177e4 903{
a5f22156 904 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
905 int reg = kcontrol->private_value & 0xff;
906 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
907 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
908 int mask = (kcontrol->private_value >> 16) & 0xff;
909 int invert = (kcontrol->private_value >> 24) & 0xff;
910
911 spin_lock_irq(&chip->reg_lock);
912 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask;
913 ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask;
914 spin_unlock_irq(&chip->reg_lock);
915 if (invert) {
916 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
917 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
918 }
919 return 0;
920}
921
a5f22156
TI
922static int snd_fm801_put_double(struct snd_kcontrol *kcontrol,
923 struct snd_ctl_elem_value *ucontrol)
1da177e4 924{
a5f22156 925 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
926 int reg = kcontrol->private_value & 0xff;
927 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
928 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
929 int mask = (kcontrol->private_value >> 16) & 0xff;
930 int invert = (kcontrol->private_value >> 24) & 0xff;
931 unsigned short val1, val2;
932
933 val1 = ucontrol->value.integer.value[0] & mask;
934 val2 = ucontrol->value.integer.value[1] & mask;
935 if (invert) {
936 val1 = mask - val1;
937 val2 = mask - val2;
938 }
939 return snd_fm801_update_bits(chip, reg,
940 (mask << shift_left) | (mask << shift_right),
941 (val1 << shift_left ) | (val2 << shift_right));
942}
943
a5f22156
TI
944static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol,
945 struct snd_ctl_elem_info *uinfo)
1da177e4 946{
ca776a28 947 static const char * const texts[5] = {
1da177e4
LT
948 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
949 };
950
ca776a28 951 return snd_ctl_enum_info(uinfo, 1, 5, texts);
1da177e4
LT
952}
953
a5f22156
TI
954static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol,
955 struct snd_ctl_elem_value *ucontrol)
1da177e4 956{
a5f22156 957 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
958 unsigned short val;
959
215dacc2 960 val = fm801_readw(chip, REC_SRC) & 7;
1da177e4
LT
961 if (val > 4)
962 val = 4;
963 ucontrol->value.enumerated.item[0] = val;
964 return 0;
965}
966
a5f22156
TI
967static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol,
968 struct snd_ctl_elem_value *ucontrol)
1da177e4 969{
a5f22156 970 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
971 unsigned short val;
972
973 if ((val = ucontrol->value.enumerated.item[0]) > 4)
974 return -EINVAL;
975 return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
976}
977
0cb29ea0 978static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -3450, 150, 0);
666c70ff 979
a5f22156 980#define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls)
1da177e4 981
e23e7a14 982static struct snd_kcontrol_new snd_fm801_controls[] = {
666c70ff
TI
983FM801_DOUBLE_TLV("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1,
984 db_scale_dsp),
1da177e4 985FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
666c70ff
TI
986FM801_DOUBLE_TLV("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1,
987 db_scale_dsp),
1da177e4 988FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
666c70ff
TI
989FM801_DOUBLE_TLV("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1,
990 db_scale_dsp),
1da177e4
LT
991FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
992{
993 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
994 .name = "Digital Capture Source",
995 .info = snd_fm801_info_mux,
996 .get = snd_fm801_get_mux,
997 .put = snd_fm801_put_mux,
998}
999};
1000
a5f22156 1001#define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi)
1da177e4 1002
e23e7a14 1003static struct snd_kcontrol_new snd_fm801_controls_multi[] = {
1da177e4
LT
1004FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1005FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
10e8d78a
CL
1006FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0),
1007FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0),
1008FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0),
1009FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0),
1da177e4
LT
1010};
1011
a5f22156 1012static void snd_fm801_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1da177e4 1013{
a5f22156 1014 struct fm801 *chip = bus->private_data;
1da177e4
LT
1015 chip->ac97_bus = NULL;
1016}
1017
a5f22156 1018static void snd_fm801_mixer_free_ac97(struct snd_ac97 *ac97)
1da177e4 1019{
a5f22156 1020 struct fm801 *chip = ac97->private_data;
1da177e4
LT
1021 if (ac97->num == 0) {
1022 chip->ac97 = NULL;
1023 } else {
1024 chip->ac97_sec = NULL;
1025 }
1026}
1027
e23e7a14 1028static int snd_fm801_mixer(struct fm801 *chip)
1da177e4 1029{
a5f22156 1030 struct snd_ac97_template ac97;
1da177e4
LT
1031 unsigned int i;
1032 int err;
a5f22156 1033 static struct snd_ac97_bus_ops ops = {
1da177e4
LT
1034 .write = snd_fm801_codec_write,
1035 .read = snd_fm801_codec_read,
1036 };
1037
1038 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1039 return err;
1040 chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus;
1041
1042 memset(&ac97, 0, sizeof(ac97));
1043 ac97.private_data = chip;
1044 ac97.private_free = snd_fm801_mixer_free_ac97;
1045 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1046 return err;
1047 if (chip->secondary) {
1048 ac97.num = 1;
1049 ac97.addr = chip->secondary_addr;
1050 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
1051 return err;
1052 }
1053 for (i = 0; i < FM801_CONTROLS; i++)
1054 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip));
1055 if (chip->multichannel) {
1056 for (i = 0; i < FM801_CONTROLS_MULTI; i++)
1057 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1058 }
1059 return 0;
1060}
1061
1062/*
1063 * initialization routines
1064 */
1065
b1e9ed26
TI
1066static int wait_for_codec(struct fm801 *chip, unsigned int codec_id,
1067 unsigned short reg, unsigned long waits)
1068{
1069 unsigned long timeout = jiffies + waits;
1070
215dacc2
AS
1071 fm801_writew(chip, AC97_CMD,
1072 reg | (codec_id << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
b1e9ed26
TI
1073 udelay(5);
1074 do {
215dacc2
AS
1075 if ((fm801_readw(chip, AC97_CMD) &
1076 (FM801_AC97_VALID | FM801_AC97_BUSY)) == FM801_AC97_VALID)
b1e9ed26
TI
1077 return 0;
1078 schedule_timeout_uninterruptible(1);
1079 } while (time_after(timeout, jiffies));
1080 return -EIO;
1081}
1082
1083static int snd_fm801_chip_init(struct fm801 *chip, int resume)
1084{
b1e9ed26
TI
1085 unsigned short cmdw;
1086
fb716c0b 1087 if (chip->tea575x_tuner & TUNER_ONLY)
e0a5d82a
AS
1088 goto __ac97_ok;
1089
b1e9ed26 1090 /* codec cold reset + AC'97 warm reset */
215dacc2
AS
1091 fm801_writew(chip, CODEC_CTRL, (1 << 5) | (1 << 6));
1092 fm801_readw(chip, CODEC_CTRL); /* flush posting data */
b1e9ed26 1093 udelay(100);
215dacc2 1094 fm801_writew(chip, CODEC_CTRL, 0);
b1e9ed26 1095
fb716c0b
OZ
1096 if (wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750)) < 0)
1097 if (!resume) {
9c7f9abf
TI
1098 dev_info(chip->card->dev,
1099 "Primary AC'97 codec not found, assume SF64-PCR (tuner-only)\n");
fb716c0b
OZ
1100 chip->tea575x_tuner = 3 | TUNER_ONLY;
1101 goto __ac97_ok;
1102 }
b1e9ed26
TI
1103
1104 if (chip->multichannel) {
1105 if (chip->secondary_addr) {
1106 wait_for_codec(chip, chip->secondary_addr,
1107 AC97_VENDOR_ID1, msecs_to_jiffies(50));
1108 } else {
1109 /* my card has the secondary codec */
1110 /* at address #3, so the loop is inverted */
58e4334e
HH
1111 int i;
1112 for (i = 3; i > 0; i--) {
1113 if (!wait_for_codec(chip, i, AC97_VENDOR_ID1,
b1e9ed26 1114 msecs_to_jiffies(50))) {
215dacc2 1115 cmdw = fm801_readw(chip, AC97_DATA);
b1e9ed26
TI
1116 if (cmdw != 0xffff && cmdw != 0) {
1117 chip->secondary = 1;
58e4334e 1118 chip->secondary_addr = i;
b1e9ed26
TI
1119 break;
1120 }
1121 }
1122 }
1123 }
1124
1125 /* the recovery phase, it seems that probing for non-existing codec might */
1126 /* cause timeout problems */
1127 wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750));
1128 }
1129
6bbe13ec
JK
1130 __ac97_ok:
1131
b1e9ed26 1132 /* init volume */
215dacc2
AS
1133 fm801_writew(chip, PCM_VOL, 0x0808);
1134 fm801_writew(chip, FM_VOL, 0x9f1f);
1135 fm801_writew(chip, I2S_VOL, 0x8808);
b1e9ed26
TI
1136
1137 /* I2S control - I2S mode */
215dacc2 1138 fm801_writew(chip, I2S_MODE, 0x0003);
b1e9ed26 1139
6bbe13ec 1140 /* interrupt setup */
215dacc2 1141 cmdw = fm801_readw(chip, IRQ_MASK);
6bbe13ec
JK
1142 if (chip->irq < 0)
1143 cmdw |= 0x00c3; /* mask everything, no PCM nor MPU */
1144 else
1145 cmdw &= ~0x0083; /* unmask MPU, PLAYBACK & CAPTURE */
215dacc2 1146 fm801_writew(chip, IRQ_MASK, cmdw);
b1e9ed26
TI
1147
1148 /* interrupt clear */
215dacc2
AS
1149 fm801_writew(chip, IRQ_STATUS,
1150 FM801_IRQ_PLAYBACK | FM801_IRQ_CAPTURE | FM801_IRQ_MPU);
b1e9ed26
TI
1151
1152 return 0;
1153}
1154
1155
a5f22156 1156static int snd_fm801_free(struct fm801 *chip)
1da177e4
LT
1157{
1158 unsigned short cmdw;
1159
1160 if (chip->irq < 0)
1161 goto __end_hw;
1162
1163 /* interrupt setup - mask everything */
215dacc2 1164 cmdw = fm801_readw(chip, IRQ_MASK);
1da177e4 1165 cmdw |= 0x00c3;
215dacc2 1166 fm801_writew(chip, IRQ_MASK, cmdw);
1da177e4
LT
1167
1168 __end_hw:
fdb62b50 1169#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b 1170 if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
c37279b9 1171 snd_tea575x_exit(&chip->tea);
d4ecc83b
HV
1172 v4l2_device_unregister(&chip->v4l2_dev);
1173 }
1da177e4 1174#endif
1da177e4
LT
1175 return 0;
1176}
1177
a5f22156 1178static int snd_fm801_dev_free(struct snd_device *device)
1da177e4 1179{
a5f22156 1180 struct fm801 *chip = device->device_data;
1da177e4
LT
1181 return snd_fm801_free(chip);
1182}
1183
e23e7a14
BP
1184static int snd_fm801_create(struct snd_card *card,
1185 struct pci_dev *pci,
1186 int tea575x_tuner,
1187 int radio_nr,
1188 struct fm801 **rchip)
1da177e4 1189{
a5f22156 1190 struct fm801 *chip;
1da177e4 1191 int err;
a5f22156 1192 static struct snd_device_ops ops = {
1da177e4
LT
1193 .dev_free = snd_fm801_dev_free,
1194 };
1195
1196 *rchip = NULL;
5618955c 1197 if ((err = pcim_enable_device(pci)) < 0)
1da177e4 1198 return err;
5618955c
AS
1199 chip = devm_kzalloc(&pci->dev, sizeof(*chip), GFP_KERNEL);
1200 if (chip == NULL)
1da177e4 1201 return -ENOMEM;
1da177e4
LT
1202 spin_lock_init(&chip->reg_lock);
1203 chip->card = card;
1204 chip->pci = pci;
1205 chip->irq = -1;
6bbe13ec 1206 chip->tea575x_tuner = tea575x_tuner;
5618955c 1207 if ((err = pci_request_regions(pci, "FM801")) < 0)
1da177e4 1208 return err;
1da177e4 1209 chip->port = pci_resource_start(pci, 0);
fb716c0b 1210 if ((tea575x_tuner & TUNER_ONLY) == 0) {
5618955c
AS
1211 if (devm_request_irq(&pci->dev, pci->irq, snd_fm801_interrupt,
1212 IRQF_SHARED, KBUILD_MODNAME, chip)) {
1213 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
6bbe13ec
JK
1214 snd_fm801_free(chip);
1215 return -EBUSY;
1216 }
1217 chip->irq = pci->irq;
1218 pci_set_master(pci);
1da177e4 1219 }
1da177e4 1220
44c10138 1221 if (pci->revision >= 0xb1) /* FM801-AU */
1da177e4
LT
1222 chip->multichannel = 1;
1223
b1e9ed26 1224 snd_fm801_chip_init(chip, 0);
fb716c0b
OZ
1225 /* init might set tuner access method */
1226 tea575x_tuner = chip->tea575x_tuner;
1227
1da177e4
LT
1228 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1229 snd_fm801_free(chip);
1230 return err;
1231 }
1232
fdb62b50 1233#ifdef CONFIG_SND_FM801_TEA575X_BOOL
d4ecc83b
HV
1234 err = v4l2_device_register(&pci->dev, &chip->v4l2_dev);
1235 if (err < 0) {
1236 snd_fm801_free(chip);
1237 return err;
1238 }
1239 chip->tea.v4l2_dev = &chip->v4l2_dev;
1240 chip->tea.radio_nr = radio_nr;
d7ba858a
OZ
1241 chip->tea.private_data = chip;
1242 chip->tea.ops = &snd_fm801_tea_ops;
10ca7201 1243 sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci));
fb716c0b
OZ
1244 if ((tea575x_tuner & TUNER_TYPE_MASK) > 0 &&
1245 (tea575x_tuner & TUNER_TYPE_MASK) < 4) {
5daf53a6 1246 if (snd_tea575x_init(&chip->tea, THIS_MODULE)) {
9c7f9abf 1247 dev_err(card->dev, "TEA575x radio not found\n");
d4ecc83b 1248 snd_fm801_free(chip);
96760015
DC
1249 return -ENODEV;
1250 }
1251 } else if ((tea575x_tuner & TUNER_TYPE_MASK) == 0) {
d7ba858a
OZ
1252 /* autodetect tuner connection */
1253 for (tea575x_tuner = 1; tea575x_tuner <= 3; tea575x_tuner++) {
1254 chip->tea575x_tuner = tea575x_tuner;
5daf53a6 1255 if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) {
9c7f9abf
TI
1256 dev_info(card->dev,
1257 "detected TEA575x radio type %s\n",
8e699d2c 1258 get_tea575x_gpio(chip)->name);
d7ba858a
OZ
1259 break;
1260 }
1261 }
96760015 1262 if (tea575x_tuner == 4) {
9c7f9abf 1263 dev_err(card->dev, "TEA575x radio not found\n");
c37279b9 1264 chip->tea575x_tuner = TUNER_DISABLED;
96760015
DC
1265 }
1266 }
c37279b9 1267 if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
8e699d2c 1268 strlcpy(chip->tea.card, get_tea575x_gpio(chip)->name,
c37279b9
BH
1269 sizeof(chip->tea.card));
1270 }
1da177e4
LT
1271#endif
1272
1273 *rchip = chip;
1274 return 0;
1275}
1276
e23e7a14
BP
1277static int snd_card_fm801_probe(struct pci_dev *pci,
1278 const struct pci_device_id *pci_id)
1da177e4
LT
1279{
1280 static int dev;
a5f22156
TI
1281 struct snd_card *card;
1282 struct fm801 *chip;
1283 struct snd_opl3 *opl3;
1da177e4
LT
1284 int err;
1285
1286 if (dev >= SNDRV_CARDS)
1287 return -ENODEV;
1288 if (!enable[dev]) {
1289 dev++;
1290 return -ENOENT;
1291 }
1292
60c5772b
TI
1293 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1294 0, &card);
e58de7ba
TI
1295 if (err < 0)
1296 return err;
d4ecc83b 1297 if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], radio_nr[dev], &chip)) < 0) {
1da177e4
LT
1298 snd_card_free(card);
1299 return err;
1300 }
b1e9ed26 1301 card->private_data = chip;
1da177e4
LT
1302
1303 strcpy(card->driver, "FM801");
1304 strcpy(card->shortname, "ForteMedia FM801-");
1305 strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1306 sprintf(card->longname, "%s at 0x%lx, irq %i",
1307 card->shortname, chip->port, chip->irq);
1308
fb716c0b 1309 if (chip->tea575x_tuner & TUNER_ONLY)
e0a5d82a
AS
1310 goto __fm801_tuner_only;
1311
483337f9 1312 if ((err = snd_fm801_pcm(chip, 0)) < 0) {
1da177e4
LT
1313 snd_card_free(card);
1314 return err;
1315 }
1316 if ((err = snd_fm801_mixer(chip)) < 0) {
1317 snd_card_free(card);
1318 return err;
1319 }
1320 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
215dacc2 1321 chip->port + FM801_MPU401_DATA,
dba8b469
CL
1322 MPU401_INFO_INTEGRATED |
1323 MPU401_INFO_IRQ_HOOK,
1324 -1, &chip->rmidi)) < 0) {
1da177e4
LT
1325 snd_card_free(card);
1326 return err;
1327 }
215dacc2
AS
1328 if ((err = snd_opl3_create(card, chip->port + FM801_OPL3_BANK0,
1329 chip->port + FM801_OPL3_BANK1,
1da177e4
LT
1330 OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) {
1331 snd_card_free(card);
1332 return err;
1333 }
1334 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1335 snd_card_free(card);
1336 return err;
1337 }
1338
e0a5d82a 1339 __fm801_tuner_only:
1da177e4
LT
1340 if ((err = snd_card_register(card)) < 0) {
1341 snd_card_free(card);
1342 return err;
1343 }
1344 pci_set_drvdata(pci, card);
1345 dev++;
1346 return 0;
1347}
1348
e23e7a14 1349static void snd_card_fm801_remove(struct pci_dev *pci)
1da177e4
LT
1350{
1351 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT
1352}
1353
c7561cd8 1354#ifdef CONFIG_PM_SLEEP
b1e9ed26
TI
1355static unsigned char saved_regs[] = {
1356 FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC,
1357 FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2,
1358 FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2,
1359 FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL,
1360};
1361
68cb2b55 1362static int snd_fm801_suspend(struct device *dev)
b1e9ed26 1363{
68cb2b55 1364 struct snd_card *card = dev_get_drvdata(dev);
b1e9ed26
TI
1365 struct fm801 *chip = card->private_data;
1366 int i;
1367
1368 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1369 snd_pcm_suspend_all(chip->pcm);
1370 snd_ac97_suspend(chip->ac97);
1371 snd_ac97_suspend(chip->ac97_sec);
1372 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
1373 chip->saved_regs[i] = inw(chip->port + saved_regs[i]);
1374 /* FIXME: tea575x suspend */
b1e9ed26
TI
1375 return 0;
1376}
1377
68cb2b55 1378static int snd_fm801_resume(struct device *dev)
b1e9ed26 1379{
68cb2b55 1380 struct snd_card *card = dev_get_drvdata(dev);
b1e9ed26
TI
1381 struct fm801 *chip = card->private_data;
1382 int i;
1383
b1e9ed26
TI
1384 snd_fm801_chip_init(chip, 1);
1385 snd_ac97_resume(chip->ac97);
1386 snd_ac97_resume(chip->ac97_sec);
1387 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
1388 outw(chip->saved_regs[i], chip->port + saved_regs[i]);
1389
1390 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1391 return 0;
1392}
68cb2b55
TI
1393
1394static SIMPLE_DEV_PM_OPS(snd_fm801_pm, snd_fm801_suspend, snd_fm801_resume);
1395#define SND_FM801_PM_OPS &snd_fm801_pm
1396#else
1397#define SND_FM801_PM_OPS NULL
c7561cd8 1398#endif /* CONFIG_PM_SLEEP */
b1e9ed26 1399
e9f66d9b 1400static struct pci_driver fm801_driver = {
3733e424 1401 .name = KBUILD_MODNAME,
1da177e4
LT
1402 .id_table = snd_fm801_ids,
1403 .probe = snd_card_fm801_probe,
e23e7a14 1404 .remove = snd_card_fm801_remove,
68cb2b55
TI
1405 .driver = {
1406 .pm = SND_FM801_PM_OPS,
1407 },
1da177e4
LT
1408};
1409
e9f66d9b 1410module_pci_driver(fm801_driver);