Commit | Line | Data |
---|---|---|
c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 LT |
2 | /* |
3 | * The driver for the ForteMedia FM801 based soundcards | |
c1017a4c | 4 | * Copyright (c) by Jaroslav Kysela <perex@perex.cz> |
1da177e4 LT |
5 | */ |
6 | ||
1da177e4 LT |
7 | #include <linux/delay.h> |
8 | #include <linux/init.h> | |
9 | #include <linux/interrupt.h> | |
215dacc2 | 10 | #include <linux/io.h> |
1da177e4 LT |
11 | #include <linux/pci.h> |
12 | #include <linux/slab.h> | |
65a77217 | 13 | #include <linux/module.h> |
1da177e4 LT |
14 | #include <sound/core.h> |
15 | #include <sound/pcm.h> | |
666c70ff | 16 | #include <sound/tlv.h> |
1da177e4 LT |
17 | #include <sound/ac97_codec.h> |
18 | #include <sound/mpu401.h> | |
19 | #include <sound/opl3.h> | |
20 | #include <sound/initval.h> | |
21 | ||
efce4bb9 | 22 | #ifdef CONFIG_SND_FM801_TEA575X_BOOL |
d647f0b7 | 23 | #include <media/drv-intf/tea575x.h> |
1da177e4 LT |
24 | #endif |
25 | ||
c1017a4c | 26 | MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); |
1da177e4 LT |
27 | MODULE_DESCRIPTION("ForteMedia FM801"); |
28 | MODULE_LICENSE("GPL"); | |
29 | MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801}," | |
30 | "{Genius,SoundMaker Live 5.1}}"); | |
31 | ||
32 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ | |
33 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
a67ff6a5 | 34 | static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ |
1da177e4 LT |
35 | /* |
36 | * Enable TEA575x tuner | |
37 | * 1 = MediaForte 256-PCS | |
d7ba858a | 38 | * 2 = MediaForte 256-PCP |
1da177e4 | 39 | * 3 = MediaForte 64-PCR |
fb716c0b | 40 | * 16 = setup tuner only (this is additional bit), i.e. SF64-PCR FM card |
1da177e4 LT |
41 | * High 16-bits are video (radio) device number + 1 |
42 | */ | |
6581f4e7 | 43 | static int tea575x_tuner[SNDRV_CARDS]; |
d4ecc83b | 44 | static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1}; |
1da177e4 LT |
45 | |
46 | module_param_array(index, int, NULL, 0444); | |
47 | MODULE_PARM_DESC(index, "Index value for the FM801 soundcard."); | |
48 | module_param_array(id, charp, NULL, 0444); | |
49 | MODULE_PARM_DESC(id, "ID string for the FM801 soundcard."); | |
50 | module_param_array(enable, bool, NULL, 0444); | |
51 | MODULE_PARM_DESC(enable, "Enable FM801 soundcard."); | |
52 | module_param_array(tea575x_tuner, int, NULL, 0444); | |
d7ba858a | 53 | MODULE_PARM_DESC(tea575x_tuner, "TEA575x tuner access method (0 = auto, 1 = SF256-PCS, 2=SF256-PCP, 3=SF64-PCR, 8=disable, +16=tuner-only)."); |
d4ecc83b HV |
54 | module_param_array(radio_nr, int, NULL, 0444); |
55 | MODULE_PARM_DESC(radio_nr, "Radio device numbers"); | |
56 | ||
fb716c0b | 57 | |
c37279b9 | 58 | #define TUNER_DISABLED (1<<3) |
fb716c0b OZ |
59 | #define TUNER_ONLY (1<<4) |
60 | #define TUNER_TYPE_MASK (~TUNER_ONLY & 0xFFFF) | |
1da177e4 LT |
61 | |
62 | /* | |
63 | * Direct registers | |
64 | */ | |
65 | ||
215dacc2 AS |
66 | #define fm801_writew(chip,reg,value) outw((value), chip->port + FM801_##reg) |
67 | #define fm801_readw(chip,reg) inw(chip->port + FM801_##reg) | |
68 | ||
69 | #define fm801_writel(chip,reg,value) outl((value), chip->port + FM801_##reg) | |
1da177e4 LT |
70 | |
71 | #define FM801_PCM_VOL 0x00 /* PCM Output Volume */ | |
72 | #define FM801_FM_VOL 0x02 /* FM Output Volume */ | |
73 | #define FM801_I2S_VOL 0x04 /* I2S Volume */ | |
74 | #define FM801_REC_SRC 0x06 /* Record Source */ | |
75 | #define FM801_PLY_CTRL 0x08 /* Playback Control */ | |
76 | #define FM801_PLY_COUNT 0x0a /* Playback Count */ | |
77 | #define FM801_PLY_BUF1 0x0c /* Playback Bufer I */ | |
78 | #define FM801_PLY_BUF2 0x10 /* Playback Buffer II */ | |
79 | #define FM801_CAP_CTRL 0x14 /* Capture Control */ | |
80 | #define FM801_CAP_COUNT 0x16 /* Capture Count */ | |
81 | #define FM801_CAP_BUF1 0x18 /* Capture Buffer I */ | |
82 | #define FM801_CAP_BUF2 0x1c /* Capture Buffer II */ | |
83 | #define FM801_CODEC_CTRL 0x22 /* Codec Control */ | |
84 | #define FM801_I2S_MODE 0x24 /* I2S Mode Control */ | |
85 | #define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */ | |
86 | #define FM801_I2C_CTRL 0x29 /* I2C Control */ | |
87 | #define FM801_AC97_CMD 0x2a /* AC'97 Command */ | |
88 | #define FM801_AC97_DATA 0x2c /* AC'97 Data */ | |
89 | #define FM801_MPU401_DATA 0x30 /* MPU401 Data */ | |
90 | #define FM801_MPU401_CMD 0x31 /* MPU401 Command */ | |
91 | #define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */ | |
92 | #define FM801_GEN_CTRL 0x54 /* General Control */ | |
93 | #define FM801_IRQ_MASK 0x56 /* Interrupt Mask */ | |
94 | #define FM801_IRQ_STATUS 0x5a /* Interrupt Status */ | |
95 | #define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */ | |
96 | #define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */ | |
97 | #define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */ | |
98 | #define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */ | |
99 | #define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */ | |
100 | ||
b1e9ed26 TI |
101 | /* codec access */ |
102 | #define FM801_AC97_READ (1<<7) /* read=1, write=0 */ | |
103 | #define FM801_AC97_VALID (1<<8) /* port valid=1 */ | |
104 | #define FM801_AC97_BUSY (1<<9) /* busy=1 */ | |
105 | #define FM801_AC97_ADDR_SHIFT 10 /* codec id (2bit) */ | |
1da177e4 LT |
106 | |
107 | /* playback and record control register bits */ | |
108 | #define FM801_BUF1_LAST (1<<1) | |
109 | #define FM801_BUF2_LAST (1<<2) | |
110 | #define FM801_START (1<<5) | |
111 | #define FM801_PAUSE (1<<6) | |
112 | #define FM801_IMMED_STOP (1<<7) | |
113 | #define FM801_RATE_SHIFT 8 | |
114 | #define FM801_RATE_MASK (15 << FM801_RATE_SHIFT) | |
115 | #define FM801_CHANNELS_4 (1<<12) /* playback only */ | |
116 | #define FM801_CHANNELS_6 (2<<12) /* playback only */ | |
117 | #define FM801_CHANNELS_6MS (3<<12) /* playback only */ | |
118 | #define FM801_CHANNELS_MASK (3<<12) | |
119 | #define FM801_16BIT (1<<14) | |
120 | #define FM801_STEREO (1<<15) | |
121 | ||
122 | /* IRQ status bits */ | |
123 | #define FM801_IRQ_PLAYBACK (1<<8) | |
124 | #define FM801_IRQ_CAPTURE (1<<9) | |
125 | #define FM801_IRQ_VOLUME (1<<14) | |
126 | #define FM801_IRQ_MPU (1<<15) | |
127 | ||
128 | /* GPIO control register */ | |
129 | #define FM801_GPIO_GP0 (1<<0) /* read/write */ | |
130 | #define FM801_GPIO_GP1 (1<<1) | |
131 | #define FM801_GPIO_GP2 (1<<2) | |
132 | #define FM801_GPIO_GP3 (1<<3) | |
133 | #define FM801_GPIO_GP(x) (1<<(0+(x))) | |
134 | #define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/ | |
135 | #define FM801_GPIO_GD1 (1<<9) | |
136 | #define FM801_GPIO_GD2 (1<<10) | |
137 | #define FM801_GPIO_GD3 (1<<11) | |
138 | #define FM801_GPIO_GD(x) (1<<(8+(x))) | |
139 | #define FM801_GPIO_GS0 (1<<12) /* function select: */ | |
140 | #define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */ | |
141 | #define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */ | |
142 | #define FM801_GPIO_GS3 (1<<15) | |
143 | #define FM801_GPIO_GS(x) (1<<(12+(x))) | |
144 | ||
052c233e AS |
145 | /** |
146 | * struct fm801 - describes FM801 chip | |
147 | * @port: I/O port number | |
148 | * @multichannel: multichannel support | |
149 | * @secondary: secondary codec | |
150 | * @secondary_addr: address of the secondary codec | |
151 | * @tea575x_tuner: tuner access method & flags | |
152 | * @ply_ctrl: playback control | |
153 | * @cap_ctrl: capture control | |
1da177e4 | 154 | */ |
a5f22156 | 155 | struct fm801 { |
d3d33aab | 156 | struct device *dev; |
1da177e4 LT |
157 | int irq; |
158 | ||
052c233e AS |
159 | unsigned long port; |
160 | unsigned int multichannel: 1, | |
161 | secondary: 1; | |
162 | unsigned char secondary_addr; | |
163 | unsigned int tea575x_tuner; | |
1da177e4 | 164 | |
052c233e AS |
165 | unsigned short ply_ctrl; |
166 | unsigned short cap_ctrl; | |
1da177e4 LT |
167 | |
168 | unsigned long ply_buffer; | |
169 | unsigned int ply_buf; | |
170 | unsigned int ply_count; | |
171 | unsigned int ply_size; | |
172 | unsigned int ply_pos; | |
173 | ||
174 | unsigned long cap_buffer; | |
175 | unsigned int cap_buf; | |
176 | unsigned int cap_count; | |
177 | unsigned int cap_size; | |
178 | unsigned int cap_pos; | |
179 | ||
a5f22156 TI |
180 | struct snd_ac97_bus *ac97_bus; |
181 | struct snd_ac97 *ac97; | |
182 | struct snd_ac97 *ac97_sec; | |
1da177e4 | 183 | |
a5f22156 TI |
184 | struct snd_card *card; |
185 | struct snd_pcm *pcm; | |
186 | struct snd_rawmidi *rmidi; | |
187 | struct snd_pcm_substream *playback_substream; | |
188 | struct snd_pcm_substream *capture_substream; | |
1da177e4 LT |
189 | unsigned int p_dma_size; |
190 | unsigned int c_dma_size; | |
191 | ||
192 | spinlock_t reg_lock; | |
a5f22156 | 193 | struct snd_info_entry *proc_entry; |
1da177e4 | 194 | |
fdb62b50 | 195 | #ifdef CONFIG_SND_FM801_TEA575X_BOOL |
d4ecc83b | 196 | struct v4l2_device v4l2_dev; |
a5f22156 | 197 | struct snd_tea575x tea; |
1da177e4 | 198 | #endif |
b1e9ed26 | 199 | |
c7561cd8 | 200 | #ifdef CONFIG_PM_SLEEP |
b1e9ed26 TI |
201 | u16 saved_regs[0x20]; |
202 | #endif | |
1da177e4 LT |
203 | }; |
204 | ||
4b5c15f7 AS |
205 | /* |
206 | * IO accessors | |
207 | */ | |
208 | ||
209 | static inline void fm801_iowrite16(struct fm801 *chip, unsigned short offset, u16 value) | |
210 | { | |
211 | outw(value, chip->port + offset); | |
212 | } | |
213 | ||
214 | static inline u16 fm801_ioread16(struct fm801 *chip, unsigned short offset) | |
215 | { | |
216 | return inw(chip->port + offset); | |
217 | } | |
218 | ||
9baa3c34 | 219 | static const struct pci_device_id snd_fm801_ids[] = { |
1da177e4 | 220 | { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */ |
26be8659 | 221 | { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */ |
1da177e4 LT |
222 | { 0, } |
223 | }; | |
224 | ||
225 | MODULE_DEVICE_TABLE(pci, snd_fm801_ids); | |
226 | ||
227 | /* | |
228 | * common I/O routines | |
229 | */ | |
230 | ||
02fd1a76 AS |
231 | static bool fm801_ac97_is_ready(struct fm801 *chip, unsigned int iterations) |
232 | { | |
233 | unsigned int idx; | |
234 | ||
235 | for (idx = 0; idx < iterations; idx++) { | |
236 | if (!(fm801_readw(chip, AC97_CMD) & FM801_AC97_BUSY)) | |
237 | return true; | |
238 | udelay(10); | |
239 | } | |
240 | return false; | |
241 | } | |
242 | ||
243 | static bool fm801_ac97_is_valid(struct fm801 *chip, unsigned int iterations) | |
244 | { | |
245 | unsigned int idx; | |
246 | ||
247 | for (idx = 0; idx < iterations; idx++) { | |
248 | if (fm801_readw(chip, AC97_CMD) & FM801_AC97_VALID) | |
249 | return true; | |
250 | udelay(10); | |
251 | } | |
252 | return false; | |
253 | } | |
254 | ||
a5f22156 | 255 | static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg, |
1da177e4 LT |
256 | unsigned short mask, unsigned short value) |
257 | { | |
258 | int change; | |
259 | unsigned long flags; | |
260 | unsigned short old, new; | |
261 | ||
262 | spin_lock_irqsave(&chip->reg_lock, flags); | |
4b5c15f7 | 263 | old = fm801_ioread16(chip, reg); |
1da177e4 LT |
264 | new = (old & ~mask) | value; |
265 | change = old != new; | |
266 | if (change) | |
4b5c15f7 | 267 | fm801_iowrite16(chip, reg, new); |
1da177e4 LT |
268 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
269 | return change; | |
270 | } | |
271 | ||
a5f22156 | 272 | static void snd_fm801_codec_write(struct snd_ac97 *ac97, |
1da177e4 LT |
273 | unsigned short reg, |
274 | unsigned short val) | |
275 | { | |
a5f22156 | 276 | struct fm801 *chip = ac97->private_data; |
1da177e4 LT |
277 | |
278 | /* | |
279 | * Wait until the codec interface is not ready.. | |
280 | */ | |
02fd1a76 AS |
281 | if (!fm801_ac97_is_ready(chip, 100)) { |
282 | dev_err(chip->card->dev, "AC'97 interface is busy (1)\n"); | |
283 | return; | |
1da177e4 | 284 | } |
1da177e4 | 285 | |
1da177e4 | 286 | /* write data and address */ |
215dacc2 AS |
287 | fm801_writew(chip, AC97_DATA, val); |
288 | fm801_writew(chip, AC97_CMD, reg | (ac97->addr << FM801_AC97_ADDR_SHIFT)); | |
1da177e4 LT |
289 | /* |
290 | * Wait until the write command is not completed.. | |
02fd1a76 AS |
291 | */ |
292 | if (!fm801_ac97_is_ready(chip, 1000)) | |
293 | dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n", | |
294 | ac97->num); | |
1da177e4 LT |
295 | } |
296 | ||
a5f22156 | 297 | static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg) |
1da177e4 | 298 | { |
a5f22156 | 299 | struct fm801 *chip = ac97->private_data; |
1da177e4 LT |
300 | |
301 | /* | |
302 | * Wait until the codec interface is not ready.. | |
303 | */ | |
02fd1a76 AS |
304 | if (!fm801_ac97_is_ready(chip, 100)) { |
305 | dev_err(chip->card->dev, "AC'97 interface is busy (1)\n"); | |
306 | return 0; | |
1da177e4 | 307 | } |
1da177e4 | 308 | |
1da177e4 | 309 | /* read command */ |
215dacc2 AS |
310 | fm801_writew(chip, AC97_CMD, |
311 | reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ); | |
02fd1a76 AS |
312 | if (!fm801_ac97_is_ready(chip, 100)) { |
313 | dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n", | |
314 | ac97->num); | |
315 | return 0; | |
1da177e4 | 316 | } |
1da177e4 | 317 | |
02fd1a76 AS |
318 | if (!fm801_ac97_is_valid(chip, 1000)) { |
319 | dev_err(chip->card->dev, | |
320 | "AC'97 interface #%d is not valid (2)\n", ac97->num); | |
321 | return 0; | |
1da177e4 | 322 | } |
1da177e4 | 323 | |
215dacc2 | 324 | return fm801_readw(chip, AC97_DATA); |
1da177e4 LT |
325 | } |
326 | ||
d71a13f4 | 327 | static const unsigned int rates[] = { |
1da177e4 LT |
328 | 5500, 8000, 9600, 11025, |
329 | 16000, 19200, 22050, 32000, | |
330 | 38400, 44100, 48000 | |
331 | }; | |
332 | ||
d71a13f4 | 333 | static const struct snd_pcm_hw_constraint_list hw_constraints_rates = { |
1da177e4 LT |
334 | .count = ARRAY_SIZE(rates), |
335 | .list = rates, | |
336 | .mask = 0, | |
337 | }; | |
338 | ||
d71a13f4 | 339 | static const unsigned int channels[] = { |
1da177e4 LT |
340 | 2, 4, 6 |
341 | }; | |
342 | ||
d71a13f4 | 343 | static const struct snd_pcm_hw_constraint_list hw_constraints_channels = { |
5e4968e2 | 344 | .count = ARRAY_SIZE(channels), |
1da177e4 LT |
345 | .list = channels, |
346 | .mask = 0, | |
347 | }; | |
348 | ||
349 | /* | |
350 | * Sample rate routines | |
351 | */ | |
352 | ||
353 | static unsigned short snd_fm801_rate_bits(unsigned int rate) | |
354 | { | |
355 | unsigned int idx; | |
356 | ||
357 | for (idx = 0; idx < ARRAY_SIZE(rates); idx++) | |
358 | if (rates[idx] == rate) | |
359 | return idx; | |
360 | snd_BUG(); | |
361 | return ARRAY_SIZE(rates) - 1; | |
362 | } | |
363 | ||
364 | /* | |
365 | * PCM part | |
366 | */ | |
367 | ||
a5f22156 | 368 | static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
369 | int cmd) |
370 | { | |
a5f22156 | 371 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
372 | |
373 | spin_lock(&chip->reg_lock); | |
374 | switch (cmd) { | |
375 | case SNDRV_PCM_TRIGGER_START: | |
376 | chip->ply_ctrl &= ~(FM801_BUF1_LAST | | |
377 | FM801_BUF2_LAST | | |
378 | FM801_PAUSE); | |
379 | chip->ply_ctrl |= FM801_START | | |
380 | FM801_IMMED_STOP; | |
381 | break; | |
382 | case SNDRV_PCM_TRIGGER_STOP: | |
383 | chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE); | |
384 | break; | |
385 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
b1e9ed26 | 386 | case SNDRV_PCM_TRIGGER_SUSPEND: |
1da177e4 LT |
387 | chip->ply_ctrl |= FM801_PAUSE; |
388 | break; | |
389 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
b1e9ed26 | 390 | case SNDRV_PCM_TRIGGER_RESUME: |
1da177e4 LT |
391 | chip->ply_ctrl &= ~FM801_PAUSE; |
392 | break; | |
393 | default: | |
394 | spin_unlock(&chip->reg_lock); | |
395 | snd_BUG(); | |
396 | return -EINVAL; | |
397 | } | |
215dacc2 | 398 | fm801_writew(chip, PLY_CTRL, chip->ply_ctrl); |
1da177e4 LT |
399 | spin_unlock(&chip->reg_lock); |
400 | return 0; | |
401 | } | |
402 | ||
a5f22156 | 403 | static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
404 | int cmd) |
405 | { | |
a5f22156 | 406 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
407 | |
408 | spin_lock(&chip->reg_lock); | |
409 | switch (cmd) { | |
410 | case SNDRV_PCM_TRIGGER_START: | |
411 | chip->cap_ctrl &= ~(FM801_BUF1_LAST | | |
412 | FM801_BUF2_LAST | | |
413 | FM801_PAUSE); | |
414 | chip->cap_ctrl |= FM801_START | | |
415 | FM801_IMMED_STOP; | |
416 | break; | |
417 | case SNDRV_PCM_TRIGGER_STOP: | |
418 | chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE); | |
419 | break; | |
420 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
b1e9ed26 | 421 | case SNDRV_PCM_TRIGGER_SUSPEND: |
1da177e4 LT |
422 | chip->cap_ctrl |= FM801_PAUSE; |
423 | break; | |
424 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
b1e9ed26 | 425 | case SNDRV_PCM_TRIGGER_RESUME: |
1da177e4 LT |
426 | chip->cap_ctrl &= ~FM801_PAUSE; |
427 | break; | |
428 | default: | |
429 | spin_unlock(&chip->reg_lock); | |
430 | snd_BUG(); | |
431 | return -EINVAL; | |
432 | } | |
215dacc2 | 433 | fm801_writew(chip, CAP_CTRL, chip->cap_ctrl); |
1da177e4 LT |
434 | spin_unlock(&chip->reg_lock); |
435 | return 0; | |
436 | } | |
437 | ||
a5f22156 | 438 | static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 439 | { |
a5f22156 TI |
440 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
441 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
442 | |
443 | chip->ply_size = snd_pcm_lib_buffer_bytes(substream); | |
444 | chip->ply_count = snd_pcm_lib_period_bytes(substream); | |
445 | spin_lock_irq(&chip->reg_lock); | |
446 | chip->ply_ctrl &= ~(FM801_START | FM801_16BIT | | |
447 | FM801_STEREO | FM801_RATE_MASK | | |
448 | FM801_CHANNELS_MASK); | |
449 | if (snd_pcm_format_width(runtime->format) == 16) | |
450 | chip->ply_ctrl |= FM801_16BIT; | |
451 | if (runtime->channels > 1) { | |
452 | chip->ply_ctrl |= FM801_STEREO; | |
453 | if (runtime->channels == 4) | |
454 | chip->ply_ctrl |= FM801_CHANNELS_4; | |
455 | else if (runtime->channels == 6) | |
456 | chip->ply_ctrl |= FM801_CHANNELS_6; | |
457 | } | |
458 | chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT; | |
459 | chip->ply_buf = 0; | |
215dacc2 AS |
460 | fm801_writew(chip, PLY_CTRL, chip->ply_ctrl); |
461 | fm801_writew(chip, PLY_COUNT, chip->ply_count - 1); | |
1da177e4 LT |
462 | chip->ply_buffer = runtime->dma_addr; |
463 | chip->ply_pos = 0; | |
215dacc2 AS |
464 | fm801_writel(chip, PLY_BUF1, chip->ply_buffer); |
465 | fm801_writel(chip, PLY_BUF2, | |
466 | chip->ply_buffer + (chip->ply_count % chip->ply_size)); | |
1da177e4 LT |
467 | spin_unlock_irq(&chip->reg_lock); |
468 | return 0; | |
469 | } | |
470 | ||
a5f22156 | 471 | static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 472 | { |
a5f22156 TI |
473 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
474 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
475 | |
476 | chip->cap_size = snd_pcm_lib_buffer_bytes(substream); | |
477 | chip->cap_count = snd_pcm_lib_period_bytes(substream); | |
478 | spin_lock_irq(&chip->reg_lock); | |
479 | chip->cap_ctrl &= ~(FM801_START | FM801_16BIT | | |
480 | FM801_STEREO | FM801_RATE_MASK); | |
481 | if (snd_pcm_format_width(runtime->format) == 16) | |
482 | chip->cap_ctrl |= FM801_16BIT; | |
483 | if (runtime->channels > 1) | |
484 | chip->cap_ctrl |= FM801_STEREO; | |
485 | chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT; | |
486 | chip->cap_buf = 0; | |
215dacc2 AS |
487 | fm801_writew(chip, CAP_CTRL, chip->cap_ctrl); |
488 | fm801_writew(chip, CAP_COUNT, chip->cap_count - 1); | |
1da177e4 LT |
489 | chip->cap_buffer = runtime->dma_addr; |
490 | chip->cap_pos = 0; | |
215dacc2 AS |
491 | fm801_writel(chip, CAP_BUF1, chip->cap_buffer); |
492 | fm801_writel(chip, CAP_BUF2, | |
493 | chip->cap_buffer + (chip->cap_count % chip->cap_size)); | |
1da177e4 LT |
494 | spin_unlock_irq(&chip->reg_lock); |
495 | return 0; | |
496 | } | |
497 | ||
a5f22156 | 498 | static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 499 | { |
a5f22156 | 500 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
501 | size_t ptr; |
502 | ||
503 | if (!(chip->ply_ctrl & FM801_START)) | |
504 | return 0; | |
505 | spin_lock(&chip->reg_lock); | |
215dacc2 AS |
506 | ptr = chip->ply_pos + (chip->ply_count - 1) - fm801_readw(chip, PLY_COUNT); |
507 | if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_PLAYBACK) { | |
1da177e4 LT |
508 | ptr += chip->ply_count; |
509 | ptr %= chip->ply_size; | |
510 | } | |
511 | spin_unlock(&chip->reg_lock); | |
512 | return bytes_to_frames(substream->runtime, ptr); | |
513 | } | |
514 | ||
a5f22156 | 515 | static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 516 | { |
a5f22156 | 517 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
518 | size_t ptr; |
519 | ||
520 | if (!(chip->cap_ctrl & FM801_START)) | |
521 | return 0; | |
522 | spin_lock(&chip->reg_lock); | |
215dacc2 AS |
523 | ptr = chip->cap_pos + (chip->cap_count - 1) - fm801_readw(chip, CAP_COUNT); |
524 | if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_CAPTURE) { | |
1da177e4 LT |
525 | ptr += chip->cap_count; |
526 | ptr %= chip->cap_size; | |
527 | } | |
528 | spin_unlock(&chip->reg_lock); | |
529 | return bytes_to_frames(substream->runtime, ptr); | |
530 | } | |
531 | ||
7d12e780 | 532 | static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id) |
1da177e4 | 533 | { |
a5f22156 | 534 | struct fm801 *chip = dev_id; |
1da177e4 LT |
535 | unsigned short status; |
536 | unsigned int tmp; | |
537 | ||
215dacc2 | 538 | status = fm801_readw(chip, IRQ_STATUS); |
1da177e4 LT |
539 | status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME; |
540 | if (! status) | |
541 | return IRQ_NONE; | |
542 | /* ack first */ | |
215dacc2 | 543 | fm801_writew(chip, IRQ_STATUS, status); |
1da177e4 LT |
544 | if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) { |
545 | spin_lock(&chip->reg_lock); | |
546 | chip->ply_buf++; | |
547 | chip->ply_pos += chip->ply_count; | |
548 | chip->ply_pos %= chip->ply_size; | |
549 | tmp = chip->ply_pos + chip->ply_count; | |
550 | tmp %= chip->ply_size; | |
215dacc2 AS |
551 | if (chip->ply_buf & 1) |
552 | fm801_writel(chip, PLY_BUF1, chip->ply_buffer + tmp); | |
553 | else | |
554 | fm801_writel(chip, PLY_BUF2, chip->ply_buffer + tmp); | |
1da177e4 LT |
555 | spin_unlock(&chip->reg_lock); |
556 | snd_pcm_period_elapsed(chip->playback_substream); | |
557 | } | |
558 | if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) { | |
559 | spin_lock(&chip->reg_lock); | |
560 | chip->cap_buf++; | |
561 | chip->cap_pos += chip->cap_count; | |
562 | chip->cap_pos %= chip->cap_size; | |
563 | tmp = chip->cap_pos + chip->cap_count; | |
564 | tmp %= chip->cap_size; | |
215dacc2 AS |
565 | if (chip->cap_buf & 1) |
566 | fm801_writel(chip, CAP_BUF1, chip->cap_buffer + tmp); | |
567 | else | |
568 | fm801_writel(chip, CAP_BUF2, chip->cap_buffer + tmp); | |
1da177e4 LT |
569 | spin_unlock(&chip->reg_lock); |
570 | snd_pcm_period_elapsed(chip->capture_substream); | |
571 | } | |
572 | if (chip->rmidi && (status & FM801_IRQ_MPU)) | |
7d12e780 | 573 | snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data); |
997c87da AS |
574 | if (status & FM801_IRQ_VOLUME) { |
575 | /* TODO */ | |
576 | } | |
1da177e4 LT |
577 | |
578 | return IRQ_HANDLED; | |
579 | } | |
580 | ||
dee49895 | 581 | static const struct snd_pcm_hardware snd_fm801_playback = |
1da177e4 LT |
582 | { |
583 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
584 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
b1e9ed26 | 585 | SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME | |
1da177e4 LT |
586 | SNDRV_PCM_INFO_MMAP_VALID), |
587 | .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, | |
588 | .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000, | |
589 | .rate_min = 5500, | |
590 | .rate_max = 48000, | |
591 | .channels_min = 1, | |
592 | .channels_max = 2, | |
593 | .buffer_bytes_max = (128*1024), | |
594 | .period_bytes_min = 64, | |
595 | .period_bytes_max = (128*1024), | |
596 | .periods_min = 1, | |
597 | .periods_max = 1024, | |
598 | .fifo_size = 0, | |
599 | }; | |
600 | ||
dee49895 | 601 | static const struct snd_pcm_hardware snd_fm801_capture = |
1da177e4 LT |
602 | { |
603 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
604 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
b1e9ed26 | 605 | SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME | |
1da177e4 LT |
606 | SNDRV_PCM_INFO_MMAP_VALID), |
607 | .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, | |
608 | .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000, | |
609 | .rate_min = 5500, | |
610 | .rate_max = 48000, | |
611 | .channels_min = 1, | |
612 | .channels_max = 2, | |
613 | .buffer_bytes_max = (128*1024), | |
614 | .period_bytes_min = 64, | |
615 | .period_bytes_max = (128*1024), | |
616 | .periods_min = 1, | |
617 | .periods_max = 1024, | |
618 | .fifo_size = 0, | |
619 | }; | |
620 | ||
a5f22156 | 621 | static int snd_fm801_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 622 | { |
a5f22156 TI |
623 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
624 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
625 | int err; |
626 | ||
627 | chip->playback_substream = substream; | |
628 | runtime->hw = snd_fm801_playback; | |
a5f22156 TI |
629 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, |
630 | &hw_constraints_rates); | |
1da177e4 LT |
631 | if (chip->multichannel) { |
632 | runtime->hw.channels_max = 6; | |
a5f22156 TI |
633 | snd_pcm_hw_constraint_list(runtime, 0, |
634 | SNDRV_PCM_HW_PARAM_CHANNELS, | |
635 | &hw_constraints_channels); | |
1da177e4 LT |
636 | } |
637 | if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) | |
638 | return err; | |
639 | return 0; | |
640 | } | |
641 | ||
a5f22156 | 642 | static int snd_fm801_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 643 | { |
a5f22156 TI |
644 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
645 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
646 | int err; |
647 | ||
648 | chip->capture_substream = substream; | |
649 | runtime->hw = snd_fm801_capture; | |
a5f22156 TI |
650 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, |
651 | &hw_constraints_rates); | |
1da177e4 LT |
652 | if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) |
653 | return err; | |
654 | return 0; | |
655 | } | |
656 | ||
a5f22156 | 657 | static int snd_fm801_playback_close(struct snd_pcm_substream *substream) |
1da177e4 | 658 | { |
a5f22156 | 659 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
660 | |
661 | chip->playback_substream = NULL; | |
662 | return 0; | |
663 | } | |
664 | ||
a5f22156 | 665 | static int snd_fm801_capture_close(struct snd_pcm_substream *substream) |
1da177e4 | 666 | { |
a5f22156 | 667 | struct fm801 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
668 | |
669 | chip->capture_substream = NULL; | |
670 | return 0; | |
671 | } | |
672 | ||
6769e988 | 673 | static const struct snd_pcm_ops snd_fm801_playback_ops = { |
1da177e4 LT |
674 | .open = snd_fm801_playback_open, |
675 | .close = snd_fm801_playback_close, | |
1da177e4 LT |
676 | .prepare = snd_fm801_playback_prepare, |
677 | .trigger = snd_fm801_playback_trigger, | |
678 | .pointer = snd_fm801_playback_pointer, | |
679 | }; | |
680 | ||
6769e988 | 681 | static const struct snd_pcm_ops snd_fm801_capture_ops = { |
1da177e4 LT |
682 | .open = snd_fm801_capture_open, |
683 | .close = snd_fm801_capture_close, | |
1da177e4 LT |
684 | .prepare = snd_fm801_capture_prepare, |
685 | .trigger = snd_fm801_capture_trigger, | |
686 | .pointer = snd_fm801_capture_pointer, | |
687 | }; | |
688 | ||
483337f9 | 689 | static int snd_fm801_pcm(struct fm801 *chip, int device) |
1da177e4 | 690 | { |
d3d33aab | 691 | struct pci_dev *pdev = to_pci_dev(chip->dev); |
a5f22156 | 692 | struct snd_pcm *pcm; |
1da177e4 LT |
693 | int err; |
694 | ||
1da177e4 LT |
695 | if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0) |
696 | return err; | |
697 | ||
698 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops); | |
699 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops); | |
700 | ||
701 | pcm->private_data = chip; | |
1da177e4 LT |
702 | pcm->info_flags = 0; |
703 | strcpy(pcm->name, "FM801"); | |
704 | chip->pcm = pcm; | |
705 | ||
247ed102 TI |
706 | snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &pdev->dev, |
707 | chip->multichannel ? 128*1024 : 64*1024, 128*1024); | |
1da177e4 | 708 | |
483337f9 | 709 | return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, |
e36e3b86 TI |
710 | snd_pcm_alt_chmaps, |
711 | chip->multichannel ? 6 : 2, 0, | |
712 | NULL); | |
1da177e4 LT |
713 | } |
714 | ||
715 | /* | |
716 | * TEA5757 radio | |
717 | */ | |
718 | ||
fdb62b50 | 719 | #ifdef CONFIG_SND_FM801_TEA575X_BOOL |
1da177e4 | 720 | |
938a1566 OZ |
721 | /* GPIO to TEA575x maps */ |
722 | struct snd_fm801_tea575x_gpio { | |
723 | u8 data, clk, wren, most; | |
d7ba858a | 724 | char *name; |
938a1566 | 725 | }; |
1da177e4 | 726 | |
fb537cd0 | 727 | static const struct snd_fm801_tea575x_gpio snd_fm801_tea575x_gpios[] = { |
d7ba858a OZ |
728 | { .data = 1, .clk = 3, .wren = 2, .most = 0, .name = "SF256-PCS" }, |
729 | { .data = 1, .clk = 0, .wren = 2, .most = 3, .name = "SF256-PCP" }, | |
730 | { .data = 2, .clk = 0, .wren = 1, .most = 3, .name = "SF64-PCR" }, | |
938a1566 | 731 | }; |
1da177e4 | 732 | |
8e699d2c TI |
733 | #define get_tea575x_gpio(chip) \ |
734 | (&snd_fm801_tea575x_gpios[((chip)->tea575x_tuner & TUNER_TYPE_MASK) - 1]) | |
735 | ||
938a1566 | 736 | static void snd_fm801_tea575x_set_pins(struct snd_tea575x *tea, u8 pins) |
1da177e4 | 737 | { |
a5f22156 | 738 | struct fm801 *chip = tea->private_data; |
215dacc2 | 739 | unsigned short reg = fm801_readw(chip, GPIO_CTRL); |
8e699d2c | 740 | struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip); |
1da177e4 | 741 | |
938a1566 OZ |
742 | reg &= ~(FM801_GPIO_GP(gpio.data) | |
743 | FM801_GPIO_GP(gpio.clk) | | |
744 | FM801_GPIO_GP(gpio.wren)); | |
1da177e4 | 745 | |
938a1566 OZ |
746 | reg |= (pins & TEA575X_DATA) ? FM801_GPIO_GP(gpio.data) : 0; |
747 | reg |= (pins & TEA575X_CLK) ? FM801_GPIO_GP(gpio.clk) : 0; | |
748 | /* WRITE_ENABLE is inverted */ | |
749 | reg |= (pins & TEA575X_WREN) ? 0 : FM801_GPIO_GP(gpio.wren); | |
1da177e4 | 750 | |
215dacc2 | 751 | fm801_writew(chip, GPIO_CTRL, reg); |
1da177e4 LT |
752 | } |
753 | ||
938a1566 | 754 | static u8 snd_fm801_tea575x_get_pins(struct snd_tea575x *tea) |
1da177e4 | 755 | { |
a5f22156 | 756 | struct fm801 *chip = tea->private_data; |
215dacc2 | 757 | unsigned short reg = fm801_readw(chip, GPIO_CTRL); |
8e699d2c | 758 | struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip); |
effded75 DC |
759 | u8 ret; |
760 | ||
761 | ret = 0; | |
762 | if (reg & FM801_GPIO_GP(gpio.data)) | |
763 | ret |= TEA575X_DATA; | |
764 | if (reg & FM801_GPIO_GP(gpio.most)) | |
765 | ret |= TEA575X_MOST; | |
766 | return ret; | |
1da177e4 LT |
767 | } |
768 | ||
938a1566 | 769 | static void snd_fm801_tea575x_set_direction(struct snd_tea575x *tea, bool output) |
1da177e4 | 770 | { |
a5f22156 | 771 | struct fm801 *chip = tea->private_data; |
215dacc2 | 772 | unsigned short reg = fm801_readw(chip, GPIO_CTRL); |
8e699d2c | 773 | struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip); |
1da177e4 | 774 | |
1da177e4 | 775 | /* use GPIO lines and set write enable bit */ |
938a1566 OZ |
776 | reg |= FM801_GPIO_GS(gpio.data) | |
777 | FM801_GPIO_GS(gpio.wren) | | |
778 | FM801_GPIO_GS(gpio.clk) | | |
779 | FM801_GPIO_GS(gpio.most); | |
780 | if (output) { | |
781 | /* all of lines are in the write direction */ | |
782 | /* clear data and clock lines */ | |
783 | reg &= ~(FM801_GPIO_GD(gpio.data) | | |
784 | FM801_GPIO_GD(gpio.wren) | | |
785 | FM801_GPIO_GD(gpio.clk) | | |
786 | FM801_GPIO_GP(gpio.data) | | |
787 | FM801_GPIO_GP(gpio.clk) | | |
788 | FM801_GPIO_GP(gpio.wren)); | |
789 | } else { | |
790 | /* use GPIO lines, set data direction to input */ | |
791 | reg |= FM801_GPIO_GD(gpio.data) | | |
792 | FM801_GPIO_GD(gpio.most) | | |
793 | FM801_GPIO_GP(gpio.data) | | |
794 | FM801_GPIO_GP(gpio.most) | | |
795 | FM801_GPIO_GP(gpio.wren); | |
796 | /* all of lines are in the write direction, except data */ | |
797 | /* clear data, write enable and clock lines */ | |
798 | reg &= ~(FM801_GPIO_GD(gpio.wren) | | |
799 | FM801_GPIO_GD(gpio.clk) | | |
800 | FM801_GPIO_GP(gpio.clk)); | |
1da177e4 LT |
801 | } |
802 | ||
215dacc2 | 803 | fm801_writew(chip, GPIO_CTRL, reg); |
69252128 AS |
804 | } |
805 | ||
22dbec26 | 806 | static const struct snd_tea575x_ops snd_fm801_tea_ops = { |
938a1566 OZ |
807 | .set_pins = snd_fm801_tea575x_set_pins, |
808 | .get_pins = snd_fm801_tea575x_get_pins, | |
809 | .set_direction = snd_fm801_tea575x_set_direction, | |
1da177e4 LT |
810 | }; |
811 | #endif | |
812 | ||
813 | /* | |
814 | * Mixer routines | |
815 | */ | |
816 | ||
817 | #define FM801_SINGLE(xname, reg, shift, mask, invert) \ | |
818 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \ | |
819 | .get = snd_fm801_get_single, .put = snd_fm801_put_single, \ | |
820 | .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } | |
821 | ||
a5f22156 TI |
822 | static int snd_fm801_info_single(struct snd_kcontrol *kcontrol, |
823 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
824 | { |
825 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
826 | ||
827 | uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; | |
828 | uinfo->count = 1; | |
829 | uinfo->value.integer.min = 0; | |
830 | uinfo->value.integer.max = mask; | |
831 | return 0; | |
832 | } | |
833 | ||
a5f22156 TI |
834 | static int snd_fm801_get_single(struct snd_kcontrol *kcontrol, |
835 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 836 | { |
a5f22156 | 837 | struct fm801 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
838 | int reg = kcontrol->private_value & 0xff; |
839 | int shift = (kcontrol->private_value >> 8) & 0xff; | |
840 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
841 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
4b5c15f7 | 842 | long *value = ucontrol->value.integer.value; |
1da177e4 | 843 | |
4b5c15f7 | 844 | value[0] = (fm801_ioread16(chip, reg) >> shift) & mask; |
1da177e4 | 845 | if (invert) |
4b5c15f7 | 846 | value[0] = mask - value[0]; |
1da177e4 LT |
847 | return 0; |
848 | } | |
849 | ||
a5f22156 TI |
850 | static int snd_fm801_put_single(struct snd_kcontrol *kcontrol, |
851 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 852 | { |
a5f22156 | 853 | struct fm801 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
854 | int reg = kcontrol->private_value & 0xff; |
855 | int shift = (kcontrol->private_value >> 8) & 0xff; | |
856 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
857 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
858 | unsigned short val; | |
859 | ||
860 | val = (ucontrol->value.integer.value[0] & mask); | |
861 | if (invert) | |
862 | val = mask - val; | |
863 | return snd_fm801_update_bits(chip, reg, mask << shift, val << shift); | |
864 | } | |
865 | ||
866 | #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \ | |
867 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \ | |
868 | .get = snd_fm801_get_double, .put = snd_fm801_put_double, \ | |
869 | .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) } | |
666c70ff TI |
870 | #define FM801_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \ |
871 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
872 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \ | |
873 | .name = xname, .info = snd_fm801_info_double, \ | |
874 | .get = snd_fm801_get_double, .put = snd_fm801_put_double, \ | |
875 | .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \ | |
876 | .tlv = { .p = (xtlv) } } | |
1da177e4 | 877 | |
a5f22156 TI |
878 | static int snd_fm801_info_double(struct snd_kcontrol *kcontrol, |
879 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
880 | { |
881 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
882 | ||
883 | uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; | |
884 | uinfo->count = 2; | |
885 | uinfo->value.integer.min = 0; | |
886 | uinfo->value.integer.max = mask; | |
887 | return 0; | |
888 | } | |
889 | ||
a5f22156 TI |
890 | static int snd_fm801_get_double(struct snd_kcontrol *kcontrol, |
891 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 892 | { |
a5f22156 | 893 | struct fm801 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
894 | int reg = kcontrol->private_value & 0xff; |
895 | int shift_left = (kcontrol->private_value >> 8) & 0x0f; | |
896 | int shift_right = (kcontrol->private_value >> 12) & 0x0f; | |
897 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
898 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
4b5c15f7 | 899 | long *value = ucontrol->value.integer.value; |
1da177e4 LT |
900 | |
901 | spin_lock_irq(&chip->reg_lock); | |
4b5c15f7 AS |
902 | value[0] = (fm801_ioread16(chip, reg) >> shift_left) & mask; |
903 | value[1] = (fm801_ioread16(chip, reg) >> shift_right) & mask; | |
1da177e4 LT |
904 | spin_unlock_irq(&chip->reg_lock); |
905 | if (invert) { | |
4b5c15f7 AS |
906 | value[0] = mask - value[0]; |
907 | value[1] = mask - value[1]; | |
1da177e4 LT |
908 | } |
909 | return 0; | |
910 | } | |
911 | ||
a5f22156 TI |
912 | static int snd_fm801_put_double(struct snd_kcontrol *kcontrol, |
913 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 914 | { |
a5f22156 | 915 | struct fm801 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
916 | int reg = kcontrol->private_value & 0xff; |
917 | int shift_left = (kcontrol->private_value >> 8) & 0x0f; | |
918 | int shift_right = (kcontrol->private_value >> 12) & 0x0f; | |
919 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
920 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
921 | unsigned short val1, val2; | |
922 | ||
923 | val1 = ucontrol->value.integer.value[0] & mask; | |
924 | val2 = ucontrol->value.integer.value[1] & mask; | |
925 | if (invert) { | |
926 | val1 = mask - val1; | |
927 | val2 = mask - val2; | |
928 | } | |
929 | return snd_fm801_update_bits(chip, reg, | |
930 | (mask << shift_left) | (mask << shift_right), | |
931 | (val1 << shift_left ) | (val2 << shift_right)); | |
932 | } | |
933 | ||
a5f22156 TI |
934 | static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol, |
935 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 | 936 | { |
ca776a28 | 937 | static const char * const texts[5] = { |
1da177e4 LT |
938 | "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary" |
939 | }; | |
940 | ||
ca776a28 | 941 | return snd_ctl_enum_info(uinfo, 1, 5, texts); |
1da177e4 LT |
942 | } |
943 | ||
a5f22156 TI |
944 | static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol, |
945 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 946 | { |
a5f22156 | 947 | struct fm801 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
948 | unsigned short val; |
949 | ||
215dacc2 | 950 | val = fm801_readw(chip, REC_SRC) & 7; |
1da177e4 LT |
951 | if (val > 4) |
952 | val = 4; | |
953 | ucontrol->value.enumerated.item[0] = val; | |
954 | return 0; | |
955 | } | |
956 | ||
a5f22156 TI |
957 | static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol, |
958 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 959 | { |
a5f22156 | 960 | struct fm801 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
961 | unsigned short val; |
962 | ||
963 | if ((val = ucontrol->value.enumerated.item[0]) > 4) | |
964 | return -EINVAL; | |
965 | return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val); | |
966 | } | |
967 | ||
0cb29ea0 | 968 | static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -3450, 150, 0); |
666c70ff | 969 | |
a5f22156 | 970 | #define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls) |
1da177e4 | 971 | |
b4e5e707 | 972 | static const struct snd_kcontrol_new snd_fm801_controls[] = { |
666c70ff TI |
973 | FM801_DOUBLE_TLV("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1, |
974 | db_scale_dsp), | |
1da177e4 | 975 | FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1), |
666c70ff TI |
976 | FM801_DOUBLE_TLV("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1, |
977 | db_scale_dsp), | |
1da177e4 | 978 | FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1), |
666c70ff TI |
979 | FM801_DOUBLE_TLV("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1, |
980 | db_scale_dsp), | |
1da177e4 LT |
981 | FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1), |
982 | { | |
983 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
984 | .name = "Digital Capture Source", | |
985 | .info = snd_fm801_info_mux, | |
986 | .get = snd_fm801_get_mux, | |
987 | .put = snd_fm801_put_mux, | |
988 | } | |
989 | }; | |
990 | ||
a5f22156 | 991 | #define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi) |
1da177e4 | 992 | |
b4e5e707 | 993 | static const struct snd_kcontrol_new snd_fm801_controls_multi[] = { |
1da177e4 LT |
994 | FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0), |
995 | FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0), | |
10e8d78a CL |
996 | FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0), |
997 | FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0), | |
998 | FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0), | |
999 | FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0), | |
1da177e4 LT |
1000 | }; |
1001 | ||
a5f22156 | 1002 | static void snd_fm801_mixer_free_ac97_bus(struct snd_ac97_bus *bus) |
1da177e4 | 1003 | { |
a5f22156 | 1004 | struct fm801 *chip = bus->private_data; |
1da177e4 LT |
1005 | chip->ac97_bus = NULL; |
1006 | } | |
1007 | ||
a5f22156 | 1008 | static void snd_fm801_mixer_free_ac97(struct snd_ac97 *ac97) |
1da177e4 | 1009 | { |
a5f22156 | 1010 | struct fm801 *chip = ac97->private_data; |
1da177e4 LT |
1011 | if (ac97->num == 0) { |
1012 | chip->ac97 = NULL; | |
1013 | } else { | |
1014 | chip->ac97_sec = NULL; | |
1015 | } | |
1016 | } | |
1017 | ||
e23e7a14 | 1018 | static int snd_fm801_mixer(struct fm801 *chip) |
1da177e4 | 1019 | { |
a5f22156 | 1020 | struct snd_ac97_template ac97; |
1da177e4 LT |
1021 | unsigned int i; |
1022 | int err; | |
51055da5 | 1023 | static const struct snd_ac97_bus_ops ops = { |
1da177e4 LT |
1024 | .write = snd_fm801_codec_write, |
1025 | .read = snd_fm801_codec_read, | |
1026 | }; | |
1027 | ||
1028 | if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) | |
1029 | return err; | |
1030 | chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus; | |
1031 | ||
1032 | memset(&ac97, 0, sizeof(ac97)); | |
1033 | ac97.private_data = chip; | |
1034 | ac97.private_free = snd_fm801_mixer_free_ac97; | |
1035 | if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) | |
1036 | return err; | |
1037 | if (chip->secondary) { | |
1038 | ac97.num = 1; | |
1039 | ac97.addr = chip->secondary_addr; | |
1040 | if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0) | |
1041 | return err; | |
1042 | } | |
ef1ffbe7 ZJ |
1043 | for (i = 0; i < FM801_CONTROLS; i++) { |
1044 | err = snd_ctl_add(chip->card, | |
1045 | snd_ctl_new1(&snd_fm801_controls[i], chip)); | |
1046 | if (err < 0) | |
1047 | return err; | |
1048 | } | |
1da177e4 | 1049 | if (chip->multichannel) { |
ef1ffbe7 ZJ |
1050 | for (i = 0; i < FM801_CONTROLS_MULTI; i++) { |
1051 | err = snd_ctl_add(chip->card, | |
1052 | snd_ctl_new1(&snd_fm801_controls_multi[i], chip)); | |
1053 | if (err < 0) | |
1054 | return err; | |
1055 | } | |
1da177e4 LT |
1056 | } |
1057 | return 0; | |
1058 | } | |
1059 | ||
1060 | /* | |
1061 | * initialization routines | |
1062 | */ | |
1063 | ||
b1e9ed26 TI |
1064 | static int wait_for_codec(struct fm801 *chip, unsigned int codec_id, |
1065 | unsigned short reg, unsigned long waits) | |
1066 | { | |
1067 | unsigned long timeout = jiffies + waits; | |
1068 | ||
215dacc2 AS |
1069 | fm801_writew(chip, AC97_CMD, |
1070 | reg | (codec_id << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ); | |
b1e9ed26 TI |
1071 | udelay(5); |
1072 | do { | |
215dacc2 AS |
1073 | if ((fm801_readw(chip, AC97_CMD) & |
1074 | (FM801_AC97_VALID | FM801_AC97_BUSY)) == FM801_AC97_VALID) | |
b1e9ed26 TI |
1075 | return 0; |
1076 | schedule_timeout_uninterruptible(1); | |
1077 | } while (time_after(timeout, jiffies)); | |
1078 | return -EIO; | |
1079 | } | |
1080 | ||
b56fa687 | 1081 | static int reset_codec(struct fm801 *chip) |
b1e9ed26 | 1082 | { |
b1e9ed26 | 1083 | /* codec cold reset + AC'97 warm reset */ |
215dacc2 AS |
1084 | fm801_writew(chip, CODEC_CTRL, (1 << 5) | (1 << 6)); |
1085 | fm801_readw(chip, CODEC_CTRL); /* flush posting data */ | |
b1e9ed26 | 1086 | udelay(100); |
215dacc2 | 1087 | fm801_writew(chip, CODEC_CTRL, 0); |
b1e9ed26 | 1088 | |
b56fa687 AS |
1089 | return wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750)); |
1090 | } | |
1091 | ||
1092 | static void snd_fm801_chip_multichannel_init(struct fm801 *chip) | |
1093 | { | |
1094 | unsigned short cmdw; | |
b1e9ed26 TI |
1095 | |
1096 | if (chip->multichannel) { | |
1097 | if (chip->secondary_addr) { | |
1098 | wait_for_codec(chip, chip->secondary_addr, | |
1099 | AC97_VENDOR_ID1, msecs_to_jiffies(50)); | |
1100 | } else { | |
1101 | /* my card has the secondary codec */ | |
1102 | /* at address #3, so the loop is inverted */ | |
58e4334e HH |
1103 | int i; |
1104 | for (i = 3; i > 0; i--) { | |
1105 | if (!wait_for_codec(chip, i, AC97_VENDOR_ID1, | |
b1e9ed26 | 1106 | msecs_to_jiffies(50))) { |
215dacc2 | 1107 | cmdw = fm801_readw(chip, AC97_DATA); |
b1e9ed26 TI |
1108 | if (cmdw != 0xffff && cmdw != 0) { |
1109 | chip->secondary = 1; | |
58e4334e | 1110 | chip->secondary_addr = i; |
b1e9ed26 TI |
1111 | break; |
1112 | } | |
1113 | } | |
1114 | } | |
1115 | } | |
1116 | ||
1117 | /* the recovery phase, it seems that probing for non-existing codec might */ | |
1118 | /* cause timeout problems */ | |
1119 | wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750)); | |
1120 | } | |
b56fa687 | 1121 | } |
b1e9ed26 | 1122 | |
b56fa687 AS |
1123 | static void snd_fm801_chip_init(struct fm801 *chip) |
1124 | { | |
1125 | unsigned short cmdw; | |
6bbe13ec | 1126 | |
b1e9ed26 | 1127 | /* init volume */ |
215dacc2 AS |
1128 | fm801_writew(chip, PCM_VOL, 0x0808); |
1129 | fm801_writew(chip, FM_VOL, 0x9f1f); | |
1130 | fm801_writew(chip, I2S_VOL, 0x8808); | |
b1e9ed26 TI |
1131 | |
1132 | /* I2S control - I2S mode */ | |
215dacc2 | 1133 | fm801_writew(chip, I2S_MODE, 0x0003); |
b1e9ed26 | 1134 | |
6bbe13ec | 1135 | /* interrupt setup */ |
215dacc2 | 1136 | cmdw = fm801_readw(chip, IRQ_MASK); |
6bbe13ec JK |
1137 | if (chip->irq < 0) |
1138 | cmdw |= 0x00c3; /* mask everything, no PCM nor MPU */ | |
1139 | else | |
1140 | cmdw &= ~0x0083; /* unmask MPU, PLAYBACK & CAPTURE */ | |
215dacc2 | 1141 | fm801_writew(chip, IRQ_MASK, cmdw); |
b1e9ed26 TI |
1142 | |
1143 | /* interrupt clear */ | |
215dacc2 AS |
1144 | fm801_writew(chip, IRQ_STATUS, |
1145 | FM801_IRQ_PLAYBACK | FM801_IRQ_CAPTURE | FM801_IRQ_MPU); | |
b1e9ed26 TI |
1146 | } |
1147 | ||
a5f22156 | 1148 | static int snd_fm801_free(struct fm801 *chip) |
1da177e4 LT |
1149 | { |
1150 | unsigned short cmdw; | |
1151 | ||
1152 | if (chip->irq < 0) | |
1153 | goto __end_hw; | |
1154 | ||
1155 | /* interrupt setup - mask everything */ | |
215dacc2 | 1156 | cmdw = fm801_readw(chip, IRQ_MASK); |
1da177e4 | 1157 | cmdw |= 0x00c3; |
215dacc2 | 1158 | fm801_writew(chip, IRQ_MASK, cmdw); |
1da177e4 | 1159 | |
d3d33aab | 1160 | devm_free_irq(chip->dev, chip->irq, chip); |
e97e98c6 | 1161 | |
1da177e4 | 1162 | __end_hw: |
fdb62b50 | 1163 | #ifdef CONFIG_SND_FM801_TEA575X_BOOL |
d4ecc83b | 1164 | if (!(chip->tea575x_tuner & TUNER_DISABLED)) { |
c37279b9 | 1165 | snd_tea575x_exit(&chip->tea); |
d4ecc83b HV |
1166 | v4l2_device_unregister(&chip->v4l2_dev); |
1167 | } | |
1da177e4 | 1168 | #endif |
1da177e4 LT |
1169 | return 0; |
1170 | } | |
1171 | ||
a5f22156 | 1172 | static int snd_fm801_dev_free(struct snd_device *device) |
1da177e4 | 1173 | { |
a5f22156 | 1174 | struct fm801 *chip = device->device_data; |
1da177e4 LT |
1175 | return snd_fm801_free(chip); |
1176 | } | |
1177 | ||
e23e7a14 BP |
1178 | static int snd_fm801_create(struct snd_card *card, |
1179 | struct pci_dev *pci, | |
1180 | int tea575x_tuner, | |
1181 | int radio_nr, | |
1182 | struct fm801 **rchip) | |
1da177e4 | 1183 | { |
a5f22156 | 1184 | struct fm801 *chip; |
1da177e4 | 1185 | int err; |
efb0ad25 | 1186 | static const struct snd_device_ops ops = { |
1da177e4 LT |
1187 | .dev_free = snd_fm801_dev_free, |
1188 | }; | |
1189 | ||
1190 | *rchip = NULL; | |
5618955c | 1191 | if ((err = pcim_enable_device(pci)) < 0) |
1da177e4 | 1192 | return err; |
5618955c AS |
1193 | chip = devm_kzalloc(&pci->dev, sizeof(*chip), GFP_KERNEL); |
1194 | if (chip == NULL) | |
1da177e4 | 1195 | return -ENOMEM; |
1da177e4 LT |
1196 | spin_lock_init(&chip->reg_lock); |
1197 | chip->card = card; | |
d3d33aab | 1198 | chip->dev = &pci->dev; |
1da177e4 | 1199 | chip->irq = -1; |
6bbe13ec | 1200 | chip->tea575x_tuner = tea575x_tuner; |
5618955c | 1201 | if ((err = pci_request_regions(pci, "FM801")) < 0) |
1da177e4 | 1202 | return err; |
1da177e4 | 1203 | chip->port = pci_resource_start(pci, 0); |
b56fa687 AS |
1204 | |
1205 | if (pci->revision >= 0xb1) /* FM801-AU */ | |
1206 | chip->multichannel = 1; | |
1207 | ||
1208 | if (!(chip->tea575x_tuner & TUNER_ONLY)) { | |
1209 | if (reset_codec(chip) < 0) { | |
1210 | dev_info(chip->card->dev, | |
1211 | "Primary AC'97 codec not found, assume SF64-PCR (tuner-only)\n"); | |
1212 | chip->tea575x_tuner = 3 | TUNER_ONLY; | |
1213 | } else { | |
1214 | snd_fm801_chip_multichannel_init(chip); | |
1215 | } | |
1216 | } | |
1217 | ||
b56fa687 | 1218 | if ((chip->tea575x_tuner & TUNER_ONLY) == 0) { |
5618955c AS |
1219 | if (devm_request_irq(&pci->dev, pci->irq, snd_fm801_interrupt, |
1220 | IRQF_SHARED, KBUILD_MODNAME, chip)) { | |
1221 | dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); | |
6bbe13ec JK |
1222 | snd_fm801_free(chip); |
1223 | return -EBUSY; | |
1224 | } | |
1225 | chip->irq = pci->irq; | |
e41dbd20 | 1226 | card->sync_irq = chip->irq; |
6bbe13ec | 1227 | pci_set_master(pci); |
1da177e4 | 1228 | } |
1da177e4 | 1229 | |
610e1ae9 AS |
1230 | snd_fm801_chip_init(chip); |
1231 | ||
1da177e4 LT |
1232 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { |
1233 | snd_fm801_free(chip); | |
1234 | return err; | |
1235 | } | |
1236 | ||
fdb62b50 | 1237 | #ifdef CONFIG_SND_FM801_TEA575X_BOOL |
d4ecc83b HV |
1238 | err = v4l2_device_register(&pci->dev, &chip->v4l2_dev); |
1239 | if (err < 0) { | |
1240 | snd_fm801_free(chip); | |
1241 | return err; | |
1242 | } | |
1243 | chip->tea.v4l2_dev = &chip->v4l2_dev; | |
1244 | chip->tea.radio_nr = radio_nr; | |
d7ba858a OZ |
1245 | chip->tea.private_data = chip; |
1246 | chip->tea.ops = &snd_fm801_tea_ops; | |
10ca7201 | 1247 | sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci)); |
b56fa687 AS |
1248 | if ((chip->tea575x_tuner & TUNER_TYPE_MASK) > 0 && |
1249 | (chip->tea575x_tuner & TUNER_TYPE_MASK) < 4) { | |
5daf53a6 | 1250 | if (snd_tea575x_init(&chip->tea, THIS_MODULE)) { |
9c7f9abf | 1251 | dev_err(card->dev, "TEA575x radio not found\n"); |
d4ecc83b | 1252 | snd_fm801_free(chip); |
96760015 DC |
1253 | return -ENODEV; |
1254 | } | |
b56fa687 AS |
1255 | } else if ((chip->tea575x_tuner & TUNER_TYPE_MASK) == 0) { |
1256 | unsigned int tuner_only = chip->tea575x_tuner & TUNER_ONLY; | |
dbec6719 | 1257 | |
d7ba858a OZ |
1258 | /* autodetect tuner connection */ |
1259 | for (tea575x_tuner = 1; tea575x_tuner <= 3; tea575x_tuner++) { | |
1260 | chip->tea575x_tuner = tea575x_tuner; | |
5daf53a6 | 1261 | if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) { |
9c7f9abf TI |
1262 | dev_info(card->dev, |
1263 | "detected TEA575x radio type %s\n", | |
8e699d2c | 1264 | get_tea575x_gpio(chip)->name); |
d7ba858a OZ |
1265 | break; |
1266 | } | |
1267 | } | |
96760015 | 1268 | if (tea575x_tuner == 4) { |
9c7f9abf | 1269 | dev_err(card->dev, "TEA575x radio not found\n"); |
c37279b9 | 1270 | chip->tea575x_tuner = TUNER_DISABLED; |
96760015 | 1271 | } |
dbec6719 AS |
1272 | |
1273 | chip->tea575x_tuner |= tuner_only; | |
96760015 | 1274 | } |
c37279b9 | 1275 | if (!(chip->tea575x_tuner & TUNER_DISABLED)) { |
8e699d2c | 1276 | strlcpy(chip->tea.card, get_tea575x_gpio(chip)->name, |
c37279b9 BH |
1277 | sizeof(chip->tea.card)); |
1278 | } | |
1da177e4 LT |
1279 | #endif |
1280 | ||
1281 | *rchip = chip; | |
1282 | return 0; | |
1283 | } | |
1284 | ||
e23e7a14 BP |
1285 | static int snd_card_fm801_probe(struct pci_dev *pci, |
1286 | const struct pci_device_id *pci_id) | |
1da177e4 LT |
1287 | { |
1288 | static int dev; | |
a5f22156 TI |
1289 | struct snd_card *card; |
1290 | struct fm801 *chip; | |
1291 | struct snd_opl3 *opl3; | |
1da177e4 LT |
1292 | int err; |
1293 | ||
1294 | if (dev >= SNDRV_CARDS) | |
1295 | return -ENODEV; | |
1296 | if (!enable[dev]) { | |
1297 | dev++; | |
1298 | return -ENOENT; | |
1299 | } | |
1300 | ||
60c5772b TI |
1301 | err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, |
1302 | 0, &card); | |
e58de7ba TI |
1303 | if (err < 0) |
1304 | return err; | |
d4ecc83b | 1305 | if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], radio_nr[dev], &chip)) < 0) { |
1da177e4 LT |
1306 | snd_card_free(card); |
1307 | return err; | |
1308 | } | |
b1e9ed26 | 1309 | card->private_data = chip; |
1da177e4 LT |
1310 | |
1311 | strcpy(card->driver, "FM801"); | |
1312 | strcpy(card->shortname, "ForteMedia FM801-"); | |
1313 | strcat(card->shortname, chip->multichannel ? "AU" : "AS"); | |
1314 | sprintf(card->longname, "%s at 0x%lx, irq %i", | |
1315 | card->shortname, chip->port, chip->irq); | |
1316 | ||
fb716c0b | 1317 | if (chip->tea575x_tuner & TUNER_ONLY) |
e0a5d82a AS |
1318 | goto __fm801_tuner_only; |
1319 | ||
483337f9 | 1320 | if ((err = snd_fm801_pcm(chip, 0)) < 0) { |
1da177e4 LT |
1321 | snd_card_free(card); |
1322 | return err; | |
1323 | } | |
1324 | if ((err = snd_fm801_mixer(chip)) < 0) { | |
1325 | snd_card_free(card); | |
1326 | return err; | |
1327 | } | |
1328 | if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801, | |
215dacc2 | 1329 | chip->port + FM801_MPU401_DATA, |
dba8b469 CL |
1330 | MPU401_INFO_INTEGRATED | |
1331 | MPU401_INFO_IRQ_HOOK, | |
1332 | -1, &chip->rmidi)) < 0) { | |
1da177e4 LT |
1333 | snd_card_free(card); |
1334 | return err; | |
1335 | } | |
215dacc2 AS |
1336 | if ((err = snd_opl3_create(card, chip->port + FM801_OPL3_BANK0, |
1337 | chip->port + FM801_OPL3_BANK1, | |
1da177e4 LT |
1338 | OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) { |
1339 | snd_card_free(card); | |
1340 | return err; | |
1341 | } | |
1342 | if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) { | |
1343 | snd_card_free(card); | |
1344 | return err; | |
1345 | } | |
1346 | ||
e0a5d82a | 1347 | __fm801_tuner_only: |
1da177e4 LT |
1348 | if ((err = snd_card_register(card)) < 0) { |
1349 | snd_card_free(card); | |
1350 | return err; | |
1351 | } | |
1352 | pci_set_drvdata(pci, card); | |
1353 | dev++; | |
1354 | return 0; | |
1355 | } | |
1356 | ||
e23e7a14 | 1357 | static void snd_card_fm801_remove(struct pci_dev *pci) |
1da177e4 LT |
1358 | { |
1359 | snd_card_free(pci_get_drvdata(pci)); | |
1da177e4 LT |
1360 | } |
1361 | ||
c7561cd8 | 1362 | #ifdef CONFIG_PM_SLEEP |
8045d0fc | 1363 | static const unsigned char saved_regs[] = { |
b1e9ed26 TI |
1364 | FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC, |
1365 | FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2, | |
1366 | FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2, | |
1367 | FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL, | |
1368 | }; | |
1369 | ||
68cb2b55 | 1370 | static int snd_fm801_suspend(struct device *dev) |
b1e9ed26 | 1371 | { |
68cb2b55 | 1372 | struct snd_card *card = dev_get_drvdata(dev); |
b1e9ed26 TI |
1373 | struct fm801 *chip = card->private_data; |
1374 | int i; | |
1375 | ||
1376 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); | |
14da04b5 | 1377 | |
b1e9ed26 | 1378 | for (i = 0; i < ARRAY_SIZE(saved_regs); i++) |
37ba8fca AS |
1379 | chip->saved_regs[i] = fm801_ioread16(chip, saved_regs[i]); |
1380 | ||
14da04b5 AS |
1381 | if (chip->tea575x_tuner & TUNER_ONLY) { |
1382 | /* FIXME: tea575x suspend */ | |
1383 | } else { | |
14da04b5 AS |
1384 | snd_ac97_suspend(chip->ac97); |
1385 | snd_ac97_suspend(chip->ac97_sec); | |
1386 | } | |
1387 | ||
b1e9ed26 TI |
1388 | return 0; |
1389 | } | |
1390 | ||
68cb2b55 | 1391 | static int snd_fm801_resume(struct device *dev) |
b1e9ed26 | 1392 | { |
68cb2b55 | 1393 | struct snd_card *card = dev_get_drvdata(dev); |
b1e9ed26 TI |
1394 | struct fm801 *chip = card->private_data; |
1395 | int i; | |
1396 | ||
b56fa687 AS |
1397 | if (chip->tea575x_tuner & TUNER_ONLY) { |
1398 | snd_fm801_chip_init(chip); | |
1399 | } else { | |
1400 | reset_codec(chip); | |
1401 | snd_fm801_chip_multichannel_init(chip); | |
1402 | snd_fm801_chip_init(chip); | |
14da04b5 AS |
1403 | snd_ac97_resume(chip->ac97); |
1404 | snd_ac97_resume(chip->ac97_sec); | |
b56fa687 | 1405 | } |
14da04b5 | 1406 | |
b1e9ed26 | 1407 | for (i = 0; i < ARRAY_SIZE(saved_regs); i++) |
4b5c15f7 | 1408 | fm801_iowrite16(chip, saved_regs[i], chip->saved_regs[i]); |
b1e9ed26 | 1409 | |
cb41f271 AS |
1410 | #ifdef CONFIG_SND_FM801_TEA575X_BOOL |
1411 | if (!(chip->tea575x_tuner & TUNER_DISABLED)) | |
1412 | snd_tea575x_set_freq(&chip->tea); | |
1413 | #endif | |
b1e9ed26 TI |
1414 | |
1415 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); | |
1416 | return 0; | |
1417 | } | |
68cb2b55 TI |
1418 | |
1419 | static SIMPLE_DEV_PM_OPS(snd_fm801_pm, snd_fm801_suspend, snd_fm801_resume); | |
1420 | #define SND_FM801_PM_OPS &snd_fm801_pm | |
1421 | #else | |
1422 | #define SND_FM801_PM_OPS NULL | |
c7561cd8 | 1423 | #endif /* CONFIG_PM_SLEEP */ |
b1e9ed26 | 1424 | |
e9f66d9b | 1425 | static struct pci_driver fm801_driver = { |
3733e424 | 1426 | .name = KBUILD_MODNAME, |
1da177e4 LT |
1427 | .id_table = snd_fm801_ids, |
1428 | .probe = snd_card_fm801_probe, | |
e23e7a14 | 1429 | .remove = snd_card_fm801_remove, |
68cb2b55 TI |
1430 | .driver = { |
1431 | .pm = SND_FM801_PM_OPS, | |
1432 | }, | |
1da177e4 LT |
1433 | }; |
1434 | ||
e9f66d9b | 1435 | module_pci_driver(fm801_driver); |