projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ALSA: pci: Avoid non-standard macro usage
[linux-2.6-block.git] / sound / pci / es1938.c
CommitLineData
1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT		 2/*
3 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
4 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
c1017a4c 5 * Jaroslav Kysela <perex@perex.cz>,
1da177e4
LT		 6 * Thomas Sailer <sailer@ife.ee.ethz.ch>,
7 * Abramo Bagnara <abramo@alsa-project.org>,
8 * Markus Gruber <gruber@eikon.tum.de>
9 *
10 * Rewritten from sonicvibes.c source.
11 *
12 * TODO:
13 * Rewrite better spinlocks
1da177e4
LT		 14 */
15
16/*
17 NOTES:
18 - Capture data is written unaligned starting from dma_base + 1 so I need to
19 disable mmap and to add a copy callback.
20 - After several cycle of the following:
21 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
22 a "playback write error (DMA or IRQ trouble?)" may happen.
23 This is due to playback interrupts not generated.
24 I suspect a timing issue.
25 - Sometimes the interrupt handler is invoked wrongly during playback.
26 This generates some harmless "Unexpected hw_pointer: wrong interrupt
27 acknowledge".
28 I've seen that using small period sizes.
29 Reproducible with:
30 mpg123 test.mp3 &
31 hdparm -t -T /dev/hda
32*/
33
34
1da177e4
LT		 35#include <linux/init.h>
36#include <linux/interrupt.h>
37#include <linux/pci.h>
38#include <linux/slab.h>
39#include <linux/gameport.h>
65a77217 40#include <linux/module.h>
1da177e4 41#include <linux/delay.h>
910638ae 42#include <linux/dma-mapping.h>
6cbbfe1c 43#include <linux/io.h>
1da177e4
LT		 44#include <sound/core.h>
45#include <sound/control.h>
46#include <sound/pcm.h>
47#include <sound/opl3.h>
48#include <sound/mpu401.h>
49#include <sound/initval.h>
0b593972 50#include <sound/tlv.h>
1da177e4 51
1da177e4
LT		 52MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
53MODULE_DESCRIPTION("ESS Solo-1");
54MODULE_LICENSE("GPL");
55MODULE_SUPPORTED_DEVICE("{{ESS,ES1938},"
56 "{ESS,ES1946},"
57 "{ESS,ES1969},"
58 "{TerraTec,128i PCI}}");
59
b2fac073 60#if IS_REACHABLE(CONFIG_GAMEPORT)
1da177e4
LT		 61#define SUPPORT_JOYSTICK 1
62#endif
63
1da177e4
LT		 64static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
65static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 66static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
1da177e4
LT		 67
68module_param_array(index, int, NULL, 0444);
69MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
70module_param_array(id, charp, NULL, 0444);
71MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
72module_param_array(enable, bool, NULL, 0444);
73MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
74
75#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
76
77#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
78
79#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
80
81#define SL_PCI_LEGACYCONTROL 0x40
82#define SL_PCI_CONFIG 0x50
83#define SL_PCI_DDMACONTROL 0x60
84
85#define ESSIO_REG_AUDIO2DMAADDR 0
86#define ESSIO_REG_AUDIO2DMACOUNT 4
87#define ESSIO_REG_AUDIO2MODE 6
88#define ESSIO_REG_IRQCONTROL 7
89
90#define ESSDM_REG_DMAADDR 0x00
91#define ESSDM_REG_DMACOUNT 0x04
92#define ESSDM_REG_DMACOMMAND 0x08
93#define ESSDM_REG_DMASTATUS 0x08
94#define ESSDM_REG_DMAMODE 0x0b
95#define ESSDM_REG_DMACLEAR 0x0d
96#define ESSDM_REG_DMAMASK 0x0f
97
98#define ESSSB_REG_FMLOWADDR 0x00
99#define ESSSB_REG_FMHIGHADDR 0x02
100#define ESSSB_REG_MIXERADDR 0x04
101#define ESSSB_REG_MIXERDATA 0x05
102
103#define ESSSB_IREG_AUDIO1 0x14
104#define ESSSB_IREG_MICMIX 0x1a
105#define ESSSB_IREG_RECSRC 0x1c
106#define ESSSB_IREG_MASTER 0x32
107#define ESSSB_IREG_FM 0x36
108#define ESSSB_IREG_AUXACD 0x38
109#define ESSSB_IREG_AUXB 0x3a
110#define ESSSB_IREG_PCSPEAKER 0x3c
111#define ESSSB_IREG_LINE 0x3e
112#define ESSSB_IREG_SPATCONTROL 0x50
113#define ESSSB_IREG_SPATLEVEL 0x52
114#define ESSSB_IREG_MASTER_LEFT 0x60
115#define ESSSB_IREG_MASTER_RIGHT 0x62
116#define ESSSB_IREG_MPU401CONTROL 0x64
117#define ESSSB_IREG_MICMIXRECORD 0x68
118#define ESSSB_IREG_AUDIO2RECORD 0x69
119#define ESSSB_IREG_AUXACDRECORD 0x6a
120#define ESSSB_IREG_FMRECORD 0x6b
121#define ESSSB_IREG_AUXBRECORD 0x6c
122#define ESSSB_IREG_MONO 0x6d
123#define ESSSB_IREG_LINERECORD 0x6e
124#define ESSSB_IREG_MONORECORD 0x6f
125#define ESSSB_IREG_AUDIO2SAMPLE 0x70
126#define ESSSB_IREG_AUDIO2MODE 0x71
127#define ESSSB_IREG_AUDIO2FILTER 0x72
128#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
129#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
130#define ESSSB_IREG_AUDIO2CONTROL1 0x78
131#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
132#define ESSSB_IREG_AUDIO2 0x7c
133
134#define ESSSB_REG_RESET 0x06
135
136#define ESSSB_REG_READDATA 0x0a
137#define ESSSB_REG_WRITEDATA 0x0c
138#define ESSSB_REG_READSTATUS 0x0c
139
140#define ESSSB_REG_STATUS 0x0e
141
142#define ESS_CMD_EXTSAMPLERATE 0xa1
143#define ESS_CMD_FILTERDIV 0xa2
144#define ESS_CMD_DMACNTRELOADL 0xa4
145#define ESS_CMD_DMACNTRELOADH 0xa5
146#define ESS_CMD_ANALOGCONTROL 0xa8
147#define ESS_CMD_IRQCONTROL 0xb1
148#define ESS_CMD_DRQCONTROL 0xb2
149#define ESS_CMD_RECLEVEL 0xb4
150#define ESS_CMD_SETFORMAT 0xb6
151#define ESS_CMD_SETFORMAT2 0xb7
152#define ESS_CMD_DMACONTROL 0xb8
153#define ESS_CMD_DMATYPE 0xb9
154#define ESS_CMD_OFFSETLEFT 0xba
155#define ESS_CMD_OFFSETRIGHT 0xbb
156#define ESS_CMD_READREG 0xc0
157#define ESS_CMD_ENABLEEXT 0xc6
158#define ESS_CMD_PAUSEDMA 0xd0
159#define ESS_CMD_ENABLEAUDIO1 0xd1
160#define ESS_CMD_STOPAUDIO1 0xd3
161#define ESS_CMD_AUDIO1STATUS 0xd8
162#define ESS_CMD_CONTDMA 0xd4
163#define ESS_CMD_TESTIRQ 0xf2
164
165#define ESS_RECSRC_MIC 0
166#define ESS_RECSRC_AUXACD 2
167#define ESS_RECSRC_AUXB 5
168#define ESS_RECSRC_LINE 6
169#define ESS_RECSRC_NONE 7
170
171#define DAC1 0x01
172#define ADC1 0x02
173#define DAC2 0x04
174
175/*
176
177 */
178
1da177e4
LT		 179#define SAVED_REG_SIZE 32 /* max. number of registers to save */
180
e571f594 181struct es1938 {
1da177e4
LT		 182 int irq;
183
184 unsigned long io_port;
185 unsigned long sb_port;
186 unsigned long vc_port;
187 unsigned long mpu_port;
188 unsigned long game_port;
189 unsigned long ddma_port;
190
191 unsigned char irqmask;
192 unsigned char revision;
193
e571f594
TI		 194 struct snd_kcontrol *hw_volume;
195 struct snd_kcontrol *hw_switch;
196 struct snd_kcontrol *master_volume;
197 struct snd_kcontrol *master_switch;
1da177e4
LT		 198
199 struct pci_dev *pci;
e571f594
TI		 200 struct snd_card *card;
201 struct snd_pcm *pcm;
202 struct snd_pcm_substream *capture_substream;
203 struct snd_pcm_substream *playback1_substream;
204 struct snd_pcm_substream *playback2_substream;
205 struct snd_rawmidi *rmidi;
1da177e4
LT		 206
207 unsigned int dma1_size;
208 unsigned int dma2_size;
209 unsigned int dma1_start;
210 unsigned int dma2_start;
211 unsigned int dma1_shift;
212 unsigned int dma2_shift;
19e2e3c3 213 unsigned int last_capture_dmaaddr;
1da177e4
LT		 214 unsigned int active;
215
216 spinlock_t reg_lock;
217 spinlock_t mixer_lock;
e571f594 218 struct snd_info_entry *proc_entry;
1da177e4
LT		 219
220#ifdef SUPPORT_JOYSTICK
221 struct gameport *gameport;
222#endif
c7561cd8 223#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 224 unsigned char saved_regs[SAVED_REG_SIZE];
225#endif
226};
227
7d12e780 228static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
1da177e4 229
9baa3c34 230static const struct pci_device_id snd_es1938_ids[] = {
28d27aae 231 { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
1da177e4
LT		 232 { 0, }
233};
234
235MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
236
237#define RESET_LOOP_TIMEOUT 0x10000
238#define WRITE_LOOP_TIMEOUT 0x10000
239#define GET_LOOP_TIMEOUT 0x01000
240
1da177e4
LT		 241/* -----------------------------------------------------------------
242 * Write to a mixer register
243 * -----------------------------------------------------------------*/
e571f594 244static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
1da177e4
LT		 245{
246 unsigned long flags;
247 spin_lock_irqsave(&chip->mixer_lock, flags);
248 outb(reg, SLSB_REG(chip, MIXERADDR));
249 outb(val, SLSB_REG(chip, MIXERDATA));
250 spin_unlock_irqrestore(&chip->mixer_lock, flags);
ebebecaa 251 dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
1da177e4
LT		 252}
253
254/* -----------------------------------------------------------------
255 * Read from a mixer register
256 * -----------------------------------------------------------------*/
e571f594 257static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 258{
259 int data;
260 unsigned long flags;
261 spin_lock_irqsave(&chip->mixer_lock, flags);
262 outb(reg, SLSB_REG(chip, MIXERADDR));
263 data = inb(SLSB_REG(chip, MIXERDATA));
264 spin_unlock_irqrestore(&chip->mixer_lock, flags);
ebebecaa 265 dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
1da177e4
LT		 266 return data;
267}
268
269/* -----------------------------------------------------------------
270 * Write to some bits of a mixer register (return old value)
271 * -----------------------------------------------------------------*/
e571f594
TI		 272static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
273 unsigned char mask, unsigned char val)
1da177e4
LT		 274{
275 unsigned long flags;
276 unsigned char old, new, oval;
277 spin_lock_irqsave(&chip->mixer_lock, flags);
278 outb(reg, SLSB_REG(chip, MIXERADDR));
279 old = inb(SLSB_REG(chip, MIXERDATA));
280 oval = old & mask;
281 if (val != oval) {
282 new = (old & ~mask) | (val & mask);
283 outb(new, SLSB_REG(chip, MIXERDATA));
ebebecaa
TI		 284 dev_dbg(chip->card->dev,
285 "Mixer reg %02x was %02x, set to %02x\n",
99b359ba 286 reg, old, new);
1da177e4
LT		 287 }
288 spin_unlock_irqrestore(&chip->mixer_lock, flags);
289 return oval;
290}
291
292/* -----------------------------------------------------------------
293 * Write command to Controller Registers
294 * -----------------------------------------------------------------*/
e571f594 295static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
1da177e4
LT		 296{
297 int i;
298 unsigned char v;
299 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
300 if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
301 outb(cmd, SLSB_REG(chip, WRITEDATA));
302 return;
303 }
304 }
ebebecaa
TI		 305 dev_err(chip->card->dev,
306 "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
1da177e4
LT		 307}
308
309/* -----------------------------------------------------------------
310 * Read the Read Data Buffer
311 * -----------------------------------------------------------------*/
e571f594 312static int snd_es1938_get_byte(struct es1938 *chip)
1da177e4
LT		 313{
314 int i;
315 unsigned char v;
316 for (i = GET_LOOP_TIMEOUT; i; i--)
317 if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
318 return inb(SLSB_REG(chip, READDATA));
ebebecaa 319 dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
1da177e4
LT		 320 return -ENODEV;
321}
322
323/* -----------------------------------------------------------------
324 * Write value cmd register
325 * -----------------------------------------------------------------*/
e571f594 326static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
1da177e4
LT		 327{
328 unsigned long flags;
329 spin_lock_irqsave(&chip->reg_lock, flags);
330 snd_es1938_write_cmd(chip, reg);
331 snd_es1938_write_cmd(chip, val);
332 spin_unlock_irqrestore(&chip->reg_lock, flags);
ebebecaa 333 dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
1da177e4
LT		 334}
335
336/* -----------------------------------------------------------------
337 * Read data from cmd register and return it
338 * -----------------------------------------------------------------*/
e571f594 339static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 340{
341 unsigned char val;
342 unsigned long flags;
343 spin_lock_irqsave(&chip->reg_lock, flags);
344 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
345 snd_es1938_write_cmd(chip, reg);
346 val = snd_es1938_get_byte(chip);
347 spin_unlock_irqrestore(&chip->reg_lock, flags);
ebebecaa 348 dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
1da177e4
LT		 349 return val;
350}
351
352/* -----------------------------------------------------------------
353 * Write data to cmd register and return old value
354 * -----------------------------------------------------------------*/
e571f594
TI		 355static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
356 unsigned char val)
1da177e4
LT		 357{
358 unsigned long flags;
359 unsigned char old, new, oval;
360 spin_lock_irqsave(&chip->reg_lock, flags);
361 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
362 snd_es1938_write_cmd(chip, reg);
363 old = snd_es1938_get_byte(chip);
364 oval = old & mask;
365 if (val != oval) {
366 snd_es1938_write_cmd(chip, reg);
367 new = (old & ~mask) | (val & mask);
368 snd_es1938_write_cmd(chip, new);
ebebecaa 369 dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
99b359ba 370 reg, old, new);
1da177e4
LT		 371 }
372 spin_unlock_irqrestore(&chip->reg_lock, flags);
373 return oval;
374}
375
376/* --------------------------------------------------------------------
377 * Reset the chip
378 * --------------------------------------------------------------------*/
e571f594 379static void snd_es1938_reset(struct es1938 *chip)
1da177e4
LT		 380{
381 int i;
382
383 outb(3, SLSB_REG(chip, RESET));
384 inb(SLSB_REG(chip, RESET));
385 outb(0, SLSB_REG(chip, RESET));
386 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
387 if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
388 if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
389 goto __next;
390 }
391 }
ebebecaa 392 dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
1da177e4
LT		 393
394 __next:
395 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
396
397 /* Demand transfer DMA: 4 bytes per DMA request */
398 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
399
400 /* Change behaviour of register A1
401 4x oversampling
402 2nd channel DAC asynchronous */
403 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
404 /* enable/select DMA channel and IRQ channel */
405 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
406 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
407 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
408 /* Set spatializer parameters to recommended values */
409 snd_es1938_mixer_write(chip, 0x54, 0x8f);
410 snd_es1938_mixer_write(chip, 0x56, 0x95);
411 snd_es1938_mixer_write(chip, 0x58, 0x94);
412 snd_es1938_mixer_write(chip, 0x5a, 0x80);
413}
414
415/* --------------------------------------------------------------------
416 * Reset the FIFOs
417 * --------------------------------------------------------------------*/
e571f594 418static void snd_es1938_reset_fifo(struct es1938 *chip)
1da177e4
LT		 419{
420 outb(2, SLSB_REG(chip, RESET));
421 outb(0, SLSB_REG(chip, RESET));
422}
423
44d71507 424static const struct snd_ratnum clocks[2] = {
1da177e4
LT		 425 {
426 .num = 793800,
427 .den_min = 1,
428 .den_max = 128,
429 .den_step = 1,
430 },
431 {
432 .num = 768000,
433 .den_min = 1,
434 .den_max = 128,
435 .den_step = 1,
436 }
437};
438
44d71507 439static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
1da177e4
LT		 440 .nrats = 2,
441 .rats = clocks,
442};
443
444
e571f594
TI		 445static void snd_es1938_rate_set(struct es1938 *chip,
446 struct snd_pcm_substream *substream,
1da177e4
LT		 447 int mode)
448{
449 unsigned int bits, div0;
e571f594 450 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 451 if (runtime->rate_num == clocks[0].num)
452 bits = 128 - runtime->rate_den;
453 else
454 bits = 256 - runtime->rate_den;
455
456 /* set filter register */
457 div0 = 256 - 7160000*20/(8*82*runtime->rate);
458
459 if (mode == DAC2) {
460 snd_es1938_mixer_write(chip, 0x70, bits);
461 snd_es1938_mixer_write(chip, 0x72, div0);
462 } else {
463 snd_es1938_write(chip, 0xA1, bits);
464 snd_es1938_write(chip, 0xA2, div0);
465 }
466}
467
468/* --------------------------------------------------------------------
469 * Configure Solo1 builtin DMA Controller
470 * --------------------------------------------------------------------*/
471
e571f594 472static void snd_es1938_playback1_setdma(struct es1938 *chip)
1da177e4
LT		 473{
474 outb(0x00, SLIO_REG(chip, AUDIO2MODE));
475 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
476 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
477 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
478}
479
e571f594 480static void snd_es1938_playback2_setdma(struct es1938 *chip)
1da177e4
LT		 481{
482 /* Enable DMA controller */
483 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
484 /* 1. Master reset */
485 outb(0, SLDM_REG(chip, DMACLEAR));
486 /* 2. Mask DMA */
487 outb(1, SLDM_REG(chip, DMAMASK));
488 outb(0x18, SLDM_REG(chip, DMAMODE));
489 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
490 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
491 /* 3. Unmask DMA */
492 outb(0, SLDM_REG(chip, DMAMASK));
493}
494
e571f594 495static void snd_es1938_capture_setdma(struct es1938 *chip)
1da177e4
LT		 496{
497 /* Enable DMA controller */
498 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
499 /* 1. Master reset */
500 outb(0, SLDM_REG(chip, DMACLEAR));
501 /* 2. Mask DMA */
502 outb(1, SLDM_REG(chip, DMAMASK));
503 outb(0x14, SLDM_REG(chip, DMAMODE));
504 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
19e2e3c3 505 chip->last_capture_dmaaddr = chip->dma1_start;
1da177e4
LT		 506 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
507 /* 3. Unmask DMA */
508 outb(0, SLDM_REG(chip, DMAMASK));
509}
510
511/* ----------------------------------------------------------------------
512 *
513 * *** PCM part ***
514 */
515
e571f594 516static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 517 int cmd)
518{
e571f594 519 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 520 int val;
521 switch (cmd) {
522 case SNDRV_PCM_TRIGGER_START:
93b9f426 523 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 524 val = 0x0f;
525 chip->active |= ADC1;
526 break;
527 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 528 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 529 val = 0x00;
530 chip->active &= ~ADC1;
531 break;
532 default:
533 return -EINVAL;
534 }
535 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
536 return 0;
537}
538
e571f594 539static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 540 int cmd)
541{
e571f594 542 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 543 switch (cmd) {
544 case SNDRV_PCM_TRIGGER_START:
93b9f426 545 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 546 /* According to the documentation this should be:
547 0x13 but that value may randomly swap stereo channels */
548 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
549 udelay(10);
550 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
551 /* This two stage init gives the FIFO -> DAC connection time to
552 * settle before first data from DMA flows in. This should ensure
553 * no swapping of stereo channels. Report a bug if otherwise :-) */
554 outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
555 chip->active |= DAC2;
556 break;
557 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 558 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 559 outb(0, SLIO_REG(chip, AUDIO2MODE));
560 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
561 chip->active &= ~DAC2;
562 break;
563 default:
564 return -EINVAL;
565 }
566 return 0;
567}
568
e571f594 569static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 570 int cmd)
571{
e571f594 572 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 573 int val;
574 switch (cmd) {
575 case SNDRV_PCM_TRIGGER_START:
93b9f426 576 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 577 val = 5;
578 chip->active |= DAC1;
579 break;
580 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 581 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 582 val = 0;
583 chip->active &= ~DAC1;
584 break;
585 default:
586 return -EINVAL;
587 }
588 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
589 return 0;
590}
591
e571f594 592static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 593 int cmd)
594{
595 switch (substream->number) {
596 case 0:
597 return snd_es1938_playback1_trigger(substream, cmd);
598 case 1:
599 return snd_es1938_playback2_trigger(substream, cmd);
600 }
601 snd_BUG();
602 return -EINVAL;
603}
604
605/* --------------------------------------------------------------------
606 * First channel for Extended Mode Audio 1 ADC Operation
607 * --------------------------------------------------------------------*/
e571f594 608static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 609{
e571f594
TI		 610 struct es1938 *chip = snd_pcm_substream_chip(substream);
611 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 612 int u, is8, mono;
613 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
614 unsigned int count = snd_pcm_lib_period_bytes(substream);
615
616 chip->dma1_size = size;
617 chip->dma1_start = runtime->dma_addr;
618
619 mono = (runtime->channels > 1) ? 0 : 1;
620 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
621 u = snd_pcm_format_unsigned(runtime->format);
622
623 chip->dma1_shift = 2 - mono - is8;
624
625 snd_es1938_reset_fifo(chip);
626
627 /* program type */
628 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
629
630 /* set clock and counters */
631 snd_es1938_rate_set(chip, substream, ADC1);
632
633 count = 0x10000 - count;
634 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
635 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
636
637 /* initialize and configure ADC */
638 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
639 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
640 (u ? 0x00 : 0x20) |
641 (is8 ? 0x00 : 0x04) |
642 (mono ? 0x40 : 0x08));
643
644 // snd_es1938_reset_fifo(chip);
645
646 /* 11. configure system interrupt controller and DMA controller */
647 snd_es1938_capture_setdma(chip);
648
649 return 0;
650}
651
652
653/* ------------------------------------------------------------------------------
654 * Second Audio channel DAC Operation
655 * ------------------------------------------------------------------------------*/
e571f594 656static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
1da177e4 657{
e571f594
TI		 658 struct es1938 *chip = snd_pcm_substream_chip(substream);
659 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 660 int u, is8, mono;
661 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
662 unsigned int count = snd_pcm_lib_period_bytes(substream);
663
664 chip->dma2_size = size;
665 chip->dma2_start = runtime->dma_addr;
666
667 mono = (runtime->channels > 1) ? 0 : 1;
668 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
669 u = snd_pcm_format_unsigned(runtime->format);
670
671 chip->dma2_shift = 2 - mono - is8;
672
673 snd_es1938_reset_fifo(chip);
674
675 /* set clock and counters */
676 snd_es1938_rate_set(chip, substream, DAC2);
677
678 count >>= 1;
679 count = 0x10000 - count;
680 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
681 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
682
683 /* initialize and configure Audio 2 DAC */
e571f594
TI		 684 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
685 (mono ? 0 : 2) | (is8 ? 0 : 1));
1da177e4
LT		 686
687 /* program DMA */
688 snd_es1938_playback1_setdma(chip);
689
690 return 0;
691}
692
e571f594 693static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
1da177e4 694{
e571f594
TI		 695 struct es1938 *chip = snd_pcm_substream_chip(substream);
696 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 697 int u, is8, mono;
698 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
699 unsigned int count = snd_pcm_lib_period_bytes(substream);
700
701 chip->dma1_size = size;
702 chip->dma1_start = runtime->dma_addr;
703
704 mono = (runtime->channels > 1) ? 0 : 1;
705 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
706 u = snd_pcm_format_unsigned(runtime->format);
707
708 chip->dma1_shift = 2 - mono - is8;
709
710 count = 0x10000 - count;
711
712 /* reset */
713 snd_es1938_reset_fifo(chip);
714
715 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
716
717 /* set clock and counters */
718 snd_es1938_rate_set(chip, substream, DAC1);
719 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
720 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
721
722 /* initialized and configure DAC */
723 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
724 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
725 snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
726 0x90 | (mono ? 0x40 : 0x08) |
727 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
728
729 /* program DMA */
730 snd_es1938_playback2_setdma(chip);
731
732 return 0;
733}
734
e571f594 735static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
1da177e4
LT		 736{
737 switch (substream->number) {
738 case 0:
739 return snd_es1938_playback1_prepare(substream);
740 case 1:
741 return snd_es1938_playback2_prepare(substream);
742 }
743 snd_BUG();
744 return -EINVAL;
745}
746
19e2e3c3
HL		 747/* during the incrementing of dma counters the DMA register reads sometimes
748 returns garbage. To ensure a valid hw pointer, the following checks which
749 should be very unlikely to fail are used:
750 - is the current DMA address in the valid DMA range ?
751 - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
752 One can argue this could differ by one byte depending on which register is
753 updated first, so the implementation below allows for that.
754*/
e571f594 755static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 756{
e571f594 757 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4 758 size_t ptr;
19e2e3c3 759#if 0
1da177e4 760 size_t old, new;
1da177e4
LT		 761 /* This stuff is *needed*, don't ask why - AB */
762 old = inw(SLDM_REG(chip, DMACOUNT));
763 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
764 old = new;
765 ptr = chip->dma1_size - 1 - new;
766#else
19e2e3c3
HL		 767 size_t count;
768 unsigned int diff;
769
770 ptr = inl(SLDM_REG(chip, DMAADDR));
771 count = inw(SLDM_REG(chip, DMACOUNT));
772 diff = chip->dma1_start + chip->dma1_size - ptr - count;
773
774 if (diff > 3 || ptr < chip->dma1_start
775 || ptr >= chip->dma1_start+chip->dma1_size)
776 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
777 else
778 chip->last_capture_dmaaddr = ptr; /* good, remember it */
779
780 ptr -= chip->dma1_start;
1da177e4
LT		 781#endif
782 return ptr >> chip->dma1_shift;
783}
784
e571f594 785static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
1da177e4 786{
e571f594 787 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 788 size_t ptr;
789#if 1
790 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
791#else
792 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
793#endif
794 return ptr >> chip->dma2_shift;
795}
796
e571f594 797static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
1da177e4 798{
e571f594 799 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 800 size_t ptr;
801 size_t old, new;
802#if 1
803 /* This stuff is *needed*, don't ask why - AB */
804 old = inw(SLDM_REG(chip, DMACOUNT));
805 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
806 old = new;
807 ptr = chip->dma1_size - 1 - new;
808#else
809 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
810#endif
811 return ptr >> chip->dma1_shift;
812}
813
e571f594 814static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
1da177e4
LT		 815{
816 switch (substream->number) {
817 case 0:
818 return snd_es1938_playback1_pointer(substream);
819 case 1:
820 return snd_es1938_playback2_pointer(substream);
821 }
822 snd_BUG();
823 return -EINVAL;
824}
825
e571f594 826static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
b96c3a15
TI		 827 int channel, unsigned long pos,
828 void __user *dst, unsigned long count)
1da177e4 829{
e571f594
TI		 830 struct snd_pcm_runtime *runtime = substream->runtime;
831 struct es1938 *chip = snd_pcm_substream_chip(substream);
b96c3a15 832
da3cec35
TI		 833 if (snd_BUG_ON(pos + count > chip->dma1_size))
834 return -EINVAL;
1da177e4
LT		 835 if (pos + count < chip->dma1_size) {
836 if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
837 return -EFAULT;
838 } else {
839 if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
840 return -EFAULT;
b96c3a15
TI		 841 if (put_user(runtime->dma_area[0],
842 ((unsigned char __user *)dst) + count - 1))
1da177e4
LT		 843 return -EFAULT;
844 }
845 return 0;
846}
847
b96c3a15
TI		 848static int snd_es1938_capture_copy_kernel(struct snd_pcm_substream *substream,
849 int channel, unsigned long pos,
850 void *dst, unsigned long count)
851{
852 struct snd_pcm_runtime *runtime = substream->runtime;
853 struct es1938 *chip = snd_pcm_substream_chip(substream);
854
855 if (snd_BUG_ON(pos + count > chip->dma1_size))
856 return -EINVAL;
857 if (pos + count < chip->dma1_size) {
858 memcpy(dst, runtime->dma_area + pos + 1, count);
859 } else {
860 memcpy(dst, runtime->dma_area + pos + 1, count - 1);
861 runtime->dma_area[0] = *((unsigned char *)dst + count - 1);
862 }
863 return 0;
864}
865
1da177e4
LT		 866/*
867 * buffer management
868 */
e571f594
TI		 869static int snd_es1938_pcm_hw_params(struct snd_pcm_substream *substream,
870 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 871
872{
873 int err;
874
875 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
876 return err;
877 return 0;
878}
879
e571f594 880static int snd_es1938_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 881{
882 return snd_pcm_lib_free_pages(substream);
883}
884
885/* ----------------------------------------------------------------------
886 * Audio1 Capture (ADC)
887 * ----------------------------------------------------------------------*/
dee49895 888static const struct snd_pcm_hardware snd_es1938_capture =
1da177e4
LT		 889{
890 .info = (SNDRV_PCM_INFO_INTERLEAVED |
891 SNDRV_PCM_INFO_BLOCK_TRANSFER),
e571f594
TI		 892 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
893 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
1da177e4
LT		 894 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
895 .rate_min = 6000,
896 .rate_max = 48000,
897 .channels_min = 1,
898 .channels_max = 2,
899 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
900 .period_bytes_min = 64,
901 .period_bytes_max = 0x8000,
902 .periods_min = 1,
903 .periods_max = 1024,
904 .fifo_size = 256,
905};
906
907/* -----------------------------------------------------------------------
908 * Audio2 Playback (DAC)
909 * -----------------------------------------------------------------------*/
dee49895 910static const struct snd_pcm_hardware snd_es1938_playback =
1da177e4
LT		 911{
912 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
913 SNDRV_PCM_INFO_BLOCK_TRANSFER |
914 SNDRV_PCM_INFO_MMAP_VALID),
e571f594
TI		 915 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
916 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
1da177e4
LT		 917 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
918 .rate_min = 6000,
919 .rate_max = 48000,
920 .channels_min = 1,
921 .channels_max = 2,
922 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
923 .period_bytes_min = 64,
924 .period_bytes_max = 0x8000,
925 .periods_min = 1,
926 .periods_max = 1024,
927 .fifo_size = 256,
928};
929
e571f594 930static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
1da177e4 931{
e571f594
TI		 932 struct es1938 *chip = snd_pcm_substream_chip(substream);
933 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 934
935 if (chip->playback2_substream)
936 return -EAGAIN;
937 chip->capture_substream = substream;
938 runtime->hw = snd_es1938_capture;
939 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
940 &hw_constraints_clocks);
941 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
942 return 0;
943}
944
e571f594 945static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
1da177e4 946{
e571f594
TI		 947 struct es1938 *chip = snd_pcm_substream_chip(substream);
948 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 949
950 switch (substream->number) {
951 case 0:
952 chip->playback1_substream = substream;
953 break;
954 case 1:
955 if (chip->capture_substream)
956 return -EAGAIN;
957 chip->playback2_substream = substream;
958 break;
959 default:
960 snd_BUG();
961 return -EINVAL;
962 }
963 runtime->hw = snd_es1938_playback;
964 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
965 &hw_constraints_clocks);
966 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
967 return 0;
968}
969
e571f594 970static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
1da177e4 971{
e571f594 972 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 973
974 chip->capture_substream = NULL;
975 return 0;
976}
977
e571f594 978static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
1da177e4 979{
e571f594 980 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 981
982 switch (substream->number) {
983 case 0:
984 chip->playback1_substream = NULL;
985 break;
986 case 1:
987 chip->playback2_substream = NULL;
988 break;
989 default:
990 snd_BUG();
991 return -EINVAL;
992 }
993 return 0;
994}
995
6769e988 996static const struct snd_pcm_ops snd_es1938_playback_ops = {
1da177e4
LT		 997 .open = snd_es1938_playback_open,
998 .close = snd_es1938_playback_close,
999 .ioctl = snd_pcm_lib_ioctl,
1000 .hw_params = snd_es1938_pcm_hw_params,
1001 .hw_free = snd_es1938_pcm_hw_free,
1002 .prepare = snd_es1938_playback_prepare,
1003 .trigger = snd_es1938_playback_trigger,
1004 .pointer = snd_es1938_playback_pointer,
1005};
1006
6769e988 1007static const struct snd_pcm_ops snd_es1938_capture_ops = {
1da177e4
LT		 1008 .open = snd_es1938_capture_open,
1009 .close = snd_es1938_capture_close,
1010 .ioctl = snd_pcm_lib_ioctl,
1011 .hw_params = snd_es1938_pcm_hw_params,
1012 .hw_free = snd_es1938_pcm_hw_free,
1013 .prepare = snd_es1938_capture_prepare,
1014 .trigger = snd_es1938_capture_trigger,
1015 .pointer = snd_es1938_capture_pointer,
b96c3a15
TI		 1016 .copy_user = snd_es1938_capture_copy,
1017 .copy_kernel = snd_es1938_capture_copy_kernel,
1da177e4
LT		 1018};
1019
e23e7a14 1020static int snd_es1938_new_pcm(struct es1938 *chip, int device)
1da177e4 1021{
e571f594 1022 struct snd_pcm *pcm;
1da177e4
LT		 1023 int err;
1024
1025 if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
1026 return err;
1027 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
1028 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
1029
1030 pcm->private_data = chip;
1da177e4
LT		 1031 pcm->info_flags = 0;
1032 strcpy(pcm->name, "ESS Solo-1");
1033
1034 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
6974f8ad
TI		 1035 &chip->pci->dev,
1036 64*1024, 64*1024);
1da177e4
LT		 1037
1038 chip->pcm = pcm;
1039 return 0;
1040}
1041
1042/* -------------------------------------------------------------------
1043 *
1044 * *** Mixer part ***
1045 */
1046
e571f594
TI		 1047static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1048 struct snd_ctl_elem_info *uinfo)
1da177e4 1049{
6b6b295e 1050 static const char * const texts[8] = {
1da177e4
LT		 1051 "Mic", "Mic Master", "CD", "AOUT",
1052 "Mic1", "Mix", "Line", "Master"
1053 };
1054
6b6b295e 1055 return snd_ctl_enum_info(uinfo, 1, 8, texts);
1da177e4
LT		 1056}
1057
e571f594
TI		 1058static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1059 struct snd_ctl_elem_value *ucontrol)
1da177e4 1060{
e571f594 1061 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1062 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1063 return 0;
1064}
1065
e571f594
TI		 1066static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1067 struct snd_ctl_elem_value *ucontrol)
1da177e4 1068{
e571f594 1069 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1070 unsigned char val = ucontrol->value.enumerated.item[0];
1071
1072 if (val > 7)
1073 return -EINVAL;
1074 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1075}
1076
a5ce8890 1077#define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
1da177e4 1078
e571f594
TI		 1079static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1080 struct snd_ctl_elem_value *ucontrol)
1da177e4 1081{
e571f594 1082 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1083 unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1084 ucontrol->value.integer.value[0] = !!(val & 8);
1085 return 0;
1086}
1087
e571f594
TI		 1088static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1089 struct snd_ctl_elem_value *ucontrol)
1da177e4 1090{
e571f594 1091 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1092 unsigned char oval, nval;
1093 int change;
1094 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1095 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1096 change = nval != oval;
1097 if (change) {
1098 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1099 snd_es1938_mixer_write(chip, 0x50, nval);
1100 }
1101 return change;
1102}
1103
e571f594
TI		 1104static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1105 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1106{
1107 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1108 uinfo->count = 2;
1109 uinfo->value.integer.min = 0;
1110 uinfo->value.integer.max = 63;
1111 return 0;
1112}
1113
e571f594
TI		 1114static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1115 struct snd_ctl_elem_value *ucontrol)
1da177e4 1116{
e571f594 1117 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1118 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1119 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1120 return 0;
1121}
1122
a5ce8890 1123#define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
1da177e4 1124
e571f594
TI		 1125static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1126 struct snd_ctl_elem_value *ucontrol)
1da177e4 1127{
e571f594 1128 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1129 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1130 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1131 return 0;
1132}
1133
e571f594 1134static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1da177e4 1135{
e571f594 1136 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1137 chip->master_volume = NULL;
1138 chip->master_switch = NULL;
1139 chip->hw_volume = NULL;
1140 chip->hw_switch = NULL;
1141}
1142
e571f594 1143static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1da177e4
LT		 1144 unsigned char mask, unsigned char val)
1145{
1146 if (reg < 0xa0)
1147 return snd_es1938_mixer_bits(chip, reg, mask, val);
1148 else
1149 return snd_es1938_bits(chip, reg, mask, val);
1150}
1151
e571f594 1152static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 1153{
1154 if (reg < 0xa0)
1155 return snd_es1938_mixer_read(chip, reg);
1156 else
1157 return snd_es1938_read(chip, reg);
1158}
1159
0b593972
TI		 1160#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1161{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1162 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1163 .name = xname, .index = xindex, \
1164 .info = snd_es1938_info_single, \
1165 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1166 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1167 .tlv = { .p = xtlv } }
1da177e4
LT		 1168#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1169{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1170 .info = snd_es1938_info_single, \
1171 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1172 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1173
e571f594
TI		 1174static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1175 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1176{
1177 int mask = (kcontrol->private_value >> 16) & 0xff;
1178
1179 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1180 uinfo->count = 1;
1181 uinfo->value.integer.min = 0;
1182 uinfo->value.integer.max = mask;
1183 return 0;
1184}
1185
e571f594
TI		 1186static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1187 struct snd_ctl_elem_value *ucontrol)
1da177e4 1188{
e571f594 1189 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1190 int reg = kcontrol->private_value & 0xff;
1191 int shift = (kcontrol->private_value >> 8) & 0xff;
1192 int mask = (kcontrol->private_value >> 16) & 0xff;
1193 int invert = (kcontrol->private_value >> 24) & 0xff;
1194 int val;
1195
1196 val = snd_es1938_reg_read(chip, reg);
1197 ucontrol->value.integer.value[0] = (val >> shift) & mask;
1198 if (invert)
1199 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1200 return 0;
1201}
1202
e571f594
TI		 1203static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1204 struct snd_ctl_elem_value *ucontrol)
1da177e4 1205{
e571f594 1206 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1207 int reg = kcontrol->private_value & 0xff;
1208 int shift = (kcontrol->private_value >> 8) & 0xff;
1209 int mask = (kcontrol->private_value >> 16) & 0xff;
1210 int invert = (kcontrol->private_value >> 24) & 0xff;
1211 unsigned char val;
1212
1213 val = (ucontrol->value.integer.value[0] & mask);
1214 if (invert)
1215 val = mask - val;
1216 mask <<= shift;
1217 val <<= shift;
1218 return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1219}
1220
0b593972
TI		 1221#define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1222{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1223 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1224 .name = xname, .index = xindex, \
1225 .info = snd_es1938_info_double, \
1226 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1227 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1228 .tlv = { .p = xtlv } }
1da177e4
LT		 1229#define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1230{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1231 .info = snd_es1938_info_double, \
1232 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1233 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1234
e571f594
TI		 1235static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1236 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1237{
1238 int mask = (kcontrol->private_value >> 24) & 0xff;
1239
1240 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1241 uinfo->count = 2;
1242 uinfo->value.integer.min = 0;
1243 uinfo->value.integer.max = mask;
1244 return 0;
1245}
1246
e571f594
TI		 1247static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1248 struct snd_ctl_elem_value *ucontrol)
1da177e4 1249{
e571f594 1250 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1251 int left_reg = kcontrol->private_value & 0xff;
1252 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1253 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1254 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1255 int mask = (kcontrol->private_value >> 24) & 0xff;
1256 int invert = (kcontrol->private_value >> 22) & 1;
1257 unsigned char left, right;
1258
1259 left = snd_es1938_reg_read(chip, left_reg);
1260 if (left_reg != right_reg)
1261 right = snd_es1938_reg_read(chip, right_reg);
1262 else
1263 right = left;
1264 ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1265 ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1266 if (invert) {
1267 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1268 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1269 }
1270 return 0;
1271}
1272
e571f594
TI		 1273static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1274 struct snd_ctl_elem_value *ucontrol)
1da177e4 1275{
e571f594 1276 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1277 int left_reg = kcontrol->private_value & 0xff;
1278 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1279 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1280 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1281 int mask = (kcontrol->private_value >> 24) & 0xff;
1282 int invert = (kcontrol->private_value >> 22) & 1;
1283 int change;
1284 unsigned char val1, val2, mask1, mask2;
1285
1286 val1 = ucontrol->value.integer.value[0] & mask;
1287 val2 = ucontrol->value.integer.value[1] & mask;
1288 if (invert) {
1289 val1 = mask - val1;
1290 val2 = mask - val2;
1291 }
1292 val1 <<= shift_left;
1293 val2 <<= shift_right;
1294 mask1 = mask << shift_left;
1295 mask2 = mask << shift_right;
1296 if (left_reg != right_reg) {
1297 change = 0;
1298 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1299 change = 1;
1300 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1301 change = 1;
1302 } else {
1303 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1304 val1 | val2) != (val1 | val2));
1305 }
1306 return change;
1307}
1308
093eef41 1309static const DECLARE_TLV_DB_RANGE(db_scale_master,
0b593972
TI		 1310 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1311 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
093eef41 1312);
0b593972 1313
093eef41 1314static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
0b593972
TI		 1315 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1316 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
093eef41 1317);
0b593972 1318
093eef41 1319static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
0b593972
TI		 1320 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1321 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
093eef41 1322);
0b593972 1323
093eef41 1324static const DECLARE_TLV_DB_RANGE(db_scale_mic,
0b593972
TI		 1325 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1326 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
093eef41 1327);
0b593972 1328
093eef41 1329static const DECLARE_TLV_DB_RANGE(db_scale_line,
0b593972
TI		 1330 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1331 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
093eef41 1332);
0b593972 1333
0cb29ea0 1334static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
0b593972 1335
e571f594 1336static struct snd_kcontrol_new snd_es1938_controls[] = {
0b593972
TI		 1337ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1338 db_scale_master),
1da177e4
LT		 1339ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1340{
1341 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1342 .name = "Hardware Master Playback Volume",
1343 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1344 .info = snd_es1938_info_hw_volume,
1345 .get = snd_es1938_get_hw_volume,
1346},
1347{
1348 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
dbf91dd4 1349 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
0b593972 1350 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4 1351 .name = "Hardware Master Playback Switch",
1da177e4
LT		 1352 .info = snd_es1938_info_hw_switch,
1353 .get = snd_es1938_get_hw_switch,
0b593972 1354 .tlv = { .p = db_scale_master },
1da177e4
LT		 1355},
1356ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
0b593972
TI		 1357ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1358 db_scale_line),
1da177e4 1359ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
0b593972
TI		 1360ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1361 db_scale_mic),
1362ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1363 db_scale_line),
1364ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1365 db_scale_mic),
1366ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1367 db_scale_line),
1368ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1369 db_scale_capture),
d355c82a 1370ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
1da177e4
LT		 1371ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1372ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1373{
1374 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1375 .name = "Capture Source",
1376 .info = snd_es1938_info_mux,
1377 .get = snd_es1938_get_mux,
1378 .put = snd_es1938_put_mux,
1379},
0b593972
TI		 1380ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1381 db_scale_line),
1382ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1383 db_scale_audio2),
1384ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1385 db_scale_mic),
1386ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1387 db_scale_line),
1388ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1389 db_scale_mic),
1390ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1391 db_scale_line),
1392ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1393 db_scale_line),
1394ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1395 db_scale_line),
1396ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1397 db_scale_audio2),
1398ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1399 db_scale_audio1),
1da177e4
LT		 1400ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1401{
1402 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1403 .name = "3D Control - Switch",
1404 .info = snd_es1938_info_spatializer_enable,
1405 .get = snd_es1938_get_spatializer_enable,
1406 .put = snd_es1938_put_spatializer_enable,
1407},
1408ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1409};
1410
1411
1412/* ---------------------------------------------------------------------------- */
1413/* ---------------------------------------------------------------------------- */
1414
1415/*
1416 * initialize the chip - used by resume callback, too
1417 */
e571f594 1418static void snd_es1938_chip_init(struct es1938 *chip)
1da177e4
LT		 1419{
1420 /* reset chip */
1421 snd_es1938_reset(chip);
1422
1423 /* configure native mode */
1424
1425 /* enable bus master */
1426 pci_set_master(chip->pci);
1427
1428 /* disable legacy audio */
1429 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1430
1431 /* set DDMA base */
1432 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1433
1434 /* set DMA/IRQ policy */
1435 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1436
1437 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1438 outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1439
1440 /* reset DMA */
1441 outb(0, SLDM_REG(chip, DMACLEAR));
1442}
1443
c7561cd8 1444#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 1445/*
1446 * PM support
1447 */
1448
1449static unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1450 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1451 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1452 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1453 0xa8, 0xb4,
1454};
1455
1456
68cb2b55 1457static int es1938_suspend(struct device *dev)
1da177e4 1458{
68cb2b55 1459 struct snd_card *card = dev_get_drvdata(dev);
b34a580e 1460 struct es1938 *chip = card->private_data;
1da177e4
LT		 1461 unsigned char *s, *d;
1462
b34a580e 1463 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT		 1464
1465 /* save mixer-related registers */
1466 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1467 *d = snd_es1938_reg_read(chip, *s);
1468
1469 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
30b35399 1470 if (chip->irq >= 0) {
b34a580e 1471 free_irq(chip->irq, chip);
30b35399
TI		 1472 chip->irq = -1;
1473 }
1da177e4
LT		 1474 return 0;
1475}
1476
68cb2b55 1477static int es1938_resume(struct device *dev)
1da177e4 1478{
68cb2b55
TI		 1479 struct pci_dev *pci = to_pci_dev(dev);
1480 struct snd_card *card = dev_get_drvdata(dev);
b34a580e 1481 struct es1938 *chip = card->private_data;
1da177e4
LT		 1482 unsigned char *s, *d;
1483
30b35399 1484 if (request_irq(pci->irq, snd_es1938_interrupt,
934c2b6d 1485 IRQF_SHARED, KBUILD_MODNAME, chip)) {
ebebecaa
TI		 1486 dev_err(dev, "unable to grab IRQ %d, disabling device\n",
1487 pci->irq);
30b35399
TI		 1488 snd_card_disconnect(card);
1489 return -EIO;
1490 }
b34a580e 1491 chip->irq = pci->irq;
1da177e4
LT		 1492 snd_es1938_chip_init(chip);
1493
1494 /* restore mixer-related registers */
1495 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1496 if (*s < 0xa0)
1497 snd_es1938_mixer_write(chip, *s, *d);
1498 else
1499 snd_es1938_write(chip, *s, *d);
1500 }
1501
b34a580e 1502 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 1503 return 0;
1504}
68cb2b55
TI		 1505
1506static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
1507#define ES1938_PM_OPS &es1938_pm
1508#else
1509#define ES1938_PM_OPS NULL
c7561cd8 1510#endif /* CONFIG_PM_SLEEP */
1da177e4
LT		 1511
1512#ifdef SUPPORT_JOYSTICK
e23e7a14 1513static int snd_es1938_create_gameport(struct es1938 *chip)
1da177e4
LT		 1514{
1515 struct gameport *gp;
1516
1517 chip->gameport = gp = gameport_allocate_port();
1518 if (!gp) {
ebebecaa
TI		 1519 dev_err(chip->card->dev,
1520 "cannot allocate memory for gameport\n");
1da177e4
LT		 1521 return -ENOMEM;
1522 }
1523
1524 gameport_set_name(gp, "ES1938");
1525 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1526 gameport_set_dev_parent(gp, &chip->pci->dev);
1527 gp->io = chip->game_port;
1528
1529 gameport_register_port(gp);
1530
1531 return 0;
1532}
1533
e571f594 1534static void snd_es1938_free_gameport(struct es1938 *chip)
1da177e4
LT		 1535{
1536 if (chip->gameport) {
1537 gameport_unregister_port(chip->gameport);
1538 chip->gameport = NULL;
1539 }
1540}
1541#else
e571f594
TI		 1542static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1543static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1da177e4
LT		 1544#endif /* SUPPORT_JOYSTICK */
1545
e571f594 1546static int snd_es1938_free(struct es1938 *chip)
1da177e4
LT		 1547{
1548 /* disable irqs */
1549 outb(0x00, SLIO_REG(chip, IRQCONTROL));
1550 if (chip->rmidi)
1551 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1552
1553 snd_es1938_free_gameport(chip);
1554
f000fd80 1555 if (chip->irq >= 0)
e571f594 1556 free_irq(chip->irq, chip);
1da177e4
LT		 1557 pci_release_regions(chip->pci);
1558 pci_disable_device(chip->pci);
1559 kfree(chip);
1560 return 0;
1561}
1562
e571f594 1563static int snd_es1938_dev_free(struct snd_device *device)
1da177e4 1564{
e571f594 1565 struct es1938 *chip = device->device_data;
1da177e4
LT		 1566 return snd_es1938_free(chip);
1567}
1568
e23e7a14
BP		 1569static int snd_es1938_create(struct snd_card *card,
1570 struct pci_dev *pci,
1571 struct es1938 **rchip)
1da177e4 1572{
e571f594 1573 struct es1938 *chip;
1da177e4 1574 int err;
e571f594 1575 static struct snd_device_ops ops = {
1da177e4
LT		 1576 .dev_free = snd_es1938_dev_free,
1577 };
1578
1579 *rchip = NULL;
1580
1581 /* enable PCI device */
1582 if ((err = pci_enable_device(pci)) < 0)
1583 return err;
1584 /* check, if we can restrict PCI DMA transfers to 24 bits */
412b979c
QL		 1585 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(24)) < 0 ||
1586 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(24)) < 0) {
ebebecaa
TI		 1587 dev_err(card->dev,
1588 "architecture does not support 24bit PCI busmaster DMA\n");
1da177e4
LT		 1589 pci_disable_device(pci);
1590 return -ENXIO;
1591 }
1592
e560d8d8 1593 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 1594 if (chip == NULL) {
1595 pci_disable_device(pci);
1596 return -ENOMEM;
1597 }
1598 spin_lock_init(&chip->reg_lock);
1599 spin_lock_init(&chip->mixer_lock);
1600 chip->card = card;
1601 chip->pci = pci;
30b35399 1602 chip->irq = -1;
1da177e4
LT		 1603 if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) {
1604 kfree(chip);
1605 pci_disable_device(pci);
1606 return err;
1607 }
1608 chip->io_port = pci_resource_start(pci, 0);
1609 chip->sb_port = pci_resource_start(pci, 1);
1610 chip->vc_port = pci_resource_start(pci, 2);
1611 chip->mpu_port = pci_resource_start(pci, 3);
1612 chip->game_port = pci_resource_start(pci, 4);
437a5a46 1613 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
934c2b6d 1614 KBUILD_MODNAME, chip)) {
ebebecaa 1615 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 1616 snd_es1938_free(chip);
1617 return -EBUSY;
1618 }
1619 chip->irq = pci->irq;
ebebecaa
TI		 1620 dev_dbg(card->dev,
1621 "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1da177e4 1622 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1da177e4
LT		 1623
1624 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
1625
1626 snd_es1938_chip_init(chip);
1627
1da177e4
LT		 1628 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1629 snd_es1938_free(chip);
1630 return err;
1631 }
1632
1da177e4
LT		 1633 *rchip = chip;
1634 return 0;
1635}
1636
1637/* --------------------------------------------------------------------
1638 * Interrupt handler
1639 * -------------------------------------------------------------------- */
7d12e780 1640static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1da177e4 1641{
e571f594 1642 struct es1938 *chip = dev_id;
1da177e4
LT		 1643 unsigned char status, audiostatus;
1644 int handled = 0;
1645
1646 status = inb(SLIO_REG(chip, IRQCONTROL));
1647#if 0
ebebecaa
TI		 1648 dev_dbg(chip->card->dev,
1649 "Es1938debug - interrupt status: =0x%x\n", status);
1da177e4
LT		 1650#endif
1651
1652 /* AUDIO 1 */
1653 if (status & 0x10) {
1654#if 0
ebebecaa 1655 dev_dbg(chip->card->dev,
ee419653 1656 "Es1938debug - AUDIO channel 1 interrupt\n");
ebebecaa 1657 dev_dbg(chip->card->dev,
ee419653 1658 "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
e571f594 1659 inw(SLDM_REG(chip, DMACOUNT)));
ebebecaa 1660 dev_dbg(chip->card->dev,
ee419653 1661 "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
e571f594 1662 inl(SLDM_REG(chip, DMAADDR)));
ebebecaa 1663 dev_dbg(chip->card->dev,
ee419653 1664 "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
e571f594 1665 inl(SLDM_REG(chip, DMASTATUS)));
1da177e4
LT		 1666#endif
1667 /* clear irq */
1668 handled = 1;
1669 audiostatus = inb(SLSB_REG(chip, STATUS));
1670 if (chip->active & ADC1)
1671 snd_pcm_period_elapsed(chip->capture_substream);
1672 else if (chip->active & DAC1)
1673 snd_pcm_period_elapsed(chip->playback2_substream);
1674 }
1675
1676 /* AUDIO 2 */
1677 if (status & 0x20) {
1678#if 0
ebebecaa 1679 dev_dbg(chip->card->dev,
ee419653 1680 "Es1938debug - AUDIO channel 2 interrupt\n");
ebebecaa 1681 dev_dbg(chip->card->dev,
ee419653 1682 "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
e571f594 1683 inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
ebebecaa 1684 dev_dbg(chip->card->dev,
ee419653 1685 "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
e571f594 1686 inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1da177e4
LT		 1687
1688#endif
1689 /* clear irq */
1690 handled = 1;
1691 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1692 if (chip->active & DAC2)
1693 snd_pcm_period_elapsed(chip->playback1_substream);
1694 }
1695
1696 /* Hardware volume */
1697 if (status & 0x40) {
1698 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1699 handled = 1;
1700 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1701 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1702 if (!split) {
e571f594
TI		 1703 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1704 &chip->master_switch->id);
1705 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1706 &chip->master_volume->id);
1da177e4
LT		 1707 }
1708 /* ack interrupt */
1709 snd_es1938_mixer_write(chip, 0x66, 0x00);
1710 }
1711
1712 /* MPU401 */
1713 if (status & 0x80) {
1714 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1715 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1716 // andreas@flying-snail.de
1717 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1718 if (chip->rmidi) {
1719 handled = 1;
7d12e780 1720 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT		 1721 }
1722 }
1723 return IRQ_RETVAL(handled);
1724}
1725
1726#define ES1938_DMA_SIZE 64
1727
e23e7a14 1728static int snd_es1938_mixer(struct es1938 *chip)
1da177e4 1729{
e571f594 1730 struct snd_card *card;
1da177e4
LT		 1731 unsigned int idx;
1732 int err;
1733
1734 card = chip->card;
1735
1736 strcpy(card->mixername, "ESS Solo-1");
1737
1738 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
e571f594 1739 struct snd_kcontrol *kctl;
1da177e4
LT		 1740 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1741 switch (idx) {
1742 case 0:
1743 chip->master_volume = kctl;
1744 kctl->private_free = snd_es1938_hwv_free;
1745 break;
1746 case 1:
1747 chip->master_switch = kctl;
1748 kctl->private_free = snd_es1938_hwv_free;
1749 break;
1750 case 2:
1751 chip->hw_volume = kctl;
1752 kctl->private_free = snd_es1938_hwv_free;
1753 break;
1754 case 3:
1755 chip->hw_switch = kctl;
1756 kctl->private_free = snd_es1938_hwv_free;
1757 break;
1758 }
1759 if ((err = snd_ctl_add(card, kctl)) < 0)
1760 return err;
1761 }
1762 return 0;
1763}
1764
1765
e23e7a14
BP		 1766static int snd_es1938_probe(struct pci_dev *pci,
1767 const struct pci_device_id *pci_id)
1da177e4
LT		 1768{
1769 static int dev;
e571f594
TI		 1770 struct snd_card *card;
1771 struct es1938 *chip;
1772 struct snd_opl3 *opl3;
1da177e4
LT		 1773 int idx, err;
1774
1775 if (dev >= SNDRV_CARDS)
1776 return -ENODEV;
1777 if (!enable[dev]) {
1778 dev++;
1779 return -ENOENT;
1780 }
1781
60c5772b
TI		 1782 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1783 0, &card);
e58de7ba
TI		 1784 if (err < 0)
1785 return err;
1da177e4
LT		 1786 for (idx = 0; idx < 5; idx++) {
1787 if (pci_resource_start(pci, idx) == 0 ||
1788 !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
1789 snd_card_free(card);
1790 return -ENODEV;
1791 }
1792 }
1793 if ((err = snd_es1938_create(card, pci, &chip)) < 0) {
1794 snd_card_free(card);
1795 return err;
1796 }
b34a580e 1797 card->private_data = chip;
1da177e4
LT		 1798
1799 strcpy(card->driver, "ES1938");
1800 strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1801 sprintf(card->longname, "%s rev %i, irq %i",
1802 card->shortname,
1803 chip->revision,
1804 chip->irq);
1805
1806 if ((err = snd_es1938_new_pcm(chip, 0)) < 0) {
1807 snd_card_free(card);
1808 return err;
1809 }
1810 if ((err = snd_es1938_mixer(chip)) < 0) {
1811 snd_card_free(card);
1812 return err;
1813 }
1814 if (snd_opl3_create(card,
1815 SLSB_REG(chip, FMLOWADDR),
1816 SLSB_REG(chip, FMHIGHADDR),
1817 OPL3_HW_OPL3, 1, &opl3) < 0) {
ebebecaa 1818 dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
1da177e4
LT		 1819 SLSB_REG(chip, FMLOWADDR));
1820 } else {
1821 if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) {
1822 snd_card_free(card);
1823 return err;
1824 }
1825 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1826 snd_card_free(card);
1827 return err;
1828 }
1829 }
1830 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
dba8b469
CL		 1831 chip->mpu_port,
1832 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
1833 -1, &chip->rmidi) < 0) {
ebebecaa 1834 dev_err(card->dev, "unable to initialize MPU-401\n");
1da177e4
LT		 1835 } else {
1836 // this line is vital for MIDI interrupt handling on ess-solo1
1837 // andreas@flying-snail.de
1838 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1839 }
1840
1841 snd_es1938_create_gameport(chip);
1842
1843 if ((err = snd_card_register(card)) < 0) {
1844 snd_card_free(card);
1845 return err;
1846 }
1847
1848 pci_set_drvdata(pci, card);
1849 dev++;
1850 return 0;
1851}
1852
e23e7a14 1853static void snd_es1938_remove(struct pci_dev *pci)
1da177e4
LT		 1854{
1855 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT		 1856}
1857
e9f66d9b 1858static struct pci_driver es1938_driver = {
3733e424 1859 .name = KBUILD_MODNAME,
1da177e4
LT		 1860 .id_table = snd_es1938_ids,
1861 .probe = snd_es1938_probe,
e23e7a14 1862 .remove = snd_es1938_remove,
68cb2b55
TI		 1863 .driver = {
1864 .pm = ES1938_PM_OPS,
1865 },
1da177e4
LT		 1866};
1867
e9f66d9b 1868module_pci_driver(es1938_driver);
Linux 6.x block layer and io_uring tree(s)