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1a59d1b8 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 LT |
2 | /* |
3 | * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard | |
4 | * Copyright (c) by Jaromir Koutek <miri@punknet.cz>, | |
c1017a4c | 5 | * Jaroslav Kysela <perex@perex.cz>, |
1da177e4 LT |
6 | * Thomas Sailer <sailer@ife.ee.ethz.ch>, |
7 | * Abramo Bagnara <abramo@alsa-project.org>, | |
8 | * Markus Gruber <gruber@eikon.tum.de> | |
9 | * | |
10 | * Rewritten from sonicvibes.c source. | |
11 | * | |
12 | * TODO: | |
13 | * Rewrite better spinlocks | |
1da177e4 LT |
14 | */ |
15 | ||
16 | /* | |
17 | NOTES: | |
18 | - Capture data is written unaligned starting from dma_base + 1 so I need to | |
19 | disable mmap and to add a copy callback. | |
20 | - After several cycle of the following: | |
21 | while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done | |
22 | a "playback write error (DMA or IRQ trouble?)" may happen. | |
23 | This is due to playback interrupts not generated. | |
24 | I suspect a timing issue. | |
25 | - Sometimes the interrupt handler is invoked wrongly during playback. | |
26 | This generates some harmless "Unexpected hw_pointer: wrong interrupt | |
27 | acknowledge". | |
28 | I've seen that using small period sizes. | |
29 | Reproducible with: | |
30 | mpg123 test.mp3 & | |
31 | hdparm -t -T /dev/hda | |
32 | */ | |
33 | ||
34 | ||
1da177e4 LT |
35 | #include <linux/init.h> |
36 | #include <linux/interrupt.h> | |
37 | #include <linux/pci.h> | |
38 | #include <linux/slab.h> | |
39 | #include <linux/gameport.h> | |
65a77217 | 40 | #include <linux/module.h> |
1da177e4 | 41 | #include <linux/delay.h> |
910638ae | 42 | #include <linux/dma-mapping.h> |
6cbbfe1c | 43 | #include <linux/io.h> |
1da177e4 LT |
44 | #include <sound/core.h> |
45 | #include <sound/control.h> | |
46 | #include <sound/pcm.h> | |
47 | #include <sound/opl3.h> | |
48 | #include <sound/mpu401.h> | |
49 | #include <sound/initval.h> | |
0b593972 | 50 | #include <sound/tlv.h> |
1da177e4 | 51 | |
1da177e4 LT |
52 | MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>"); |
53 | MODULE_DESCRIPTION("ESS Solo-1"); | |
54 | MODULE_LICENSE("GPL"); | |
1da177e4 | 55 | |
b2fac073 | 56 | #if IS_REACHABLE(CONFIG_GAMEPORT) |
1da177e4 LT |
57 | #define SUPPORT_JOYSTICK 1 |
58 | #endif | |
59 | ||
1da177e4 LT |
60 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ |
61 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
a67ff6a5 | 62 | static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ |
1da177e4 LT |
63 | |
64 | module_param_array(index, int, NULL, 0444); | |
65 | MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard."); | |
66 | module_param_array(id, charp, NULL, 0444); | |
67 | MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard."); | |
68 | module_param_array(enable, bool, NULL, 0444); | |
69 | MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard."); | |
70 | ||
71 | #define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x) | |
72 | ||
73 | #define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x) | |
74 | ||
75 | #define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x) | |
76 | ||
77 | #define SL_PCI_LEGACYCONTROL 0x40 | |
78 | #define SL_PCI_CONFIG 0x50 | |
79 | #define SL_PCI_DDMACONTROL 0x60 | |
80 | ||
81 | #define ESSIO_REG_AUDIO2DMAADDR 0 | |
82 | #define ESSIO_REG_AUDIO2DMACOUNT 4 | |
83 | #define ESSIO_REG_AUDIO2MODE 6 | |
84 | #define ESSIO_REG_IRQCONTROL 7 | |
85 | ||
86 | #define ESSDM_REG_DMAADDR 0x00 | |
87 | #define ESSDM_REG_DMACOUNT 0x04 | |
88 | #define ESSDM_REG_DMACOMMAND 0x08 | |
89 | #define ESSDM_REG_DMASTATUS 0x08 | |
90 | #define ESSDM_REG_DMAMODE 0x0b | |
91 | #define ESSDM_REG_DMACLEAR 0x0d | |
92 | #define ESSDM_REG_DMAMASK 0x0f | |
93 | ||
94 | #define ESSSB_REG_FMLOWADDR 0x00 | |
95 | #define ESSSB_REG_FMHIGHADDR 0x02 | |
96 | #define ESSSB_REG_MIXERADDR 0x04 | |
97 | #define ESSSB_REG_MIXERDATA 0x05 | |
98 | ||
99 | #define ESSSB_IREG_AUDIO1 0x14 | |
100 | #define ESSSB_IREG_MICMIX 0x1a | |
101 | #define ESSSB_IREG_RECSRC 0x1c | |
102 | #define ESSSB_IREG_MASTER 0x32 | |
103 | #define ESSSB_IREG_FM 0x36 | |
104 | #define ESSSB_IREG_AUXACD 0x38 | |
105 | #define ESSSB_IREG_AUXB 0x3a | |
106 | #define ESSSB_IREG_PCSPEAKER 0x3c | |
107 | #define ESSSB_IREG_LINE 0x3e | |
108 | #define ESSSB_IREG_SPATCONTROL 0x50 | |
109 | #define ESSSB_IREG_SPATLEVEL 0x52 | |
110 | #define ESSSB_IREG_MASTER_LEFT 0x60 | |
111 | #define ESSSB_IREG_MASTER_RIGHT 0x62 | |
112 | #define ESSSB_IREG_MPU401CONTROL 0x64 | |
113 | #define ESSSB_IREG_MICMIXRECORD 0x68 | |
114 | #define ESSSB_IREG_AUDIO2RECORD 0x69 | |
115 | #define ESSSB_IREG_AUXACDRECORD 0x6a | |
116 | #define ESSSB_IREG_FMRECORD 0x6b | |
117 | #define ESSSB_IREG_AUXBRECORD 0x6c | |
118 | #define ESSSB_IREG_MONO 0x6d | |
119 | #define ESSSB_IREG_LINERECORD 0x6e | |
120 | #define ESSSB_IREG_MONORECORD 0x6f | |
121 | #define ESSSB_IREG_AUDIO2SAMPLE 0x70 | |
122 | #define ESSSB_IREG_AUDIO2MODE 0x71 | |
123 | #define ESSSB_IREG_AUDIO2FILTER 0x72 | |
124 | #define ESSSB_IREG_AUDIO2TCOUNTL 0x74 | |
125 | #define ESSSB_IREG_AUDIO2TCOUNTH 0x76 | |
126 | #define ESSSB_IREG_AUDIO2CONTROL1 0x78 | |
127 | #define ESSSB_IREG_AUDIO2CONTROL2 0x7a | |
128 | #define ESSSB_IREG_AUDIO2 0x7c | |
129 | ||
130 | #define ESSSB_REG_RESET 0x06 | |
131 | ||
132 | #define ESSSB_REG_READDATA 0x0a | |
133 | #define ESSSB_REG_WRITEDATA 0x0c | |
134 | #define ESSSB_REG_READSTATUS 0x0c | |
135 | ||
136 | #define ESSSB_REG_STATUS 0x0e | |
137 | ||
138 | #define ESS_CMD_EXTSAMPLERATE 0xa1 | |
139 | #define ESS_CMD_FILTERDIV 0xa2 | |
140 | #define ESS_CMD_DMACNTRELOADL 0xa4 | |
141 | #define ESS_CMD_DMACNTRELOADH 0xa5 | |
142 | #define ESS_CMD_ANALOGCONTROL 0xa8 | |
143 | #define ESS_CMD_IRQCONTROL 0xb1 | |
144 | #define ESS_CMD_DRQCONTROL 0xb2 | |
145 | #define ESS_CMD_RECLEVEL 0xb4 | |
146 | #define ESS_CMD_SETFORMAT 0xb6 | |
147 | #define ESS_CMD_SETFORMAT2 0xb7 | |
148 | #define ESS_CMD_DMACONTROL 0xb8 | |
149 | #define ESS_CMD_DMATYPE 0xb9 | |
150 | #define ESS_CMD_OFFSETLEFT 0xba | |
151 | #define ESS_CMD_OFFSETRIGHT 0xbb | |
152 | #define ESS_CMD_READREG 0xc0 | |
153 | #define ESS_CMD_ENABLEEXT 0xc6 | |
154 | #define ESS_CMD_PAUSEDMA 0xd0 | |
155 | #define ESS_CMD_ENABLEAUDIO1 0xd1 | |
156 | #define ESS_CMD_STOPAUDIO1 0xd3 | |
157 | #define ESS_CMD_AUDIO1STATUS 0xd8 | |
158 | #define ESS_CMD_CONTDMA 0xd4 | |
159 | #define ESS_CMD_TESTIRQ 0xf2 | |
160 | ||
161 | #define ESS_RECSRC_MIC 0 | |
162 | #define ESS_RECSRC_AUXACD 2 | |
163 | #define ESS_RECSRC_AUXB 5 | |
164 | #define ESS_RECSRC_LINE 6 | |
165 | #define ESS_RECSRC_NONE 7 | |
166 | ||
167 | #define DAC1 0x01 | |
168 | #define ADC1 0x02 | |
169 | #define DAC2 0x04 | |
170 | ||
171 | /* | |
172 | ||
173 | */ | |
174 | ||
1da177e4 LT |
175 | #define SAVED_REG_SIZE 32 /* max. number of registers to save */ |
176 | ||
e571f594 | 177 | struct es1938 { |
1da177e4 LT |
178 | int irq; |
179 | ||
180 | unsigned long io_port; | |
181 | unsigned long sb_port; | |
182 | unsigned long vc_port; | |
183 | unsigned long mpu_port; | |
184 | unsigned long game_port; | |
185 | unsigned long ddma_port; | |
186 | ||
187 | unsigned char irqmask; | |
188 | unsigned char revision; | |
189 | ||
e571f594 TI |
190 | struct snd_kcontrol *hw_volume; |
191 | struct snd_kcontrol *hw_switch; | |
192 | struct snd_kcontrol *master_volume; | |
193 | struct snd_kcontrol *master_switch; | |
1da177e4 LT |
194 | |
195 | struct pci_dev *pci; | |
e571f594 TI |
196 | struct snd_card *card; |
197 | struct snd_pcm *pcm; | |
198 | struct snd_pcm_substream *capture_substream; | |
199 | struct snd_pcm_substream *playback1_substream; | |
200 | struct snd_pcm_substream *playback2_substream; | |
201 | struct snd_rawmidi *rmidi; | |
1da177e4 LT |
202 | |
203 | unsigned int dma1_size; | |
204 | unsigned int dma2_size; | |
205 | unsigned int dma1_start; | |
206 | unsigned int dma2_start; | |
207 | unsigned int dma1_shift; | |
208 | unsigned int dma2_shift; | |
19e2e3c3 | 209 | unsigned int last_capture_dmaaddr; |
1da177e4 LT |
210 | unsigned int active; |
211 | ||
212 | spinlock_t reg_lock; | |
213 | spinlock_t mixer_lock; | |
e571f594 | 214 | struct snd_info_entry *proc_entry; |
1da177e4 LT |
215 | |
216 | #ifdef SUPPORT_JOYSTICK | |
217 | struct gameport *gameport; | |
218 | #endif | |
c7561cd8 | 219 | #ifdef CONFIG_PM_SLEEP |
1da177e4 LT |
220 | unsigned char saved_regs[SAVED_REG_SIZE]; |
221 | #endif | |
222 | }; | |
223 | ||
7d12e780 | 224 | static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id); |
1da177e4 | 225 | |
9baa3c34 | 226 | static const struct pci_device_id snd_es1938_ids[] = { |
28d27aae | 227 | { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */ |
1da177e4 LT |
228 | { 0, } |
229 | }; | |
230 | ||
231 | MODULE_DEVICE_TABLE(pci, snd_es1938_ids); | |
232 | ||
233 | #define RESET_LOOP_TIMEOUT 0x10000 | |
234 | #define WRITE_LOOP_TIMEOUT 0x10000 | |
235 | #define GET_LOOP_TIMEOUT 0x01000 | |
236 | ||
1da177e4 LT |
237 | /* ----------------------------------------------------------------- |
238 | * Write to a mixer register | |
239 | * -----------------------------------------------------------------*/ | |
e571f594 | 240 | static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val) |
1da177e4 LT |
241 | { |
242 | unsigned long flags; | |
243 | spin_lock_irqsave(&chip->mixer_lock, flags); | |
244 | outb(reg, SLSB_REG(chip, MIXERADDR)); | |
245 | outb(val, SLSB_REG(chip, MIXERDATA)); | |
246 | spin_unlock_irqrestore(&chip->mixer_lock, flags); | |
ebebecaa | 247 | dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val); |
1da177e4 LT |
248 | } |
249 | ||
250 | /* ----------------------------------------------------------------- | |
251 | * Read from a mixer register | |
252 | * -----------------------------------------------------------------*/ | |
e571f594 | 253 | static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg) |
1da177e4 LT |
254 | { |
255 | int data; | |
256 | unsigned long flags; | |
257 | spin_lock_irqsave(&chip->mixer_lock, flags); | |
258 | outb(reg, SLSB_REG(chip, MIXERADDR)); | |
259 | data = inb(SLSB_REG(chip, MIXERDATA)); | |
260 | spin_unlock_irqrestore(&chip->mixer_lock, flags); | |
ebebecaa | 261 | dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data); |
1da177e4 LT |
262 | return data; |
263 | } | |
264 | ||
265 | /* ----------------------------------------------------------------- | |
266 | * Write to some bits of a mixer register (return old value) | |
267 | * -----------------------------------------------------------------*/ | |
e571f594 TI |
268 | static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg, |
269 | unsigned char mask, unsigned char val) | |
1da177e4 LT |
270 | { |
271 | unsigned long flags; | |
272 | unsigned char old, new, oval; | |
273 | spin_lock_irqsave(&chip->mixer_lock, flags); | |
274 | outb(reg, SLSB_REG(chip, MIXERADDR)); | |
275 | old = inb(SLSB_REG(chip, MIXERDATA)); | |
276 | oval = old & mask; | |
277 | if (val != oval) { | |
278 | new = (old & ~mask) | (val & mask); | |
279 | outb(new, SLSB_REG(chip, MIXERDATA)); | |
ebebecaa TI |
280 | dev_dbg(chip->card->dev, |
281 | "Mixer reg %02x was %02x, set to %02x\n", | |
99b359ba | 282 | reg, old, new); |
1da177e4 LT |
283 | } |
284 | spin_unlock_irqrestore(&chip->mixer_lock, flags); | |
285 | return oval; | |
286 | } | |
287 | ||
288 | /* ----------------------------------------------------------------- | |
289 | * Write command to Controller Registers | |
290 | * -----------------------------------------------------------------*/ | |
e571f594 | 291 | static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd) |
1da177e4 LT |
292 | { |
293 | int i; | |
294 | unsigned char v; | |
295 | for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) { | |
3dc52815 TI |
296 | v = inb(SLSB_REG(chip, READSTATUS)); |
297 | if (!(v & 0x80)) { | |
1da177e4 LT |
298 | outb(cmd, SLSB_REG(chip, WRITEDATA)); |
299 | return; | |
300 | } | |
301 | } | |
ebebecaa TI |
302 | dev_err(chip->card->dev, |
303 | "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v); | |
1da177e4 LT |
304 | } |
305 | ||
306 | /* ----------------------------------------------------------------- | |
307 | * Read the Read Data Buffer | |
308 | * -----------------------------------------------------------------*/ | |
e571f594 | 309 | static int snd_es1938_get_byte(struct es1938 *chip) |
1da177e4 LT |
310 | { |
311 | int i; | |
312 | unsigned char v; | |
3dc52815 TI |
313 | for (i = GET_LOOP_TIMEOUT; i; i--) { |
314 | v = inb(SLSB_REG(chip, STATUS)); | |
315 | if (v & 0x80) | |
1da177e4 | 316 | return inb(SLSB_REG(chip, READDATA)); |
3dc52815 | 317 | } |
ebebecaa | 318 | dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v); |
1da177e4 LT |
319 | return -ENODEV; |
320 | } | |
321 | ||
322 | /* ----------------------------------------------------------------- | |
323 | * Write value cmd register | |
324 | * -----------------------------------------------------------------*/ | |
e571f594 | 325 | static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val) |
1da177e4 LT |
326 | { |
327 | unsigned long flags; | |
328 | spin_lock_irqsave(&chip->reg_lock, flags); | |
329 | snd_es1938_write_cmd(chip, reg); | |
330 | snd_es1938_write_cmd(chip, val); | |
331 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
ebebecaa | 332 | dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val); |
1da177e4 LT |
333 | } |
334 | ||
335 | /* ----------------------------------------------------------------- | |
336 | * Read data from cmd register and return it | |
337 | * -----------------------------------------------------------------*/ | |
e571f594 | 338 | static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg) |
1da177e4 LT |
339 | { |
340 | unsigned char val; | |
341 | unsigned long flags; | |
342 | spin_lock_irqsave(&chip->reg_lock, flags); | |
343 | snd_es1938_write_cmd(chip, ESS_CMD_READREG); | |
344 | snd_es1938_write_cmd(chip, reg); | |
345 | val = snd_es1938_get_byte(chip); | |
346 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
ebebecaa | 347 | dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val); |
1da177e4 LT |
348 | return val; |
349 | } | |
350 | ||
351 | /* ----------------------------------------------------------------- | |
352 | * Write data to cmd register and return old value | |
353 | * -----------------------------------------------------------------*/ | |
e571f594 TI |
354 | static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask, |
355 | unsigned char val) | |
1da177e4 LT |
356 | { |
357 | unsigned long flags; | |
358 | unsigned char old, new, oval; | |
359 | spin_lock_irqsave(&chip->reg_lock, flags); | |
360 | snd_es1938_write_cmd(chip, ESS_CMD_READREG); | |
361 | snd_es1938_write_cmd(chip, reg); | |
362 | old = snd_es1938_get_byte(chip); | |
363 | oval = old & mask; | |
364 | if (val != oval) { | |
365 | snd_es1938_write_cmd(chip, reg); | |
366 | new = (old & ~mask) | (val & mask); | |
367 | snd_es1938_write_cmd(chip, new); | |
ebebecaa | 368 | dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n", |
99b359ba | 369 | reg, old, new); |
1da177e4 LT |
370 | } |
371 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
372 | return oval; | |
373 | } | |
374 | ||
375 | /* -------------------------------------------------------------------- | |
376 | * Reset the chip | |
377 | * --------------------------------------------------------------------*/ | |
e571f594 | 378 | static void snd_es1938_reset(struct es1938 *chip) |
1da177e4 LT |
379 | { |
380 | int i; | |
381 | ||
382 | outb(3, SLSB_REG(chip, RESET)); | |
383 | inb(SLSB_REG(chip, RESET)); | |
384 | outb(0, SLSB_REG(chip, RESET)); | |
385 | for (i = 0; i < RESET_LOOP_TIMEOUT; i++) { | |
386 | if (inb(SLSB_REG(chip, STATUS)) & 0x80) { | |
387 | if (inb(SLSB_REG(chip, READDATA)) == 0xaa) | |
388 | goto __next; | |
389 | } | |
390 | } | |
ebebecaa | 391 | dev_err(chip->card->dev, "ESS Solo-1 reset failed\n"); |
1da177e4 LT |
392 | |
393 | __next: | |
394 | snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT); | |
395 | ||
396 | /* Demand transfer DMA: 4 bytes per DMA request */ | |
397 | snd_es1938_write(chip, ESS_CMD_DMATYPE, 2); | |
398 | ||
399 | /* Change behaviour of register A1 | |
400 | 4x oversampling | |
401 | 2nd channel DAC asynchronous */ | |
402 | snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32); | |
403 | /* enable/select DMA channel and IRQ channel */ | |
404 | snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50); | |
405 | snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50); | |
406 | snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1); | |
407 | /* Set spatializer parameters to recommended values */ | |
408 | snd_es1938_mixer_write(chip, 0x54, 0x8f); | |
409 | snd_es1938_mixer_write(chip, 0x56, 0x95); | |
410 | snd_es1938_mixer_write(chip, 0x58, 0x94); | |
411 | snd_es1938_mixer_write(chip, 0x5a, 0x80); | |
412 | } | |
413 | ||
414 | /* -------------------------------------------------------------------- | |
415 | * Reset the FIFOs | |
416 | * --------------------------------------------------------------------*/ | |
e571f594 | 417 | static void snd_es1938_reset_fifo(struct es1938 *chip) |
1da177e4 LT |
418 | { |
419 | outb(2, SLSB_REG(chip, RESET)); | |
420 | outb(0, SLSB_REG(chip, RESET)); | |
421 | } | |
422 | ||
44d71507 | 423 | static const struct snd_ratnum clocks[2] = { |
1da177e4 LT |
424 | { |
425 | .num = 793800, | |
426 | .den_min = 1, | |
427 | .den_max = 128, | |
428 | .den_step = 1, | |
429 | }, | |
430 | { | |
431 | .num = 768000, | |
432 | .den_min = 1, | |
433 | .den_max = 128, | |
434 | .den_step = 1, | |
435 | } | |
436 | }; | |
437 | ||
44d71507 | 438 | static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = { |
1da177e4 LT |
439 | .nrats = 2, |
440 | .rats = clocks, | |
441 | }; | |
442 | ||
443 | ||
e571f594 TI |
444 | static void snd_es1938_rate_set(struct es1938 *chip, |
445 | struct snd_pcm_substream *substream, | |
1da177e4 LT |
446 | int mode) |
447 | { | |
448 | unsigned int bits, div0; | |
e571f594 | 449 | struct snd_pcm_runtime *runtime = substream->runtime; |
1da177e4 LT |
450 | if (runtime->rate_num == clocks[0].num) |
451 | bits = 128 - runtime->rate_den; | |
452 | else | |
453 | bits = 256 - runtime->rate_den; | |
454 | ||
455 | /* set filter register */ | |
456 | div0 = 256 - 7160000*20/(8*82*runtime->rate); | |
457 | ||
458 | if (mode == DAC2) { | |
459 | snd_es1938_mixer_write(chip, 0x70, bits); | |
460 | snd_es1938_mixer_write(chip, 0x72, div0); | |
461 | } else { | |
462 | snd_es1938_write(chip, 0xA1, bits); | |
463 | snd_es1938_write(chip, 0xA2, div0); | |
464 | } | |
465 | } | |
466 | ||
467 | /* -------------------------------------------------------------------- | |
468 | * Configure Solo1 builtin DMA Controller | |
469 | * --------------------------------------------------------------------*/ | |
470 | ||
e571f594 | 471 | static void snd_es1938_playback1_setdma(struct es1938 *chip) |
1da177e4 LT |
472 | { |
473 | outb(0x00, SLIO_REG(chip, AUDIO2MODE)); | |
474 | outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR)); | |
475 | outw(0, SLIO_REG(chip, AUDIO2DMACOUNT)); | |
476 | outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT)); | |
477 | } | |
478 | ||
e571f594 | 479 | static void snd_es1938_playback2_setdma(struct es1938 *chip) |
1da177e4 LT |
480 | { |
481 | /* Enable DMA controller */ | |
482 | outb(0xc4, SLDM_REG(chip, DMACOMMAND)); | |
483 | /* 1. Master reset */ | |
484 | outb(0, SLDM_REG(chip, DMACLEAR)); | |
485 | /* 2. Mask DMA */ | |
486 | outb(1, SLDM_REG(chip, DMAMASK)); | |
487 | outb(0x18, SLDM_REG(chip, DMAMODE)); | |
488 | outl(chip->dma1_start, SLDM_REG(chip, DMAADDR)); | |
489 | outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT)); | |
490 | /* 3. Unmask DMA */ | |
491 | outb(0, SLDM_REG(chip, DMAMASK)); | |
492 | } | |
493 | ||
e571f594 | 494 | static void snd_es1938_capture_setdma(struct es1938 *chip) |
1da177e4 LT |
495 | { |
496 | /* Enable DMA controller */ | |
497 | outb(0xc4, SLDM_REG(chip, DMACOMMAND)); | |
498 | /* 1. Master reset */ | |
499 | outb(0, SLDM_REG(chip, DMACLEAR)); | |
500 | /* 2. Mask DMA */ | |
501 | outb(1, SLDM_REG(chip, DMAMASK)); | |
502 | outb(0x14, SLDM_REG(chip, DMAMODE)); | |
503 | outl(chip->dma1_start, SLDM_REG(chip, DMAADDR)); | |
19e2e3c3 | 504 | chip->last_capture_dmaaddr = chip->dma1_start; |
1da177e4 LT |
505 | outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT)); |
506 | /* 3. Unmask DMA */ | |
507 | outb(0, SLDM_REG(chip, DMAMASK)); | |
508 | } | |
509 | ||
510 | /* ---------------------------------------------------------------------- | |
511 | * | |
512 | * *** PCM part *** | |
513 | */ | |
514 | ||
e571f594 | 515 | static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
516 | int cmd) |
517 | { | |
e571f594 | 518 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
519 | int val; |
520 | switch (cmd) { | |
521 | case SNDRV_PCM_TRIGGER_START: | |
93b9f426 | 522 | case SNDRV_PCM_TRIGGER_RESUME: |
1da177e4 LT |
523 | val = 0x0f; |
524 | chip->active |= ADC1; | |
525 | break; | |
526 | case SNDRV_PCM_TRIGGER_STOP: | |
93b9f426 | 527 | case SNDRV_PCM_TRIGGER_SUSPEND: |
1da177e4 LT |
528 | val = 0x00; |
529 | chip->active &= ~ADC1; | |
530 | break; | |
531 | default: | |
532 | return -EINVAL; | |
533 | } | |
534 | snd_es1938_write(chip, ESS_CMD_DMACONTROL, val); | |
535 | return 0; | |
536 | } | |
537 | ||
e571f594 | 538 | static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
539 | int cmd) |
540 | { | |
e571f594 | 541 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
542 | switch (cmd) { |
543 | case SNDRV_PCM_TRIGGER_START: | |
93b9f426 | 544 | case SNDRV_PCM_TRIGGER_RESUME: |
1da177e4 LT |
545 | /* According to the documentation this should be: |
546 | 0x13 but that value may randomly swap stereo channels */ | |
547 | snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92); | |
548 | udelay(10); | |
549 | snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93); | |
550 | /* This two stage init gives the FIFO -> DAC connection time to | |
551 | * settle before first data from DMA flows in. This should ensure | |
552 | * no swapping of stereo channels. Report a bug if otherwise :-) */ | |
553 | outb(0x0a, SLIO_REG(chip, AUDIO2MODE)); | |
554 | chip->active |= DAC2; | |
555 | break; | |
556 | case SNDRV_PCM_TRIGGER_STOP: | |
93b9f426 | 557 | case SNDRV_PCM_TRIGGER_SUSPEND: |
1da177e4 LT |
558 | outb(0, SLIO_REG(chip, AUDIO2MODE)); |
559 | snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0); | |
560 | chip->active &= ~DAC2; | |
561 | break; | |
562 | default: | |
563 | return -EINVAL; | |
564 | } | |
565 | return 0; | |
566 | } | |
567 | ||
e571f594 | 568 | static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
569 | int cmd) |
570 | { | |
e571f594 | 571 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
572 | int val; |
573 | switch (cmd) { | |
574 | case SNDRV_PCM_TRIGGER_START: | |
93b9f426 | 575 | case SNDRV_PCM_TRIGGER_RESUME: |
1da177e4 LT |
576 | val = 5; |
577 | chip->active |= DAC1; | |
578 | break; | |
579 | case SNDRV_PCM_TRIGGER_STOP: | |
93b9f426 | 580 | case SNDRV_PCM_TRIGGER_SUSPEND: |
1da177e4 LT |
581 | val = 0; |
582 | chip->active &= ~DAC1; | |
583 | break; | |
584 | default: | |
585 | return -EINVAL; | |
586 | } | |
587 | snd_es1938_write(chip, ESS_CMD_DMACONTROL, val); | |
588 | return 0; | |
589 | } | |
590 | ||
e571f594 | 591 | static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
592 | int cmd) |
593 | { | |
594 | switch (substream->number) { | |
595 | case 0: | |
596 | return snd_es1938_playback1_trigger(substream, cmd); | |
597 | case 1: | |
598 | return snd_es1938_playback2_trigger(substream, cmd); | |
599 | } | |
600 | snd_BUG(); | |
601 | return -EINVAL; | |
602 | } | |
603 | ||
604 | /* -------------------------------------------------------------------- | |
605 | * First channel for Extended Mode Audio 1 ADC Operation | |
606 | * --------------------------------------------------------------------*/ | |
e571f594 | 607 | static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 608 | { |
e571f594 TI |
609 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
610 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
611 | int u, is8, mono; |
612 | unsigned int size = snd_pcm_lib_buffer_bytes(substream); | |
613 | unsigned int count = snd_pcm_lib_period_bytes(substream); | |
614 | ||
615 | chip->dma1_size = size; | |
616 | chip->dma1_start = runtime->dma_addr; | |
617 | ||
618 | mono = (runtime->channels > 1) ? 0 : 1; | |
619 | is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1; | |
620 | u = snd_pcm_format_unsigned(runtime->format); | |
621 | ||
622 | chip->dma1_shift = 2 - mono - is8; | |
623 | ||
624 | snd_es1938_reset_fifo(chip); | |
625 | ||
626 | /* program type */ | |
627 | snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1)); | |
628 | ||
629 | /* set clock and counters */ | |
630 | snd_es1938_rate_set(chip, substream, ADC1); | |
631 | ||
632 | count = 0x10000 - count; | |
633 | snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff); | |
634 | snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8); | |
635 | ||
636 | /* initialize and configure ADC */ | |
637 | snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71); | |
638 | snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 | | |
639 | (u ? 0x00 : 0x20) | | |
640 | (is8 ? 0x00 : 0x04) | | |
641 | (mono ? 0x40 : 0x08)); | |
642 | ||
643 | // snd_es1938_reset_fifo(chip); | |
644 | ||
645 | /* 11. configure system interrupt controller and DMA controller */ | |
646 | snd_es1938_capture_setdma(chip); | |
647 | ||
648 | return 0; | |
649 | } | |
650 | ||
651 | ||
652 | /* ------------------------------------------------------------------------------ | |
653 | * Second Audio channel DAC Operation | |
654 | * ------------------------------------------------------------------------------*/ | |
e571f594 | 655 | static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 656 | { |
e571f594 TI |
657 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
658 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
659 | int u, is8, mono; |
660 | unsigned int size = snd_pcm_lib_buffer_bytes(substream); | |
661 | unsigned int count = snd_pcm_lib_period_bytes(substream); | |
662 | ||
663 | chip->dma2_size = size; | |
664 | chip->dma2_start = runtime->dma_addr; | |
665 | ||
666 | mono = (runtime->channels > 1) ? 0 : 1; | |
667 | is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1; | |
668 | u = snd_pcm_format_unsigned(runtime->format); | |
669 | ||
670 | chip->dma2_shift = 2 - mono - is8; | |
671 | ||
672 | snd_es1938_reset_fifo(chip); | |
673 | ||
674 | /* set clock and counters */ | |
675 | snd_es1938_rate_set(chip, substream, DAC2); | |
676 | ||
677 | count >>= 1; | |
678 | count = 0x10000 - count; | |
679 | snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff); | |
680 | snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8); | |
681 | ||
682 | /* initialize and configure Audio 2 DAC */ | |
e571f594 TI |
683 | snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) | |
684 | (mono ? 0 : 2) | (is8 ? 0 : 1)); | |
1da177e4 LT |
685 | |
686 | /* program DMA */ | |
687 | snd_es1938_playback1_setdma(chip); | |
688 | ||
689 | return 0; | |
690 | } | |
691 | ||
e571f594 | 692 | static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 693 | { |
e571f594 TI |
694 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
695 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
696 | int u, is8, mono; |
697 | unsigned int size = snd_pcm_lib_buffer_bytes(substream); | |
698 | unsigned int count = snd_pcm_lib_period_bytes(substream); | |
699 | ||
700 | chip->dma1_size = size; | |
701 | chip->dma1_start = runtime->dma_addr; | |
702 | ||
703 | mono = (runtime->channels > 1) ? 0 : 1; | |
704 | is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1; | |
705 | u = snd_pcm_format_unsigned(runtime->format); | |
706 | ||
707 | chip->dma1_shift = 2 - mono - is8; | |
708 | ||
709 | count = 0x10000 - count; | |
710 | ||
711 | /* reset */ | |
712 | snd_es1938_reset_fifo(chip); | |
713 | ||
714 | snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1)); | |
715 | ||
716 | /* set clock and counters */ | |
717 | snd_es1938_rate_set(chip, substream, DAC1); | |
718 | snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff); | |
719 | snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8); | |
720 | ||
721 | /* initialized and configure DAC */ | |
722 | snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00); | |
723 | snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71); | |
724 | snd_es1938_write(chip, ESS_CMD_SETFORMAT2, | |
725 | 0x90 | (mono ? 0x40 : 0x08) | | |
726 | (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20)); | |
727 | ||
728 | /* program DMA */ | |
729 | snd_es1938_playback2_setdma(chip); | |
730 | ||
731 | return 0; | |
732 | } | |
733 | ||
e571f594 | 734 | static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 LT |
735 | { |
736 | switch (substream->number) { | |
737 | case 0: | |
738 | return snd_es1938_playback1_prepare(substream); | |
739 | case 1: | |
740 | return snd_es1938_playback2_prepare(substream); | |
741 | } | |
742 | snd_BUG(); | |
743 | return -EINVAL; | |
744 | } | |
745 | ||
19e2e3c3 HL |
746 | /* during the incrementing of dma counters the DMA register reads sometimes |
747 | returns garbage. To ensure a valid hw pointer, the following checks which | |
748 | should be very unlikely to fail are used: | |
749 | - is the current DMA address in the valid DMA range ? | |
750 | - is the sum of DMA address and DMA counter pointing to the last DMA byte ? | |
751 | One can argue this could differ by one byte depending on which register is | |
752 | updated first, so the implementation below allows for that. | |
753 | */ | |
e571f594 | 754 | static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 755 | { |
e571f594 | 756 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
1da177e4 | 757 | size_t ptr; |
19e2e3c3 | 758 | #if 0 |
1da177e4 | 759 | size_t old, new; |
1da177e4 LT |
760 | /* This stuff is *needed*, don't ask why - AB */ |
761 | old = inw(SLDM_REG(chip, DMACOUNT)); | |
762 | while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old) | |
763 | old = new; | |
764 | ptr = chip->dma1_size - 1 - new; | |
765 | #else | |
19e2e3c3 HL |
766 | size_t count; |
767 | unsigned int diff; | |
768 | ||
769 | ptr = inl(SLDM_REG(chip, DMAADDR)); | |
770 | count = inw(SLDM_REG(chip, DMACOUNT)); | |
771 | diff = chip->dma1_start + chip->dma1_size - ptr - count; | |
772 | ||
773 | if (diff > 3 || ptr < chip->dma1_start | |
774 | || ptr >= chip->dma1_start+chip->dma1_size) | |
775 | ptr = chip->last_capture_dmaaddr; /* bad, use last saved */ | |
776 | else | |
777 | chip->last_capture_dmaaddr = ptr; /* good, remember it */ | |
778 | ||
779 | ptr -= chip->dma1_start; | |
1da177e4 LT |
780 | #endif |
781 | return ptr >> chip->dma1_shift; | |
782 | } | |
783 | ||
e571f594 | 784 | static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 785 | { |
e571f594 | 786 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
787 | size_t ptr; |
788 | #if 1 | |
789 | ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT)); | |
790 | #else | |
791 | ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start; | |
792 | #endif | |
793 | return ptr >> chip->dma2_shift; | |
794 | } | |
795 | ||
e571f594 | 796 | static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 797 | { |
e571f594 | 798 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
799 | size_t ptr; |
800 | size_t old, new; | |
801 | #if 1 | |
802 | /* This stuff is *needed*, don't ask why - AB */ | |
803 | old = inw(SLDM_REG(chip, DMACOUNT)); | |
804 | while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old) | |
805 | old = new; | |
806 | ptr = chip->dma1_size - 1 - new; | |
807 | #else | |
808 | ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start; | |
809 | #endif | |
810 | return ptr >> chip->dma1_shift; | |
811 | } | |
812 | ||
e571f594 | 813 | static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream) |
1da177e4 LT |
814 | { |
815 | switch (substream->number) { | |
816 | case 0: | |
817 | return snd_es1938_playback1_pointer(substream); | |
818 | case 1: | |
819 | return snd_es1938_playback2_pointer(substream); | |
820 | } | |
821 | snd_BUG(); | |
822 | return -EINVAL; | |
823 | } | |
824 | ||
e571f594 | 825 | static int snd_es1938_capture_copy(struct snd_pcm_substream *substream, |
b96c3a15 TI |
826 | int channel, unsigned long pos, |
827 | void __user *dst, unsigned long count) | |
1da177e4 | 828 | { |
e571f594 TI |
829 | struct snd_pcm_runtime *runtime = substream->runtime; |
830 | struct es1938 *chip = snd_pcm_substream_chip(substream); | |
b96c3a15 | 831 | |
da3cec35 TI |
832 | if (snd_BUG_ON(pos + count > chip->dma1_size)) |
833 | return -EINVAL; | |
1da177e4 LT |
834 | if (pos + count < chip->dma1_size) { |
835 | if (copy_to_user(dst, runtime->dma_area + pos + 1, count)) | |
836 | return -EFAULT; | |
837 | } else { | |
838 | if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1)) | |
839 | return -EFAULT; | |
b96c3a15 TI |
840 | if (put_user(runtime->dma_area[0], |
841 | ((unsigned char __user *)dst) + count - 1)) | |
1da177e4 LT |
842 | return -EFAULT; |
843 | } | |
844 | return 0; | |
845 | } | |
846 | ||
b96c3a15 TI |
847 | static int snd_es1938_capture_copy_kernel(struct snd_pcm_substream *substream, |
848 | int channel, unsigned long pos, | |
849 | void *dst, unsigned long count) | |
850 | { | |
851 | struct snd_pcm_runtime *runtime = substream->runtime; | |
852 | struct es1938 *chip = snd_pcm_substream_chip(substream); | |
853 | ||
854 | if (snd_BUG_ON(pos + count > chip->dma1_size)) | |
855 | return -EINVAL; | |
856 | if (pos + count < chip->dma1_size) { | |
857 | memcpy(dst, runtime->dma_area + pos + 1, count); | |
858 | } else { | |
859 | memcpy(dst, runtime->dma_area + pos + 1, count - 1); | |
860 | runtime->dma_area[0] = *((unsigned char *)dst + count - 1); | |
861 | } | |
862 | return 0; | |
863 | } | |
864 | ||
1da177e4 LT |
865 | /* ---------------------------------------------------------------------- |
866 | * Audio1 Capture (ADC) | |
867 | * ----------------------------------------------------------------------*/ | |
dee49895 | 868 | static const struct snd_pcm_hardware snd_es1938_capture = |
1da177e4 LT |
869 | { |
870 | .info = (SNDRV_PCM_INFO_INTERLEAVED | | |
871 | SNDRV_PCM_INFO_BLOCK_TRANSFER), | |
e571f594 TI |
872 | .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | |
873 | SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE), | |
1da177e4 LT |
874 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, |
875 | .rate_min = 6000, | |
876 | .rate_max = 48000, | |
877 | .channels_min = 1, | |
878 | .channels_max = 2, | |
879 | .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */ | |
880 | .period_bytes_min = 64, | |
881 | .period_bytes_max = 0x8000, | |
882 | .periods_min = 1, | |
883 | .periods_max = 1024, | |
884 | .fifo_size = 256, | |
885 | }; | |
886 | ||
887 | /* ----------------------------------------------------------------------- | |
888 | * Audio2 Playback (DAC) | |
889 | * -----------------------------------------------------------------------*/ | |
dee49895 | 890 | static const struct snd_pcm_hardware snd_es1938_playback = |
1da177e4 LT |
891 | { |
892 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
893 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
894 | SNDRV_PCM_INFO_MMAP_VALID), | |
e571f594 TI |
895 | .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | |
896 | SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE), | |
1da177e4 LT |
897 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, |
898 | .rate_min = 6000, | |
899 | .rate_max = 48000, | |
900 | .channels_min = 1, | |
901 | .channels_max = 2, | |
902 | .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */ | |
903 | .period_bytes_min = 64, | |
904 | .period_bytes_max = 0x8000, | |
905 | .periods_min = 1, | |
906 | .periods_max = 1024, | |
907 | .fifo_size = 256, | |
908 | }; | |
909 | ||
e571f594 | 910 | static int snd_es1938_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 911 | { |
e571f594 TI |
912 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
913 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
914 | |
915 | if (chip->playback2_substream) | |
916 | return -EAGAIN; | |
917 | chip->capture_substream = substream; | |
918 | runtime->hw = snd_es1938_capture; | |
919 | snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, | |
920 | &hw_constraints_clocks); | |
921 | snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00); | |
922 | return 0; | |
923 | } | |
924 | ||
e571f594 | 925 | static int snd_es1938_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 926 | { |
e571f594 TI |
927 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
928 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
929 | |
930 | switch (substream->number) { | |
931 | case 0: | |
932 | chip->playback1_substream = substream; | |
933 | break; | |
934 | case 1: | |
935 | if (chip->capture_substream) | |
936 | return -EAGAIN; | |
937 | chip->playback2_substream = substream; | |
938 | break; | |
939 | default: | |
940 | snd_BUG(); | |
941 | return -EINVAL; | |
942 | } | |
943 | runtime->hw = snd_es1938_playback; | |
944 | snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, | |
945 | &hw_constraints_clocks); | |
946 | snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00); | |
947 | return 0; | |
948 | } | |
949 | ||
e571f594 | 950 | static int snd_es1938_capture_close(struct snd_pcm_substream *substream) |
1da177e4 | 951 | { |
e571f594 | 952 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
953 | |
954 | chip->capture_substream = NULL; | |
955 | return 0; | |
956 | } | |
957 | ||
e571f594 | 958 | static int snd_es1938_playback_close(struct snd_pcm_substream *substream) |
1da177e4 | 959 | { |
e571f594 | 960 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
961 | |
962 | switch (substream->number) { | |
963 | case 0: | |
964 | chip->playback1_substream = NULL; | |
965 | break; | |
966 | case 1: | |
967 | chip->playback2_substream = NULL; | |
968 | break; | |
969 | default: | |
970 | snd_BUG(); | |
971 | return -EINVAL; | |
972 | } | |
973 | return 0; | |
974 | } | |
975 | ||
6769e988 | 976 | static const struct snd_pcm_ops snd_es1938_playback_ops = { |
1da177e4 LT |
977 | .open = snd_es1938_playback_open, |
978 | .close = snd_es1938_playback_close, | |
1da177e4 LT |
979 | .prepare = snd_es1938_playback_prepare, |
980 | .trigger = snd_es1938_playback_trigger, | |
981 | .pointer = snd_es1938_playback_pointer, | |
982 | }; | |
983 | ||
6769e988 | 984 | static const struct snd_pcm_ops snd_es1938_capture_ops = { |
1da177e4 LT |
985 | .open = snd_es1938_capture_open, |
986 | .close = snd_es1938_capture_close, | |
1da177e4 LT |
987 | .prepare = snd_es1938_capture_prepare, |
988 | .trigger = snd_es1938_capture_trigger, | |
989 | .pointer = snd_es1938_capture_pointer, | |
b96c3a15 TI |
990 | .copy_user = snd_es1938_capture_copy, |
991 | .copy_kernel = snd_es1938_capture_copy_kernel, | |
1da177e4 LT |
992 | }; |
993 | ||
e23e7a14 | 994 | static int snd_es1938_new_pcm(struct es1938 *chip, int device) |
1da177e4 | 995 | { |
e571f594 | 996 | struct snd_pcm *pcm; |
1da177e4 LT |
997 | int err; |
998 | ||
3dc52815 TI |
999 | err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm); |
1000 | if (err < 0) | |
1da177e4 LT |
1001 | return err; |
1002 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops); | |
1003 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops); | |
1004 | ||
1005 | pcm->private_data = chip; | |
1da177e4 LT |
1006 | pcm->info_flags = 0; |
1007 | strcpy(pcm->name, "ESS Solo-1"); | |
1008 | ||
d244a1db TI |
1009 | snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, |
1010 | &chip->pci->dev, 64*1024, 64*1024); | |
1da177e4 LT |
1011 | |
1012 | chip->pcm = pcm; | |
1013 | return 0; | |
1014 | } | |
1015 | ||
1016 | /* ------------------------------------------------------------------- | |
1017 | * | |
1018 | * *** Mixer part *** | |
1019 | */ | |
1020 | ||
e571f594 TI |
1021 | static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol, |
1022 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 | 1023 | { |
6b6b295e | 1024 | static const char * const texts[8] = { |
1da177e4 LT |
1025 | "Mic", "Mic Master", "CD", "AOUT", |
1026 | "Mic1", "Mix", "Line", "Master" | |
1027 | }; | |
1028 | ||
6b6b295e | 1029 | return snd_ctl_enum_info(uinfo, 1, 8, texts); |
1da177e4 LT |
1030 | } |
1031 | ||
e571f594 TI |
1032 | static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol, |
1033 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1034 | { |
e571f594 | 1035 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1036 | ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07; |
1037 | return 0; | |
1038 | } | |
1039 | ||
e571f594 TI |
1040 | static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol, |
1041 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1042 | { |
e571f594 | 1043 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1044 | unsigned char val = ucontrol->value.enumerated.item[0]; |
1045 | ||
1046 | if (val > 7) | |
1047 | return -EINVAL; | |
1048 | return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val; | |
1049 | } | |
1050 | ||
a5ce8890 | 1051 | #define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info |
1da177e4 | 1052 | |
e571f594 TI |
1053 | static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol, |
1054 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1055 | { |
e571f594 | 1056 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1057 | unsigned char val = snd_es1938_mixer_read(chip, 0x50); |
1058 | ucontrol->value.integer.value[0] = !!(val & 8); | |
1059 | return 0; | |
1060 | } | |
1061 | ||
e571f594 TI |
1062 | static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol, |
1063 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1064 | { |
e571f594 | 1065 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1066 | unsigned char oval, nval; |
1067 | int change; | |
1068 | nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04; | |
1069 | oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c; | |
1070 | change = nval != oval; | |
1071 | if (change) { | |
1072 | snd_es1938_mixer_write(chip, 0x50, nval & ~0x04); | |
1073 | snd_es1938_mixer_write(chip, 0x50, nval); | |
1074 | } | |
1075 | return change; | |
1076 | } | |
1077 | ||
e571f594 TI |
1078 | static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol, |
1079 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1080 | { |
1081 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1082 | uinfo->count = 2; | |
1083 | uinfo->value.integer.min = 0; | |
1084 | uinfo->value.integer.max = 63; | |
1085 | return 0; | |
1086 | } | |
1087 | ||
e571f594 TI |
1088 | static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol, |
1089 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1090 | { |
e571f594 | 1091 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1092 | ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f; |
1093 | ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f; | |
1094 | return 0; | |
1095 | } | |
1096 | ||
a5ce8890 | 1097 | #define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info |
1da177e4 | 1098 | |
e571f594 TI |
1099 | static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol, |
1100 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1101 | { |
e571f594 | 1102 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1103 | ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40); |
1104 | ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40); | |
1105 | return 0; | |
1106 | } | |
1107 | ||
e571f594 | 1108 | static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol) |
1da177e4 | 1109 | { |
e571f594 | 1110 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1111 | chip->master_volume = NULL; |
1112 | chip->master_switch = NULL; | |
1113 | chip->hw_volume = NULL; | |
1114 | chip->hw_switch = NULL; | |
1115 | } | |
1116 | ||
e571f594 | 1117 | static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg, |
1da177e4 LT |
1118 | unsigned char mask, unsigned char val) |
1119 | { | |
1120 | if (reg < 0xa0) | |
1121 | return snd_es1938_mixer_bits(chip, reg, mask, val); | |
1122 | else | |
1123 | return snd_es1938_bits(chip, reg, mask, val); | |
1124 | } | |
1125 | ||
e571f594 | 1126 | static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg) |
1da177e4 LT |
1127 | { |
1128 | if (reg < 0xa0) | |
1129 | return snd_es1938_mixer_read(chip, reg); | |
1130 | else | |
1131 | return snd_es1938_read(chip, reg); | |
1132 | } | |
1133 | ||
0b593972 TI |
1134 | #define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \ |
1135 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
1136 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\ | |
1137 | .name = xname, .index = xindex, \ | |
1138 | .info = snd_es1938_info_single, \ | |
1139 | .get = snd_es1938_get_single, .put = snd_es1938_put_single, \ | |
1140 | .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \ | |
1141 | .tlv = { .p = xtlv } } | |
1da177e4 LT |
1142 | #define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \ |
1143 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ | |
1144 | .info = snd_es1938_info_single, \ | |
1145 | .get = snd_es1938_get_single, .put = snd_es1938_put_single, \ | |
1146 | .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } | |
1147 | ||
e571f594 TI |
1148 | static int snd_es1938_info_single(struct snd_kcontrol *kcontrol, |
1149 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1150 | { |
1151 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1152 | ||
1153 | uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1154 | uinfo->count = 1; | |
1155 | uinfo->value.integer.min = 0; | |
1156 | uinfo->value.integer.max = mask; | |
1157 | return 0; | |
1158 | } | |
1159 | ||
e571f594 TI |
1160 | static int snd_es1938_get_single(struct snd_kcontrol *kcontrol, |
1161 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1162 | { |
e571f594 | 1163 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1164 | int reg = kcontrol->private_value & 0xff; |
1165 | int shift = (kcontrol->private_value >> 8) & 0xff; | |
1166 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1167 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
1168 | int val; | |
1169 | ||
1170 | val = snd_es1938_reg_read(chip, reg); | |
1171 | ucontrol->value.integer.value[0] = (val >> shift) & mask; | |
1172 | if (invert) | |
1173 | ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; | |
1174 | return 0; | |
1175 | } | |
1176 | ||
e571f594 TI |
1177 | static int snd_es1938_put_single(struct snd_kcontrol *kcontrol, |
1178 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1179 | { |
e571f594 | 1180 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1181 | int reg = kcontrol->private_value & 0xff; |
1182 | int shift = (kcontrol->private_value >> 8) & 0xff; | |
1183 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1184 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
1185 | unsigned char val; | |
1186 | ||
1187 | val = (ucontrol->value.integer.value[0] & mask); | |
1188 | if (invert) | |
1189 | val = mask - val; | |
1190 | mask <<= shift; | |
1191 | val <<= shift; | |
1192 | return snd_es1938_reg_bits(chip, reg, mask, val) != val; | |
1193 | } | |
1194 | ||
0b593972 TI |
1195 | #define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \ |
1196 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ | |
1197 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\ | |
1198 | .name = xname, .index = xindex, \ | |
1199 | .info = snd_es1938_info_double, \ | |
1200 | .get = snd_es1938_get_double, .put = snd_es1938_put_double, \ | |
1201 | .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \ | |
1202 | .tlv = { .p = xtlv } } | |
1da177e4 LT |
1203 | #define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \ |
1204 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ | |
1205 | .info = snd_es1938_info_double, \ | |
1206 | .get = snd_es1938_get_double, .put = snd_es1938_put_double, \ | |
1207 | .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) } | |
1208 | ||
e571f594 TI |
1209 | static int snd_es1938_info_double(struct snd_kcontrol *kcontrol, |
1210 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1211 | { |
1212 | int mask = (kcontrol->private_value >> 24) & 0xff; | |
1213 | ||
1214 | uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1215 | uinfo->count = 2; | |
1216 | uinfo->value.integer.min = 0; | |
1217 | uinfo->value.integer.max = mask; | |
1218 | return 0; | |
1219 | } | |
1220 | ||
e571f594 TI |
1221 | static int snd_es1938_get_double(struct snd_kcontrol *kcontrol, |
1222 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1223 | { |
e571f594 | 1224 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1225 | int left_reg = kcontrol->private_value & 0xff; |
1226 | int right_reg = (kcontrol->private_value >> 8) & 0xff; | |
1227 | int shift_left = (kcontrol->private_value >> 16) & 0x07; | |
1228 | int shift_right = (kcontrol->private_value >> 19) & 0x07; | |
1229 | int mask = (kcontrol->private_value >> 24) & 0xff; | |
1230 | int invert = (kcontrol->private_value >> 22) & 1; | |
1231 | unsigned char left, right; | |
1232 | ||
1233 | left = snd_es1938_reg_read(chip, left_reg); | |
1234 | if (left_reg != right_reg) | |
1235 | right = snd_es1938_reg_read(chip, right_reg); | |
1236 | else | |
1237 | right = left; | |
1238 | ucontrol->value.integer.value[0] = (left >> shift_left) & mask; | |
1239 | ucontrol->value.integer.value[1] = (right >> shift_right) & mask; | |
1240 | if (invert) { | |
1241 | ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; | |
1242 | ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1]; | |
1243 | } | |
1244 | return 0; | |
1245 | } | |
1246 | ||
e571f594 TI |
1247 | static int snd_es1938_put_double(struct snd_kcontrol *kcontrol, |
1248 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1249 | { |
e571f594 | 1250 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1251 | int left_reg = kcontrol->private_value & 0xff; |
1252 | int right_reg = (kcontrol->private_value >> 8) & 0xff; | |
1253 | int shift_left = (kcontrol->private_value >> 16) & 0x07; | |
1254 | int shift_right = (kcontrol->private_value >> 19) & 0x07; | |
1255 | int mask = (kcontrol->private_value >> 24) & 0xff; | |
1256 | int invert = (kcontrol->private_value >> 22) & 1; | |
1257 | int change; | |
1258 | unsigned char val1, val2, mask1, mask2; | |
1259 | ||
1260 | val1 = ucontrol->value.integer.value[0] & mask; | |
1261 | val2 = ucontrol->value.integer.value[1] & mask; | |
1262 | if (invert) { | |
1263 | val1 = mask - val1; | |
1264 | val2 = mask - val2; | |
1265 | } | |
1266 | val1 <<= shift_left; | |
1267 | val2 <<= shift_right; | |
1268 | mask1 = mask << shift_left; | |
1269 | mask2 = mask << shift_right; | |
1270 | if (left_reg != right_reg) { | |
1271 | change = 0; | |
1272 | if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1) | |
1273 | change = 1; | |
1274 | if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2) | |
1275 | change = 1; | |
1276 | } else { | |
1277 | change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2, | |
1278 | val1 | val2) != (val1 | val2)); | |
1279 | } | |
1280 | return change; | |
1281 | } | |
1282 | ||
093eef41 | 1283 | static const DECLARE_TLV_DB_RANGE(db_scale_master, |
0b593972 TI |
1284 | 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1), |
1285 | 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0), | |
093eef41 | 1286 | ); |
0b593972 | 1287 | |
093eef41 | 1288 | static const DECLARE_TLV_DB_RANGE(db_scale_audio1, |
0b593972 TI |
1289 | 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1), |
1290 | 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0), | |
093eef41 | 1291 | ); |
0b593972 | 1292 | |
093eef41 | 1293 | static const DECLARE_TLV_DB_RANGE(db_scale_audio2, |
0b593972 TI |
1294 | 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1), |
1295 | 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0), | |
093eef41 | 1296 | ); |
0b593972 | 1297 | |
093eef41 | 1298 | static const DECLARE_TLV_DB_RANGE(db_scale_mic, |
0b593972 TI |
1299 | 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1), |
1300 | 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0), | |
093eef41 | 1301 | ); |
0b593972 | 1302 | |
093eef41 | 1303 | static const DECLARE_TLV_DB_RANGE(db_scale_line, |
0b593972 TI |
1304 | 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1), |
1305 | 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0), | |
093eef41 | 1306 | ); |
0b593972 | 1307 | |
0cb29ea0 | 1308 | static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0); |
0b593972 | 1309 | |
b4e5e707 | 1310 | static const struct snd_kcontrol_new snd_es1938_controls[] = { |
0b593972 TI |
1311 | ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0, |
1312 | db_scale_master), | |
1da177e4 LT |
1313 | ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1), |
1314 | { | |
1315 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1316 | .name = "Hardware Master Playback Volume", | |
1317 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
1318 | .info = snd_es1938_info_hw_volume, | |
1319 | .get = snd_es1938_get_hw_volume, | |
1320 | }, | |
1321 | { | |
1322 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
dbf91dd4 | 1323 | .access = (SNDRV_CTL_ELEM_ACCESS_READ | |
0b593972 | 1324 | SNDRV_CTL_ELEM_ACCESS_TLV_READ), |
1da177e4 | 1325 | .name = "Hardware Master Playback Switch", |
1da177e4 LT |
1326 | .info = snd_es1938_info_hw_switch, |
1327 | .get = snd_es1938_get_hw_switch, | |
0b593972 | 1328 | .tlv = { .p = db_scale_master }, |
1da177e4 LT |
1329 | }, |
1330 | ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0), | |
0b593972 TI |
1331 | ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0, |
1332 | db_scale_line), | |
1da177e4 | 1333 | ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0), |
0b593972 TI |
1334 | ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0, |
1335 | db_scale_mic), | |
1336 | ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0, | |
1337 | db_scale_line), | |
1338 | ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0, | |
1339 | db_scale_mic), | |
1340 | ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0, | |
1341 | db_scale_line), | |
1342 | ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0, | |
1343 | db_scale_capture), | |
d355c82a | 1344 | ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0), |
1da177e4 LT |
1345 | ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0), |
1346 | ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1), | |
1347 | { | |
1348 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1349 | .name = "Capture Source", | |
1350 | .info = snd_es1938_info_mux, | |
1351 | .get = snd_es1938_get_mux, | |
1352 | .put = snd_es1938_put_mux, | |
1353 | }, | |
0b593972 TI |
1354 | ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0, |
1355 | db_scale_line), | |
1356 | ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0, | |
1357 | db_scale_audio2), | |
1358 | ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0, | |
1359 | db_scale_mic), | |
1360 | ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0, | |
1361 | db_scale_line), | |
1362 | ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0, | |
1363 | db_scale_mic), | |
1364 | ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0, | |
1365 | db_scale_line), | |
1366 | ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0, | |
1367 | db_scale_line), | |
1368 | ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0, | |
1369 | db_scale_line), | |
1370 | ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0, | |
1371 | db_scale_audio2), | |
1372 | ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0, | |
1373 | db_scale_audio1), | |
1da177e4 LT |
1374 | ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0), |
1375 | { | |
1376 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1377 | .name = "3D Control - Switch", | |
1378 | .info = snd_es1938_info_spatializer_enable, | |
1379 | .get = snd_es1938_get_spatializer_enable, | |
1380 | .put = snd_es1938_put_spatializer_enable, | |
1381 | }, | |
1382 | ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0) | |
1383 | }; | |
1384 | ||
1385 | ||
1386 | /* ---------------------------------------------------------------------------- */ | |
1387 | /* ---------------------------------------------------------------------------- */ | |
1388 | ||
1389 | /* | |
1390 | * initialize the chip - used by resume callback, too | |
1391 | */ | |
e571f594 | 1392 | static void snd_es1938_chip_init(struct es1938 *chip) |
1da177e4 LT |
1393 | { |
1394 | /* reset chip */ | |
1395 | snd_es1938_reset(chip); | |
1396 | ||
1397 | /* configure native mode */ | |
1398 | ||
1399 | /* enable bus master */ | |
1400 | pci_set_master(chip->pci); | |
1401 | ||
1402 | /* disable legacy audio */ | |
1403 | pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f); | |
1404 | ||
1405 | /* set DDMA base */ | |
1406 | pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1); | |
1407 | ||
1408 | /* set DMA/IRQ policy */ | |
1409 | pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0); | |
1410 | ||
1411 | /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/ | |
1412 | outb(0xf0, SLIO_REG(chip, IRQCONTROL)); | |
1413 | ||
1414 | /* reset DMA */ | |
1415 | outb(0, SLDM_REG(chip, DMACLEAR)); | |
1416 | } | |
1417 | ||
c7561cd8 | 1418 | #ifdef CONFIG_PM_SLEEP |
1da177e4 LT |
1419 | /* |
1420 | * PM support | |
1421 | */ | |
1422 | ||
96d5ebf2 | 1423 | static const unsigned char saved_regs[SAVED_REG_SIZE+1] = { |
1da177e4 LT |
1424 | 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38, |
1425 | 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68, | |
1426 | 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d, | |
1427 | 0xa8, 0xb4, | |
1428 | }; | |
1429 | ||
1430 | ||
68cb2b55 | 1431 | static int es1938_suspend(struct device *dev) |
1da177e4 | 1432 | { |
68cb2b55 | 1433 | struct snd_card *card = dev_get_drvdata(dev); |
b34a580e | 1434 | struct es1938 *chip = card->private_data; |
96d5ebf2 TI |
1435 | const unsigned char *s; |
1436 | unsigned char *d; | |
1da177e4 | 1437 | |
b34a580e | 1438 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); |
1da177e4 LT |
1439 | |
1440 | /* save mixer-related registers */ | |
1441 | for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) | |
1442 | *d = snd_es1938_reg_read(chip, *s); | |
1443 | ||
1444 | outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */ | |
30b35399 | 1445 | if (chip->irq >= 0) { |
b34a580e | 1446 | free_irq(chip->irq, chip); |
30b35399 | 1447 | chip->irq = -1; |
6b276e62 | 1448 | card->sync_irq = -1; |
30b35399 | 1449 | } |
1da177e4 LT |
1450 | return 0; |
1451 | } | |
1452 | ||
68cb2b55 | 1453 | static int es1938_resume(struct device *dev) |
1da177e4 | 1454 | { |
68cb2b55 TI |
1455 | struct pci_dev *pci = to_pci_dev(dev); |
1456 | struct snd_card *card = dev_get_drvdata(dev); | |
b34a580e | 1457 | struct es1938 *chip = card->private_data; |
96d5ebf2 TI |
1458 | const unsigned char *s; |
1459 | unsigned char *d; | |
1da177e4 | 1460 | |
30b35399 | 1461 | if (request_irq(pci->irq, snd_es1938_interrupt, |
934c2b6d | 1462 | IRQF_SHARED, KBUILD_MODNAME, chip)) { |
ebebecaa TI |
1463 | dev_err(dev, "unable to grab IRQ %d, disabling device\n", |
1464 | pci->irq); | |
30b35399 TI |
1465 | snd_card_disconnect(card); |
1466 | return -EIO; | |
1467 | } | |
b34a580e | 1468 | chip->irq = pci->irq; |
6b276e62 | 1469 | card->sync_irq = chip->irq; |
1da177e4 LT |
1470 | snd_es1938_chip_init(chip); |
1471 | ||
1472 | /* restore mixer-related registers */ | |
1473 | for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) { | |
1474 | if (*s < 0xa0) | |
1475 | snd_es1938_mixer_write(chip, *s, *d); | |
1476 | else | |
1477 | snd_es1938_write(chip, *s, *d); | |
1478 | } | |
1479 | ||
b34a580e | 1480 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); |
1da177e4 LT |
1481 | return 0; |
1482 | } | |
68cb2b55 TI |
1483 | |
1484 | static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume); | |
1485 | #define ES1938_PM_OPS &es1938_pm | |
1486 | #else | |
1487 | #define ES1938_PM_OPS NULL | |
c7561cd8 | 1488 | #endif /* CONFIG_PM_SLEEP */ |
1da177e4 LT |
1489 | |
1490 | #ifdef SUPPORT_JOYSTICK | |
e23e7a14 | 1491 | static int snd_es1938_create_gameport(struct es1938 *chip) |
1da177e4 LT |
1492 | { |
1493 | struct gameport *gp; | |
1494 | ||
1495 | chip->gameport = gp = gameport_allocate_port(); | |
1496 | if (!gp) { | |
ebebecaa TI |
1497 | dev_err(chip->card->dev, |
1498 | "cannot allocate memory for gameport\n"); | |
1da177e4 LT |
1499 | return -ENOMEM; |
1500 | } | |
1501 | ||
1502 | gameport_set_name(gp, "ES1938"); | |
1503 | gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); | |
1504 | gameport_set_dev_parent(gp, &chip->pci->dev); | |
1505 | gp->io = chip->game_port; | |
1506 | ||
1507 | gameport_register_port(gp); | |
1508 | ||
1509 | return 0; | |
1510 | } | |
1511 | ||
e571f594 | 1512 | static void snd_es1938_free_gameport(struct es1938 *chip) |
1da177e4 LT |
1513 | { |
1514 | if (chip->gameport) { | |
1515 | gameport_unregister_port(chip->gameport); | |
1516 | chip->gameport = NULL; | |
1517 | } | |
1518 | } | |
1519 | #else | |
e571f594 TI |
1520 | static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; } |
1521 | static inline void snd_es1938_free_gameport(struct es1938 *chip) { } | |
1da177e4 LT |
1522 | #endif /* SUPPORT_JOYSTICK */ |
1523 | ||
08e9d3ab | 1524 | static void snd_es1938_free(struct snd_card *card) |
1da177e4 | 1525 | { |
08e9d3ab TI |
1526 | struct es1938 *chip = card->private_data; |
1527 | ||
1da177e4 LT |
1528 | /* disable irqs */ |
1529 | outb(0x00, SLIO_REG(chip, IRQCONTROL)); | |
1530 | if (chip->rmidi) | |
1531 | snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); | |
1532 | ||
1533 | snd_es1938_free_gameport(chip); | |
1534 | ||
f000fd80 | 1535 | if (chip->irq >= 0) |
e571f594 | 1536 | free_irq(chip->irq, chip); |
1da177e4 LT |
1537 | } |
1538 | ||
e23e7a14 | 1539 | static int snd_es1938_create(struct snd_card *card, |
08e9d3ab | 1540 | struct pci_dev *pci) |
1da177e4 | 1541 | { |
08e9d3ab | 1542 | struct es1938 *chip = card->private_data; |
1da177e4 | 1543 | int err; |
1da177e4 LT |
1544 | |
1545 | /* enable PCI device */ | |
08e9d3ab | 1546 | err = pcim_enable_device(pci); |
3dc52815 | 1547 | if (err < 0) |
1da177e4 LT |
1548 | return err; |
1549 | /* check, if we can restrict PCI DMA transfers to 24 bits */ | |
669f65ea | 1550 | if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(24))) { |
ebebecaa TI |
1551 | dev_err(card->dev, |
1552 | "architecture does not support 24bit PCI busmaster DMA\n"); | |
1da177e4 LT |
1553 | return -ENXIO; |
1554 | } | |
1555 | ||
1da177e4 LT |
1556 | spin_lock_init(&chip->reg_lock); |
1557 | spin_lock_init(&chip->mixer_lock); | |
1558 | chip->card = card; | |
1559 | chip->pci = pci; | |
30b35399 | 1560 | chip->irq = -1; |
3dc52815 | 1561 | err = pci_request_regions(pci, "ESS Solo-1"); |
08e9d3ab | 1562 | if (err < 0) |
1da177e4 | 1563 | return err; |
1da177e4 LT |
1564 | chip->io_port = pci_resource_start(pci, 0); |
1565 | chip->sb_port = pci_resource_start(pci, 1); | |
1566 | chip->vc_port = pci_resource_start(pci, 2); | |
1567 | chip->mpu_port = pci_resource_start(pci, 3); | |
1568 | chip->game_port = pci_resource_start(pci, 4); | |
08e9d3ab | 1569 | /* still use non-managed irq handler as it's re-acquired at PM resume */ |
437a5a46 | 1570 | if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED, |
934c2b6d | 1571 | KBUILD_MODNAME, chip)) { |
ebebecaa | 1572 | dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); |
1da177e4 LT |
1573 | return -EBUSY; |
1574 | } | |
1575 | chip->irq = pci->irq; | |
6b276e62 | 1576 | card->sync_irq = chip->irq; |
08e9d3ab | 1577 | card->private_free = snd_es1938_free; |
ebebecaa TI |
1578 | dev_dbg(card->dev, |
1579 | "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n", | |
1da177e4 | 1580 | chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port); |
1da177e4 LT |
1581 | |
1582 | chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */ | |
1583 | ||
1584 | snd_es1938_chip_init(chip); | |
1da177e4 LT |
1585 | return 0; |
1586 | } | |
1587 | ||
1588 | /* -------------------------------------------------------------------- | |
1589 | * Interrupt handler | |
1590 | * -------------------------------------------------------------------- */ | |
7d12e780 | 1591 | static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id) |
1da177e4 | 1592 | { |
e571f594 | 1593 | struct es1938 *chip = dev_id; |
8068a581 PLB |
1594 | unsigned char status; |
1595 | __always_unused unsigned char audiostatus; | |
1da177e4 LT |
1596 | int handled = 0; |
1597 | ||
1598 | status = inb(SLIO_REG(chip, IRQCONTROL)); | |
1599 | #if 0 | |
ebebecaa TI |
1600 | dev_dbg(chip->card->dev, |
1601 | "Es1938debug - interrupt status: =0x%x\n", status); | |
1da177e4 LT |
1602 | #endif |
1603 | ||
1604 | /* AUDIO 1 */ | |
1605 | if (status & 0x10) { | |
1606 | #if 0 | |
ebebecaa | 1607 | dev_dbg(chip->card->dev, |
ee419653 | 1608 | "Es1938debug - AUDIO channel 1 interrupt\n"); |
ebebecaa | 1609 | dev_dbg(chip->card->dev, |
ee419653 | 1610 | "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n", |
e571f594 | 1611 | inw(SLDM_REG(chip, DMACOUNT))); |
ebebecaa | 1612 | dev_dbg(chip->card->dev, |
ee419653 | 1613 | "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n", |
e571f594 | 1614 | inl(SLDM_REG(chip, DMAADDR))); |
ebebecaa | 1615 | dev_dbg(chip->card->dev, |
ee419653 | 1616 | "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n", |
e571f594 | 1617 | inl(SLDM_REG(chip, DMASTATUS))); |
1da177e4 LT |
1618 | #endif |
1619 | /* clear irq */ | |
1620 | handled = 1; | |
1621 | audiostatus = inb(SLSB_REG(chip, STATUS)); | |
1622 | if (chip->active & ADC1) | |
1623 | snd_pcm_period_elapsed(chip->capture_substream); | |
1624 | else if (chip->active & DAC1) | |
1625 | snd_pcm_period_elapsed(chip->playback2_substream); | |
1626 | } | |
1627 | ||
1628 | /* AUDIO 2 */ | |
1629 | if (status & 0x20) { | |
1630 | #if 0 | |
ebebecaa | 1631 | dev_dbg(chip->card->dev, |
ee419653 | 1632 | "Es1938debug - AUDIO channel 2 interrupt\n"); |
ebebecaa | 1633 | dev_dbg(chip->card->dev, |
ee419653 | 1634 | "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n", |
e571f594 | 1635 | inw(SLIO_REG(chip, AUDIO2DMACOUNT))); |
ebebecaa | 1636 | dev_dbg(chip->card->dev, |
ee419653 | 1637 | "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n", |
e571f594 | 1638 | inl(SLIO_REG(chip, AUDIO2DMAADDR))); |
1da177e4 LT |
1639 | |
1640 | #endif | |
1641 | /* clear irq */ | |
1642 | handled = 1; | |
1643 | snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0); | |
1644 | if (chip->active & DAC2) | |
1645 | snd_pcm_period_elapsed(chip->playback1_substream); | |
1646 | } | |
1647 | ||
1648 | /* Hardware volume */ | |
1649 | if (status & 0x40) { | |
1650 | int split = snd_es1938_mixer_read(chip, 0x64) & 0x80; | |
1651 | handled = 1; | |
1652 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id); | |
1653 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id); | |
1654 | if (!split) { | |
e571f594 TI |
1655 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, |
1656 | &chip->master_switch->id); | |
1657 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
1658 | &chip->master_volume->id); | |
1da177e4 LT |
1659 | } |
1660 | /* ack interrupt */ | |
1661 | snd_es1938_mixer_write(chip, 0x66, 0x00); | |
1662 | } | |
1663 | ||
1664 | /* MPU401 */ | |
1665 | if (status & 0x80) { | |
1666 | // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received. | |
1667 | // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well! | |
1668 | // andreas@flying-snail.de | |
1669 | // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */ | |
1670 | if (chip->rmidi) { | |
1671 | handled = 1; | |
7d12e780 | 1672 | snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data); |
1da177e4 LT |
1673 | } |
1674 | } | |
1675 | return IRQ_RETVAL(handled); | |
1676 | } | |
1677 | ||
1678 | #define ES1938_DMA_SIZE 64 | |
1679 | ||
e23e7a14 | 1680 | static int snd_es1938_mixer(struct es1938 *chip) |
1da177e4 | 1681 | { |
e571f594 | 1682 | struct snd_card *card; |
1da177e4 LT |
1683 | unsigned int idx; |
1684 | int err; | |
1685 | ||
1686 | card = chip->card; | |
1687 | ||
1688 | strcpy(card->mixername, "ESS Solo-1"); | |
1689 | ||
1690 | for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) { | |
e571f594 | 1691 | struct snd_kcontrol *kctl; |
1da177e4 LT |
1692 | kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip); |
1693 | switch (idx) { | |
1694 | case 0: | |
1695 | chip->master_volume = kctl; | |
1696 | kctl->private_free = snd_es1938_hwv_free; | |
1697 | break; | |
1698 | case 1: | |
1699 | chip->master_switch = kctl; | |
1700 | kctl->private_free = snd_es1938_hwv_free; | |
1701 | break; | |
1702 | case 2: | |
1703 | chip->hw_volume = kctl; | |
1704 | kctl->private_free = snd_es1938_hwv_free; | |
1705 | break; | |
1706 | case 3: | |
1707 | chip->hw_switch = kctl; | |
1708 | kctl->private_free = snd_es1938_hwv_free; | |
1709 | break; | |
1710 | } | |
3dc52815 TI |
1711 | err = snd_ctl_add(card, kctl); |
1712 | if (err < 0) | |
1da177e4 LT |
1713 | return err; |
1714 | } | |
1715 | return 0; | |
1716 | } | |
1717 | ||
1718 | ||
bc226285 TI |
1719 | static int __snd_es1938_probe(struct pci_dev *pci, |
1720 | const struct pci_device_id *pci_id) | |
1da177e4 LT |
1721 | { |
1722 | static int dev; | |
e571f594 TI |
1723 | struct snd_card *card; |
1724 | struct es1938 *chip; | |
1725 | struct snd_opl3 *opl3; | |
1da177e4 LT |
1726 | int idx, err; |
1727 | ||
1728 | if (dev >= SNDRV_CARDS) | |
1729 | return -ENODEV; | |
1730 | if (!enable[dev]) { | |
1731 | dev++; | |
1732 | return -ENOENT; | |
1733 | } | |
1734 | ||
08e9d3ab TI |
1735 | err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, |
1736 | sizeof(*chip), &card); | |
e58de7ba TI |
1737 | if (err < 0) |
1738 | return err; | |
08e9d3ab TI |
1739 | chip = card->private_data; |
1740 | ||
1741 | for (idx = 0; idx < 5; idx++) | |
1da177e4 | 1742 | if (pci_resource_start(pci, idx) == 0 || |
08e9d3ab TI |
1743 | !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) |
1744 | return -ENODEV; | |
1745 | ||
1746 | err = snd_es1938_create(card, pci); | |
1747 | if (err < 0) | |
1da177e4 | 1748 | return err; |
1da177e4 LT |
1749 | |
1750 | strcpy(card->driver, "ES1938"); | |
1751 | strcpy(card->shortname, "ESS ES1938 (Solo-1)"); | |
1752 | sprintf(card->longname, "%s rev %i, irq %i", | |
1753 | card->shortname, | |
1754 | chip->revision, | |
1755 | chip->irq); | |
1756 | ||
3dc52815 | 1757 | err = snd_es1938_new_pcm(chip, 0); |
08e9d3ab | 1758 | if (err < 0) |
1da177e4 | 1759 | return err; |
3dc52815 | 1760 | err = snd_es1938_mixer(chip); |
08e9d3ab | 1761 | if (err < 0) |
1da177e4 | 1762 | return err; |
1da177e4 LT |
1763 | if (snd_opl3_create(card, |
1764 | SLSB_REG(chip, FMLOWADDR), | |
1765 | SLSB_REG(chip, FMHIGHADDR), | |
1766 | OPL3_HW_OPL3, 1, &opl3) < 0) { | |
ebebecaa | 1767 | dev_err(card->dev, "OPL3 not detected at 0x%lx\n", |
1da177e4 LT |
1768 | SLSB_REG(chip, FMLOWADDR)); |
1769 | } else { | |
3dc52815 | 1770 | err = snd_opl3_timer_new(opl3, 0, 1); |
08e9d3ab | 1771 | if (err < 0) |
1da177e4 | 1772 | return err; |
3dc52815 | 1773 | err = snd_opl3_hwdep_new(opl3, 0, 1, NULL); |
08e9d3ab | 1774 | if (err < 0) |
1da177e4 | 1775 | return err; |
1da177e4 LT |
1776 | } |
1777 | if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401, | |
dba8b469 CL |
1778 | chip->mpu_port, |
1779 | MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK, | |
1780 | -1, &chip->rmidi) < 0) { | |
ebebecaa | 1781 | dev_err(card->dev, "unable to initialize MPU-401\n"); |
1da177e4 LT |
1782 | } else { |
1783 | // this line is vital for MIDI interrupt handling on ess-solo1 | |
1784 | // andreas@flying-snail.de | |
1785 | snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40); | |
1786 | } | |
1787 | ||
1788 | snd_es1938_create_gameport(chip); | |
1789 | ||
3dc52815 | 1790 | err = snd_card_register(card); |
08e9d3ab | 1791 | if (err < 0) |
1da177e4 | 1792 | return err; |
1da177e4 LT |
1793 | |
1794 | pci_set_drvdata(pci, card); | |
1795 | dev++; | |
1796 | return 0; | |
1797 | } | |
1798 | ||
bc226285 TI |
1799 | static int snd_es1938_probe(struct pci_dev *pci, |
1800 | const struct pci_device_id *pci_id) | |
1801 | { | |
1802 | return snd_card_free_on_error(&pci->dev, __snd_es1938_probe(pci, pci_id)); | |
1803 | } | |
1804 | ||
e9f66d9b | 1805 | static struct pci_driver es1938_driver = { |
3733e424 | 1806 | .name = KBUILD_MODNAME, |
1da177e4 LT |
1807 | .id_table = snd_es1938_ids, |
1808 | .probe = snd_es1938_probe, | |
68cb2b55 TI |
1809 | .driver = { |
1810 | .pm = ES1938_PM_OPS, | |
1811 | }, | |
1da177e4 LT |
1812 | }; |
1813 | ||
e9f66d9b | 1814 | module_pci_driver(es1938_driver); |