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net/mlx4_core: Adjust port number in qp_attach wrapper when detaching
[linux-2.6-block.git] / sound / pci / es1938.c
CommitLineData
1da177e4
LT		 1/*
2 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
3 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
c1017a4c 4 * Jaroslav Kysela <perex@perex.cz>,
1da177e4
LT		 5 * Thomas Sailer <sailer@ife.ee.ethz.ch>,
6 * Abramo Bagnara <abramo@alsa-project.org>,
7 * Markus Gruber <gruber@eikon.tum.de>
8 *
9 * Rewritten from sonicvibes.c source.
10 *
11 * TODO:
12 * Rewrite better spinlocks
13 *
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 *
29 */
30
31/*
32 NOTES:
33 - Capture data is written unaligned starting from dma_base + 1 so I need to
34 disable mmap and to add a copy callback.
35 - After several cycle of the following:
36 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
37 a "playback write error (DMA or IRQ trouble?)" may happen.
38 This is due to playback interrupts not generated.
39 I suspect a timing issue.
40 - Sometimes the interrupt handler is invoked wrongly during playback.
41 This generates some harmless "Unexpected hw_pointer: wrong interrupt
42 acknowledge".
43 I've seen that using small period sizes.
44 Reproducible with:
45 mpg123 test.mp3 &
46 hdparm -t -T /dev/hda
47*/
48
49
1da177e4
LT		 50#include <linux/init.h>
51#include <linux/interrupt.h>
52#include <linux/pci.h>
53#include <linux/slab.h>
54#include <linux/gameport.h>
65a77217 55#include <linux/module.h>
1da177e4 56#include <linux/delay.h>
910638ae 57#include <linux/dma-mapping.h>
1da177e4
LT		 58#include <sound/core.h>
59#include <sound/control.h>
60#include <sound/pcm.h>
61#include <sound/opl3.h>
62#include <sound/mpu401.h>
63#include <sound/initval.h>
0b593972 64#include <sound/tlv.h>
1da177e4
LT		 65
66#include <asm/io.h>
67
68MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
69MODULE_DESCRIPTION("ESS Solo-1");
70MODULE_LICENSE("GPL");
71MODULE_SUPPORTED_DEVICE("{{ESS,ES1938},"
72 "{ESS,ES1946},"
73 "{ESS,ES1969},"
74 "{TerraTec,128i PCI}}");
75
76#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
77#define SUPPORT_JOYSTICK 1
78#endif
79
1da177e4
LT		 80static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
81static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 82static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
1da177e4
LT		 83
84module_param_array(index, int, NULL, 0444);
85MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
86module_param_array(id, charp, NULL, 0444);
87MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
88module_param_array(enable, bool, NULL, 0444);
89MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
90
91#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
92
93#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
94
95#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
96
97#define SL_PCI_LEGACYCONTROL 0x40
98#define SL_PCI_CONFIG 0x50
99#define SL_PCI_DDMACONTROL 0x60
100
101#define ESSIO_REG_AUDIO2DMAADDR 0
102#define ESSIO_REG_AUDIO2DMACOUNT 4
103#define ESSIO_REG_AUDIO2MODE 6
104#define ESSIO_REG_IRQCONTROL 7
105
106#define ESSDM_REG_DMAADDR 0x00
107#define ESSDM_REG_DMACOUNT 0x04
108#define ESSDM_REG_DMACOMMAND 0x08
109#define ESSDM_REG_DMASTATUS 0x08
110#define ESSDM_REG_DMAMODE 0x0b
111#define ESSDM_REG_DMACLEAR 0x0d
112#define ESSDM_REG_DMAMASK 0x0f
113
114#define ESSSB_REG_FMLOWADDR 0x00
115#define ESSSB_REG_FMHIGHADDR 0x02
116#define ESSSB_REG_MIXERADDR 0x04
117#define ESSSB_REG_MIXERDATA 0x05
118
119#define ESSSB_IREG_AUDIO1 0x14
120#define ESSSB_IREG_MICMIX 0x1a
121#define ESSSB_IREG_RECSRC 0x1c
122#define ESSSB_IREG_MASTER 0x32
123#define ESSSB_IREG_FM 0x36
124#define ESSSB_IREG_AUXACD 0x38
125#define ESSSB_IREG_AUXB 0x3a
126#define ESSSB_IREG_PCSPEAKER 0x3c
127#define ESSSB_IREG_LINE 0x3e
128#define ESSSB_IREG_SPATCONTROL 0x50
129#define ESSSB_IREG_SPATLEVEL 0x52
130#define ESSSB_IREG_MASTER_LEFT 0x60
131#define ESSSB_IREG_MASTER_RIGHT 0x62
132#define ESSSB_IREG_MPU401CONTROL 0x64
133#define ESSSB_IREG_MICMIXRECORD 0x68
134#define ESSSB_IREG_AUDIO2RECORD 0x69
135#define ESSSB_IREG_AUXACDRECORD 0x6a
136#define ESSSB_IREG_FMRECORD 0x6b
137#define ESSSB_IREG_AUXBRECORD 0x6c
138#define ESSSB_IREG_MONO 0x6d
139#define ESSSB_IREG_LINERECORD 0x6e
140#define ESSSB_IREG_MONORECORD 0x6f
141#define ESSSB_IREG_AUDIO2SAMPLE 0x70
142#define ESSSB_IREG_AUDIO2MODE 0x71
143#define ESSSB_IREG_AUDIO2FILTER 0x72
144#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
145#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
146#define ESSSB_IREG_AUDIO2CONTROL1 0x78
147#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
148#define ESSSB_IREG_AUDIO2 0x7c
149
150#define ESSSB_REG_RESET 0x06
151
152#define ESSSB_REG_READDATA 0x0a
153#define ESSSB_REG_WRITEDATA 0x0c
154#define ESSSB_REG_READSTATUS 0x0c
155
156#define ESSSB_REG_STATUS 0x0e
157
158#define ESS_CMD_EXTSAMPLERATE 0xa1
159#define ESS_CMD_FILTERDIV 0xa2
160#define ESS_CMD_DMACNTRELOADL 0xa4
161#define ESS_CMD_DMACNTRELOADH 0xa5
162#define ESS_CMD_ANALOGCONTROL 0xa8
163#define ESS_CMD_IRQCONTROL 0xb1
164#define ESS_CMD_DRQCONTROL 0xb2
165#define ESS_CMD_RECLEVEL 0xb4
166#define ESS_CMD_SETFORMAT 0xb6
167#define ESS_CMD_SETFORMAT2 0xb7
168#define ESS_CMD_DMACONTROL 0xb8
169#define ESS_CMD_DMATYPE 0xb9
170#define ESS_CMD_OFFSETLEFT 0xba
171#define ESS_CMD_OFFSETRIGHT 0xbb
172#define ESS_CMD_READREG 0xc0
173#define ESS_CMD_ENABLEEXT 0xc6
174#define ESS_CMD_PAUSEDMA 0xd0
175#define ESS_CMD_ENABLEAUDIO1 0xd1
176#define ESS_CMD_STOPAUDIO1 0xd3
177#define ESS_CMD_AUDIO1STATUS 0xd8
178#define ESS_CMD_CONTDMA 0xd4
179#define ESS_CMD_TESTIRQ 0xf2
180
181#define ESS_RECSRC_MIC 0
182#define ESS_RECSRC_AUXACD 2
183#define ESS_RECSRC_AUXB 5
184#define ESS_RECSRC_LINE 6
185#define ESS_RECSRC_NONE 7
186
187#define DAC1 0x01
188#define ADC1 0x02
189#define DAC2 0x04
190
191/*
192
193 */
194
1da177e4
LT		 195#define SAVED_REG_SIZE 32 /* max. number of registers to save */
196
e571f594 197struct es1938 {
1da177e4
LT		 198 int irq;
199
200 unsigned long io_port;
201 unsigned long sb_port;
202 unsigned long vc_port;
203 unsigned long mpu_port;
204 unsigned long game_port;
205 unsigned long ddma_port;
206
207 unsigned char irqmask;
208 unsigned char revision;
209
e571f594
TI		 210 struct snd_kcontrol *hw_volume;
211 struct snd_kcontrol *hw_switch;
212 struct snd_kcontrol *master_volume;
213 struct snd_kcontrol *master_switch;
1da177e4
LT		 214
215 struct pci_dev *pci;
e571f594
TI		 216 struct snd_card *card;
217 struct snd_pcm *pcm;
218 struct snd_pcm_substream *capture_substream;
219 struct snd_pcm_substream *playback1_substream;
220 struct snd_pcm_substream *playback2_substream;
221 struct snd_rawmidi *rmidi;
1da177e4
LT		 222
223 unsigned int dma1_size;
224 unsigned int dma2_size;
225 unsigned int dma1_start;
226 unsigned int dma2_start;
227 unsigned int dma1_shift;
228 unsigned int dma2_shift;
19e2e3c3 229 unsigned int last_capture_dmaaddr;
1da177e4
LT		 230 unsigned int active;
231
232 spinlock_t reg_lock;
233 spinlock_t mixer_lock;
e571f594 234 struct snd_info_entry *proc_entry;
1da177e4
LT		 235
236#ifdef SUPPORT_JOYSTICK
237 struct gameport *gameport;
238#endif
c7561cd8 239#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 240 unsigned char saved_regs[SAVED_REG_SIZE];
241#endif
242};
243
7d12e780 244static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
1da177e4 245
cebe41d4 246static DEFINE_PCI_DEVICE_TABLE(snd_es1938_ids) = {
28d27aae 247 { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
1da177e4
LT		 248 { 0, }
249};
250
251MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
252
253#define RESET_LOOP_TIMEOUT 0x10000
254#define WRITE_LOOP_TIMEOUT 0x10000
255#define GET_LOOP_TIMEOUT 0x01000
256
1da177e4
LT		 257/* -----------------------------------------------------------------
258 * Write to a mixer register
259 * -----------------------------------------------------------------*/
e571f594 260static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
1da177e4
LT		 261{
262 unsigned long flags;
263 spin_lock_irqsave(&chip->mixer_lock, flags);
264 outb(reg, SLSB_REG(chip, MIXERADDR));
265 outb(val, SLSB_REG(chip, MIXERDATA));
266 spin_unlock_irqrestore(&chip->mixer_lock, flags);
ebebecaa 267 dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
1da177e4
LT		 268}
269
270/* -----------------------------------------------------------------
271 * Read from a mixer register
272 * -----------------------------------------------------------------*/
e571f594 273static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 274{
275 int data;
276 unsigned long flags;
277 spin_lock_irqsave(&chip->mixer_lock, flags);
278 outb(reg, SLSB_REG(chip, MIXERADDR));
279 data = inb(SLSB_REG(chip, MIXERDATA));
280 spin_unlock_irqrestore(&chip->mixer_lock, flags);
ebebecaa 281 dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
1da177e4
LT		 282 return data;
283}
284
285/* -----------------------------------------------------------------
286 * Write to some bits of a mixer register (return old value)
287 * -----------------------------------------------------------------*/
e571f594
TI		 288static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
289 unsigned char mask, unsigned char val)
1da177e4
LT		 290{
291 unsigned long flags;
292 unsigned char old, new, oval;
293 spin_lock_irqsave(&chip->mixer_lock, flags);
294 outb(reg, SLSB_REG(chip, MIXERADDR));
295 old = inb(SLSB_REG(chip, MIXERDATA));
296 oval = old & mask;
297 if (val != oval) {
298 new = (old & ~mask) | (val & mask);
299 outb(new, SLSB_REG(chip, MIXERDATA));
ebebecaa
TI		 300 dev_dbg(chip->card->dev,
301 "Mixer reg %02x was %02x, set to %02x\n",
99b359ba 302 reg, old, new);
1da177e4
LT		 303 }
304 spin_unlock_irqrestore(&chip->mixer_lock, flags);
305 return oval;
306}
307
308/* -----------------------------------------------------------------
309 * Write command to Controller Registers
310 * -----------------------------------------------------------------*/
e571f594 311static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
1da177e4
LT		 312{
313 int i;
314 unsigned char v;
315 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
316 if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
317 outb(cmd, SLSB_REG(chip, WRITEDATA));
318 return;
319 }
320 }
ebebecaa
TI		 321 dev_err(chip->card->dev,
322 "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
1da177e4
LT		 323}
324
325/* -----------------------------------------------------------------
326 * Read the Read Data Buffer
327 * -----------------------------------------------------------------*/
e571f594 328static int snd_es1938_get_byte(struct es1938 *chip)
1da177e4
LT		 329{
330 int i;
331 unsigned char v;
332 for (i = GET_LOOP_TIMEOUT; i; i--)
333 if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
334 return inb(SLSB_REG(chip, READDATA));
ebebecaa 335 dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
1da177e4
LT		 336 return -ENODEV;
337}
338
339/* -----------------------------------------------------------------
340 * Write value cmd register
341 * -----------------------------------------------------------------*/
e571f594 342static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
1da177e4
LT		 343{
344 unsigned long flags;
345 spin_lock_irqsave(&chip->reg_lock, flags);
346 snd_es1938_write_cmd(chip, reg);
347 snd_es1938_write_cmd(chip, val);
348 spin_unlock_irqrestore(&chip->reg_lock, flags);
ebebecaa 349 dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
1da177e4
LT		 350}
351
352/* -----------------------------------------------------------------
353 * Read data from cmd register and return it
354 * -----------------------------------------------------------------*/
e571f594 355static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 356{
357 unsigned char val;
358 unsigned long flags;
359 spin_lock_irqsave(&chip->reg_lock, flags);
360 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
361 snd_es1938_write_cmd(chip, reg);
362 val = snd_es1938_get_byte(chip);
363 spin_unlock_irqrestore(&chip->reg_lock, flags);
ebebecaa 364 dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
1da177e4
LT		 365 return val;
366}
367
368/* -----------------------------------------------------------------
369 * Write data to cmd register and return old value
370 * -----------------------------------------------------------------*/
e571f594
TI		 371static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
372 unsigned char val)
1da177e4
LT		 373{
374 unsigned long flags;
375 unsigned char old, new, oval;
376 spin_lock_irqsave(&chip->reg_lock, flags);
377 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
378 snd_es1938_write_cmd(chip, reg);
379 old = snd_es1938_get_byte(chip);
380 oval = old & mask;
381 if (val != oval) {
382 snd_es1938_write_cmd(chip, reg);
383 new = (old & ~mask) | (val & mask);
384 snd_es1938_write_cmd(chip, new);
ebebecaa 385 dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
99b359ba 386 reg, old, new);
1da177e4
LT		 387 }
388 spin_unlock_irqrestore(&chip->reg_lock, flags);
389 return oval;
390}
391
392/* --------------------------------------------------------------------
393 * Reset the chip
394 * --------------------------------------------------------------------*/
e571f594 395static void snd_es1938_reset(struct es1938 *chip)
1da177e4
LT		 396{
397 int i;
398
399 outb(3, SLSB_REG(chip, RESET));
400 inb(SLSB_REG(chip, RESET));
401 outb(0, SLSB_REG(chip, RESET));
402 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
403 if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
404 if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
405 goto __next;
406 }
407 }
ebebecaa 408 dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
1da177e4
LT		 409
410 __next:
411 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
412
413 /* Demand transfer DMA: 4 bytes per DMA request */
414 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
415
416 /* Change behaviour of register A1
417 4x oversampling
418 2nd channel DAC asynchronous */
419 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
420 /* enable/select DMA channel and IRQ channel */
421 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
422 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
423 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
424 /* Set spatializer parameters to recommended values */
425 snd_es1938_mixer_write(chip, 0x54, 0x8f);
426 snd_es1938_mixer_write(chip, 0x56, 0x95);
427 snd_es1938_mixer_write(chip, 0x58, 0x94);
428 snd_es1938_mixer_write(chip, 0x5a, 0x80);
429}
430
431/* --------------------------------------------------------------------
432 * Reset the FIFOs
433 * --------------------------------------------------------------------*/
e571f594 434static void snd_es1938_reset_fifo(struct es1938 *chip)
1da177e4
LT		 435{
436 outb(2, SLSB_REG(chip, RESET));
437 outb(0, SLSB_REG(chip, RESET));
438}
439
e571f594 440static struct snd_ratnum clocks[2] = {
1da177e4
LT		 441 {
442 .num = 793800,
443 .den_min = 1,
444 .den_max = 128,
445 .den_step = 1,
446 },
447 {
448 .num = 768000,
449 .den_min = 1,
450 .den_max = 128,
451 .den_step = 1,
452 }
453};
454
e571f594 455static struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
1da177e4
LT		 456 .nrats = 2,
457 .rats = clocks,
458};
459
460
e571f594
TI		 461static void snd_es1938_rate_set(struct es1938 *chip,
462 struct snd_pcm_substream *substream,
1da177e4
LT		 463 int mode)
464{
465 unsigned int bits, div0;
e571f594 466 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 467 if (runtime->rate_num == clocks[0].num)
468 bits = 128 - runtime->rate_den;
469 else
470 bits = 256 - runtime->rate_den;
471
472 /* set filter register */
473 div0 = 256 - 7160000*20/(8*82*runtime->rate);
474
475 if (mode == DAC2) {
476 snd_es1938_mixer_write(chip, 0x70, bits);
477 snd_es1938_mixer_write(chip, 0x72, div0);
478 } else {
479 snd_es1938_write(chip, 0xA1, bits);
480 snd_es1938_write(chip, 0xA2, div0);
481 }
482}
483
484/* --------------------------------------------------------------------
485 * Configure Solo1 builtin DMA Controller
486 * --------------------------------------------------------------------*/
487
e571f594 488static void snd_es1938_playback1_setdma(struct es1938 *chip)
1da177e4
LT		 489{
490 outb(0x00, SLIO_REG(chip, AUDIO2MODE));
491 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
492 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
493 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
494}
495
e571f594 496static void snd_es1938_playback2_setdma(struct es1938 *chip)
1da177e4
LT		 497{
498 /* Enable DMA controller */
499 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
500 /* 1. Master reset */
501 outb(0, SLDM_REG(chip, DMACLEAR));
502 /* 2. Mask DMA */
503 outb(1, SLDM_REG(chip, DMAMASK));
504 outb(0x18, SLDM_REG(chip, DMAMODE));
505 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
506 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
507 /* 3. Unmask DMA */
508 outb(0, SLDM_REG(chip, DMAMASK));
509}
510
e571f594 511static void snd_es1938_capture_setdma(struct es1938 *chip)
1da177e4
LT		 512{
513 /* Enable DMA controller */
514 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
515 /* 1. Master reset */
516 outb(0, SLDM_REG(chip, DMACLEAR));
517 /* 2. Mask DMA */
518 outb(1, SLDM_REG(chip, DMAMASK));
519 outb(0x14, SLDM_REG(chip, DMAMODE));
520 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
19e2e3c3 521 chip->last_capture_dmaaddr = chip->dma1_start;
1da177e4
LT		 522 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
523 /* 3. Unmask DMA */
524 outb(0, SLDM_REG(chip, DMAMASK));
525}
526
527/* ----------------------------------------------------------------------
528 *
529 * *** PCM part ***
530 */
531
e571f594 532static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 533 int cmd)
534{
e571f594 535 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 536 int val;
537 switch (cmd) {
538 case SNDRV_PCM_TRIGGER_START:
93b9f426 539 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 540 val = 0x0f;
541 chip->active |= ADC1;
542 break;
543 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 544 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 545 val = 0x00;
546 chip->active &= ~ADC1;
547 break;
548 default:
549 return -EINVAL;
550 }
551 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
552 return 0;
553}
554
e571f594 555static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 556 int cmd)
557{
e571f594 558 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 559 switch (cmd) {
560 case SNDRV_PCM_TRIGGER_START:
93b9f426 561 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 562 /* According to the documentation this should be:
563 0x13 but that value may randomly swap stereo channels */
564 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
565 udelay(10);
566 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
567 /* This two stage init gives the FIFO -> DAC connection time to
568 * settle before first data from DMA flows in. This should ensure
569 * no swapping of stereo channels. Report a bug if otherwise :-) */
570 outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
571 chip->active |= DAC2;
572 break;
573 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 574 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 575 outb(0, SLIO_REG(chip, AUDIO2MODE));
576 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
577 chip->active &= ~DAC2;
578 break;
579 default:
580 return -EINVAL;
581 }
582 return 0;
583}
584
e571f594 585static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 586 int cmd)
587{
e571f594 588 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 589 int val;
590 switch (cmd) {
591 case SNDRV_PCM_TRIGGER_START:
93b9f426 592 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 593 val = 5;
594 chip->active |= DAC1;
595 break;
596 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 597 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 598 val = 0;
599 chip->active &= ~DAC1;
600 break;
601 default:
602 return -EINVAL;
603 }
604 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
605 return 0;
606}
607
e571f594 608static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 609 int cmd)
610{
611 switch (substream->number) {
612 case 0:
613 return snd_es1938_playback1_trigger(substream, cmd);
614 case 1:
615 return snd_es1938_playback2_trigger(substream, cmd);
616 }
617 snd_BUG();
618 return -EINVAL;
619}
620
621/* --------------------------------------------------------------------
622 * First channel for Extended Mode Audio 1 ADC Operation
623 * --------------------------------------------------------------------*/
e571f594 624static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 625{
e571f594
TI		 626 struct es1938 *chip = snd_pcm_substream_chip(substream);
627 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 628 int u, is8, mono;
629 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
630 unsigned int count = snd_pcm_lib_period_bytes(substream);
631
632 chip->dma1_size = size;
633 chip->dma1_start = runtime->dma_addr;
634
635 mono = (runtime->channels > 1) ? 0 : 1;
636 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
637 u = snd_pcm_format_unsigned(runtime->format);
638
639 chip->dma1_shift = 2 - mono - is8;
640
641 snd_es1938_reset_fifo(chip);
642
643 /* program type */
644 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
645
646 /* set clock and counters */
647 snd_es1938_rate_set(chip, substream, ADC1);
648
649 count = 0x10000 - count;
650 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
651 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
652
653 /* initialize and configure ADC */
654 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
655 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
656 (u ? 0x00 : 0x20) |
657 (is8 ? 0x00 : 0x04) |
658 (mono ? 0x40 : 0x08));
659
660 // snd_es1938_reset_fifo(chip);
661
662 /* 11. configure system interrupt controller and DMA controller */
663 snd_es1938_capture_setdma(chip);
664
665 return 0;
666}
667
668
669/* ------------------------------------------------------------------------------
670 * Second Audio channel DAC Operation
671 * ------------------------------------------------------------------------------*/
e571f594 672static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
1da177e4 673{
e571f594
TI		 674 struct es1938 *chip = snd_pcm_substream_chip(substream);
675 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 676 int u, is8, mono;
677 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
678 unsigned int count = snd_pcm_lib_period_bytes(substream);
679
680 chip->dma2_size = size;
681 chip->dma2_start = runtime->dma_addr;
682
683 mono = (runtime->channels > 1) ? 0 : 1;
684 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
685 u = snd_pcm_format_unsigned(runtime->format);
686
687 chip->dma2_shift = 2 - mono - is8;
688
689 snd_es1938_reset_fifo(chip);
690
691 /* set clock and counters */
692 snd_es1938_rate_set(chip, substream, DAC2);
693
694 count >>= 1;
695 count = 0x10000 - count;
696 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
697 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
698
699 /* initialize and configure Audio 2 DAC */
e571f594
TI		 700 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
701 (mono ? 0 : 2) | (is8 ? 0 : 1));
1da177e4
LT		 702
703 /* program DMA */
704 snd_es1938_playback1_setdma(chip);
705
706 return 0;
707}
708
e571f594 709static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
1da177e4 710{
e571f594
TI		 711 struct es1938 *chip = snd_pcm_substream_chip(substream);
712 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 713 int u, is8, mono;
714 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
715 unsigned int count = snd_pcm_lib_period_bytes(substream);
716
717 chip->dma1_size = size;
718 chip->dma1_start = runtime->dma_addr;
719
720 mono = (runtime->channels > 1) ? 0 : 1;
721 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
722 u = snd_pcm_format_unsigned(runtime->format);
723
724 chip->dma1_shift = 2 - mono - is8;
725
726 count = 0x10000 - count;
727
728 /* reset */
729 snd_es1938_reset_fifo(chip);
730
731 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
732
733 /* set clock and counters */
734 snd_es1938_rate_set(chip, substream, DAC1);
735 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
736 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
737
738 /* initialized and configure DAC */
739 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
740 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
741 snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
742 0x90 | (mono ? 0x40 : 0x08) |
743 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
744
745 /* program DMA */
746 snd_es1938_playback2_setdma(chip);
747
748 return 0;
749}
750
e571f594 751static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
1da177e4
LT		 752{
753 switch (substream->number) {
754 case 0:
755 return snd_es1938_playback1_prepare(substream);
756 case 1:
757 return snd_es1938_playback2_prepare(substream);
758 }
759 snd_BUG();
760 return -EINVAL;
761}
762
19e2e3c3
HL		 763/* during the incrementing of dma counters the DMA register reads sometimes
764 returns garbage. To ensure a valid hw pointer, the following checks which
765 should be very unlikely to fail are used:
766 - is the current DMA address in the valid DMA range ?
767 - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
768 One can argue this could differ by one byte depending on which register is
769 updated first, so the implementation below allows for that.
770*/
e571f594 771static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 772{
e571f594 773 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4 774 size_t ptr;
19e2e3c3 775#if 0
1da177e4 776 size_t old, new;
1da177e4
LT		 777 /* This stuff is *needed*, don't ask why - AB */
778 old = inw(SLDM_REG(chip, DMACOUNT));
779 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
780 old = new;
781 ptr = chip->dma1_size - 1 - new;
782#else
19e2e3c3
HL		 783 size_t count;
784 unsigned int diff;
785
786 ptr = inl(SLDM_REG(chip, DMAADDR));
787 count = inw(SLDM_REG(chip, DMACOUNT));
788 diff = chip->dma1_start + chip->dma1_size - ptr - count;
789
790 if (diff > 3 || ptr < chip->dma1_start
791 || ptr >= chip->dma1_start+chip->dma1_size)
792 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
793 else
794 chip->last_capture_dmaaddr = ptr; /* good, remember it */
795
796 ptr -= chip->dma1_start;
1da177e4
LT		 797#endif
798 return ptr >> chip->dma1_shift;
799}
800
e571f594 801static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
1da177e4 802{
e571f594 803 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 804 size_t ptr;
805#if 1
806 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
807#else
808 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
809#endif
810 return ptr >> chip->dma2_shift;
811}
812
e571f594 813static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
1da177e4 814{
e571f594 815 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 816 size_t ptr;
817 size_t old, new;
818#if 1
819 /* This stuff is *needed*, don't ask why - AB */
820 old = inw(SLDM_REG(chip, DMACOUNT));
821 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
822 old = new;
823 ptr = chip->dma1_size - 1 - new;
824#else
825 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
826#endif
827 return ptr >> chip->dma1_shift;
828}
829
e571f594 830static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
1da177e4
LT		 831{
832 switch (substream->number) {
833 case 0:
834 return snd_es1938_playback1_pointer(substream);
835 case 1:
836 return snd_es1938_playback2_pointer(substream);
837 }
838 snd_BUG();
839 return -EINVAL;
840}
841
e571f594 842static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
1da177e4
LT		 843 int channel,
844 snd_pcm_uframes_t pos,
845 void __user *dst,
846 snd_pcm_uframes_t count)
847{
e571f594
TI		 848 struct snd_pcm_runtime *runtime = substream->runtime;
849 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 850 pos <<= chip->dma1_shift;
851 count <<= chip->dma1_shift;
da3cec35
TI		 852 if (snd_BUG_ON(pos + count > chip->dma1_size))
853 return -EINVAL;
1da177e4
LT		 854 if (pos + count < chip->dma1_size) {
855 if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
856 return -EFAULT;
857 } else {
858 if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
859 return -EFAULT;
860 if (put_user(runtime->dma_area[0], ((unsigned char __user *)dst) + count - 1))
861 return -EFAULT;
862 }
863 return 0;
864}
865
866/*
867 * buffer management
868 */
e571f594
TI		 869static int snd_es1938_pcm_hw_params(struct snd_pcm_substream *substream,
870 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 871
872{
873 int err;
874
875 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
876 return err;
877 return 0;
878}
879
e571f594 880static int snd_es1938_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 881{
882 return snd_pcm_lib_free_pages(substream);
883}
884
885/* ----------------------------------------------------------------------
886 * Audio1 Capture (ADC)
887 * ----------------------------------------------------------------------*/
e571f594 888static struct snd_pcm_hardware snd_es1938_capture =
1da177e4
LT		 889{
890 .info = (SNDRV_PCM_INFO_INTERLEAVED |
891 SNDRV_PCM_INFO_BLOCK_TRANSFER),
e571f594
TI		 892 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
893 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
1da177e4
LT		 894 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
895 .rate_min = 6000,
896 .rate_max = 48000,
897 .channels_min = 1,
898 .channels_max = 2,
899 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
900 .period_bytes_min = 64,
901 .period_bytes_max = 0x8000,
902 .periods_min = 1,
903 .periods_max = 1024,
904 .fifo_size = 256,
905};
906
907/* -----------------------------------------------------------------------
908 * Audio2 Playback (DAC)
909 * -----------------------------------------------------------------------*/
e571f594 910static struct snd_pcm_hardware snd_es1938_playback =
1da177e4
LT		 911{
912 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
913 SNDRV_PCM_INFO_BLOCK_TRANSFER |
914 SNDRV_PCM_INFO_MMAP_VALID),
e571f594
TI		 915 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
916 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
1da177e4
LT		 917 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
918 .rate_min = 6000,
919 .rate_max = 48000,
920 .channels_min = 1,
921 .channels_max = 2,
922 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
923 .period_bytes_min = 64,
924 .period_bytes_max = 0x8000,
925 .periods_min = 1,
926 .periods_max = 1024,
927 .fifo_size = 256,
928};
929
e571f594 930static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
1da177e4 931{
e571f594
TI		 932 struct es1938 *chip = snd_pcm_substream_chip(substream);
933 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 934
935 if (chip->playback2_substream)
936 return -EAGAIN;
937 chip->capture_substream = substream;
938 runtime->hw = snd_es1938_capture;
939 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
940 &hw_constraints_clocks);
941 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
942 return 0;
943}
944
e571f594 945static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
1da177e4 946{
e571f594
TI		 947 struct es1938 *chip = snd_pcm_substream_chip(substream);
948 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 949
950 switch (substream->number) {
951 case 0:
952 chip->playback1_substream = substream;
953 break;
954 case 1:
955 if (chip->capture_substream)
956 return -EAGAIN;
957 chip->playback2_substream = substream;
958 break;
959 default:
960 snd_BUG();
961 return -EINVAL;
962 }
963 runtime->hw = snd_es1938_playback;
964 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
965 &hw_constraints_clocks);
966 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
967 return 0;
968}
969
e571f594 970static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
1da177e4 971{
e571f594 972 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 973
974 chip->capture_substream = NULL;
975 return 0;
976}
977
e571f594 978static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
1da177e4 979{
e571f594 980 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 981
982 switch (substream->number) {
983 case 0:
984 chip->playback1_substream = NULL;
985 break;
986 case 1:
987 chip->playback2_substream = NULL;
988 break;
989 default:
990 snd_BUG();
991 return -EINVAL;
992 }
993 return 0;
994}
995
e571f594 996static struct snd_pcm_ops snd_es1938_playback_ops = {
1da177e4
LT		 997 .open = snd_es1938_playback_open,
998 .close = snd_es1938_playback_close,
999 .ioctl = snd_pcm_lib_ioctl,
1000 .hw_params = snd_es1938_pcm_hw_params,
1001 .hw_free = snd_es1938_pcm_hw_free,
1002 .prepare = snd_es1938_playback_prepare,
1003 .trigger = snd_es1938_playback_trigger,
1004 .pointer = snd_es1938_playback_pointer,
1005};
1006
e571f594 1007static struct snd_pcm_ops snd_es1938_capture_ops = {
1da177e4
LT		 1008 .open = snd_es1938_capture_open,
1009 .close = snd_es1938_capture_close,
1010 .ioctl = snd_pcm_lib_ioctl,
1011 .hw_params = snd_es1938_pcm_hw_params,
1012 .hw_free = snd_es1938_pcm_hw_free,
1013 .prepare = snd_es1938_capture_prepare,
1014 .trigger = snd_es1938_capture_trigger,
1015 .pointer = snd_es1938_capture_pointer,
1016 .copy = snd_es1938_capture_copy,
1017};
1018
e23e7a14 1019static int snd_es1938_new_pcm(struct es1938 *chip, int device)
1da177e4 1020{
e571f594 1021 struct snd_pcm *pcm;
1da177e4
LT		 1022 int err;
1023
1024 if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
1025 return err;
1026 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
1027 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
1028
1029 pcm->private_data = chip;
1da177e4
LT		 1030 pcm->info_flags = 0;
1031 strcpy(pcm->name, "ESS Solo-1");
1032
1033 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1034 snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
1035
1036 chip->pcm = pcm;
1037 return 0;
1038}
1039
1040/* -------------------------------------------------------------------
1041 *
1042 * *** Mixer part ***
1043 */
1044
e571f594
TI		 1045static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1046 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1047{
1048 static char *texts[8] = {
1049 "Mic", "Mic Master", "CD", "AOUT",
1050 "Mic1", "Mix", "Line", "Master"
1051 };
1052
1053 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1054 uinfo->count = 1;
1055 uinfo->value.enumerated.items = 8;
1056 if (uinfo->value.enumerated.item > 7)
1057 uinfo->value.enumerated.item = 7;
1058 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1059 return 0;
1060}
1061
e571f594
TI		 1062static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1063 struct snd_ctl_elem_value *ucontrol)
1da177e4 1064{
e571f594 1065 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1066 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1067 return 0;
1068}
1069
e571f594
TI		 1070static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1071 struct snd_ctl_elem_value *ucontrol)
1da177e4 1072{
e571f594 1073 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1074 unsigned char val = ucontrol->value.enumerated.item[0];
1075
1076 if (val > 7)
1077 return -EINVAL;
1078 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1079}
1080
a5ce8890 1081#define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
1da177e4 1082
e571f594
TI		 1083static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1084 struct snd_ctl_elem_value *ucontrol)
1da177e4 1085{
e571f594 1086 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1087 unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1088 ucontrol->value.integer.value[0] = !!(val & 8);
1089 return 0;
1090}
1091
e571f594
TI		 1092static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1093 struct snd_ctl_elem_value *ucontrol)
1da177e4 1094{
e571f594 1095 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1096 unsigned char oval, nval;
1097 int change;
1098 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1099 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1100 change = nval != oval;
1101 if (change) {
1102 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1103 snd_es1938_mixer_write(chip, 0x50, nval);
1104 }
1105 return change;
1106}
1107
e571f594
TI		 1108static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1109 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1110{
1111 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1112 uinfo->count = 2;
1113 uinfo->value.integer.min = 0;
1114 uinfo->value.integer.max = 63;
1115 return 0;
1116}
1117
e571f594
TI		 1118static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1119 struct snd_ctl_elem_value *ucontrol)
1da177e4 1120{
e571f594 1121 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1122 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1123 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1124 return 0;
1125}
1126
a5ce8890 1127#define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
1da177e4 1128
e571f594
TI		 1129static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1130 struct snd_ctl_elem_value *ucontrol)
1da177e4 1131{
e571f594 1132 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1133 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1134 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1135 return 0;
1136}
1137
e571f594 1138static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1da177e4 1139{
e571f594 1140 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1141 chip->master_volume = NULL;
1142 chip->master_switch = NULL;
1143 chip->hw_volume = NULL;
1144 chip->hw_switch = NULL;
1145}
1146
e571f594 1147static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1da177e4
LT		 1148 unsigned char mask, unsigned char val)
1149{
1150 if (reg < 0xa0)
1151 return snd_es1938_mixer_bits(chip, reg, mask, val);
1152 else
1153 return snd_es1938_bits(chip, reg, mask, val);
1154}
1155
e571f594 1156static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 1157{
1158 if (reg < 0xa0)
1159 return snd_es1938_mixer_read(chip, reg);
1160 else
1161 return snd_es1938_read(chip, reg);
1162}
1163
0b593972
TI		 1164#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1165{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1166 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1167 .name = xname, .index = xindex, \
1168 .info = snd_es1938_info_single, \
1169 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1170 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1171 .tlv = { .p = xtlv } }
1da177e4
LT		 1172#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1173{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1174 .info = snd_es1938_info_single, \
1175 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1176 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1177
e571f594
TI		 1178static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1179 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1180{
1181 int mask = (kcontrol->private_value >> 16) & 0xff;
1182
1183 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1184 uinfo->count = 1;
1185 uinfo->value.integer.min = 0;
1186 uinfo->value.integer.max = mask;
1187 return 0;
1188}
1189
e571f594
TI		 1190static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1191 struct snd_ctl_elem_value *ucontrol)
1da177e4 1192{
e571f594 1193 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1194 int reg = kcontrol->private_value & 0xff;
1195 int shift = (kcontrol->private_value >> 8) & 0xff;
1196 int mask = (kcontrol->private_value >> 16) & 0xff;
1197 int invert = (kcontrol->private_value >> 24) & 0xff;
1198 int val;
1199
1200 val = snd_es1938_reg_read(chip, reg);
1201 ucontrol->value.integer.value[0] = (val >> shift) & mask;
1202 if (invert)
1203 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1204 return 0;
1205}
1206
e571f594
TI		 1207static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1208 struct snd_ctl_elem_value *ucontrol)
1da177e4 1209{
e571f594 1210 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1211 int reg = kcontrol->private_value & 0xff;
1212 int shift = (kcontrol->private_value >> 8) & 0xff;
1213 int mask = (kcontrol->private_value >> 16) & 0xff;
1214 int invert = (kcontrol->private_value >> 24) & 0xff;
1215 unsigned char val;
1216
1217 val = (ucontrol->value.integer.value[0] & mask);
1218 if (invert)
1219 val = mask - val;
1220 mask <<= shift;
1221 val <<= shift;
1222 return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1223}
1224
0b593972
TI		 1225#define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1226{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1227 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1228 .name = xname, .index = xindex, \
1229 .info = snd_es1938_info_double, \
1230 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1231 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1232 .tlv = { .p = xtlv } }
1da177e4
LT		 1233#define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1234{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1235 .info = snd_es1938_info_double, \
1236 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1237 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1238
e571f594
TI		 1239static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1240 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1241{
1242 int mask = (kcontrol->private_value >> 24) & 0xff;
1243
1244 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1245 uinfo->count = 2;
1246 uinfo->value.integer.min = 0;
1247 uinfo->value.integer.max = mask;
1248 return 0;
1249}
1250
e571f594
TI		 1251static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1252 struct snd_ctl_elem_value *ucontrol)
1da177e4 1253{
e571f594 1254 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1255 int left_reg = kcontrol->private_value & 0xff;
1256 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1257 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1258 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1259 int mask = (kcontrol->private_value >> 24) & 0xff;
1260 int invert = (kcontrol->private_value >> 22) & 1;
1261 unsigned char left, right;
1262
1263 left = snd_es1938_reg_read(chip, left_reg);
1264 if (left_reg != right_reg)
1265 right = snd_es1938_reg_read(chip, right_reg);
1266 else
1267 right = left;
1268 ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1269 ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1270 if (invert) {
1271 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1272 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1273 }
1274 return 0;
1275}
1276
e571f594
TI		 1277static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1278 struct snd_ctl_elem_value *ucontrol)
1da177e4 1279{
e571f594 1280 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1281 int left_reg = kcontrol->private_value & 0xff;
1282 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1283 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1284 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1285 int mask = (kcontrol->private_value >> 24) & 0xff;
1286 int invert = (kcontrol->private_value >> 22) & 1;
1287 int change;
1288 unsigned char val1, val2, mask1, mask2;
1289
1290 val1 = ucontrol->value.integer.value[0] & mask;
1291 val2 = ucontrol->value.integer.value[1] & mask;
1292 if (invert) {
1293 val1 = mask - val1;
1294 val2 = mask - val2;
1295 }
1296 val1 <<= shift_left;
1297 val2 <<= shift_right;
1298 mask1 = mask << shift_left;
1299 mask2 = mask << shift_right;
1300 if (left_reg != right_reg) {
1301 change = 0;
1302 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1303 change = 1;
1304 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1305 change = 1;
1306 } else {
1307 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1308 val1 | val2) != (val1 | val2));
1309 }
1310 return change;
1311}
1312
093eef41 1313static const DECLARE_TLV_DB_RANGE(db_scale_master,
0b593972
TI		 1314 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1315 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
093eef41 1316);
0b593972 1317
093eef41 1318static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
0b593972
TI		 1319 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1320 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
093eef41 1321);
0b593972 1322
093eef41 1323static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
0b593972
TI		 1324 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1325 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
093eef41 1326);
0b593972 1327
093eef41 1328static const DECLARE_TLV_DB_RANGE(db_scale_mic,
0b593972
TI		 1329 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1330 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
093eef41 1331);
0b593972 1332
093eef41 1333static const DECLARE_TLV_DB_RANGE(db_scale_line,
0b593972
TI		 1334 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1335 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
093eef41 1336);
0b593972 1337
0cb29ea0 1338static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
0b593972 1339
e571f594 1340static struct snd_kcontrol_new snd_es1938_controls[] = {
0b593972
TI		 1341ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1342 db_scale_master),
1da177e4
LT		 1343ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1344{
1345 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1346 .name = "Hardware Master Playback Volume",
1347 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1348 .info = snd_es1938_info_hw_volume,
1349 .get = snd_es1938_get_hw_volume,
1350},
1351{
1352 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
dbf91dd4 1353 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
0b593972 1354 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4 1355 .name = "Hardware Master Playback Switch",
1da177e4
LT		 1356 .info = snd_es1938_info_hw_switch,
1357 .get = snd_es1938_get_hw_switch,
0b593972 1358 .tlv = { .p = db_scale_master },
1da177e4
LT		 1359},
1360ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
0b593972
TI		 1361ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1362 db_scale_line),
1da177e4 1363ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
0b593972
TI		 1364ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1365 db_scale_mic),
1366ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1367 db_scale_line),
1368ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1369 db_scale_mic),
1370ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1371 db_scale_line),
1372ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1373 db_scale_capture),
d355c82a 1374ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
1da177e4
LT		 1375ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1376ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1377{
1378 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1379 .name = "Capture Source",
1380 .info = snd_es1938_info_mux,
1381 .get = snd_es1938_get_mux,
1382 .put = snd_es1938_put_mux,
1383},
0b593972
TI		 1384ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1385 db_scale_line),
1386ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1387 db_scale_audio2),
1388ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1389 db_scale_mic),
1390ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1391 db_scale_line),
1392ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1393 db_scale_mic),
1394ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1395 db_scale_line),
1396ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1397 db_scale_line),
1398ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1399 db_scale_line),
1400ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1401 db_scale_audio2),
1402ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1403 db_scale_audio1),
1da177e4
LT		 1404ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1405{
1406 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1407 .name = "3D Control - Switch",
1408 .info = snd_es1938_info_spatializer_enable,
1409 .get = snd_es1938_get_spatializer_enable,
1410 .put = snd_es1938_put_spatializer_enable,
1411},
1412ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1413};
1414
1415
1416/* ---------------------------------------------------------------------------- */
1417/* ---------------------------------------------------------------------------- */
1418
1419/*
1420 * initialize the chip - used by resume callback, too
1421 */
e571f594 1422static void snd_es1938_chip_init(struct es1938 *chip)
1da177e4
LT		 1423{
1424 /* reset chip */
1425 snd_es1938_reset(chip);
1426
1427 /* configure native mode */
1428
1429 /* enable bus master */
1430 pci_set_master(chip->pci);
1431
1432 /* disable legacy audio */
1433 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1434
1435 /* set DDMA base */
1436 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1437
1438 /* set DMA/IRQ policy */
1439 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1440
1441 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1442 outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1443
1444 /* reset DMA */
1445 outb(0, SLDM_REG(chip, DMACLEAR));
1446}
1447
c7561cd8 1448#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 1449/*
1450 * PM support
1451 */
1452
1453static unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1454 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1455 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1456 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1457 0xa8, 0xb4,
1458};
1459
1460
68cb2b55 1461static int es1938_suspend(struct device *dev)
1da177e4 1462{
68cb2b55
TI		 1463 struct pci_dev *pci = to_pci_dev(dev);
1464 struct snd_card *card = dev_get_drvdata(dev);
b34a580e 1465 struct es1938 *chip = card->private_data;
1da177e4
LT		 1466 unsigned char *s, *d;
1467
b34a580e 1468 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT		 1469 snd_pcm_suspend_all(chip->pcm);
1470
1471 /* save mixer-related registers */
1472 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1473 *d = snd_es1938_reg_read(chip, *s);
1474
1475 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
30b35399 1476 if (chip->irq >= 0) {
b34a580e 1477 free_irq(chip->irq, chip);
30b35399
TI		 1478 chip->irq = -1;
1479 }
b34a580e
TI		 1480 pci_disable_device(pci);
1481 pci_save_state(pci);
68cb2b55 1482 pci_set_power_state(pci, PCI_D3hot);
1da177e4
LT		 1483 return 0;
1484}
1485
68cb2b55 1486static int es1938_resume(struct device *dev)
1da177e4 1487{
68cb2b55
TI		 1488 struct pci_dev *pci = to_pci_dev(dev);
1489 struct snd_card *card = dev_get_drvdata(dev);
b34a580e 1490 struct es1938 *chip = card->private_data;
1da177e4
LT		 1491 unsigned char *s, *d;
1492
30b35399 1493 pci_set_power_state(pci, PCI_D0);
b34a580e 1494 pci_restore_state(pci);
30b35399 1495 if (pci_enable_device(pci) < 0) {
ebebecaa 1496 dev_err(dev, "pci_enable_device failed, disabling device\n");
30b35399
TI		 1497 snd_card_disconnect(card);
1498 return -EIO;
1499 }
1500
1501 if (request_irq(pci->irq, snd_es1938_interrupt,
934c2b6d 1502 IRQF_SHARED, KBUILD_MODNAME, chip)) {
ebebecaa
TI		 1503 dev_err(dev, "unable to grab IRQ %d, disabling device\n",
1504 pci->irq);
30b35399
TI		 1505 snd_card_disconnect(card);
1506 return -EIO;
1507 }
b34a580e 1508 chip->irq = pci->irq;
1da177e4
LT		 1509 snd_es1938_chip_init(chip);
1510
1511 /* restore mixer-related registers */
1512 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1513 if (*s < 0xa0)
1514 snd_es1938_mixer_write(chip, *s, *d);
1515 else
1516 snd_es1938_write(chip, *s, *d);
1517 }
1518
b34a580e 1519 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 1520 return 0;
1521}
68cb2b55
TI		 1522
1523static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
1524#define ES1938_PM_OPS &es1938_pm
1525#else
1526#define ES1938_PM_OPS NULL
c7561cd8 1527#endif /* CONFIG_PM_SLEEP */
1da177e4
LT		 1528
1529#ifdef SUPPORT_JOYSTICK
e23e7a14 1530static int snd_es1938_create_gameport(struct es1938 *chip)
1da177e4
LT		 1531{
1532 struct gameport *gp;
1533
1534 chip->gameport = gp = gameport_allocate_port();
1535 if (!gp) {
ebebecaa
TI		 1536 dev_err(chip->card->dev,
1537 "cannot allocate memory for gameport\n");
1da177e4
LT		 1538 return -ENOMEM;
1539 }
1540
1541 gameport_set_name(gp, "ES1938");
1542 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1543 gameport_set_dev_parent(gp, &chip->pci->dev);
1544 gp->io = chip->game_port;
1545
1546 gameport_register_port(gp);
1547
1548 return 0;
1549}
1550
e571f594 1551static void snd_es1938_free_gameport(struct es1938 *chip)
1da177e4
LT		 1552{
1553 if (chip->gameport) {
1554 gameport_unregister_port(chip->gameport);
1555 chip->gameport = NULL;
1556 }
1557}
1558#else
e571f594
TI		 1559static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1560static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1da177e4
LT		 1561#endif /* SUPPORT_JOYSTICK */
1562
e571f594 1563static int snd_es1938_free(struct es1938 *chip)
1da177e4
LT		 1564{
1565 /* disable irqs */
1566 outb(0x00, SLIO_REG(chip, IRQCONTROL));
1567 if (chip->rmidi)
1568 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1569
1570 snd_es1938_free_gameport(chip);
1571
f000fd80 1572 if (chip->irq >= 0)
e571f594 1573 free_irq(chip->irq, chip);
1da177e4
LT		 1574 pci_release_regions(chip->pci);
1575 pci_disable_device(chip->pci);
1576 kfree(chip);
1577 return 0;
1578}
1579
e571f594 1580static int snd_es1938_dev_free(struct snd_device *device)
1da177e4 1581{
e571f594 1582 struct es1938 *chip = device->device_data;
1da177e4
LT		 1583 return snd_es1938_free(chip);
1584}
1585
e23e7a14
BP		 1586static int snd_es1938_create(struct snd_card *card,
1587 struct pci_dev *pci,
1588 struct es1938 **rchip)
1da177e4 1589{
e571f594 1590 struct es1938 *chip;
1da177e4 1591 int err;
e571f594 1592 static struct snd_device_ops ops = {
1da177e4
LT		 1593 .dev_free = snd_es1938_dev_free,
1594 };
1595
1596 *rchip = NULL;
1597
1598 /* enable PCI device */
1599 if ((err = pci_enable_device(pci)) < 0)
1600 return err;
1601 /* check, if we can restrict PCI DMA transfers to 24 bits */
2f4f27d4
YH		 1602 if (pci_set_dma_mask(pci, DMA_BIT_MASK(24)) < 0 ||
1603 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(24)) < 0) {
ebebecaa
TI		 1604 dev_err(card->dev,
1605 "architecture does not support 24bit PCI busmaster DMA\n");
1da177e4
LT		 1606 pci_disable_device(pci);
1607 return -ENXIO;
1608 }
1609
e560d8d8 1610 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 1611 if (chip == NULL) {
1612 pci_disable_device(pci);
1613 return -ENOMEM;
1614 }
1615 spin_lock_init(&chip->reg_lock);
1616 spin_lock_init(&chip->mixer_lock);
1617 chip->card = card;
1618 chip->pci = pci;
30b35399 1619 chip->irq = -1;
1da177e4
LT		 1620 if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) {
1621 kfree(chip);
1622 pci_disable_device(pci);
1623 return err;
1624 }
1625 chip->io_port = pci_resource_start(pci, 0);
1626 chip->sb_port = pci_resource_start(pci, 1);
1627 chip->vc_port = pci_resource_start(pci, 2);
1628 chip->mpu_port = pci_resource_start(pci, 3);
1629 chip->game_port = pci_resource_start(pci, 4);
437a5a46 1630 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
934c2b6d 1631 KBUILD_MODNAME, chip)) {
ebebecaa 1632 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 1633 snd_es1938_free(chip);
1634 return -EBUSY;
1635 }
1636 chip->irq = pci->irq;
ebebecaa
TI		 1637 dev_dbg(card->dev,
1638 "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1da177e4 1639 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1da177e4
LT		 1640
1641 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
1642
1643 snd_es1938_chip_init(chip);
1644
1da177e4
LT		 1645 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1646 snd_es1938_free(chip);
1647 return err;
1648 }
1649
1da177e4
LT		 1650 *rchip = chip;
1651 return 0;
1652}
1653
1654/* --------------------------------------------------------------------
1655 * Interrupt handler
1656 * -------------------------------------------------------------------- */
7d12e780 1657static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1da177e4 1658{
e571f594 1659 struct es1938 *chip = dev_id;
1da177e4
LT		 1660 unsigned char status, audiostatus;
1661 int handled = 0;
1662
1663 status = inb(SLIO_REG(chip, IRQCONTROL));
1664#if 0
ebebecaa
TI		 1665 dev_dbg(chip->card->dev,
1666 "Es1938debug - interrupt status: =0x%x\n", status);
1da177e4
LT		 1667#endif
1668
1669 /* AUDIO 1 */
1670 if (status & 0x10) {
1671#if 0
ebebecaa 1672 dev_dbg(chip->card->dev,
ee419653 1673 "Es1938debug - AUDIO channel 1 interrupt\n");
ebebecaa 1674 dev_dbg(chip->card->dev,
ee419653 1675 "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
e571f594 1676 inw(SLDM_REG(chip, DMACOUNT)));
ebebecaa 1677 dev_dbg(chip->card->dev,
ee419653 1678 "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
e571f594 1679 inl(SLDM_REG(chip, DMAADDR)));
ebebecaa 1680 dev_dbg(chip->card->dev,
ee419653 1681 "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
e571f594 1682 inl(SLDM_REG(chip, DMASTATUS)));
1da177e4
LT		 1683#endif
1684 /* clear irq */
1685 handled = 1;
1686 audiostatus = inb(SLSB_REG(chip, STATUS));
1687 if (chip->active & ADC1)
1688 snd_pcm_period_elapsed(chip->capture_substream);
1689 else if (chip->active & DAC1)
1690 snd_pcm_period_elapsed(chip->playback2_substream);
1691 }
1692
1693 /* AUDIO 2 */
1694 if (status & 0x20) {
1695#if 0
ebebecaa 1696 dev_dbg(chip->card->dev,
ee419653 1697 "Es1938debug - AUDIO channel 2 interrupt\n");
ebebecaa 1698 dev_dbg(chip->card->dev,
ee419653 1699 "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
e571f594 1700 inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
ebebecaa 1701 dev_dbg(chip->card->dev,
ee419653 1702 "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
e571f594 1703 inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1da177e4
LT		 1704
1705#endif
1706 /* clear irq */
1707 handled = 1;
1708 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1709 if (chip->active & DAC2)
1710 snd_pcm_period_elapsed(chip->playback1_substream);
1711 }
1712
1713 /* Hardware volume */
1714 if (status & 0x40) {
1715 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1716 handled = 1;
1717 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1718 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1719 if (!split) {
e571f594
TI		 1720 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1721 &chip->master_switch->id);
1722 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1723 &chip->master_volume->id);
1da177e4
LT		 1724 }
1725 /* ack interrupt */
1726 snd_es1938_mixer_write(chip, 0x66, 0x00);
1727 }
1728
1729 /* MPU401 */
1730 if (status & 0x80) {
1731 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1732 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1733 // andreas@flying-snail.de
1734 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1735 if (chip->rmidi) {
1736 handled = 1;
7d12e780 1737 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT		 1738 }
1739 }
1740 return IRQ_RETVAL(handled);
1741}
1742
1743#define ES1938_DMA_SIZE 64
1744
e23e7a14 1745static int snd_es1938_mixer(struct es1938 *chip)
1da177e4 1746{
e571f594 1747 struct snd_card *card;
1da177e4
LT		 1748 unsigned int idx;
1749 int err;
1750
1751 card = chip->card;
1752
1753 strcpy(card->mixername, "ESS Solo-1");
1754
1755 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
e571f594 1756 struct snd_kcontrol *kctl;
1da177e4
LT		 1757 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1758 switch (idx) {
1759 case 0:
1760 chip->master_volume = kctl;
1761 kctl->private_free = snd_es1938_hwv_free;
1762 break;
1763 case 1:
1764 chip->master_switch = kctl;
1765 kctl->private_free = snd_es1938_hwv_free;
1766 break;
1767 case 2:
1768 chip->hw_volume = kctl;
1769 kctl->private_free = snd_es1938_hwv_free;
1770 break;
1771 case 3:
1772 chip->hw_switch = kctl;
1773 kctl->private_free = snd_es1938_hwv_free;
1774 break;
1775 }
1776 if ((err = snd_ctl_add(card, kctl)) < 0)
1777 return err;
1778 }
1779 return 0;
1780}
1781
1782
e23e7a14
BP		 1783static int snd_es1938_probe(struct pci_dev *pci,
1784 const struct pci_device_id *pci_id)
1da177e4
LT		 1785{
1786 static int dev;
e571f594
TI		 1787 struct snd_card *card;
1788 struct es1938 *chip;
1789 struct snd_opl3 *opl3;
1da177e4
LT		 1790 int idx, err;
1791
1792 if (dev >= SNDRV_CARDS)
1793 return -ENODEV;
1794 if (!enable[dev]) {
1795 dev++;
1796 return -ENOENT;
1797 }
1798
60c5772b
TI		 1799 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1800 0, &card);
e58de7ba
TI		 1801 if (err < 0)
1802 return err;
1da177e4
LT		 1803 for (idx = 0; idx < 5; idx++) {
1804 if (pci_resource_start(pci, idx) == 0 ||
1805 !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
1806 snd_card_free(card);
1807 return -ENODEV;
1808 }
1809 }
1810 if ((err = snd_es1938_create(card, pci, &chip)) < 0) {
1811 snd_card_free(card);
1812 return err;
1813 }
b34a580e 1814 card->private_data = chip;
1da177e4
LT		 1815
1816 strcpy(card->driver, "ES1938");
1817 strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1818 sprintf(card->longname, "%s rev %i, irq %i",
1819 card->shortname,
1820 chip->revision,
1821 chip->irq);
1822
1823 if ((err = snd_es1938_new_pcm(chip, 0)) < 0) {
1824 snd_card_free(card);
1825 return err;
1826 }
1827 if ((err = snd_es1938_mixer(chip)) < 0) {
1828 snd_card_free(card);
1829 return err;
1830 }
1831 if (snd_opl3_create(card,
1832 SLSB_REG(chip, FMLOWADDR),
1833 SLSB_REG(chip, FMHIGHADDR),
1834 OPL3_HW_OPL3, 1, &opl3) < 0) {
ebebecaa 1835 dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
1da177e4
LT		 1836 SLSB_REG(chip, FMLOWADDR));
1837 } else {
1838 if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) {
1839 snd_card_free(card);
1840 return err;
1841 }
1842 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1843 snd_card_free(card);
1844 return err;
1845 }
1846 }
1847 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
dba8b469
CL		 1848 chip->mpu_port,
1849 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
1850 -1, &chip->rmidi) < 0) {
ebebecaa 1851 dev_err(card->dev, "unable to initialize MPU-401\n");
1da177e4
LT		 1852 } else {
1853 // this line is vital for MIDI interrupt handling on ess-solo1
1854 // andreas@flying-snail.de
1855 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1856 }
1857
1858 snd_es1938_create_gameport(chip);
1859
1860 if ((err = snd_card_register(card)) < 0) {
1861 snd_card_free(card);
1862 return err;
1863 }
1864
1865 pci_set_drvdata(pci, card);
1866 dev++;
1867 return 0;
1868}
1869
e23e7a14 1870static void snd_es1938_remove(struct pci_dev *pci)
1da177e4
LT		 1871{
1872 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT		 1873}
1874
e9f66d9b 1875static struct pci_driver es1938_driver = {
3733e424 1876 .name = KBUILD_MODNAME,
1da177e4
LT		 1877 .id_table = snd_es1938_ids,
1878 .probe = snd_es1938_probe,
e23e7a14 1879 .remove = snd_es1938_remove,
68cb2b55
TI		 1880 .driver = {
1881 .pm = ES1938_PM_OPS,
1882 },
1da177e4
LT		 1883};
1884
e9f66d9b 1885module_pci_driver(es1938_driver);
Linux 6.x block layer and io_uring tree(s)