[linux-block.git] / sound / pci / emu10k1 / irq.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
 *                   Creative Labs, Inc.
 *  Routines for IRQ control of EMU10K1 chips
 *
 *  BUGS:
 *    --
 *
 *  TODO:
 *    --
 */

#include <linux/time.h>
#include <sound/core.h>
#include <sound/emu10k1.h>

irqreturn_t snd_emu10k1_interrupt(int irq, void *dev_id)
{
	struct snd_emu10k1 *emu = dev_id;
	unsigned int status, status2, orig_status, orig_status2;
	int handled = 0;
	int timeout = 0;

	while (((status = inl(emu->port + IPR)) != 0) && (timeout < 1000)) {
		timeout++;
		orig_status = status;
		handled = 1;
		if ((status & 0xffffffff) == 0xffffffff) {
			dev_info(emu->card->dev,
				 "Suspected sound card removal\n");
			break;
		}
		if (status & IPR_PCIERROR) {
			dev_err(emu->card->dev, "interrupt: PCI error\n");
			snd_emu10k1_intr_disable(emu, INTE_PCIERRORENABLE);
			status &= ~IPR_PCIERROR;
		}
		if (status & (IPR_VOLINCR|IPR_VOLDECR|IPR_MUTE)) {
			if (emu->hwvol_interrupt)
				emu->hwvol_interrupt(emu, status);
			else
				snd_emu10k1_intr_disable(emu, INTE_VOLINCRENABLE|INTE_VOLDECRENABLE|INTE_MUTEENABLE);
			status &= ~(IPR_VOLINCR|IPR_VOLDECR|IPR_MUTE);
		}
		if (status & IPR_CHANNELLOOP) {
			int voice;
			int voice_max = status & IPR_CHANNELNUMBERMASK;
			u32 val;
			struct snd_emu10k1_voice *pvoice = emu->voices;

			val = snd_emu10k1_ptr_read(emu, CLIPL, 0);
			for (voice = 0; voice <= voice_max; voice++) {
				if (voice == 0x20)
					val = snd_emu10k1_ptr_read(emu, CLIPH, 0);
				if (val & 1) {
					if (pvoice->use && pvoice->interrupt != NULL) {
						pvoice->interrupt(emu, pvoice);
						snd_emu10k1_voice_intr_ack(emu, voice);
					} else {
						snd_emu10k1_voice_intr_disable(emu, voice);
					}
				}
				val >>= 1;
				pvoice++;
			}
			val = snd_emu10k1_ptr_read(emu, HLIPL, 0);
			for (voice = 0; voice <= voice_max; voice++) {
				if (voice == 0x20)
					val = snd_emu10k1_ptr_read(emu, HLIPH, 0);
				if (val & 1) {
					if (pvoice->use && pvoice->interrupt != NULL) {
						pvoice->interrupt(emu, pvoice);
						snd_emu10k1_voice_half_loop_intr_ack(emu, voice);
					} else {
						snd_emu10k1_voice_half_loop_intr_disable(emu, voice);
					}
				}
				val >>= 1;
				pvoice++;
			}
			status &= ~IPR_CHANNELLOOP;
		}
		status &= ~IPR_CHANNELNUMBERMASK;
		if (status & (IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL)) {
			if (emu->capture_interrupt)
				emu->capture_interrupt(emu, status);
			else
				snd_emu10k1_intr_disable(emu, INTE_ADCBUFENABLE);
			status &= ~(IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL);
		}
		if (status & (IPR_MICBUFFULL|IPR_MICBUFHALFFULL)) {
			if (emu->capture_mic_interrupt)
				emu->capture_mic_interrupt(emu, status);
			else
				snd_emu10k1_intr_disable(emu, INTE_MICBUFENABLE);
			status &= ~(IPR_MICBUFFULL|IPR_MICBUFHALFFULL);
		}
		if (status & (IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL)) {
			if (emu->capture_efx_interrupt)
				emu->capture_efx_interrupt(emu, status);
			else
				snd_emu10k1_intr_disable(emu, INTE_EFXBUFENABLE);
			status &= ~(IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL);
		}
		if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
			if (emu->midi.interrupt)
				emu->midi.interrupt(emu, status);
			else
				snd_emu10k1_intr_disable(emu, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
			status &= ~(IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY);
		}
		if (status & (IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2)) {
			if (emu->midi2.interrupt)
				emu->midi2.interrupt(emu, status);
			else
				snd_emu10k1_intr_disable(emu, INTE_A_MIDITXENABLE2|INTE_A_MIDIRXENABLE2);
			status &= ~(IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2);
		}
		if (status & IPR_INTERVALTIMER) {
			if (emu->timer)
				snd_timer_interrupt(emu->timer, emu->timer->sticks);
			else
				snd_emu10k1_intr_disable(emu, INTE_INTERVALTIMERENB);
			status &= ~IPR_INTERVALTIMER;
		}
		if (status & (IPR_GPSPDIFSTATUSCHANGE|IPR_CDROMSTATUSCHANGE)) {
			if (emu->spdif_interrupt)
				emu->spdif_interrupt(emu, status);
			else
				snd_emu10k1_intr_disable(emu, INTE_GPSPDIFENABLE|INTE_CDSPDIFENABLE);
			status &= ~(IPR_GPSPDIFSTATUSCHANGE|IPR_CDROMSTATUSCHANGE);
		}
		if (status & IPR_FXDSP) {
			if (emu->dsp_interrupt)
				emu->dsp_interrupt(emu);
			else
				snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE);
			status &= ~IPR_FXDSP;
		}
		if (status & IPR_P16V) {
			while ((status2 = inl(emu->port + IPR2)) != 0) {
				u32 mask = INTE2_PLAYBACK_CH_0_LOOP;  /* Full Loop */
				struct snd_emu10k1_voice *pvoice = &(emu->p16v_voices[0]);
				struct snd_emu10k1_voice *cvoice = &(emu->p16v_capture_voice);

				/* dev_dbg(emu->card->dev, "status2=0x%x\n", status2); */
				orig_status2 = status2;
				if(status2 & mask) {
					if(pvoice->use) {
						snd_pcm_period_elapsed(pvoice->epcm->substream);
					} else { 
						dev_err(emu->card->dev,
							"p16v: status: 0x%08x, mask=0x%08x, pvoice=%p, use=%d\n",
							status2, mask, pvoice,
							pvoice->use);
					}
				}
				if(status2 & 0x110000) {
					/* dev_info(emu->card->dev, "capture int found\n"); */
					if(cvoice->use) {
						/* dev_info(emu->card->dev, "capture period_elapsed\n"); */
						snd_pcm_period_elapsed(cvoice->epcm->substream);
					}
				}
				outl(orig_status2, emu->port + IPR2); /* ack all */
			}
			status &= ~IPR_P16V;
		}

		if (status) {
			unsigned int bits;
			dev_err(emu->card->dev,
				"unhandled interrupt: 0x%08x\n", status);
			//make sure any interrupts we don't handle are disabled:
			bits = INTE_FXDSPENABLE |
				INTE_PCIERRORENABLE |
				INTE_VOLINCRENABLE |
				INTE_VOLDECRENABLE |
				INTE_MUTEENABLE |
				INTE_MICBUFENABLE |
				INTE_ADCBUFENABLE |
				INTE_EFXBUFENABLE |
				INTE_GPSPDIFENABLE |
				INTE_CDSPDIFENABLE |
				INTE_INTERVALTIMERENB |
				INTE_MIDITXENABLE |
				INTE_MIDIRXENABLE;
			if (emu->audigy)
				bits |= INTE_A_MIDITXENABLE2 | INTE_A_MIDIRXENABLE2;
			snd_emu10k1_intr_disable(emu, bits);
		}
		outl(orig_status, emu->port + IPR); /* ack all */
	}
	if (timeout == 1000)
		dev_info(emu->card->dev, "emu10k1 irq routine failure\n");

	return IRQ_RETVAL(handled);
}
Commit	Line	Data
1a59d1b8	1	// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4	2	/*
c1017a4c	3	* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4 LT	4	* Creative Labs, Inc.
	5	* Routines for IRQ control of EMU10K1 chips
	6	*
	7	* BUGS:
	8	* --
	9	*
	10	* TODO:
	11	* --
1da177e4 LT	12	*/
1da177e4 LT	13
1da177e4 LT	14	#include <linux/time.h>
	15	#include <sound/core.h>
	16	#include <sound/emu10k1.h>
	17
7d12e780	18	irqreturn_t snd_emu10k1_interrupt(int irq, void *dev_id)
1da177e4	19	{
eb4698f3	20	struct snd_emu10k1 *emu = dev_id;
1da177e4 LT	21	unsigned int status, status2, orig_status, orig_status2;
1da177e4 LT	22	int handled = 0;
c94fa4c9	23	int timeout = 0;
1da177e4	24
c94fa4c9 JCD	25	while (((status = inl(emu->port + IPR)) != 0) && (timeout < 1000)) {
c94fa4c9 JCD	26	timeout++;
1da177e4 LT	27	orig_status = status;
1da177e4 LT	28	handled = 1;
fb6a0d63	29	if ((status & 0xffffffff) == 0xffffffff) {
6f002b02 TI	30	dev_info(emu->card->dev,
6f002b02 TI	31	"Suspected sound card removal\n");
fb6a0d63 JCD	32	break;
fb6a0d63 JCD	33	}
1da177e4	34	if (status & IPR_PCIERROR) {
6f002b02	35	dev_err(emu->card->dev, "interrupt: PCI error\n");
1da177e4 LT	36	snd_emu10k1_intr_disable(emu, INTE_PCIERRORENABLE);
	37	status &= ~IPR_PCIERROR;
	38	}
	39	if (status & (IPR_VOLINCR\|IPR_VOLDECR\|IPR_MUTE)) {
	40	if (emu->hwvol_interrupt)
	41	emu->hwvol_interrupt(emu, status);
	42	else
	43	snd_emu10k1_intr_disable(emu, INTE_VOLINCRENABLE\|INTE_VOLDECRENABLE\|INTE_MUTEENABLE);
	44	status &= ~(IPR_VOLINCR\|IPR_VOLDECR\|IPR_MUTE);
	45	}
	46	if (status & IPR_CHANNELLOOP) {
	47	int voice;
	48	int voice_max = status & IPR_CHANNELNUMBERMASK;
	49	u32 val;
eb4698f3	50	struct snd_emu10k1_voice *pvoice = emu->voices;
1da177e4 LT	51
	52	val = snd_emu10k1_ptr_read(emu, CLIPL, 0);
	53	for (voice = 0; voice <= voice_max; voice++) {
	54	if (voice == 0x20)
	55	val = snd_emu10k1_ptr_read(emu, CLIPH, 0);
	56	if (val & 1) {
	57	if (pvoice->use && pvoice->interrupt != NULL) {
	58	pvoice->interrupt(emu, pvoice);
	59	snd_emu10k1_voice_intr_ack(emu, voice);
	60	} else {
	61	snd_emu10k1_voice_intr_disable(emu, voice);
	62	}
	63	}
	64	val >>= 1;
	65	pvoice++;
	66	}
	67	val = snd_emu10k1_ptr_read(emu, HLIPL, 0);
	68	for (voice = 0; voice <= voice_max; voice++) {
	69	if (voice == 0x20)
	70	val = snd_emu10k1_ptr_read(emu, HLIPH, 0);
	71	if (val & 1) {
	72	if (pvoice->use && pvoice->interrupt != NULL) {
	73	pvoice->interrupt(emu, pvoice);
	74	snd_emu10k1_voice_half_loop_intr_ack(emu, voice);
	75	} else {
	76	snd_emu10k1_voice_half_loop_intr_disable(emu, voice);
	77	}
	78	}
	79	val >>= 1;
	80	pvoice++;
	81	}
	82	status &= ~IPR_CHANNELLOOP;
	83	}
	84	status &= ~IPR_CHANNELNUMBERMASK;
	85	if (status & (IPR_ADCBUFFULL\|IPR_ADCBUFHALFFULL)) {
	86	if (emu->capture_interrupt)
	87	emu->capture_interrupt(emu, status);
	88	else
	89	snd_emu10k1_intr_disable(emu, INTE_ADCBUFENABLE);
	90	status &= ~(IPR_ADCBUFFULL\|IPR_ADCBUFHALFFULL);
	91	}
	92	if (status & (IPR_MICBUFFULL\|IPR_MICBUFHALFFULL)) {
	93	if (emu->capture_mic_interrupt)
	94	emu->capture_mic_interrupt(emu, status);
	95	else
	96	snd_emu10k1_intr_disable(emu, INTE_MICBUFENABLE);
	97	status &= ~(IPR_MICBUFFULL\|IPR_MICBUFHALFFULL);
	98	}
	99	if (status & (IPR_EFXBUFFULL\|IPR_EFXBUFHALFFULL)) {
	100	if (emu->capture_efx_interrupt)
	101	emu->capture_efx_interrupt(emu, status);
	102	else
	103	snd_emu10k1_intr_disable(emu, INTE_EFXBUFENABLE);
	104	status &= ~(IPR_EFXBUFFULL\|IPR_EFXBUFHALFFULL);
	105	}
	106	if (status & (IPR_MIDITRANSBUFEMPTY\|IPR_MIDIRECVBUFEMPTY)) {
	107	if (emu->midi.interrupt)
	108	emu->midi.interrupt(emu, status);
	109	else
	110	snd_emu10k1_intr_disable(emu, INTE_MIDITXENABLE\|INTE_MIDIRXENABLE);
	111	status &= ~(IPR_MIDITRANSBUFEMPTY\|IPR_MIDIRECVBUFEMPTY);
	112	}
	113	if (status & (IPR_A_MIDITRANSBUFEMPTY2\|IPR_A_MIDIRECVBUFEMPTY2)) {
	114	if (emu->midi2.interrupt)
115	emu->midi2.interrupt(emu, status);
116	else
117	snd_emu10k1_intr_disable(emu, INTE_A_MIDITXENABLE2\|INTE_A_MIDIRXENABLE2);
118	status &= ~(IPR_A_MIDITRANSBUFEMPTY2\|IPR_A_MIDIRECVBUFEMPTY2);
119	}
120	if (status & IPR_INTERVALTIMER) {
121	if (emu->timer)
122	snd_timer_interrupt(emu->timer, emu->timer->sticks);
123	else
124	snd_emu10k1_intr_disable(emu, INTE_INTERVALTIMERENB);
125	status &= ~IPR_INTERVALTIMER;
126	}
127	if (status & (IPR_GPSPDIFSTATUSCHANGE\|IPR_CDROMSTATUSCHANGE)) {
128	if (emu->spdif_interrupt)
129	emu->spdif_interrupt(emu, status);
130	else
131	snd_emu10k1_intr_disable(emu, INTE_GPSPDIFENABLE\|INTE_CDSPDIFENABLE);
132	status &= ~(IPR_GPSPDIFSTATUSCHANGE\|IPR_CDROMSTATUSCHANGE);
133	}
134	if (status & IPR_FXDSP) {
135	if (emu->dsp_interrupt)
136	emu->dsp_interrupt(emu);
137	else
138	snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE);
139	status &= ~IPR_FXDSP;
140	}
6e4abc40 JCD	141	if (status & IPR_P16V) {
	142	while ((status2 = inl(emu->port + IPR2)) != 0) {
	143	u32 mask = INTE2_PLAYBACK_CH_0_LOOP; /* Full Loop */
eb4698f3 TI	144	struct snd_emu10k1_voice *pvoice = &(emu->p16v_voices[0]);
eb4698f3 TI	145	struct snd_emu10k1_voice *cvoice = &(emu->p16v_capture_voice);
6e4abc40	146
6f002b02	147	/* dev_dbg(emu->card->dev, "status2=0x%x\n", status2); */
6e4abc40 JCD	148	orig_status2 = status2;
	149	if(status2 & mask) {
	150	if(pvoice->use) {
	151	snd_pcm_period_elapsed(pvoice->epcm->substream);
	152	} else {
6f002b02 TI	153	dev_err(emu->card->dev,
	154	"p16v: status: 0x%08x, mask=0x%08x, pvoice=%p, use=%d\n",
	155	status2, mask, pvoice,
	156	pvoice->use);
6e4abc40 JCD	157	}
	158	}
	159	if(status2 & 0x110000) {
6f002b02	160	/* dev_info(emu->card->dev, "capture int found\n"); */
6e4abc40	161	if(cvoice->use) {
6f002b02	162	/* dev_info(emu->card->dev, "capture period_elapsed\n"); */
6e4abc40 JCD	163	snd_pcm_period_elapsed(cvoice->epcm->substream);
	164	}
	165	}
	166	outl(orig_status2, emu->port + IPR2); /* ack all */
	167	}
	168	status &= ~IPR_P16V;
	169	}
	170
1da177e4 LT	171	if (status) {
1da177e4 LT	172	unsigned int bits;
6f002b02 TI	173	dev_err(emu->card->dev,
6f002b02 TI	174	"unhandled interrupt: 0x%08x\n", status);
1da177e4 LT	175	//make sure any interrupts we don't handle are disabled:
	176	bits = INTE_FXDSPENABLE \|
	177	INTE_PCIERRORENABLE \|
	178	INTE_VOLINCRENABLE \|
	179	INTE_VOLDECRENABLE \|
	180	INTE_MUTEENABLE \|
	181	INTE_MICBUFENABLE \|
	182	INTE_ADCBUFENABLE \|
	183	INTE_EFXBUFENABLE \|
	184	INTE_GPSPDIFENABLE \|
	185	INTE_CDSPDIFENABLE \|
	186	INTE_INTERVALTIMERENB \|
	187	INTE_MIDITXENABLE \|
	188	INTE_MIDIRXENABLE;
	189	if (emu->audigy)
	190	bits \|= INTE_A_MIDITXENABLE2 \| INTE_A_MIDIRXENABLE2;
	191	snd_emu10k1_intr_disable(emu, bits);
	192	}
	193	outl(orig_status, emu->port + IPR); /* ack all */
	194	}
c94fa4c9	195	if (timeout == 1000)
6f002b02	196	dev_info(emu->card->dev, "emu10k1 irq routine failure\n");
c94fa4c9	197
1da177e4 LT	198	return IRQ_RETVAL(handled);
1da177e4 LT	199	}