[linux-2.6-block.git] / sound / pci / echoaudio / layla20_dsp.c

/****************************************************************************

   Copyright Echo Digital Audio Corporation (c) 1998 - 2004
   All rights reserved
   www.echoaudio.com

   This file is part of Echo Digital Audio's generic driver library.

   Echo Digital Audio's generic driver library is free software;
   you can redistribute it and/or modify it under the terms of
   the GNU General Public License as published by the Free Software
   Foundation.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 59 Temple Place - Suite 330, Boston,
   MA  02111-1307, USA.

   *************************************************************************

 Translation from C++ and adaptation for use in ALSA-Driver
 were made by Giuliano Pochini <pochini@shiny.it>

****************************************************************************/


static int read_dsp(struct echoaudio *chip, u32 *data);
static int set_professional_spdif(struct echoaudio *chip, char prof);
static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic);
static int check_asic_status(struct echoaudio *chip);
static int update_flags(struct echoaudio *chip);


static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
{
	int err;

	if (snd_BUG_ON((subdevice_id & 0xfff0) != LAYLA20))
		return -ENODEV;

	if ((err = init_dsp_comm_page(chip))) {
		dev_err(chip->card->dev,
			"init_hw - could not initialize DSP comm page\n");
		return err;
	}

	chip->device_id = device_id;
	chip->subdevice_id = subdevice_id;
	chip->bad_board = true;
	chip->has_midi = true;
	chip->dsp_code_to_load = FW_LAYLA20_DSP;
	chip->input_clock_types =
		ECHO_CLOCK_BIT_INTERNAL | ECHO_CLOCK_BIT_SPDIF |
		ECHO_CLOCK_BIT_WORD | ECHO_CLOCK_BIT_SUPER;
	chip->output_clock_types =
		ECHO_CLOCK_BIT_WORD | ECHO_CLOCK_BIT_SUPER;

	if ((err = load_firmware(chip)) < 0)
		return err;
	chip->bad_board = false;

	return err;
}


static int set_mixer_defaults(struct echoaudio *chip)
{
	chip->professional_spdif = false;
	return init_line_levels(chip);
}


static u32 detect_input_clocks(const struct echoaudio *chip)
{
	u32 clocks_from_dsp, clock_bits;

	/* Map the DSP clock detect bits to the generic driver clock detect bits */
	clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);

	clock_bits = ECHO_CLOCK_BIT_INTERNAL;

	if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_SPDIF)
		clock_bits |= ECHO_CLOCK_BIT_SPDIF;

	if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_WORD) {
		if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_SUPER)
			clock_bits |= ECHO_CLOCK_BIT_SUPER;
		else
			clock_bits |= ECHO_CLOCK_BIT_WORD;
	}

	return clock_bits;
}


/* ASIC status check - some cards have one or two ASICs that need to be
loaded.  Once that load is complete, this function is called to see if
the load was successful.
If this load fails, it does not necessarily mean that the hardware is
defective - the external box may be disconnected or turned off.
This routine sometimes fails for Layla20; for Layla20, the loop runs
5 times and succeeds if it wins on three of the loops. */
static int check_asic_status(struct echoaudio *chip)
{
	u32 asic_status;
	int goodcnt, i;

	chip->asic_loaded = false;
	for (i = goodcnt = 0; i < 5; i++) {
		send_vector(chip, DSP_VC_TEST_ASIC);

		/* The DSP will return a value to indicate whether or not
		   the ASIC is currently loaded */
		if (read_dsp(chip, &asic_status) < 0) {
			dev_err(chip->card->dev,
				"check_asic_status: failed on read_dsp\n");
			return -EIO;
		}

		if (asic_status == ASIC_ALREADY_LOADED) {
			if (++goodcnt == 3) {
				chip->asic_loaded = true;
				return 0;
			}
		}
	}
	return -EIO;
}


/* Layla20 has an ASIC in the external box */
static int load_asic(struct echoaudio *chip)
{
	int err;

	if (chip->asic_loaded)
		return 0;

	err = load_asic_generic(chip, DSP_FNC_LOAD_LAYLA_ASIC,
				FW_LAYLA20_ASIC);
	if (err < 0)
		return err;

	/* Check if ASIC is alive and well. */
	return check_asic_status(chip);
}


static int set_sample_rate(struct echoaudio *chip, u32 rate)
{
	if (snd_BUG_ON(rate < 8000 || rate > 50000))
		return -EINVAL;

	/* Only set the clock for internal mode. Do not return failure,
	   simply treat it as a non-event. */
	if (chip->input_clock != ECHO_CLOCK_INTERNAL) {
		dev_warn(chip->card->dev,
			 "Cannot set sample rate - clock not set to CLK_CLOCKININTERNAL\n");
		chip->comm_page->sample_rate = cpu_to_le32(rate);
		chip->sample_rate = rate;
		return 0;
	}

	if (wait_handshake(chip))
		return -EIO;

	dev_dbg(chip->card->dev, "set_sample_rate(%d)\n", rate);
	chip->sample_rate = rate;
	chip->comm_page->sample_rate = cpu_to_le32(rate);
	clear_handshake(chip);
	return send_vector(chip, DSP_VC_SET_LAYLA_SAMPLE_RATE);
}


static int set_input_clock(struct echoaudio *chip, u16 clock_source)
{
	u16 clock;
	u32 rate;

	rate = 0;
	switch (clock_source) {
	case ECHO_CLOCK_INTERNAL:
		rate = chip->sample_rate;
		clock = LAYLA20_CLOCK_INTERNAL;
		break;
	case ECHO_CLOCK_SPDIF:
		clock = LAYLA20_CLOCK_SPDIF;
		break;
	case ECHO_CLOCK_WORD:
		clock = LAYLA20_CLOCK_WORD;
		break;
	case ECHO_CLOCK_SUPER:
		clock = LAYLA20_CLOCK_SUPER;
		break;
	default:
		dev_err(chip->card->dev,
			"Input clock 0x%x not supported for Layla24\n",
			clock_source);
		return -EINVAL;
	}
	chip->input_clock = clock_source;

	chip->comm_page->input_clock = cpu_to_le16(clock);
	clear_handshake(chip);
	send_vector(chip, DSP_VC_UPDATE_CLOCKS);

	if (rate)
		set_sample_rate(chip, rate);

	return 0;
}


static int set_output_clock(struct echoaudio *chip, u16 clock)
{
	switch (clock) {
	case ECHO_CLOCK_SUPER:
		clock = LAYLA20_OUTPUT_CLOCK_SUPER;
		break;
	case ECHO_CLOCK_WORD:
		clock = LAYLA20_OUTPUT_CLOCK_WORD;
		break;
	default:
		dev_err(chip->card->dev, "set_output_clock wrong clock\n");
		return -EINVAL;
	}

	if (wait_handshake(chip))
		return -EIO;

	chip->comm_page->output_clock = cpu_to_le16(clock);
	chip->output_clock = clock;
	clear_handshake(chip);
	return send_vector(chip, DSP_VC_UPDATE_CLOCKS);
}


/* Set input bus gain (one unit is 0.5dB !) */
static int set_input_gain(struct echoaudio *chip, u16 input, int gain)
{
	if (snd_BUG_ON(input >= num_busses_in(chip)))
		return -EINVAL;

	if (wait_handshake(chip))
		return -EIO;

	chip->input_gain[input] = gain;
	gain += GL20_INPUT_GAIN_MAGIC_NUMBER;
	chip->comm_page->line_in_level[input] = gain;
	return 0;
}


/* Tell the DSP to reread the flags from the comm page */
static int update_flags(struct echoaudio *chip)
{
	if (wait_handshake(chip))
		return -EIO;
	clear_handshake(chip);
	return send_vector(chip, DSP_VC_UPDATE_FLAGS);
}


static int set_professional_spdif(struct echoaudio *chip, char prof)
{
	if (prof)
		chip->comm_page->flags |=
			cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
	else
		chip->comm_page->flags &=
			~cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
	chip->professional_spdif = prof;
	return update_flags(chip);
}
Commit	Line	Data
dd7b254d GP	1	/****************************************************************************
	2
	3	Copyright Echo Digital Audio Corporation (c) 1998 - 2004
	4	All rights reserved
	5	www.echoaudio.com
	6
	7	This file is part of Echo Digital Audio's generic driver library.
	8
	9	Echo Digital Audio's generic driver library is free software;
	10	you can redistribute it and/or modify it under the terms of
	11	the GNU General Public License as published by the Free Software
	12	Foundation.
	13
	14	This program is distributed in the hope that it will be useful,
	15	but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	GNU General Public License for more details.
	18
	19	You should have received a copy of the GNU General Public License
	20	along with this program; if not, write to the Free Software
	21	Foundation, Inc., 59 Temple Place - Suite 330, Boston,
	22	MA 02111-1307, USA.
	23
	24	*************************************************************************
	25
	26	Translation from C++ and adaptation for use in ALSA-Driver
	27	were made by Giuliano Pochini <pochini@shiny.it>
	28
	29	****************************************************************************/
	30
	31
	32	static int read_dsp(struct echoaudio chip, u32 data);
	33	static int set_professional_spdif(struct echoaudio *chip, char prof);
19b50063	34	static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic);
dd7b254d GP	35	static int check_asic_status(struct echoaudio *chip);
	36	static int update_flags(struct echoaudio *chip);
	37
	38
	39	static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
	40	{
	41	int err;
	42
da3cec35 TI	43	if (snd_BUG_ON((subdevice_id & 0xfff0) != LAYLA20))
da3cec35 TI	44	return -ENODEV;
dd7b254d GP	45
dd7b254d GP	46	if ((err = init_dsp_comm_page(chip))) {
b5b4a41b SM	47	dev_err(chip->card->dev,
b5b4a41b SM	48	"init_hw - could not initialize DSP comm page\n");
dd7b254d GP	49	return err;
	50	}
	51
	52	chip->device_id = device_id;
	53	chip->subdevice_id = subdevice_id;
3f6175ec MB	54	chip->bad_board = true;
3f6175ec MB	55	chip->has_midi = true;
19b50063	56	chip->dsp_code_to_load = FW_LAYLA20_DSP;
dd7b254d GP	57	chip->input_clock_types =
	58	ECHO_CLOCK_BIT_INTERNAL \| ECHO_CLOCK_BIT_SPDIF \|
	59	ECHO_CLOCK_BIT_WORD \| ECHO_CLOCK_BIT_SUPER;
	60	chip->output_clock_types =
	61	ECHO_CLOCK_BIT_WORD \| ECHO_CLOCK_BIT_SUPER;
	62
	63	if ((err = load_firmware(chip)) < 0)
	64	return err;
3f6175ec	65	chip->bad_board = false;
dd7b254d	66
dd7b254d GP	67	return err;
	68	}
	69
	70
	71
ad3499f4 GP	72	static int set_mixer_defaults(struct echoaudio *chip)
ad3499f4 GP	73	{
3f6175ec	74	chip->professional_spdif = false;
ad3499f4 GP	75	return init_line_levels(chip);
	76	}
	77
	78
	79
dd7b254d GP	80	static u32 detect_input_clocks(const struct echoaudio *chip)
	81	{
	82	u32 clocks_from_dsp, clock_bits;
	83
	84	/* Map the DSP clock detect bits to the generic driver clock detect bits */
	85	clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
	86
	87	clock_bits = ECHO_CLOCK_BIT_INTERNAL;
	88
	89	if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_SPDIF)
	90	clock_bits \|= ECHO_CLOCK_BIT_SPDIF;
	91
	92	if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_WORD) {
	93	if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_SUPER)
	94	clock_bits \|= ECHO_CLOCK_BIT_SUPER;
	95	else
	96	clock_bits \|= ECHO_CLOCK_BIT_WORD;
	97	}
	98
	99	return clock_bits;
	100	}
	101
	102
	103
	104	/* ASIC status check - some cards have one or two ASICs that need to be
	105	loaded. Once that load is complete, this function is called to see if
	106	the load was successful.
	107	If this load fails, it does not necessarily mean that the hardware is
	108	defective - the external box may be disconnected or turned off.
	109	This routine sometimes fails for Layla20; for Layla20, the loop runs
	110	5 times and succeeds if it wins on three of the loops. */
	111	static int check_asic_status(struct echoaudio *chip)
	112	{
	113	u32 asic_status;
	114	int goodcnt, i;
	115
3f6175ec	116	chip->asic_loaded = false;
dd7b254d GP	117	for (i = goodcnt = 0; i < 5; i++) {
	118	send_vector(chip, DSP_VC_TEST_ASIC);
	119
	120	/* The DSP will return a value to indicate whether or not
	121	the ASIC is currently loaded */
	122	if (read_dsp(chip, &asic_status) < 0) {
b5b4a41b SM	123	dev_err(chip->card->dev,
b5b4a41b SM	124	"check_asic_status: failed on read_dsp\n");
dd7b254d GP	125	return -EIO;
	126	}
	127
	128	if (asic_status == ASIC_ALREADY_LOADED) {
	129	if (++goodcnt == 3) {
3f6175ec	130	chip->asic_loaded = true;
dd7b254d GP	131	return 0;
	132	}
	133	}
	134	}
	135	return -EIO;
	136	}
	137
	138
	139
	140	/* Layla20 has an ASIC in the external box */
	141	static int load_asic(struct echoaudio *chip)
	142	{
	143	int err;
	144
	145	if (chip->asic_loaded)
	146	return 0;
	147
	148	err = load_asic_generic(chip, DSP_FNC_LOAD_LAYLA_ASIC,
19b50063	149	FW_LAYLA20_ASIC);
dd7b254d GP	150	if (err < 0)
	151	return err;
	152
	153	/* Check if ASIC is alive and well. */
	154	return check_asic_status(chip);
	155	}
	156
	157
	158
	159	static int set_sample_rate(struct echoaudio *chip, u32 rate)
	160	{
da3cec35 TI	161	if (snd_BUG_ON(rate < 8000 \|\| rate > 50000))
da3cec35 TI	162	return -EINVAL;
dd7b254d GP	163
	164	/* Only set the clock for internal mode. Do not return failure,
	165	simply treat it as a non-event. */
	166	if (chip->input_clock != ECHO_CLOCK_INTERNAL) {
b5b4a41b SM	167	dev_warn(chip->card->dev,
b5b4a41b SM	168	"Cannot set sample rate - clock not set to CLK_CLOCKININTERNAL\n");
dd7b254d GP	169	chip->comm_page->sample_rate = cpu_to_le32(rate);
	170	chip->sample_rate = rate;
	171	return 0;
	172	}
	173
	174	if (wait_handshake(chip))
	175	return -EIO;
	176
b5b4a41b	177	dev_dbg(chip->card->dev, "set_sample_rate(%d)\n", rate);
dd7b254d GP	178	chip->sample_rate = rate;
	179	chip->comm_page->sample_rate = cpu_to_le32(rate);
	180	clear_handshake(chip);
	181	return send_vector(chip, DSP_VC_SET_LAYLA_SAMPLE_RATE);
	182	}
	183
	184
	185
	186	static int set_input_clock(struct echoaudio *chip, u16 clock_source)
	187	{
	188	u16 clock;
	189	u32 rate;
	190
dd7b254d GP	191	rate = 0;
	192	switch (clock_source) {
	193	case ECHO_CLOCK_INTERNAL:
dd7b254d GP	194	rate = chip->sample_rate;
	195	clock = LAYLA20_CLOCK_INTERNAL;
	196	break;
	197	case ECHO_CLOCK_SPDIF:
dd7b254d GP	198	clock = LAYLA20_CLOCK_SPDIF;
	199	break;
	200	case ECHO_CLOCK_WORD:
dd7b254d GP	201	clock = LAYLA20_CLOCK_WORD;
	202	break;
	203	case ECHO_CLOCK_SUPER:
dd7b254d GP	204	clock = LAYLA20_CLOCK_SUPER;
	205	break;
	206	default:
b5b4a41b SM	207	dev_err(chip->card->dev,
	208	"Input clock 0x%x not supported for Layla24\n",
	209	clock_source);
dd7b254d GP	210	return -EINVAL;
	211	}
	212	chip->input_clock = clock_source;
	213
	214	chip->comm_page->input_clock = cpu_to_le16(clock);
	215	clear_handshake(chip);
	216	send_vector(chip, DSP_VC_UPDATE_CLOCKS);
	217
	218	if (rate)
	219	set_sample_rate(chip, rate);
	220
	221	return 0;
	222	}
	223
	224
	225
	226	static int set_output_clock(struct echoaudio *chip, u16 clock)
	227	{
dd7b254d GP	228	switch (clock) {
	229	case ECHO_CLOCK_SUPER:
	230	clock = LAYLA20_OUTPUT_CLOCK_SUPER;
	231	break;
	232	case ECHO_CLOCK_WORD:
	233	clock = LAYLA20_OUTPUT_CLOCK_WORD;
	234	break;
	235	default:
b5b4a41b	236	dev_err(chip->card->dev, "set_output_clock wrong clock\n");
dd7b254d GP	237	return -EINVAL;
	238	}
	239
	240	if (wait_handshake(chip))
	241	return -EIO;
	242
	243	chip->comm_page->output_clock = cpu_to_le16(clock);
	244	chip->output_clock = clock;
	245	clear_handshake(chip);
	246	return send_vector(chip, DSP_VC_UPDATE_CLOCKS);
	247	}
	248
	249
	250
	251	/* Set input bus gain (one unit is 0.5dB !) */
	252	static int set_input_gain(struct echoaudio *chip, u16 input, int gain)
	253	{
da3cec35 TI	254	if (snd_BUG_ON(input >= num_busses_in(chip)))
da3cec35 TI	255	return -EINVAL;
dd7b254d GP	256
	257	if (wait_handshake(chip))
	258	return -EIO;
	259
	260	chip->input_gain[input] = gain;
	261	gain += GL20_INPUT_GAIN_MAGIC_NUMBER;
	262	chip->comm_page->line_in_level[input] = gain;
	263	return 0;
	264	}
	265
	266
	267
	268	/* Tell the DSP to reread the flags from the comm page */
	269	static int update_flags(struct echoaudio *chip)
	270	{
	271	if (wait_handshake(chip))
	272	return -EIO;
	273	clear_handshake(chip);
	274	return send_vector(chip, DSP_VC_UPDATE_FLAGS);
	275	}
	276
	277
	278
	279	static int set_professional_spdif(struct echoaudio *chip, char prof)
	280	{
dd7b254d GP	281	if (prof)
dd7b254d GP	282	chip->comm_page->flags \|=
e930e995	283	cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
dd7b254d GP	284	else
dd7b254d GP	285	chip->comm_page->flags &=
e930e995	286	~cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
dd7b254d GP	287	chip->professional_spdif = prof;
	288	return update_flags(chip);
	289	}