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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 156
[linux-block.git] / sound / pci / ca0106 / ca0106_main.c
CommitLineData
1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT		 2/*
3 * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
4 * Driver CA0106 chips. e.g. Sound Blaster Audigy LS and Live 24bit
48510070 5 * Version: 0.0.25
1da177e4
LT		 6 *
7 * FEATURES currently supported:
8 * Front, Rear and Center/LFE.
9 * Surround40 and Surround51.
10 * Capture from MIC an LINE IN input.
11 * SPDIF digital playback of PCM stereo and AC3/DTS works.
12 * (One can use a standard mono mini-jack to one RCA plugs cable.
13 * or one can use a standard stereo mini-jack to two RCA plugs cable.
14 * Plug one of the RCA plugs into the Coax input of the external decoder/receiver.)
15 * ( In theory one could output 3 different AC3 streams at once, to 3 different SPDIF outputs. )
16 * Notes on how to capture sound:
17 * The AC97 is used in the PLAYBACK direction.
18 * The output from the AC97 chip, instead of reaching the speakers, is fed into the Philips 1361T ADC.
19 * So, to record from the MIC, set the MIC Playback volume to max,
20 * unmute the MIC and turn up the MASTER Playback volume.
21 * So, to prevent feedback when capturing, minimise the "Capture feedback into Playback" volume.
22 *
23 * The only playback controls that currently do anything are: -
24 * Analog Front
25 * Analog Rear
26 * Analog Center/LFE
27 * SPDIF Front
28 * SPDIF Rear
29 * SPDIF Center/LFE
30 *
31 * For capture from Mic in or Line in.
32 * Digital/Analog ( switch must be in Analog mode for CAPTURE. )
33 *
34 * CAPTURE feedback into PLAYBACK
35 *
36 * Changelog:
37 * Support interrupts per period.
38 * Removed noise from Center/LFE channel when in Analog mode.
39 * Rename and remove mixer controls.
40 * 0.0.6
41 * Use separate card based DMA buffer for periods table list.
42 * 0.0.7
43 * Change remove and rename ctrls into lists.
44 * 0.0.8
45 * Try to fix capture sources.
46 * 0.0.9
47 * Fix AC3 output.
48 * Enable S32_LE format support.
49 * 0.0.10
50 * Enable playback 48000 and 96000 rates. (Rates other that these do not work, even with "plug:front".)
51 * 0.0.11
52 * Add Model name recognition.
53 * 0.0.12
54 * Correct interrupt timing. interrupt at end of period, instead of in the middle of a playback period.
55 * Remove redundent "voice" handling.
56 * 0.0.13
57 * Single trigger call for multi channels.
58 * 0.0.14
59 * Set limits based on what the sound card hardware can do.
60 * playback periods_min=2, periods_max=8
61 * capture hw constraints require period_size = n * 64 bytes.
62 * playback hw constraints require period_size = n * 64 bytes.
63 * 0.0.15
64 * Minor updates.
65 * 0.0.16
66 * Implement 192000 sample rate.
67 * 0.0.17
68 * Add support for SB0410 and SB0413.
69 * 0.0.18
70 * Modified Copyright message.
71 * 0.0.19
72 * Finally fix support for SB Live 24 bit. SB0410 and SB0413.
73 * The output codec needs resetting, otherwise all output is muted.
74 * 0.0.20
75 * Merge "pci_disable_device(pci);" fixes.
76 * 0.0.21
77 * Add 4 capture channels. (SPDIF only comes in on channel 0. )
78 * Add SPDIF capture using optional digital I/O module for SB Live 24bit. (Analog capture does not yet work.)
79 * 0.0.22
80 * Add support for MSI K8N Diamond Motherboard with onboard SB Live 24bit without AC97. From kiksen, bug #901
7199acdc
JCD		 81 * 0.0.23
82 * Implement support for Line-in capture on SB Live 24bit.
b18cd538
TP		 83 * 0.0.24
84 * Add support for mute control on SB Live 24bit (cards w/ SPI DAC)
48510070
TP		 85 * 0.0.25
86 * Powerdown SPI DAC channels when not in use
1da177e4
LT		 87 *
88 * BUGS:
89 * Some stability problems when unloading the snd-ca0106 kernel module.
90 * --
91 *
92 * TODO:
93 * 4 Capture channels, only one implemented so far.
94 * Other capture rates apart from 48khz not implemented.
95 * MIDI
96 * --
97 * GENERAL INFO:
98 * Model: SB0310
99 * P17 Chip: CA0106-DAT
100 * AC97 Codec: STAC 9721
101 * ADC: Philips 1361T (Stereo 24bit)
102 * DAC: WM8746EDS (6-channel, 24bit, 192Khz)
103 *
104 * GENERAL INFO:
105 * Model: SB0410
106 * P17 Chip: CA0106-DAT
107 * AC97 Codec: None
108 * ADC: WM8775EDS (4 Channel)
109 * DAC: CS4382 (114 dB, 24-Bit, 192 kHz, 8-Channel D/A Converter with DSD Support)
110 * SPDIF Out control switches between Mic in and SPDIF out.
111 * No sound out or mic input working yet.
112 *
113 * GENERAL INFO:
114 * Model: SB0413
115 * P17 Chip: CA0106-DAT
116 * AC97 Codec: None.
117 * ADC: Unknown
118 * DAC: Unknown
119 * Trying to handle it like the SB0410.
120 *
25985edc 121 * This code was initially based on code from ALSA's emu10k1x.c which is:
1da177e4 122 * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
1da177e4 123 */
1da177e4
LT		 124#include <linux/delay.h>
125#include <linux/init.h>
126#include <linux/interrupt.h>
127#include <linux/pci.h>
128#include <linux/slab.h>
65a77217 129#include <linux/module.h>
299676b1 130#include <linux/dma-mapping.h>
1da177e4
LT		 131#include <sound/core.h>
132#include <sound/initval.h>
133#include <sound/pcm.h>
134#include <sound/ac97_codec.h>
135#include <sound/info.h>
136
137MODULE_AUTHOR("James Courtier-Dutton <James@superbug.demon.co.uk>");
138MODULE_DESCRIPTION("CA0106");
139MODULE_LICENSE("GPL");
140MODULE_SUPPORTED_DEVICE("{{Creative,SB CA0106 chip}}");
141
142// module parameters (see "Module Parameters")
143static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
144static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
a67ff6a5 145static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
e4f55d80 146static uint subsystem[SNDRV_CARDS]; /* Force card subsystem model */
1da177e4
LT		 147
148module_param_array(index, int, NULL, 0444);
149MODULE_PARM_DESC(index, "Index value for the CA0106 soundcard.");
150module_param_array(id, charp, NULL, 0444);
151MODULE_PARM_DESC(id, "ID string for the CA0106 soundcard.");
152module_param_array(enable, bool, NULL, 0444);
153MODULE_PARM_DESC(enable, "Enable the CA0106 soundcard.");
e4f55d80
JCD		 154module_param_array(subsystem, uint, NULL, 0444);
155MODULE_PARM_DESC(subsystem, "Force card subsystem model.");
1da177e4
LT		 156
157#include "ca0106.h"
158
e4a3d145 159static struct snd_ca0106_details ca0106_chip_details[] = {
8632649b
JCD		 160 /* Sound Blaster X-Fi Extreme Audio. This does not have an AC97. 53SB079000000 */
161 /* It is really just a normal SB Live 24bit. */
aaccf54f
JCD		 162 /* Tested:
163 * See ALSA bug#3251
164 */
165 { .serial = 0x10131102,
166 .name = "X-Fi Extreme Audio [SBxxxx]",
167 .gpio_type = 1,
168 .i2c_adc = 1 } ,
169 /* Sound Blaster X-Fi Extreme Audio. This does not have an AC97. 53SB079000000 */
170 /* It is really just a normal SB Live 24bit. */
8632649b
JCD		 171 /*
172 * CTRL:CA0111-WTLF
173 * ADC: WM8775SEDS
174 * DAC: CS4382-KQZ
175 */
176 /* Tested:
177 * Playback on front, rear, center/lfe speakers
178 * Capture from Mic in.
179 * Not-Tested:
180 * Capture from Line in.
181 * Playback to digital out.
182 */
183 { .serial = 0x10121102,
184 .name = "X-Fi Extreme Audio [SB0790]",
185 .gpio_type = 1,
186 .i2c_adc = 1 } ,
187 /* New Dell Sound Blaster Live! 7.1 24bit. This does not have an AC97. */
1baa705b
JCD		 188 /* AudigyLS[SB0310] */
189 { .serial = 0x10021102,
190 .name = "AudigyLS [SB0310]",
191 .ac97 = 1 } ,
192 /* Unknown AudigyLS that also says SB0310 on it */
193 { .serial = 0x10051102,
194 .name = "AudigyLS [SB0310b]",
195 .ac97 = 1 } ,
196 /* New Sound Blaster Live! 7.1 24bit. This does not have an AC97. 53SB041000001 */
197 { .serial = 0x10061102,
198 .name = "Live! 7.1 24bit [SB0410]",
7199acdc
JCD		 199 .gpio_type = 1,
200 .i2c_adc = 1 } ,
1baa705b
JCD		 201 /* New Dell Sound Blaster Live! 7.1 24bit. This does not have an AC97. */
202 { .serial = 0x10071102,
203 .name = "Live! 7.1 24bit [SB0413]",
7199acdc
JCD		 204 .gpio_type = 1,
205 .i2c_adc = 1 } ,
a5875159
JCD		 206 /* New Audigy SE. Has a different DAC. */
207 /* SB0570:
208 * CTRL:CA0106-DAT
58398895
JCD		 209 * ADC: WM8775EDS
210 * DAC: WM8768GEDS
a5875159
JCD		 211 */
212 { .serial = 0x100a1102,
213 .name = "Audigy SE [SB0570]",
214 .gpio_type = 1,
215 .i2c_adc = 1,
6fef153a 216 .spi_dac = 0x4021 } ,
e4f55d80
JCD		 217 /* New Audigy LS. Has a different DAC. */
218 /* SB0570:
219 * CTRL:CA0106-DAT
220 * ADC: WM8775EDS
221 * DAC: WM8768GEDS
222 */
223 { .serial = 0x10111102,
d5f6a38d 224 .name = "Audigy SE OEM [SB0570a]",
e4f55d80
JCD		 225 .gpio_type = 1,
226 .i2c_adc = 1,
6fef153a 227 .spi_dac = 0x4021 } ,
23156e8f
AO		 228 /* Sound Blaster 5.1vx
229 * Tested: Playback on front, rear, center/lfe speakers
230 * Not-Tested: Capture
231 */
232 { .serial = 0x10041102,
233 .name = "Sound Blaster 5.1vx [SB1070]",
234 .gpio_type = 1,
235 .i2c_adc = 0,
6fef153a 236 .spi_dac = 0x0124
23156e8f 237 } ,
1baa705b 238 /* MSI K8N Diamond Motherboard with onboard SB Live 24bit without AC97 */
be0b7b01
JCD		 239 /* SB0438
240 * CTRL:CA0106-DAT
241 * ADC: WM8775SEDS
242 * DAC: CS4382-KQZ
243 */
1baa705b
JCD		 244 { .serial = 0x10091462,
245 .name = "MSI K8N Diamond MB [SB0438]",
be0b7b01 246 .gpio_type = 2,
7199acdc 247 .i2c_adc = 1 } ,
c5d44423 248 /* MSI K8N Diamond PLUS MB */
f52845ad
TI		 249 { .serial = 0x10091102,
250 .name = "MSI K8N Diamond MB",
251 .gpio_type = 2,
c5d44423 252 .i2c_adc = 1,
6fef153a 253 .spi_dac = 0x4021 } ,
f3a374e5
TI		 254 /* Giga-byte GA-G1975X mobo
255 * Novell bnc#395807
256 */
257 /* FIXME: the GPIO and I2C setting aren't tested well */
258 { .serial = 0x1458a006,
259 .name = "Giga-byte GA-G1975X",
260 .gpio_type = 1,
261 .i2c_adc = 1 },
be3cd57a
JCD		 262 /* Shuttle XPC SD31P which has an onboard Creative Labs
263 * Sound Blaster Live! 24-bit EAX
1b05962e
JCD		 264 * high-definition 7.1 audio processor".
265 * Added using info from andrewvegan in alsa bug #1298
266 */
267 { .serial = 0x30381297,
268 .name = "Shuttle XPC SD31P [SD31P]",
269 .gpio_type = 1,
270 .i2c_adc = 1 } ,
be3cd57a
JCD		 271 /* Shuttle XPC SD11G5 which has an onboard Creative Labs
272 * Sound Blaster Live! 24-bit EAX
273 * high-definition 7.1 audio processor".
274 * Fixes ALSA bug#1600
275 */
276 { .serial = 0x30411297,
277 .name = "Shuttle XPC SD11G5 [SD11G5]",
278 .gpio_type = 1,
279 .i2c_adc = 1 } ,
1baa705b
JCD		 280 { .serial = 0,
281 .name = "AudigyLS [Unknown]" }
1da177e4
LT		 282};
283
284/* hardware definition */
d1876fe6 285static const struct snd_pcm_hardware snd_ca0106_playback_hw = {
b83f346b
CL		 286 .info = SNDRV_PCM_INFO_MMAP |
287 SNDRV_PCM_INFO_INTERLEAVED |
288 SNDRV_PCM_INFO_BLOCK_TRANSFER |
289 SNDRV_PCM_INFO_MMAP_VALID |
290 SNDRV_PCM_INFO_SYNC_START,
1da177e4 291 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
95a98265
TI		 292 .rates = (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
293 SNDRV_PCM_RATE_192000),
1da177e4
LT		 294 .rate_min = 48000,
295 .rate_max = 192000,
296 .channels_min = 2, //1,
297 .channels_max = 2, //6,
298 .buffer_bytes_max = ((65536 - 64) * 8),
299 .period_bytes_min = 64,
300 .period_bytes_max = (65536 - 64),
301 .periods_min = 2,
302 .periods_max = 8,
303 .fifo_size = 0,
304};
305
d1876fe6 306static const struct snd_pcm_hardware snd_ca0106_capture_hw = {
1da177e4
LT		 307 .info = (SNDRV_PCM_INFO_MMAP |
308 SNDRV_PCM_INFO_INTERLEAVED |
309 SNDRV_PCM_INFO_BLOCK_TRANSFER |
310 SNDRV_PCM_INFO_MMAP_VALID),
883130b4 311 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
ff75427a 312#if 0 /* FIXME: looks like 44.1kHz capture causes noisy output on 48kHz */
95a98265
TI		 313 .rates = (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
314 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
883130b4 315 .rate_min = 44100,
ff75427a
TI		 316#else
317 .rates = (SNDRV_PCM_RATE_48000 |
318 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
319 .rate_min = 48000,
320#endif /* FIXME */
883130b4 321 .rate_max = 192000,
1da177e4
LT		 322 .channels_min = 2,
323 .channels_max = 2,
34fdeb2d 324 .buffer_bytes_max = 65536 - 128,
1da177e4 325 .period_bytes_min = 64,
34fdeb2d 326 .period_bytes_max = 32768 - 64,
1da177e4
LT		 327 .periods_min = 2,
328 .periods_max = 2,
329 .fifo_size = 0,
330};
331
e4a3d145 332unsigned int snd_ca0106_ptr_read(struct snd_ca0106 * emu,
1da177e4
LT		 333 unsigned int reg,
334 unsigned int chn)
335{
336 unsigned long flags;
337 unsigned int regptr, val;
338
339 regptr = (reg << 16) | chn;
340
341 spin_lock_irqsave(&emu->emu_lock, flags);
342 outl(regptr, emu->port + PTR);
343 val = inl(emu->port + DATA);
344 spin_unlock_irqrestore(&emu->emu_lock, flags);
345 return val;
346}
347
e4a3d145 348void snd_ca0106_ptr_write(struct snd_ca0106 *emu,
1da177e4
LT		 349 unsigned int reg,
350 unsigned int chn,
351 unsigned int data)
352{
353 unsigned int regptr;
354 unsigned long flags;
355
356 regptr = (reg << 16) | chn;
357
358 spin_lock_irqsave(&emu->emu_lock, flags);
359 outl(regptr, emu->port + PTR);
360 outl(data, emu->port + DATA);
361 spin_unlock_irqrestore(&emu->emu_lock, flags);
362}
363
aad90953
JCD		 364int snd_ca0106_spi_write(struct snd_ca0106 * emu,
365 unsigned int data)
a5875159 366{
aad90953
JCD		 367 unsigned int reset, set;
368 unsigned int reg, tmp;
369 int n, result;
370 reg = SPI;
371 if (data > 0xffff) /* Only 16bit values allowed */
372 return 1;
373 tmp = snd_ca0106_ptr_read(emu, reg, 0);
374 reset = (tmp & ~0x3ffff) | 0x20000; /* Set xxx20000 */
375 set = reset | 0x10000; /* Set xxx1xxxx */
376 snd_ca0106_ptr_write(emu, reg, 0, reset | data);
377 tmp = snd_ca0106_ptr_read(emu, reg, 0); /* write post */
378 snd_ca0106_ptr_write(emu, reg, 0, set | data);
379 result = 1;
380 /* Wait for status bit to return to 0 */
381 for (n = 0; n < 100; n++) {
382 udelay(10);
383 tmp = snd_ca0106_ptr_read(emu, reg, 0);
384 if (!(tmp & 0x10000)) {
385 result = 0;
386 break;
387 }
388 }
389 if (result) /* Timed out */
390 return 1;
391 snd_ca0106_ptr_write(emu, reg, 0, reset | data);
392 tmp = snd_ca0106_ptr_read(emu, reg, 0); /* Write post */
a5875159
JCD		 393 return 0;
394}
395
6129daaa 396/* The ADC does not support i2c read, so only write is implemented */
e4a3d145 397int snd_ca0106_i2c_write(struct snd_ca0106 *emu,
7199acdc
JCD		 398 u32 reg,
399 u32 value)
400{
401 u32 tmp;
95a98265 402 int timeout = 0;
7199acdc
JCD		 403 int status;
404 int retry;
95a98265 405 if ((reg > 0x7f) || (value > 0x1ff)) {
74103227 406 dev_err(emu->card->dev, "i2c_write: invalid values.\n");
7199acdc
JCD		 407 return -EINVAL;
408 }
409
410 tmp = reg << 25 | value << 16;
ee419653 411 /*
74103227 412 dev_dbg(emu->card->dev, "I2C-write:reg=0x%x, value=0x%x\n", reg, value);
ee419653 413 */
8fabab15
JCD		 414 /* Not sure what this I2C channel controls. */
415 /* snd_ca0106_ptr_write(emu, I2C_D0, 0, tmp); */
416
417 /* This controls the I2C connected to the WM8775 ADC Codec */
7199acdc
JCD		 418 snd_ca0106_ptr_write(emu, I2C_D1, 0, tmp);
419
95a98265 420 for (retry = 0; retry < 10; retry++) {
7199acdc 421 /* Send the data to i2c */
6129daaa
JCD		 422 //tmp = snd_ca0106_ptr_read(emu, I2C_A, 0);
423 //tmp = tmp & ~(I2C_A_ADC_READ|I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD_MASK);
424 tmp = 0;
7199acdc
JCD		 425 tmp = tmp | (I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD);
426 snd_ca0106_ptr_write(emu, I2C_A, 0, tmp);
427
428 /* Wait till the transaction ends */
95a98265 429 while (1) {
7199acdc 430 status = snd_ca0106_ptr_read(emu, I2C_A, 0);
74103227 431 /*dev_dbg(emu->card->dev, "I2C:status=0x%x\n", status);*/
7199acdc 432 timeout++;
95a98265 433 if ((status & I2C_A_ADC_START) == 0)
7199acdc
JCD		 434 break;
435
95a98265 436 if (timeout > 1000)
7199acdc
JCD		 437 break;
438 }
439 //Read back and see if the transaction is successful
95a98265 440 if ((status & I2C_A_ADC_ABORT) == 0)
7199acdc
JCD		 441 break;
442 }
443
95a98265 444 if (retry == 10) {
74103227 445 dev_err(emu->card->dev, "Writing to ADC failed!\n");
7199acdc
JCD		 446 return -EINVAL;
447 }
448
449 return 0;
450}
451
452
e4a3d145 453static void snd_ca0106_intr_enable(struct snd_ca0106 *emu, unsigned int intrenb)
1da177e4
LT		 454{
455 unsigned long flags;
d967a027
HH		 456 unsigned int intr_enable;
457
1da177e4 458 spin_lock_irqsave(&emu->emu_lock, flags);
d967a027
HH		 459 intr_enable = inl(emu->port + INTE) | intrenb;
460 outl(intr_enable, emu->port + INTE);
1da177e4
LT		 461 spin_unlock_irqrestore(&emu->emu_lock, flags);
462}
463
e4a3d145 464static void snd_ca0106_intr_disable(struct snd_ca0106 *emu, unsigned int intrenb)
8a5afd29
JCD		 465{
466 unsigned long flags;
d967a027
HH		 467 unsigned int intr_enable;
468
8a5afd29 469 spin_lock_irqsave(&emu->emu_lock, flags);
d967a027
HH		 470 intr_enable = inl(emu->port + INTE) & ~intrenb;
471 outl(intr_enable, emu->port + INTE);
8a5afd29
JCD		 472 spin_unlock_irqrestore(&emu->emu_lock, flags);
473}
474
475
e4a3d145 476static void snd_ca0106_pcm_free_substream(struct snd_pcm_runtime *runtime)
1da177e4 477{
4d572776 478 kfree(runtime->private_data);
1da177e4
LT		 479}
480
48510070 481static const int spi_dacd_reg[] = {
861391d3
AO		 482 SPI_DACD0_REG,
483 SPI_DACD1_REG,
484 SPI_DACD2_REG,
485 0,
486 SPI_DACD4_REG,
48510070
TP		 487};
488static const int spi_dacd_bit[] = {
861391d3
AO		 489 SPI_DACD0_BIT,
490 SPI_DACD1_BIT,
491 SPI_DACD2_BIT,
492 0,
493 SPI_DACD4_BIT,
48510070
TP		 494};
495
3d475829
TI		 496static void restore_spdif_bits(struct snd_ca0106 *chip, int idx)
497{
498 if (chip->spdif_str_bits[idx] != chip->spdif_bits[idx]) {
499 chip->spdif_str_bits[idx] = chip->spdif_bits[idx];
500 snd_ca0106_ptr_write(chip, SPCS0 + idx, 0,
501 chip->spdif_str_bits[idx]);
502 }
503}
504
74103227
TI		 505static int snd_ca0106_channel_dac(struct snd_ca0106 *chip,
506 struct snd_ca0106_details *details,
861391d3
AO		 507 int channel_id)
508{
509 switch (channel_id) {
6fef153a
AO		 510 case PCM_FRONT_CHANNEL:
511 return (details->spi_dac & 0xf000) >> (4 * 3);
512 case PCM_REAR_CHANNEL:
513 return (details->spi_dac & 0x0f00) >> (4 * 2);
514 case PCM_CENTER_LFE_CHANNEL:
515 return (details->spi_dac & 0x00f0) >> (4 * 1);
516 case PCM_UNKNOWN_CHANNEL:
517 return (details->spi_dac & 0x000f) >> (4 * 0);
518 default:
74103227 519 dev_dbg(chip->card->dev, "ca0106: unknown channel_id %d\n",
6fef153a 520 channel_id);
861391d3 521 }
861391d3
AO		 522 return 0;
523}
524
51630142
AO		 525static int snd_ca0106_pcm_power_dac(struct snd_ca0106 *chip, int channel_id,
526 int power)
527{
528 if (chip->details->spi_dac) {
74103227 529 const int dac = snd_ca0106_channel_dac(chip, chip->details,
861391d3
AO		 530 channel_id);
531 const int reg = spi_dacd_reg[dac];
532 const int bit = spi_dacd_bit[dac];
51630142
AO		 533
534 if (power)
535 /* Power up */
861391d3 536 chip->spi_dac_reg[reg] &= ~bit;
51630142
AO		 537 else
538 /* Power down */
861391d3 539 chip->spi_dac_reg[reg] |= bit;
51630142
AO		 540 return snd_ca0106_spi_write(chip, chip->spi_dac_reg[reg]);
541 }
542 return 0;
543}
544
1da177e4 545/* open_playback callback */
e4a3d145
TI		 546static int snd_ca0106_pcm_open_playback_channel(struct snd_pcm_substream *substream,
547 int channel_id)
1da177e4 548{
e4a3d145
TI		 549 struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
550 struct snd_ca0106_channel *channel = &(chip->playback_channels[channel_id]);
551 struct snd_ca0106_pcm *epcm;
552 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 553 int err;
554
e560d8d8 555 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
1da177e4
LT		 556
557 if (epcm == NULL)
558 return -ENOMEM;
559 epcm->emu = chip;
560 epcm->substream = substream;
561 epcm->channel_id=channel_id;
562
563 runtime->private_data = epcm;
564 runtime->private_free = snd_ca0106_pcm_free_substream;
565
566 runtime->hw = snd_ca0106_playback_hw;
567
568 channel->emu = chip;
569 channel->number = channel_id;
570
95a98265 571 channel->use = 1;
ee419653 572 /*
74103227 573 dev_dbg(chip->card->dev, "open:channel_id=%d, chip=%p, channel=%p\n",
ee419653
TI		 574 channel_id, chip, channel);
575 */
1da177e4 576 //channel->interrupt = snd_ca0106_pcm_channel_interrupt;
95a98265 577 channel->epcm = epcm;
1da177e4
LT		 578 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
579 return err;
580 if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
581 return err;
b83f346b 582 snd_pcm_set_sync(substream);
48510070 583
51630142
AO		 584 /* Front channel dac should already be on */
585 if (channel_id != PCM_FRONT_CHANNEL) {
586 err = snd_ca0106_pcm_power_dac(chip, channel_id, 1);
48510070
TP		 587 if (err < 0)
588 return err;
589 }
3d475829
TI		 590
591 restore_spdif_bits(chip, channel_id);
592
1da177e4
LT		 593 return 0;
594}
595
596/* close callback */
e4a3d145 597static int snd_ca0106_pcm_close_playback(struct snd_pcm_substream *substream)
1da177e4 598{
e4a3d145
TI		 599 struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
600 struct snd_pcm_runtime *runtime = substream->runtime;
601 struct snd_ca0106_pcm *epcm = runtime->private_data;
602 chip->playback_channels[epcm->channel_id].use = 0;
48510070 603
3d475829
TI		 604 restore_spdif_bits(chip, epcm->channel_id);
605
51630142
AO		 606 /* Front channel dac should stay on */
607 if (epcm->channel_id != PCM_FRONT_CHANNEL) {
608 int err;
609 err = snd_ca0106_pcm_power_dac(chip, epcm->channel_id, 0);
610 if (err < 0)
611 return err;
48510070 612 }
51630142 613
e4a3d145 614 /* FIXME: maybe zero others */
1da177e4
LT		 615 return 0;
616}
617
e4a3d145 618static int snd_ca0106_pcm_open_playback_front(struct snd_pcm_substream *substream)
1da177e4
LT		 619{
620 return snd_ca0106_pcm_open_playback_channel(substream, PCM_FRONT_CHANNEL);
621}
622
e4a3d145 623static int snd_ca0106_pcm_open_playback_center_lfe(struct snd_pcm_substream *substream)
1da177e4
LT		 624{
625 return snd_ca0106_pcm_open_playback_channel(substream, PCM_CENTER_LFE_CHANNEL);
626}
627
e4a3d145 628static int snd_ca0106_pcm_open_playback_unknown(struct snd_pcm_substream *substream)
1da177e4
LT		 629{
630 return snd_ca0106_pcm_open_playback_channel(substream, PCM_UNKNOWN_CHANNEL);
631}
632
e4a3d145 633static int snd_ca0106_pcm_open_playback_rear(struct snd_pcm_substream *substream)
1da177e4
LT		 634{
635 return snd_ca0106_pcm_open_playback_channel(substream, PCM_REAR_CHANNEL);
636}
637
638/* open_capture callback */
e4a3d145
TI		 639static int snd_ca0106_pcm_open_capture_channel(struct snd_pcm_substream *substream,
640 int channel_id)
1da177e4 641{
e4a3d145
TI		 642 struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
643 struct snd_ca0106_channel *channel = &(chip->capture_channels[channel_id]);
644 struct snd_ca0106_pcm *epcm;
645 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 646 int err;
647
e560d8d8 648 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
f197acd2 649 if (!epcm)
1da177e4 650 return -ENOMEM;
f197acd2 651
1da177e4
LT		 652 epcm->emu = chip;
653 epcm->substream = substream;
654 epcm->channel_id=channel_id;
655
656 runtime->private_data = epcm;
657 runtime->private_free = snd_ca0106_pcm_free_substream;
658
659 runtime->hw = snd_ca0106_capture_hw;
660
661 channel->emu = chip;
662 channel->number = channel_id;
663
95a98265 664 channel->use = 1;
ee419653 665 /*
74103227 666 dev_dbg(chip->card->dev, "open:channel_id=%d, chip=%p, channel=%p\n",
ee419653
TI		 667 channel_id, chip, channel);
668 */
1da177e4 669 //channel->interrupt = snd_ca0106_pcm_channel_interrupt;
e4a3d145 670 channel->epcm = epcm;
1da177e4
LT		 671 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
672 return err;
673 //snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_capture_period_sizes);
674 if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
675 return err;
676 return 0;
677}
678
679/* close callback */
e4a3d145 680static int snd_ca0106_pcm_close_capture(struct snd_pcm_substream *substream)
1da177e4 681{
e4a3d145
TI		 682 struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
683 struct snd_pcm_runtime *runtime = substream->runtime;
684 struct snd_ca0106_pcm *epcm = runtime->private_data;
685 chip->capture_channels[epcm->channel_id].use = 0;
686 /* FIXME: maybe zero others */
1da177e4
LT		 687 return 0;
688}
689
e4a3d145 690static int snd_ca0106_pcm_open_0_capture(struct snd_pcm_substream *substream)
1da177e4
LT		 691{
692 return snd_ca0106_pcm_open_capture_channel(substream, 0);
693}
694
e4a3d145 695static int snd_ca0106_pcm_open_1_capture(struct snd_pcm_substream *substream)
1da177e4
LT		 696{
697 return snd_ca0106_pcm_open_capture_channel(substream, 1);
698}
699
e4a3d145 700static int snd_ca0106_pcm_open_2_capture(struct snd_pcm_substream *substream)
1da177e4
LT		 701{
702 return snd_ca0106_pcm_open_capture_channel(substream, 2);
703}
704
e4a3d145 705static int snd_ca0106_pcm_open_3_capture(struct snd_pcm_substream *substream)
1da177e4
LT		 706{
707 return snd_ca0106_pcm_open_capture_channel(substream, 3);
708}
709
710/* hw_params callback */
e4a3d145
TI		 711static int snd_ca0106_pcm_hw_params_playback(struct snd_pcm_substream *substream,
712 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 713{
714 return snd_pcm_lib_malloc_pages(substream,
715 params_buffer_bytes(hw_params));
716}
717
718/* hw_free callback */
e4a3d145 719static int snd_ca0106_pcm_hw_free_playback(struct snd_pcm_substream *substream)
1da177e4
LT		 720{
721 return snd_pcm_lib_free_pages(substream);
722}
723
724/* hw_params callback */
e4a3d145
TI		 725static int snd_ca0106_pcm_hw_params_capture(struct snd_pcm_substream *substream,
726 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 727{
728 return snd_pcm_lib_malloc_pages(substream,
729 params_buffer_bytes(hw_params));
730}
731
732/* hw_free callback */
e4a3d145 733static int snd_ca0106_pcm_hw_free_capture(struct snd_pcm_substream *substream)
1da177e4
LT		 734{
735 return snd_pcm_lib_free_pages(substream);
736}
737
738/* prepare playback callback */
e4a3d145 739static int snd_ca0106_pcm_prepare_playback(struct snd_pcm_substream *substream)
1da177e4 740{
e4a3d145
TI		 741 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
742 struct snd_pcm_runtime *runtime = substream->runtime;
743 struct snd_ca0106_pcm *epcm = runtime->private_data;
1da177e4
LT		 744 int channel = epcm->channel_id;
745 u32 *table_base = (u32 *)(emu->buffer.area+(8*16*channel));
746 u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
747 u32 hcfg_mask = HCFG_PLAYBACK_S32_LE;
748 u32 hcfg_set = 0x00000000;
749 u32 hcfg;
750 u32 reg40_mask = 0x30000 << (channel<<1);
751 u32 reg40_set = 0;
752 u32 reg40;
753 /* FIXME: Depending on mixer selection of SPDIF out or not, select the spdif rate or the DAC rate. */
754 u32 reg71_mask = 0x03030000 ; /* Global. Set SPDIF rate. We only support 44100 to spdif, not to DAC. */
755 u32 reg71_set = 0;
756 u32 reg71;
757 int i;
758
ee419653 759#if 0 /* debug */
74103227 760 dev_dbg(emu->card->dev,
ee419653
TI		 761 "prepare:channel_number=%d, rate=%d, format=0x%x, "
762 "channels=%d, buffer_size=%ld, period_size=%ld, "
763 "periods=%u, frames_to_bytes=%d\n",
764 channel, runtime->rate, runtime->format,
765 runtime->channels, runtime->buffer_size,
766 runtime->period_size, runtime->periods,
767 frames_to_bytes(runtime, 1));
74103227
TI		 768 dev_dbg(emu->card->dev,
769 "dma_addr=%x, dma_area=%p, table_base=%p\n",
ee419653 770 runtime->dma_addr, runtime->dma_area, table_base);
74103227
TI		 771 dev_dbg(emu->card->dev,
772 "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
ee419653
TI		 773 emu->buffer.addr, emu->buffer.area, emu->buffer.bytes);
774#endif /* debug */
1da177e4
LT		 775 /* Rate can be set per channel. */
776 /* reg40 control host to fifo */
777 /* reg71 controls DAC rate. */
778 switch (runtime->rate) {
779 case 44100:
780 reg40_set = 0x10000 << (channel<<1);
781 reg71_set = 0x01010000;
782 break;
783 case 48000:
784 reg40_set = 0;
785 reg71_set = 0;
786 break;
787 case 96000:
788 reg40_set = 0x20000 << (channel<<1);
789 reg71_set = 0x02020000;
790 break;
791 case 192000:
792 reg40_set = 0x30000 << (channel<<1);
793 reg71_set = 0x03030000;
794 break;
795 default:
796 reg40_set = 0;
797 reg71_set = 0;
798 break;
799 }
800 /* Format is a global setting */
801 /* FIXME: Only let the first channel accessed set this. */
802 switch (runtime->format) {
803 case SNDRV_PCM_FORMAT_S16_LE:
804 hcfg_set = 0;
805 break;
806 case SNDRV_PCM_FORMAT_S32_LE:
807 hcfg_set = HCFG_PLAYBACK_S32_LE;
808 break;
809 default:
810 hcfg_set = 0;
811 break;
812 }
813 hcfg = inl(emu->port + HCFG) ;
814 hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
815 outl(hcfg, emu->port + HCFG);
816 reg40 = snd_ca0106_ptr_read(emu, 0x40, 0);
817 reg40 = (reg40 & ~reg40_mask) | reg40_set;
818 snd_ca0106_ptr_write(emu, 0x40, 0, reg40);
819 reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
820 reg71 = (reg71 & ~reg71_mask) | reg71_set;
821 snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
822
823 /* FIXME: Check emu->buffer.size before actually writing to it. */
824 for(i=0; i < runtime->periods; i++) {
95a98265
TI		 825 table_base[i*2] = runtime->dma_addr + (i * period_size_bytes);
826 table_base[i*2+1] = period_size_bytes << 16;
1da177e4
LT		 827 }
828
829 snd_ca0106_ptr_write(emu, PLAYBACK_LIST_ADDR, channel, emu->buffer.addr+(8*16*channel));
830 snd_ca0106_ptr_write(emu, PLAYBACK_LIST_SIZE, channel, (runtime->periods - 1) << 19);
831 snd_ca0106_ptr_write(emu, PLAYBACK_LIST_PTR, channel, 0);
832 snd_ca0106_ptr_write(emu, PLAYBACK_DMA_ADDR, channel, runtime->dma_addr);
833 snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, frames_to_bytes(runtime, runtime->period_size)<<16); // buffer size in bytes
834 /* FIXME test what 0 bytes does. */
835 snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, 0); // buffer size in bytes
836 snd_ca0106_ptr_write(emu, PLAYBACK_POINTER, channel, 0);
837 snd_ca0106_ptr_write(emu, 0x07, channel, 0x0);
838 snd_ca0106_ptr_write(emu, 0x08, channel, 0);
839 snd_ca0106_ptr_write(emu, PLAYBACK_MUTE, 0x0, 0x0); /* Unmute output */
840#if 0
841 snd_ca0106_ptr_write(emu, SPCS0, 0,
842 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
843 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
844 SPCS_GENERATIONSTATUS | 0x00001200 |
845 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT );
1da177e4
LT		 846#endif
847
848 return 0;
849}
850
851/* prepare capture callback */
e4a3d145 852static int snd_ca0106_pcm_prepare_capture(struct snd_pcm_substream *substream)
1da177e4 853{
e4a3d145
TI		 854 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
855 struct snd_pcm_runtime *runtime = substream->runtime;
856 struct snd_ca0106_pcm *epcm = runtime->private_data;
1da177e4 857 int channel = epcm->channel_id;
883130b4
JCD		 858 u32 hcfg_mask = HCFG_CAPTURE_S32_LE;
859 u32 hcfg_set = 0x00000000;
860 u32 hcfg;
861 u32 over_sampling=0x2;
862 u32 reg71_mask = 0x0000c000 ; /* Global. Set ADC rate. */
863 u32 reg71_set = 0;
864 u32 reg71;
865
ee419653 866#if 0 /* debug */
74103227 867 dev_dbg(emu->card->dev,
ee419653
TI		 868 "prepare:channel_number=%d, rate=%d, format=0x%x, "
869 "channels=%d, buffer_size=%ld, period_size=%ld, "
870 "periods=%u, frames_to_bytes=%d\n",
871 channel, runtime->rate, runtime->format,
872 runtime->channels, runtime->buffer_size,
873 runtime->period_size, runtime->periods,
874 frames_to_bytes(runtime, 1));
74103227
TI		 875 dev_dbg(emu->card->dev,
876 "dma_addr=%x, dma_area=%p, table_base=%p\n",
ee419653 877 runtime->dma_addr, runtime->dma_area, table_base);
74103227
TI		 878 dev_dbg(emu->card->dev,
879 "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
ee419653
TI		 880 emu->buffer.addr, emu->buffer.area, emu->buffer.bytes);
881#endif /* debug */
883130b4
JCD		 882 /* reg71 controls ADC rate. */
883 switch (runtime->rate) {
884 case 44100:
885 reg71_set = 0x00004000;
886 break;
887 case 48000:
888 reg71_set = 0;
889 break;
890 case 96000:
891 reg71_set = 0x00008000;
892 over_sampling=0xa;
893 break;
894 case 192000:
895 reg71_set = 0x0000c000;
896 over_sampling=0xa;
897 break;
898 default:
899 reg71_set = 0;
900 break;
901 }
902 /* Format is a global setting */
903 /* FIXME: Only let the first channel accessed set this. */
904 switch (runtime->format) {
905 case SNDRV_PCM_FORMAT_S16_LE:
906 hcfg_set = 0;
907 break;
908 case SNDRV_PCM_FORMAT_S32_LE:
909 hcfg_set = HCFG_CAPTURE_S32_LE;
910 break;
911 default:
912 hcfg_set = 0;
913 break;
914 }
915 hcfg = inl(emu->port + HCFG) ;
916 hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
917 outl(hcfg, emu->port + HCFG);
918 reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
919 reg71 = (reg71 & ~reg71_mask) | reg71_set;
920 snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
921 if (emu->details->i2c_adc == 1) { /* The SB0410 and SB0413 use I2C to control ADC. */
922 snd_ca0106_i2c_write(emu, ADC_MASTER, over_sampling); /* Adjust the over sampler to better suit the capture rate. */
923 }
924
925
ee419653 926 /*
74103227 927 dev_dbg(emu->card->dev,
ee419653
TI		 928 "prepare:channel_number=%d, rate=%d, format=0x%x, channels=%d, "
929 "buffer_size=%ld, period_size=%ld, frames_to_bytes=%d\n",
930 channel, runtime->rate, runtime->format, runtime->channels,
931 runtime->buffer_size, runtime->period_size,
932 frames_to_bytes(runtime, 1));
933 */
1da177e4
LT		 934 snd_ca0106_ptr_write(emu, 0x13, channel, 0);
935 snd_ca0106_ptr_write(emu, CAPTURE_DMA_ADDR, channel, runtime->dma_addr);
936 snd_ca0106_ptr_write(emu, CAPTURE_BUFFER_SIZE, channel, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
937 snd_ca0106_ptr_write(emu, CAPTURE_POINTER, channel, 0);
938
939 return 0;
940}
941
942/* trigger_playback callback */
e4a3d145 943static int snd_ca0106_pcm_trigger_playback(struct snd_pcm_substream *substream,
1da177e4
LT		 944 int cmd)
945{
e4a3d145
TI		 946 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
947 struct snd_pcm_runtime *runtime;
948 struct snd_ca0106_pcm *epcm;
1da177e4
LT		 949 int channel;
950 int result = 0;
e4a3d145 951 struct snd_pcm_substream *s;
1da177e4
LT		 952 u32 basic = 0;
953 u32 extended = 0;
5da95273
TI		 954 u32 bits;
955 int running = 0;
1da177e4
LT		 956
957 switch (cmd) {
958 case SNDRV_PCM_TRIGGER_START:
5da95273
TI		 959 case SNDRV_PCM_TRIGGER_RESUME:
960 running = 1;
1da177e4
LT		 961 break;
962 case SNDRV_PCM_TRIGGER_STOP:
5da95273 963 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4 964 default:
5da95273 965 running = 0;
1da177e4
LT		 966 break;
967 }
ef991b95 968 snd_pcm_group_for_each_entry(s, substream) {
29998d24
CL		 969 if (snd_pcm_substream_chip(s) != emu ||
970 s->stream != SNDRV_PCM_STREAM_PLAYBACK)
971 continue;
1da177e4
LT		 972 runtime = s->runtime;
973 epcm = runtime->private_data;
974 channel = epcm->channel_id;
74103227 975 /* dev_dbg(emu->card->dev, "channel=%d\n", channel); */
1da177e4 976 epcm->running = running;
5da95273
TI		 977 basic |= (0x1 << channel);
978 extended |= (0x10 << channel);
1da177e4
LT		 979 snd_pcm_trigger_done(s, substream);
980 }
74103227 981 /* dev_dbg(emu->card->dev, "basic=0x%x, extended=0x%x\n",basic, extended); */
1da177e4
LT		 982
983 switch (cmd) {
984 case SNDRV_PCM_TRIGGER_START:
5da95273
TI		 985 case SNDRV_PCM_TRIGGER_RESUME:
986 bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
987 bits |= extended;
988 snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
989 bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
990 bits |= basic;
991 snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
1da177e4
LT		 992 break;
993 case SNDRV_PCM_TRIGGER_STOP:
5da95273
TI		 994 case SNDRV_PCM_TRIGGER_SUSPEND:
995 bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
996 bits &= ~basic;
997 snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
998 bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
999 bits &= ~extended;
1000 snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
1da177e4
LT		 1001 break;
1002 default:
1003 result = -EINVAL;
1004 break;
1005 }
1006 return result;
1007}
1008
1009/* trigger_capture callback */
e4a3d145 1010static int snd_ca0106_pcm_trigger_capture(struct snd_pcm_substream *substream,
1da177e4
LT		 1011 int cmd)
1012{
e4a3d145
TI		 1013 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
1014 struct snd_pcm_runtime *runtime = substream->runtime;
1015 struct snd_ca0106_pcm *epcm = runtime->private_data;
1da177e4
LT		 1016 int channel = epcm->channel_id;
1017 int result = 0;
1018
1019 switch (cmd) {
1020 case SNDRV_PCM_TRIGGER_START:
1021 snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) | (0x110000<<channel));
1022 snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0)|(0x100<<channel));
1023 epcm->running = 1;
1024 break;
1025 case SNDRV_PCM_TRIGGER_STOP:
1026 snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0) & ~(0x100<<channel));
1027 snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) & ~(0x110000<<channel));
1028 epcm->running = 0;
1029 break;
1030 default:
1031 result = -EINVAL;
1032 break;
1033 }
1034 return result;
1035}
1036
1037/* pointer_playback callback */
1038static snd_pcm_uframes_t
e4a3d145 1039snd_ca0106_pcm_pointer_playback(struct snd_pcm_substream *substream)
1da177e4 1040{
e4a3d145
TI		 1041 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
1042 struct snd_pcm_runtime *runtime = substream->runtime;
1043 struct snd_ca0106_pcm *epcm = runtime->private_data;
add7c0a6 1044 unsigned int ptr, prev_ptr;
1da177e4 1045 int channel = epcm->channel_id;
add7c0a6 1046 int timeout = 10;
1da177e4
LT		 1047
1048 if (!epcm->running)
1049 return 0;
1050
add7c0a6
TI		 1051 prev_ptr = -1;
1052 do {
1053 ptr = snd_ca0106_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
1054 ptr = (ptr >> 3) * runtime->period_size;
1055 ptr += bytes_to_frames(runtime,
1056 snd_ca0106_ptr_read(emu, PLAYBACK_POINTER, channel));
1057 if (ptr >= runtime->buffer_size)
1058 ptr -= runtime->buffer_size;
1059 if (prev_ptr == ptr)
1060 return ptr;
1061 prev_ptr = ptr;
1062 } while (--timeout);
74103227 1063 dev_warn(emu->card->dev, "ca0106: unstable DMA pointer!\n");
add7c0a6 1064 return 0;
1da177e4
LT		 1065}
1066
1067/* pointer_capture callback */
1068static snd_pcm_uframes_t
e4a3d145 1069snd_ca0106_pcm_pointer_capture(struct snd_pcm_substream *substream)
1da177e4 1070{
e4a3d145
TI		 1071 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
1072 struct snd_pcm_runtime *runtime = substream->runtime;
1073 struct snd_ca0106_pcm *epcm = runtime->private_data;
1da177e4 1074 snd_pcm_uframes_t ptr, ptr1, ptr2 = 0;
c521dde6 1075 int channel = epcm->channel_id;
1da177e4
LT		 1076
1077 if (!epcm->running)
1078 return 0;
1079
1080 ptr1 = snd_ca0106_ptr_read(emu, CAPTURE_POINTER, channel);
1081 ptr2 = bytes_to_frames(runtime, ptr1);
1082 ptr=ptr2;
1083 if (ptr >= runtime->buffer_size)
1084 ptr -= runtime->buffer_size;
ee419653 1085 /*
74103227 1086 dev_dbg(emu->card->dev, "ptr1 = 0x%lx, ptr2=0x%lx, ptr=0x%lx, "
ee419653
TI		 1087 "buffer_size = 0x%x, period_size = 0x%x, bits=%d, rate=%d\n",
1088 ptr1, ptr2, ptr, (int)runtime->buffer_size,
1089 (int)runtime->period_size, (int)runtime->frame_bits,
1090 (int)runtime->rate);
1091 */
1da177e4
LT		 1092 return ptr;
1093}
1094
1095/* operators */
6769e988 1096static const struct snd_pcm_ops snd_ca0106_playback_front_ops = {
1da177e4
LT		 1097 .open = snd_ca0106_pcm_open_playback_front,
1098 .close = snd_ca0106_pcm_close_playback,
1099 .ioctl = snd_pcm_lib_ioctl,
1100 .hw_params = snd_ca0106_pcm_hw_params_playback,
1101 .hw_free = snd_ca0106_pcm_hw_free_playback,
1102 .prepare = snd_ca0106_pcm_prepare_playback,
1103 .trigger = snd_ca0106_pcm_trigger_playback,
1104 .pointer = snd_ca0106_pcm_pointer_playback,
1105};
1106
6769e988 1107static const struct snd_pcm_ops snd_ca0106_capture_0_ops = {
1da177e4
LT		 1108 .open = snd_ca0106_pcm_open_0_capture,
1109 .close = snd_ca0106_pcm_close_capture,
1110 .ioctl = snd_pcm_lib_ioctl,
1111 .hw_params = snd_ca0106_pcm_hw_params_capture,
1112 .hw_free = snd_ca0106_pcm_hw_free_capture,
1113 .prepare = snd_ca0106_pcm_prepare_capture,
1114 .trigger = snd_ca0106_pcm_trigger_capture,
1115 .pointer = snd_ca0106_pcm_pointer_capture,
1116};
1117
6769e988 1118static const struct snd_pcm_ops snd_ca0106_capture_1_ops = {
1da177e4
LT		 1119 .open = snd_ca0106_pcm_open_1_capture,
1120 .close = snd_ca0106_pcm_close_capture,
1121 .ioctl = snd_pcm_lib_ioctl,
1122 .hw_params = snd_ca0106_pcm_hw_params_capture,
1123 .hw_free = snd_ca0106_pcm_hw_free_capture,
1124 .prepare = snd_ca0106_pcm_prepare_capture,
1125 .trigger = snd_ca0106_pcm_trigger_capture,
1126 .pointer = snd_ca0106_pcm_pointer_capture,
1127};
1128
6769e988 1129static const struct snd_pcm_ops snd_ca0106_capture_2_ops = {
1da177e4
LT		 1130 .open = snd_ca0106_pcm_open_2_capture,
1131 .close = snd_ca0106_pcm_close_capture,
1132 .ioctl = snd_pcm_lib_ioctl,
1133 .hw_params = snd_ca0106_pcm_hw_params_capture,
1134 .hw_free = snd_ca0106_pcm_hw_free_capture,
1135 .prepare = snd_ca0106_pcm_prepare_capture,
1136 .trigger = snd_ca0106_pcm_trigger_capture,
1137 .pointer = snd_ca0106_pcm_pointer_capture,
1138};
1139
6769e988 1140static const struct snd_pcm_ops snd_ca0106_capture_3_ops = {
1da177e4
LT		 1141 .open = snd_ca0106_pcm_open_3_capture,
1142 .close = snd_ca0106_pcm_close_capture,
1143 .ioctl = snd_pcm_lib_ioctl,
1144 .hw_params = snd_ca0106_pcm_hw_params_capture,
1145 .hw_free = snd_ca0106_pcm_hw_free_capture,
1146 .prepare = snd_ca0106_pcm_prepare_capture,
1147 .trigger = snd_ca0106_pcm_trigger_capture,
1148 .pointer = snd_ca0106_pcm_pointer_capture,
1149};
1150
6769e988 1151static const struct snd_pcm_ops snd_ca0106_playback_center_lfe_ops = {
1da177e4
LT		 1152 .open = snd_ca0106_pcm_open_playback_center_lfe,
1153 .close = snd_ca0106_pcm_close_playback,
1154 .ioctl = snd_pcm_lib_ioctl,
1155 .hw_params = snd_ca0106_pcm_hw_params_playback,
1156 .hw_free = snd_ca0106_pcm_hw_free_playback,
1157 .prepare = snd_ca0106_pcm_prepare_playback,
1158 .trigger = snd_ca0106_pcm_trigger_playback,
1159 .pointer = snd_ca0106_pcm_pointer_playback,
1160};
1161
6769e988 1162static const struct snd_pcm_ops snd_ca0106_playback_unknown_ops = {
1da177e4
LT		 1163 .open = snd_ca0106_pcm_open_playback_unknown,
1164 .close = snd_ca0106_pcm_close_playback,
1165 .ioctl = snd_pcm_lib_ioctl,
1166 .hw_params = snd_ca0106_pcm_hw_params_playback,
1167 .hw_free = snd_ca0106_pcm_hw_free_playback,
1168 .prepare = snd_ca0106_pcm_prepare_playback,
1169 .trigger = snd_ca0106_pcm_trigger_playback,
1170 .pointer = snd_ca0106_pcm_pointer_playback,
1171};
1172
6769e988 1173static const struct snd_pcm_ops snd_ca0106_playback_rear_ops = {
1da177e4
LT		 1174 .open = snd_ca0106_pcm_open_playback_rear,
1175 .close = snd_ca0106_pcm_close_playback,
1176 .ioctl = snd_pcm_lib_ioctl,
1177 .hw_params = snd_ca0106_pcm_hw_params_playback,
1178 .hw_free = snd_ca0106_pcm_hw_free_playback,
1179 .prepare = snd_ca0106_pcm_prepare_playback,
1180 .trigger = snd_ca0106_pcm_trigger_playback,
1181 .pointer = snd_ca0106_pcm_pointer_playback,
1182};
1183
1184
e4a3d145 1185static unsigned short snd_ca0106_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT		 1186 unsigned short reg)
1187{
e4a3d145 1188 struct snd_ca0106 *emu = ac97->private_data;
1da177e4
LT		 1189 unsigned long flags;
1190 unsigned short val;
1191
1192 spin_lock_irqsave(&emu->emu_lock, flags);
1193 outb(reg, emu->port + AC97ADDRESS);
1194 val = inw(emu->port + AC97DATA);
1195 spin_unlock_irqrestore(&emu->emu_lock, flags);
1196 return val;
1197}
1198
e4a3d145 1199static void snd_ca0106_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 1200 unsigned short reg, unsigned short val)
1201{
e4a3d145 1202 struct snd_ca0106 *emu = ac97->private_data;
1da177e4
LT		 1203 unsigned long flags;
1204
1205 spin_lock_irqsave(&emu->emu_lock, flags);
1206 outb(reg, emu->port + AC97ADDRESS);
1207 outw(val, emu->port + AC97DATA);
1208 spin_unlock_irqrestore(&emu->emu_lock, flags);
1209}
1210
e4a3d145 1211static int snd_ca0106_ac97(struct snd_ca0106 *chip)
1da177e4 1212{
e4a3d145
TI		 1213 struct snd_ac97_bus *pbus;
1214 struct snd_ac97_template ac97;
1da177e4 1215 int err;
e4a3d145 1216 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 1217 .write = snd_ca0106_ac97_write,
1218 .read = snd_ca0106_ac97_read,
1219 };
1220
1221 if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
1222 return err;
1223 pbus->no_vra = 1; /* we don't need VRA */
1224
1225 memset(&ac97, 0, sizeof(ac97));
1226 ac97.private_data = chip;
36c4dc42 1227 ac97.scaps = AC97_SCAP_NO_SPDIF;
1da177e4
LT		 1228 return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
1229}
1230
5da95273
TI		 1231static void ca0106_stop_chip(struct snd_ca0106 *chip);
1232
e4a3d145 1233static int snd_ca0106_free(struct snd_ca0106 *chip)
1da177e4 1234{
5da95273
TI		 1235 if (chip->res_port != NULL) {
1236 /* avoid access to already used hardware */
1237 ca0106_stop_chip(chip);
1da177e4 1238 }
ebf029da
TI		 1239 if (chip->irq >= 0)
1240 free_irq(chip->irq, chip);
1da177e4
LT		 1241 // release the data
1242#if 1
1243 if (chip->buffer.area)
1244 snd_dma_free_pages(&chip->buffer);
1245#endif
1246
1247 // release the i/o port
b1d5776d
TI		 1248 release_and_free_resource(chip->res_port);
1249
1da177e4
LT		 1250 pci_disable_device(chip->pci);
1251 kfree(chip);
1252 return 0;
1253}
1254
e4a3d145 1255static int snd_ca0106_dev_free(struct snd_device *device)
1da177e4 1256{
e4a3d145 1257 struct snd_ca0106 *chip = device->device_data;
1da177e4
LT		 1258 return snd_ca0106_free(chip);
1259}
1260
7d12e780 1261static irqreturn_t snd_ca0106_interrupt(int irq, void *dev_id)
1da177e4
LT		 1262{
1263 unsigned int status;
1264
e4a3d145 1265 struct snd_ca0106 *chip = dev_id;
1da177e4
LT		 1266 int i;
1267 int mask;
1268 unsigned int stat76;
e4a3d145 1269 struct snd_ca0106_channel *pchannel;
1da177e4 1270
1da177e4 1271 status = inl(chip->port + IPR);
1da177e4
LT		 1272 if (! status)
1273 return IRQ_NONE;
1274
1275 stat76 = snd_ca0106_ptr_read(chip, EXTENDED_INT, 0);
ee419653 1276 /*
74103227 1277 dev_dbg(emu->card->dev, "interrupt status = 0x%08x, stat76=0x%08x\n",
ee419653 1278 status, stat76);
74103227 1279 dev_dbg(emu->card->dev, "ptr=0x%08x\n",
ee419653
TI		 1280 snd_ca0106_ptr_read(chip, PLAYBACK_POINTER, 0));
1281 */
1da177e4
LT		 1282 mask = 0x11; /* 0x1 for one half, 0x10 for the other half period. */
1283 for(i = 0; i < 4; i++) {
1284 pchannel = &(chip->playback_channels[i]);
95a98265 1285 if (stat76 & mask) {
1da177e4
LT		 1286/* FIXME: Select the correct substream for period elapsed */
1287 if(pchannel->use) {
95a98265 1288 snd_pcm_period_elapsed(pchannel->epcm->substream);
74103227 1289 /* dev_dbg(emu->card->dev, "interrupt [%d] used\n", i); */
1da177e4
LT		 1290 }
1291 }
74103227
TI		 1292 /*
1293 dev_dbg(emu->card->dev, "channel=%p\n", pchannel);
1294 dev_dbg(emu->card->dev, "interrupt stat76[%d] = %08x, use=%d, channel=%d\n", i, stat76, pchannel->use, pchannel->number);
1295 */
1da177e4
LT		 1296 mask <<= 1;
1297 }
1298 mask = 0x110000; /* 0x1 for one half, 0x10 for the other half period. */
1299 for(i = 0; i < 4; i++) {
1300 pchannel = &(chip->capture_channels[i]);
95a98265 1301 if (stat76 & mask) {
1da177e4
LT		 1302/* FIXME: Select the correct substream for period elapsed */
1303 if(pchannel->use) {
95a98265 1304 snd_pcm_period_elapsed(pchannel->epcm->substream);
74103227 1305 /* dev_dbg(emu->card->dev, "interrupt [%d] used\n", i); */
1da177e4
LT		 1306 }
1307 }
74103227
TI		 1308 /*
1309 dev_dbg(emu->card->dev, "channel=%p\n", pchannel);
1310 dev_dbg(emu->card->dev, "interrupt stat76[%d] = %08x, use=%d, channel=%d\n", i, stat76, pchannel->use, pchannel->number);
1311 */
1da177e4
LT		 1312 mask <<= 1;
1313 }
1314
1315 snd_ca0106_ptr_write(chip, EXTENDED_INT, 0, stat76);
8a5afd29
JCD		 1316
1317 if (chip->midi.dev_id &&
95a98265 1318 (status & (chip->midi.ipr_tx|chip->midi.ipr_rx))) {
8a5afd29
JCD		 1319 if (chip->midi.interrupt)
1320 chip->midi.interrupt(&chip->midi, status);
1321 else
1322 chip->midi.interrupt_disable(&chip->midi, chip->midi.tx_enable | chip->midi.rx_enable);
1323 }
1324
1da177e4
LT		 1325 // acknowledge the interrupt if necessary
1326 outl(status, chip->port+IPR);
1327
1da177e4
LT		 1328 return IRQ_HANDLED;
1329}
1330
21147f91
TI		 1331static const struct snd_pcm_chmap_elem surround_map[] = {
1332 { .channels = 2,
1333 .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
1334 { }
1335};
1336
1337static const struct snd_pcm_chmap_elem clfe_map[] = {
1338 { .channels = 2,
1339 .map = { SNDRV_CHMAP_FC, SNDRV_CHMAP_LFE } },
1340 { }
1341};
1342
1343static const struct snd_pcm_chmap_elem side_map[] = {
1344 { .channels = 2,
1345 .map = { SNDRV_CHMAP_SL, SNDRV_CHMAP_SR } },
1346 { }
1347};
1348
e23e7a14 1349static int snd_ca0106_pcm(struct snd_ca0106 *emu, int device)
1da177e4 1350{
e4a3d145
TI		 1351 struct snd_pcm *pcm;
1352 struct snd_pcm_substream *substream;
21147f91 1353 const struct snd_pcm_chmap_elem *map = NULL;
1da177e4
LT		 1354 int err;
1355
5da95273
TI		 1356 err = snd_pcm_new(emu->card, "ca0106", device, 1, 1, &pcm);
1357 if (err < 0)
1da177e4
LT		 1358 return err;
1359
1360 pcm->private_data = emu;
1da177e4
LT		 1361
1362 switch (device) {
1363 case 0:
1364 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_front_ops);
1365 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_0_ops);
21147f91 1366 map = snd_pcm_std_chmaps;
1da177e4
LT		 1367 break;
1368 case 1:
1369 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_rear_ops);
1370 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_1_ops);
21147f91 1371 map = surround_map;
1da177e4
LT		 1372 break;
1373 case 2:
1374 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_center_lfe_ops);
1375 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_2_ops);
21147f91 1376 map = clfe_map;
1da177e4
LT		 1377 break;
1378 case 3:
1379 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_unknown_ops);
1380 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_3_ops);
21147f91 1381 map = side_map;
1da177e4
LT		 1382 break;
1383 }
1384
1385 pcm->info_flags = 0;
1da177e4 1386 strcpy(pcm->name, "CA0106");
1da177e4
LT		 1387
1388 for(substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1389 substream;
1390 substream = substream->next) {
5116b94a
TI		 1391 snd_pcm_lib_preallocate_pages(substream, SNDRV_DMA_TYPE_DEV,
1392 snd_dma_pci_data(emu->pci),
1393 64*1024, 64*1024);
1da177e4
LT		 1394 }
1395
1396 for (substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
1397 substream;
1398 substream = substream->next) {
5116b94a
TI		 1399 snd_pcm_lib_preallocate_pages(substream, SNDRV_DMA_TYPE_DEV,
1400 snd_dma_pci_data(emu->pci),
1401 64*1024, 64*1024);
1da177e4
LT		 1402 }
1403
21147f91
TI		 1404 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, map, 2,
1405 1 << 2, NULL);
1406 if (err < 0)
1407 return err;
1408
5da95273 1409 emu->pcm[device] = pcm;
1da177e4
LT		 1410
1411 return 0;
1412}
1413
18b5d32f 1414#define SPI_REG(reg, value) (((reg) << SPI_REG_SHIFT) | (value))
aad90953 1415static unsigned int spi_dac_init[] = {
18b5d32f
TP		 1416 SPI_REG(SPI_LDA1_REG, SPI_DA_BIT_0dB), /* 0dB dig. attenuation */
1417 SPI_REG(SPI_RDA1_REG, SPI_DA_BIT_0dB),
b87c464e
TP		 1418 SPI_REG(SPI_PL_REG, SPI_PL_BIT_L_L | SPI_PL_BIT_R_R | SPI_IZD_BIT),
1419 SPI_REG(SPI_FMT_REG, SPI_FMT_BIT_I2S | SPI_IWL_BIT_24),
18b5d32f
TP		 1420 SPI_REG(SPI_LDA2_REG, SPI_DA_BIT_0dB),
1421 SPI_REG(SPI_RDA2_REG, SPI_DA_BIT_0dB),
1422 SPI_REG(SPI_LDA3_REG, SPI_DA_BIT_0dB),
1423 SPI_REG(SPI_RDA3_REG, SPI_DA_BIT_0dB),
1424 SPI_REG(SPI_MASTDA_REG, SPI_DA_BIT_0dB),
1425 SPI_REG(9, 0x00),
b87c464e 1426 SPI_REG(SPI_MS_REG, SPI_DACD0_BIT | SPI_DACD1_BIT | SPI_DACD2_BIT),
18b5d32f
TP		 1427 SPI_REG(12, 0x00),
1428 SPI_REG(SPI_LDA4_REG, SPI_DA_BIT_0dB),
b87c464e 1429 SPI_REG(SPI_RDA4_REG, SPI_DA_BIT_0dB | SPI_DA_BIT_UPDATE),
9bfd9413 1430 SPI_REG(SPI_DACD4_REG, SPI_DACD4_BIT),
aad90953
JCD		 1431};
1432
6129daaa
JCD		 1433static unsigned int i2c_adc_init[][2] = {
1434 { 0x17, 0x00 }, /* Reset */
1435 { 0x07, 0x00 }, /* Timeout */
1436 { 0x0b, 0x22 }, /* Interface control */
1437 { 0x0c, 0x22 }, /* Master mode control */
1438 { 0x0d, 0x08 }, /* Powerdown control */
1439 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
1440 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
1441 { 0x10, 0x7b }, /* ALC Control 1 */
1442 { 0x11, 0x00 }, /* ALC Control 2 */
1443 { 0x12, 0x32 }, /* ALC Control 3 */
1444 { 0x13, 0x00 }, /* Noise gate control */
1445 { 0x14, 0xa6 }, /* Limiter control */
1446 { 0x15, ADC_MUX_LINEIN }, /* ADC Mixer control */
1447};
1448
86effd7e 1449static void ca0106_init_chip(struct snd_ca0106 *chip, int resume)
1da177e4 1450{
1da177e4 1451 int ch;
86effd7e 1452 unsigned int def_bits;
1da177e4
LT		 1453
1454 outl(0, chip->port + INTE);
1455
1456 /*
1457 * Init to 0x02109204 :
1458 * Clock accuracy = 0 (1000ppm)
1459 * Sample Rate = 2 (48kHz)
1460 * Audio Channel = 1 (Left of 2)
1461 * Source Number = 0 (Unspecified)
1462 * Generation Status = 1 (Original for Cat Code 12)
1463 * Cat Code = 12 (Digital Signal Mixer)
1464 * Mode = 0 (Mode 0)
1465 * Emphasis = 0 (None)
1466 * CP = 1 (Copyright unasserted)
1467 * AN = 0 (Audio data)
1468 * P = 0 (Consumer)
1469 */
86effd7e 1470 def_bits =
5da95273
TI		 1471 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1472 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1473 SPCS_GENERATIONSTATUS | 0x00001200 |
1474 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
86effd7e 1475 if (!resume) {
3d475829
TI		 1476 chip->spdif_str_bits[0] = chip->spdif_bits[0] = def_bits;
1477 chip->spdif_str_bits[1] = chip->spdif_bits[1] = def_bits;
1478 chip->spdif_str_bits[2] = chip->spdif_bits[2] = def_bits;
1479 chip->spdif_str_bits[3] = chip->spdif_bits[3] = def_bits;
86effd7e 1480 }
1da177e4 1481 /* Only SPCS1 has been tested */
3d475829
TI		 1482 snd_ca0106_ptr_write(chip, SPCS1, 0, chip->spdif_str_bits[1]);
1483 snd_ca0106_ptr_write(chip, SPCS0, 0, chip->spdif_str_bits[0]);
1484 snd_ca0106_ptr_write(chip, SPCS2, 0, chip->spdif_str_bits[2]);
1485 snd_ca0106_ptr_write(chip, SPCS3, 0, chip->spdif_str_bits[3]);
1da177e4
LT		 1486
1487 snd_ca0106_ptr_write(chip, PLAYBACK_MUTE, 0, 0x00fc0000);
1488 snd_ca0106_ptr_write(chip, CAPTURE_MUTE, 0, 0x00fc0000);
1489
1490 /* Write 0x8000 to AC97_REC_GAIN to mute it. */
1491 outb(AC97_REC_GAIN, chip->port + AC97ADDRESS);
1492 outw(0x8000, chip->port + AC97DATA);
5da95273 1493#if 0 /* FIXME: what are these? */
1da177e4
LT		 1494 snd_ca0106_ptr_write(chip, SPCS0, 0, 0x2108006);
1495 snd_ca0106_ptr_write(chip, 0x42, 0, 0x2108006);
1496 snd_ca0106_ptr_write(chip, 0x43, 0, 0x2108006);
1497 snd_ca0106_ptr_write(chip, 0x44, 0, 0x2108006);
1498#endif
1499
5da95273
TI		 1500 /* OSS drivers set this. */
1501 /* snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0xf0f003f); */
1502
1da177e4
LT		 1503 /* Analog or Digital output */
1504 snd_ca0106_ptr_write(chip, SPDIF_SELECT1, 0, 0xf);
5da95273
TI		 1505 /* 0x0b000000 for digital, 0x000b0000 for analog, from win2000 drivers.
1506 * Use 0x000f0000 for surround71
1507 */
1508 snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0x000f0000);
1509
1da177e4 1510 chip->spdif_enable = 0; /* Set digital SPDIF output off */
5da95273
TI		 1511 /*snd_ca0106_ptr_write(chip, 0x45, 0, 0);*/ /* Analogue out */
1512 /*snd_ca0106_ptr_write(chip, 0x45, 0, 0xf00);*/ /* Digital out */
1513
1514 /* goes to 0x40c80000 when doing SPDIF IN/OUT */
1515 snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 0, 0x40c81000);
1516 /* (Mute) CAPTURE feedback into PLAYBACK volume.
1517 * Only lower 16 bits matter.
1518 */
1519 snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 1, 0xffffffff);
1520 /* SPDIF IN Volume */
1521 snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 2, 0x30300000);
1522 /* SPDIF IN Volume, 0x70 = (vol & 0x3f) | 0x40 */
1523 snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 3, 0x00700000);
1da177e4 1524
1da177e4
LT		 1525 snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING1, 0, 0x32765410);
1526 snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING2, 0, 0x76767676);
1527 snd_ca0106_ptr_write(chip, CAPTURE_ROUTING1, 0, 0x32765410);
1528 snd_ca0106_ptr_write(chip, CAPTURE_ROUTING2, 0, 0x76767676);
5da95273
TI		 1529
1530 for (ch = 0; ch < 4; ch++) {
1531 /* Only high 16 bits matter */
1532 snd_ca0106_ptr_write(chip, CAPTURE_VOLUME1, ch, 0x30303030);
1da177e4 1533 snd_ca0106_ptr_write(chip, CAPTURE_VOLUME2, ch, 0x30303030);
5da95273
TI		 1534#if 0 /* Mute */
1535 snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0x40404040);
1536 snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0x40404040);
1537 snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0xffffffff);
1538 snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0xffffffff);
1539#endif
1da177e4 1540 }
7c157069
JCD		 1541 if (chip->details->i2c_adc == 1) {
1542 /* Select MIC, Line in, TAD in, AUX in */
1543 snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4);
1544 /* Default to CAPTURE_SOURCE to i2s in */
86effd7e
TI		 1545 if (!resume)
1546 chip->capture_source = 3;
7c157069
JCD		 1547 } else if (chip->details->ac97 == 1) {
1548 /* Default to AC97 in */
1549 snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x444400e4);
1550 /* Default to CAPTURE_SOURCE to AC97 in */
86effd7e
TI		 1551 if (!resume)
1552 chip->capture_source = 4;
7c157069
JCD		 1553 } else {
1554 /* Select MIC, Line in, TAD in, AUX in */
1555 snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4);
1556 /* Default to Set CAPTURE_SOURCE to i2s in */
86effd7e
TI		 1557 if (!resume)
1558 chip->capture_source = 3;
7c157069 1559 }
1da177e4 1560
5da95273
TI		 1561 if (chip->details->gpio_type == 2) {
1562 /* The SB0438 use GPIO differently. */
1563 /* FIXME: Still need to find out what the other GPIO bits do.
1564 * E.g. For digital spdif out.
1565 */
6129daaa 1566 outl(0x0, chip->port+GPIO);
5da95273 1567 /* outl(0x00f0e000, chip->port+GPIO); */ /* Analog */
6129daaa 1568 outl(0x005f5301, chip->port+GPIO); /* Analog */
5da95273
TI		 1569 } else if (chip->details->gpio_type == 1) {
1570 /* The SB0410 and SB0413 use GPIO differently. */
1571 /* FIXME: Still need to find out what the other GPIO bits do.
1572 * E.g. For digital spdif out.
1573 */
1da177e4 1574 outl(0x0, chip->port+GPIO);
5da95273 1575 /* outl(0x00f0e000, chip->port+GPIO); */ /* Analog */
c82bf829 1576 outl(0x005f5301, chip->port+GPIO); /* Analog */
1da177e4
LT		 1577 } else {
1578 outl(0x0, chip->port+GPIO);
1579 outl(0x005f03a3, chip->port+GPIO); /* Analog */
5da95273 1580 /* outl(0x005f02a2, chip->port+GPIO); */ /* SPDIF */
1da177e4
LT		 1581 }
1582 snd_ca0106_intr_enable(chip, 0x105); /* Win2000 uses 0x1e0 */
1583
5da95273
TI		 1584 /* outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG); */
1585 /* 0x1000 causes AC3 to fails. Maybe it effects 24 bit output. */
1586 /* outl(0x00001409, chip->port+HCFG); */
1587 /* outl(0x00000009, chip->port+HCFG); */
1588 /* AC97 2.0, Enable outputs. */
1589 outl(HCFG_AC97 | HCFG_AUDIOENABLE, chip->port+HCFG);
1da177e4 1590
5da95273
TI		 1591 if (chip->details->i2c_adc == 1) {
1592 /* The SB0410 and SB0413 use I2C to control ADC. */
6129daaa
JCD		 1593 int size, n;
1594
1595 size = ARRAY_SIZE(i2c_adc_init);
74103227 1596 /* dev_dbg(emu->card->dev, "I2C:array size=0x%x\n", size); */
5da95273
TI		 1597 for (n = 0; n < size; n++)
1598 snd_ca0106_i2c_write(chip, i2c_adc_init[n][0],
1599 i2c_adc_init[n][1]);
1600 for (n = 0; n < 4; n++) {
1601 chip->i2c_capture_volume[n][0] = 0xcf;
1602 chip->i2c_capture_volume[n][1] = 0xcf;
6129daaa 1603 }
5da95273
TI		 1604 chip->i2c_capture_source = 2; /* Line in */
1605 /* Enable Line-in capture. MIC in currently untested. */
1606 /* snd_ca0106_i2c_write(chip, ADC_MUX, ADC_MUX_LINEIN); */
7199acdc 1607 }
5da95273 1608
6fef153a 1609 if (chip->details->spi_dac) {
5da95273 1610 /* The SB0570 use SPI to control DAC. */
aad90953
JCD		 1611 int size, n;
1612
1613 size = ARRAY_SIZE(spi_dac_init);
b18cd538
TP		 1614 for (n = 0; n < size; n++) {
1615 int reg = spi_dac_init[n] >> SPI_REG_SHIFT;
1616
aad90953 1617 snd_ca0106_spi_write(chip, spi_dac_init[n]);
b18cd538
TP		 1618 if (reg < ARRAY_SIZE(chip->spi_dac_reg))
1619 chip->spi_dac_reg[reg] = spi_dac_init[n];
1620 }
9bfd9413
AO		 1621
1622 /* Enable front dac only */
1623 snd_ca0106_pcm_power_dac(chip, PCM_FRONT_CHANNEL, 1);
a5875159 1624 }
5da95273
TI		 1625}
1626
1627static void ca0106_stop_chip(struct snd_ca0106 *chip)
1628{
1629 /* disable interrupts */
1630 snd_ca0106_ptr_write(chip, BASIC_INTERRUPT, 0, 0);
1631 outl(0, chip->port + INTE);
1632 snd_ca0106_ptr_write(chip, EXTENDED_INT_MASK, 0, 0);
1633 udelay(1000);
1634 /* disable audio */
1635 /* outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG); */
1636 outl(0, chip->port + HCFG);
1637 /* FIXME: We need to stop and DMA transfers here.
1638 * But as I am not sure how yet, we cannot from the dma pages.
1639 * So we can fix: snd-malloc: Memory leak? pages not freed = 8
1640 */
1641}
7199acdc 1642
e23e7a14 1643static int snd_ca0106_create(int dev, struct snd_card *card,
5da95273
TI		 1644 struct pci_dev *pci,
1645 struct snd_ca0106 **rchip)
1646{
1647 struct snd_ca0106 *chip;
1648 struct snd_ca0106_details *c;
1649 int err;
1650 static struct snd_device_ops ops = {
1651 .dev_free = snd_ca0106_dev_free,
1652 };
1653
1654 *rchip = NULL;
7199acdc 1655
5da95273
TI		 1656 err = pci_enable_device(pci);
1657 if (err < 0)
1658 return err;
412b979c
QL		 1659 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(32)) < 0 ||
1660 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32)) < 0) {
74103227 1661 dev_err(card->dev, "error to set 32bit mask DMA\n");
5da95273
TI		 1662 pci_disable_device(pci);
1663 return -ENXIO;
1664 }
1665
1666 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1667 if (chip == NULL) {
1668 pci_disable_device(pci);
1669 return -ENOMEM;
1670 }
1671
1672 chip->card = card;
1673 chip->pci = pci;
1674 chip->irq = -1;
1675
1676 spin_lock_init(&chip->emu_lock);
1677
1678 chip->port = pci_resource_start(pci, 0);
1679 chip->res_port = request_region(chip->port, 0x20, "snd_ca0106");
1680 if (!chip->res_port) {
1681 snd_ca0106_free(chip);
74103227 1682 dev_err(card->dev, "cannot allocate the port\n");
5da95273
TI		 1683 return -EBUSY;
1684 }
1685
1686 if (request_irq(pci->irq, snd_ca0106_interrupt,
934c2b6d 1687 IRQF_SHARED, KBUILD_MODNAME, chip)) {
5da95273 1688 snd_ca0106_free(chip);
74103227 1689 dev_err(card->dev, "cannot grab irq\n");
5da95273
TI		 1690 return -EBUSY;
1691 }
1692 chip->irq = pci->irq;
1693
1694 /* This stores the periods table. */
1695 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1696 1024, &chip->buffer) < 0) {
1697 snd_ca0106_free(chip);
1698 return -ENOMEM;
1699 }
1700
1701 pci_set_master(pci);
1702 /* read serial */
1703 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
1704 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
74103227 1705 dev_info(card->dev, "Model %04x Rev %08x Serial %08x\n",
5da95273
TI		 1706 chip->model, pci->revision, chip->serial);
1707 strcpy(card->driver, "CA0106");
1708 strcpy(card->shortname, "CA0106");
1709
1710 for (c = ca0106_chip_details; c->serial; c++) {
1711 if (subsystem[dev]) {
1712 if (c->serial == subsystem[dev])
1713 break;
1714 } else if (c->serial == chip->serial)
1715 break;
1716 }
1717 chip->details = c;
1718 if (subsystem[dev]) {
74103227 1719 dev_info(card->dev, "Sound card name=%s, "
5da95273
TI		 1720 "subsystem=0x%x. Forced to subsystem=0x%x\n",
1721 c->name, chip->serial, subsystem[dev]);
1722 }
1723
1724 sprintf(card->longname, "%s at 0x%lx irq %i",
1725 c->name, chip->port, chip->irq);
1726
86effd7e 1727 ca0106_init_chip(chip, 0);
5da95273
TI		 1728
1729 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1730 if (err < 0) {
1da177e4
LT		 1731 snd_ca0106_free(chip);
1732 return err;
1733 }
1734 *rchip = chip;
1735 return 0;
1736}
1737
8a5afd29 1738
e4a3d145 1739static void ca0106_midi_interrupt_enable(struct snd_ca_midi *midi, int intr)
7cf4783b 1740{
e4a3d145 1741 snd_ca0106_intr_enable((struct snd_ca0106 *)(midi->dev_id), intr);
8a5afd29
JCD		 1742}
1743
e4a3d145 1744static void ca0106_midi_interrupt_disable(struct snd_ca_midi *midi, int intr)
7cf4783b 1745{
e4a3d145 1746 snd_ca0106_intr_disable((struct snd_ca0106 *)(midi->dev_id), intr);
8a5afd29
JCD		 1747}
1748
e4a3d145 1749static unsigned char ca0106_midi_read(struct snd_ca_midi *midi, int idx)
7cf4783b 1750{
e4a3d145
TI		 1751 return (unsigned char)snd_ca0106_ptr_read((struct snd_ca0106 *)(midi->dev_id),
1752 midi->port + idx, 0);
8a5afd29
JCD		 1753}
1754
e4a3d145 1755static void ca0106_midi_write(struct snd_ca_midi *midi, int data, int idx)
7cf4783b 1756{
e4a3d145 1757 snd_ca0106_ptr_write((struct snd_ca0106 *)(midi->dev_id), midi->port + idx, 0, data);
8a5afd29
JCD		 1758}
1759
e4a3d145 1760static struct snd_card *ca0106_dev_id_card(void *dev_id)
7cf4783b 1761{
e4a3d145 1762 return ((struct snd_ca0106 *)dev_id)->card;
8a5afd29
JCD		 1763}
1764
7cf4783b
JCD		 1765static int ca0106_dev_id_port(void *dev_id)
1766{
e4a3d145 1767 return ((struct snd_ca0106 *)dev_id)->port;
8a5afd29
JCD		 1768}
1769
e23e7a14 1770static int snd_ca0106_midi(struct snd_ca0106 *chip, unsigned int channel)
8a5afd29 1771{
e4a3d145 1772 struct snd_ca_midi *midi;
8a5afd29
JCD		 1773 char *name;
1774 int err;
1775
95a98265 1776 if (channel == CA0106_MIDI_CHAN_B) {
8a5afd29
JCD		 1777 name = "CA0106 MPU-401 (UART) B";
1778 midi = &chip->midi2;
1779 midi->tx_enable = INTE_MIDI_TX_B;
1780 midi->rx_enable = INTE_MIDI_RX_B;
1781 midi->ipr_tx = IPR_MIDI_TX_B;
1782 midi->ipr_rx = IPR_MIDI_RX_B;
1783 midi->port = MIDI_UART_B_DATA;
1784 } else {
1785 name = "CA0106 MPU-401 (UART)";
1786 midi = &chip->midi;
1787 midi->tx_enable = INTE_MIDI_TX_A;
1788 midi->rx_enable = INTE_MIDI_TX_B;
1789 midi->ipr_tx = IPR_MIDI_TX_A;
1790 midi->ipr_rx = IPR_MIDI_RX_A;
1791 midi->port = MIDI_UART_A_DATA;
1792 }
1793
1794 midi->reset = CA0106_MPU401_RESET;
1795 midi->enter_uart = CA0106_MPU401_ENTER_UART;
1796 midi->ack = CA0106_MPU401_ACK;
1797
1798 midi->input_avail = CA0106_MIDI_INPUT_AVAIL;
1799 midi->output_ready = CA0106_MIDI_OUTPUT_READY;
1800
1801 midi->channel = channel;
1802
1803 midi->interrupt_enable = ca0106_midi_interrupt_enable;
1804 midi->interrupt_disable = ca0106_midi_interrupt_disable;
1805
1806 midi->read = ca0106_midi_read;
1807 midi->write = ca0106_midi_write;
1808
1809 midi->get_dev_id_card = ca0106_dev_id_card;
1810 midi->get_dev_id_port = ca0106_dev_id_port;
1811
1812 midi->dev_id = chip;
1813
1814 if ((err = ca_midi_init(chip, midi, 0, name)) < 0)
1815 return err;
1816
1817 return 0;
1818}
1819
1820
e23e7a14 1821static int snd_ca0106_probe(struct pci_dev *pci,
1da177e4
LT		 1822 const struct pci_device_id *pci_id)
1823{
1824 static int dev;
e4a3d145
TI		 1825 struct snd_card *card;
1826 struct snd_ca0106 *chip;
5da95273 1827 int i, err;
1da177e4
LT		 1828
1829 if (dev >= SNDRV_CARDS)
1830 return -ENODEV;
1831 if (!enable[dev]) {
1832 dev++;
1833 return -ENOENT;
1834 }
1835
60c5772b
TI		 1836 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1837 0, &card);
e58de7ba
TI		 1838 if (err < 0)
1839 return err;
1da177e4 1840
5da95273
TI		 1841 err = snd_ca0106_create(dev, card, pci, &chip);
1842 if (err < 0)
1843 goto error;
72077aa3 1844 card->private_data = chip;
1da177e4 1845
5da95273
TI		 1846 for (i = 0; i < 4; i++) {
1847 err = snd_ca0106_pcm(chip, i);
1848 if (err < 0)
1849 goto error;
1da177e4 1850 }
5da95273
TI		 1851
1852 if (chip->details->ac97 == 1) {
1853 /* The SB0410 and SB0413 do not have an AC97 chip. */
1854 err = snd_ca0106_ac97(chip);
1855 if (err < 0)
1856 goto error;
1da177e4 1857 }
5da95273
TI		 1858 err = snd_ca0106_mixer(chip);
1859 if (err < 0)
1860 goto error;
1da177e4 1861
74103227 1862 dev_dbg(card->dev, "probe for MIDI channel A ...");
5da95273
TI		 1863 err = snd_ca0106_midi(chip, CA0106_MIDI_CHAN_A);
1864 if (err < 0)
1865 goto error;
74103227 1866 dev_dbg(card->dev, " done.\n");
8a5afd29 1867
1c178438 1868#ifdef CONFIG_SND_PROC_FS
1da177e4 1869 snd_ca0106_proc_init(chip);
adf1b3d2 1870#endif
1da177e4 1871
5da95273
TI		 1872 err = snd_card_register(card);
1873 if (err < 0)
1874 goto error;
1da177e4
LT		 1875
1876 pci_set_drvdata(pci, card);
1877 dev++;
1878 return 0;
5da95273
TI		 1879
1880 error:
1881 snd_card_free(card);
1882 return err;
1da177e4
LT		 1883}
1884
e23e7a14 1885static void snd_ca0106_remove(struct pci_dev *pci)
1da177e4
LT		 1886{
1887 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT		 1888}
1889
c7561cd8 1890#ifdef CONFIG_PM_SLEEP
68cb2b55 1891static int snd_ca0106_suspend(struct device *dev)
5da95273 1892{
68cb2b55 1893 struct snd_card *card = dev_get_drvdata(dev);
5da95273 1894 struct snd_ca0106 *chip = card->private_data;
5da95273
TI		 1895
1896 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
50232d62
TI		 1897 if (chip->details->ac97)
1898 snd_ac97_suspend(chip->ac97);
5da95273
TI		 1899 snd_ca0106_mixer_suspend(chip);
1900
1901 ca0106_stop_chip(chip);
5da95273
TI		 1902 return 0;
1903}
1904
68cb2b55 1905static int snd_ca0106_resume(struct device *dev)
5da95273 1906{
68cb2b55 1907 struct snd_card *card = dev_get_drvdata(dev);
5da95273
TI		 1908 struct snd_ca0106 *chip = card->private_data;
1909 int i;
1910
86effd7e 1911 ca0106_init_chip(chip, 1);
5da95273 1912
50232d62
TI		 1913 if (chip->details->ac97)
1914 snd_ac97_resume(chip->ac97);
5da95273
TI		 1915 snd_ca0106_mixer_resume(chip);
1916 if (chip->details->spi_dac) {
1917 for (i = 0; i < ARRAY_SIZE(chip->spi_dac_reg); i++)
1918 snd_ca0106_spi_write(chip, chip->spi_dac_reg[i]);
1919 }
1920
1921 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1922 return 0;
1923}
68cb2b55
TI		 1924
1925static SIMPLE_DEV_PM_OPS(snd_ca0106_pm, snd_ca0106_suspend, snd_ca0106_resume);
1926#define SND_CA0106_PM_OPS &snd_ca0106_pm
1927#else
1928#define SND_CA0106_PM_OPS NULL
5da95273
TI		 1929#endif
1930
1da177e4 1931// PCI IDs
9baa3c34 1932static const struct pci_device_id snd_ca0106_ids[] = {
0d7392e5 1933 { PCI_VDEVICE(CREATIVE, 0x0007), 0 }, /* Audigy LS or Live 24bit */
1da177e4
LT		 1934 { 0, }
1935};
1936MODULE_DEVICE_TABLE(pci, snd_ca0106_ids);
1937
1938// pci_driver definition
e9f66d9b 1939static struct pci_driver ca0106_driver = {
3733e424 1940 .name = KBUILD_MODNAME,
1da177e4
LT		 1941 .id_table = snd_ca0106_ids,
1942 .probe = snd_ca0106_probe,
e23e7a14 1943 .remove = snd_ca0106_remove,
68cb2b55
TI		 1944 .driver = {
1945 .pm = SND_CA0106_PM_OPS,
1946 },
1da177e4
LT		 1947};
1948
e9f66d9b 1949module_pci_driver(ca0106_driver);
Linux 6.x block layer and io_uring tree(s)