ALSA: bt87x: Use DIV_ROUND_UP() instead of open-coding it
[linux-2.6-block.git] / sound / pci / bt87x.c
CommitLineData
d0fa1179 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT
2/*
3 * bt87x.c - Brooktree Bt878/Bt879 driver for ALSA
4 *
5 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
6 *
7 * based on btaudio.c by Gerd Knorr <kraxel@bytesex.org>
1da177e4
LT
8 */
9
1da177e4
LT
10#include <linux/init.h>
11#include <linux/interrupt.h>
12#include <linux/pci.h>
13#include <linux/slab.h>
65a77217 14#include <linux/module.h>
1da177e4 15#include <linux/bitops.h>
6cbbfe1c 16#include <linux/io.h>
1da177e4
LT
17#include <sound/core.h>
18#include <sound/pcm.h>
19#include <sound/pcm_params.h>
20#include <sound/control.h>
21#include <sound/initval.h>
22
23MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
24MODULE_DESCRIPTION("Brooktree Bt87x audio driver");
25MODULE_LICENSE("GPL");
26MODULE_SUPPORTED_DEVICE("{{Brooktree,Bt878},"
27 "{Brooktree,Bt879}}");
28
29static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */
30static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 31static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
6581f4e7 32static int digital_rate[SNDRV_CARDS]; /* digital input rate */
6205372c 33static bool load_all; /* allow to load cards not the allowlist */
1da177e4
LT
34
35module_param_array(index, int, NULL, 0444);
36MODULE_PARM_DESC(index, "Index value for Bt87x soundcard");
37module_param_array(id, charp, NULL, 0444);
38MODULE_PARM_DESC(id, "ID string for Bt87x soundcard");
39module_param_array(enable, bool, NULL, 0444);
40MODULE_PARM_DESC(enable, "Enable Bt87x soundcard");
41module_param_array(digital_rate, int, NULL, 0444);
42MODULE_PARM_DESC(digital_rate, "Digital input rate for Bt87x soundcard");
43module_param(load_all, bool, 0444);
6205372c 44MODULE_PARM_DESC(load_all, "Allow to load cards not on the allowlist");
1da177e4
LT
45
46
1da177e4
LT
47/* register offsets */
48#define REG_INT_STAT 0x100 /* interrupt status */
49#define REG_INT_MASK 0x104 /* interrupt mask */
50#define REG_GPIO_DMA_CTL 0x10c /* audio control */
51#define REG_PACKET_LEN 0x110 /* audio packet lengths */
52#define REG_RISC_STRT_ADD 0x114 /* RISC program start address */
53#define REG_RISC_COUNT 0x120 /* RISC program counter */
54
55/* interrupt bits */
56#define INT_OFLOW (1 << 3) /* audio A/D overflow */
57#define INT_RISCI (1 << 11) /* RISC instruction IRQ bit set */
58#define INT_FBUS (1 << 12) /* FIFO overrun due to bus access latency */
59#define INT_FTRGT (1 << 13) /* FIFO overrun due to target latency */
60#define INT_FDSR (1 << 14) /* FIFO data stream resynchronization */
61#define INT_PPERR (1 << 15) /* PCI parity error */
62#define INT_RIPERR (1 << 16) /* RISC instruction parity error */
63#define INT_PABORT (1 << 17) /* PCI master or target abort */
64#define INT_OCERR (1 << 18) /* invalid opcode */
65#define INT_SCERR (1 << 19) /* sync counter overflow */
66#define INT_RISC_EN (1 << 27) /* DMA controller running */
67#define INT_RISCS_SHIFT 28 /* RISC status bits */
68
69/* audio control bits */
70#define CTL_FIFO_ENABLE (1 << 0) /* enable audio data FIFO */
71#define CTL_RISC_ENABLE (1 << 1) /* enable audio DMA controller */
72#define CTL_PKTP_4 (0 << 2) /* packet mode FIFO trigger point - 4 DWORDs */
73#define CTL_PKTP_8 (1 << 2) /* 8 DWORDs */
74#define CTL_PKTP_16 (2 << 2) /* 16 DWORDs */
75#define CTL_ACAP_EN (1 << 4) /* enable audio capture */
76#define CTL_DA_APP (1 << 5) /* GPIO input */
77#define CTL_DA_IOM_AFE (0 << 6) /* audio A/D input */
78#define CTL_DA_IOM_DA (1 << 6) /* digital audio input */
79#define CTL_DA_SDR_SHIFT 8 /* DDF first stage decimation rate */
80#define CTL_DA_SDR_MASK (0xf<< 8)
81#define CTL_DA_LMT (1 << 12) /* limit audio data values */
82#define CTL_DA_ES2 (1 << 13) /* enable DDF stage 2 */
83#define CTL_DA_SBR (1 << 14) /* samples rounded to 8 bits */
84#define CTL_DA_DPM (1 << 15) /* data packet mode */
85#define CTL_DA_LRD_SHIFT 16 /* ALRCK delay */
86#define CTL_DA_MLB (1 << 21) /* MSB/LSB format */
87#define CTL_DA_LRI (1 << 22) /* left/right indication */
88#define CTL_DA_SCE (1 << 23) /* sample clock edge */
89#define CTL_A_SEL_STV (0 << 24) /* TV tuner audio input */
90#define CTL_A_SEL_SFM (1 << 24) /* FM audio input */
91#define CTL_A_SEL_SML (2 << 24) /* mic/line audio input */
92#define CTL_A_SEL_SMXC (3 << 24) /* MUX bypass */
93#define CTL_A_SEL_SHIFT 24
94#define CTL_A_SEL_MASK (3 << 24)
95#define CTL_A_PWRDN (1 << 26) /* analog audio power-down */
96#define CTL_A_G2X (1 << 27) /* audio gain boost */
97#define CTL_A_GAIN_SHIFT 28 /* audio input gain */
98#define CTL_A_GAIN_MASK (0xf<<28)
99
100/* RISC instruction opcodes */
101#define RISC_WRITE (0x1 << 28) /* write FIFO data to memory at address */
102#define RISC_WRITEC (0x5 << 28) /* write FIFO data to memory at current address */
103#define RISC_SKIP (0x2 << 28) /* skip FIFO data */
104#define RISC_JUMP (0x7 << 28) /* jump to address */
105#define RISC_SYNC (0x8 << 28) /* synchronize with FIFO */
106
107/* RISC instruction bits */
108#define RISC_BYTES_ENABLE (0xf << 12) /* byte enable bits */
109#define RISC_RESYNC ( 1 << 15) /* disable FDSR errors */
110#define RISC_SET_STATUS_SHIFT 16 /* set status bits */
111#define RISC_RESET_STATUS_SHIFT 20 /* clear status bits */
112#define RISC_IRQ ( 1 << 24) /* interrupt */
113#define RISC_EOL ( 1 << 26) /* end of line */
114#define RISC_SOL ( 1 << 27) /* start of line */
115
116/* SYNC status bits values */
117#define RISC_SYNC_FM1 0x6
118#define RISC_SYNC_VRO 0xc
119
120#define ANALOG_CLOCK 1792000
121#ifdef CONFIG_SND_BT87X_OVERCLOCK
122#define CLOCK_DIV_MIN 1
123#else
124#define CLOCK_DIV_MIN 4
125#endif
126#define CLOCK_DIV_MAX 15
127
128#define ERROR_INTERRUPTS (INT_FBUS | INT_FTRGT | INT_PPERR | \
129 INT_RIPERR | INT_PABORT | INT_OCERR)
130#define MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS)
131
132/* SYNC, one WRITE per line, one extra WRITE per page boundary, SYNC, JUMP */
133#define MAX_RISC_SIZE ((1 + 255 + (PAGE_ALIGN(255 * 4092) / PAGE_SIZE - 1) + 1 + 1) * 8)
134
dcfb4140
TP
135/* Cards with configuration information */
136enum snd_bt87x_boardid {
c818e0a1 137 SND_BT87X_BOARD_UNKNOWN,
dcfb4140
TP
138 SND_BT87X_BOARD_GENERIC, /* both an & dig interfaces, 32kHz */
139 SND_BT87X_BOARD_ANALOG, /* board with no external A/D */
140 SND_BT87X_BOARD_OSPREY2x0,
141 SND_BT87X_BOARD_OSPREY440,
142 SND_BT87X_BOARD_AVPHONE98,
143};
144
145/* Card configuration */
146struct snd_bt87x_board {
147 int dig_rate; /* Digital input sampling rate */
148 u32 digital_fmt; /* Register settings for digital input */
149 unsigned no_analog:1; /* No analog input */
150 unsigned no_digital:1; /* No digital input */
151};
152
baa9df20 153static const struct snd_bt87x_board snd_bt87x_boards[] = {
c818e0a1
CL
154 [SND_BT87X_BOARD_UNKNOWN] = {
155 .dig_rate = 32000, /* just a guess */
156 },
dcfb4140
TP
157 [SND_BT87X_BOARD_GENERIC] = {
158 .dig_rate = 32000,
159 },
160 [SND_BT87X_BOARD_ANALOG] = {
161 .no_digital = 1,
162 },
163 [SND_BT87X_BOARD_OSPREY2x0] = {
164 .dig_rate = 44100,
165 .digital_fmt = CTL_DA_LRI | (1 << CTL_DA_LRD_SHIFT),
166 },
167 [SND_BT87X_BOARD_OSPREY440] = {
168 .dig_rate = 32000,
169 .digital_fmt = CTL_DA_LRI | (1 << CTL_DA_LRD_SHIFT),
170 .no_analog = 1,
171 },
172 [SND_BT87X_BOARD_AVPHONE98] = {
173 .dig_rate = 48000,
174 },
175};
176
1da177e4 177struct snd_bt87x {
9f362dce 178 struct snd_card *card;
1da177e4 179 struct pci_dev *pci;
dcfb4140 180 struct snd_bt87x_board board;
1da177e4
LT
181
182 void __iomem *mmio;
183 int irq;
184
1da177e4 185 spinlock_t reg_lock;
64b33619 186 unsigned long opened;
9f362dce 187 struct snd_pcm_substream *substream;
1da177e4
LT
188
189 struct snd_dma_buffer dma_risc;
190 unsigned int line_bytes;
191 unsigned int lines;
192
193 u32 reg_control;
194 u32 interrupt_mask;
195
196 int current_line;
197
198 int pci_parity_errors;
199};
200
201enum { DEVICE_DIGITAL, DEVICE_ANALOG };
202
9f362dce 203static inline u32 snd_bt87x_readl(struct snd_bt87x *chip, u32 reg)
1da177e4
LT
204{
205 return readl(chip->mmio + reg);
206}
207
9f362dce 208static inline void snd_bt87x_writel(struct snd_bt87x *chip, u32 reg, u32 value)
1da177e4
LT
209{
210 writel(value, chip->mmio + reg);
211}
212
9f362dce 213static int snd_bt87x_create_risc(struct snd_bt87x *chip, struct snd_pcm_substream *substream,
1da177e4
LT
214 unsigned int periods, unsigned int period_bytes)
215{
1da177e4 216 unsigned int i, offset;
58578d18 217 __le32 *risc;
1da177e4
LT
218
219 if (chip->dma_risc.area == NULL) {
6974f8ad 220 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
1da177e4
LT
221 PAGE_ALIGN(MAX_RISC_SIZE), &chip->dma_risc) < 0)
222 return -ENOMEM;
223 }
58578d18 224 risc = (__le32 *)chip->dma_risc.area;
1da177e4
LT
225 offset = 0;
226 *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_FM1);
227 *risc++ = cpu_to_le32(0);
228 for (i = 0; i < periods; ++i) {
229 u32 rest;
230
231 rest = period_bytes;
232 do {
233 u32 cmd, len;
77a23f26 234 unsigned int addr;
1da177e4
LT
235
236 len = PAGE_SIZE - (offset % PAGE_SIZE);
237 if (len > rest)
238 len = rest;
239 cmd = RISC_WRITE | len;
240 if (rest == period_bytes) {
241 u32 block = i * 16 / periods;
242 cmd |= RISC_SOL;
243 cmd |= block << RISC_SET_STATUS_SHIFT;
244 cmd |= (~block & 0xf) << RISC_RESET_STATUS_SHIFT;
245 }
246 if (len == rest)
247 cmd |= RISC_EOL | RISC_IRQ;
248 *risc++ = cpu_to_le32(cmd);
77a23f26
TI
249 addr = snd_pcm_sgbuf_get_addr(substream, offset);
250 *risc++ = cpu_to_le32(addr);
1da177e4
LT
251 offset += len;
252 rest -= len;
253 } while (rest > 0);
254 }
255 *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_VRO);
256 *risc++ = cpu_to_le32(0);
257 *risc++ = cpu_to_le32(RISC_JUMP);
258 *risc++ = cpu_to_le32(chip->dma_risc.addr);
259 chip->line_bytes = period_bytes;
260 chip->lines = periods;
261 return 0;
262}
263
9f362dce 264static void snd_bt87x_free_risc(struct snd_bt87x *chip)
1da177e4
LT
265{
266 if (chip->dma_risc.area) {
267 snd_dma_free_pages(&chip->dma_risc);
268 chip->dma_risc.area = NULL;
269 }
270}
271
9f362dce 272static void snd_bt87x_pci_error(struct snd_bt87x *chip, unsigned int status)
1da177e4 273{
ec46bf92 274 int pci_status = pci_status_get_and_clear_errors(chip->pci);
1da177e4 275
1da177e4 276 if (pci_status != PCI_STATUS_DETECTED_PARITY)
02c33520
TI
277 dev_err(chip->card->dev,
278 "Aieee - PCI error! status %#08x, PCI status %#04x\n",
1da177e4
LT
279 status & ERROR_INTERRUPTS, pci_status);
280 else {
02c33520
TI
281 dev_err(chip->card->dev,
282 "Aieee - PCI parity error detected!\n");
1da177e4
LT
283 /* error 'handling' similar to aic7xxx_pci.c: */
284 chip->pci_parity_errors++;
285 if (chip->pci_parity_errors > 20) {
02c33520
TI
286 dev_err(chip->card->dev,
287 "Too many PCI parity errors observed.\n");
288 dev_err(chip->card->dev,
289 "Some device on this bus is generating bad parity.\n");
290 dev_err(chip->card->dev,
291 "This is an error *observed by*, not *generated by*, this card.\n");
292 dev_err(chip->card->dev,
293 "PCI parity error checking has been disabled.\n");
1da177e4
LT
294 chip->interrupt_mask &= ~(INT_PPERR | INT_RIPERR);
295 snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
296 }
297 }
298}
299
7d12e780 300static irqreturn_t snd_bt87x_interrupt(int irq, void *dev_id)
1da177e4 301{
9f362dce 302 struct snd_bt87x *chip = dev_id;
1da177e4
LT
303 unsigned int status, irq_status;
304
305 status = snd_bt87x_readl(chip, REG_INT_STAT);
306 irq_status = status & chip->interrupt_mask;
307 if (!irq_status)
308 return IRQ_NONE;
309 snd_bt87x_writel(chip, REG_INT_STAT, irq_status);
310
311 if (irq_status & ERROR_INTERRUPTS) {
312 if (irq_status & (INT_FBUS | INT_FTRGT))
02c33520
TI
313 dev_warn(chip->card->dev,
314 "FIFO overrun, status %#08x\n", status);
1da177e4 315 if (irq_status & INT_OCERR)
02c33520
TI
316 dev_err(chip->card->dev,
317 "internal RISC error, status %#08x\n", status);
1da177e4
LT
318 if (irq_status & (INT_PPERR | INT_RIPERR | INT_PABORT))
319 snd_bt87x_pci_error(chip, irq_status);
320 }
321 if ((irq_status & INT_RISCI) && (chip->reg_control & CTL_ACAP_EN)) {
322 int current_block, irq_block;
323
324 /* assume that exactly one line has been recorded */
325 chip->current_line = (chip->current_line + 1) % chip->lines;
326 /* but check if some interrupts have been skipped */
327 current_block = chip->current_line * 16 / chip->lines;
328 irq_block = status >> INT_RISCS_SHIFT;
329 if (current_block != irq_block)
e02e198e
LPC
330 chip->current_line = DIV_ROUND_UP(irq_block * chip->lines,
331 16);
1da177e4
LT
332
333 snd_pcm_period_elapsed(chip->substream);
334 }
335 return IRQ_HANDLED;
336}
337
dee49895 338static const struct snd_pcm_hardware snd_bt87x_digital_hw = {
1da177e4
LT
339 .info = SNDRV_PCM_INFO_MMAP |
340 SNDRV_PCM_INFO_INTERLEAVED |
341 SNDRV_PCM_INFO_BLOCK_TRANSFER |
2008f137
TI
342 SNDRV_PCM_INFO_MMAP_VALID |
343 SNDRV_PCM_INFO_BATCH,
1da177e4
LT
344 .formats = SNDRV_PCM_FMTBIT_S16_LE,
345 .rates = 0, /* set at runtime */
346 .channels_min = 2,
347 .channels_max = 2,
348 .buffer_bytes_max = 255 * 4092,
349 .period_bytes_min = 32,
350 .period_bytes_max = 4092,
351 .periods_min = 2,
352 .periods_max = 255,
353};
354
dee49895 355static const struct snd_pcm_hardware snd_bt87x_analog_hw = {
1da177e4
LT
356 .info = SNDRV_PCM_INFO_MMAP |
357 SNDRV_PCM_INFO_INTERLEAVED |
358 SNDRV_PCM_INFO_BLOCK_TRANSFER |
2008f137
TI
359 SNDRV_PCM_INFO_MMAP_VALID |
360 SNDRV_PCM_INFO_BATCH,
1da177e4
LT
361 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
362 .rates = SNDRV_PCM_RATE_KNOT,
363 .rate_min = ANALOG_CLOCK / CLOCK_DIV_MAX,
364 .rate_max = ANALOG_CLOCK / CLOCK_DIV_MIN,
365 .channels_min = 1,
366 .channels_max = 1,
367 .buffer_bytes_max = 255 * 4092,
368 .period_bytes_min = 32,
369 .period_bytes_max = 4092,
370 .periods_min = 2,
371 .periods_max = 255,
372};
373
9f362dce 374static int snd_bt87x_set_digital_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime)
1da177e4 375{
950fb626 376 chip->reg_control |= CTL_DA_IOM_DA | CTL_A_PWRDN;
1da177e4 377 runtime->hw = snd_bt87x_digital_hw;
dcfb4140
TP
378 runtime->hw.rates = snd_pcm_rate_to_rate_bit(chip->board.dig_rate);
379 runtime->hw.rate_min = chip->board.dig_rate;
380 runtime->hw.rate_max = chip->board.dig_rate;
1da177e4
LT
381 return 0;
382}
383
9f362dce 384static int snd_bt87x_set_analog_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime)
1da177e4 385{
934cd5b7 386 static const struct snd_ratnum analog_clock = {
1da177e4
LT
387 .num = ANALOG_CLOCK,
388 .den_min = CLOCK_DIV_MIN,
389 .den_max = CLOCK_DIV_MAX,
390 .den_step = 1
391 };
934cd5b7 392 static const struct snd_pcm_hw_constraint_ratnums constraint_rates = {
1da177e4
LT
393 .nrats = 1,
394 .rats = &analog_clock
395 };
396
950fb626 397 chip->reg_control &= ~(CTL_DA_IOM_DA | CTL_A_PWRDN);
1da177e4
LT
398 runtime->hw = snd_bt87x_analog_hw;
399 return snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
400 &constraint_rates);
401}
402
9f362dce 403static int snd_bt87x_pcm_open(struct snd_pcm_substream *substream)
1da177e4 404{
9f362dce
TI
405 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
406 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
407 int err;
408
409 if (test_and_set_bit(0, &chip->opened))
410 return -EBUSY;
411
412 if (substream->pcm->device == DEVICE_DIGITAL)
413 err = snd_bt87x_set_digital_hw(chip, runtime);
414 else
415 err = snd_bt87x_set_analog_hw(chip, runtime);
416 if (err < 0)
417 goto _error;
418
419 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
420 if (err < 0)
421 goto _error;
422
423 chip->substream = substream;
424 return 0;
425
426_error:
427 clear_bit(0, &chip->opened);
4e857c58 428 smp_mb__after_atomic();
1da177e4
LT
429 return err;
430}
431
9f362dce 432static int snd_bt87x_close(struct snd_pcm_substream *substream)
1da177e4 433{
9f362dce 434 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
1da177e4 435
950fb626
TP
436 spin_lock_irq(&chip->reg_lock);
437 chip->reg_control |= CTL_A_PWRDN;
438 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
439 spin_unlock_irq(&chip->reg_lock);
440
1da177e4
LT
441 chip->substream = NULL;
442 clear_bit(0, &chip->opened);
4e857c58 443 smp_mb__after_atomic();
1da177e4
LT
444 return 0;
445}
446
9f362dce
TI
447static int snd_bt87x_hw_params(struct snd_pcm_substream *substream,
448 struct snd_pcm_hw_params *hw_params)
1da177e4 449{
9f362dce 450 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
1da177e4 451
1da177e4
LT
452 return snd_bt87x_create_risc(chip, substream,
453 params_periods(hw_params),
454 params_period_bytes(hw_params));
455}
456
9f362dce 457static int snd_bt87x_hw_free(struct snd_pcm_substream *substream)
1da177e4 458{
9f362dce 459 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
460
461 snd_bt87x_free_risc(chip);
1da177e4
LT
462 return 0;
463}
464
9f362dce 465static int snd_bt87x_prepare(struct snd_pcm_substream *substream)
1da177e4 466{
9f362dce
TI
467 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
468 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
469 int decimation;
470
471 spin_lock_irq(&chip->reg_lock);
472 chip->reg_control &= ~(CTL_DA_SDR_MASK | CTL_DA_SBR);
473 decimation = (ANALOG_CLOCK + runtime->rate / 4) / runtime->rate;
474 chip->reg_control |= decimation << CTL_DA_SDR_SHIFT;
475 if (runtime->format == SNDRV_PCM_FORMAT_S8)
476 chip->reg_control |= CTL_DA_SBR;
477 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
478 spin_unlock_irq(&chip->reg_lock);
479 return 0;
480}
481
9f362dce 482static int snd_bt87x_start(struct snd_bt87x *chip)
1da177e4
LT
483{
484 spin_lock(&chip->reg_lock);
485 chip->current_line = 0;
486 chip->reg_control |= CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN;
487 snd_bt87x_writel(chip, REG_RISC_STRT_ADD, chip->dma_risc.addr);
488 snd_bt87x_writel(chip, REG_PACKET_LEN,
489 chip->line_bytes | (chip->lines << 16));
490 snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
491 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
492 spin_unlock(&chip->reg_lock);
493 return 0;
494}
495
9f362dce 496static int snd_bt87x_stop(struct snd_bt87x *chip)
1da177e4
LT
497{
498 spin_lock(&chip->reg_lock);
499 chip->reg_control &= ~(CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN);
500 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
501 snd_bt87x_writel(chip, REG_INT_MASK, 0);
502 snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
503 spin_unlock(&chip->reg_lock);
504 return 0;
505}
506
9f362dce 507static int snd_bt87x_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 508{
9f362dce 509 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
1da177e4
LT
510
511 switch (cmd) {
512 case SNDRV_PCM_TRIGGER_START:
513 return snd_bt87x_start(chip);
514 case SNDRV_PCM_TRIGGER_STOP:
515 return snd_bt87x_stop(chip);
516 default:
517 return -EINVAL;
518 }
519}
520
9f362dce 521static snd_pcm_uframes_t snd_bt87x_pointer(struct snd_pcm_substream *substream)
1da177e4 522{
9f362dce
TI
523 struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
524 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT
525
526 return (snd_pcm_uframes_t)bytes_to_frames(runtime, chip->current_line * chip->line_bytes);
527}
528
8c91d7d0 529static const struct snd_pcm_ops snd_bt87x_pcm_ops = {
1da177e4
LT
530 .open = snd_bt87x_pcm_open,
531 .close = snd_bt87x_close,
1da177e4
LT
532 .hw_params = snd_bt87x_hw_params,
533 .hw_free = snd_bt87x_hw_free,
534 .prepare = snd_bt87x_prepare,
535 .trigger = snd_bt87x_trigger,
536 .pointer = snd_bt87x_pointer,
1da177e4
LT
537};
538
9f362dce
TI
539static int snd_bt87x_capture_volume_info(struct snd_kcontrol *kcontrol,
540 struct snd_ctl_elem_info *info)
1da177e4
LT
541{
542 info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
543 info->count = 1;
544 info->value.integer.min = 0;
545 info->value.integer.max = 15;
546 return 0;
547}
548
9f362dce
TI
549static int snd_bt87x_capture_volume_get(struct snd_kcontrol *kcontrol,
550 struct snd_ctl_elem_value *value)
1da177e4 551{
9f362dce 552 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
553
554 value->value.integer.value[0] = (chip->reg_control & CTL_A_GAIN_MASK) >> CTL_A_GAIN_SHIFT;
555 return 0;
556}
557
9f362dce
TI
558static int snd_bt87x_capture_volume_put(struct snd_kcontrol *kcontrol,
559 struct snd_ctl_elem_value *value)
1da177e4 560{
9f362dce 561 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
562 u32 old_control;
563 int changed;
564
565 spin_lock_irq(&chip->reg_lock);
566 old_control = chip->reg_control;
567 chip->reg_control = (chip->reg_control & ~CTL_A_GAIN_MASK)
568 | (value->value.integer.value[0] << CTL_A_GAIN_SHIFT);
569 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
570 changed = old_control != chip->reg_control;
571 spin_unlock_irq(&chip->reg_lock);
572 return changed;
573}
574
f3b827e0 575static const struct snd_kcontrol_new snd_bt87x_capture_volume = {
1da177e4
LT
576 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
577 .name = "Capture Volume",
578 .info = snd_bt87x_capture_volume_info,
579 .get = snd_bt87x_capture_volume_get,
580 .put = snd_bt87x_capture_volume_put,
581};
582
a5ce8890 583#define snd_bt87x_capture_boost_info snd_ctl_boolean_mono_info
1da177e4 584
9f362dce
TI
585static int snd_bt87x_capture_boost_get(struct snd_kcontrol *kcontrol,
586 struct snd_ctl_elem_value *value)
1da177e4 587{
9f362dce 588 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
589
590 value->value.integer.value[0] = !! (chip->reg_control & CTL_A_G2X);
591 return 0;
592}
593
9f362dce
TI
594static int snd_bt87x_capture_boost_put(struct snd_kcontrol *kcontrol,
595 struct snd_ctl_elem_value *value)
1da177e4 596{
9f362dce 597 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
598 u32 old_control;
599 int changed;
600
601 spin_lock_irq(&chip->reg_lock);
602 old_control = chip->reg_control;
603 chip->reg_control = (chip->reg_control & ~CTL_A_G2X)
604 | (value->value.integer.value[0] ? CTL_A_G2X : 0);
605 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
606 changed = chip->reg_control != old_control;
607 spin_unlock_irq(&chip->reg_lock);
608 return changed;
609}
610
f3b827e0 611static const struct snd_kcontrol_new snd_bt87x_capture_boost = {
1da177e4
LT
612 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
613 .name = "Capture Boost",
614 .info = snd_bt87x_capture_boost_info,
615 .get = snd_bt87x_capture_boost_get,
616 .put = snd_bt87x_capture_boost_put,
617};
618
9f362dce
TI
619static int snd_bt87x_capture_source_info(struct snd_kcontrol *kcontrol,
620 struct snd_ctl_elem_info *info)
1da177e4 621{
dd1224aa 622 static const char *const texts[3] = {"TV Tuner", "FM", "Mic/Line"};
1da177e4 623
dd1224aa 624 return snd_ctl_enum_info(info, 1, 3, texts);
1da177e4
LT
625}
626
9f362dce
TI
627static int snd_bt87x_capture_source_get(struct snd_kcontrol *kcontrol,
628 struct snd_ctl_elem_value *value)
1da177e4 629{
9f362dce 630 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
631
632 value->value.enumerated.item[0] = (chip->reg_control & CTL_A_SEL_MASK) >> CTL_A_SEL_SHIFT;
633 return 0;
634}
635
9f362dce
TI
636static int snd_bt87x_capture_source_put(struct snd_kcontrol *kcontrol,
637 struct snd_ctl_elem_value *value)
1da177e4 638{
9f362dce 639 struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT
640 u32 old_control;
641 int changed;
642
643 spin_lock_irq(&chip->reg_lock);
644 old_control = chip->reg_control;
645 chip->reg_control = (chip->reg_control & ~CTL_A_SEL_MASK)
646 | (value->value.enumerated.item[0] << CTL_A_SEL_SHIFT);
647 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
648 changed = chip->reg_control != old_control;
649 spin_unlock_irq(&chip->reg_lock);
650 return changed;
651}
652
f3b827e0 653static const struct snd_kcontrol_new snd_bt87x_capture_source = {
1da177e4
LT
654 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
655 .name = "Capture Source",
656 .info = snd_bt87x_capture_source_info,
657 .get = snd_bt87x_capture_source_get,
658 .put = snd_bt87x_capture_source_put,
659};
660
9f362dce 661static int snd_bt87x_free(struct snd_bt87x *chip)
1da177e4 662{
2f93d797 663 if (chip->mmio)
1da177e4 664 snd_bt87x_stop(chip);
1da177e4
LT
665 if (chip->irq >= 0)
666 free_irq(chip->irq, chip);
ff6defa6 667 iounmap(chip->mmio);
1da177e4
LT
668 pci_release_regions(chip->pci);
669 pci_disable_device(chip->pci);
670 kfree(chip);
671 return 0;
672}
673
9f362dce 674static int snd_bt87x_dev_free(struct snd_device *device)
1da177e4 675{
9f362dce 676 struct snd_bt87x *chip = device->device_data;
1da177e4
LT
677 return snd_bt87x_free(chip);
678}
679
3dd06763 680static int snd_bt87x_pcm(struct snd_bt87x *chip, int device, char *name)
1da177e4
LT
681{
682 int err;
9f362dce 683 struct snd_pcm *pcm;
1da177e4
LT
684
685 err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm);
686 if (err < 0)
687 return err;
688 pcm->private_data = chip;
689 strcpy(pcm->name, name);
690 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_bt87x_pcm_ops);
b87ddad2
TI
691 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
692 &chip->pci->dev,
693 128 * 1024,
694 ALIGN(255 * 4092, 1024));
5116b94a 695 return 0;
1da177e4
LT
696}
697
3dd06763
BP
698static int snd_bt87x_create(struct snd_card *card,
699 struct pci_dev *pci,
700 struct snd_bt87x **rchip)
1da177e4 701{
9f362dce 702 struct snd_bt87x *chip;
1da177e4 703 int err;
efb0ad25 704 static const struct snd_device_ops ops = {
1da177e4
LT
705 .dev_free = snd_bt87x_dev_free
706 };
707
708 *rchip = NULL;
709
710 err = pci_enable_device(pci);
711 if (err < 0)
712 return err;
713
e560d8d8 714 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT
715 if (!chip) {
716 pci_disable_device(pci);
717 return -ENOMEM;
718 }
719 chip->card = card;
720 chip->pci = pci;
721 chip->irq = -1;
722 spin_lock_init(&chip->reg_lock);
723
724 if ((err = pci_request_regions(pci, "Bt87x audio")) < 0) {
725 kfree(chip);
726 pci_disable_device(pci);
727 return err;
728 }
2f5ad54e 729 chip->mmio = pci_ioremap_bar(pci, 0);
1da177e4 730 if (!chip->mmio) {
02c33520 731 dev_err(card->dev, "cannot remap io memory\n");
dcfb4140
TP
732 err = -ENOMEM;
733 goto fail;
1da177e4
LT
734 }
735
950fb626
TP
736 chip->reg_control = CTL_A_PWRDN | CTL_DA_ES2 |
737 CTL_PKTP_16 | (15 << CTL_DA_SDR_SHIFT);
1da177e4
LT
738 chip->interrupt_mask = MY_INTERRUPTS;
739 snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
740 snd_bt87x_writel(chip, REG_INT_MASK, 0);
741 snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
742
dcfb4140 743 err = request_irq(pci->irq, snd_bt87x_interrupt, IRQF_SHARED,
934c2b6d 744 KBUILD_MODNAME, chip);
dcfb4140 745 if (err < 0) {
02c33520 746 dev_err(card->dev, "cannot grab irq %d\n", pci->irq);
dcfb4140 747 goto fail;
1da177e4
LT
748 }
749 chip->irq = pci->irq;
d2625a62 750 card->sync_irq = chip->irq;
1da177e4 751 pci_set_master(pci);
1da177e4
LT
752
753 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
dcfb4140
TP
754 if (err < 0)
755 goto fail;
756
1da177e4
LT
757 *rchip = chip;
758 return 0;
dcfb4140
TP
759
760fail:
761 snd_bt87x_free(chip);
762 return err;
1da177e4
LT
763}
764
dcfb4140 765#define BT_DEVICE(chip, subvend, subdev, id) \
1da177e4 766 { .vendor = PCI_VENDOR_ID_BROOKTREE, \
4153812f 767 .device = chip, \
1da177e4 768 .subvendor = subvend, .subdevice = subdev, \
dcfb4140
TP
769 .driver_data = SND_BT87X_BOARD_ ## id }
770/* driver_data is the card id for that device */
1da177e4 771
9baa3c34 772static const struct pci_device_id snd_bt87x_ids[] = {
4153812f 773 /* Hauppauge WinTV series */
dcfb4140 774 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0x13eb, GENERIC),
4153812f 775 /* Hauppauge WinTV series */
dcfb4140 776 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, 0x0070, 0x13eb, GENERIC),
4153812f 777 /* Viewcast Osprey 200 */
dcfb4140 778 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff01, OSPREY2x0),
cf784d55 779 /* Viewcast Osprey 440 (rate is configurable via gpio) */
dcfb4140 780 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff07, OSPREY440),
76e63067 781 /* ATI TV-Wonder */
dcfb4140 782 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1002, 0x0001, GENERIC),
abf58f09 783 /* Leadtek Winfast tv 2000xp delux */
dcfb4140 784 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x107d, 0x6606, GENERIC),
9c6b8dce
TI
785 /* Pinnacle PCTV */
786 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x11bd, 0x0012, GENERIC),
29463dfe 787 /* Voodoo TV 200 */
dcfb4140 788 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x121a, 0x3000, GENERIC),
3f08a0e4
TI
789 /* Askey Computer Corp. MagicTView'99 */
790 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x144f, 0x3000, GENERIC),
29463dfe 791 /* AVerMedia Studio No. 103, 203, ...? */
dcfb4140 792 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1461, 0x0003, AVPHONE98),
abaeeb59 793 /* Prolink PixelView PV-M4900 */
dcfb4140 794 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1554, 0x4011, GENERIC),
abaeeb59 795 /* Pinnacle Studio PCTV rave */
dcfb4140 796 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0xbd11, 0x1200, GENERIC),
1da177e4
LT
797 { }
798};
799MODULE_DEVICE_TABLE(pci, snd_bt87x_ids);
800
801/* cards known not to have audio
802 * (DVB cards use the audio function to transfer MPEG data) */
803static struct {
804 unsigned short subvendor, subdevice;
6205372c 805} denylist[] = {
1da177e4 806 {0x0071, 0x0101}, /* Nebula Electronics DigiTV */
0110f50b 807 {0x11bd, 0x001c}, /* Pinnacle PCTV Sat */
1da177e4
LT
808 {0x11bd, 0x0026}, /* Pinnacle PCTV SAT CI */
809 {0x1461, 0x0761}, /* AVermedia AverTV DVB-T */
810 {0x1461, 0x0771}, /* AVermedia DVB-T 771 */
811 {0x1822, 0x0001}, /* Twinhan VisionPlus DVB-T */
0110f50b 812 {0x18ac, 0xd500}, /* DVICO FusionHDTV 5 Lite */
1da177e4 813 {0x18ac, 0xdb10}, /* DVICO FusionHDTV DVB-T Lite */
19790db0 814 {0x18ac, 0xdb11}, /* Ultraview DVB-T Lite */
1da177e4 815 {0x270f, 0xfc00}, /* Chaintech Digitop DST-1000 DVB-S */
0110f50b 816 {0x7063, 0x2000}, /* pcHDTV HD-2000 TV */
1da177e4
LT
817};
818
aacfddfd
TI
819static struct pci_driver driver;
820
6205372c 821/* return the id of the card, or a negative value if it's on the denylist */
3dd06763 822static int snd_bt87x_detect_card(struct pci_dev *pci)
1da177e4
LT
823{
824 int i;
825 const struct pci_device_id *supported;
826
8e84c641 827 supported = pci_match_id(snd_bt87x_ids, pci);
54c63cfc 828 if (supported && supported->driver_data > 0)
1da177e4
LT
829 return supported->driver_data;
830
6205372c
TI
831 for (i = 0; i < ARRAY_SIZE(denylist); ++i)
832 if (denylist[i].subvendor == pci->subsystem_vendor &&
833 denylist[i].subdevice == pci->subsystem_device) {
02c33520
TI
834 dev_dbg(&pci->dev,
835 "card %#04x-%#04x:%#04x has no audio\n",
abf58f09 836 pci->device, pci->subsystem_vendor, pci->subsystem_device);
1da177e4
LT
837 return -EBUSY;
838 }
839
02c33520 840 dev_info(&pci->dev, "unknown card %#04x-%#04x:%#04x\n",
dcfb4140 841 pci->device, pci->subsystem_vendor, pci->subsystem_device);
02c33520 842 dev_info(&pci->dev, "please mail id, board name, and, "
1da177e4 843 "if it works, the correct digital_rate option to "
4505179c 844 "<alsa-devel@alsa-project.org>\n");
c818e0a1 845 return SND_BT87X_BOARD_UNKNOWN;
1da177e4
LT
846}
847
3dd06763
BP
848static int snd_bt87x_probe(struct pci_dev *pci,
849 const struct pci_device_id *pci_id)
1da177e4
LT
850{
851 static int dev;
9f362dce
TI
852 struct snd_card *card;
853 struct snd_bt87x *chip;
dcfb4140
TP
854 int err;
855 enum snd_bt87x_boardid boardid;
1da177e4 856
dcfb4140
TP
857 if (!pci_id->driver_data) {
858 err = snd_bt87x_detect_card(pci);
859 if (err < 0)
1da177e4 860 return -ENODEV;
dcfb4140
TP
861 boardid = err;
862 } else
863 boardid = pci_id->driver_data;
1da177e4
LT
864
865 if (dev >= SNDRV_CARDS)
866 return -ENODEV;
867 if (!enable[dev]) {
868 ++dev;
869 return -ENOENT;
870 }
871
60c5772b
TI
872 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
873 0, &card);
e58de7ba
TI
874 if (err < 0)
875 return err;
1da177e4
LT
876
877 err = snd_bt87x_create(card, pci, &chip);
878 if (err < 0)
879 goto _error;
880
dcfb4140 881 memcpy(&chip->board, &snd_bt87x_boards[boardid], sizeof(chip->board));
1da177e4 882
dcfb4140
TP
883 if (!chip->board.no_digital) {
884 if (digital_rate[dev] > 0)
885 chip->board.dig_rate = digital_rate[dev];
1da177e4 886
dcfb4140
TP
887 chip->reg_control |= chip->board.digital_fmt;
888
889 err = snd_bt87x_pcm(chip, DEVICE_DIGITAL, "Bt87x Digital");
890 if (err < 0)
891 goto _error;
892 }
893 if (!chip->board.no_analog) {
894 err = snd_bt87x_pcm(chip, DEVICE_ANALOG, "Bt87x Analog");
895 if (err < 0)
896 goto _error;
897 err = snd_ctl_add(card, snd_ctl_new1(
898 &snd_bt87x_capture_volume, chip));
899 if (err < 0)
900 goto _error;
901 err = snd_ctl_add(card, snd_ctl_new1(
902 &snd_bt87x_capture_boost, chip));
903 if (err < 0)
904 goto _error;
905 err = snd_ctl_add(card, snd_ctl_new1(
906 &snd_bt87x_capture_source, chip));
907 if (err < 0)
908 goto _error;
909 }
02c33520 910 dev_info(card->dev, "bt87x%d: Using board %d, %sanalog, %sdigital "
dcfb4140
TP
911 "(rate %d Hz)\n", dev, boardid,
912 chip->board.no_analog ? "no " : "",
913 chip->board.no_digital ? "no " : "", chip->board.dig_rate);
1da177e4
LT
914
915 strcpy(card->driver, "Bt87x");
916 sprintf(card->shortname, "Brooktree Bt%x", pci->device);
aa0a2ddc
GKH
917 sprintf(card->longname, "%s at %#llx, irq %i",
918 card->shortname, (unsigned long long)pci_resource_start(pci, 0),
919 chip->irq);
1da177e4
LT
920 strcpy(card->mixername, "Bt87x");
921
922 err = snd_card_register(card);
923 if (err < 0)
924 goto _error;
925
926 pci_set_drvdata(pci, card);
927 ++dev;
928 return 0;
929
930_error:
931 snd_card_free(card);
932 return err;
933}
934
3dd06763 935static void snd_bt87x_remove(struct pci_dev *pci)
1da177e4
LT
936{
937 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT
938}
939
940/* default entries for all Bt87x cards - it's not exported */
941/* driver_data is set to 0 to call detection */
9baa3c34 942static const struct pci_device_id snd_bt87x_default_ids[] = {
c818e0a1
CL
943 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, PCI_ANY_ID, PCI_ANY_ID, UNKNOWN),
944 BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, PCI_ANY_ID, PCI_ANY_ID, UNKNOWN),
1da177e4
LT
945 { }
946};
947
aacfddfd 948static struct pci_driver driver = {
3733e424 949 .name = KBUILD_MODNAME,
1da177e4
LT
950 .id_table = snd_bt87x_ids,
951 .probe = snd_bt87x_probe,
3dd06763 952 .remove = snd_bt87x_remove,
1da177e4
LT
953};
954
aacfddfd
TI
955static int __init alsa_card_bt87x_init(void)
956{
957 if (load_all)
958 driver.id_table = snd_bt87x_default_ids;
959 return pci_register_driver(&driver);
960}
961
962static void __exit alsa_card_bt87x_exit(void)
963{
964 pci_unregister_driver(&driver);
965}
966
967module_init(alsa_card_bt87x_init)
968module_exit(alsa_card_bt87x_exit)