projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| d91c64c8 AM |
1 | #ifndef __SOUND_AZT3328_H |
| 2 | #define __SOUND_AZT3328_H | |
| 1da177e4 | 3 | |
| d91c64c8 | 4 | /* "PU" == "power-up value", as tested on PCI168 PCI rev. 10 */ |
| 1da177e4 LT |
5 | |
| 6 | /*** main I/O area port indices ***/ | |
| 7 | /* (only 0x70 of 0x80 bytes saved/restored by Windows driver) */ | |
| ca54bde3 AM |
8 | #define AZF_IO_SIZE_CODEC 0x80 |
| 9 | #define AZF_IO_SIZE_CODEC_PM 0x70 | |
| 10 | ||
| d91c64c8 AM |
11 | /* the driver initialisation suggests a layout of 4 main areas: |
| 12 | * from 0x00 (playback), from 0x20 (recording) and from 0x40 (maybe MPU401??). | |
| 13 | * And another area from 0x60 to 0x6f (DirectX timer, IRQ management, | |
| 14 | * power management etc.???). */ | |
| 15 | ||
| 16 | /** playback area **/ | |
| 17 | #define IDX_IO_PLAY_FLAGS 0x00 /* PU:0x0000 */ | |
| 1da177e4 LT |
18 | /* able to reactivate output after output muting due to 8/16bit |
| 19 | * output change, just like 0x0002. | |
| 20 | * 0x0001 is the only bit that's able to start the DMA counter */ | |
| 21 | #define DMA_RESUME 0x0001 /* paused if cleared ? */ | |
| 22 | /* 0x0002 *temporarily* set during DMA stopping. hmm | |
| 23 | * both 0x0002 and 0x0004 set in playback setup. */ | |
| 24 | /* able to reactivate output after output muting due to 8/16bit | |
| 25 | * output change, just like 0x0001. */ | |
| 26 | #define DMA_PLAY_SOMETHING1 0x0002 /* \ alternated (toggled) */ | |
| 27 | /* 0x0004: NOT able to reactivate output */ | |
| 28 | #define DMA_PLAY_SOMETHING2 0x0004 /* / bits */ | |
| 29 | #define SOMETHING_ALMOST_ALWAYS_SET 0x0008 /* ???; can be modified */ | |
| 30 | #define DMA_EPILOGUE_SOMETHING 0x0010 | |
| 31 | #define DMA_SOMETHING_ELSE 0x0020 /* ??? */ | |
| 32 | #define SOMETHING_UNMODIFIABLE 0xffc0 /* unused ? not modifiable */ | |
| d91c64c8 | 33 | #define IDX_IO_PLAY_IRQTYPE 0x02 /* PU:0x0001 */ |
| 1da177e4 LT |
34 | /* write back to flags in case flags are set, in order to ACK IRQ in handler |
| 35 | * (bit 1 of port 0x64 indicates interrupt for one of these three types) | |
| 36 | * sometimes in this case it just writes 0xffff to globally ACK all IRQs | |
| 37 | * settings written are not reflected when reading back, though. | |
| 38 | * seems to be IRQ, too (frequently used: port |= 0x07 !), but who knows ? */ | |
| 39 | #define IRQ_PLAY_SOMETHING 0x0001 /* something & ACK */ | |
| 40 | #define IRQ_FINISHED_PLAYBUF_1 0x0002 /* 1st dmabuf finished & ACK */ | |
| 41 | #define IRQ_FINISHED_PLAYBUF_2 0x0004 /* 2nd dmabuf finished & ACK */ | |
| 42 | #define IRQMASK_SOME_STATUS_1 0x0008 /* \ related bits */ | |
| 43 | #define IRQMASK_SOME_STATUS_2 0x0010 /* / (checked together in loop) */ | |
| 44 | #define IRQMASK_UNMODIFIABLE 0xffe0 /* unused ? not modifiable */ | |
| d91c64c8 AM |
45 | #define IDX_IO_PLAY_DMA_START_1 0x04 /* start address of 1st DMA play area, PU:0x00000000 */ |
| 46 | #define IDX_IO_PLAY_DMA_START_2 0x08 /* start address of 2nd DMA play area, PU:0x00000000 */ | |
| 47 | #define IDX_IO_PLAY_DMA_LEN_1 0x0c /* length of 1st DMA play area, PU:0x0000 */ | |
| 48 | #define IDX_IO_PLAY_DMA_LEN_2 0x0e /* length of 2nd DMA play area, PU:0x0000 */ | |
| 49 | #define IDX_IO_PLAY_DMA_CURRPOS 0x10 /* current DMA position, PU:0x00000000 */ | |
| 50 | #define IDX_IO_PLAY_DMA_CURROFS 0x14 /* offset within current DMA play area, PU:0x0000 */ | |
| 51 | #define IDX_IO_PLAY_SOUNDFORMAT 0x16 /* PU:0x0010 */ | |
| 1da177e4 LT |
52 | /* all unspecified bits can't be modified */ |
| 53 | #define SOUNDFORMAT_FREQUENCY_MASK 0x000f | |
| d91c64c8 AM |
54 | #define SOUNDFORMAT_XTAL1 0x00 |
| 55 | #define SOUNDFORMAT_XTAL2 0x01 | |
| 1da177e4 LT |
56 | /* all _SUSPECTED_ values are not used by Windows drivers, so we don't |
| 57 | * have any hard facts, only rough measurements */ | |
| d91c64c8 AM |
58 | #define SOUNDFORMAT_FREQ_SUSPECTED_4000 0x0c | SOUNDFORMAT_XTAL1 |
| 59 | #define SOUNDFORMAT_FREQ_SUSPECTED_4800 0x0a | SOUNDFORMAT_XTAL1 | |
| 60 | #define SOUNDFORMAT_FREQ_5510 0x0c | SOUNDFORMAT_XTAL2 | |
| 61 | #define SOUNDFORMAT_FREQ_6620 0x0a | SOUNDFORMAT_XTAL2 | |
| 62 | #define SOUNDFORMAT_FREQ_8000 0x00 | SOUNDFORMAT_XTAL1 /* also 0x0e | SOUNDFORMAT_XTAL1? */ | |
| 63 | #define SOUNDFORMAT_FREQ_9600 0x08 | SOUNDFORMAT_XTAL1 | |
| 64 | #define SOUNDFORMAT_FREQ_11025 0x00 | SOUNDFORMAT_XTAL2 /* also 0x0e | SOUNDFORMAT_XTAL2? */ | |
| 65 | #define SOUNDFORMAT_FREQ_SUSPECTED_13240 0x08 | SOUNDFORMAT_XTAL2 /* seems to be 6620 *2 */ | |
| 66 | #define SOUNDFORMAT_FREQ_16000 0x02 | SOUNDFORMAT_XTAL1 | |
| 67 | #define SOUNDFORMAT_FREQ_22050 0x02 | SOUNDFORMAT_XTAL2 | |
| 68 | #define SOUNDFORMAT_FREQ_32000 0x04 | SOUNDFORMAT_XTAL1 | |
| 69 | #define SOUNDFORMAT_FREQ_44100 0x04 | SOUNDFORMAT_XTAL2 | |
| 70 | #define SOUNDFORMAT_FREQ_48000 0x06 | SOUNDFORMAT_XTAL1 | |
| 71 | #define SOUNDFORMAT_FREQ_SUSPECTED_66200 0x06 | SOUNDFORMAT_XTAL2 /* 66200 (13240 * 5); 64000 may have been nicer :-\ */ | |
| 1da177e4 LT |
72 | #define SOUNDFORMAT_FLAG_16BIT 0x0010 |
| 73 | #define SOUNDFORMAT_FLAG_2CHANNELS 0x0020 | |
| d91c64c8 AM |
74 | |
| 75 | /** recording area (see also: playback bit flag definitions) **/ | |
| 76 | #define IDX_IO_REC_FLAGS 0x20 /* ??, PU:0x0000 */ | |
| 77 | #define IDX_IO_REC_IRQTYPE 0x22 /* ??, PU:0x0000 */ | |
| 1da177e4 LT |
78 | #define IRQ_REC_SOMETHING 0x0001 /* something & ACK */ |
| 79 | #define IRQ_FINISHED_RECBUF_1 0x0002 /* 1st dmabuf finished & ACK */ | |
| 80 | #define IRQ_FINISHED_RECBUF_2 0x0004 /* 2nd dmabuf finished & ACK */ | |
| 81 | /* hmm, maybe these are just the corresponding *recording* flags ? | |
| 82 | * but OTOH they are most likely at port 0x22 instead */ | |
| 83 | #define IRQMASK_SOME_STATUS_1 0x0008 /* \ related bits */ | |
| 84 | #define IRQMASK_SOME_STATUS_2 0x0010 /* / (checked together in loop) */ | |
| d91c64c8 AM |
85 | #define IDX_IO_REC_DMA_START_1 0x24 /* PU:0x00000000 */ |
| 86 | #define IDX_IO_REC_DMA_START_2 0x28 /* PU:0x00000000 */ | |
| 87 | #define IDX_IO_REC_DMA_LEN_1 0x2c /* PU:0x0000 */ | |
| 88 | #define IDX_IO_REC_DMA_LEN_2 0x2e /* PU:0x0000 */ | |
| 89 | #define IDX_IO_REC_DMA_CURRPOS 0x30 /* PU:0x00000000 */ | |
| 90 | #define IDX_IO_REC_DMA_CURROFS 0x34 /* PU:0x00000000 */ | |
| 91 | #define IDX_IO_REC_SOUNDFORMAT 0x36 /* PU:0x0000 */ | |
| 92 | ||
| 13769e3f | 93 | /** hmm, what is this I/O area for? MPU401?? or external DAC via I2S?? (after playback, recording, ???, timer) **/ |
| d91c64c8 | 94 | #define IDX_IO_SOMETHING_FLAGS 0x40 /* gets set to 0x34 just like port 0x0 and 0x20 on card init, PU:0x0000 */ |
| 1da177e4 | 95 | /* general */ |
| d91c64c8 AM |
96 | #define IDX_IO_42H 0x42 /* PU:0x0001 */ |
| 97 | ||
| 98 | /** DirectX timer, main interrupt area (FIXME: and something else?) **/ | |
| 99 | #define IDX_IO_TIMER_VALUE 0x60 /* found this timer area by pure luck :-) */ | |
| 100 | #define TIMER_VALUE_MASK 0x000fffffUL /* timer countdown value; triggers IRQ when timer is finished */ | |
| 101 | #define TIMER_ENABLE_COUNTDOWN 0x01000000UL /* activate the timer countdown */ | |
| 102 | #define TIMER_ENABLE_IRQ 0x02000000UL /* trigger timer IRQ on zero transition */ | |
| 103 | #define TIMER_ACK_IRQ 0x04000000UL /* being set in IRQ handler in case port 0x00 (hmm, not port 0x64!?!?) had 0x0020 set upon IRQ handler */ | |
| 1da177e4 LT |
104 | #define IDX_IO_IRQSTATUS 0x64 |
| 105 | #define IRQ_PLAYBACK 0x0001 | |
| 106 | #define IRQ_RECORDING 0x0002 | |
| 107 | #define IRQ_MPU401 0x0010 | |
| d91c64c8 | 108 | #define IRQ_TIMER 0x0020 /* DirectX timer */ |
| e24a121a AM |
109 | #define IRQ_UNKNOWN1 0x0040 /* probably unused, or possibly I2S port? or gameport IRQ? */ |
| 110 | #define IRQ_UNKNOWN2 0x0080 /* probably unused, or possibly I2S port? or gameport IRQ? */ | |
| 1da177e4 | 111 | #define IDX_IO_66H 0x66 /* writing 0xffff returns 0x0000 */ |
| d91c64c8 | 112 | #define IDX_IO_SOME_VALUE 0x68 /* this is set to e.g. 0x3ff or 0x300, and writable; maybe some buffer limit, but I couldn't find out more, PU:0x00ff */ |
| ca54bde3 AM |
113 | #define IDX_IO_6AH 0x6A /* this WORD can be set to have bits 0x0028 activated (FIXME: correct??); actually inhibits PCM playback!!! maybe power management?? */ |
| 114 | #define IO_6A_PAUSE_PLAYBACK 0x0200 /* bit 9; sure, this pauses playback, but what the heck is this really about?? */ | |
| d91c64c8 | 115 | #define IDX_IO_6CH 0x6C |
| 1da177e4 LT |
116 | #define IDX_IO_6EH 0x6E /* writing 0xffff returns 0x83fe */ |
| 117 | /* further I/O indices not saved/restored, so probably not used */ | |
| 118 | ||
| d91c64c8 | 119 | |
| 1da177e4 LT |
120 | /*** I/O 2 area port indices ***/ |
| 121 | /* (only 0x06 of 0x08 bytes saved/restored by Windows driver) */ | |
| ca54bde3 AM |
122 | #define AZF_IO_SIZE_IO2 0x08 |
| 123 | #define AZF_IO_SIZE_IO2_PM 0x06 | |
| 124 | ||
| 1da177e4 | 125 | #define IDX_IO2_LEGACY_ADDR 0x04 |
| d91c64c8 | 126 | #define LEGACY_SOMETHING 0x01 /* OPL3?? */ |
| 1da177e4 LT |
127 | #define LEGACY_JOY 0x08 |
| 128 | ||
| ca54bde3 AM |
129 | #define AZF_IO_SIZE_MPU 0x04 |
| 130 | #define AZF_IO_SIZE_MPU_PM 0x04 | |
| 131 | ||
| 132 | #define AZF_IO_SIZE_SYNTH 0x08 | |
| 133 | #define AZF_IO_SIZE_SYNTH_PM 0x06 | |
| d91c64c8 | 134 | |
| 1da177e4 LT |
135 | /*** mixer I/O area port indices ***/ |
| 136 | /* (only 0x22 of 0x40 bytes saved/restored by Windows driver) | |
| ca54bde3 AM |
137 | * UNFORTUNATELY azf3328 is NOT truly AC97 compliant: see main file intro */ |
| 138 | #define AZF_IO_SIZE_MIXER 0x40 | |
| 139 | #define AZF_IO_SIZE_MIXER_PM 0x22 | |
| 140 | ||
| 1da177e4 LT |
141 | #define MIXER_VOLUME_RIGHT_MASK 0x001f |
| 142 | #define MIXER_VOLUME_LEFT_MASK 0x1f00 | |
| 143 | #define MIXER_MUTE_MASK 0x8000 | |
| 144 | #define IDX_MIXER_RESET 0x00 /* does NOT seem to have AC97 ID bits */ | |
| 145 | #define IDX_MIXER_PLAY_MASTER 0x02 | |
| 146 | #define IDX_MIXER_MODEMOUT 0x04 | |
| 147 | #define IDX_MIXER_BASSTREBLE 0x06 | |
| 148 | #define MIXER_BASSTREBLE_TREBLE_VOLUME_MASK 0x000e | |
| 149 | #define MIXER_BASSTREBLE_BASS_VOLUME_MASK 0x0e00 | |
| 150 | #define IDX_MIXER_PCBEEP 0x08 | |
| 151 | #define IDX_MIXER_MODEMIN 0x0a | |
| 152 | #define IDX_MIXER_MIC 0x0c | |
| 153 | #define MIXER_MIC_MICGAIN_20DB_ENHANCEMENT_MASK 0x0040 | |
| 154 | #define IDX_MIXER_LINEIN 0x0e | |
| 155 | #define IDX_MIXER_CDAUDIO 0x10 | |
| 156 | #define IDX_MIXER_VIDEO 0x12 | |
| 157 | #define IDX_MIXER_AUX 0x14 | |
| 158 | #define IDX_MIXER_WAVEOUT 0x16 | |
| 159 | #define IDX_MIXER_FMSYNTH 0x18 | |
| 160 | #define IDX_MIXER_REC_SELECT 0x1a | |
| 161 | #define MIXER_REC_SELECT_MIC 0x00 | |
| 162 | #define MIXER_REC_SELECT_CD 0x01 | |
| 163 | #define MIXER_REC_SELECT_VIDEO 0x02 | |
| 164 | #define MIXER_REC_SELECT_AUX 0x03 | |
| 165 | #define MIXER_REC_SELECT_LINEIN 0x04 | |
| 166 | #define MIXER_REC_SELECT_MIXSTEREO 0x05 | |
| 167 | #define MIXER_REC_SELECT_MIXMONO 0x06 | |
| 168 | #define MIXER_REC_SELECT_MONOIN 0x07 | |
| 169 | #define IDX_MIXER_REC_VOLUME 0x1c | |
| 170 | #define IDX_MIXER_ADVCTL1 0x1e | |
| 171 | /* unlisted bits are unmodifiable */ | |
| 172 | #define MIXER_ADVCTL1_3DWIDTH_MASK 0x000e | |
| 13769e3f AM |
173 | #define MIXER_ADVCTL1_HIFI3D_MASK 0x0300 /* yup, this is missing the high bit that official AC97 contains, plus it doesn't have linear bit value range behaviour but instead acts weirdly (possibly we're dealing with two *different* 3D settings here??) */ |
| 174 | #define IDX_MIXER_ADVCTL2 0x20 /* subset of AC97_GENERAL_PURPOSE reg! */ | |
| 1da177e4 | 175 | /* unlisted bits are unmodifiable */ |
| 13769e3f AM |
176 | #define MIXER_ADVCTL2_LPBK 0x0080 /* Loopback mode -- Win driver: "WaveOut3DBypass"? mutes WaveOut at LineOut */ |
| 177 | #define MIXER_ADVCTL2_MS 0x0100 /* Mic Select 0=Mic1, 1=Mic2 -- Win driver: "ModemOutSelect"?? */ | |
| 178 | #define MIXER_ADVCTL2_MIX 0x0200 /* Mono output select 0=Mix, 1=Mic; Win driver: "MonoSelectSource"?? */ | |
| 179 | #define MIXER_ADVCTL2_3D 0x2000 /* 3D Enhancement 1=on */ | |
| 180 | #define MIXER_ADVCTL2_POP 0x8000 /* Pcm Out Path, 0=pre 3D, 1=post 3D */ | |
| 1da177e4 | 181 | |
| d91c64c8 | 182 | #define IDX_MIXER_SOMETHING30H 0x30 /* used, but unknown??? */ |
| 1da177e4 LT |
183 | |
| 184 | /* driver internal flags */ | |
| 185 | #define SET_CHAN_LEFT 1 | |
| 186 | #define SET_CHAN_RIGHT 2 | |
| 187 | ||
| d91c64c8 | 188 | #endif /* __SOUND_AZT3328_H */ |