Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168). | |
d91c64c8 | 3 | * Copyright (C) 2002, 2005 by Andreas Mohr <andi AT lisas.de> |
1da177e4 LT |
4 | * |
5 | * Framework borrowed from Bart Hartgers's als4000.c. | |
6 | * Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801), | |
7 | * found in a Fujitsu-Siemens PC ("Cordant", aluminum case). | |
8 | * Other versions are: | |
9 | * PCI168 A(W), sub ID 1800 | |
10 | * PCI168 A/AP, sub ID 8000 | |
11 | * Please give me feedback in case you try my driver with one of these!! | |
12 | * | |
13 | * GPL LICENSE | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or | |
17 | * (at your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, | |
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
22 | * GNU General Public License for more details. | |
23 | ||
24 | * You should have received a copy of the GNU General Public License | |
25 | * along with this program; if not, write to the Free Software | |
26 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
27 | * | |
28 | * NOTES | |
29 | * Since Aztech does not provide any chipset documentation, | |
30 | * even on repeated request to various addresses, | |
31 | * and the answer that was finally given was negative | |
32 | * (and I was stupid enough to manage to get hold of a PCI168 soundcard | |
33 | * in the first place >:-P}), | |
34 | * I was forced to base this driver on reverse engineering | |
35 | * (3 weeks' worth of evenings filled with driver work). | |
36 | * (and no, I did NOT go the easy way: to pick up a PCI128 for 9 Euros) | |
37 | * | |
38 | * The AZF3328 chip (note: AZF3328, *not* AZT3328, that's just the driver name | |
39 | * for compatibility reasons) has the following features: | |
40 | * | |
41 | * - builtin AC97 conformant codec (SNR over 80dB) | |
42 | * (really AC97 compliant?? I really doubt it when looking | |
43 | * at the mixer register layout) | |
44 | * - builtin genuine OPL3 | |
45 | * - full duplex 16bit playback/record at independent sampling rate | |
46 | * - MPU401 (+ legacy address support) FIXME: how to enable legacy addr?? | |
47 | * - game port (legacy address support) | |
48 | * - built-in General DirectX timer having a 20 bits counter | |
d91c64c8 | 49 | * with 1us resolution (see below!) |
1da177e4 LT |
50 | * - I2S serial port for external DAC |
51 | * - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI | |
52 | * - supports hardware volume control | |
53 | * - single chip low cost solution (128 pin QFP) | |
54 | * - supports programmable Sub-vendor and Sub-system ID | |
55 | * required for Microsoft's logo compliance (FIXME: where?) | |
56 | * - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms | |
57 | * | |
d91c64c8 AM |
58 | * Note that this driver now is actually *better* than the Windows driver, |
59 | * since it additionally supports the card's 1MHz DirectX timer - just try | |
60 | * the following snd-seq module parameters etc.: | |
61 | * - options snd-seq seq_default_timer_class=2 seq_default_timer_sclass=0 | |
62 | * seq_default_timer_card=0 seq_client_load=1 seq_default_timer_device=0 | |
63 | * seq_default_timer_subdevice=0 seq_default_timer_resolution=1000000 | |
64 | * - "timidity -iAv -B2,8 -Os -EFreverb=0" | |
65 | * - "pmidi -p 128:0 jazz.mid" | |
66 | * | |
1da177e4 LT |
67 | * Certain PCI versions of this card are susceptible to DMA traffic underruns |
68 | * in some systems (resulting in sound crackling/clicking/popping), | |
69 | * probably because they don't have a DMA FIFO buffer or so. | |
70 | * Overview (PCI ID/PCI subID/PCI rev.): | |
71 | * - no DMA crackling on SiS735: 0x50DC/0x1801/16 | |
72 | * - unknown performance: 0x50DC/0x1801/10 | |
d91c64c8 AM |
73 | * (well, it's not bad on an Athlon 1800 with now very optimized IRQ handler) |
74 | * | |
1da177e4 LT |
75 | * Crackling happens with VIA chipsets or, in my case, an SiS735, which is |
76 | * supposed to be very fast and supposed to get rid of crackling much | |
77 | * better than a VIA, yet ironically I still get crackling, like many other | |
78 | * people with the same chipset. | |
79 | * Possible remedies: | |
80 | * - plug card into a different PCI slot, preferrably one that isn't shared | |
81 | * too much (this helps a lot, but not completely!) | |
82 | * - get rid of PCI VGA card, use AGP instead | |
83 | * - upgrade or downgrade BIOS | |
84 | * - fiddle with PCI latency settings (setpci -v -s BUSID latency_timer=XX) | |
85 | * Not too helpful. | |
86 | * - Disable ACPI/power management/"Auto Detect RAM/PCI Clk" in BIOS | |
87 | * | |
88 | * BUGS | |
d91c64c8 | 89 | * - full-duplex might *still* be problematic, not fully tested recently |
1da177e4 LT |
90 | * |
91 | * TODO | |
92 | * - test MPU401 MIDI playback etc. | |
ca54bde3 AM |
93 | * - add some power micro-management (disable various units of the card |
94 | * as long as they're unused). However this requires I/O ports which I | |
95 | * haven't figured out yet and which thus might not even exist... | |
96 | * The standard suspend/resume functionality could probably make use of | |
97 | * some improvement, too... | |
1da177e4 LT |
98 | * - figure out what all unknown port bits are responsible for |
99 | */ | |
100 | ||
101 | #include <sound/driver.h> | |
102 | #include <asm/io.h> | |
103 | #include <linux/init.h> | |
104 | #include <linux/pci.h> | |
105 | #include <linux/delay.h> | |
106 | #include <linux/slab.h> | |
107 | #include <linux/gameport.h> | |
108 | #include <linux/moduleparam.h> | |
910638ae | 109 | #include <linux/dma-mapping.h> |
1da177e4 LT |
110 | #include <sound/core.h> |
111 | #include <sound/control.h> | |
112 | #include <sound/pcm.h> | |
113 | #include <sound/rawmidi.h> | |
114 | #include <sound/mpu401.h> | |
115 | #include <sound/opl3.h> | |
116 | #include <sound/initval.h> | |
117 | #include "azt3328.h" | |
118 | ||
d91c64c8 | 119 | MODULE_AUTHOR("Andreas Mohr <andi AT lisas.de>"); |
1da177e4 LT |
120 | MODULE_DESCRIPTION("Aztech AZF3328 (PCI168)"); |
121 | MODULE_LICENSE("GPL"); | |
122 | MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}"); | |
123 | ||
124 | #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) | |
125 | #define SUPPORT_JOYSTICK 1 | |
126 | #endif | |
127 | ||
128 | #define DEBUG_MISC 0 | |
129 | #define DEBUG_CALLS 0 | |
130 | #define DEBUG_MIXER 0 | |
131 | #define DEBUG_PLAY_REC 0 | |
132 | #define DEBUG_IO 0 | |
d91c64c8 | 133 | #define DEBUG_TIMER 0 |
1da177e4 LT |
134 | #define MIXER_TESTING 0 |
135 | ||
136 | #if DEBUG_MISC | |
137 | #define snd_azf3328_dbgmisc(format, args...) printk(KERN_ERR format, ##args) | |
138 | #else | |
139 | #define snd_azf3328_dbgmisc(format, args...) | |
140 | #endif | |
141 | ||
142 | #if DEBUG_CALLS | |
143 | #define snd_azf3328_dbgcalls(format, args...) printk(format, ##args) | |
d91c64c8 AM |
144 | #define snd_azf3328_dbgcallenter() printk(KERN_ERR "--> %s\n", __FUNCTION__) |
145 | #define snd_azf3328_dbgcallleave() printk(KERN_ERR "<-- %s\n", __FUNCTION__) | |
1da177e4 LT |
146 | #else |
147 | #define snd_azf3328_dbgcalls(format, args...) | |
148 | #define snd_azf3328_dbgcallenter() | |
149 | #define snd_azf3328_dbgcallleave() | |
150 | #endif | |
151 | ||
152 | #if DEBUG_MIXER | |
153 | #define snd_azf3328_dbgmixer(format, args...) printk(format, ##args) | |
154 | #else | |
155 | #define snd_azf3328_dbgmixer(format, args...) | |
156 | #endif | |
157 | ||
158 | #if DEBUG_PLAY_REC | |
159 | #define snd_azf3328_dbgplay(format, args...) printk(KERN_ERR format, ##args) | |
160 | #else | |
161 | #define snd_azf3328_dbgplay(format, args...) | |
162 | #endif | |
163 | ||
d91c64c8 AM |
164 | #if DEBUG_MISC |
165 | #define snd_azf3328_dbgtimer(format, args...) printk(KERN_ERR format, ##args) | |
1da177e4 | 166 | #else |
d91c64c8 AM |
167 | #define snd_azf3328_dbgtimer(format, args...) |
168 | #endif | |
169 | ||
1da177e4 LT |
170 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ |
171 | module_param_array(index, int, NULL, 0444); | |
172 | MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard."); | |
173 | ||
174 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
175 | module_param_array(id, charp, NULL, 0444); | |
176 | MODULE_PARM_DESC(id, "ID string for AZF3328 soundcard."); | |
177 | ||
178 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ | |
179 | module_param_array(enable, bool, NULL, 0444); | |
180 | MODULE_PARM_DESC(enable, "Enable AZF3328 soundcard."); | |
181 | ||
182 | #ifdef SUPPORT_JOYSTICK | |
183 | static int joystick[SNDRV_CARDS]; | |
184 | module_param_array(joystick, bool, NULL, 0444); | |
185 | MODULE_PARM_DESC(joystick, "Enable joystick for AZF3328 soundcard."); | |
186 | #endif | |
187 | ||
d91c64c8 AM |
188 | static int seqtimer_scaling = 128; |
189 | module_param(seqtimer_scaling, int, 0444); | |
190 | MODULE_PARM_DESC(seqtimer_scaling, "Set 1024000Hz sequencer timer scale factor (lockup danger!). Default 128."); | |
1da177e4 | 191 | |
95de7766 | 192 | struct snd_azf3328 { |
d91c64c8 | 193 | /* often-used fields towards beginning, then grouped */ |
1da177e4 LT |
194 | unsigned long codec_port; |
195 | unsigned long io2_port; | |
196 | unsigned long mpu_port; | |
197 | unsigned long synth_port; | |
198 | unsigned long mixer_port; | |
199 | ||
d91c64c8 | 200 | spinlock_t reg_lock; |
1da177e4 | 201 | |
95de7766 | 202 | struct snd_timer *timer; |
d91c64c8 | 203 | |
95de7766 TI |
204 | struct snd_pcm *pcm; |
205 | struct snd_pcm_substream *playback_substream; | |
206 | struct snd_pcm_substream *capture_substream; | |
1da177e4 LT |
207 | unsigned int is_playing; |
208 | unsigned int is_recording; | |
209 | ||
95de7766 TI |
210 | struct snd_card *card; |
211 | struct snd_rawmidi *rmidi; | |
d91c64c8 AM |
212 | |
213 | #ifdef SUPPORT_JOYSTICK | |
214 | struct gameport *gameport; | |
215 | #endif | |
1da177e4 | 216 | |
d91c64c8 AM |
217 | struct pci_dev *pci; |
218 | int irq; | |
ca54bde3 AM |
219 | |
220 | #ifdef CONFIG_PM | |
221 | /* register value containers for power management | |
222 | * Note: not always full I/O range preserved (just like Win driver!) */ | |
223 | u16 saved_regs_codec [AZF_IO_SIZE_CODEC_PM / 2]; | |
224 | u16 saved_regs_io2 [AZF_IO_SIZE_IO2_PM / 2]; | |
225 | u16 saved_regs_mpu [AZF_IO_SIZE_MPU_PM / 2]; | |
226 | u16 saved_regs_synth[AZF_IO_SIZE_SYNTH_PM / 2]; | |
227 | u16 saved_regs_mixer[AZF_IO_SIZE_MIXER_PM / 2]; | |
228 | #endif | |
95de7766 | 229 | }; |
d91c64c8 | 230 | |
396c9b92 | 231 | static const struct pci_device_id snd_azf3328_ids[] __devinitdata = { |
1da177e4 LT |
232 | { 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* PCI168/3328 */ |
233 | { 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* 3328 */ | |
234 | { 0, } | |
235 | }; | |
236 | ||
237 | MODULE_DEVICE_TABLE(pci, snd_azf3328_ids); | |
238 | ||
d91c64c8 | 239 | static inline void |
95de7766 | 240 | snd_azf3328_codec_outb(const struct snd_azf3328 *chip, int reg, u8 value) |
d91c64c8 AM |
241 | { |
242 | outb(value, chip->codec_port + reg); | |
243 | } | |
244 | ||
245 | static inline u8 | |
95de7766 | 246 | snd_azf3328_codec_inb(const struct snd_azf3328 *chip, int reg) |
d91c64c8 AM |
247 | { |
248 | return inb(chip->codec_port + reg); | |
249 | } | |
250 | ||
251 | static inline void | |
95de7766 | 252 | snd_azf3328_codec_outw(const struct snd_azf3328 *chip, int reg, u16 value) |
d91c64c8 AM |
253 | { |
254 | outw(value, chip->codec_port + reg); | |
255 | } | |
256 | ||
257 | static inline u16 | |
95de7766 | 258 | snd_azf3328_codec_inw(const struct snd_azf3328 *chip, int reg) |
d91c64c8 AM |
259 | { |
260 | return inw(chip->codec_port + reg); | |
261 | } | |
262 | ||
263 | static inline void | |
95de7766 | 264 | snd_azf3328_codec_outl(const struct snd_azf3328 *chip, int reg, u32 value) |
d91c64c8 AM |
265 | { |
266 | outl(value, chip->codec_port + reg); | |
267 | } | |
268 | ||
269 | static inline void | |
95de7766 | 270 | snd_azf3328_io2_outb(const struct snd_azf3328 *chip, int reg, u8 value) |
1da177e4 LT |
271 | { |
272 | outb(value, chip->io2_port + reg); | |
273 | } | |
274 | ||
d91c64c8 | 275 | static inline u8 |
95de7766 | 276 | snd_azf3328_io2_inb(const struct snd_azf3328 *chip, int reg) |
1da177e4 LT |
277 | { |
278 | return inb(chip->io2_port + reg); | |
279 | } | |
280 | ||
d91c64c8 | 281 | static inline void |
95de7766 | 282 | snd_azf3328_mixer_outw(const struct snd_azf3328 *chip, int reg, u16 value) |
1da177e4 | 283 | { |
d91c64c8 AM |
284 | outw(value, chip->mixer_port + reg); |
285 | } | |
286 | ||
287 | static inline u16 | |
95de7766 | 288 | snd_azf3328_mixer_inw(const struct snd_azf3328 *chip, int reg) |
d91c64c8 AM |
289 | { |
290 | return inw(chip->mixer_port + reg); | |
1da177e4 LT |
291 | } |
292 | ||
d91c64c8 | 293 | static void |
95de7766 | 294 | snd_azf3328_mixer_set_mute(const struct snd_azf3328 *chip, int reg, int do_mute) |
1da177e4 | 295 | { |
d91c64c8 | 296 | unsigned long portbase = chip->mixer_port + reg + 1; |
1da177e4 LT |
297 | unsigned char oldval; |
298 | ||
299 | /* the mute bit is on the *second* (i.e. right) register of a | |
300 | * left/right channel setting */ | |
d91c64c8 | 301 | oldval = inb(portbase); |
1da177e4 LT |
302 | if (do_mute) |
303 | oldval |= 0x80; | |
304 | else | |
305 | oldval &= ~0x80; | |
d91c64c8 | 306 | outb(oldval, portbase); |
1da177e4 LT |
307 | } |
308 | ||
d91c64c8 | 309 | static void |
95de7766 | 310 | snd_azf3328_mixer_write_volume_gradually(const struct snd_azf3328 *chip, int reg, unsigned char dst_vol_left, unsigned char dst_vol_right, int chan_sel, int delay) |
1da177e4 | 311 | { |
d91c64c8 | 312 | unsigned long portbase = chip->mixer_port + reg; |
1da177e4 LT |
313 | unsigned char curr_vol_left = 0, curr_vol_right = 0; |
314 | int left_done = 0, right_done = 0; | |
315 | ||
316 | snd_azf3328_dbgcallenter(); | |
317 | if (chan_sel & SET_CHAN_LEFT) | |
d91c64c8 | 318 | curr_vol_left = inb(portbase + 1); |
1da177e4 LT |
319 | else |
320 | left_done = 1; | |
321 | if (chan_sel & SET_CHAN_RIGHT) | |
d91c64c8 | 322 | curr_vol_right = inb(portbase + 0); |
1da177e4 LT |
323 | else |
324 | right_done = 1; | |
325 | ||
326 | /* take care of muting flag (0x80) contained in left channel */ | |
327 | if (curr_vol_left & 0x80) | |
328 | dst_vol_left |= 0x80; | |
329 | else | |
330 | dst_vol_left &= ~0x80; | |
331 | ||
332 | do | |
333 | { | |
334 | if (!left_done) | |
335 | { | |
336 | if (curr_vol_left > dst_vol_left) | |
337 | curr_vol_left--; | |
338 | else | |
339 | if (curr_vol_left < dst_vol_left) | |
340 | curr_vol_left++; | |
341 | else | |
342 | left_done = 1; | |
d91c64c8 | 343 | outb(curr_vol_left, portbase + 1); |
1da177e4 LT |
344 | } |
345 | if (!right_done) | |
346 | { | |
347 | if (curr_vol_right > dst_vol_right) | |
348 | curr_vol_right--; | |
349 | else | |
350 | if (curr_vol_right < dst_vol_right) | |
351 | curr_vol_right++; | |
352 | else | |
353 | right_done = 1; | |
354 | /* during volume change, the right channel is crackling | |
355 | * somewhat more than the left channel, unfortunately. | |
356 | * This seems to be a hardware issue. */ | |
d91c64c8 | 357 | outb(curr_vol_right, portbase + 0); |
1da177e4 LT |
358 | } |
359 | if (delay) | |
360 | mdelay(delay); | |
361 | } | |
362 | while ((!left_done) || (!right_done)); | |
363 | snd_azf3328_dbgcallleave(); | |
364 | } | |
365 | ||
366 | /* | |
367 | * general mixer element | |
368 | */ | |
95de7766 | 369 | struct azf3328_mixer_reg { |
1da177e4 LT |
370 | unsigned int reg; |
371 | unsigned int lchan_shift, rchan_shift; | |
372 | unsigned int mask; | |
373 | unsigned int invert: 1; | |
374 | unsigned int stereo: 1; | |
375 | unsigned int enum_c: 4; | |
95de7766 | 376 | }; |
1da177e4 LT |
377 | |
378 | #define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \ | |
d91c64c8 AM |
379 | ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | \ |
380 | (mask << 16) | \ | |
381 | (invert << 24) | \ | |
382 | (stereo << 25) | \ | |
383 | (enum_c << 26)) | |
1da177e4 | 384 | |
95de7766 | 385 | static void snd_azf3328_mixer_reg_decode(struct azf3328_mixer_reg *r, unsigned long val) |
1da177e4 LT |
386 | { |
387 | r->reg = val & 0xff; | |
388 | r->lchan_shift = (val >> 8) & 0x0f; | |
389 | r->rchan_shift = (val >> 12) & 0x0f; | |
390 | r->mask = (val >> 16) & 0xff; | |
391 | r->invert = (val >> 24) & 1; | |
392 | r->stereo = (val >> 25) & 1; | |
393 | r->enum_c = (val >> 26) & 0x0f; | |
394 | } | |
395 | ||
396 | /* | |
397 | * mixer switches/volumes | |
398 | */ | |
399 | ||
400 | #define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \ | |
401 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
402 | .info = snd_azf3328_info_mixer, \ | |
403 | .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ | |
404 | .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \ | |
405 | } | |
406 | ||
407 | #define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \ | |
408 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
409 | .info = snd_azf3328_info_mixer, \ | |
410 | .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ | |
411 | .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \ | |
412 | } | |
413 | ||
414 | #define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \ | |
415 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
416 | .info = snd_azf3328_info_mixer, \ | |
417 | .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ | |
418 | .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \ | |
419 | } | |
420 | ||
421 | #define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \ | |
422 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
423 | .info = snd_azf3328_info_mixer, \ | |
424 | .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ | |
425 | .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \ | |
426 | } | |
427 | ||
428 | #define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \ | |
429 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
430 | .info = snd_azf3328_info_mixer_enum, \ | |
431 | .get = snd_azf3328_get_mixer_enum, .put = snd_azf3328_put_mixer_enum, \ | |
432 | .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \ | |
433 | } | |
434 | ||
d91c64c8 | 435 | static int |
95de7766 TI |
436 | snd_azf3328_info_mixer(struct snd_kcontrol *kcontrol, |
437 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 | 438 | { |
95de7766 | 439 | struct azf3328_mixer_reg reg; |
1da177e4 LT |
440 | |
441 | snd_azf3328_dbgcallenter(); | |
442 | snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); | |
d91c64c8 AM |
443 | uinfo->type = reg.mask == 1 ? |
444 | SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1da177e4 LT |
445 | uinfo->count = reg.stereo + 1; |
446 | uinfo->value.integer.min = 0; | |
447 | uinfo->value.integer.max = reg.mask; | |
448 | snd_azf3328_dbgcallleave(); | |
449 | return 0; | |
450 | } | |
451 | ||
d91c64c8 | 452 | static int |
95de7766 TI |
453 | snd_azf3328_get_mixer(struct snd_kcontrol *kcontrol, |
454 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 455 | { |
95de7766 TI |
456 | struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); |
457 | struct azf3328_mixer_reg reg; | |
1da177e4 LT |
458 | unsigned int oreg, val; |
459 | ||
460 | snd_azf3328_dbgcallenter(); | |
461 | snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); | |
462 | ||
d91c64c8 | 463 | oreg = snd_azf3328_mixer_inw(chip, reg.reg); |
1da177e4 LT |
464 | val = (oreg >> reg.lchan_shift) & reg.mask; |
465 | if (reg.invert) | |
466 | val = reg.mask - val; | |
467 | ucontrol->value.integer.value[0] = val; | |
468 | if (reg.stereo) { | |
469 | val = (oreg >> reg.rchan_shift) & reg.mask; | |
470 | if (reg.invert) | |
471 | val = reg.mask - val; | |
472 | ucontrol->value.integer.value[1] = val; | |
473 | } | |
d91c64c8 AM |
474 | snd_azf3328_dbgmixer("get: %02x is %04x -> vol %02lx|%02lx " |
475 | "(shift %02d|%02d, mask %02x, inv. %d, stereo %d)\n", | |
476 | reg.reg, oreg, | |
477 | ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], | |
478 | reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo); | |
1da177e4 LT |
479 | snd_azf3328_dbgcallleave(); |
480 | return 0; | |
481 | } | |
482 | ||
d91c64c8 | 483 | static int |
95de7766 TI |
484 | snd_azf3328_put_mixer(struct snd_kcontrol *kcontrol, |
485 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 486 | { |
95de7766 TI |
487 | struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); |
488 | struct azf3328_mixer_reg reg; | |
1da177e4 LT |
489 | unsigned int oreg, nreg, val; |
490 | ||
491 | snd_azf3328_dbgcallenter(); | |
492 | snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); | |
d91c64c8 | 493 | oreg = snd_azf3328_mixer_inw(chip, reg.reg); |
1da177e4 LT |
494 | val = ucontrol->value.integer.value[0] & reg.mask; |
495 | if (reg.invert) | |
496 | val = reg.mask - val; | |
497 | nreg = oreg & ~(reg.mask << reg.lchan_shift); | |
498 | nreg |= (val << reg.lchan_shift); | |
499 | if (reg.stereo) { | |
500 | val = ucontrol->value.integer.value[1] & reg.mask; | |
501 | if (reg.invert) | |
502 | val = reg.mask - val; | |
503 | nreg &= ~(reg.mask << reg.rchan_shift); | |
504 | nreg |= (val << reg.rchan_shift); | |
505 | } | |
506 | if (reg.mask >= 0x07) /* it's a volume control, so better take care */ | |
d91c64c8 AM |
507 | snd_azf3328_mixer_write_volume_gradually( |
508 | chip, reg.reg, nreg >> 8, nreg & 0xff, | |
509 | /* just set both channels, doesn't matter */ | |
510 | SET_CHAN_LEFT|SET_CHAN_RIGHT, | |
511 | 0); | |
1da177e4 | 512 | else |
d91c64c8 | 513 | snd_azf3328_mixer_outw(chip, reg.reg, nreg); |
1da177e4 | 514 | |
d91c64c8 AM |
515 | snd_azf3328_dbgmixer("put: %02x to %02lx|%02lx, " |
516 | "oreg %04x; shift %02d|%02d -> nreg %04x; after: %04x\n", | |
517 | reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], | |
518 | oreg, reg.lchan_shift, reg.rchan_shift, | |
519 | nreg, snd_azf3328_mixer_inw(chip, reg.reg)); | |
1da177e4 LT |
520 | snd_azf3328_dbgcallleave(); |
521 | return (nreg != oreg); | |
522 | } | |
523 | ||
d91c64c8 | 524 | static int |
95de7766 TI |
525 | snd_azf3328_info_mixer_enum(struct snd_kcontrol *kcontrol, |
526 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 | 527 | { |
d91c64c8 AM |
528 | static const char * const texts1[] = { |
529 | "ModemOut1", "ModemOut2" | |
530 | }; | |
531 | static const char * const texts2[] = { | |
532 | "MonoSelectSource1", "MonoSelectSource2" | |
533 | }; | |
534 | static const char * const texts3[] = { | |
535 | "Mic", "CD", "Video", "Aux", | |
536 | "Line", "Mix", "Mix Mono", "Phone" | |
1da177e4 | 537 | }; |
95de7766 | 538 | struct azf3328_mixer_reg reg; |
1da177e4 LT |
539 | |
540 | snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); | |
541 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
542 | uinfo->count = (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1; | |
543 | uinfo->value.enumerated.items = reg.enum_c; | |
544 | if (uinfo->value.enumerated.item > reg.enum_c - 1U) | |
545 | uinfo->value.enumerated.item = reg.enum_c - 1U; | |
546 | if (reg.reg == IDX_MIXER_ADVCTL2) | |
547 | { | |
548 | if (reg.lchan_shift == 8) /* modem out sel */ | |
549 | strcpy(uinfo->value.enumerated.name, texts1[uinfo->value.enumerated.item]); | |
550 | else /* mono sel source */ | |
551 | strcpy(uinfo->value.enumerated.name, texts2[uinfo->value.enumerated.item]); | |
552 | } | |
553 | else | |
554 | strcpy(uinfo->value.enumerated.name, texts3[uinfo->value.enumerated.item] | |
555 | ); | |
556 | return 0; | |
557 | } | |
558 | ||
d91c64c8 | 559 | static int |
95de7766 TI |
560 | snd_azf3328_get_mixer_enum(struct snd_kcontrol *kcontrol, |
561 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 562 | { |
95de7766 TI |
563 | struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); |
564 | struct azf3328_mixer_reg reg; | |
1da177e4 LT |
565 | unsigned short val; |
566 | ||
567 | snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); | |
d91c64c8 | 568 | val = snd_azf3328_mixer_inw(chip, reg.reg); |
1da177e4 LT |
569 | if (reg.reg == IDX_MIXER_REC_SELECT) |
570 | { | |
571 | ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1); | |
572 | ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1); | |
573 | } | |
574 | else | |
575 | ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1); | |
d91c64c8 AM |
576 | |
577 | snd_azf3328_dbgmixer("get_enum: %02x is %04x -> %d|%d (shift %02d, enum_c %d)\n", | |
578 | reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1], | |
579 | reg.lchan_shift, reg.enum_c); | |
1da177e4 LT |
580 | return 0; |
581 | } | |
582 | ||
d91c64c8 | 583 | static int |
95de7766 TI |
584 | snd_azf3328_put_mixer_enum(struct snd_kcontrol *kcontrol, |
585 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 586 | { |
95de7766 TI |
587 | struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); |
588 | struct azf3328_mixer_reg reg; | |
1da177e4 LT |
589 | unsigned int oreg, nreg, val; |
590 | ||
591 | snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); | |
d91c64c8 | 592 | oreg = snd_azf3328_mixer_inw(chip, reg.reg); |
1da177e4 LT |
593 | val = oreg; |
594 | if (reg.reg == IDX_MIXER_REC_SELECT) | |
595 | { | |
596 | if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U || | |
597 | ucontrol->value.enumerated.item[1] > reg.enum_c - 1U) | |
598 | return -EINVAL; | |
599 | val = (ucontrol->value.enumerated.item[0] << 8) | | |
600 | (ucontrol->value.enumerated.item[1] << 0); | |
601 | } | |
602 | else | |
603 | { | |
604 | if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U) | |
605 | return -EINVAL; | |
606 | val &= ~((reg.enum_c - 1) << reg.lchan_shift); | |
607 | val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift); | |
608 | } | |
d91c64c8 | 609 | snd_azf3328_mixer_outw(chip, reg.reg, val); |
1da177e4 LT |
610 | nreg = val; |
611 | ||
612 | snd_azf3328_dbgmixer("put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg); | |
613 | return (nreg != oreg); | |
614 | } | |
615 | ||
95de7766 | 616 | static const struct snd_kcontrol_new snd_azf3328_mixer_controls[] __devinitdata = { |
1da177e4 LT |
617 | AZF3328_MIXER_SWITCH("Master Playback Switch", IDX_MIXER_PLAY_MASTER, 15, 1), |
618 | AZF3328_MIXER_VOL_STEREO("Master Playback Volume", IDX_MIXER_PLAY_MASTER, 0x1f, 1), | |
619 | AZF3328_MIXER_SWITCH("Wave Playback Switch", IDX_MIXER_WAVEOUT, 15, 1), | |
620 | AZF3328_MIXER_VOL_STEREO("Wave Playback Volume", IDX_MIXER_WAVEOUT, 0x1f, 1), | |
d91c64c8 | 621 | AZF3328_MIXER_SWITCH("Wave 3D Bypass Playback Switch", IDX_MIXER_ADVCTL2, 7, 1), |
1da177e4 LT |
622 | AZF3328_MIXER_SWITCH("FM Playback Switch", IDX_MIXER_FMSYNTH, 15, 1), |
623 | AZF3328_MIXER_VOL_STEREO("FM Playback Volume", IDX_MIXER_FMSYNTH, 0x1f, 1), | |
624 | AZF3328_MIXER_SWITCH("CD Playback Switch", IDX_MIXER_CDAUDIO, 15, 1), | |
625 | AZF3328_MIXER_VOL_STEREO("CD Playback Volume", IDX_MIXER_CDAUDIO, 0x1f, 1), | |
626 | AZF3328_MIXER_SWITCH("Capture Switch", IDX_MIXER_REC_VOLUME, 15, 1), | |
627 | AZF3328_MIXER_VOL_STEREO("Capture Volume", IDX_MIXER_REC_VOLUME, 0x0f, 0), | |
628 | AZF3328_MIXER_ENUM("Capture Source", IDX_MIXER_REC_SELECT, 8, 0), | |
629 | AZF3328_MIXER_SWITCH("Mic Playback Switch", IDX_MIXER_MIC, 15, 1), | |
630 | AZF3328_MIXER_VOL_MONO("Mic Playback Volume", IDX_MIXER_MIC, 0x1f, 1), | |
631 | AZF3328_MIXER_SWITCH("Mic Boost (+20dB)", IDX_MIXER_MIC, 6, 0), | |
632 | AZF3328_MIXER_SWITCH("Line Playback Switch", IDX_MIXER_LINEIN, 15, 1), | |
633 | AZF3328_MIXER_VOL_STEREO("Line Playback Volume", IDX_MIXER_LINEIN, 0x1f, 1), | |
d91c64c8 AM |
634 | AZF3328_MIXER_SWITCH("PC Speaker Playback Switch", IDX_MIXER_PCBEEP, 15, 1), |
635 | AZF3328_MIXER_VOL_SPECIAL("PC Speaker Playback Volume", IDX_MIXER_PCBEEP, 0x0f, 1, 1), | |
1da177e4 LT |
636 | AZF3328_MIXER_SWITCH("Video Playback Switch", IDX_MIXER_VIDEO, 15, 1), |
637 | AZF3328_MIXER_VOL_STEREO("Video Playback Volume", IDX_MIXER_VIDEO, 0x1f, 1), | |
638 | AZF3328_MIXER_SWITCH("Aux Playback Switch", IDX_MIXER_AUX, 15, 1), | |
639 | AZF3328_MIXER_VOL_STEREO("Aux Playback Volume", IDX_MIXER_AUX, 0x1f, 1), | |
640 | AZF3328_MIXER_SWITCH("Modem Playback Switch", IDX_MIXER_MODEMOUT, 15, 1), | |
641 | AZF3328_MIXER_VOL_MONO("Modem Playback Volume", IDX_MIXER_MODEMOUT, 0x1f, 1), | |
642 | AZF3328_MIXER_SWITCH("Modem Capture Switch", IDX_MIXER_MODEMIN, 15, 1), | |
643 | AZF3328_MIXER_VOL_MONO("Modem Capture Volume", IDX_MIXER_MODEMIN, 0x1f, 1), | |
644 | AZF3328_MIXER_ENUM("Modem Out Select", IDX_MIXER_ADVCTL2, 2, 8), | |
645 | AZF3328_MIXER_ENUM("Mono Select Source", IDX_MIXER_ADVCTL2, 2, 9), | |
646 | AZF3328_MIXER_VOL_SPECIAL("Tone Control - Treble", IDX_MIXER_BASSTREBLE, 0x07, 1, 0), | |
647 | AZF3328_MIXER_VOL_SPECIAL("Tone Control - Bass", IDX_MIXER_BASSTREBLE, 0x07, 9, 0), | |
d91c64c8 AM |
648 | AZF3328_MIXER_SWITCH("3D Control - Switch", IDX_MIXER_ADVCTL2, 13, 0), |
649 | AZF3328_MIXER_VOL_SPECIAL("3D Control - Wide", IDX_MIXER_ADVCTL1, 0x07, 1, 0), /* "3D Width" */ | |
1da177e4 LT |
650 | AZF3328_MIXER_VOL_SPECIAL("3D Control - Space", IDX_MIXER_ADVCTL1, 0x03, 8, 0), /* "Hifi 3D" */ |
651 | #if MIXER_TESTING | |
652 | AZF3328_MIXER_SWITCH("0", IDX_MIXER_ADVCTL2, 0, 0), | |
653 | AZF3328_MIXER_SWITCH("1", IDX_MIXER_ADVCTL2, 1, 0), | |
654 | AZF3328_MIXER_SWITCH("2", IDX_MIXER_ADVCTL2, 2, 0), | |
655 | AZF3328_MIXER_SWITCH("3", IDX_MIXER_ADVCTL2, 3, 0), | |
656 | AZF3328_MIXER_SWITCH("4", IDX_MIXER_ADVCTL2, 4, 0), | |
657 | AZF3328_MIXER_SWITCH("5", IDX_MIXER_ADVCTL2, 5, 0), | |
658 | AZF3328_MIXER_SWITCH("6", IDX_MIXER_ADVCTL2, 6, 0), | |
659 | AZF3328_MIXER_SWITCH("7", IDX_MIXER_ADVCTL2, 7, 0), | |
660 | AZF3328_MIXER_SWITCH("8", IDX_MIXER_ADVCTL2, 8, 0), | |
661 | AZF3328_MIXER_SWITCH("9", IDX_MIXER_ADVCTL2, 9, 0), | |
662 | AZF3328_MIXER_SWITCH("10", IDX_MIXER_ADVCTL2, 10, 0), | |
663 | AZF3328_MIXER_SWITCH("11", IDX_MIXER_ADVCTL2, 11, 0), | |
664 | AZF3328_MIXER_SWITCH("12", IDX_MIXER_ADVCTL2, 12, 0), | |
665 | AZF3328_MIXER_SWITCH("13", IDX_MIXER_ADVCTL2, 13, 0), | |
666 | AZF3328_MIXER_SWITCH("14", IDX_MIXER_ADVCTL2, 14, 0), | |
667 | AZF3328_MIXER_SWITCH("15", IDX_MIXER_ADVCTL2, 15, 0), | |
668 | #endif | |
669 | }; | |
670 | ||
d91c64c8 | 671 | static const u16 __devinitdata snd_azf3328_init_values[][2] = { |
1da177e4 LT |
672 | { IDX_MIXER_PLAY_MASTER, MIXER_MUTE_MASK|0x1f1f }, |
673 | { IDX_MIXER_MODEMOUT, MIXER_MUTE_MASK|0x1f1f }, | |
674 | { IDX_MIXER_BASSTREBLE, 0x0000 }, | |
675 | { IDX_MIXER_PCBEEP, MIXER_MUTE_MASK|0x1f1f }, | |
676 | { IDX_MIXER_MODEMIN, MIXER_MUTE_MASK|0x1f1f }, | |
677 | { IDX_MIXER_MIC, MIXER_MUTE_MASK|0x001f }, | |
678 | { IDX_MIXER_LINEIN, MIXER_MUTE_MASK|0x1f1f }, | |
679 | { IDX_MIXER_CDAUDIO, MIXER_MUTE_MASK|0x1f1f }, | |
680 | { IDX_MIXER_VIDEO, MIXER_MUTE_MASK|0x1f1f }, | |
681 | { IDX_MIXER_AUX, MIXER_MUTE_MASK|0x1f1f }, | |
682 | { IDX_MIXER_WAVEOUT, MIXER_MUTE_MASK|0x1f1f }, | |
683 | { IDX_MIXER_FMSYNTH, MIXER_MUTE_MASK|0x1f1f }, | |
684 | { IDX_MIXER_REC_VOLUME, MIXER_MUTE_MASK|0x0707 }, | |
685 | }; | |
686 | ||
d91c64c8 | 687 | static int __devinit |
95de7766 | 688 | snd_azf3328_mixer_new(struct snd_azf3328 *chip) |
1da177e4 | 689 | { |
95de7766 TI |
690 | struct snd_card *card; |
691 | const struct snd_kcontrol_new *sw; | |
1da177e4 LT |
692 | unsigned int idx; |
693 | int err; | |
694 | ||
695 | snd_azf3328_dbgcallenter(); | |
696 | snd_assert(chip != NULL && chip->card != NULL, return -EINVAL); | |
697 | ||
698 | card = chip->card; | |
699 | ||
700 | /* mixer reset */ | |
d91c64c8 | 701 | snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000); |
1da177e4 LT |
702 | |
703 | /* mute and zero volume channels */ | |
d91c64c8 AM |
704 | for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_init_values); idx++) { |
705 | snd_azf3328_mixer_outw(chip, | |
706 | snd_azf3328_init_values[idx][0], | |
707 | snd_azf3328_init_values[idx][1]); | |
1da177e4 LT |
708 | } |
709 | ||
710 | /* add mixer controls */ | |
711 | sw = snd_azf3328_mixer_controls; | |
712 | for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_mixer_controls); idx++, sw++) { | |
713 | if ((err = snd_ctl_add(chip->card, snd_ctl_new1(sw, chip))) < 0) | |
714 | return err; | |
715 | } | |
716 | snd_component_add(card, "AZF3328 mixer"); | |
717 | strcpy(card->mixername, "AZF3328 mixer"); | |
718 | ||
719 | snd_azf3328_dbgcallleave(); | |
720 | return 0; | |
721 | } | |
722 | ||
d91c64c8 | 723 | static int |
95de7766 TI |
724 | snd_azf3328_hw_params(struct snd_pcm_substream *substream, |
725 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 LT |
726 | { |
727 | int res; | |
728 | snd_azf3328_dbgcallenter(); | |
729 | res = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); | |
730 | snd_azf3328_dbgcallleave(); | |
731 | return res; | |
732 | } | |
733 | ||
d91c64c8 | 734 | static int |
95de7766 | 735 | snd_azf3328_hw_free(struct snd_pcm_substream *substream) |
1da177e4 LT |
736 | { |
737 | snd_azf3328_dbgcallenter(); | |
738 | snd_pcm_lib_free_pages(substream); | |
739 | snd_azf3328_dbgcallleave(); | |
740 | return 0; | |
741 | } | |
742 | ||
d91c64c8 | 743 | static void |
95de7766 | 744 | snd_azf3328_setfmt(struct snd_azf3328 *chip, |
1da177e4 LT |
745 | unsigned int reg, |
746 | unsigned int bitrate, | |
747 | unsigned int format_width, | |
748 | unsigned int channels | |
749 | ) | |
750 | { | |
d91c64c8 | 751 | u16 val = 0xff00; |
1da177e4 LT |
752 | unsigned long flags; |
753 | ||
754 | snd_azf3328_dbgcallenter(); | |
755 | switch (bitrate) { | |
d91c64c8 AM |
756 | case 4000: val |= SOUNDFORMAT_FREQ_SUSPECTED_4000; break; |
757 | case 4800: val |= SOUNDFORMAT_FREQ_SUSPECTED_4800; break; | |
758 | case 5512: val |= SOUNDFORMAT_FREQ_5510; break; /* the AZF3328 names it "5510" for some strange reason */ | |
759 | case 6620: val |= SOUNDFORMAT_FREQ_6620; break; | |
760 | case 8000: val |= SOUNDFORMAT_FREQ_8000; break; | |
761 | case 9600: val |= SOUNDFORMAT_FREQ_9600; break; | |
762 | case 11025: val |= SOUNDFORMAT_FREQ_11025; break; | |
763 | case 13240: val |= SOUNDFORMAT_FREQ_SUSPECTED_13240; break; | |
764 | case 16000: val |= SOUNDFORMAT_FREQ_16000; break; | |
765 | case 22050: val |= SOUNDFORMAT_FREQ_22050; break; | |
766 | case 32000: val |= SOUNDFORMAT_FREQ_32000; break; | |
767 | case 44100: val |= SOUNDFORMAT_FREQ_44100; break; | |
768 | case 48000: val |= SOUNDFORMAT_FREQ_48000; break; | |
769 | case 66200: val |= SOUNDFORMAT_FREQ_SUSPECTED_66200; break; | |
1da177e4 | 770 | default: |
99b359ba | 771 | snd_printk(KERN_WARNING "unknown bitrate %d, assuming 44.1kHz!\n", bitrate); |
d91c64c8 | 772 | val |= SOUNDFORMAT_FREQ_44100; |
1da177e4 LT |
773 | break; |
774 | } | |
d91c64c8 AM |
775 | /* val = 0xff07; 3m27.993s (65301Hz; -> 64000Hz???) hmm, 66120, 65967, 66123 */ |
776 | /* val = 0xff09; 17m15.098s (13123,478Hz; -> 12000Hz???) hmm, 13237.2Hz? */ | |
777 | /* val = 0xff0a; 47m30.599s (4764,891Hz; -> 4800Hz???) yup, 4803Hz */ | |
778 | /* val = 0xff0c; 57m0.510s (4010,263Hz; -> 4000Hz???) yup, 4003Hz */ | |
1da177e4 LT |
779 | /* val = 0xff05; 5m11.556s (... -> 44100Hz) */ |
780 | /* val = 0xff03; 10m21.529s (21872,463Hz; -> 22050Hz???) */ | |
781 | /* val = 0xff0f; 20m41.883s (10937,993Hz; -> 11025Hz???) */ | |
782 | /* val = 0xff0d; 41m23.135s (5523,600Hz; -> 5512Hz???) */ | |
783 | /* val = 0xff0e; 28m30.777s (8017Hz; -> 8000Hz???) */ | |
d91c64c8 | 784 | |
1da177e4 LT |
785 | if (channels == 2) |
786 | val |= SOUNDFORMAT_FLAG_2CHANNELS; | |
787 | ||
788 | if (format_width == 16) | |
789 | val |= SOUNDFORMAT_FLAG_16BIT; | |
790 | ||
791 | spin_lock_irqsave(&chip->reg_lock, flags); | |
792 | ||
793 | /* set bitrate/format */ | |
d91c64c8 | 794 | snd_azf3328_codec_outw(chip, reg, val); |
1da177e4 LT |
795 | |
796 | /* changing the bitrate/format settings switches off the | |
797 | * audio output with an annoying click in case of 8/16bit format change | |
798 | * (maybe shutting down DAC/ADC?), thus immediately | |
799 | * do some tweaking to reenable it and get rid of the clicking | |
800 | * (FIXME: yes, it works, but what exactly am I doing here?? :) | |
801 | * FIXME: does this have some side effects for full-duplex | |
802 | * or other dramatic side effects? */ | |
803 | if (reg == IDX_IO_PLAY_SOUNDFORMAT) /* only do it for playback */ | |
d91c64c8 AM |
804 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, |
805 | snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) | | |
806 | DMA_PLAY_SOMETHING1 | | |
807 | DMA_PLAY_SOMETHING2 | | |
808 | SOMETHING_ALMOST_ALWAYS_SET | | |
809 | DMA_EPILOGUE_SOMETHING | | |
810 | DMA_SOMETHING_ELSE | |
811 | ); | |
1da177e4 LT |
812 | |
813 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
814 | snd_azf3328_dbgcallleave(); | |
815 | } | |
816 | ||
d91c64c8 | 817 | static void |
95de7766 | 818 | snd_azf3328_setdmaa(struct snd_azf3328 *chip, |
1da177e4 LT |
819 | long unsigned int addr, |
820 | unsigned int count, | |
821 | unsigned int size, | |
822 | int do_recording) | |
823 | { | |
d91c64c8 AM |
824 | unsigned long flags, portbase; |
825 | unsigned int is_running; | |
1da177e4 LT |
826 | |
827 | snd_azf3328_dbgcallenter(); | |
d91c64c8 AM |
828 | if (do_recording) |
829 | { | |
830 | /* access capture registers, i.e. skip playback reg section */ | |
831 | portbase = chip->codec_port + 0x20; | |
832 | is_running = chip->is_recording; | |
833 | } | |
834 | else | |
835 | { | |
836 | /* access the playback register section */ | |
837 | portbase = chip->codec_port + 0x00; | |
838 | is_running = chip->is_playing; | |
839 | } | |
840 | ||
1da177e4 | 841 | /* AZF3328 uses a two buffer pointer DMA playback approach */ |
d91c64c8 | 842 | if (!is_running) |
1da177e4 | 843 | { |
d91c64c8 AM |
844 | unsigned long addr_area2; |
845 | unsigned long count_areas, count_tmp; /* width 32bit -- overflow!! */ | |
846 | count_areas = size/2; | |
847 | addr_area2 = addr+count_areas; | |
848 | count_areas--; /* max. index */ | |
849 | snd_azf3328_dbgplay("set DMA: buf1 %08lx[%lu], buf2 %08lx[%lu]\n", addr, count_areas, addr_area2, count_areas); | |
850 | ||
851 | /* build combined I/O buffer length word */ | |
852 | count_tmp = count_areas; | |
853 | count_areas |= (count_tmp << 16); | |
1da177e4 | 854 | spin_lock_irqsave(&chip->reg_lock, flags); |
d91c64c8 AM |
855 | outl(addr, portbase + IDX_IO_PLAY_DMA_START_1); |
856 | outl(addr_area2, portbase + IDX_IO_PLAY_DMA_START_2); | |
857 | outl(count_areas, portbase + IDX_IO_PLAY_DMA_LEN_1); | |
1da177e4 LT |
858 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
859 | } | |
860 | snd_azf3328_dbgcallleave(); | |
861 | } | |
862 | ||
d91c64c8 | 863 | static int |
95de7766 | 864 | snd_azf3328_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 LT |
865 | { |
866 | #if 0 | |
95de7766 TI |
867 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
868 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
869 | unsigned int size = snd_pcm_lib_buffer_bytes(substream); |
870 | unsigned int count = snd_pcm_lib_period_bytes(substream); | |
871 | #endif | |
872 | ||
873 | snd_azf3328_dbgcallenter(); | |
874 | #if 0 | |
d91c64c8 AM |
875 | snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, |
876 | runtime->rate, | |
877 | snd_pcm_format_width(runtime->format), | |
878 | runtime->channels); | |
1da177e4 LT |
879 | snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 0); |
880 | #endif | |
881 | snd_azf3328_dbgcallleave(); | |
882 | return 0; | |
883 | } | |
884 | ||
d91c64c8 | 885 | static int |
95de7766 | 886 | snd_azf3328_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 LT |
887 | { |
888 | #if 0 | |
95de7766 TI |
889 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
890 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
891 | unsigned int size = snd_pcm_lib_buffer_bytes(substream); |
892 | unsigned int count = snd_pcm_lib_period_bytes(substream); | |
893 | #endif | |
894 | ||
895 | snd_azf3328_dbgcallenter(); | |
896 | #if 0 | |
d91c64c8 AM |
897 | snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, |
898 | runtime->rate, | |
899 | snd_pcm_format_width(runtime->format), | |
900 | runtime->channels); | |
1da177e4 LT |
901 | snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 1); |
902 | #endif | |
903 | snd_azf3328_dbgcallleave(); | |
904 | return 0; | |
905 | } | |
906 | ||
d91c64c8 | 907 | static int |
95de7766 | 908 | snd_azf3328_playback_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 909 | { |
95de7766 TI |
910 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
911 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
912 | int result = 0; |
913 | unsigned int status1; | |
914 | ||
915 | snd_azf3328_dbgcalls("snd_azf3328_playback_trigger cmd %d\n", cmd); | |
d91c64c8 | 916 | |
1da177e4 LT |
917 | switch (cmd) { |
918 | case SNDRV_PCM_TRIGGER_START: | |
d91c64c8 | 919 | snd_azf3328_dbgplay("START PLAYBACK\n"); |
1da177e4 LT |
920 | |
921 | /* mute WaveOut */ | |
922 | snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1); | |
923 | ||
d91c64c8 AM |
924 | snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, |
925 | runtime->rate, | |
926 | snd_pcm_format_width(runtime->format), | |
927 | runtime->channels); | |
1da177e4 LT |
928 | |
929 | spin_lock(&chip->reg_lock); | |
930 | /* stop playback */ | |
d91c64c8 | 931 | status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS); |
1da177e4 | 932 | status1 &= ~DMA_RESUME; |
d91c64c8 | 933 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); |
1da177e4 LT |
934 | |
935 | /* FIXME: clear interrupts or what??? */ | |
d91c64c8 | 936 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_IRQTYPE, 0xffff); |
1da177e4 LT |
937 | spin_unlock(&chip->reg_lock); |
938 | ||
d91c64c8 AM |
939 | snd_azf3328_setdmaa(chip, runtime->dma_addr, |
940 | snd_pcm_lib_period_bytes(substream), | |
941 | snd_pcm_lib_buffer_bytes(substream), | |
942 | 0); | |
1da177e4 LT |
943 | |
944 | spin_lock(&chip->reg_lock); | |
945 | #ifdef WIN9X | |
946 | /* FIXME: enable playback/recording??? */ | |
947 | status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2; | |
d91c64c8 | 948 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); |
1da177e4 LT |
949 | |
950 | /* start playback again */ | |
951 | /* FIXME: what is this value (0x0010)??? */ | |
952 | status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING; | |
d91c64c8 | 953 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); |
1da177e4 | 954 | #else /* NT4 */ |
d91c64c8 AM |
955 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, |
956 | 0x0000); | |
957 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, | |
958 | DMA_PLAY_SOMETHING1); | |
959 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, | |
960 | DMA_PLAY_SOMETHING1 | | |
961 | DMA_PLAY_SOMETHING2); | |
962 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, | |
963 | DMA_RESUME | | |
964 | SOMETHING_ALMOST_ALWAYS_SET | | |
965 | DMA_EPILOGUE_SOMETHING | | |
966 | DMA_SOMETHING_ELSE); | |
1da177e4 LT |
967 | #endif |
968 | spin_unlock(&chip->reg_lock); | |
969 | ||
970 | /* now unmute WaveOut */ | |
971 | snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0); | |
972 | ||
1da177e4 | 973 | chip->is_playing = 1; |
d91c64c8 | 974 | snd_azf3328_dbgplay("STARTED PLAYBACK\n"); |
1da177e4 | 975 | break; |
ca54bde3 AM |
976 | case SNDRV_PCM_TRIGGER_RESUME: |
977 | snd_azf3328_dbgplay("RESUME PLAYBACK\n"); | |
978 | /* resume playback if we were active */ | |
979 | if (chip->is_playing) | |
980 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, | |
981 | snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) | DMA_RESUME); | |
982 | break; | |
d91c64c8 AM |
983 | case SNDRV_PCM_TRIGGER_STOP: |
984 | snd_azf3328_dbgplay("STOP PLAYBACK\n"); | |
985 | ||
1da177e4 LT |
986 | /* mute WaveOut */ |
987 | snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1); | |
988 | ||
989 | spin_lock(&chip->reg_lock); | |
990 | /* stop playback */ | |
d91c64c8 | 991 | status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS); |
1da177e4 LT |
992 | |
993 | status1 &= ~DMA_RESUME; | |
d91c64c8 | 994 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); |
1da177e4 | 995 | |
d91c64c8 AM |
996 | /* hmm, is this really required? we're resetting the same bit |
997 | * immediately thereafter... */ | |
1da177e4 | 998 | status1 |= DMA_PLAY_SOMETHING1; |
d91c64c8 | 999 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); |
1da177e4 LT |
1000 | |
1001 | status1 &= ~DMA_PLAY_SOMETHING1; | |
d91c64c8 | 1002 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); |
1da177e4 LT |
1003 | spin_unlock(&chip->reg_lock); |
1004 | ||
1005 | /* now unmute WaveOut */ | |
1006 | snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0); | |
1007 | chip->is_playing = 0; | |
d91c64c8 | 1008 | snd_azf3328_dbgplay("STOPPED PLAYBACK\n"); |
1da177e4 | 1009 | break; |
ca54bde3 AM |
1010 | case SNDRV_PCM_TRIGGER_SUSPEND: |
1011 | snd_azf3328_dbgplay("SUSPEND PLAYBACK\n"); | |
1012 | /* make sure playback is stopped */ | |
1013 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, | |
1014 | snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) & ~DMA_RESUME); | |
1015 | break; | |
1da177e4 | 1016 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
99b359ba | 1017 | snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n"); |
1da177e4 LT |
1018 | break; |
1019 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
99b359ba | 1020 | snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n"); |
1da177e4 LT |
1021 | break; |
1022 | default: | |
ca54bde3 | 1023 | printk(KERN_ERR "FIXME: unknown trigger mode!\n"); |
1da177e4 LT |
1024 | return -EINVAL; |
1025 | } | |
1026 | ||
1027 | snd_azf3328_dbgcallleave(); | |
1028 | return result; | |
1029 | } | |
1030 | ||
1031 | /* this is just analogous to playback; I'm not quite sure whether recording | |
1032 | * should actually be triggered like that */ | |
d91c64c8 | 1033 | static int |
95de7766 | 1034 | snd_azf3328_capture_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 1035 | { |
95de7766 TI |
1036 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
1037 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1038 | int result = 0; |
1039 | unsigned int status1; | |
1040 | ||
1041 | snd_azf3328_dbgcalls("snd_azf3328_capture_trigger cmd %d\n", cmd); | |
d91c64c8 | 1042 | |
1da177e4 LT |
1043 | switch (cmd) { |
1044 | case SNDRV_PCM_TRIGGER_START: | |
1045 | ||
d91c64c8 | 1046 | snd_azf3328_dbgplay("START CAPTURE\n"); |
1da177e4 | 1047 | |
d91c64c8 AM |
1048 | snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, |
1049 | runtime->rate, | |
1050 | snd_pcm_format_width(runtime->format), | |
1051 | runtime->channels); | |
1da177e4 LT |
1052 | |
1053 | spin_lock(&chip->reg_lock); | |
1054 | /* stop recording */ | |
d91c64c8 | 1055 | status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS); |
1da177e4 | 1056 | status1 &= ~DMA_RESUME; |
d91c64c8 | 1057 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); |
1da177e4 LT |
1058 | |
1059 | /* FIXME: clear interrupts or what??? */ | |
d91c64c8 | 1060 | snd_azf3328_codec_outw(chip, IDX_IO_REC_IRQTYPE, 0xffff); |
1da177e4 LT |
1061 | spin_unlock(&chip->reg_lock); |
1062 | ||
d91c64c8 AM |
1063 | snd_azf3328_setdmaa(chip, runtime->dma_addr, |
1064 | snd_pcm_lib_period_bytes(substream), | |
1065 | snd_pcm_lib_buffer_bytes(substream), | |
1066 | 1); | |
1da177e4 LT |
1067 | |
1068 | spin_lock(&chip->reg_lock); | |
1069 | #ifdef WIN9X | |
1070 | /* FIXME: enable playback/recording??? */ | |
1071 | status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2; | |
d91c64c8 | 1072 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); |
1da177e4 | 1073 | |
d91c64c8 | 1074 | /* start capture again */ |
1da177e4 LT |
1075 | /* FIXME: what is this value (0x0010)??? */ |
1076 | status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING; | |
d91c64c8 | 1077 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); |
1da177e4 | 1078 | #else |
d91c64c8 AM |
1079 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, |
1080 | 0x0000); | |
1081 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, | |
1082 | DMA_PLAY_SOMETHING1); | |
1083 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, | |
1084 | DMA_PLAY_SOMETHING1 | | |
1085 | DMA_PLAY_SOMETHING2); | |
1086 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, | |
1087 | DMA_RESUME | | |
1088 | SOMETHING_ALMOST_ALWAYS_SET | | |
1089 | DMA_EPILOGUE_SOMETHING | | |
1090 | DMA_SOMETHING_ELSE); | |
1da177e4 LT |
1091 | #endif |
1092 | spin_unlock(&chip->reg_lock); | |
1093 | ||
d91c64c8 AM |
1094 | chip->is_recording = 1; |
1095 | snd_azf3328_dbgplay("STARTED CAPTURE\n"); | |
1da177e4 | 1096 | break; |
ca54bde3 AM |
1097 | case SNDRV_PCM_TRIGGER_RESUME: |
1098 | snd_azf3328_dbgplay("RESUME CAPTURE\n"); | |
1099 | /* resume recording if we were active */ | |
1100 | if (chip->is_recording) | |
1101 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, | |
1102 | snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS) | DMA_RESUME); | |
1103 | break; | |
1da177e4 | 1104 | case SNDRV_PCM_TRIGGER_STOP: |
d91c64c8 AM |
1105 | snd_azf3328_dbgplay("STOP CAPTURE\n"); |
1106 | ||
1da177e4 LT |
1107 | spin_lock(&chip->reg_lock); |
1108 | /* stop recording */ | |
d91c64c8 | 1109 | status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS); |
1da177e4 LT |
1110 | |
1111 | status1 &= ~DMA_RESUME; | |
d91c64c8 | 1112 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); |
1da177e4 LT |
1113 | |
1114 | status1 |= DMA_PLAY_SOMETHING1; | |
d91c64c8 | 1115 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); |
1da177e4 LT |
1116 | |
1117 | status1 &= ~DMA_PLAY_SOMETHING1; | |
d91c64c8 | 1118 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); |
1da177e4 LT |
1119 | spin_unlock(&chip->reg_lock); |
1120 | ||
d91c64c8 AM |
1121 | chip->is_recording = 0; |
1122 | snd_azf3328_dbgplay("STOPPED CAPTURE\n"); | |
1da177e4 | 1123 | break; |
ca54bde3 AM |
1124 | case SNDRV_PCM_TRIGGER_SUSPEND: |
1125 | snd_azf3328_dbgplay("SUSPEND CAPTURE\n"); | |
1126 | /* make sure recording is stopped */ | |
1127 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, | |
1128 | snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS) & ~DMA_RESUME); | |
1129 | break; | |
1da177e4 | 1130 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
99b359ba | 1131 | snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n"); |
1da177e4 LT |
1132 | break; |
1133 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
99b359ba | 1134 | snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n"); |
1da177e4 LT |
1135 | break; |
1136 | default: | |
ca54bde3 | 1137 | printk(KERN_ERR "FIXME: unknown trigger mode!\n"); |
1da177e4 LT |
1138 | return -EINVAL; |
1139 | } | |
1140 | ||
1141 | snd_azf3328_dbgcallleave(); | |
1142 | return result; | |
1143 | } | |
1144 | ||
d91c64c8 | 1145 | static snd_pcm_uframes_t |
95de7766 | 1146 | snd_azf3328_playback_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 1147 | { |
95de7766 | 1148 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
d91c64c8 | 1149 | unsigned long bufptr, result; |
1da177e4 LT |
1150 | snd_pcm_uframes_t frmres; |
1151 | ||
1152 | #ifdef QUERY_HARDWARE | |
1153 | bufptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_START_1); | |
1154 | #else | |
1155 | bufptr = substream->runtime->dma_addr; | |
1156 | #endif | |
d91c64c8 | 1157 | result = inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS); |
1da177e4 | 1158 | |
d91c64c8 AM |
1159 | /* calculate offset */ |
1160 | result -= bufptr; | |
1161 | frmres = bytes_to_frames( substream->runtime, result); | |
1162 | snd_azf3328_dbgplay("PLAY @ 0x%8lx, frames %8ld\n", result, frmres); | |
1da177e4 LT |
1163 | return frmres; |
1164 | } | |
1165 | ||
d91c64c8 | 1166 | static snd_pcm_uframes_t |
95de7766 | 1167 | snd_azf3328_capture_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 1168 | { |
95de7766 | 1169 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
d91c64c8 | 1170 | unsigned long bufptr, result; |
1da177e4 LT |
1171 | snd_pcm_uframes_t frmres; |
1172 | ||
1173 | #ifdef QUERY_HARDWARE | |
1174 | bufptr = inl(chip->codec_port+IDX_IO_REC_DMA_START_1); | |
1175 | #else | |
1176 | bufptr = substream->runtime->dma_addr; | |
1177 | #endif | |
d91c64c8 | 1178 | result = inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS); |
1da177e4 | 1179 | |
d91c64c8 AM |
1180 | /* calculate offset */ |
1181 | result -= bufptr; | |
1182 | frmres = bytes_to_frames( substream->runtime, result); | |
1183 | snd_azf3328_dbgplay("REC @ 0x%8lx, frames %8ld\n", result, frmres); | |
1da177e4 LT |
1184 | return frmres; |
1185 | } | |
1186 | ||
d91c64c8 AM |
1187 | static irqreturn_t |
1188 | snd_azf3328_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
1da177e4 | 1189 | { |
95de7766 | 1190 | struct snd_azf3328 *chip = dev_id; |
d91c64c8 AM |
1191 | u8 status, which; |
1192 | static unsigned long irq_count; | |
1da177e4 | 1193 | |
d91c64c8 | 1194 | status = snd_azf3328_codec_inb(chip, IDX_IO_IRQSTATUS); |
1da177e4 LT |
1195 | |
1196 | /* fast path out, to ease interrupt sharing */ | |
d91c64c8 | 1197 | if (!(status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_MPU401|IRQ_TIMER))) |
1da177e4 LT |
1198 | return IRQ_NONE; /* must be interrupt for another device */ |
1199 | ||
d91c64c8 AM |
1200 | snd_azf3328_dbgplay("Interrupt %ld!\nIDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQTYPE %04x, IDX_IO_IRQSTATUS %04x\n", |
1201 | irq_count, | |
1202 | snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS), | |
1203 | snd_azf3328_codec_inw(chip, IDX_IO_PLAY_IRQTYPE), | |
1204 | status); | |
1da177e4 | 1205 | |
d91c64c8 AM |
1206 | if (status & IRQ_TIMER) |
1207 | { | |
1208 | /* snd_azf3328_dbgplay("timer %ld\n", inl(chip->codec_port+IDX_IO_TIMER_VALUE) & TIMER_VALUE_MASK); */ | |
1209 | if (chip->timer) | |
1210 | snd_timer_interrupt(chip->timer, chip->timer->sticks); | |
1211 | /* ACK timer */ | |
1212 | spin_lock(&chip->reg_lock); | |
1213 | snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x07); | |
1214 | spin_unlock(&chip->reg_lock); | |
1215 | snd_azf3328_dbgplay("azt3328: timer IRQ\n"); | |
1216 | } | |
1da177e4 LT |
1217 | if (status & IRQ_PLAYBACK) |
1218 | { | |
1219 | spin_lock(&chip->reg_lock); | |
d91c64c8 AM |
1220 | which = snd_azf3328_codec_inb(chip, IDX_IO_PLAY_IRQTYPE); |
1221 | /* ack all IRQ types immediately */ | |
1222 | snd_azf3328_codec_outb(chip, IDX_IO_PLAY_IRQTYPE, which); | |
1223 | spin_unlock(&chip->reg_lock); | |
1224 | ||
1da177e4 LT |
1225 | if (chip->pcm && chip->playback_substream) |
1226 | { | |
1da177e4 | 1227 | snd_pcm_period_elapsed(chip->playback_substream); |
d91c64c8 AM |
1228 | snd_azf3328_dbgplay("PLAY period done (#%x), @ %x\n", |
1229 | which, | |
1230 | inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS)); | |
1da177e4 LT |
1231 | } |
1232 | else | |
1233 | snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n"); | |
d91c64c8 AM |
1234 | if (which & IRQ_PLAY_SOMETHING) |
1235 | snd_azf3328_dbgplay("azt3328: unknown play IRQ type occurred, please report!\n"); | |
1da177e4 LT |
1236 | } |
1237 | if (status & IRQ_RECORDING) | |
1238 | { | |
1239 | spin_lock(&chip->reg_lock); | |
d91c64c8 AM |
1240 | which = snd_azf3328_codec_inb(chip, IDX_IO_REC_IRQTYPE); |
1241 | /* ack all IRQ types immediately */ | |
1242 | snd_azf3328_codec_outb(chip, IDX_IO_REC_IRQTYPE, which); | |
1243 | spin_unlock(&chip->reg_lock); | |
1244 | ||
1da177e4 LT |
1245 | if (chip->pcm && chip->capture_substream) |
1246 | { | |
1da177e4 | 1247 | snd_pcm_period_elapsed(chip->capture_substream); |
d91c64c8 AM |
1248 | snd_azf3328_dbgplay("REC period done (#%x), @ %x\n", |
1249 | which, | |
1250 | inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS)); | |
1da177e4 | 1251 | } |
d91c64c8 AM |
1252 | else |
1253 | snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n"); | |
1254 | if (which & IRQ_REC_SOMETHING) | |
1255 | snd_azf3328_dbgplay("azt3328: unknown rec IRQ type occurred, please report!\n"); | |
1da177e4 | 1256 | } |
d91c64c8 AM |
1257 | /* MPU401 has less critical IRQ requirements |
1258 | * than timer and playback/recording, right? */ | |
1da177e4 | 1259 | if (status & IRQ_MPU401) |
d91c64c8 | 1260 | { |
1da177e4 | 1261 | snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs); |
d91c64c8 AM |
1262 | |
1263 | /* hmm, do we have to ack the IRQ here somehow? | |
1264 | * If so, then I don't know how... */ | |
1265 | snd_azf3328_dbgplay("azt3328: MPU401 IRQ\n"); | |
1266 | } | |
1267 | irq_count++; | |
1da177e4 LT |
1268 | return IRQ_HANDLED; |
1269 | } | |
1270 | ||
1271 | /*****************************************************************/ | |
1272 | ||
95de7766 | 1273 | static const struct snd_pcm_hardware snd_azf3328_playback = |
1da177e4 LT |
1274 | { |
1275 | /* FIXME!! Correct? */ | |
d91c64c8 AM |
1276 | .info = SNDRV_PCM_INFO_MMAP | |
1277 | SNDRV_PCM_INFO_INTERLEAVED | | |
1278 | SNDRV_PCM_INFO_MMAP_VALID, | |
1279 | .formats = SNDRV_PCM_FMTBIT_S8 | | |
1280 | SNDRV_PCM_FMTBIT_U8 | | |
1281 | SNDRV_PCM_FMTBIT_S16_LE | | |
1282 | SNDRV_PCM_FMTBIT_U16_LE, | |
1283 | .rates = SNDRV_PCM_RATE_5512 | | |
1284 | SNDRV_PCM_RATE_8000_48000 | | |
1285 | SNDRV_PCM_RATE_KNOT, | |
1286 | .rate_min = 4000, | |
1287 | .rate_max = 66200, | |
1da177e4 LT |
1288 | .channels_min = 1, |
1289 | .channels_max = 2, | |
1290 | .buffer_bytes_max = 65536, | |
1291 | .period_bytes_min = 64, | |
1292 | .period_bytes_max = 65536, | |
1293 | .periods_min = 1, | |
1294 | .periods_max = 1024, | |
1295 | /* FIXME: maybe that card actually has a FIFO? | |
1296 | * Hmm, it seems newer revisions do have one, but we still don't know | |
1297 | * its size... */ | |
1298 | .fifo_size = 0, | |
1299 | }; | |
1300 | ||
95de7766 | 1301 | static const struct snd_pcm_hardware snd_azf3328_capture = |
1da177e4 LT |
1302 | { |
1303 | /* FIXME */ | |
d91c64c8 AM |
1304 | .info = SNDRV_PCM_INFO_MMAP | |
1305 | SNDRV_PCM_INFO_INTERLEAVED | | |
1306 | SNDRV_PCM_INFO_MMAP_VALID, | |
1307 | .formats = SNDRV_PCM_FMTBIT_S8 | | |
1308 | SNDRV_PCM_FMTBIT_U8 | | |
1309 | SNDRV_PCM_FMTBIT_S16_LE | | |
1310 | SNDRV_PCM_FMTBIT_U16_LE, | |
1311 | .rates = SNDRV_PCM_RATE_5512 | | |
1312 | SNDRV_PCM_RATE_8000_48000 | | |
1313 | SNDRV_PCM_RATE_KNOT, | |
1314 | .rate_min = 4000, | |
1315 | .rate_max = 66200, | |
1da177e4 LT |
1316 | .channels_min = 1, |
1317 | .channels_max = 2, | |
1318 | .buffer_bytes_max = 65536, | |
1319 | .period_bytes_min = 64, | |
1320 | .period_bytes_max = 65536, | |
1321 | .periods_min = 1, | |
1322 | .periods_max = 1024, | |
1323 | .fifo_size = 0, | |
1324 | }; | |
1325 | ||
1326 | ||
1327 | static unsigned int snd_azf3328_fixed_rates[] = { | |
d91c64c8 AM |
1328 | 4000, 4800, 5512, 6620, 8000, 9600, 11025, 13240, 16000, 22050, 32000, |
1329 | 44100, 48000, 66200 }; | |
95de7766 | 1330 | static struct snd_pcm_hw_constraint_list snd_azf3328_hw_constraints_rates = { |
1da177e4 LT |
1331 | .count = ARRAY_SIZE(snd_azf3328_fixed_rates), |
1332 | .list = snd_azf3328_fixed_rates, | |
1333 | .mask = 0, | |
1334 | }; | |
1335 | ||
1336 | /*****************************************************************/ | |
1337 | ||
d91c64c8 | 1338 | static int |
95de7766 | 1339 | snd_azf3328_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 1340 | { |
95de7766 TI |
1341 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
1342 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1343 | |
1344 | snd_azf3328_dbgcallenter(); | |
1345 | chip->playback_substream = substream; | |
1346 | runtime->hw = snd_azf3328_playback; | |
1347 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, | |
1348 | &snd_azf3328_hw_constraints_rates); | |
1349 | snd_azf3328_dbgcallleave(); | |
1350 | return 0; | |
1351 | } | |
1352 | ||
d91c64c8 | 1353 | static int |
95de7766 | 1354 | snd_azf3328_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 1355 | { |
95de7766 TI |
1356 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
1357 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1358 | |
1359 | snd_azf3328_dbgcallenter(); | |
1360 | chip->capture_substream = substream; | |
1361 | runtime->hw = snd_azf3328_capture; | |
1362 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, | |
1363 | &snd_azf3328_hw_constraints_rates); | |
1364 | snd_azf3328_dbgcallleave(); | |
1365 | return 0; | |
1366 | } | |
1367 | ||
d91c64c8 | 1368 | static int |
95de7766 | 1369 | snd_azf3328_playback_close(struct snd_pcm_substream *substream) |
1da177e4 | 1370 | { |
95de7766 | 1371 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1372 | |
1373 | snd_azf3328_dbgcallenter(); | |
1374 | ||
1375 | chip->playback_substream = NULL; | |
1376 | snd_azf3328_dbgcallleave(); | |
1377 | return 0; | |
1378 | } | |
1379 | ||
d91c64c8 | 1380 | static int |
95de7766 | 1381 | snd_azf3328_capture_close(struct snd_pcm_substream *substream) |
1da177e4 | 1382 | { |
95de7766 | 1383 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1384 | |
1385 | snd_azf3328_dbgcallenter(); | |
1386 | chip->capture_substream = NULL; | |
1387 | snd_azf3328_dbgcallleave(); | |
1388 | return 0; | |
1389 | } | |
1390 | ||
1391 | /******************************************************************/ | |
1392 | ||
95de7766 | 1393 | static struct snd_pcm_ops snd_azf3328_playback_ops = { |
1da177e4 LT |
1394 | .open = snd_azf3328_playback_open, |
1395 | .close = snd_azf3328_playback_close, | |
1396 | .ioctl = snd_pcm_lib_ioctl, | |
1397 | .hw_params = snd_azf3328_hw_params, | |
1398 | .hw_free = snd_azf3328_hw_free, | |
1399 | .prepare = snd_azf3328_playback_prepare, | |
1400 | .trigger = snd_azf3328_playback_trigger, | |
1401 | .pointer = snd_azf3328_playback_pointer | |
1402 | }; | |
1403 | ||
95de7766 | 1404 | static struct snd_pcm_ops snd_azf3328_capture_ops = { |
1da177e4 LT |
1405 | .open = snd_azf3328_capture_open, |
1406 | .close = snd_azf3328_capture_close, | |
1407 | .ioctl = snd_pcm_lib_ioctl, | |
1408 | .hw_params = snd_azf3328_hw_params, | |
1409 | .hw_free = snd_azf3328_hw_free, | |
1410 | .prepare = snd_azf3328_capture_prepare, | |
1411 | .trigger = snd_azf3328_capture_trigger, | |
1412 | .pointer = snd_azf3328_capture_pointer | |
1413 | }; | |
1414 | ||
d91c64c8 | 1415 | static int __devinit |
95de7766 | 1416 | snd_azf3328_pcm(struct snd_azf3328 *chip, int device) |
1da177e4 | 1417 | { |
95de7766 | 1418 | struct snd_pcm *pcm; |
1da177e4 LT |
1419 | int err; |
1420 | ||
1421 | snd_azf3328_dbgcallenter(); | |
1422 | if ((err = snd_pcm_new(chip->card, "AZF3328 DSP", device, 1, 1, &pcm)) < 0) | |
1423 | return err; | |
1424 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_azf3328_playback_ops); | |
1425 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_azf3328_capture_ops); | |
1426 | ||
1427 | pcm->private_data = chip; | |
1da177e4 LT |
1428 | pcm->info_flags = 0; |
1429 | strcpy(pcm->name, chip->card->shortname); | |
1430 | chip->pcm = pcm; | |
1431 | ||
1432 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
1433 | snd_dma_pci_data(chip->pci), 64*1024, 64*1024); | |
1434 | ||
1435 | snd_azf3328_dbgcallleave(); | |
1436 | return 0; | |
1437 | } | |
1438 | ||
1439 | /******************************************************************/ | |
1440 | ||
1441 | #ifdef SUPPORT_JOYSTICK | |
d91c64c8 | 1442 | static int __devinit |
95de7766 | 1443 | snd_azf3328_config_joystick(struct snd_azf3328 *chip, int dev) |
1da177e4 LT |
1444 | { |
1445 | struct gameport *gp; | |
1446 | struct resource *r; | |
1447 | ||
1448 | if (!joystick[dev]) | |
1449 | return -ENODEV; | |
1450 | ||
1451 | if (!(r = request_region(0x200, 8, "AZF3328 gameport"))) { | |
1452 | printk(KERN_WARNING "azt3328: cannot reserve joystick ports\n"); | |
1453 | return -EBUSY; | |
1454 | } | |
1455 | ||
1456 | chip->gameport = gp = gameport_allocate_port(); | |
1457 | if (!gp) { | |
1458 | printk(KERN_ERR "azt3328: cannot allocate memory for gameport\n"); | |
b1d5776d | 1459 | release_and_free_resource(r); |
1da177e4 LT |
1460 | return -ENOMEM; |
1461 | } | |
1462 | ||
1463 | gameport_set_name(gp, "AZF3328 Gameport"); | |
1464 | gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); | |
1465 | gameport_set_dev_parent(gp, &chip->pci->dev); | |
1466 | gp->io = 0x200; | |
1467 | gameport_set_port_data(gp, r); | |
1468 | ||
d91c64c8 AM |
1469 | snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR, |
1470 | snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) | LEGACY_JOY); | |
1da177e4 LT |
1471 | |
1472 | gameport_register_port(chip->gameport); | |
1473 | ||
1474 | return 0; | |
1475 | } | |
1476 | ||
d91c64c8 | 1477 | static void |
95de7766 | 1478 | snd_azf3328_free_joystick(struct snd_azf3328 *chip) |
1da177e4 LT |
1479 | { |
1480 | if (chip->gameport) { | |
1481 | struct resource *r = gameport_get_port_data(chip->gameport); | |
1482 | ||
1483 | gameport_unregister_port(chip->gameport); | |
1484 | chip->gameport = NULL; | |
1485 | /* disable gameport */ | |
d91c64c8 AM |
1486 | snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR, |
1487 | snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY); | |
b1d5776d | 1488 | release_and_free_resource(r); |
1da177e4 LT |
1489 | } |
1490 | } | |
1491 | #else | |
d91c64c8 | 1492 | static inline int |
95de7766 | 1493 | snd_azf3328_config_joystick(struct snd_azf3328 *chip, int dev) { return -ENOSYS; } |
d91c64c8 | 1494 | static inline void |
95de7766 | 1495 | snd_azf3328_free_joystick(struct snd_azf3328 *chip) { } |
1da177e4 LT |
1496 | #endif |
1497 | ||
1498 | /******************************************************************/ | |
1499 | ||
d91c64c8 | 1500 | static int |
95de7766 | 1501 | snd_azf3328_free(struct snd_azf3328 *chip) |
1da177e4 LT |
1502 | { |
1503 | if (chip->irq < 0) | |
1504 | goto __end_hw; | |
1505 | ||
1506 | /* reset (close) mixer */ | |
1507 | snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); /* first mute master volume */ | |
d91c64c8 | 1508 | snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000); |
1da177e4 | 1509 | |
d91c64c8 AM |
1510 | /* interrupt setup - mask everything (FIXME!) */ |
1511 | /* well, at least we know how to disable the timer IRQ */ | |
1512 | snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00); | |
1da177e4 LT |
1513 | |
1514 | synchronize_irq(chip->irq); | |
d91c64c8 | 1515 | __end_hw: |
1da177e4 LT |
1516 | snd_azf3328_free_joystick(chip); |
1517 | if (chip->irq >= 0) | |
1518 | free_irq(chip->irq, (void *)chip); | |
1519 | pci_release_regions(chip->pci); | |
1520 | pci_disable_device(chip->pci); | |
1521 | ||
1522 | kfree(chip); | |
1523 | return 0; | |
1524 | } | |
1525 | ||
d91c64c8 | 1526 | static int |
95de7766 | 1527 | snd_azf3328_dev_free(struct snd_device *device) |
1da177e4 | 1528 | { |
95de7766 | 1529 | struct snd_azf3328 *chip = device->device_data; |
1da177e4 LT |
1530 | return snd_azf3328_free(chip); |
1531 | } | |
1532 | ||
d91c64c8 AM |
1533 | /******************************************************************/ |
1534 | ||
1535 | /*** NOTE: the physical timer resolution actually is 1024000 ticks per second, | |
1536 | *** but announcing those attributes to user-space would make programs | |
1537 | *** configure the timer to a 1 tick value, resulting in an absolutely fatal | |
1538 | *** timer IRQ storm. | |
1539 | *** Thus I chose to announce a down-scaled virtual timer to the outside and | |
1540 | *** calculate real timer countdown values internally. | |
1541 | *** (the scale factor can be set via module parameter "seqtimer_scaling"). | |
1542 | ***/ | |
1543 | ||
1544 | static int | |
95de7766 | 1545 | snd_azf3328_timer_start(struct snd_timer *timer) |
d91c64c8 | 1546 | { |
95de7766 | 1547 | struct snd_azf3328 *chip; |
d91c64c8 AM |
1548 | unsigned long flags; |
1549 | unsigned int delay; | |
1550 | ||
1551 | snd_azf3328_dbgcallenter(); | |
1552 | chip = snd_timer_chip(timer); | |
1553 | delay = ((timer->sticks * seqtimer_scaling) - 1) & TIMER_VALUE_MASK; | |
1554 | if (delay < 49) | |
1555 | { | |
1556 | /* uhoh, that's not good, since user-space won't know about | |
1557 | * this timing tweak | |
1558 | * (we need to do it to avoid a lockup, though) */ | |
1559 | ||
1560 | snd_azf3328_dbgtimer("delay was too low (%d)!\n", delay); | |
1561 | delay = 49; /* minimum time is 49 ticks */ | |
1562 | } | |
1563 | snd_azf3328_dbgtimer("setting timer countdown value %d, add COUNTDOWN|IRQ\n", delay); | |
1564 | delay |= TIMER_ENABLE_COUNTDOWN | TIMER_ENABLE_IRQ; | |
1565 | spin_lock_irqsave(&chip->reg_lock, flags); | |
1566 | snd_azf3328_codec_outl(chip, IDX_IO_TIMER_VALUE, delay); | |
1567 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
1568 | snd_azf3328_dbgcallleave(); | |
1569 | return 0; | |
1570 | } | |
1571 | ||
1572 | static int | |
95de7766 | 1573 | snd_azf3328_timer_stop(struct snd_timer *timer) |
d91c64c8 | 1574 | { |
95de7766 | 1575 | struct snd_azf3328 *chip; |
d91c64c8 AM |
1576 | unsigned long flags; |
1577 | ||
1578 | snd_azf3328_dbgcallenter(); | |
1579 | chip = snd_timer_chip(timer); | |
1580 | spin_lock_irqsave(&chip->reg_lock, flags); | |
1581 | /* disable timer countdown and interrupt */ | |
1582 | /* FIXME: should we write TIMER_ACK_IRQ here? */ | |
1583 | snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0); | |
1584 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
1585 | snd_azf3328_dbgcallleave(); | |
1586 | return 0; | |
1587 | } | |
1588 | ||
1589 | ||
1590 | static int | |
95de7766 | 1591 | snd_azf3328_timer_precise_resolution(struct snd_timer *timer, |
d91c64c8 AM |
1592 | unsigned long *num, unsigned long *den) |
1593 | { | |
1594 | snd_azf3328_dbgcallenter(); | |
1595 | *num = 1; | |
1596 | *den = 1024000 / seqtimer_scaling; | |
1597 | snd_azf3328_dbgcallleave(); | |
1598 | return 0; | |
1599 | } | |
1600 | ||
95de7766 | 1601 | static struct snd_timer_hardware snd_azf3328_timer_hw = { |
d91c64c8 AM |
1602 | .flags = SNDRV_TIMER_HW_AUTO, |
1603 | .resolution = 977, /* 1000000/1024000 = 0.9765625us */ | |
1604 | .ticks = 1024000, /* max tick count, defined by the value register; actually it's not 1024000, but 1048576, but we don't care */ | |
1605 | .start = snd_azf3328_timer_start, | |
1606 | .stop = snd_azf3328_timer_stop, | |
1607 | .precise_resolution = snd_azf3328_timer_precise_resolution, | |
1608 | }; | |
1609 | ||
1610 | static int __devinit | |
95de7766 | 1611 | snd_azf3328_timer(struct snd_azf3328 *chip, int device) |
d91c64c8 | 1612 | { |
95de7766 TI |
1613 | struct snd_timer *timer = NULL; |
1614 | struct snd_timer_id tid; | |
d91c64c8 AM |
1615 | int err; |
1616 | ||
1617 | snd_azf3328_dbgcallenter(); | |
1618 | tid.dev_class = SNDRV_TIMER_CLASS_CARD; | |
1619 | tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; | |
1620 | tid.card = chip->card->number; | |
1621 | tid.device = device; | |
1622 | tid.subdevice = 0; | |
1623 | ||
1624 | snd_azf3328_timer_hw.resolution *= seqtimer_scaling; | |
1625 | snd_azf3328_timer_hw.ticks /= seqtimer_scaling; | |
1626 | if ((err = snd_timer_new(chip->card, "AZF3328", &tid, &timer)) < 0) { | |
1627 | goto out; | |
1628 | } | |
1629 | ||
1630 | strcpy(timer->name, "AZF3328 timer"); | |
1631 | timer->private_data = chip; | |
1632 | timer->hw = snd_azf3328_timer_hw; | |
1633 | ||
1634 | chip->timer = timer; | |
1635 | ||
1636 | err = 0; | |
1637 | ||
1638 | out: | |
1639 | snd_azf3328_dbgcallleave(); | |
1640 | return err; | |
1641 | } | |
1642 | ||
1643 | /******************************************************************/ | |
1644 | ||
1da177e4 LT |
1645 | #if 0 |
1646 | /* check whether a bit can be modified */ | |
d91c64c8 AM |
1647 | static void |
1648 | snd_azf3328_test_bit(unsigned int reg, int bit) | |
1da177e4 LT |
1649 | { |
1650 | unsigned char val, valoff, valon; | |
1651 | ||
1652 | val = inb(reg); | |
1653 | ||
1654 | outb(val & ~(1 << bit), reg); | |
1655 | valoff = inb(reg); | |
1656 | ||
1657 | outb(val|(1 << bit), reg); | |
1658 | valon = inb(reg); | |
1659 | ||
1660 | outb(val, reg); | |
1661 | ||
1662 | printk(KERN_ERR "reg %04x bit %d: %02x %02x %02x\n", reg, bit, val, valoff, valon); | |
1663 | } | |
1664 | #endif | |
1665 | ||
d91c64c8 | 1666 | static void |
95de7766 | 1667 | snd_azf3328_debug_show_ports(const struct snd_azf3328 *chip) |
d91c64c8 AM |
1668 | { |
1669 | #if DEBUG_MISC | |
1670 | u16 tmp; | |
1671 | ||
1672 | snd_azf3328_dbgmisc("codec_port 0x%lx, io2_port 0x%lx, mpu_port 0x%lx, synth_port 0x%lx, mixer_port 0x%lx, irq %d\n", chip->codec_port, chip->io2_port, chip->mpu_port, chip->synth_port, chip->mixer_port, chip->irq); | |
1673 | ||
1674 | snd_azf3328_dbgmisc("io2 %02x %02x %02x %02x %02x %02x\n", snd_azf3328_io2_inb(chip, 0), snd_azf3328_io2_inb(chip, 1), snd_azf3328_io2_inb(chip, 2), snd_azf3328_io2_inb(chip, 3), snd_azf3328_io2_inb(chip, 4), snd_azf3328_io2_inb(chip, 5)); | |
1675 | ||
1676 | for (tmp=0; tmp <= 0x01; tmp += 1) | |
1677 | snd_azf3328_dbgmisc("0x%02x: opl 0x%04x, mpu300 0x%04x, mpu310 0x%04x, mpu320 0x%04x, mpu330 0x%04x\n", tmp, inb(0x388 + tmp), inb(0x300 + tmp), inb(0x310 + tmp), inb(0x320 + tmp), inb(0x330 + tmp)); | |
1678 | ||
1679 | for (tmp = 0; tmp <= 0x6E; tmp += 2) | |
1680 | snd_azf3328_dbgmisc("0x%02x: 0x%04x\n", tmp, snd_azf3328_codec_inb(chip, tmp)); | |
1681 | #endif | |
1682 | } | |
1683 | ||
1684 | static int __devinit | |
95de7766 | 1685 | snd_azf3328_create(struct snd_card *card, |
1da177e4 LT |
1686 | struct pci_dev *pci, |
1687 | unsigned long device_type, | |
95de7766 | 1688 | struct snd_azf3328 ** rchip) |
1da177e4 | 1689 | { |
95de7766 | 1690 | struct snd_azf3328 *chip; |
1da177e4 | 1691 | int err; |
95de7766 | 1692 | static struct snd_device_ops ops = { |
1da177e4 LT |
1693 | .dev_free = snd_azf3328_dev_free, |
1694 | }; | |
1695 | u16 tmp; | |
1696 | ||
1697 | *rchip = NULL; | |
1698 | ||
1699 | if ((err = pci_enable_device(pci)) < 0) | |
1700 | return err; | |
1701 | ||
e560d8d8 | 1702 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 | 1703 | if (chip == NULL) { |
d91c64c8 AM |
1704 | err = -ENOMEM; |
1705 | goto out_err; | |
1da177e4 LT |
1706 | } |
1707 | spin_lock_init(&chip->reg_lock); | |
1708 | chip->card = card; | |
1709 | chip->pci = pci; | |
1710 | chip->irq = -1; | |
1711 | ||
1712 | /* check if we can restrict PCI DMA transfers to 24 bits */ | |
910638ae MG |
1713 | if (pci_set_dma_mask(pci, DMA_24BIT_MASK) < 0 || |
1714 | pci_set_consistent_dma_mask(pci, DMA_24BIT_MASK) < 0) { | |
99b359ba | 1715 | snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n"); |
d91c64c8 AM |
1716 | err = -ENXIO; |
1717 | goto out_err; | |
1da177e4 LT |
1718 | } |
1719 | ||
1720 | if ((err = pci_request_regions(pci, "Aztech AZF3328")) < 0) { | |
d91c64c8 | 1721 | goto out_err; |
1da177e4 LT |
1722 | } |
1723 | ||
1724 | chip->codec_port = pci_resource_start(pci, 0); | |
d91c64c8 AM |
1725 | chip->io2_port = pci_resource_start(pci, 1); |
1726 | chip->mpu_port = pci_resource_start(pci, 2); | |
1da177e4 LT |
1727 | chip->synth_port = pci_resource_start(pci, 3); |
1728 | chip->mixer_port = pci_resource_start(pci, 4); | |
1729 | ||
1730 | if (request_irq(pci->irq, snd_azf3328_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) { | |
99b359ba | 1731 | snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); |
d91c64c8 AM |
1732 | err = -EBUSY; |
1733 | goto out_err; | |
1da177e4 LT |
1734 | } |
1735 | chip->irq = pci->irq; | |
1736 | pci_set_master(pci); | |
1737 | synchronize_irq(chip->irq); | |
1738 | ||
d91c64c8 AM |
1739 | snd_azf3328_debug_show_ports(chip); |
1740 | ||
1da177e4 | 1741 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { |
d91c64c8 | 1742 | goto out_err; |
1da177e4 LT |
1743 | } |
1744 | ||
1745 | /* create mixer interface & switches */ | |
1746 | if ((err = snd_azf3328_mixer_new(chip)) < 0) | |
d91c64c8 | 1747 | goto out_err; |
1da177e4 LT |
1748 | |
1749 | #if 0 | |
1750 | /* set very low bitrate to reduce noise and power consumption? */ | |
1751 | snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 5512, 8, 1); | |
1752 | #endif | |
1753 | ||
1754 | /* standard chip init stuff */ | |
d91c64c8 AM |
1755 | /* default IRQ init value */ |
1756 | tmp = DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE; | |
1da177e4 | 1757 | |
d91c64c8 AM |
1758 | spin_lock_irq(&chip->reg_lock); |
1759 | snd_azf3328_codec_outb(chip, IDX_IO_PLAY_FLAGS, tmp); | |
1760 | snd_azf3328_codec_outb(chip, IDX_IO_REC_FLAGS, tmp); | |
1761 | snd_azf3328_codec_outb(chip, IDX_IO_SOMETHING_FLAGS, tmp); | |
1762 | snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00); /* disable timer */ | |
1da177e4 LT |
1763 | spin_unlock_irq(&chip->reg_lock); |
1764 | ||
1765 | snd_card_set_dev(card, &pci->dev); | |
1766 | ||
1767 | *rchip = chip; | |
d91c64c8 AM |
1768 | |
1769 | err = 0; | |
1770 | goto out; | |
1771 | ||
1772 | out_err: | |
1773 | if (chip) | |
1774 | snd_azf3328_free(chip); | |
1775 | pci_disable_device(pci); | |
1776 | ||
1777 | out: | |
1778 | return err; | |
1da177e4 LT |
1779 | } |
1780 | ||
d91c64c8 AM |
1781 | static int __devinit |
1782 | snd_azf3328_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) | |
1da177e4 LT |
1783 | { |
1784 | static int dev; | |
95de7766 TI |
1785 | struct snd_card *card; |
1786 | struct snd_azf3328 *chip; | |
1787 | struct snd_opl3 *opl3; | |
1da177e4 LT |
1788 | int err; |
1789 | ||
1790 | snd_azf3328_dbgcallenter(); | |
1791 | if (dev >= SNDRV_CARDS) | |
1792 | return -ENODEV; | |
1793 | if (!enable[dev]) { | |
1794 | dev++; | |
1795 | return -ENOENT; | |
1796 | } | |
1797 | ||
1798 | card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0 ); | |
1799 | if (card == NULL) | |
1800 | return -ENOMEM; | |
1801 | ||
1802 | strcpy(card->driver, "AZF3328"); | |
1803 | strcpy(card->shortname, "Aztech AZF3328 (PCI168)"); | |
1804 | ||
1805 | if ((err = snd_azf3328_create(card, pci, pci_id->driver_data, &chip)) < 0) { | |
d91c64c8 | 1806 | goto out_err; |
1da177e4 LT |
1807 | } |
1808 | ||
ca54bde3 AM |
1809 | card->private_data = chip; |
1810 | ||
1da177e4 LT |
1811 | if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_MPU401, |
1812 | chip->mpu_port, 1, pci->irq, 0, | |
1813 | &chip->rmidi)) < 0) { | |
99b359ba | 1814 | snd_printk(KERN_ERR "azf3328: no MPU-401 device at 0x%lx?\n", chip->mpu_port); |
d91c64c8 AM |
1815 | goto out_err; |
1816 | } | |
1817 | ||
1818 | if ((err = snd_azf3328_timer(chip, 0)) < 0) { | |
1819 | goto out_err; | |
1da177e4 LT |
1820 | } |
1821 | ||
1822 | if ((err = snd_azf3328_pcm(chip, 0)) < 0) { | |
d91c64c8 | 1823 | goto out_err; |
1da177e4 LT |
1824 | } |
1825 | ||
1826 | if (snd_opl3_create(card, chip->synth_port, chip->synth_port+2, | |
1827 | OPL3_HW_AUTO, 1, &opl3) < 0) { | |
99b359ba | 1828 | snd_printk(KERN_ERR "azf3328: no OPL3 device at 0x%lx-0x%lx?\n", |
1da177e4 LT |
1829 | chip->synth_port, chip->synth_port+2 ); |
1830 | } else { | |
1831 | if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) { | |
d91c64c8 | 1832 | goto out_err; |
1da177e4 LT |
1833 | } |
1834 | } | |
1835 | ||
ca54bde3 AM |
1836 | opl3->private_data = chip; |
1837 | ||
1da177e4 LT |
1838 | sprintf(card->longname, "%s at 0x%lx, irq %i", |
1839 | card->shortname, chip->codec_port, chip->irq); | |
1840 | ||
1841 | if ((err = snd_card_register(card)) < 0) { | |
d91c64c8 | 1842 | goto out_err; |
1da177e4 LT |
1843 | } |
1844 | ||
1845 | #ifdef MODULE | |
1846 | printk( | |
d91c64c8 AM |
1847 | "azt3328: Sound driver for Aztech AZF3328-based soundcards such as PCI168\n" |
1848 | "azt3328: (hardware was completely undocumented - ZERO support from Aztech).\n" | |
1849 | "azt3328: Feel free to contact andi AT lisas.de for bug reports etc.!\n" | |
1850 | "azt3328: User-scalable sequencer timer set to %dHz (1024000Hz / %d).\n", | |
1851 | 1024000 / seqtimer_scaling, seqtimer_scaling); | |
1da177e4 LT |
1852 | #endif |
1853 | ||
1854 | if (snd_azf3328_config_joystick(chip, dev) < 0) | |
d91c64c8 AM |
1855 | snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR, |
1856 | snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY); | |
1da177e4 LT |
1857 | |
1858 | pci_set_drvdata(pci, card); | |
1859 | dev++; | |
1860 | ||
d91c64c8 AM |
1861 | err = 0; |
1862 | goto out; | |
1863 | ||
1864 | out_err: | |
1865 | snd_card_free(card); | |
1866 | ||
1867 | out: | |
1da177e4 | 1868 | snd_azf3328_dbgcallleave(); |
d91c64c8 | 1869 | return err; |
1da177e4 LT |
1870 | } |
1871 | ||
d91c64c8 AM |
1872 | static void __devexit |
1873 | snd_azf3328_remove(struct pci_dev *pci) | |
1da177e4 LT |
1874 | { |
1875 | snd_azf3328_dbgcallenter(); | |
1876 | snd_card_free(pci_get_drvdata(pci)); | |
1877 | pci_set_drvdata(pci, NULL); | |
1878 | snd_azf3328_dbgcallleave(); | |
1879 | } | |
1880 | ||
ca54bde3 AM |
1881 | #ifdef CONFIG_PM |
1882 | static int | |
1883 | snd_azf3328_suspend(struct pci_dev *pci, pm_message_t state) | |
1884 | { | |
1885 | struct snd_card *card = pci_get_drvdata(pci); | |
1886 | struct snd_azf3328 *chip = card->private_data; | |
1887 | int reg; | |
1888 | ||
1889 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); | |
1890 | ||
1891 | snd_pcm_suspend_all(chip->pcm); | |
1892 | ||
1893 | for (reg = 0; reg < AZF_IO_SIZE_MIXER_PM / 2; reg++) | |
1894 | chip->saved_regs_mixer[reg] = inw(chip->mixer_port + reg * 2); | |
1895 | ||
1896 | /* make sure to disable master volume etc. to prevent looping sound */ | |
1897 | snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); | |
1898 | snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1); | |
1899 | ||
1900 | for (reg = 0; reg < AZF_IO_SIZE_CODEC_PM / 2; reg++) | |
1901 | chip->saved_regs_codec[reg] = inw(chip->codec_port + reg * 2); | |
1902 | for (reg = 0; reg < AZF_IO_SIZE_IO2_PM / 2; reg++) | |
1903 | chip->saved_regs_io2[reg] = inw(chip->io2_port + reg * 2); | |
1904 | for (reg = 0; reg < AZF_IO_SIZE_MPU_PM / 2; reg++) | |
1905 | chip->saved_regs_mpu[reg] = inw(chip->mpu_port + reg * 2); | |
1906 | for (reg = 0; reg < AZF_IO_SIZE_SYNTH_PM / 2; reg++) | |
1907 | chip->saved_regs_synth[reg] = inw(chip->synth_port + reg * 2); | |
1908 | ||
1909 | pci_set_power_state(pci, PCI_D3hot); | |
1910 | pci_disable_device(pci); | |
1911 | pci_save_state(pci); | |
1912 | return 0; | |
1913 | } | |
1914 | ||
1915 | static int | |
1916 | snd_azf3328_resume(struct pci_dev *pci) | |
1917 | { | |
1918 | struct snd_card *card = pci_get_drvdata(pci); | |
1919 | struct snd_azf3328 *chip = card->private_data; | |
1920 | int reg; | |
1921 | ||
1922 | pci_restore_state(pci); | |
1923 | pci_enable_device(pci); | |
1924 | pci_set_power_state(pci, PCI_D0); | |
1925 | pci_set_master(pci); | |
1926 | ||
1927 | for (reg = 0; reg < AZF_IO_SIZE_IO2_PM / 2; reg++) | |
1928 | outw(chip->saved_regs_io2[reg], chip->io2_port + reg * 2); | |
1929 | for (reg = 0; reg < AZF_IO_SIZE_MPU_PM / 2; reg++) | |
1930 | outw(chip->saved_regs_mpu[reg], chip->mpu_port + reg * 2); | |
1931 | for (reg = 0; reg < AZF_IO_SIZE_SYNTH_PM / 2; reg++) | |
1932 | outw(chip->saved_regs_synth[reg], chip->synth_port + reg * 2); | |
1933 | for (reg = 0; reg < AZF_IO_SIZE_MIXER_PM / 2; reg++) | |
1934 | outw(chip->saved_regs_mixer[reg], chip->mixer_port + reg * 2); | |
1935 | for (reg = 0; reg < AZF_IO_SIZE_CODEC_PM / 2; reg++) | |
1936 | outw(chip->saved_regs_codec[reg], chip->codec_port + reg * 2); | |
1937 | ||
1938 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); | |
1939 | return 0; | |
1940 | } | |
1941 | #endif | |
1942 | ||
1943 | ||
1944 | ||
1945 | ||
1da177e4 LT |
1946 | static struct pci_driver driver = { |
1947 | .name = "AZF3328", | |
1948 | .id_table = snd_azf3328_ids, | |
1949 | .probe = snd_azf3328_probe, | |
1950 | .remove = __devexit_p(snd_azf3328_remove), | |
ca54bde3 AM |
1951 | #ifdef CONFIG_PM |
1952 | .suspend = snd_azf3328_suspend, | |
1953 | .resume = snd_azf3328_resume, | |
1954 | #endif | |
1da177e4 LT |
1955 | }; |
1956 | ||
d91c64c8 AM |
1957 | static int __init |
1958 | alsa_card_azf3328_init(void) | |
1da177e4 LT |
1959 | { |
1960 | int err; | |
1961 | snd_azf3328_dbgcallenter(); | |
01d25d46 | 1962 | err = pci_register_driver(&driver); |
1da177e4 LT |
1963 | snd_azf3328_dbgcallleave(); |
1964 | return err; | |
1965 | } | |
1966 | ||
d91c64c8 AM |
1967 | static void __exit |
1968 | alsa_card_azf3328_exit(void) | |
1da177e4 LT |
1969 | { |
1970 | snd_azf3328_dbgcallenter(); | |
1971 | pci_unregister_driver(&driver); | |
1972 | snd_azf3328_dbgcallleave(); | |
1973 | } | |
1974 | ||
1975 | module_init(alsa_card_azf3328_init) | |
1976 | module_exit(alsa_card_azf3328_exit) |