Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * ALSA driver for ATI IXP 150/200/250 AC97 modem controllers | |
3 | * | |
4 | * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | * | |
20 | */ | |
21 | ||
22 | #include <sound/driver.h> | |
23 | #include <asm/io.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/pci.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/moduleparam.h> | |
62932df8 | 30 | #include <linux/mutex.h> |
1da177e4 LT |
31 | #include <sound/core.h> |
32 | #include <sound/pcm.h> | |
33 | #include <sound/pcm_params.h> | |
34 | #include <sound/info.h> | |
35 | #include <sound/ac97_codec.h> | |
36 | #include <sound/initval.h> | |
37 | ||
38 | MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>"); | |
39 | MODULE_DESCRIPTION("ATI IXP MC97 controller"); | |
40 | MODULE_LICENSE("GPL"); | |
41 | MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250}}"); | |
42 | ||
b7fe4622 CL |
43 | static int index = -2; /* Exclude the first card */ |
44 | static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ | |
45 | static int ac97_clock = 48000; | |
1da177e4 | 46 | |
b7fe4622 | 47 | module_param(index, int, 0444); |
1da177e4 | 48 | MODULE_PARM_DESC(index, "Index value for ATI IXP controller."); |
b7fe4622 | 49 | module_param(id, charp, 0444); |
1da177e4 | 50 | MODULE_PARM_DESC(id, "ID string for ATI IXP controller."); |
b7fe4622 | 51 | module_param(ac97_clock, int, 0444); |
1da177e4 LT |
52 | MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz)."); |
53 | ||
2b3e584b TI |
54 | /* just for backward compatibility */ |
55 | static int enable; | |
698444f3 | 56 | module_param(enable, bool, 0444); |
2b3e584b | 57 | |
1da177e4 LT |
58 | |
59 | /* | |
60 | */ | |
61 | ||
62 | #define ATI_REG_ISR 0x00 /* interrupt source */ | |
63 | #define ATI_REG_ISR_MODEM_IN_XRUN (1U<<0) | |
64 | #define ATI_REG_ISR_MODEM_IN_STATUS (1U<<1) | |
65 | #define ATI_REG_ISR_MODEM_OUT1_XRUN (1U<<2) | |
66 | #define ATI_REG_ISR_MODEM_OUT1_STATUS (1U<<3) | |
67 | #define ATI_REG_ISR_MODEM_OUT2_XRUN (1U<<4) | |
68 | #define ATI_REG_ISR_MODEM_OUT2_STATUS (1U<<5) | |
69 | #define ATI_REG_ISR_MODEM_OUT3_XRUN (1U<<6) | |
70 | #define ATI_REG_ISR_MODEM_OUT3_STATUS (1U<<7) | |
71 | #define ATI_REG_ISR_PHYS_INTR (1U<<8) | |
72 | #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9) | |
73 | #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10) | |
74 | #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11) | |
75 | #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12) | |
76 | #define ATI_REG_ISR_NEW_FRAME (1U<<13) | |
77 | #define ATI_REG_ISR_MODEM_GPIO_DATA (1U<<14) | |
78 | ||
79 | #define ATI_REG_IER 0x04 /* interrupt enable */ | |
80 | #define ATI_REG_IER_MODEM_IN_XRUN_EN (1U<<0) | |
81 | #define ATI_REG_IER_MODEM_STATUS_EN (1U<<1) | |
82 | #define ATI_REG_IER_MODEM_OUT1_XRUN_EN (1U<<2) | |
83 | #define ATI_REG_IER_MODEM_OUT2_XRUN_EN (1U<<4) | |
84 | #define ATI_REG_IER_MODEM_OUT3_XRUN_EN (1U<<6) | |
85 | #define ATI_REG_IER_PHYS_INTR_EN (1U<<8) | |
86 | #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9) | |
87 | #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10) | |
88 | #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11) | |
89 | #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12) | |
90 | #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */ | |
91 | #define ATI_REG_IER_MODEM_GPIO_DATA_EN (1U<<14) /* (WO) modem is running */ | |
92 | #define ATI_REG_IER_MODEM_SET_BUS_BUSY (1U<<15) | |
93 | ||
94 | #define ATI_REG_CMD 0x08 /* command */ | |
95 | #define ATI_REG_CMD_POWERDOWN (1U<<0) | |
96 | #define ATI_REG_CMD_MODEM_RECEIVE_EN (1U<<1) /* modem only */ | |
97 | #define ATI_REG_CMD_MODEM_SEND1_EN (1U<<2) /* modem only */ | |
98 | #define ATI_REG_CMD_MODEM_SEND2_EN (1U<<3) /* modem only */ | |
99 | #define ATI_REG_CMD_MODEM_SEND3_EN (1U<<4) /* modem only */ | |
100 | #define ATI_REG_CMD_MODEM_STATUS_MEM (1U<<5) /* modem only */ | |
101 | #define ATI_REG_CMD_MODEM_IN_DMA_EN (1U<<8) /* modem only */ | |
102 | #define ATI_REG_CMD_MODEM_OUT_DMA1_EN (1U<<9) /* modem only */ | |
103 | #define ATI_REG_CMD_MODEM_OUT_DMA2_EN (1U<<10) /* modem only */ | |
104 | #define ATI_REG_CMD_MODEM_OUT_DMA3_EN (1U<<11) /* modem only */ | |
105 | #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20) | |
106 | #define ATI_REG_CMD_MODEM_GPIO_THRU_DMA (1U<<22) /* modem only */ | |
107 | #define ATI_REG_CMD_LOOPBACK_EN (1U<<23) | |
108 | #define ATI_REG_CMD_PACKED_DIS (1U<<24) | |
109 | #define ATI_REG_CMD_BURST_EN (1U<<25) | |
110 | #define ATI_REG_CMD_PANIC_EN (1U<<26) | |
111 | #define ATI_REG_CMD_MODEM_PRESENT (1U<<27) | |
112 | #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28) | |
113 | #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29) | |
114 | #define ATI_REG_CMD_AC_SYNC (1U<<30) | |
115 | #define ATI_REG_CMD_AC_RESET (1U<<31) | |
116 | ||
117 | #define ATI_REG_PHYS_OUT_ADDR 0x0c | |
118 | #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0) | |
119 | #define ATI_REG_PHYS_OUT_RW (1U<<2) | |
120 | #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8) | |
121 | #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9 | |
122 | #define ATI_REG_PHYS_OUT_DATA_SHIFT 16 | |
123 | ||
124 | #define ATI_REG_PHYS_IN_ADDR 0x10 | |
125 | #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8) | |
126 | #define ATI_REG_PHYS_IN_ADDR_SHIFT 9 | |
127 | #define ATI_REG_PHYS_IN_DATA_SHIFT 16 | |
128 | ||
129 | #define ATI_REG_SLOTREQ 0x14 | |
130 | ||
131 | #define ATI_REG_COUNTER 0x18 | |
132 | #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */ | |
133 | #define ATI_REG_COUNTER_BITCLOCK (31U<<8) | |
134 | ||
135 | #define ATI_REG_IN_FIFO_THRESHOLD 0x1c | |
136 | ||
137 | #define ATI_REG_MODEM_IN_DMA_LINKPTR 0x20 | |
138 | #define ATI_REG_MODEM_IN_DMA_DT_START 0x24 /* RO */ | |
139 | #define ATI_REG_MODEM_IN_DMA_DT_NEXT 0x28 /* RO */ | |
140 | #define ATI_REG_MODEM_IN_DMA_DT_CUR 0x2c /* RO */ | |
141 | #define ATI_REG_MODEM_IN_DMA_DT_SIZE 0x30 | |
142 | #define ATI_REG_MODEM_OUT_FIFO 0x34 /* output threshold */ | |
143 | #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK (0xf<<16) | |
144 | #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT 16 | |
145 | #define ATI_REG_MODEM_OUT_DMA1_LINKPTR 0x38 | |
146 | #define ATI_REG_MODEM_OUT_DMA2_LINKPTR 0x3c | |
147 | #define ATI_REG_MODEM_OUT_DMA3_LINKPTR 0x40 | |
148 | #define ATI_REG_MODEM_OUT_DMA1_DT_START 0x44 | |
149 | #define ATI_REG_MODEM_OUT_DMA1_DT_NEXT 0x48 | |
150 | #define ATI_REG_MODEM_OUT_DMA1_DT_CUR 0x4c | |
151 | #define ATI_REG_MODEM_OUT_DMA2_DT_START 0x50 | |
152 | #define ATI_REG_MODEM_OUT_DMA2_DT_NEXT 0x54 | |
153 | #define ATI_REG_MODEM_OUT_DMA2_DT_CUR 0x58 | |
154 | #define ATI_REG_MODEM_OUT_DMA3_DT_START 0x5c | |
155 | #define ATI_REG_MODEM_OUT_DMA3_DT_NEXT 0x60 | |
156 | #define ATI_REG_MODEM_OUT_DMA3_DT_CUR 0x64 | |
157 | #define ATI_REG_MODEM_OUT_DMA12_DT_SIZE 0x68 | |
158 | #define ATI_REG_MODEM_OUT_DMA3_DT_SIZE 0x6c | |
159 | #define ATI_REG_MODEM_OUT_FIFO_USED 0x70 | |
160 | #define ATI_REG_MODEM_OUT_GPIO 0x74 | |
161 | #define ATI_REG_MODEM_OUT_GPIO_EN 1 | |
162 | #define ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT 5 | |
163 | #define ATI_REG_MODEM_IN_GPIO 0x78 | |
164 | ||
165 | #define ATI_REG_MODEM_MIRROR 0x7c | |
166 | #define ATI_REG_AUDIO_MIRROR 0x80 | |
167 | ||
168 | #define ATI_REG_MODEM_FIFO_FLUSH 0x88 | |
169 | #define ATI_REG_MODEM_FIFO_OUT1_FLUSH (1U<<0) | |
170 | #define ATI_REG_MODEM_FIFO_OUT2_FLUSH (1U<<1) | |
171 | #define ATI_REG_MODEM_FIFO_OUT3_FLUSH (1U<<2) | |
172 | #define ATI_REG_MODEM_FIFO_IN_FLUSH (1U<<3) | |
173 | ||
174 | /* LINKPTR */ | |
175 | #define ATI_REG_LINKPTR_EN (1U<<0) | |
176 | ||
177 | #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */ | |
178 | ||
179 | ||
74ee4ff1 | 180 | struct atiixp_modem; |
1da177e4 LT |
181 | |
182 | /* | |
183 | * DMA packate descriptor | |
184 | */ | |
185 | ||
74ee4ff1 | 186 | struct atiixp_dma_desc { |
1da177e4 LT |
187 | u32 addr; /* DMA buffer address */ |
188 | u16 status; /* status bits */ | |
189 | u16 size; /* size of the packet in dwords */ | |
190 | u32 next; /* address of the next packet descriptor */ | |
74ee4ff1 | 191 | }; |
1da177e4 LT |
192 | |
193 | /* | |
194 | * stream enum | |
195 | */ | |
196 | enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, NUM_ATI_DMAS }; /* DMAs */ | |
197 | enum { ATI_PCM_OUT, ATI_PCM_IN, NUM_ATI_PCMS }; /* AC97 pcm slots */ | |
198 | enum { ATI_PCMDEV_ANALOG, NUM_ATI_PCMDEVS }; /* pcm devices */ | |
199 | ||
200 | #define NUM_ATI_CODECS 3 | |
201 | ||
202 | ||
203 | /* | |
204 | * constants and callbacks for each DMA type | |
205 | */ | |
74ee4ff1 | 206 | struct atiixp_dma_ops { |
1da177e4 LT |
207 | int type; /* ATI_DMA_XXX */ |
208 | unsigned int llp_offset; /* LINKPTR offset */ | |
209 | unsigned int dt_cur; /* DT_CUR offset */ | |
74ee4ff1 TI |
210 | /* called from open callback */ |
211 | void (*enable_dma)(struct atiixp_modem *chip, int on); | |
212 | /* called from trigger (START/STOP) */ | |
213 | void (*enable_transfer)(struct atiixp_modem *chip, int on); | |
214 | /* called from trigger (STOP only) */ | |
215 | void (*flush_dma)(struct atiixp_modem *chip); | |
1da177e4 LT |
216 | }; |
217 | ||
218 | /* | |
219 | * DMA stream | |
220 | */ | |
74ee4ff1 TI |
221 | struct atiixp_dma { |
222 | const struct atiixp_dma_ops *ops; | |
1da177e4 | 223 | struct snd_dma_buffer desc_buf; |
74ee4ff1 | 224 | struct snd_pcm_substream *substream; /* assigned PCM substream */ |
1da177e4 LT |
225 | unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */ |
226 | unsigned int period_bytes, periods; | |
227 | int opened; | |
228 | int running; | |
229 | int pcm_open_flag; | |
230 | int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */ | |
231 | }; | |
232 | ||
233 | /* | |
234 | * ATI IXP chip | |
235 | */ | |
74ee4ff1 TI |
236 | struct atiixp_modem { |
237 | struct snd_card *card; | |
1da177e4 LT |
238 | struct pci_dev *pci; |
239 | ||
240 | struct resource *res; /* memory i/o */ | |
241 | unsigned long addr; | |
242 | void __iomem *remap_addr; | |
243 | int irq; | |
244 | ||
74ee4ff1 TI |
245 | struct snd_ac97_bus *ac97_bus; |
246 | struct snd_ac97 *ac97[NUM_ATI_CODECS]; | |
1da177e4 LT |
247 | |
248 | spinlock_t reg_lock; | |
249 | ||
74ee4ff1 | 250 | struct atiixp_dma dmas[NUM_ATI_DMAS]; |
1da177e4 | 251 | struct ac97_pcm *pcms[NUM_ATI_PCMS]; |
74ee4ff1 | 252 | struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS]; |
1da177e4 LT |
253 | |
254 | int max_channels; /* max. channels for PCM out */ | |
255 | ||
256 | unsigned int codec_not_ready_bits; /* for codec detection */ | |
257 | ||
258 | int spdif_over_aclink; /* passed from the module option */ | |
62932df8 | 259 | struct mutex open_mutex; /* playback open mutex */ |
1da177e4 LT |
260 | }; |
261 | ||
262 | ||
263 | /* | |
264 | */ | |
265 | static struct pci_device_id snd_atiixp_ids[] = { | |
266 | { 0x1002, 0x434d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */ | |
548e7823 | 267 | { 0x1002, 0x4378, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB400 */ |
1da177e4 LT |
268 | { 0, } |
269 | }; | |
270 | ||
271 | MODULE_DEVICE_TABLE(pci, snd_atiixp_ids); | |
272 | ||
273 | ||
274 | /* | |
275 | * lowlevel functions | |
276 | */ | |
277 | ||
278 | /* | |
279 | * update the bits of the given register. | |
280 | * return 1 if the bits changed. | |
281 | */ | |
74ee4ff1 TI |
282 | static int snd_atiixp_update_bits(struct atiixp_modem *chip, unsigned int reg, |
283 | unsigned int mask, unsigned int value) | |
1da177e4 LT |
284 | { |
285 | void __iomem *addr = chip->remap_addr + reg; | |
286 | unsigned int data, old_data; | |
287 | old_data = data = readl(addr); | |
288 | data &= ~mask; | |
289 | data |= value; | |
290 | if (old_data == data) | |
291 | return 0; | |
292 | writel(data, addr); | |
293 | return 1; | |
294 | } | |
295 | ||
296 | /* | |
297 | * macros for easy use | |
298 | */ | |
299 | #define atiixp_write(chip,reg,value) \ | |
300 | writel(value, chip->remap_addr + ATI_REG_##reg) | |
301 | #define atiixp_read(chip,reg) \ | |
302 | readl(chip->remap_addr + ATI_REG_##reg) | |
303 | #define atiixp_update(chip,reg,mask,val) \ | |
304 | snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val) | |
305 | ||
1da177e4 LT |
306 | /* |
307 | * handling DMA packets | |
308 | * | |
309 | * we allocate a linear buffer for the DMA, and split it to each packet. | |
310 | * in a future version, a scatter-gather buffer should be implemented. | |
311 | */ | |
312 | ||
313 | #define ATI_DESC_LIST_SIZE \ | |
74ee4ff1 | 314 | PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc)) |
1da177e4 LT |
315 | |
316 | /* | |
317 | * build packets ring for the given buffer size. | |
318 | * | |
319 | * IXP handles the buffer descriptors, which are connected as a linked | |
320 | * list. although we can change the list dynamically, in this version, | |
321 | * a static RING of buffer descriptors is used. | |
322 | * | |
323 | * the ring is built in this function, and is set up to the hardware. | |
324 | */ | |
74ee4ff1 TI |
325 | static int atiixp_build_dma_packets(struct atiixp_modem *chip, |
326 | struct atiixp_dma *dma, | |
327 | struct snd_pcm_substream *substream, | |
328 | unsigned int periods, | |
329 | unsigned int period_bytes) | |
1da177e4 LT |
330 | { |
331 | unsigned int i; | |
332 | u32 addr, desc_addr; | |
333 | unsigned long flags; | |
334 | ||
335 | if (periods > ATI_MAX_DESCRIPTORS) | |
336 | return -ENOMEM; | |
337 | ||
338 | if (dma->desc_buf.area == NULL) { | |
339 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), | |
340 | ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0) | |
341 | return -ENOMEM; | |
342 | dma->period_bytes = dma->periods = 0; /* clear */ | |
343 | } | |
344 | ||
345 | if (dma->periods == periods && dma->period_bytes == period_bytes) | |
346 | return 0; | |
347 | ||
348 | /* reset DMA before changing the descriptor table */ | |
349 | spin_lock_irqsave(&chip->reg_lock, flags); | |
350 | writel(0, chip->remap_addr + dma->ops->llp_offset); | |
351 | dma->ops->enable_dma(chip, 0); | |
352 | dma->ops->enable_dma(chip, 1); | |
353 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
354 | ||
355 | /* fill the entries */ | |
356 | addr = (u32)substream->runtime->dma_addr; | |
357 | desc_addr = (u32)dma->desc_buf.addr; | |
358 | for (i = 0; i < periods; i++) { | |
74ee4ff1 TI |
359 | struct atiixp_dma_desc *desc; |
360 | desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i]; | |
1da177e4 LT |
361 | desc->addr = cpu_to_le32(addr); |
362 | desc->status = 0; | |
363 | desc->size = period_bytes >> 2; /* in dwords */ | |
74ee4ff1 | 364 | desc_addr += sizeof(struct atiixp_dma_desc); |
1da177e4 LT |
365 | if (i == periods - 1) |
366 | desc->next = cpu_to_le32((u32)dma->desc_buf.addr); | |
367 | else | |
368 | desc->next = cpu_to_le32(desc_addr); | |
369 | addr += period_bytes; | |
370 | } | |
371 | ||
372 | writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN, | |
373 | chip->remap_addr + dma->ops->llp_offset); | |
374 | ||
375 | dma->period_bytes = period_bytes; | |
376 | dma->periods = periods; | |
377 | ||
378 | return 0; | |
379 | } | |
380 | ||
381 | /* | |
382 | * remove the ring buffer and release it if assigned | |
383 | */ | |
74ee4ff1 TI |
384 | static void atiixp_clear_dma_packets(struct atiixp_modem *chip, |
385 | struct atiixp_dma *dma, | |
386 | struct snd_pcm_substream *substream) | |
1da177e4 LT |
387 | { |
388 | if (dma->desc_buf.area) { | |
389 | writel(0, chip->remap_addr + dma->ops->llp_offset); | |
390 | snd_dma_free_pages(&dma->desc_buf); | |
391 | dma->desc_buf.area = NULL; | |
392 | } | |
393 | } | |
394 | ||
395 | /* | |
396 | * AC97 interface | |
397 | */ | |
74ee4ff1 | 398 | static int snd_atiixp_acquire_codec(struct atiixp_modem *chip) |
1da177e4 LT |
399 | { |
400 | int timeout = 1000; | |
401 | ||
402 | while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) { | |
403 | if (! timeout--) { | |
98b4f592 | 404 | snd_printk(KERN_WARNING "atiixp-modem: codec acquire timeout\n"); |
1da177e4 LT |
405 | return -EBUSY; |
406 | } | |
407 | udelay(1); | |
408 | } | |
409 | return 0; | |
410 | } | |
411 | ||
74ee4ff1 TI |
412 | static unsigned short snd_atiixp_codec_read(struct atiixp_modem *chip, |
413 | unsigned short codec, | |
414 | unsigned short reg) | |
1da177e4 LT |
415 | { |
416 | unsigned int data; | |
417 | int timeout; | |
418 | ||
419 | if (snd_atiixp_acquire_codec(chip) < 0) | |
420 | return 0xffff; | |
421 | data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | | |
422 | ATI_REG_PHYS_OUT_ADDR_EN | | |
423 | ATI_REG_PHYS_OUT_RW | | |
424 | codec; | |
425 | atiixp_write(chip, PHYS_OUT_ADDR, data); | |
426 | if (snd_atiixp_acquire_codec(chip) < 0) | |
427 | return 0xffff; | |
428 | timeout = 1000; | |
429 | do { | |
430 | data = atiixp_read(chip, PHYS_IN_ADDR); | |
431 | if (data & ATI_REG_PHYS_IN_READ_FLAG) | |
432 | return data >> ATI_REG_PHYS_IN_DATA_SHIFT; | |
433 | udelay(1); | |
434 | } while (--timeout); | |
435 | /* time out may happen during reset */ | |
436 | if (reg < 0x7c) | |
98b4f592 | 437 | snd_printk(KERN_WARNING "atiixp-modem: codec read timeout (reg %x)\n", reg); |
1da177e4 LT |
438 | return 0xffff; |
439 | } | |
440 | ||
441 | ||
74ee4ff1 TI |
442 | static void snd_atiixp_codec_write(struct atiixp_modem *chip, |
443 | unsigned short codec, | |
444 | unsigned short reg, unsigned short val) | |
1da177e4 LT |
445 | { |
446 | unsigned int data; | |
447 | ||
448 | if (snd_atiixp_acquire_codec(chip) < 0) | |
449 | return; | |
450 | data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) | | |
451 | ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | | |
452 | ATI_REG_PHYS_OUT_ADDR_EN | codec; | |
453 | atiixp_write(chip, PHYS_OUT_ADDR, data); | |
454 | } | |
455 | ||
456 | ||
74ee4ff1 TI |
457 | static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97, |
458 | unsigned short reg) | |
1da177e4 | 459 | { |
74ee4ff1 | 460 | struct atiixp_modem *chip = ac97->private_data; |
1da177e4 LT |
461 | return snd_atiixp_codec_read(chip, ac97->num, reg); |
462 | ||
463 | } | |
464 | ||
74ee4ff1 TI |
465 | static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg, |
466 | unsigned short val) | |
1da177e4 | 467 | { |
74ee4ff1 | 468 | struct atiixp_modem *chip = ac97->private_data; |
83a5b72a SK |
469 | if (reg == AC97_GPIO_STATUS) { |
470 | atiixp_write(chip, MODEM_OUT_GPIO, | |
471 | (val << ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT) | ATI_REG_MODEM_OUT_GPIO_EN); | |
472 | return; | |
473 | } | |
1da177e4 LT |
474 | snd_atiixp_codec_write(chip, ac97->num, reg, val); |
475 | } | |
476 | ||
477 | /* | |
478 | * reset AC link | |
479 | */ | |
74ee4ff1 | 480 | static int snd_atiixp_aclink_reset(struct atiixp_modem *chip) |
1da177e4 LT |
481 | { |
482 | int timeout; | |
483 | ||
484 | /* reset powerdoewn */ | |
485 | if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0)) | |
486 | udelay(10); | |
487 | ||
488 | /* perform a software reset */ | |
489 | atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET); | |
490 | atiixp_read(chip, CMD); | |
491 | udelay(10); | |
492 | atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0); | |
493 | ||
494 | timeout = 10; | |
495 | while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) { | |
496 | /* do a hard reset */ | |
497 | atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, | |
498 | ATI_REG_CMD_AC_SYNC); | |
499 | atiixp_read(chip, CMD); | |
bfdcbace | 500 | msleep(1); |
1da177e4 LT |
501 | atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET); |
502 | if (--timeout) { | |
98b4f592 | 503 | snd_printk(KERN_ERR "atiixp-modem: codec reset timeout\n"); |
1da177e4 LT |
504 | break; |
505 | } | |
506 | } | |
507 | ||
508 | /* deassert RESET and assert SYNC to make sure */ | |
509 | atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, | |
510 | ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET); | |
511 | ||
512 | return 0; | |
513 | } | |
514 | ||
515 | #ifdef CONFIG_PM | |
74ee4ff1 | 516 | static int snd_atiixp_aclink_down(struct atiixp_modem *chip) |
1da177e4 LT |
517 | { |
518 | // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */ | |
519 | // return -EBUSY; | |
520 | atiixp_update(chip, CMD, | |
521 | ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET, | |
522 | ATI_REG_CMD_POWERDOWN); | |
523 | return 0; | |
524 | } | |
525 | #endif | |
526 | ||
527 | /* | |
528 | * auto-detection of codecs | |
529 | * | |
530 | * the IXP chip can generate interrupts for the non-existing codecs. | |
531 | * NEW_FRAME interrupt is used to make sure that the interrupt is generated | |
532 | * even if all three codecs are connected. | |
533 | */ | |
534 | ||
535 | #define ALL_CODEC_NOT_READY \ | |
536 | (ATI_REG_ISR_CODEC0_NOT_READY |\ | |
537 | ATI_REG_ISR_CODEC1_NOT_READY |\ | |
538 | ATI_REG_ISR_CODEC2_NOT_READY) | |
539 | #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME) | |
540 | ||
74ee4ff1 | 541 | static int snd_atiixp_codec_detect(struct atiixp_modem *chip) |
1da177e4 LT |
542 | { |
543 | int timeout; | |
544 | ||
545 | chip->codec_not_ready_bits = 0; | |
546 | atiixp_write(chip, IER, CODEC_CHECK_BITS); | |
547 | /* wait for the interrupts */ | |
bfdcbace | 548 | timeout = 50; |
1da177e4 | 549 | while (timeout-- > 0) { |
bfdcbace | 550 | msleep(1); |
1da177e4 LT |
551 | if (chip->codec_not_ready_bits) |
552 | break; | |
553 | } | |
554 | atiixp_write(chip, IER, 0); /* disable irqs */ | |
555 | ||
556 | if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) { | |
98b4f592 | 557 | snd_printk(KERN_ERR "atiixp-modem: no codec detected!\n"); |
1da177e4 LT |
558 | return -ENXIO; |
559 | } | |
560 | return 0; | |
561 | } | |
562 | ||
563 | ||
564 | /* | |
565 | * enable DMA and irqs | |
566 | */ | |
74ee4ff1 | 567 | static int snd_atiixp_chip_start(struct atiixp_modem *chip) |
1da177e4 LT |
568 | { |
569 | unsigned int reg; | |
570 | ||
571 | /* set up spdif, enable burst mode */ | |
572 | reg = atiixp_read(chip, CMD); | |
573 | reg |= ATI_REG_CMD_BURST_EN; | |
574 | if(!(reg & ATI_REG_CMD_MODEM_PRESENT)) | |
575 | reg |= ATI_REG_CMD_MODEM_PRESENT; | |
576 | atiixp_write(chip, CMD, reg); | |
577 | ||
578 | /* clear all interrupt source */ | |
579 | atiixp_write(chip, ISR, 0xffffffff); | |
580 | /* enable irqs */ | |
581 | atiixp_write(chip, IER, | |
582 | ATI_REG_IER_MODEM_STATUS_EN | | |
583 | ATI_REG_IER_MODEM_IN_XRUN_EN | | |
584 | ATI_REG_IER_MODEM_OUT1_XRUN_EN); | |
585 | return 0; | |
586 | } | |
587 | ||
588 | ||
589 | /* | |
590 | * disable DMA and IRQs | |
591 | */ | |
74ee4ff1 | 592 | static int snd_atiixp_chip_stop(struct atiixp_modem *chip) |
1da177e4 LT |
593 | { |
594 | /* clear interrupt source */ | |
595 | atiixp_write(chip, ISR, atiixp_read(chip, ISR)); | |
596 | /* disable irqs */ | |
597 | atiixp_write(chip, IER, 0); | |
598 | return 0; | |
599 | } | |
600 | ||
601 | ||
602 | /* | |
603 | * PCM section | |
604 | */ | |
605 | ||
606 | /* | |
607 | * pointer callback simplly reads XXX_DMA_DT_CUR register as the current | |
608 | * position. when SG-buffer is implemented, the offset must be calculated | |
609 | * correctly... | |
610 | */ | |
74ee4ff1 | 611 | static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 612 | { |
74ee4ff1 TI |
613 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
614 | struct snd_pcm_runtime *runtime = substream->runtime; | |
615 | struct atiixp_dma *dma = runtime->private_data; | |
1da177e4 LT |
616 | unsigned int curptr; |
617 | int timeout = 1000; | |
618 | ||
619 | while (timeout--) { | |
620 | curptr = readl(chip->remap_addr + dma->ops->dt_cur); | |
621 | if (curptr < dma->buf_addr) | |
622 | continue; | |
623 | curptr -= dma->buf_addr; | |
624 | if (curptr >= dma->buf_bytes) | |
625 | continue; | |
626 | return bytes_to_frames(runtime, curptr); | |
627 | } | |
628 | snd_printd("atiixp-modem: invalid DMA pointer read 0x%x (buf=%x)\n", | |
629 | readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr); | |
630 | return 0; | |
631 | } | |
632 | ||
633 | /* | |
634 | * XRUN detected, and stop the PCM substream | |
635 | */ | |
74ee4ff1 TI |
636 | static void snd_atiixp_xrun_dma(struct atiixp_modem *chip, |
637 | struct atiixp_dma *dma) | |
1da177e4 LT |
638 | { |
639 | if (! dma->substream || ! dma->running) | |
640 | return; | |
98b4f592 | 641 | snd_printdd("atiixp-modem: XRUN detected (DMA %d)\n", dma->ops->type); |
1da177e4 LT |
642 | snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN); |
643 | } | |
644 | ||
645 | /* | |
646 | * the period ack. update the substream. | |
647 | */ | |
74ee4ff1 TI |
648 | static void snd_atiixp_update_dma(struct atiixp_modem *chip, |
649 | struct atiixp_dma *dma) | |
1da177e4 LT |
650 | { |
651 | if (! dma->substream || ! dma->running) | |
652 | return; | |
653 | snd_pcm_period_elapsed(dma->substream); | |
654 | } | |
655 | ||
656 | /* set BUS_BUSY interrupt bit if any DMA is running */ | |
657 | /* call with spinlock held */ | |
74ee4ff1 | 658 | static void snd_atiixp_check_bus_busy(struct atiixp_modem *chip) |
1da177e4 LT |
659 | { |
660 | unsigned int bus_busy; | |
661 | if (atiixp_read(chip, CMD) & (ATI_REG_CMD_MODEM_SEND1_EN | | |
662 | ATI_REG_CMD_MODEM_RECEIVE_EN)) | |
663 | bus_busy = ATI_REG_IER_MODEM_SET_BUS_BUSY; | |
664 | else | |
665 | bus_busy = 0; | |
666 | atiixp_update(chip, IER, ATI_REG_IER_MODEM_SET_BUS_BUSY, bus_busy); | |
667 | } | |
668 | ||
669 | /* common trigger callback | |
670 | * calling the lowlevel callbacks in it | |
671 | */ | |
74ee4ff1 | 672 | static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 673 | { |
74ee4ff1 TI |
674 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
675 | struct atiixp_dma *dma = substream->runtime->private_data; | |
83a5b72a | 676 | int err = 0; |
1da177e4 LT |
677 | |
678 | snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL); | |
679 | ||
1da177e4 | 680 | spin_lock(&chip->reg_lock); |
83a5b72a SK |
681 | switch(cmd) { |
682 | case SNDRV_PCM_TRIGGER_START: | |
1da177e4 LT |
683 | dma->ops->enable_transfer(chip, 1); |
684 | dma->running = 1; | |
83a5b72a SK |
685 | break; |
686 | case SNDRV_PCM_TRIGGER_STOP: | |
1da177e4 LT |
687 | dma->ops->enable_transfer(chip, 0); |
688 | dma->running = 0; | |
83a5b72a SK |
689 | break; |
690 | default: | |
691 | err = -EINVAL; | |
692 | break; | |
1da177e4 | 693 | } |
83a5b72a | 694 | if (! err) { |
1da177e4 LT |
695 | snd_atiixp_check_bus_busy(chip); |
696 | if (cmd == SNDRV_PCM_TRIGGER_STOP) { | |
697 | dma->ops->flush_dma(chip); | |
698 | snd_atiixp_check_bus_busy(chip); | |
699 | } | |
83a5b72a | 700 | } |
1da177e4 | 701 | spin_unlock(&chip->reg_lock); |
83a5b72a | 702 | return err; |
1da177e4 LT |
703 | } |
704 | ||
705 | ||
706 | /* | |
707 | * lowlevel callbacks for each DMA type | |
708 | * | |
709 | * every callback is supposed to be called in chip->reg_lock spinlock | |
710 | */ | |
711 | ||
712 | /* flush FIFO of analog OUT DMA */ | |
74ee4ff1 | 713 | static void atiixp_out_flush_dma(struct atiixp_modem *chip) |
1da177e4 LT |
714 | { |
715 | atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_OUT1_FLUSH); | |
716 | } | |
717 | ||
718 | /* enable/disable analog OUT DMA */ | |
74ee4ff1 | 719 | static void atiixp_out_enable_dma(struct atiixp_modem *chip, int on) |
1da177e4 LT |
720 | { |
721 | unsigned int data; | |
722 | data = atiixp_read(chip, CMD); | |
723 | if (on) { | |
724 | if (data & ATI_REG_CMD_MODEM_OUT_DMA1_EN) | |
725 | return; | |
726 | atiixp_out_flush_dma(chip); | |
727 | data |= ATI_REG_CMD_MODEM_OUT_DMA1_EN; | |
728 | } else | |
729 | data &= ~ATI_REG_CMD_MODEM_OUT_DMA1_EN; | |
730 | atiixp_write(chip, CMD, data); | |
731 | } | |
732 | ||
733 | /* start/stop transfer over OUT DMA */ | |
74ee4ff1 | 734 | static void atiixp_out_enable_transfer(struct atiixp_modem *chip, int on) |
1da177e4 LT |
735 | { |
736 | atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_SEND1_EN, | |
737 | on ? ATI_REG_CMD_MODEM_SEND1_EN : 0); | |
738 | } | |
739 | ||
740 | /* enable/disable analog IN DMA */ | |
74ee4ff1 | 741 | static void atiixp_in_enable_dma(struct atiixp_modem *chip, int on) |
1da177e4 LT |
742 | { |
743 | atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_IN_DMA_EN, | |
744 | on ? ATI_REG_CMD_MODEM_IN_DMA_EN : 0); | |
745 | } | |
746 | ||
747 | /* start/stop analog IN DMA */ | |
74ee4ff1 | 748 | static void atiixp_in_enable_transfer(struct atiixp_modem *chip, int on) |
1da177e4 LT |
749 | { |
750 | if (on) { | |
751 | unsigned int data = atiixp_read(chip, CMD); | |
752 | if (! (data & ATI_REG_CMD_MODEM_RECEIVE_EN)) { | |
753 | data |= ATI_REG_CMD_MODEM_RECEIVE_EN; | |
754 | atiixp_write(chip, CMD, data); | |
755 | } | |
756 | } else | |
757 | atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_RECEIVE_EN, 0); | |
758 | } | |
759 | ||
760 | /* flush FIFO of analog IN DMA */ | |
74ee4ff1 | 761 | static void atiixp_in_flush_dma(struct atiixp_modem *chip) |
1da177e4 LT |
762 | { |
763 | atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_IN_FLUSH); | |
764 | } | |
765 | ||
766 | /* set up slots and formats for analog OUT */ | |
74ee4ff1 | 767 | static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 768 | { |
74ee4ff1 | 769 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
770 | unsigned int data; |
771 | ||
772 | spin_lock_irq(&chip->reg_lock); | |
773 | /* set output threshold */ | |
774 | data = atiixp_read(chip, MODEM_OUT_FIFO); | |
775 | data &= ~ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK; | |
776 | data |= 0x04 << ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT; | |
777 | atiixp_write(chip, MODEM_OUT_FIFO, data); | |
778 | spin_unlock_irq(&chip->reg_lock); | |
779 | return 0; | |
780 | } | |
781 | ||
782 | /* set up slots and formats for analog IN */ | |
74ee4ff1 | 783 | static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 LT |
784 | { |
785 | return 0; | |
786 | } | |
787 | ||
788 | /* | |
789 | * hw_params - allocate the buffer and set up buffer descriptors | |
790 | */ | |
74ee4ff1 TI |
791 | static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream, |
792 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 793 | { |
74ee4ff1 TI |
794 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
795 | struct atiixp_dma *dma = substream->runtime->private_data; | |
1da177e4 LT |
796 | int err; |
797 | int i; | |
798 | ||
799 | err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); | |
800 | if (err < 0) | |
801 | return err; | |
802 | dma->buf_addr = substream->runtime->dma_addr; | |
803 | dma->buf_bytes = params_buffer_bytes(hw_params); | |
804 | ||
805 | err = atiixp_build_dma_packets(chip, dma, substream, | |
806 | params_periods(hw_params), | |
807 | params_period_bytes(hw_params)); | |
808 | if (err < 0) | |
809 | return err; | |
810 | ||
811 | /* set up modem rate */ | |
812 | for (i = 0; i < NUM_ATI_CODECS; i++) { | |
813 | if (! chip->ac97[i]) | |
814 | continue; | |
815 | snd_ac97_write(chip->ac97[i], AC97_LINE1_RATE, params_rate(hw_params)); | |
816 | snd_ac97_write(chip->ac97[i], AC97_LINE1_LEVEL, 0); | |
817 | } | |
818 | ||
819 | return err; | |
820 | } | |
821 | ||
74ee4ff1 | 822 | static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream) |
1da177e4 | 823 | { |
74ee4ff1 TI |
824 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
825 | struct atiixp_dma *dma = substream->runtime->private_data; | |
1da177e4 LT |
826 | |
827 | atiixp_clear_dma_packets(chip, dma, substream); | |
828 | snd_pcm_lib_free_pages(substream); | |
829 | return 0; | |
830 | } | |
831 | ||
832 | ||
833 | /* | |
834 | * pcm hardware definition, identical for all DMA types | |
835 | */ | |
74ee4ff1 | 836 | static struct snd_pcm_hardware snd_atiixp_pcm_hw = |
1da177e4 LT |
837 | { |
838 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
839 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
840 | SNDRV_PCM_INFO_MMAP_VALID), | |
841 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | |
74ee4ff1 TI |
842 | .rates = (SNDRV_PCM_RATE_8000 | |
843 | SNDRV_PCM_RATE_16000 | | |
844 | SNDRV_PCM_RATE_KNOT), | |
1da177e4 LT |
845 | .rate_min = 8000, |
846 | .rate_max = 16000, | |
847 | .channels_min = 2, | |
848 | .channels_max = 2, | |
849 | .buffer_bytes_max = 256 * 1024, | |
850 | .period_bytes_min = 32, | |
851 | .period_bytes_max = 128 * 1024, | |
852 | .periods_min = 2, | |
853 | .periods_max = ATI_MAX_DESCRIPTORS, | |
854 | }; | |
855 | ||
74ee4ff1 TI |
856 | static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream, |
857 | struct atiixp_dma *dma, int pcm_type) | |
1da177e4 | 858 | { |
74ee4ff1 TI |
859 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
860 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
861 | int err; |
862 | static unsigned int rates[] = { 8000, 9600, 12000, 16000 }; | |
74ee4ff1 | 863 | static struct snd_pcm_hw_constraint_list hw_constraints_rates = { |
1da177e4 LT |
864 | .count = ARRAY_SIZE(rates), |
865 | .list = rates, | |
866 | .mask = 0, | |
867 | }; | |
868 | ||
869 | snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL); | |
870 | ||
871 | if (dma->opened) | |
872 | return -EBUSY; | |
873 | dma->substream = substream; | |
874 | runtime->hw = snd_atiixp_pcm_hw; | |
875 | dma->ac97_pcm_type = pcm_type; | |
74ee4ff1 TI |
876 | if ((err = snd_pcm_hw_constraint_list(runtime, 0, |
877 | SNDRV_PCM_HW_PARAM_RATE, | |
878 | &hw_constraints_rates)) < 0) | |
1da177e4 | 879 | return err; |
74ee4ff1 TI |
880 | if ((err = snd_pcm_hw_constraint_integer(runtime, |
881 | SNDRV_PCM_HW_PARAM_PERIODS)) < 0) | |
1da177e4 LT |
882 | return err; |
883 | runtime->private_data = dma; | |
884 | ||
885 | /* enable DMA bits */ | |
886 | spin_lock_irq(&chip->reg_lock); | |
887 | dma->ops->enable_dma(chip, 1); | |
888 | spin_unlock_irq(&chip->reg_lock); | |
889 | dma->opened = 1; | |
890 | ||
891 | return 0; | |
892 | } | |
893 | ||
74ee4ff1 TI |
894 | static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream, |
895 | struct atiixp_dma *dma) | |
1da177e4 | 896 | { |
74ee4ff1 | 897 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
898 | /* disable DMA bits */ |
899 | snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL); | |
900 | spin_lock_irq(&chip->reg_lock); | |
901 | dma->ops->enable_dma(chip, 0); | |
902 | spin_unlock_irq(&chip->reg_lock); | |
903 | dma->substream = NULL; | |
904 | dma->opened = 0; | |
905 | return 0; | |
906 | } | |
907 | ||
908 | /* | |
909 | */ | |
74ee4ff1 | 910 | static int snd_atiixp_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 911 | { |
74ee4ff1 | 912 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
913 | int err; |
914 | ||
62932df8 | 915 | mutex_lock(&chip->open_mutex); |
1da177e4 | 916 | err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0); |
62932df8 | 917 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
918 | if (err < 0) |
919 | return err; | |
920 | return 0; | |
921 | } | |
922 | ||
74ee4ff1 | 923 | static int snd_atiixp_playback_close(struct snd_pcm_substream *substream) |
1da177e4 | 924 | { |
74ee4ff1 | 925 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 | 926 | int err; |
62932df8 | 927 | mutex_lock(&chip->open_mutex); |
1da177e4 | 928 | err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]); |
62932df8 | 929 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
930 | return err; |
931 | } | |
932 | ||
74ee4ff1 | 933 | static int snd_atiixp_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 934 | { |
74ee4ff1 | 935 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
936 | return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1); |
937 | } | |
938 | ||
74ee4ff1 | 939 | static int snd_atiixp_capture_close(struct snd_pcm_substream *substream) |
1da177e4 | 940 | { |
74ee4ff1 | 941 | struct atiixp_modem *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
942 | return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]); |
943 | } | |
944 | ||
945 | ||
946 | /* AC97 playback */ | |
74ee4ff1 | 947 | static struct snd_pcm_ops snd_atiixp_playback_ops = { |
1da177e4 LT |
948 | .open = snd_atiixp_playback_open, |
949 | .close = snd_atiixp_playback_close, | |
950 | .ioctl = snd_pcm_lib_ioctl, | |
951 | .hw_params = snd_atiixp_pcm_hw_params, | |
952 | .hw_free = snd_atiixp_pcm_hw_free, | |
953 | .prepare = snd_atiixp_playback_prepare, | |
954 | .trigger = snd_atiixp_pcm_trigger, | |
955 | .pointer = snd_atiixp_pcm_pointer, | |
956 | }; | |
957 | ||
958 | /* AC97 capture */ | |
74ee4ff1 | 959 | static struct snd_pcm_ops snd_atiixp_capture_ops = { |
1da177e4 LT |
960 | .open = snd_atiixp_capture_open, |
961 | .close = snd_atiixp_capture_close, | |
962 | .ioctl = snd_pcm_lib_ioctl, | |
963 | .hw_params = snd_atiixp_pcm_hw_params, | |
964 | .hw_free = snd_atiixp_pcm_hw_free, | |
965 | .prepare = snd_atiixp_capture_prepare, | |
966 | .trigger = snd_atiixp_pcm_trigger, | |
967 | .pointer = snd_atiixp_pcm_pointer, | |
968 | }; | |
969 | ||
74ee4ff1 | 970 | static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = { |
1da177e4 LT |
971 | .type = ATI_DMA_PLAYBACK, |
972 | .llp_offset = ATI_REG_MODEM_OUT_DMA1_LINKPTR, | |
973 | .dt_cur = ATI_REG_MODEM_OUT_DMA1_DT_CUR, | |
974 | .enable_dma = atiixp_out_enable_dma, | |
975 | .enable_transfer = atiixp_out_enable_transfer, | |
976 | .flush_dma = atiixp_out_flush_dma, | |
977 | }; | |
978 | ||
74ee4ff1 | 979 | static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = { |
1da177e4 LT |
980 | .type = ATI_DMA_CAPTURE, |
981 | .llp_offset = ATI_REG_MODEM_IN_DMA_LINKPTR, | |
982 | .dt_cur = ATI_REG_MODEM_IN_DMA_DT_CUR, | |
983 | .enable_dma = atiixp_in_enable_dma, | |
984 | .enable_transfer = atiixp_in_enable_transfer, | |
985 | .flush_dma = atiixp_in_flush_dma, | |
986 | }; | |
987 | ||
74ee4ff1 | 988 | static int __devinit snd_atiixp_pcm_new(struct atiixp_modem *chip) |
1da177e4 | 989 | { |
74ee4ff1 | 990 | struct snd_pcm *pcm; |
1da177e4 LT |
991 | int err; |
992 | ||
993 | /* initialize constants */ | |
994 | chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops; | |
995 | chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops; | |
996 | ||
997 | /* PCM #0: analog I/O */ | |
998 | err = snd_pcm_new(chip->card, "ATI IXP MC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm); | |
999 | if (err < 0) | |
1000 | return err; | |
1001 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops); | |
1002 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops); | |
6632d198 | 1003 | pcm->dev_class = SNDRV_PCM_CLASS_MODEM; |
1da177e4 LT |
1004 | pcm->private_data = chip; |
1005 | strcpy(pcm->name, "ATI IXP MC97"); | |
1006 | chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm; | |
1007 | ||
1008 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
74ee4ff1 TI |
1009 | snd_dma_pci_data(chip->pci), |
1010 | 64*1024, 128*1024); | |
1da177e4 LT |
1011 | |
1012 | return 0; | |
1013 | } | |
1014 | ||
1015 | ||
1016 | ||
1017 | /* | |
1018 | * interrupt handler | |
1019 | */ | |
1020 | static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
1021 | { | |
74ee4ff1 | 1022 | struct atiixp_modem *chip = dev_id; |
1da177e4 LT |
1023 | unsigned int status; |
1024 | ||
1025 | status = atiixp_read(chip, ISR); | |
1026 | ||
1027 | if (! status) | |
1028 | return IRQ_NONE; | |
1029 | ||
1030 | /* process audio DMA */ | |
1031 | if (status & ATI_REG_ISR_MODEM_OUT1_XRUN) | |
1032 | snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); | |
1033 | else if (status & ATI_REG_ISR_MODEM_OUT1_STATUS) | |
1034 | snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]); | |
1035 | if (status & ATI_REG_ISR_MODEM_IN_XRUN) | |
1036 | snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); | |
1037 | else if (status & ATI_REG_ISR_MODEM_IN_STATUS) | |
1038 | snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]); | |
1039 | ||
1040 | /* for codec detection */ | |
1041 | if (status & CODEC_CHECK_BITS) { | |
1042 | unsigned int detected; | |
1043 | detected = status & CODEC_CHECK_BITS; | |
1044 | spin_lock(&chip->reg_lock); | |
1045 | chip->codec_not_ready_bits |= detected; | |
1046 | atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */ | |
1047 | spin_unlock(&chip->reg_lock); | |
1048 | } | |
1049 | ||
1050 | /* ack */ | |
1051 | atiixp_write(chip, ISR, status); | |
1052 | ||
1053 | return IRQ_HANDLED; | |
1054 | } | |
1055 | ||
1056 | ||
1057 | /* | |
1058 | * ac97 mixer section | |
1059 | */ | |
1060 | ||
74ee4ff1 | 1061 | static int __devinit snd_atiixp_mixer_new(struct atiixp_modem *chip, int clock) |
1da177e4 | 1062 | { |
74ee4ff1 TI |
1063 | struct snd_ac97_bus *pbus; |
1064 | struct snd_ac97_template ac97; | |
1da177e4 LT |
1065 | int i, err; |
1066 | int codec_count; | |
74ee4ff1 | 1067 | static struct snd_ac97_bus_ops ops = { |
1da177e4 LT |
1068 | .write = snd_atiixp_ac97_write, |
1069 | .read = snd_atiixp_ac97_read, | |
1070 | }; | |
1071 | static unsigned int codec_skip[NUM_ATI_CODECS] = { | |
1072 | ATI_REG_ISR_CODEC0_NOT_READY, | |
1073 | ATI_REG_ISR_CODEC1_NOT_READY, | |
1074 | ATI_REG_ISR_CODEC2_NOT_READY, | |
1075 | }; | |
1076 | ||
1077 | if (snd_atiixp_codec_detect(chip) < 0) | |
1078 | return -ENXIO; | |
1079 | ||
1080 | if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0) | |
1081 | return err; | |
1082 | pbus->clock = clock; | |
1da177e4 LT |
1083 | chip->ac97_bus = pbus; |
1084 | ||
1085 | codec_count = 0; | |
1086 | for (i = 0; i < NUM_ATI_CODECS; i++) { | |
1087 | if (chip->codec_not_ready_bits & codec_skip[i]) | |
1088 | continue; | |
1089 | memset(&ac97, 0, sizeof(ac97)); | |
1090 | ac97.private_data = chip; | |
1091 | ac97.pci = chip->pci; | |
1092 | ac97.num = i; | |
1093 | ac97.scaps = AC97_SCAP_SKIP_AUDIO; | |
1094 | if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) { | |
1095 | chip->ac97[i] = NULL; /* to be sure */ | |
98b4f592 | 1096 | snd_printdd("atiixp-modem: codec %d not available for modem\n", i); |
1da177e4 LT |
1097 | continue; |
1098 | } | |
1099 | codec_count++; | |
1100 | } | |
1101 | ||
1102 | if (! codec_count) { | |
98b4f592 | 1103 | snd_printk(KERN_ERR "atiixp-modem: no codec available\n"); |
1da177e4 LT |
1104 | return -ENODEV; |
1105 | } | |
1106 | ||
1107 | /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */ | |
1108 | ||
1109 | return 0; | |
1110 | } | |
1111 | ||
1112 | ||
1113 | #ifdef CONFIG_PM | |
1114 | /* | |
1115 | * power management | |
1116 | */ | |
92304cc7 | 1117 | static int snd_atiixp_suspend(struct pci_dev *pci, pm_message_t state) |
1da177e4 | 1118 | { |
92304cc7 TI |
1119 | struct snd_card *card = pci_get_drvdata(pci); |
1120 | struct atiixp_modem *chip = card->private_data; | |
1da177e4 LT |
1121 | int i; |
1122 | ||
92304cc7 | 1123 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); |
1da177e4 | 1124 | for (i = 0; i < NUM_ATI_PCMDEVS; i++) |
92304cc7 | 1125 | snd_pcm_suspend_all(chip->pcmdevs[i]); |
1da177e4 | 1126 | for (i = 0; i < NUM_ATI_CODECS; i++) |
92304cc7 | 1127 | snd_ac97_suspend(chip->ac97[i]); |
1da177e4 LT |
1128 | snd_atiixp_aclink_down(chip); |
1129 | snd_atiixp_chip_stop(chip); | |
1130 | ||
92304cc7 TI |
1131 | pci_set_power_state(pci, PCI_D3hot); |
1132 | pci_disable_device(pci); | |
1133 | pci_save_state(pci); | |
1da177e4 LT |
1134 | return 0; |
1135 | } | |
1136 | ||
92304cc7 | 1137 | static int snd_atiixp_resume(struct pci_dev *pci) |
1da177e4 | 1138 | { |
92304cc7 TI |
1139 | struct snd_card *card = pci_get_drvdata(pci); |
1140 | struct atiixp_modem *chip = card->private_data; | |
1da177e4 LT |
1141 | int i; |
1142 | ||
92304cc7 TI |
1143 | pci_restore_state(pci); |
1144 | pci_enable_device(pci); | |
1145 | pci_set_power_state(pci, PCI_D0); | |
1146 | pci_set_master(pci); | |
1da177e4 LT |
1147 | |
1148 | snd_atiixp_aclink_reset(chip); | |
1149 | snd_atiixp_chip_start(chip); | |
1150 | ||
1151 | for (i = 0; i < NUM_ATI_CODECS; i++) | |
92304cc7 | 1152 | snd_ac97_resume(chip->ac97[i]); |
1da177e4 | 1153 | |
92304cc7 | 1154 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); |
1da177e4 LT |
1155 | return 0; |
1156 | } | |
1157 | #endif /* CONFIG_PM */ | |
1158 | ||
1159 | ||
adf1b3d2 | 1160 | #ifdef CONFIG_PROC_FS |
1da177e4 LT |
1161 | /* |
1162 | * proc interface for register dump | |
1163 | */ | |
1164 | ||
74ee4ff1 TI |
1165 | static void snd_atiixp_proc_read(struct snd_info_entry *entry, |
1166 | struct snd_info_buffer *buffer) | |
1da177e4 | 1167 | { |
74ee4ff1 | 1168 | struct atiixp_modem *chip = entry->private_data; |
1da177e4 LT |
1169 | int i; |
1170 | ||
1171 | for (i = 0; i < 256; i += 4) | |
1172 | snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i)); | |
1173 | } | |
1174 | ||
74ee4ff1 | 1175 | static void __devinit snd_atiixp_proc_init(struct atiixp_modem *chip) |
1da177e4 | 1176 | { |
74ee4ff1 | 1177 | struct snd_info_entry *entry; |
1da177e4 | 1178 | |
98b4f592 | 1179 | if (! snd_card_proc_new(chip->card, "atiixp-modem", &entry)) |
1da177e4 LT |
1180 | snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read); |
1181 | } | |
adf1b3d2 TI |
1182 | #else |
1183 | #define snd_atiixp_proc_init(chip) | |
1184 | #endif | |
1da177e4 LT |
1185 | |
1186 | ||
1187 | /* | |
1188 | * destructor | |
1189 | */ | |
1190 | ||
74ee4ff1 | 1191 | static int snd_atiixp_free(struct atiixp_modem *chip) |
1da177e4 LT |
1192 | { |
1193 | if (chip->irq < 0) | |
1194 | goto __hw_end; | |
1195 | snd_atiixp_chip_stop(chip); | |
1196 | synchronize_irq(chip->irq); | |
1197 | __hw_end: | |
1198 | if (chip->irq >= 0) | |
74ee4ff1 | 1199 | free_irq(chip->irq, chip); |
1da177e4 LT |
1200 | if (chip->remap_addr) |
1201 | iounmap(chip->remap_addr); | |
1202 | pci_release_regions(chip->pci); | |
1203 | pci_disable_device(chip->pci); | |
1204 | kfree(chip); | |
1205 | return 0; | |
1206 | } | |
1207 | ||
74ee4ff1 | 1208 | static int snd_atiixp_dev_free(struct snd_device *device) |
1da177e4 | 1209 | { |
74ee4ff1 | 1210 | struct atiixp_modem *chip = device->device_data; |
1da177e4 LT |
1211 | return snd_atiixp_free(chip); |
1212 | } | |
1213 | ||
1214 | /* | |
1215 | * constructor for chip instance | |
1216 | */ | |
74ee4ff1 TI |
1217 | static int __devinit snd_atiixp_create(struct snd_card *card, |
1218 | struct pci_dev *pci, | |
1219 | struct atiixp_modem **r_chip) | |
1da177e4 | 1220 | { |
74ee4ff1 | 1221 | static struct snd_device_ops ops = { |
1da177e4 LT |
1222 | .dev_free = snd_atiixp_dev_free, |
1223 | }; | |
74ee4ff1 | 1224 | struct atiixp_modem *chip; |
1da177e4 LT |
1225 | int err; |
1226 | ||
1227 | if ((err = pci_enable_device(pci)) < 0) | |
1228 | return err; | |
1229 | ||
e560d8d8 | 1230 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 LT |
1231 | if (chip == NULL) { |
1232 | pci_disable_device(pci); | |
1233 | return -ENOMEM; | |
1234 | } | |
1235 | ||
1236 | spin_lock_init(&chip->reg_lock); | |
62932df8 | 1237 | mutex_init(&chip->open_mutex); |
1da177e4 LT |
1238 | chip->card = card; |
1239 | chip->pci = pci; | |
1240 | chip->irq = -1; | |
1241 | if ((err = pci_request_regions(pci, "ATI IXP MC97")) < 0) { | |
1242 | kfree(chip); | |
1243 | pci_disable_device(pci); | |
1244 | return err; | |
1245 | } | |
1246 | chip->addr = pci_resource_start(pci, 0); | |
1247 | chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0)); | |
1248 | if (chip->remap_addr == NULL) { | |
1249 | snd_printk(KERN_ERR "AC'97 space ioremap problem\n"); | |
1250 | snd_atiixp_free(chip); | |
1251 | return -EIO; | |
1252 | } | |
1253 | ||
74ee4ff1 TI |
1254 | if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, |
1255 | card->shortname, chip)) { | |
1da177e4 LT |
1256 | snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); |
1257 | snd_atiixp_free(chip); | |
1258 | return -EBUSY; | |
1259 | } | |
1260 | chip->irq = pci->irq; | |
1261 | pci_set_master(pci); | |
1262 | synchronize_irq(chip->irq); | |
1263 | ||
1264 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { | |
1265 | snd_atiixp_free(chip); | |
1266 | return err; | |
1267 | } | |
1268 | ||
1269 | snd_card_set_dev(card, &pci->dev); | |
1270 | ||
1271 | *r_chip = chip; | |
1272 | return 0; | |
1273 | } | |
1274 | ||
1275 | ||
1276 | static int __devinit snd_atiixp_probe(struct pci_dev *pci, | |
1277 | const struct pci_device_id *pci_id) | |
1278 | { | |
74ee4ff1 TI |
1279 | struct snd_card *card; |
1280 | struct atiixp_modem *chip; | |
1da177e4 LT |
1281 | unsigned char revision; |
1282 | int err; | |
1283 | ||
b7fe4622 | 1284 | card = snd_card_new(index, id, THIS_MODULE, 0); |
1da177e4 LT |
1285 | if (card == NULL) |
1286 | return -ENOMEM; | |
1287 | ||
1288 | pci_read_config_byte(pci, PCI_REVISION_ID, &revision); | |
1289 | ||
1290 | strcpy(card->driver, "ATIIXP-MODEM"); | |
1291 | strcpy(card->shortname, "ATI IXP Modem"); | |
1292 | if ((err = snd_atiixp_create(card, pci, &chip)) < 0) | |
1293 | goto __error; | |
92304cc7 | 1294 | card->private_data = chip; |
1da177e4 LT |
1295 | |
1296 | if ((err = snd_atiixp_aclink_reset(chip)) < 0) | |
1297 | goto __error; | |
1298 | ||
b7fe4622 | 1299 | if ((err = snd_atiixp_mixer_new(chip, ac97_clock)) < 0) |
1da177e4 LT |
1300 | goto __error; |
1301 | ||
1302 | if ((err = snd_atiixp_pcm_new(chip)) < 0) | |
1303 | goto __error; | |
1304 | ||
1305 | snd_atiixp_proc_init(chip); | |
1306 | ||
1307 | snd_atiixp_chip_start(chip); | |
1308 | ||
1309 | sprintf(card->longname, "%s rev %x at 0x%lx, irq %i", | |
1310 | card->shortname, revision, chip->addr, chip->irq); | |
1311 | ||
1da177e4 LT |
1312 | if ((err = snd_card_register(card)) < 0) |
1313 | goto __error; | |
1314 | ||
1315 | pci_set_drvdata(pci, card); | |
1da177e4 LT |
1316 | return 0; |
1317 | ||
1318 | __error: | |
1319 | snd_card_free(card); | |
1320 | return err; | |
1321 | } | |
1322 | ||
1323 | static void __devexit snd_atiixp_remove(struct pci_dev *pci) | |
1324 | { | |
1325 | snd_card_free(pci_get_drvdata(pci)); | |
1326 | pci_set_drvdata(pci, NULL); | |
1327 | } | |
1328 | ||
1329 | static struct pci_driver driver = { | |
1330 | .name = "ATI IXP MC97 controller", | |
1331 | .id_table = snd_atiixp_ids, | |
1332 | .probe = snd_atiixp_probe, | |
1333 | .remove = __devexit_p(snd_atiixp_remove), | |
92304cc7 TI |
1334 | #ifdef CONFIG_PM |
1335 | .suspend = snd_atiixp_suspend, | |
1336 | .resume = snd_atiixp_resume, | |
1337 | #endif | |
1da177e4 LT |
1338 | }; |
1339 | ||
1340 | ||
1341 | static int __init alsa_card_atiixp_init(void) | |
1342 | { | |
01d25d46 | 1343 | return pci_register_driver(&driver); |
1da177e4 LT |
1344 | } |
1345 | ||
1346 | static void __exit alsa_card_atiixp_exit(void) | |
1347 | { | |
1348 | pci_unregister_driver(&driver); | |
1349 | } | |
1350 | ||
1351 | module_init(alsa_card_atiixp_init) | |
1352 | module_exit(alsa_card_atiixp_exit) |