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[ALSA] Remove xxx_t typedefs: PCI ALS4000
[linux-2.6-block.git] / sound / pci / atiixp.c
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1da177e4
LT		 1/*
2 * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <sound/driver.h>
23#include <asm/io.h>
24#include <linux/delay.h>
25#include <linux/interrupt.h>
26#include <linux/init.h>
27#include <linux/pci.h>
28#include <linux/slab.h>
29#include <linux/moduleparam.h>
30#include <sound/core.h>
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/info.h>
34#include <sound/ac97_codec.h>
35#include <sound/initval.h>
36
37MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38MODULE_DESCRIPTION("ATI IXP AC97 controller");
39MODULE_LICENSE("GPL");
40MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400}}");
41
b7fe4622
CL		 42static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
43static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
44static int ac97_clock = 48000;
45static char *ac97_quirk;
46static int spdif_aclink = 1;
47
48module_param(index, int, 0444);
1da177e4 49MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
b7fe4622 50module_param(id, charp, 0444);
1da177e4 51MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
b7fe4622 52module_param(ac97_clock, int, 0444);
1da177e4 53MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
b7fe4622 54module_param(ac97_quirk, charp, 0444);
1da177e4 55MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
b7fe4622 56module_param(spdif_aclink, bool, 0444);
1da177e4
LT		 57MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
58
2b3e584b
TI		 59/* just for backward compatibility */
60static int enable;
698444f3 61module_param(enable, bool, 0444);
2b3e584b 62
1da177e4
LT		 63
64/*
65 */
66
67#define ATI_REG_ISR 0x00 /* interrupt source */
68#define ATI_REG_ISR_IN_XRUN (1U<<0)
69#define ATI_REG_ISR_IN_STATUS (1U<<1)
70#define ATI_REG_ISR_OUT_XRUN (1U<<2)
71#define ATI_REG_ISR_OUT_STATUS (1U<<3)
72#define ATI_REG_ISR_SPDF_XRUN (1U<<4)
73#define ATI_REG_ISR_SPDF_STATUS (1U<<5)
74#define ATI_REG_ISR_PHYS_INTR (1U<<8)
75#define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
76#define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
77#define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
78#define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
79#define ATI_REG_ISR_NEW_FRAME (1U<<13)
80
81#define ATI_REG_IER 0x04 /* interrupt enable */
82#define ATI_REG_IER_IN_XRUN_EN (1U<<0)
83#define ATI_REG_IER_IO_STATUS_EN (1U<<1)
84#define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
85#define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
86#define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
87#define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
88#define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
89#define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
90#define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
91#define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
92#define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
93#define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
94#define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
95
96#define ATI_REG_CMD 0x08 /* command */
97#define ATI_REG_CMD_POWERDOWN (1U<<0)
98#define ATI_REG_CMD_RECEIVE_EN (1U<<1)
99#define ATI_REG_CMD_SEND_EN (1U<<2)
100#define ATI_REG_CMD_STATUS_MEM (1U<<3)
101#define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
102#define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
103#define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
104#define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
105#define ATI_REG_CMD_IN_DMA_EN (1U<<8)
106#define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
107#define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
108#define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
109#define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
110#define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
111#define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
112#define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
113#define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
114#define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
115#define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
116#define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
117#define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
118#define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
119#define ATI_REG_CMD_PACKED_DIS (1U<<24)
120#define ATI_REG_CMD_BURST_EN (1U<<25)
121#define ATI_REG_CMD_PANIC_EN (1U<<26)
122#define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
123#define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
124#define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
125#define ATI_REG_CMD_AC_SYNC (1U<<30)
126#define ATI_REG_CMD_AC_RESET (1U<<31)
127
128#define ATI_REG_PHYS_OUT_ADDR 0x0c
129#define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
130#define ATI_REG_PHYS_OUT_RW (1U<<2)
131#define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
132#define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
133#define ATI_REG_PHYS_OUT_DATA_SHIFT 16
134
135#define ATI_REG_PHYS_IN_ADDR 0x10
136#define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
137#define ATI_REG_PHYS_IN_ADDR_SHIFT 9
138#define ATI_REG_PHYS_IN_DATA_SHIFT 16
139
140#define ATI_REG_SLOTREQ 0x14
141
142#define ATI_REG_COUNTER 0x18
143#define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
144#define ATI_REG_COUNTER_BITCLOCK (31U<<8)
145
146#define ATI_REG_IN_FIFO_THRESHOLD 0x1c
147
148#define ATI_REG_IN_DMA_LINKPTR 0x20
149#define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
150#define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
151#define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
152#define ATI_REG_IN_DMA_DT_SIZE 0x30
153
154#define ATI_REG_OUT_DMA_SLOT 0x34
155#define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
156#define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
157#define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
158#define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
159
160#define ATI_REG_OUT_DMA_LINKPTR 0x38
161#define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
162#define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
163#define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
164#define ATI_REG_OUT_DMA_DT_SIZE 0x48
165
166#define ATI_REG_SPDF_CMD 0x4c
167#define ATI_REG_SPDF_CMD_LFSR (1U<<4)
168#define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
169#define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
170
171#define ATI_REG_SPDF_DMA_LINKPTR 0x50
172#define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
173#define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
174#define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
175#define ATI_REG_SPDF_DMA_DT_SIZE 0x60
176
177#define ATI_REG_MODEM_MIRROR 0x7c
178#define ATI_REG_AUDIO_MIRROR 0x80
179
180#define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
181#define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
182
183#define ATI_REG_FIFO_FLUSH 0x88
184#define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
185#define ATI_REG_FIFO_IN_FLUSH (1U<<1)
186
187/* LINKPTR */
188#define ATI_REG_LINKPTR_EN (1U<<0)
189
190/* [INT|OUT|SPDIF]_DMA_DT_SIZE */
191#define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
192#define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
193#define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
194#define ATI_REG_DMA_STATE (7U<<26)
195
196
197#define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
198
199
200/*
201 */
202
203typedef struct snd_atiixp atiixp_t;
204typedef struct snd_atiixp_dma atiixp_dma_t;
205typedef struct snd_atiixp_dma_ops atiixp_dma_ops_t;
206
207
208/*
209 * DMA packate descriptor
210 */
211
212typedef struct atiixp_dma_desc {
213 u32 addr; /* DMA buffer address */
214 u16 status; /* status bits */
215 u16 size; /* size of the packet in dwords */
216 u32 next; /* address of the next packet descriptor */
217} atiixp_dma_desc_t;
218
219/*
220 * stream enum
221 */
222enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */
223enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */
224enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */
225
226#define NUM_ATI_CODECS 3
227
228
229/*
230 * constants and callbacks for each DMA type
231 */
232struct snd_atiixp_dma_ops {
233 int type; /* ATI_DMA_XXX */
234 unsigned int llp_offset; /* LINKPTR offset */
235 unsigned int dt_cur; /* DT_CUR offset */
236 void (*enable_dma)(atiixp_t *chip, int on); /* called from open callback */
237 void (*enable_transfer)(atiixp_t *chip, int on); /* called from trigger (START/STOP) */
238 void (*flush_dma)(atiixp_t *chip); /* called from trigger (STOP only) */
239};
240
241/*
242 * DMA stream
243 */
244struct snd_atiixp_dma {
245 const atiixp_dma_ops_t *ops;
246 struct snd_dma_buffer desc_buf;
247 snd_pcm_substream_t *substream; /* assigned PCM substream */
248 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
249 unsigned int period_bytes, periods;
250 int opened;
251 int running;
41e4845c 252 int suspended;
1da177e4
LT		 253 int pcm_open_flag;
254 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
255 unsigned int saved_curptr;
256};
257
258/*
259 * ATI IXP chip
260 */
261struct snd_atiixp {
262 snd_card_t *card;
263 struct pci_dev *pci;
264
265 unsigned long addr;
266 void __iomem *remap_addr;
267 int irq;
268
269 ac97_bus_t *ac97_bus;
270 ac97_t *ac97[NUM_ATI_CODECS];
271
272 spinlock_t reg_lock;
273
274 atiixp_dma_t dmas[NUM_ATI_DMAS];
275 struct ac97_pcm *pcms[NUM_ATI_PCMS];
276 snd_pcm_t *pcmdevs[NUM_ATI_PCMDEVS];
277
278 int max_channels; /* max. channels for PCM out */
279
280 unsigned int codec_not_ready_bits; /* for codec detection */
281
282 int spdif_over_aclink; /* passed from the module option */
283 struct semaphore open_mutex; /* playback open mutex */
284};
285
286
287/*
288 */
289static struct pci_device_id snd_atiixp_ids[] = {
290 { 0x1002, 0x4341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
291 { 0x1002, 0x4361, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB300 */
292 { 0x1002, 0x4370, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB400 */
293 { 0, }
294};
295
296MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
297
298
299/*
300 * lowlevel functions
301 */
302
303/*
304 * update the bits of the given register.
305 * return 1 if the bits changed.
306 */
307static int snd_atiixp_update_bits(atiixp_t *chip, unsigned int reg,
308 unsigned int mask, unsigned int value)
309{
310 void __iomem *addr = chip->remap_addr + reg;
311 unsigned int data, old_data;
312 old_data = data = readl(addr);
313 data &= ~mask;
314 data |= value;
315 if (old_data == data)
316 return 0;
317 writel(data, addr);
318 return 1;
319}
320
321/*
322 * macros for easy use
323 */
324#define atiixp_write(chip,reg,value) \
325 writel(value, chip->remap_addr + ATI_REG_##reg)
326#define atiixp_read(chip,reg) \
327 readl(chip->remap_addr + ATI_REG_##reg)
328#define atiixp_update(chip,reg,mask,val) \
329 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
330
1da177e4
LT		 331/*
332 * handling DMA packets
333 *
334 * we allocate a linear buffer for the DMA, and split it to each packet.
335 * in a future version, a scatter-gather buffer should be implemented.
336 */
337
338#define ATI_DESC_LIST_SIZE \
339 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(atiixp_dma_desc_t))
340
341/*
342 * build packets ring for the given buffer size.
343 *
344 * IXP handles the buffer descriptors, which are connected as a linked
345 * list. although we can change the list dynamically, in this version,
346 * a static RING of buffer descriptors is used.
347 *
348 * the ring is built in this function, and is set up to the hardware.
349 */
350static int atiixp_build_dma_packets(atiixp_t *chip, atiixp_dma_t *dma,
351 snd_pcm_substream_t *substream,
352 unsigned int periods,
353 unsigned int period_bytes)
354{
355 unsigned int i;
356 u32 addr, desc_addr;
357 unsigned long flags;
358
359 if (periods > ATI_MAX_DESCRIPTORS)
360 return -ENOMEM;
361
362 if (dma->desc_buf.area == NULL) {
363 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
364 ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
365 return -ENOMEM;
366 dma->period_bytes = dma->periods = 0; /* clear */
367 }
368
369 if (dma->periods == periods && dma->period_bytes == period_bytes)
370 return 0;
371
372 /* reset DMA before changing the descriptor table */
373 spin_lock_irqsave(&chip->reg_lock, flags);
374 writel(0, chip->remap_addr + dma->ops->llp_offset);
375 dma->ops->enable_dma(chip, 0);
376 dma->ops->enable_dma(chip, 1);
377 spin_unlock_irqrestore(&chip->reg_lock, flags);
378
379 /* fill the entries */
380 addr = (u32)substream->runtime->dma_addr;
381 desc_addr = (u32)dma->desc_buf.addr;
382 for (i = 0; i < periods; i++) {
383 atiixp_dma_desc_t *desc = &((atiixp_dma_desc_t *)dma->desc_buf.area)[i];
384 desc->addr = cpu_to_le32(addr);
385 desc->status = 0;
386 desc->size = period_bytes >> 2; /* in dwords */
387 desc_addr += sizeof(atiixp_dma_desc_t);
388 if (i == periods - 1)
389 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
390 else
391 desc->next = cpu_to_le32(desc_addr);
392 addr += period_bytes;
393 }
394
395 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
396 chip->remap_addr + dma->ops->llp_offset);
397
398 dma->period_bytes = period_bytes;
399 dma->periods = periods;
400
401 return 0;
402}
403
404/*
405 * remove the ring buffer and release it if assigned
406 */
407static void atiixp_clear_dma_packets(atiixp_t *chip, atiixp_dma_t *dma, snd_pcm_substream_t *substream)
408{
409 if (dma->desc_buf.area) {
410 writel(0, chip->remap_addr + dma->ops->llp_offset);
411 snd_dma_free_pages(&dma->desc_buf);
412 dma->desc_buf.area = NULL;
413 }
414}
415
416/*
417 * AC97 interface
418 */
419static int snd_atiixp_acquire_codec(atiixp_t *chip)
420{
421 int timeout = 1000;
422
423 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
424 if (! timeout--) {
425 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
426 return -EBUSY;
427 }
428 udelay(1);
429 }
430 return 0;
431}
432
433static unsigned short snd_atiixp_codec_read(atiixp_t *chip, unsigned short codec, unsigned short reg)
434{
435 unsigned int data;
436 int timeout;
437
438 if (snd_atiixp_acquire_codec(chip) < 0)
439 return 0xffff;
440 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
441 ATI_REG_PHYS_OUT_ADDR_EN |
442 ATI_REG_PHYS_OUT_RW |
443 codec;
444 atiixp_write(chip, PHYS_OUT_ADDR, data);
445 if (snd_atiixp_acquire_codec(chip) < 0)
446 return 0xffff;
447 timeout = 1000;
448 do {
449 data = atiixp_read(chip, PHYS_IN_ADDR);
450 if (data & ATI_REG_PHYS_IN_READ_FLAG)
451 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
452 udelay(1);
453 } while (--timeout);
454 /* time out may happen during reset */
455 if (reg < 0x7c)
456 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
457 return 0xffff;
458}
459
460
461static void snd_atiixp_codec_write(atiixp_t *chip, unsigned short codec, unsigned short reg, unsigned short val)
462{
463 unsigned int data;
464
465 if (snd_atiixp_acquire_codec(chip) < 0)
466 return;
467 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
468 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
469 ATI_REG_PHYS_OUT_ADDR_EN | codec;
470 atiixp_write(chip, PHYS_OUT_ADDR, data);
471}
472
473
474static unsigned short snd_atiixp_ac97_read(ac97_t *ac97, unsigned short reg)
475{
476 atiixp_t *chip = ac97->private_data;
477 return snd_atiixp_codec_read(chip, ac97->num, reg);
478
479}
480
481static void snd_atiixp_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val)
482{
483 atiixp_t *chip = ac97->private_data;
484 snd_atiixp_codec_write(chip, ac97->num, reg, val);
485}
486
487/*
488 * reset AC link
489 */
490static int snd_atiixp_aclink_reset(atiixp_t *chip)
491{
492 int timeout;
493
494 /* reset powerdoewn */
495 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
496 udelay(10);
497
498 /* perform a software reset */
499 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
500 atiixp_read(chip, CMD);
501 udelay(10);
502 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
503
504 timeout = 10;
505 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
506 /* do a hard reset */
507 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
508 ATI_REG_CMD_AC_SYNC);
509 atiixp_read(chip, CMD);
bfdcbace 510 msleep(1);
1da177e4
LT		 511 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
512 if (--timeout) {
513 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
514 break;
515 }
516 }
517
518 /* deassert RESET and assert SYNC to make sure */
519 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
520 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
521
522 return 0;
523}
524
525#ifdef CONFIG_PM
526static int snd_atiixp_aclink_down(atiixp_t *chip)
527{
528 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
529 // return -EBUSY;
530 atiixp_update(chip, CMD,
531 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
532 ATI_REG_CMD_POWERDOWN);
533 return 0;
534}
535#endif
536
537/*
538 * auto-detection of codecs
539 *
540 * the IXP chip can generate interrupts for the non-existing codecs.
541 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
542 * even if all three codecs are connected.
543 */
544
545#define ALL_CODEC_NOT_READY \
546 (ATI_REG_ISR_CODEC0_NOT_READY |\
547 ATI_REG_ISR_CODEC1_NOT_READY |\
548 ATI_REG_ISR_CODEC2_NOT_READY)
549#define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
550
551static int snd_atiixp_codec_detect(atiixp_t *chip)
552{
553 int timeout;
554
555 chip->codec_not_ready_bits = 0;
556 atiixp_write(chip, IER, CODEC_CHECK_BITS);
557 /* wait for the interrupts */
bfdcbace 558 timeout = 50;
1da177e4 559 while (timeout-- > 0) {
bfdcbace 560 msleep(1);
1da177e4
LT		 561 if (chip->codec_not_ready_bits)
562 break;
563 }
564 atiixp_write(chip, IER, 0); /* disable irqs */
565
566 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
567 snd_printk(KERN_ERR "atiixp: no codec detected!\n");
568 return -ENXIO;
569 }
570 return 0;
571}
572
573
574/*
575 * enable DMA and irqs
576 */
577static int snd_atiixp_chip_start(atiixp_t *chip)
578{
579 unsigned int reg;
580
581 /* set up spdif, enable burst mode */
582 reg = atiixp_read(chip, CMD);
583 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
584 reg |= ATI_REG_CMD_BURST_EN;
585 atiixp_write(chip, CMD, reg);
586
587 reg = atiixp_read(chip, SPDF_CMD);
588 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH);
589 atiixp_write(chip, SPDF_CMD, reg);
590
591 /* clear all interrupt source */
592 atiixp_write(chip, ISR, 0xffffffff);
593 /* enable irqs */
594 atiixp_write(chip, IER,
595 ATI_REG_IER_IO_STATUS_EN |
596 ATI_REG_IER_IN_XRUN_EN |
597 ATI_REG_IER_OUT_XRUN_EN |
598 ATI_REG_IER_SPDF_XRUN_EN |
599 ATI_REG_IER_SPDF_STATUS_EN);
600 return 0;
601}
602
603
604/*
605 * disable DMA and IRQs
606 */
607static int snd_atiixp_chip_stop(atiixp_t *chip)
608{
609 /* clear interrupt source */
610 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
611 /* disable irqs */
612 atiixp_write(chip, IER, 0);
613 return 0;
614}
615
616
617/*
618 * PCM section
619 */
620
621/*
622 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
623 * position. when SG-buffer is implemented, the offset must be calculated
624 * correctly...
625 */
626static snd_pcm_uframes_t snd_atiixp_pcm_pointer(snd_pcm_substream_t *substream)
627{
628 atiixp_t *chip = snd_pcm_substream_chip(substream);
629 snd_pcm_runtime_t *runtime = substream->runtime;
630 atiixp_dma_t *dma = (atiixp_dma_t *)runtime->private_data;
631 unsigned int curptr;
632 int timeout = 1000;
633
634 while (timeout--) {
635 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
636 if (curptr < dma->buf_addr)
637 continue;
638 curptr -= dma->buf_addr;
639 if (curptr >= dma->buf_bytes)
640 continue;
641 return bytes_to_frames(runtime, curptr);
642 }
643 snd_printd("atiixp: invalid DMA pointer read 0x%x (buf=%x)\n",
644 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
645 return 0;
646}
647
648/*
649 * XRUN detected, and stop the PCM substream
650 */
651static void snd_atiixp_xrun_dma(atiixp_t *chip, atiixp_dma_t *dma)
652{
653 if (! dma->substream || ! dma->running)
654 return;
655 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
656 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
657}
658
659/*
660 * the period ack. update the substream.
661 */
662static void snd_atiixp_update_dma(atiixp_t *chip, atiixp_dma_t *dma)
663{
664 if (! dma->substream || ! dma->running)
665 return;
666 snd_pcm_period_elapsed(dma->substream);
667}
668
669/* set BUS_BUSY interrupt bit if any DMA is running */
670/* call with spinlock held */
671static void snd_atiixp_check_bus_busy(atiixp_t *chip)
672{
673 unsigned int bus_busy;
674 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
675 ATI_REG_CMD_RECEIVE_EN |
676 ATI_REG_CMD_SPDF_OUT_EN))
677 bus_busy = ATI_REG_IER_SET_BUS_BUSY;
678 else
679 bus_busy = 0;
680 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
681}
682
683/* common trigger callback
684 * calling the lowlevel callbacks in it
685 */
686static int snd_atiixp_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
687{
688 atiixp_t *chip = snd_pcm_substream_chip(substream);
689 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
690 int err = 0;
691
692 snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
693
694 spin_lock(&chip->reg_lock);
695 switch (cmd) {
696 case SNDRV_PCM_TRIGGER_START:
41e4845c
JK		 697 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
698 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 699 dma->ops->enable_transfer(chip, 1);
700 dma->running = 1;
41e4845c 701 dma->suspended = 0;
1da177e4
LT		 702 break;
703 case SNDRV_PCM_TRIGGER_STOP:
41e4845c
JK		 704 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
705 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 706 dma->ops->enable_transfer(chip, 0);
707 dma->running = 0;
41e4845c 708 dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND;
1da177e4
LT		 709 break;
710 default:
711 err = -EINVAL;
712 break;
713 }
714 if (! err) {
715 snd_atiixp_check_bus_busy(chip);
716 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
717 dma->ops->flush_dma(chip);
718 snd_atiixp_check_bus_busy(chip);
719 }
720 }
721 spin_unlock(&chip->reg_lock);
722 return err;
723}
724
725
726/*
727 * lowlevel callbacks for each DMA type
728 *
729 * every callback is supposed to be called in chip->reg_lock spinlock
730 */
731
732/* flush FIFO of analog OUT DMA */
733static void atiixp_out_flush_dma(atiixp_t *chip)
734{
735 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
736}
737
738/* enable/disable analog OUT DMA */
739static void atiixp_out_enable_dma(atiixp_t *chip, int on)
740{
741 unsigned int data;
742 data = atiixp_read(chip, CMD);
743 if (on) {
744 if (data & ATI_REG_CMD_OUT_DMA_EN)
745 return;
746 atiixp_out_flush_dma(chip);
747 data |= ATI_REG_CMD_OUT_DMA_EN;
748 } else
749 data &= ~ATI_REG_CMD_OUT_DMA_EN;
750 atiixp_write(chip, CMD, data);
751}
752
753/* start/stop transfer over OUT DMA */
754static void atiixp_out_enable_transfer(atiixp_t *chip, int on)
755{
756 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
757 on ? ATI_REG_CMD_SEND_EN : 0);
758}
759
760/* enable/disable analog IN DMA */
761static void atiixp_in_enable_dma(atiixp_t *chip, int on)
762{
763 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
764 on ? ATI_REG_CMD_IN_DMA_EN : 0);
765}
766
767/* start/stop analog IN DMA */
768static void atiixp_in_enable_transfer(atiixp_t *chip, int on)
769{
770 if (on) {
771 unsigned int data = atiixp_read(chip, CMD);
772 if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
773 data |= ATI_REG_CMD_RECEIVE_EN;
774#if 0 /* FIXME: this causes the endless loop */
775 /* wait until slot 3/4 are finished */
776 while ((atiixp_read(chip, COUNTER) &
777 ATI_REG_COUNTER_SLOT) != 5)
778 ;
779#endif
780 atiixp_write(chip, CMD, data);
781 }
782 } else
783 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
784}
785
786/* flush FIFO of analog IN DMA */
787static void atiixp_in_flush_dma(atiixp_t *chip)
788{
789 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
790}
791
792/* enable/disable SPDIF OUT DMA */
793static void atiixp_spdif_enable_dma(atiixp_t *chip, int on)
794{
795 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
796 on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
797}
798
799/* start/stop SPDIF OUT DMA */
800static void atiixp_spdif_enable_transfer(atiixp_t *chip, int on)
801{
802 unsigned int data;
803 data = atiixp_read(chip, CMD);
804 if (on)
805 data |= ATI_REG_CMD_SPDF_OUT_EN;
806 else
807 data &= ~ATI_REG_CMD_SPDF_OUT_EN;
808 atiixp_write(chip, CMD, data);
809}
810
811/* flush FIFO of SPDIF OUT DMA */
812static void atiixp_spdif_flush_dma(atiixp_t *chip)
813{
814 int timeout;
815
816 /* DMA off, transfer on */
817 atiixp_spdif_enable_dma(chip, 0);
818 atiixp_spdif_enable_transfer(chip, 1);
819
820 timeout = 100;
821 do {
822 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
823 break;
824 udelay(1);
825 } while (timeout-- > 0);
826
827 atiixp_spdif_enable_transfer(chip, 0);
828}
829
830/* set up slots and formats for SPDIF OUT */
831static int snd_atiixp_spdif_prepare(snd_pcm_substream_t *substream)
832{
833 atiixp_t *chip = snd_pcm_substream_chip(substream);
834
835 spin_lock_irq(&chip->reg_lock);
836 if (chip->spdif_over_aclink) {
837 unsigned int data;
838 /* enable slots 10/11 */
839 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
840 ATI_REG_CMD_SPDF_CONFIG_01);
841 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
842 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
843 ATI_REG_OUT_DMA_SLOT_BIT(11);
844 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
845 atiixp_write(chip, OUT_DMA_SLOT, data);
846 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
847 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
848 ATI_REG_CMD_INTERLEAVE_OUT : 0);
849 } else {
850 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
851 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0);
852 }
853 spin_unlock_irq(&chip->reg_lock);
854 return 0;
855}
856
857/* set up slots and formats for analog OUT */
858static int snd_atiixp_playback_prepare(snd_pcm_substream_t *substream)
859{
860 atiixp_t *chip = snd_pcm_substream_chip(substream);
861 unsigned int data;
862
863 spin_lock_irq(&chip->reg_lock);
864 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
865 switch (substream->runtime->channels) {
866 case 8:
867 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
868 ATI_REG_OUT_DMA_SLOT_BIT(11);
869 /* fallthru */
870 case 6:
871 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
872 ATI_REG_OUT_DMA_SLOT_BIT(8);
873 /* fallthru */
874 case 4:
875 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
876 ATI_REG_OUT_DMA_SLOT_BIT(9);
877 /* fallthru */
878 default:
879 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
880 ATI_REG_OUT_DMA_SLOT_BIT(4);
881 break;
882 }
883
884 /* set output threshold */
885 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
886 atiixp_write(chip, OUT_DMA_SLOT, data);
887
888 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
889 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
890 ATI_REG_CMD_INTERLEAVE_OUT : 0);
891
892 /*
893 * enable 6 channel re-ordering bit if needed
894 */
895 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
896 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
897
898 spin_unlock_irq(&chip->reg_lock);
899 return 0;
900}
901
902/* set up slots and formats for analog IN */
903static int snd_atiixp_capture_prepare(snd_pcm_substream_t *substream)
904{
905 atiixp_t *chip = snd_pcm_substream_chip(substream);
906
907 spin_lock_irq(&chip->reg_lock);
908 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
909 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
910 ATI_REG_CMD_INTERLEAVE_IN : 0);
911 spin_unlock_irq(&chip->reg_lock);
912 return 0;
913}
914
915/*
916 * hw_params - allocate the buffer and set up buffer descriptors
917 */
918static int snd_atiixp_pcm_hw_params(snd_pcm_substream_t *substream,
919 snd_pcm_hw_params_t *hw_params)
920{
921 atiixp_t *chip = snd_pcm_substream_chip(substream);
922 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
923 int err;
924
925 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
926 if (err < 0)
927 return err;
928 dma->buf_addr = substream->runtime->dma_addr;
929 dma->buf_bytes = params_buffer_bytes(hw_params);
930
931 err = atiixp_build_dma_packets(chip, dma, substream,
932 params_periods(hw_params),
933 params_period_bytes(hw_params));
934 if (err < 0)
935 return err;
936
937 if (dma->ac97_pcm_type >= 0) {
938 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
939 /* PCM is bound to AC97 codec(s)
940 * set up the AC97 codecs
941 */
942 if (dma->pcm_open_flag) {
943 snd_ac97_pcm_close(pcm);
944 dma->pcm_open_flag = 0;
945 }
946 err = snd_ac97_pcm_open(pcm, params_rate(hw_params),
947 params_channels(hw_params),
948 pcm->r[0].slots);
949 if (err >= 0)
950 dma->pcm_open_flag = 1;
951 }
952
953 return err;
954}
955
956static int snd_atiixp_pcm_hw_free(snd_pcm_substream_t * substream)
957{
958 atiixp_t *chip = snd_pcm_substream_chip(substream);
959 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
960
961 if (dma->pcm_open_flag) {
962 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
963 snd_ac97_pcm_close(pcm);
964 dma->pcm_open_flag = 0;
965 }
966 atiixp_clear_dma_packets(chip, dma, substream);
967 snd_pcm_lib_free_pages(substream);
968 return 0;
969}
970
971
972/*
973 * pcm hardware definition, identical for all DMA types
974 */
975static snd_pcm_hardware_t snd_atiixp_pcm_hw =
976{
977 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
978 SNDRV_PCM_INFO_BLOCK_TRANSFER |
41e4845c 979 SNDRV_PCM_INFO_PAUSE |
1da177e4
LT		 980 SNDRV_PCM_INFO_RESUME |
981 SNDRV_PCM_INFO_MMAP_VALID),
982 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
983 .rates = SNDRV_PCM_RATE_48000,
984 .rate_min = 48000,
985 .rate_max = 48000,
986 .channels_min = 2,
987 .channels_max = 2,
988 .buffer_bytes_max = 256 * 1024,
989 .period_bytes_min = 32,
990 .period_bytes_max = 128 * 1024,
991 .periods_min = 2,
992 .periods_max = ATI_MAX_DESCRIPTORS,
993};
994
995static int snd_atiixp_pcm_open(snd_pcm_substream_t *substream, atiixp_dma_t *dma, int pcm_type)
996{
997 atiixp_t *chip = snd_pcm_substream_chip(substream);
998 snd_pcm_runtime_t *runtime = substream->runtime;
999 int err;
1000
1001 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
1002
1003 if (dma->opened)
1004 return -EBUSY;
1005 dma->substream = substream;
1006 runtime->hw = snd_atiixp_pcm_hw;
1007 dma->ac97_pcm_type = pcm_type;
1008 if (pcm_type >= 0) {
1009 runtime->hw.rates = chip->pcms[pcm_type]->rates;
1010 snd_pcm_limit_hw_rates(runtime);
1011 } else {
1012 /* direct SPDIF */
1013 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;
1014 }
1015 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1016 return err;
1017 runtime->private_data = dma;
1018
1019 /* enable DMA bits */
1020 spin_lock_irq(&chip->reg_lock);
1021 dma->ops->enable_dma(chip, 1);
1022 spin_unlock_irq(&chip->reg_lock);
1023 dma->opened = 1;
1024
1025 return 0;
1026}
1027
1028static int snd_atiixp_pcm_close(snd_pcm_substream_t *substream, atiixp_dma_t *dma)
1029{
1030 atiixp_t *chip = snd_pcm_substream_chip(substream);
1031 /* disable DMA bits */
1032 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
1033 spin_lock_irq(&chip->reg_lock);
1034 dma->ops->enable_dma(chip, 0);
1035 spin_unlock_irq(&chip->reg_lock);
1036 dma->substream = NULL;
1037 dma->opened = 0;
1038 return 0;
1039}
1040
1041/*
1042 */
1043static int snd_atiixp_playback_open(snd_pcm_substream_t *substream)
1044{
1045 atiixp_t *chip = snd_pcm_substream_chip(substream);
1046 int err;
1047
1048 down(&chip->open_mutex);
1049 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
1050 up(&chip->open_mutex);
1051 if (err < 0)
1052 return err;
1053 substream->runtime->hw.channels_max = chip->max_channels;
1054 if (chip->max_channels > 2)
1055 /* channels must be even */
1056 snd_pcm_hw_constraint_step(substream->runtime, 0,
1057 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1058 return 0;
1059}
1060
1061static int snd_atiixp_playback_close(snd_pcm_substream_t *substream)
1062{
1063 atiixp_t *chip = snd_pcm_substream_chip(substream);
1064 int err;
1065 down(&chip->open_mutex);
1066 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1067 up(&chip->open_mutex);
1068 return err;
1069}
1070
1071static int snd_atiixp_capture_open(snd_pcm_substream_t *substream)
1072{
1073 atiixp_t *chip = snd_pcm_substream_chip(substream);
1074 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
1075}
1076
1077static int snd_atiixp_capture_close(snd_pcm_substream_t *substream)
1078{
1079 atiixp_t *chip = snd_pcm_substream_chip(substream);
1080 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
1081}
1082
1083static int snd_atiixp_spdif_open(snd_pcm_substream_t *substream)
1084{
1085 atiixp_t *chip = snd_pcm_substream_chip(substream);
1086 int err;
1087 down(&chip->open_mutex);
1088 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */
1089 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2);
1090 else
1091 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1);
1092 up(&chip->open_mutex);
1093 return err;
1094}
1095
1096static int snd_atiixp_spdif_close(snd_pcm_substream_t *substream)
1097{
1098 atiixp_t *chip = snd_pcm_substream_chip(substream);
1099 int err;
1100 down(&chip->open_mutex);
1101 if (chip->spdif_over_aclink)
1102 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1103 else
1104 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
1105 up(&chip->open_mutex);
1106 return err;
1107}
1108
1109/* AC97 playback */
1110static snd_pcm_ops_t snd_atiixp_playback_ops = {
1111 .open = snd_atiixp_playback_open,
1112 .close = snd_atiixp_playback_close,
1113 .ioctl = snd_pcm_lib_ioctl,
1114 .hw_params = snd_atiixp_pcm_hw_params,
1115 .hw_free = snd_atiixp_pcm_hw_free,
1116 .prepare = snd_atiixp_playback_prepare,
1117 .trigger = snd_atiixp_pcm_trigger,
1118 .pointer = snd_atiixp_pcm_pointer,
1119};
1120
1121/* AC97 capture */
1122static snd_pcm_ops_t snd_atiixp_capture_ops = {
1123 .open = snd_atiixp_capture_open,
1124 .close = snd_atiixp_capture_close,
1125 .ioctl = snd_pcm_lib_ioctl,
1126 .hw_params = snd_atiixp_pcm_hw_params,
1127 .hw_free = snd_atiixp_pcm_hw_free,
1128 .prepare = snd_atiixp_capture_prepare,
1129 .trigger = snd_atiixp_pcm_trigger,
1130 .pointer = snd_atiixp_pcm_pointer,
1131};
1132
1133/* SPDIF playback */
1134static snd_pcm_ops_t snd_atiixp_spdif_ops = {
1135 .open = snd_atiixp_spdif_open,
1136 .close = snd_atiixp_spdif_close,
1137 .ioctl = snd_pcm_lib_ioctl,
1138 .hw_params = snd_atiixp_pcm_hw_params,
1139 .hw_free = snd_atiixp_pcm_hw_free,
1140 .prepare = snd_atiixp_spdif_prepare,
1141 .trigger = snd_atiixp_pcm_trigger,
1142 .pointer = snd_atiixp_pcm_pointer,
1143};
1144
1145static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = {
1146 /* front PCM */
1147 {
1148 .exclusive = 1,
1149 .r = { {
1150 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1151 (1 << AC97_SLOT_PCM_RIGHT) |
1152 (1 << AC97_SLOT_PCM_CENTER) |
1153 (1 << AC97_SLOT_PCM_SLEFT) |
1154 (1 << AC97_SLOT_PCM_SRIGHT) |
1155 (1 << AC97_SLOT_LFE)
1156 }
1157 }
1158 },
1159 /* PCM IN #1 */
1160 {
1161 .stream = 1,
1162 .exclusive = 1,
1163 .r = { {
1164 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1165 (1 << AC97_SLOT_PCM_RIGHT)
1166 }
1167 }
1168 },
1169 /* S/PDIF OUT (optional) */
1170 {
1171 .exclusive = 1,
1172 .spdif = 1,
1173 .r = { {
1174 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) |
1175 (1 << AC97_SLOT_SPDIF_RIGHT2)
1176 }
1177 }
1178 },
1179};
1180
1181static atiixp_dma_ops_t snd_atiixp_playback_dma_ops = {
1182 .type = ATI_DMA_PLAYBACK,
1183 .llp_offset = ATI_REG_OUT_DMA_LINKPTR,
1184 .dt_cur = ATI_REG_OUT_DMA_DT_CUR,
1185 .enable_dma = atiixp_out_enable_dma,
1186 .enable_transfer = atiixp_out_enable_transfer,
1187 .flush_dma = atiixp_out_flush_dma,
1188};
1189
1190static atiixp_dma_ops_t snd_atiixp_capture_dma_ops = {
1191 .type = ATI_DMA_CAPTURE,
1192 .llp_offset = ATI_REG_IN_DMA_LINKPTR,
1193 .dt_cur = ATI_REG_IN_DMA_DT_CUR,
1194 .enable_dma = atiixp_in_enable_dma,
1195 .enable_transfer = atiixp_in_enable_transfer,
1196 .flush_dma = atiixp_in_flush_dma,
1197};
1198
1199static atiixp_dma_ops_t snd_atiixp_spdif_dma_ops = {
1200 .type = ATI_DMA_SPDIF,
1201 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR,
1202 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR,
1203 .enable_dma = atiixp_spdif_enable_dma,
1204 .enable_transfer = atiixp_spdif_enable_transfer,
1205 .flush_dma = atiixp_spdif_flush_dma,
1206};
1207
1208
1209static int __devinit snd_atiixp_pcm_new(atiixp_t *chip)
1210{
1211 snd_pcm_t *pcm;
1212 ac97_bus_t *pbus = chip->ac97_bus;
1213 int err, i, num_pcms;
1214
1215 /* initialize constants */
1216 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
1217 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
1218 if (! chip->spdif_over_aclink)
1219 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
1220
1221 /* assign AC97 pcm */
1222 if (chip->spdif_over_aclink)
1223 num_pcms = 3;
1224 else
1225 num_pcms = 2;
1226 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
1227 if (err < 0)
1228 return err;
1229 for (i = 0; i < num_pcms; i++)
1230 chip->pcms[i] = &pbus->pcms[i];
1231
1232 chip->max_channels = 2;
1233 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
1234 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE))
1235 chip->max_channels = 6;
1236 else
1237 chip->max_channels = 4;
1238 }
1239
1240 /* PCM #0: analog I/O */
1241 err = snd_pcm_new(chip->card, "ATI IXP AC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm);
1242 if (err < 0)
1243 return err;
1244 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
1245 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
1246 pcm->private_data = chip;
1247 strcpy(pcm->name, "ATI IXP AC97");
1248 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
1249
1250 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1251 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
1252
1253 /* no SPDIF support on codec? */
1254 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates)
1255 return 0;
1256
1257 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */
1258 if (chip->pcms[ATI_PCM_SPDIF])
1259 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000;
1260
1261 /* PCM #1: spdif playback */
1262 err = snd_pcm_new(chip->card, "ATI IXP IEC958", ATI_PCMDEV_DIGITAL, 1, 0, &pcm);
1263 if (err < 0)
1264 return err;
1265 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
1266 pcm->private_data = chip;
1267 if (chip->spdif_over_aclink)
1268 strcpy(pcm->name, "ATI IXP IEC958 (AC97)");
1269 else
1270 strcpy(pcm->name, "ATI IXP IEC958 (Direct)");
1271 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm;
1272
1273 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1274 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
1275
1276 /* pre-select AC97 SPDIF slots 10/11 */
1277 for (i = 0; i < NUM_ATI_CODECS; i++) {
1278 if (chip->ac97[i])
1279 snd_ac97_update_bits(chip->ac97[i], AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
1280 }
1281
1282 return 0;
1283}
1284
1285
1286
1287/*
1288 * interrupt handler
1289 */
1290static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1291{
1292 atiixp_t *chip = dev_id;
1293 unsigned int status;
1294
1295 status = atiixp_read(chip, ISR);
1296
1297 if (! status)
1298 return IRQ_NONE;
1299
1300 /* process audio DMA */
1301 if (status & ATI_REG_ISR_OUT_XRUN)
1302 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1303 else if (status & ATI_REG_ISR_OUT_STATUS)
1304 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1305 if (status & ATI_REG_ISR_IN_XRUN)
1306 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1307 else if (status & ATI_REG_ISR_IN_STATUS)
1308 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1309 if (! chip->spdif_over_aclink) {
1310 if (status & ATI_REG_ISR_SPDF_XRUN)
1311 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1312 else if (status & ATI_REG_ISR_SPDF_STATUS)
1313 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1314 }
1315
1316 /* for codec detection */
1317 if (status & CODEC_CHECK_BITS) {
1318 unsigned int detected;
1319 detected = status & CODEC_CHECK_BITS;
1320 spin_lock(&chip->reg_lock);
1321 chip->codec_not_ready_bits |= detected;
1322 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1323 spin_unlock(&chip->reg_lock);
1324 }
1325
1326 /* ack */
1327 atiixp_write(chip, ISR, status);
1328
1329 return IRQ_HANDLED;
1330}
1331
1332
1333/*
1334 * ac97 mixer section
1335 */
1336
1337static struct ac97_quirk ac97_quirks[] __devinitdata = {
1338 {
69ad07cf
JK		 1339 .subvendor = 0x103c,
1340 .subdevice = 0x006b,
1da177e4
LT		 1341 .name = "HP Pavilion ZV5030US",
1342 .type = AC97_TUNE_MUTE_LED
1343 },
1344 { } /* terminator */
1345};
1346
1347static int __devinit snd_atiixp_mixer_new(atiixp_t *chip, int clock, const char *quirk_override)
1348{
1349 ac97_bus_t *pbus;
1350 ac97_template_t ac97;
1351 int i, err;
1352 int codec_count;
1353 static ac97_bus_ops_t ops = {
1354 .write = snd_atiixp_ac97_write,
1355 .read = snd_atiixp_ac97_read,
1356 };
1357 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1358 ATI_REG_ISR_CODEC0_NOT_READY,
1359 ATI_REG_ISR_CODEC1_NOT_READY,
1360 ATI_REG_ISR_CODEC2_NOT_READY,
1361 };
1362
1363 if (snd_atiixp_codec_detect(chip) < 0)
1364 return -ENXIO;
1365
1366 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1367 return err;
1368 pbus->clock = clock;
1da177e4
LT		 1369 chip->ac97_bus = pbus;
1370
1371 codec_count = 0;
1372 for (i = 0; i < NUM_ATI_CODECS; i++) {
1373 if (chip->codec_not_ready_bits & codec_skip[i])
1374 continue;
1375 memset(&ac97, 0, sizeof(ac97));
1376 ac97.private_data = chip;
1377 ac97.pci = chip->pci;
1378 ac97.num = i;
1379 ac97.scaps = AC97_SCAP_SKIP_MODEM;
1380 if (! chip->spdif_over_aclink)
1381 ac97.scaps |= AC97_SCAP_NO_SPDIF;
1382 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1383 chip->ac97[i] = NULL; /* to be sure */
1384 snd_printdd("atiixp: codec %d not available for audio\n", i);
1385 continue;
1386 }
1387 codec_count++;
1388 }
1389
1390 if (! codec_count) {
1391 snd_printk(KERN_ERR "atiixp: no codec available\n");
1392 return -ENODEV;
1393 }
1394
1395 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override);
1396
1397 return 0;
1398}
1399
1400
1401#ifdef CONFIG_PM
1402/*
1403 * power management
1404 */
1405static int snd_atiixp_suspend(snd_card_t *card, pm_message_t state)
1406{
1407 atiixp_t *chip = card->pm_private_data;
1408 int i;
1409
1410 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1411 if (chip->pcmdevs[i]) {
1412 atiixp_dma_t *dma = &chip->dmas[i];
1413 if (dma->substream && dma->running)
1414 dma->saved_curptr = readl(chip->remap_addr + dma->ops->dt_cur);
1415 snd_pcm_suspend_all(chip->pcmdevs[i]);
1416 }
1417 for (i = 0; i < NUM_ATI_CODECS; i++)
1418 if (chip->ac97[i])
1419 snd_ac97_suspend(chip->ac97[i]);
1420 snd_atiixp_aclink_down(chip);
1421 snd_atiixp_chip_stop(chip);
1422
829ca9a3 1423 pci_set_power_state(chip->pci, PCI_D3hot);
1da177e4
LT		 1424 pci_disable_device(chip->pci);
1425 return 0;
1426}
1427
1428static int snd_atiixp_resume(snd_card_t *card)
1429{
1430 atiixp_t *chip = card->pm_private_data;
1431 int i;
1432
1433 pci_enable_device(chip->pci);
829ca9a3 1434 pci_set_power_state(chip->pci, PCI_D0);
1da177e4
LT		 1435 pci_set_master(chip->pci);
1436
1437 snd_atiixp_aclink_reset(chip);
1438 snd_atiixp_chip_start(chip);
1439
1440 for (i = 0; i < NUM_ATI_CODECS; i++)
1441 if (chip->ac97[i])
1442 snd_ac97_resume(chip->ac97[i]);
1443
1444 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1445 if (chip->pcmdevs[i]) {
1446 atiixp_dma_t *dma = &chip->dmas[i];
41e4845c 1447 if (dma->substream && dma->suspended) {
1da177e4 1448 dma->ops->enable_dma(chip, 1);
8e3d759d 1449 dma->substream->ops->prepare(dma->substream);
1da177e4
LT		 1450 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
1451 chip->remap_addr + dma->ops->llp_offset);
1452 writel(dma->saved_curptr, chip->remap_addr + dma->ops->dt_cur);
1453 }
1454 }
1455
1456 return 0;
1457}
1458#endif /* CONFIG_PM */
1459
1460
1461/*
1462 * proc interface for register dump
1463 */
1464
1465static void snd_atiixp_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1466{
1467 atiixp_t *chip = entry->private_data;
1468 int i;
1469
1470 for (i = 0; i < 256; i += 4)
1471 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1472}
1473
1474static void __devinit snd_atiixp_proc_init(atiixp_t *chip)
1475{
1476 snd_info_entry_t *entry;
1477
1478 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
1479 snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read);
1480}
1481
1482
1483
1484/*
1485 * destructor
1486 */
1487
1488static int snd_atiixp_free(atiixp_t *chip)
1489{
1490 if (chip->irq < 0)
1491 goto __hw_end;
1492 snd_atiixp_chip_stop(chip);
1493 synchronize_irq(chip->irq);
1494 __hw_end:
1495 if (chip->irq >= 0)
1496 free_irq(chip->irq, (void *)chip);
1497 if (chip->remap_addr)
1498 iounmap(chip->remap_addr);
1499 pci_release_regions(chip->pci);
1500 pci_disable_device(chip->pci);
1501 kfree(chip);
1502 return 0;
1503}
1504
1505static int snd_atiixp_dev_free(snd_device_t *device)
1506{
1507 atiixp_t *chip = device->device_data;
1508 return snd_atiixp_free(chip);
1509}
1510
1511/*
1512 * constructor for chip instance
1513 */
1514static int __devinit snd_atiixp_create(snd_card_t *card,
1515 struct pci_dev *pci,
1516 atiixp_t **r_chip)
1517{
1518 static snd_device_ops_t ops = {
1519 .dev_free = snd_atiixp_dev_free,
1520 };
1521 atiixp_t *chip;
1522 int err;
1523
1524 if ((err = pci_enable_device(pci)) < 0)
1525 return err;
1526
e560d8d8 1527 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 1528 if (chip == NULL) {
1529 pci_disable_device(pci);
1530 return -ENOMEM;
1531 }
1532
1533 spin_lock_init(&chip->reg_lock);
1534 init_MUTEX(&chip->open_mutex);
1535 chip->card = card;
1536 chip->pci = pci;
1537 chip->irq = -1;
1538 if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) {
1539 pci_disable_device(pci);
1540 kfree(chip);
1541 return err;
1542 }
1543 chip->addr = pci_resource_start(pci, 0);
1544 chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0));
1545 if (chip->remap_addr == NULL) {
1546 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1547 snd_atiixp_free(chip);
1548 return -EIO;
1549 }
1550
1551 if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1552 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1553 snd_atiixp_free(chip);
1554 return -EBUSY;
1555 }
1556 chip->irq = pci->irq;
1557 pci_set_master(pci);
1558 synchronize_irq(chip->irq);
1559
1560 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1561 snd_atiixp_free(chip);
1562 return err;
1563 }
1564
1565 snd_card_set_dev(card, &pci->dev);
1566
1567 *r_chip = chip;
1568 return 0;
1569}
1570
1571
1572static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1573 const struct pci_device_id *pci_id)
1574{
1da177e4
LT		 1575 snd_card_t *card;
1576 atiixp_t *chip;
1577 unsigned char revision;
1578 int err;
1579
b7fe4622 1580 card = snd_card_new(index, id, THIS_MODULE, 0);
1da177e4
LT		 1581 if (card == NULL)
1582 return -ENOMEM;
1583
1584 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
1585
b7fe4622 1586 strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA");
1da177e4
LT		 1587 strcpy(card->shortname, "ATI IXP");
1588 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1589 goto __error;
1590
1591 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1592 goto __error;
1593
b7fe4622 1594 chip->spdif_over_aclink = spdif_aclink;
1da177e4 1595
b7fe4622 1596 if ((err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk)) < 0)
1da177e4
LT		 1597 goto __error;
1598
1599 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1600 goto __error;
1601
1602 snd_atiixp_proc_init(chip);
1603
1604 snd_atiixp_chip_start(chip);
1605
1606 snprintf(card->longname, sizeof(card->longname),
1607 "%s rev %x with %s at %#lx, irq %i", card->shortname, revision,
1608 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?",
1609 chip->addr, chip->irq);
1610
1611 snd_card_set_pm_callback(card, snd_atiixp_suspend, snd_atiixp_resume, chip);
1612
1613 if ((err = snd_card_register(card)) < 0)
1614 goto __error;
1615
1616 pci_set_drvdata(pci, card);
1da177e4
LT		 1617 return 0;
1618
1619 __error:
1620 snd_card_free(card);
1621 return err;
1622}
1623
1624static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1625{
1626 snd_card_free(pci_get_drvdata(pci));
1627 pci_set_drvdata(pci, NULL);
1628}
1629
1630static struct pci_driver driver = {
1631 .name = "ATI IXP AC97 controller",
1632 .id_table = snd_atiixp_ids,
1633 .probe = snd_atiixp_probe,
1634 .remove = __devexit_p(snd_atiixp_remove),
1635 SND_PCI_PM_CALLBACKS
1636};
1637
1638
1639static int __init alsa_card_atiixp_init(void)
1640{
01d25d46 1641 return pci_register_driver(&driver);
1da177e4
LT		 1642}
1643
1644static void __exit alsa_card_atiixp_exit(void)
1645{
1646 pci_unregister_driver(&driver);
1647}
1648
1649module_init(alsa_card_atiixp_init)
1650module_exit(alsa_card_atiixp_exit)
Linux 6.x block layer and io_uring tree(s)