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ALSA: sscape: add missing include of linux/io.h
[linux-2.6-block.git] / sound / pci / ad1889.c
CommitLineData
12bb5b78
CL		 1/* Analog Devices 1889 audio driver
2 *
3 * This is a driver for the AD1889 PCI audio chipset found
4 * on the HP PA-RISC [BCJ]-xxx0 workstations.
5 *
6 * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org>
7 * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org>
8 * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 * TODO:
24 * Do we need to take care of CCS register?
25 * Maybe we could use finer grained locking (separate locks for pb/cap)?
26 * Wishlist:
27 * Control Interface (mixer) support
28 * Better AC97 support (VSR...)?
29 * PM support
30 * MIDI support
31 * Game Port support
25985edc 32 * SG DMA support (this will need *a lot* of work)
12bb5b78
CL		 33 */
34
35#include <linux/init.h>
36#include <linux/pci.h>
9d2f928d 37#include <linux/dma-mapping.h>
12bb5b78
CL		 38#include <linux/slab.h>
39#include <linux/interrupt.h>
40#include <linux/compiler.h>
41#include <linux/delay.h>
da155d5b 42#include <linux/module.h>
12bb5b78 43
12bb5b78
CL		 44#include <sound/core.h>
45#include <sound/pcm.h>
46#include <sound/initval.h>
47#include <sound/ac97_codec.h>
48
49#include <asm/io.h>
50
51#include "ad1889.h"
52#include "ac97/ac97_id.h"
53
c6f43290 54#define AD1889_DRVVER "Version: 1.7"
12bb5b78
CL		 55
56MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>");
57MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
58MODULE_LICENSE("GPL");
59MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}");
60
61static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
62module_param_array(index, int, NULL, 0444);
63MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard.");
64
65static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
66module_param_array(id, charp, NULL, 0444);
67MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard.");
68
a67ff6a5 69static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
12bb5b78
CL		 70module_param_array(enable, bool, NULL, 0444);
71MODULE_PARM_DESC(enable, "Enable AD1889 soundcard.");
72
73static char *ac97_quirk[SNDRV_CARDS];
74module_param_array(ac97_quirk, charp, NULL, 0444);
75MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
76
77#define DEVNAME "ad1889"
78#define PFX DEVNAME ": "
79
12bb5b78
CL		 80/* keep track of some hw registers */
81struct ad1889_register_state {
82 u16 reg; /* reg setup */
83 u32 addr; /* dma base address */
84 unsigned long size; /* DMA buffer size */
85};
86
87struct snd_ad1889 {
02c2de69 88 struct snd_card *card;
12bb5b78
CL		 89 struct pci_dev *pci;
90
91 int irq;
92 unsigned long bar;
93 void __iomem *iobase;
94
02c2de69
TI		 95 struct snd_ac97 *ac97;
96 struct snd_ac97_bus *ac97_bus;
97 struct snd_pcm *pcm;
98 struct snd_info_entry *proc;
12bb5b78 99
02c2de69
TI		 100 struct snd_pcm_substream *psubs;
101 struct snd_pcm_substream *csubs;
12bb5b78
CL		 102
103 /* playback register state */
104 struct ad1889_register_state wave;
105 struct ad1889_register_state ramc;
106
107 spinlock_t lock;
108};
109
110static inline u16
111ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
112{
113 return readw(chip->iobase + reg);
114}
115
116static inline void
117ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
118{
119 writew(val, chip->iobase + reg);
120}
121
122static inline u32
123ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
124{
125 return readl(chip->iobase + reg);
126}
127
128static inline void
129ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
130{
131 writel(val, chip->iobase + reg);
132}
133
134static inline void
135ad1889_unmute(struct snd_ad1889 *chip)
136{
137 u16 st;
138 st = ad1889_readw(chip, AD_DS_WADA) &
139 ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM);
140 ad1889_writew(chip, AD_DS_WADA, st);
141 ad1889_readw(chip, AD_DS_WADA);
142}
143
144static inline void
145ad1889_mute(struct snd_ad1889 *chip)
146{
147 u16 st;
148 st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM;
149 ad1889_writew(chip, AD_DS_WADA, st);
150 ad1889_readw(chip, AD_DS_WADA);
151}
152
153static inline void
154ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address)
155{
156 ad1889_writel(chip, AD_DMA_ADCBA, address);
157 ad1889_writel(chip, AD_DMA_ADCCA, address);
158}
159
160static inline void
161ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count)
162{
163 ad1889_writel(chip, AD_DMA_ADCBC, count);
164 ad1889_writel(chip, AD_DMA_ADCCC, count);
165}
166
167static inline void
168ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count)
169{
170 ad1889_writel(chip, AD_DMA_ADCIB, count);
171 ad1889_writel(chip, AD_DMA_ADCIC, count);
172}
173
174static inline void
175ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address)
176{
177 ad1889_writel(chip, AD_DMA_WAVBA, address);
178 ad1889_writel(chip, AD_DMA_WAVCA, address);
179}
180
181static inline void
182ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count)
183{
184 ad1889_writel(chip, AD_DMA_WAVBC, count);
185 ad1889_writel(chip, AD_DMA_WAVCC, count);
186}
187
188static inline void
189ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count)
190{
191 ad1889_writel(chip, AD_DMA_WAVIB, count);
192 ad1889_writel(chip, AD_DMA_WAVIC, count);
193}
194
195static void
196ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel)
197{
198 u16 reg;
199
200 if (channel & AD_CHAN_WAV) {
201 /* Disable wave channel */
202 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN;
203 ad1889_writew(chip, AD_DS_WSMC, reg);
204 chip->wave.reg = reg;
205
206 /* disable IRQs */
207 reg = ad1889_readw(chip, AD_DMA_WAV);
208 reg &= AD_DMA_IM_DIS;
209 reg &= ~AD_DMA_LOOP;
210 ad1889_writew(chip, AD_DMA_WAV, reg);
211
212 /* clear IRQ and address counters and pointers */
213 ad1889_load_wave_buffer_address(chip, 0x0);
214 ad1889_load_wave_buffer_count(chip, 0x0);
215 ad1889_load_wave_interrupt_count(chip, 0x0);
216
217 /* flush */
218 ad1889_readw(chip, AD_DMA_WAV);
219 }
220
221 if (channel & AD_CHAN_ADC) {
222 /* Disable ADC channel */
223 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN;
224 ad1889_writew(chip, AD_DS_RAMC, reg);
225 chip->ramc.reg = reg;
226
227 reg = ad1889_readw(chip, AD_DMA_ADC);
228 reg &= AD_DMA_IM_DIS;
229 reg &= ~AD_DMA_LOOP;
230 ad1889_writew(chip, AD_DMA_ADC, reg);
231
232 ad1889_load_adc_buffer_address(chip, 0x0);
233 ad1889_load_adc_buffer_count(chip, 0x0);
234 ad1889_load_adc_interrupt_count(chip, 0x0);
235
236 /* flush */
237 ad1889_readw(chip, AD_DMA_ADC);
238 }
239}
240
f40b6890 241static u16
02c2de69 242snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
12bb5b78
CL		 243{
244 struct snd_ad1889 *chip = ac97->private_data;
245 return ad1889_readw(chip, AD_AC97_BASE + reg);
246}
247
f40b6890 248static void
02c2de69 249snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
12bb5b78
CL		 250{
251 struct snd_ad1889 *chip = ac97->private_data;
252 ad1889_writew(chip, AD_AC97_BASE + reg, val);
253}
254
255static int
256snd_ad1889_ac97_ready(struct snd_ad1889 *chip)
257{
258 int retry = 400; /* average needs 352 msec */
259
260 while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY)
261 && --retry)
262 mdelay(1);
263 if (!retry) {
29633004
TI		 264 dev_err(chip->card->dev, "[%s] Link is not ready.\n",
265 __func__);
12bb5b78
CL		 266 return -EIO;
267 }
29633004 268 dev_dbg(chip->card->dev, "[%s] ready after %d ms\n", __func__, 400 - retry);
12bb5b78
CL		 269
270 return 0;
271}
272
273static int
02c2de69
TI		 274snd_ad1889_hw_params(struct snd_pcm_substream *substream,
275 struct snd_pcm_hw_params *hw_params)
12bb5b78
CL		 276{
277 return snd_pcm_lib_malloc_pages(substream,
278 params_buffer_bytes(hw_params));
279}
280
281static int
02c2de69 282snd_ad1889_hw_free(struct snd_pcm_substream *substream)
12bb5b78
CL		 283{
284 return snd_pcm_lib_free_pages(substream);
285}
286
02c2de69 287static struct snd_pcm_hardware snd_ad1889_playback_hw = {
12bb5b78
CL		 288 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
289 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
290 .formats = SNDRV_PCM_FMTBIT_S16_LE,
291 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
292 .rate_min = 8000, /* docs say 7000, but we're lazy */
293 .rate_max = 48000,
294 .channels_min = 1,
295 .channels_max = 2,
296 .buffer_bytes_max = BUFFER_BYTES_MAX,
297 .period_bytes_min = PERIOD_BYTES_MIN,
298 .period_bytes_max = PERIOD_BYTES_MAX,
299 .periods_min = PERIODS_MIN,
300 .periods_max = PERIODS_MAX,
301 /*.fifo_size = 0,*/
302};
303
02c2de69 304static struct snd_pcm_hardware snd_ad1889_capture_hw = {
12bb5b78
CL		 305 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
306 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
307 .formats = SNDRV_PCM_FMTBIT_S16_LE,
308 .rates = SNDRV_PCM_RATE_48000,
309 .rate_min = 48000, /* docs say we could to VSR, but we're lazy */
310 .rate_max = 48000,
311 .channels_min = 1,
312 .channels_max = 2,
313 .buffer_bytes_max = BUFFER_BYTES_MAX,
314 .period_bytes_min = PERIOD_BYTES_MIN,
315 .period_bytes_max = PERIOD_BYTES_MAX,
316 .periods_min = PERIODS_MIN,
317 .periods_max = PERIODS_MAX,
318 /*.fifo_size = 0,*/
319};
320
321static int
02c2de69 322snd_ad1889_playback_open(struct snd_pcm_substream *ss)
12bb5b78
CL		 323{
324 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
02c2de69 325 struct snd_pcm_runtime *rt = ss->runtime;
12bb5b78
CL		 326
327 chip->psubs = ss;
328 rt->hw = snd_ad1889_playback_hw;
329
330 return 0;
331}
332
333static int
02c2de69 334snd_ad1889_capture_open(struct snd_pcm_substream *ss)
12bb5b78
CL		 335{
336 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
02c2de69 337 struct snd_pcm_runtime *rt = ss->runtime;
12bb5b78
CL		 338
339 chip->csubs = ss;
340 rt->hw = snd_ad1889_capture_hw;
341
342 return 0;
343}
344
345static int
02c2de69 346snd_ad1889_playback_close(struct snd_pcm_substream *ss)
12bb5b78
CL		 347{
348 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
349 chip->psubs = NULL;
350 return 0;
351}
352
353static int
02c2de69 354snd_ad1889_capture_close(struct snd_pcm_substream *ss)
12bb5b78
CL		 355{
356 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
357 chip->csubs = NULL;
358 return 0;
359}
360
361static int
02c2de69 362snd_ad1889_playback_prepare(struct snd_pcm_substream *ss)
12bb5b78
CL		 363{
364 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
02c2de69 365 struct snd_pcm_runtime *rt = ss->runtime;
12bb5b78
CL		 366 unsigned int size = snd_pcm_lib_buffer_bytes(ss);
367 unsigned int count = snd_pcm_lib_period_bytes(ss);
368 u16 reg;
369
370 ad1889_channel_reset(chip, AD_CHAN_WAV);
371
372 reg = ad1889_readw(chip, AD_DS_WSMC);
373
374 /* Mask out 16-bit / Stereo */
375 reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST);
376
377 if (snd_pcm_format_width(rt->format) == 16)
378 reg |= AD_DS_WSMC_WA16;
379
380 if (rt->channels > 1)
381 reg |= AD_DS_WSMC_WAST;
382
383 /* let's make sure we don't clobber ourselves */
384 spin_lock_irq(&chip->lock);
385
386 chip->wave.size = size;
387 chip->wave.reg = reg;
388 chip->wave.addr = rt->dma_addr;
389
390 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg);
391
392 /* Set sample rates on the codec */
393 ad1889_writew(chip, AD_DS_WAS, rt->rate);
394
395 /* Set up DMA */
396 ad1889_load_wave_buffer_address(chip, chip->wave.addr);
397 ad1889_load_wave_buffer_count(chip, size);
398 ad1889_load_wave_interrupt_count(chip, count);
399
400 /* writes flush */
401 ad1889_readw(chip, AD_DS_WSMC);
402
403 spin_unlock_irq(&chip->lock);
404
29633004
TI		 405 dev_dbg(chip->card->dev,
406 "prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
407 chip->wave.addr, count, size, reg, rt->rate);
12bb5b78
CL		 408 return 0;
409}
410
411static int
02c2de69 412snd_ad1889_capture_prepare(struct snd_pcm_substream *ss)
12bb5b78
CL		 413{
414 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
02c2de69 415 struct snd_pcm_runtime *rt = ss->runtime;
12bb5b78
CL		 416 unsigned int size = snd_pcm_lib_buffer_bytes(ss);
417 unsigned int count = snd_pcm_lib_period_bytes(ss);
418 u16 reg;
419
420 ad1889_channel_reset(chip, AD_CHAN_ADC);
421
422 reg = ad1889_readw(chip, AD_DS_RAMC);
423
424 /* Mask out 16-bit / Stereo */
425 reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST);
426
427 if (snd_pcm_format_width(rt->format) == 16)
428 reg |= AD_DS_RAMC_AD16;
429
430 if (rt->channels > 1)
431 reg |= AD_DS_RAMC_ADST;
432
433 /* let's make sure we don't clobber ourselves */
434 spin_lock_irq(&chip->lock);
435
436 chip->ramc.size = size;
437 chip->ramc.reg = reg;
438 chip->ramc.addr = rt->dma_addr;
439
440 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg);
441
442 /* Set up DMA */
443 ad1889_load_adc_buffer_address(chip, chip->ramc.addr);
444 ad1889_load_adc_buffer_count(chip, size);
445 ad1889_load_adc_interrupt_count(chip, count);
446
447 /* writes flush */
448 ad1889_readw(chip, AD_DS_RAMC);
449
450 spin_unlock_irq(&chip->lock);
451
29633004
TI		 452 dev_dbg(chip->card->dev,
453 "prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
454 chip->ramc.addr, count, size, reg, rt->rate);
12bb5b78
CL		 455 return 0;
456}
457
458/* this is called in atomic context with IRQ disabled.
459 Must be as fast as possible and not sleep.
460 DMA should be *triggered* by this call.
461 The WSMC "WAEN" bit triggers DMA Wave On/Off */
462static int
02c2de69 463snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd)
12bb5b78
CL		 464{
465 u16 wsmc;
466 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
467
468 wsmc = ad1889_readw(chip, AD_DS_WSMC);
469
470 switch (cmd) {
471 case SNDRV_PCM_TRIGGER_START:
472 /* enable DMA loop & interrupts */
473 ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT);
474 wsmc |= AD_DS_WSMC_WAEN;
475 /* 1 to clear CHSS bit */
476 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS);
477 ad1889_unmute(chip);
478 break;
479 case SNDRV_PCM_TRIGGER_STOP:
480 ad1889_mute(chip);
481 wsmc &= ~AD_DS_WSMC_WAEN;
482 break;
483 default:
484 snd_BUG();
485 return -EINVAL;
486 }
487
488 chip->wave.reg = wsmc;
489 ad1889_writew(chip, AD_DS_WSMC, wsmc);
490 ad1889_readw(chip, AD_DS_WSMC); /* flush */
491
492 /* reset the chip when STOP - will disable IRQs */
493 if (cmd == SNDRV_PCM_TRIGGER_STOP)
494 ad1889_channel_reset(chip, AD_CHAN_WAV);
495
496 return 0;
497}
498
499/* this is called in atomic context with IRQ disabled.
500 Must be as fast as possible and not sleep.
501 DMA should be *triggered* by this call.
502 The RAMC "ADEN" bit triggers DMA ADC On/Off */
503static int
02c2de69 504snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd)
12bb5b78
CL		 505{
506 u16 ramc;
507 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
508
509 ramc = ad1889_readw(chip, AD_DS_RAMC);
510
511 switch (cmd) {
512 case SNDRV_PCM_TRIGGER_START:
513 /* enable DMA loop & interrupts */
514 ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT);
515 ramc |= AD_DS_RAMC_ADEN;
516 /* 1 to clear CHSS bit */
517 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS);
518 break;
519 case SNDRV_PCM_TRIGGER_STOP:
520 ramc &= ~AD_DS_RAMC_ADEN;
521 break;
522 default:
523 return -EINVAL;
524 }
525
526 chip->ramc.reg = ramc;
527 ad1889_writew(chip, AD_DS_RAMC, ramc);
528 ad1889_readw(chip, AD_DS_RAMC); /* flush */
529
530 /* reset the chip when STOP - will disable IRQs */
531 if (cmd == SNDRV_PCM_TRIGGER_STOP)
532 ad1889_channel_reset(chip, AD_CHAN_ADC);
533
534 return 0;
535}
536
537/* Called in atomic context with IRQ disabled */
538static snd_pcm_uframes_t
02c2de69 539snd_ad1889_playback_pointer(struct snd_pcm_substream *ss)
12bb5b78
CL		 540{
541 size_t ptr = 0;
542 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
543
544 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN)))
545 return 0;
546
547 ptr = ad1889_readl(chip, AD_DMA_WAVCA);
548 ptr -= chip->wave.addr;
549
da3cec35
TI		 550 if (snd_BUG_ON(ptr >= chip->wave.size))
551 return 0;
12bb5b78
CL		 552
553 return bytes_to_frames(ss->runtime, ptr);
554}
555
556/* Called in atomic context with IRQ disabled */
557static snd_pcm_uframes_t
02c2de69 558snd_ad1889_capture_pointer(struct snd_pcm_substream *ss)
12bb5b78
CL		 559{
560 size_t ptr = 0;
561 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
562
563 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN)))
564 return 0;
565
566 ptr = ad1889_readl(chip, AD_DMA_ADCCA);
567 ptr -= chip->ramc.addr;
568
da3cec35
TI		 569 if (snd_BUG_ON(ptr >= chip->ramc.size))
570 return 0;
12bb5b78
CL		 571
572 return bytes_to_frames(ss->runtime, ptr);
573}
574
02c2de69 575static struct snd_pcm_ops snd_ad1889_playback_ops = {
12bb5b78
CL		 576 .open = snd_ad1889_playback_open,
577 .close = snd_ad1889_playback_close,
578 .ioctl = snd_pcm_lib_ioctl,
579 .hw_params = snd_ad1889_hw_params,
580 .hw_free = snd_ad1889_hw_free,
581 .prepare = snd_ad1889_playback_prepare,
582 .trigger = snd_ad1889_playback_trigger,
583 .pointer = snd_ad1889_playback_pointer,
584};
585
02c2de69 586static struct snd_pcm_ops snd_ad1889_capture_ops = {
12bb5b78
CL		 587 .open = snd_ad1889_capture_open,
588 .close = snd_ad1889_capture_close,
589 .ioctl = snd_pcm_lib_ioctl,
590 .hw_params = snd_ad1889_hw_params,
591 .hw_free = snd_ad1889_hw_free,
592 .prepare = snd_ad1889_capture_prepare,
593 .trigger = snd_ad1889_capture_trigger,
594 .pointer = snd_ad1889_capture_pointer,
595};
596
597static irqreturn_t
7d12e780 598snd_ad1889_interrupt(int irq, void *dev_id)
12bb5b78
CL		 599{
600 unsigned long st;
601 struct snd_ad1889 *chip = dev_id;
602
603 st = ad1889_readl(chip, AD_DMA_DISR);
604
605 /* clear ISR */
606 ad1889_writel(chip, AD_DMA_DISR, st);
607
608 st &= AD_INTR_MASK;
609
610 if (unlikely(!st))
611 return IRQ_NONE;
612
613 if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI))
29633004
TI		 614 dev_dbg(chip->card->dev,
615 "Unexpected master or target abort interrupt!\n");
12bb5b78
CL		 616
617 if ((st & AD_DMA_DISR_WAVI) && chip->psubs)
618 snd_pcm_period_elapsed(chip->psubs);
619 if ((st & AD_DMA_DISR_ADCI) && chip->csubs)
620 snd_pcm_period_elapsed(chip->csubs);
621
622 return IRQ_HANDLED;
623}
624
2f5c1302 625static int
a0880094 626snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device)
12bb5b78
CL		 627{
628 int err;
02c2de69 629 struct snd_pcm *pcm;
12bb5b78 630
12bb5b78
CL		 631 err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm);
632 if (err < 0)
633 return err;
634
635 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
636 &snd_ad1889_playback_ops);
637 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
638 &snd_ad1889_capture_ops);
639
640 pcm->private_data = chip;
12bb5b78
CL		 641 pcm->info_flags = 0;
642 strcpy(pcm->name, chip->card->shortname);
643
644 chip->pcm = pcm;
645 chip->psubs = NULL;
646 chip->csubs = NULL;
647
648 err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
649 snd_dma_pci_data(chip->pci),
650 BUFFER_BYTES_MAX / 2,
651 BUFFER_BYTES_MAX);
652
653 if (err < 0) {
29633004 654 dev_err(chip->card->dev, "buffer allocation error: %d\n", err);
12bb5b78
CL		 655 return err;
656 }
657
12bb5b78
CL		 658 return 0;
659}
660
661static void
02c2de69 662snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
12bb5b78
CL		 663{
664 struct snd_ad1889 *chip = entry->private_data;
665 u16 reg;
666 int tmp;
667
668 reg = ad1889_readw(chip, AD_DS_WSMC);
669 snd_iprintf(buffer, "Wave output: %s\n",
670 (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled");
671 snd_iprintf(buffer, "Wave Channels: %s\n",
672 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
673 snd_iprintf(buffer, "Wave Quality: %d-bit linear\n",
674 (reg & AD_DS_WSMC_WA16) ? 16 : 8);
675
676 /* WARQ is at offset 12 */
677 tmp = (reg & AD_DS_WSMC_WARQ) ?
ccbec5ea 678 ((((reg & AD_DS_WSMC_WARQ) >> 12) & 0x01) ? 12 : 18) : 4;
12bb5b78
CL		 679 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
680
681 snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp,
682 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
683
684
685 snd_iprintf(buffer, "Synthesis output: %s\n",
686 reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled");
687
688 /* SYRQ is at offset 4 */
689 tmp = (reg & AD_DS_WSMC_SYRQ) ?
ccbec5ea 690 ((((reg & AD_DS_WSMC_SYRQ) >> 4) & 0x01) ? 12 : 18) : 4;
12bb5b78
CL		 691 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
692
693 snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp,
694 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
695
696 reg = ad1889_readw(chip, AD_DS_RAMC);
697 snd_iprintf(buffer, "ADC input: %s\n",
698 (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled");
699 snd_iprintf(buffer, "ADC Channels: %s\n",
700 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
701 snd_iprintf(buffer, "ADC Quality: %d-bit linear\n",
702 (reg & AD_DS_RAMC_AD16) ? 16 : 8);
703
704 /* ACRQ is at offset 4 */
705 tmp = (reg & AD_DS_RAMC_ACRQ) ?
ccbec5ea 706 ((((reg & AD_DS_RAMC_ACRQ) >> 4) & 0x01) ? 12 : 18) : 4;
12bb5b78
CL		 707 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
708
709 snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp,
710 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
711
712 snd_iprintf(buffer, "Resampler input: %s\n",
713 reg & AD_DS_RAMC_REEN ? "enabled" : "disabled");
714
715 /* RERQ is at offset 12 */
716 tmp = (reg & AD_DS_RAMC_RERQ) ?
ccbec5ea 717 ((((reg & AD_DS_RAMC_RERQ) >> 12) & 0x01) ? 12 : 18) : 4;
12bb5b78
CL		 718 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
719
720 snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp,
721 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
722
723
724 /* doc says LSB represents -1.5dB, but the max value (-94.5dB)
725 suggests that LSB is -3dB, which is more coherent with the logarithmic
726 nature of the dB scale */
727 reg = ad1889_readw(chip, AD_DS_WADA);
728 snd_iprintf(buffer, "Left: %s, -%d dB\n",
729 (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute",
730 ((reg & AD_DS_WADA_LWAA) >> 8) * 3);
731 reg = ad1889_readw(chip, AD_DS_WADA);
732 snd_iprintf(buffer, "Right: %s, -%d dB\n",
733 (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute",
9bd0f5c0 734 (reg & AD_DS_WADA_RWAA) * 3);
12bb5b78
CL		 735
736 reg = ad1889_readw(chip, AD_DS_WAS);
737 snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg);
738 reg = ad1889_readw(chip, AD_DS_RES);
739 snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg);
740}
741
2f5c1302 742static void
12bb5b78
CL		 743snd_ad1889_proc_init(struct snd_ad1889 *chip)
744{
02c2de69 745 struct snd_info_entry *entry;
12bb5b78
CL		 746
747 if (!snd_card_proc_new(chip->card, chip->card->driver, &entry))
bf850204 748 snd_info_set_text_ops(entry, chip, snd_ad1889_proc_read);
12bb5b78
CL		 749}
750
751static struct ac97_quirk ac97_quirks[] = {
752 {
753 .subvendor = 0x11d4, /* AD */
754 .subdevice = 0x1889, /* AD1889 */
755 .codec_id = AC97_ID_AD1819,
756 .name = "AD1889",
757 .type = AC97_TUNE_HP_ONLY
758 },
759 { } /* terminator */
760};
761
2f5c1302 762static void
12bb5b78
CL		 763snd_ad1889_ac97_xinit(struct snd_ad1889 *chip)
764{
765 u16 reg;
766
767 reg = ad1889_readw(chip, AD_AC97_ACIC);
768 reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */
769 ad1889_writew(chip, AD_AC97_ACIC, reg);
770 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
771 udelay(10);
772 /* Interface Enable */
773 reg |= AD_AC97_ACIC_ACIE;
774 ad1889_writew(chip, AD_AC97_ACIC, reg);
775
776 snd_ad1889_ac97_ready(chip);
777
778 /* Audio Stream Output | Variable Sample Rate Mode */
779 reg = ad1889_readw(chip, AD_AC97_ACIC);
780 reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM;
781 ad1889_writew(chip, AD_AC97_ACIC, reg);
782 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
783
784}
785
786static void
02c2de69 787snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus)
12bb5b78
CL		 788{
789 struct snd_ad1889 *chip = bus->private_data;
790 chip->ac97_bus = NULL;
791}
792
793static void
02c2de69 794snd_ad1889_ac97_free(struct snd_ac97 *ac97)
12bb5b78
CL		 795{
796 struct snd_ad1889 *chip = ac97->private_data;
797 chip->ac97 = NULL;
798}
799
2f5c1302 800static int
12bb5b78
CL		 801snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override)
802{
803 int err;
02c2de69
TI		 804 struct snd_ac97_template ac97;
805 static struct snd_ac97_bus_ops ops = {
12bb5b78
CL		 806 .write = snd_ad1889_ac97_write,
807 .read = snd_ad1889_ac97_read,
808 };
809
810 /* doing that here, it works. */
811 snd_ad1889_ac97_xinit(chip);
812
813 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
814 if (err < 0)
815 return err;
816
817 chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free;
818
819 memset(&ac97, 0, sizeof(ac97));
820 ac97.private_data = chip;
821 ac97.private_free = snd_ad1889_ac97_free;
822 ac97.pci = chip->pci;
823
824 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
825 if (err < 0)
826 return err;
827
828 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
829
830 return 0;
831}
832
833static int
834snd_ad1889_free(struct snd_ad1889 *chip)
835{
836 if (chip->irq < 0)
837 goto skip_hw;
838
839 spin_lock_irq(&chip->lock);
840
841 ad1889_mute(chip);
842
843 /* Turn off interrupt on count and zero DMA registers */
844 ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC);
845
846 /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */
847 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI);
848 ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */
849
850 spin_unlock_irq(&chip->lock);
851
12bb5b78 852 if (chip->irq >= 0)
437a5a46 853 free_irq(chip->irq, chip);
12bb5b78
CL		 854
855skip_hw:
ff6defa6 856 iounmap(chip->iobase);
12bb5b78
CL		 857 pci_release_regions(chip->pci);
858 pci_disable_device(chip->pci);
12bb5b78
CL		 859 kfree(chip);
860 return 0;
861}
862
f40b6890 863static int
02c2de69 864snd_ad1889_dev_free(struct snd_device *device)
12bb5b78
CL		 865{
866 struct snd_ad1889 *chip = device->device_data;
867 return snd_ad1889_free(chip);
868}
869
2f5c1302 870static int
12bb5b78
CL		 871snd_ad1889_init(struct snd_ad1889 *chip)
872{
873 ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */
874 ad1889_readw(chip, AD_DS_CCS); /* flush posted write */
875
876 mdelay(10);
877
878 /* enable Master and Target abort interrupts */
879 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE);
880
881 return 0;
882}
883
2f5c1302 884static int
02c2de69 885snd_ad1889_create(struct snd_card *card,
12bb5b78
CL		 886 struct pci_dev *pci,
887 struct snd_ad1889 **rchip)
888{
889 int err;
890
891 struct snd_ad1889 *chip;
02c2de69 892 static struct snd_device_ops ops = {
12bb5b78
CL		 893 .dev_free = snd_ad1889_dev_free,
894 };
895
896 *rchip = NULL;
897
898 if ((err = pci_enable_device(pci)) < 0)
899 return err;
9d2f928d 900
12bb5b78 901 /* check PCI availability (32bit DMA) */
284901a9
YH		 902 if (pci_set_dma_mask(pci, DMA_BIT_MASK(32)) < 0 ||
903 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32)) < 0) {
29633004 904 dev_err(card->dev, "error setting 32-bit DMA mask.\n");
12bb5b78
CL		 905 pci_disable_device(pci);
906 return -ENXIO;
907 }
908
909 /* allocate chip specific data with zero-filled memory */
e560d8d8 910 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
12bb5b78
CL		 911 pci_disable_device(pci);
912 return -ENOMEM;
913 }
914
915 chip->card = card;
916 card->private_data = chip;
917 chip->pci = pci;
918 chip->irq = -1;
919
920 /* (1) PCI resource allocation */
921 if ((err = pci_request_regions(pci, card->driver)) < 0)
922 goto free_and_ret;
923
924 chip->bar = pci_resource_start(pci, 0);
2f5ad54e 925 chip->iobase = pci_ioremap_bar(pci, 0);
12bb5b78 926 if (chip->iobase == NULL) {
29633004 927 dev_err(card->dev, "unable to reserve region.\n");
12bb5b78
CL		 928 err = -EBUSY;
929 goto free_and_ret;
930 }
931
932 pci_set_master(pci);
933
934 spin_lock_init(&chip->lock); /* only now can we call ad1889_free */
935
936 if (request_irq(pci->irq, snd_ad1889_interrupt,
934c2b6d 937 IRQF_SHARED, KBUILD_MODNAME, chip)) {
29633004 938 dev_err(card->dev, "cannot obtain IRQ %d\n", pci->irq);
12bb5b78
CL		 939 snd_ad1889_free(chip);
940 return -EBUSY;
941 }
942
943 chip->irq = pci->irq;
944 synchronize_irq(chip->irq);
945
946 /* (2) initialization of the chip hardware */
947 if ((err = snd_ad1889_init(chip)) < 0) {
948 snd_ad1889_free(chip);
949 return err;
950 }
951
952 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
953 snd_ad1889_free(chip);
954 return err;
955 }
956
12bb5b78
CL		 957 *rchip = chip;
958
959 return 0;
960
961free_and_ret:
fc58422a 962 kfree(chip);
12bb5b78
CL		 963 pci_disable_device(pci);
964
965 return err;
966}
967
2f5c1302 968static int
12bb5b78
CL		 969snd_ad1889_probe(struct pci_dev *pci,
970 const struct pci_device_id *pci_id)
971{
972 int err;
973 static int devno;
02c2de69 974 struct snd_card *card;
12bb5b78
CL		 975 struct snd_ad1889 *chip;
976
977 /* (1) */
978 if (devno >= SNDRV_CARDS)
979 return -ENODEV;
980 if (!enable[devno]) {
981 devno++;
982 return -ENOENT;
983 }
984
985 /* (2) */
60c5772b
TI		 986 err = snd_card_new(&pci->dev, index[devno], id[devno], THIS_MODULE,
987 0, &card);
12bb5b78 988 /* XXX REVISIT: we can probably allocate chip in this call */
e58de7ba
TI		 989 if (err < 0)
990 return err;
12bb5b78
CL		 991
992 strcpy(card->driver, "AD1889");
993 strcpy(card->shortname, "Analog Devices AD1889");
994
995 /* (3) */
996 err = snd_ad1889_create(card, pci, &chip);
997 if (err < 0)
998 goto free_and_ret;
999
1000 /* (4) */
1001 sprintf(card->longname, "%s at 0x%lx irq %i",
1002 card->shortname, chip->bar, chip->irq);
1003
1004 /* (5) */
1005 /* register AC97 mixer */
1006 err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]);
1007 if (err < 0)
1008 goto free_and_ret;
1009
a0880094 1010 err = snd_ad1889_pcm_init(chip, 0);
12bb5b78
CL		 1011 if (err < 0)
1012 goto free_and_ret;
1013
1014 /* register proc interface */
1015 snd_ad1889_proc_init(chip);
1016
1017 /* (6) */
1018 err = snd_card_register(card);
1019 if (err < 0)
1020 goto free_and_ret;
1021
1022 /* (7) */
1023 pci_set_drvdata(pci, card);
1024
1025 devno++;
1026 return 0;
1027
1028free_and_ret:
1029 snd_card_free(card);
1030 return err;
1031}
1032
2f5c1302 1033static void
12bb5b78
CL		 1034snd_ad1889_remove(struct pci_dev *pci)
1035{
1036 snd_card_free(pci_get_drvdata(pci));
12bb5b78
CL		 1037}
1038
9baa3c34 1039static const struct pci_device_id snd_ad1889_ids[] = {
12bb5b78
CL		 1040 { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) },
1041 { 0, },
1042};
1043MODULE_DEVICE_TABLE(pci, snd_ad1889_ids);
1044
e4d76815 1045static struct pci_driver ad1889_pci_driver = {
3733e424 1046 .name = KBUILD_MODNAME,
12bb5b78
CL		 1047 .id_table = snd_ad1889_ids,
1048 .probe = snd_ad1889_probe,
2f5c1302 1049 .remove = snd_ad1889_remove,
12bb5b78
CL		 1050};
1051
e9f66d9b 1052module_pci_driver(ad1889_pci_driver);
Linux 6.x block layer and io_uring tree(s)