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12bb5b78 CL |
1 | /* Analog Devices 1889 audio driver |
2 | * | |
3 | * This is a driver for the AD1889 PCI audio chipset found | |
4 | * on the HP PA-RISC [BCJ]-xxx0 workstations. | |
5 | * | |
6 | * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org> | |
7 | * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org> | |
8 | * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org> | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License, version 2, as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | * | |
23 | * TODO: | |
24 | * Do we need to take care of CCS register? | |
25 | * Maybe we could use finer grained locking (separate locks for pb/cap)? | |
26 | * Wishlist: | |
27 | * Control Interface (mixer) support | |
28 | * Better AC97 support (VSR...)? | |
29 | * PM support | |
30 | * MIDI support | |
31 | * Game Port support | |
25985edc | 32 | * SG DMA support (this will need *a lot* of work) |
12bb5b78 CL |
33 | */ |
34 | ||
35 | #include <linux/init.h> | |
36 | #include <linux/pci.h> | |
9d2f928d | 37 | #include <linux/dma-mapping.h> |
12bb5b78 CL |
38 | #include <linux/slab.h> |
39 | #include <linux/interrupt.h> | |
40 | #include <linux/compiler.h> | |
41 | #include <linux/delay.h> | |
da155d5b | 42 | #include <linux/module.h> |
6cbbfe1c | 43 | #include <linux/io.h> |
12bb5b78 | 44 | |
12bb5b78 CL |
45 | #include <sound/core.h> |
46 | #include <sound/pcm.h> | |
47 | #include <sound/initval.h> | |
48 | #include <sound/ac97_codec.h> | |
49 | ||
12bb5b78 CL |
50 | #include "ad1889.h" |
51 | #include "ac97/ac97_id.h" | |
52 | ||
c6f43290 | 53 | #define AD1889_DRVVER "Version: 1.7" |
12bb5b78 CL |
54 | |
55 | MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>"); | |
56 | MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver"); | |
57 | MODULE_LICENSE("GPL"); | |
58 | MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}"); | |
59 | ||
60 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; | |
61 | module_param_array(index, int, NULL, 0444); | |
62 | MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard."); | |
63 | ||
64 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; | |
65 | module_param_array(id, charp, NULL, 0444); | |
66 | MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard."); | |
67 | ||
a67ff6a5 | 68 | static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; |
12bb5b78 CL |
69 | module_param_array(enable, bool, NULL, 0444); |
70 | MODULE_PARM_DESC(enable, "Enable AD1889 soundcard."); | |
71 | ||
72 | static char *ac97_quirk[SNDRV_CARDS]; | |
73 | module_param_array(ac97_quirk, charp, NULL, 0444); | |
74 | MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); | |
75 | ||
76 | #define DEVNAME "ad1889" | |
77 | #define PFX DEVNAME ": " | |
78 | ||
12bb5b78 CL |
79 | /* keep track of some hw registers */ |
80 | struct ad1889_register_state { | |
81 | u16 reg; /* reg setup */ | |
82 | u32 addr; /* dma base address */ | |
83 | unsigned long size; /* DMA buffer size */ | |
84 | }; | |
85 | ||
86 | struct snd_ad1889 { | |
02c2de69 | 87 | struct snd_card *card; |
12bb5b78 CL |
88 | struct pci_dev *pci; |
89 | ||
90 | int irq; | |
91 | unsigned long bar; | |
92 | void __iomem *iobase; | |
93 | ||
02c2de69 TI |
94 | struct snd_ac97 *ac97; |
95 | struct snd_ac97_bus *ac97_bus; | |
96 | struct snd_pcm *pcm; | |
97 | struct snd_info_entry *proc; | |
12bb5b78 | 98 | |
02c2de69 TI |
99 | struct snd_pcm_substream *psubs; |
100 | struct snd_pcm_substream *csubs; | |
12bb5b78 CL |
101 | |
102 | /* playback register state */ | |
103 | struct ad1889_register_state wave; | |
104 | struct ad1889_register_state ramc; | |
105 | ||
106 | spinlock_t lock; | |
107 | }; | |
108 | ||
109 | static inline u16 | |
110 | ad1889_readw(struct snd_ad1889 *chip, unsigned reg) | |
111 | { | |
112 | return readw(chip->iobase + reg); | |
113 | } | |
114 | ||
115 | static inline void | |
116 | ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val) | |
117 | { | |
118 | writew(val, chip->iobase + reg); | |
119 | } | |
120 | ||
121 | static inline u32 | |
122 | ad1889_readl(struct snd_ad1889 *chip, unsigned reg) | |
123 | { | |
124 | return readl(chip->iobase + reg); | |
125 | } | |
126 | ||
127 | static inline void | |
128 | ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val) | |
129 | { | |
130 | writel(val, chip->iobase + reg); | |
131 | } | |
132 | ||
133 | static inline void | |
134 | ad1889_unmute(struct snd_ad1889 *chip) | |
135 | { | |
136 | u16 st; | |
137 | st = ad1889_readw(chip, AD_DS_WADA) & | |
138 | ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM); | |
139 | ad1889_writew(chip, AD_DS_WADA, st); | |
140 | ad1889_readw(chip, AD_DS_WADA); | |
141 | } | |
142 | ||
143 | static inline void | |
144 | ad1889_mute(struct snd_ad1889 *chip) | |
145 | { | |
146 | u16 st; | |
147 | st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM; | |
148 | ad1889_writew(chip, AD_DS_WADA, st); | |
149 | ad1889_readw(chip, AD_DS_WADA); | |
150 | } | |
151 | ||
152 | static inline void | |
153 | ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address) | |
154 | { | |
155 | ad1889_writel(chip, AD_DMA_ADCBA, address); | |
156 | ad1889_writel(chip, AD_DMA_ADCCA, address); | |
157 | } | |
158 | ||
159 | static inline void | |
160 | ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count) | |
161 | { | |
162 | ad1889_writel(chip, AD_DMA_ADCBC, count); | |
163 | ad1889_writel(chip, AD_DMA_ADCCC, count); | |
164 | } | |
165 | ||
166 | static inline void | |
167 | ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count) | |
168 | { | |
169 | ad1889_writel(chip, AD_DMA_ADCIB, count); | |
170 | ad1889_writel(chip, AD_DMA_ADCIC, count); | |
171 | } | |
172 | ||
173 | static inline void | |
174 | ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address) | |
175 | { | |
176 | ad1889_writel(chip, AD_DMA_WAVBA, address); | |
177 | ad1889_writel(chip, AD_DMA_WAVCA, address); | |
178 | } | |
179 | ||
180 | static inline void | |
181 | ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count) | |
182 | { | |
183 | ad1889_writel(chip, AD_DMA_WAVBC, count); | |
184 | ad1889_writel(chip, AD_DMA_WAVCC, count); | |
185 | } | |
186 | ||
187 | static inline void | |
188 | ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count) | |
189 | { | |
190 | ad1889_writel(chip, AD_DMA_WAVIB, count); | |
191 | ad1889_writel(chip, AD_DMA_WAVIC, count); | |
192 | } | |
193 | ||
194 | static void | |
195 | ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel) | |
196 | { | |
197 | u16 reg; | |
198 | ||
199 | if (channel & AD_CHAN_WAV) { | |
200 | /* Disable wave channel */ | |
201 | reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN; | |
202 | ad1889_writew(chip, AD_DS_WSMC, reg); | |
203 | chip->wave.reg = reg; | |
204 | ||
205 | /* disable IRQs */ | |
206 | reg = ad1889_readw(chip, AD_DMA_WAV); | |
207 | reg &= AD_DMA_IM_DIS; | |
208 | reg &= ~AD_DMA_LOOP; | |
209 | ad1889_writew(chip, AD_DMA_WAV, reg); | |
210 | ||
211 | /* clear IRQ and address counters and pointers */ | |
212 | ad1889_load_wave_buffer_address(chip, 0x0); | |
213 | ad1889_load_wave_buffer_count(chip, 0x0); | |
214 | ad1889_load_wave_interrupt_count(chip, 0x0); | |
215 | ||
216 | /* flush */ | |
217 | ad1889_readw(chip, AD_DMA_WAV); | |
218 | } | |
219 | ||
220 | if (channel & AD_CHAN_ADC) { | |
221 | /* Disable ADC channel */ | |
222 | reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN; | |
223 | ad1889_writew(chip, AD_DS_RAMC, reg); | |
224 | chip->ramc.reg = reg; | |
225 | ||
226 | reg = ad1889_readw(chip, AD_DMA_ADC); | |
227 | reg &= AD_DMA_IM_DIS; | |
228 | reg &= ~AD_DMA_LOOP; | |
229 | ad1889_writew(chip, AD_DMA_ADC, reg); | |
230 | ||
231 | ad1889_load_adc_buffer_address(chip, 0x0); | |
232 | ad1889_load_adc_buffer_count(chip, 0x0); | |
233 | ad1889_load_adc_interrupt_count(chip, 0x0); | |
234 | ||
235 | /* flush */ | |
236 | ad1889_readw(chip, AD_DMA_ADC); | |
237 | } | |
238 | } | |
239 | ||
f40b6890 | 240 | static u16 |
02c2de69 | 241 | snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg) |
12bb5b78 CL |
242 | { |
243 | struct snd_ad1889 *chip = ac97->private_data; | |
244 | return ad1889_readw(chip, AD_AC97_BASE + reg); | |
245 | } | |
246 | ||
f40b6890 | 247 | static void |
02c2de69 | 248 | snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) |
12bb5b78 CL |
249 | { |
250 | struct snd_ad1889 *chip = ac97->private_data; | |
251 | ad1889_writew(chip, AD_AC97_BASE + reg, val); | |
252 | } | |
253 | ||
254 | static int | |
255 | snd_ad1889_ac97_ready(struct snd_ad1889 *chip) | |
256 | { | |
257 | int retry = 400; /* average needs 352 msec */ | |
258 | ||
259 | while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY) | |
260 | && --retry) | |
1fa350b6 | 261 | usleep_range(1000, 2000); |
12bb5b78 | 262 | if (!retry) { |
29633004 TI |
263 | dev_err(chip->card->dev, "[%s] Link is not ready.\n", |
264 | __func__); | |
12bb5b78 CL |
265 | return -EIO; |
266 | } | |
29633004 | 267 | dev_dbg(chip->card->dev, "[%s] ready after %d ms\n", __func__, 400 - retry); |
12bb5b78 CL |
268 | |
269 | return 0; | |
270 | } | |
271 | ||
272 | static int | |
02c2de69 TI |
273 | snd_ad1889_hw_params(struct snd_pcm_substream *substream, |
274 | struct snd_pcm_hw_params *hw_params) | |
12bb5b78 CL |
275 | { |
276 | return snd_pcm_lib_malloc_pages(substream, | |
277 | params_buffer_bytes(hw_params)); | |
278 | } | |
279 | ||
280 | static int | |
02c2de69 | 281 | snd_ad1889_hw_free(struct snd_pcm_substream *substream) |
12bb5b78 CL |
282 | { |
283 | return snd_pcm_lib_free_pages(substream); | |
284 | } | |
285 | ||
dee49895 | 286 | static const struct snd_pcm_hardware snd_ad1889_playback_hw = { |
12bb5b78 CL |
287 | .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | |
288 | SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER, | |
289 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | |
290 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, | |
291 | .rate_min = 8000, /* docs say 7000, but we're lazy */ | |
292 | .rate_max = 48000, | |
293 | .channels_min = 1, | |
294 | .channels_max = 2, | |
295 | .buffer_bytes_max = BUFFER_BYTES_MAX, | |
296 | .period_bytes_min = PERIOD_BYTES_MIN, | |
297 | .period_bytes_max = PERIOD_BYTES_MAX, | |
298 | .periods_min = PERIODS_MIN, | |
299 | .periods_max = PERIODS_MAX, | |
300 | /*.fifo_size = 0,*/ | |
301 | }; | |
302 | ||
dee49895 | 303 | static const struct snd_pcm_hardware snd_ad1889_capture_hw = { |
12bb5b78 CL |
304 | .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | |
305 | SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER, | |
306 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | |
307 | .rates = SNDRV_PCM_RATE_48000, | |
308 | .rate_min = 48000, /* docs say we could to VSR, but we're lazy */ | |
309 | .rate_max = 48000, | |
310 | .channels_min = 1, | |
311 | .channels_max = 2, | |
312 | .buffer_bytes_max = BUFFER_BYTES_MAX, | |
313 | .period_bytes_min = PERIOD_BYTES_MIN, | |
314 | .period_bytes_max = PERIOD_BYTES_MAX, | |
315 | .periods_min = PERIODS_MIN, | |
316 | .periods_max = PERIODS_MAX, | |
317 | /*.fifo_size = 0,*/ | |
318 | }; | |
319 | ||
320 | static int | |
02c2de69 | 321 | snd_ad1889_playback_open(struct snd_pcm_substream *ss) |
12bb5b78 CL |
322 | { |
323 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
02c2de69 | 324 | struct snd_pcm_runtime *rt = ss->runtime; |
12bb5b78 CL |
325 | |
326 | chip->psubs = ss; | |
327 | rt->hw = snd_ad1889_playback_hw; | |
328 | ||
329 | return 0; | |
330 | } | |
331 | ||
332 | static int | |
02c2de69 | 333 | snd_ad1889_capture_open(struct snd_pcm_substream *ss) |
12bb5b78 CL |
334 | { |
335 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
02c2de69 | 336 | struct snd_pcm_runtime *rt = ss->runtime; |
12bb5b78 CL |
337 | |
338 | chip->csubs = ss; | |
339 | rt->hw = snd_ad1889_capture_hw; | |
340 | ||
341 | return 0; | |
342 | } | |
343 | ||
344 | static int | |
02c2de69 | 345 | snd_ad1889_playback_close(struct snd_pcm_substream *ss) |
12bb5b78 CL |
346 | { |
347 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
348 | chip->psubs = NULL; | |
349 | return 0; | |
350 | } | |
351 | ||
352 | static int | |
02c2de69 | 353 | snd_ad1889_capture_close(struct snd_pcm_substream *ss) |
12bb5b78 CL |
354 | { |
355 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
356 | chip->csubs = NULL; | |
357 | return 0; | |
358 | } | |
359 | ||
360 | static int | |
02c2de69 | 361 | snd_ad1889_playback_prepare(struct snd_pcm_substream *ss) |
12bb5b78 CL |
362 | { |
363 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
02c2de69 | 364 | struct snd_pcm_runtime *rt = ss->runtime; |
12bb5b78 CL |
365 | unsigned int size = snd_pcm_lib_buffer_bytes(ss); |
366 | unsigned int count = snd_pcm_lib_period_bytes(ss); | |
367 | u16 reg; | |
368 | ||
369 | ad1889_channel_reset(chip, AD_CHAN_WAV); | |
370 | ||
371 | reg = ad1889_readw(chip, AD_DS_WSMC); | |
372 | ||
373 | /* Mask out 16-bit / Stereo */ | |
374 | reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST); | |
375 | ||
376 | if (snd_pcm_format_width(rt->format) == 16) | |
377 | reg |= AD_DS_WSMC_WA16; | |
378 | ||
379 | if (rt->channels > 1) | |
380 | reg |= AD_DS_WSMC_WAST; | |
381 | ||
382 | /* let's make sure we don't clobber ourselves */ | |
383 | spin_lock_irq(&chip->lock); | |
384 | ||
385 | chip->wave.size = size; | |
386 | chip->wave.reg = reg; | |
387 | chip->wave.addr = rt->dma_addr; | |
388 | ||
389 | ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg); | |
390 | ||
391 | /* Set sample rates on the codec */ | |
392 | ad1889_writew(chip, AD_DS_WAS, rt->rate); | |
393 | ||
394 | /* Set up DMA */ | |
395 | ad1889_load_wave_buffer_address(chip, chip->wave.addr); | |
396 | ad1889_load_wave_buffer_count(chip, size); | |
397 | ad1889_load_wave_interrupt_count(chip, count); | |
398 | ||
399 | /* writes flush */ | |
400 | ad1889_readw(chip, AD_DS_WSMC); | |
401 | ||
402 | spin_unlock_irq(&chip->lock); | |
403 | ||
29633004 TI |
404 | dev_dbg(chip->card->dev, |
405 | "prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n", | |
406 | chip->wave.addr, count, size, reg, rt->rate); | |
12bb5b78 CL |
407 | return 0; |
408 | } | |
409 | ||
410 | static int | |
02c2de69 | 411 | snd_ad1889_capture_prepare(struct snd_pcm_substream *ss) |
12bb5b78 CL |
412 | { |
413 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
02c2de69 | 414 | struct snd_pcm_runtime *rt = ss->runtime; |
12bb5b78 CL |
415 | unsigned int size = snd_pcm_lib_buffer_bytes(ss); |
416 | unsigned int count = snd_pcm_lib_period_bytes(ss); | |
417 | u16 reg; | |
418 | ||
419 | ad1889_channel_reset(chip, AD_CHAN_ADC); | |
420 | ||
421 | reg = ad1889_readw(chip, AD_DS_RAMC); | |
422 | ||
423 | /* Mask out 16-bit / Stereo */ | |
424 | reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST); | |
425 | ||
426 | if (snd_pcm_format_width(rt->format) == 16) | |
427 | reg |= AD_DS_RAMC_AD16; | |
428 | ||
429 | if (rt->channels > 1) | |
430 | reg |= AD_DS_RAMC_ADST; | |
431 | ||
432 | /* let's make sure we don't clobber ourselves */ | |
433 | spin_lock_irq(&chip->lock); | |
434 | ||
435 | chip->ramc.size = size; | |
436 | chip->ramc.reg = reg; | |
437 | chip->ramc.addr = rt->dma_addr; | |
438 | ||
439 | ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg); | |
440 | ||
441 | /* Set up DMA */ | |
442 | ad1889_load_adc_buffer_address(chip, chip->ramc.addr); | |
443 | ad1889_load_adc_buffer_count(chip, size); | |
444 | ad1889_load_adc_interrupt_count(chip, count); | |
445 | ||
446 | /* writes flush */ | |
447 | ad1889_readw(chip, AD_DS_RAMC); | |
448 | ||
449 | spin_unlock_irq(&chip->lock); | |
450 | ||
29633004 TI |
451 | dev_dbg(chip->card->dev, |
452 | "prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n", | |
453 | chip->ramc.addr, count, size, reg, rt->rate); | |
12bb5b78 CL |
454 | return 0; |
455 | } | |
456 | ||
457 | /* this is called in atomic context with IRQ disabled. | |
458 | Must be as fast as possible and not sleep. | |
459 | DMA should be *triggered* by this call. | |
460 | The WSMC "WAEN" bit triggers DMA Wave On/Off */ | |
461 | static int | |
02c2de69 | 462 | snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd) |
12bb5b78 CL |
463 | { |
464 | u16 wsmc; | |
465 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
466 | ||
467 | wsmc = ad1889_readw(chip, AD_DS_WSMC); | |
468 | ||
469 | switch (cmd) { | |
470 | case SNDRV_PCM_TRIGGER_START: | |
471 | /* enable DMA loop & interrupts */ | |
472 | ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT); | |
473 | wsmc |= AD_DS_WSMC_WAEN; | |
474 | /* 1 to clear CHSS bit */ | |
475 | ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS); | |
476 | ad1889_unmute(chip); | |
477 | break; | |
478 | case SNDRV_PCM_TRIGGER_STOP: | |
479 | ad1889_mute(chip); | |
480 | wsmc &= ~AD_DS_WSMC_WAEN; | |
481 | break; | |
482 | default: | |
483 | snd_BUG(); | |
484 | return -EINVAL; | |
485 | } | |
486 | ||
487 | chip->wave.reg = wsmc; | |
488 | ad1889_writew(chip, AD_DS_WSMC, wsmc); | |
489 | ad1889_readw(chip, AD_DS_WSMC); /* flush */ | |
490 | ||
491 | /* reset the chip when STOP - will disable IRQs */ | |
492 | if (cmd == SNDRV_PCM_TRIGGER_STOP) | |
493 | ad1889_channel_reset(chip, AD_CHAN_WAV); | |
494 | ||
495 | return 0; | |
496 | } | |
497 | ||
498 | /* this is called in atomic context with IRQ disabled. | |
499 | Must be as fast as possible and not sleep. | |
500 | DMA should be *triggered* by this call. | |
501 | The RAMC "ADEN" bit triggers DMA ADC On/Off */ | |
502 | static int | |
02c2de69 | 503 | snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd) |
12bb5b78 CL |
504 | { |
505 | u16 ramc; | |
506 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
507 | ||
508 | ramc = ad1889_readw(chip, AD_DS_RAMC); | |
509 | ||
510 | switch (cmd) { | |
511 | case SNDRV_PCM_TRIGGER_START: | |
512 | /* enable DMA loop & interrupts */ | |
513 | ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT); | |
514 | ramc |= AD_DS_RAMC_ADEN; | |
515 | /* 1 to clear CHSS bit */ | |
516 | ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS); | |
517 | break; | |
518 | case SNDRV_PCM_TRIGGER_STOP: | |
519 | ramc &= ~AD_DS_RAMC_ADEN; | |
520 | break; | |
521 | default: | |
522 | return -EINVAL; | |
523 | } | |
524 | ||
525 | chip->ramc.reg = ramc; | |
526 | ad1889_writew(chip, AD_DS_RAMC, ramc); | |
527 | ad1889_readw(chip, AD_DS_RAMC); /* flush */ | |
528 | ||
529 | /* reset the chip when STOP - will disable IRQs */ | |
530 | if (cmd == SNDRV_PCM_TRIGGER_STOP) | |
531 | ad1889_channel_reset(chip, AD_CHAN_ADC); | |
532 | ||
533 | return 0; | |
534 | } | |
535 | ||
536 | /* Called in atomic context with IRQ disabled */ | |
537 | static snd_pcm_uframes_t | |
02c2de69 | 538 | snd_ad1889_playback_pointer(struct snd_pcm_substream *ss) |
12bb5b78 CL |
539 | { |
540 | size_t ptr = 0; | |
541 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
542 | ||
543 | if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN))) | |
544 | return 0; | |
545 | ||
546 | ptr = ad1889_readl(chip, AD_DMA_WAVCA); | |
547 | ptr -= chip->wave.addr; | |
548 | ||
da3cec35 TI |
549 | if (snd_BUG_ON(ptr >= chip->wave.size)) |
550 | return 0; | |
12bb5b78 CL |
551 | |
552 | return bytes_to_frames(ss->runtime, ptr); | |
553 | } | |
554 | ||
555 | /* Called in atomic context with IRQ disabled */ | |
556 | static snd_pcm_uframes_t | |
02c2de69 | 557 | snd_ad1889_capture_pointer(struct snd_pcm_substream *ss) |
12bb5b78 CL |
558 | { |
559 | size_t ptr = 0; | |
560 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
561 | ||
562 | if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN))) | |
563 | return 0; | |
564 | ||
565 | ptr = ad1889_readl(chip, AD_DMA_ADCCA); | |
566 | ptr -= chip->ramc.addr; | |
567 | ||
da3cec35 TI |
568 | if (snd_BUG_ON(ptr >= chip->ramc.size)) |
569 | return 0; | |
12bb5b78 CL |
570 | |
571 | return bytes_to_frames(ss->runtime, ptr); | |
572 | } | |
573 | ||
d602efca | 574 | static const struct snd_pcm_ops snd_ad1889_playback_ops = { |
12bb5b78 CL |
575 | .open = snd_ad1889_playback_open, |
576 | .close = snd_ad1889_playback_close, | |
577 | .ioctl = snd_pcm_lib_ioctl, | |
578 | .hw_params = snd_ad1889_hw_params, | |
579 | .hw_free = snd_ad1889_hw_free, | |
580 | .prepare = snd_ad1889_playback_prepare, | |
581 | .trigger = snd_ad1889_playback_trigger, | |
582 | .pointer = snd_ad1889_playback_pointer, | |
583 | }; | |
584 | ||
d602efca | 585 | static const struct snd_pcm_ops snd_ad1889_capture_ops = { |
12bb5b78 CL |
586 | .open = snd_ad1889_capture_open, |
587 | .close = snd_ad1889_capture_close, | |
588 | .ioctl = snd_pcm_lib_ioctl, | |
589 | .hw_params = snd_ad1889_hw_params, | |
590 | .hw_free = snd_ad1889_hw_free, | |
591 | .prepare = snd_ad1889_capture_prepare, | |
592 | .trigger = snd_ad1889_capture_trigger, | |
593 | .pointer = snd_ad1889_capture_pointer, | |
594 | }; | |
595 | ||
596 | static irqreturn_t | |
7d12e780 | 597 | snd_ad1889_interrupt(int irq, void *dev_id) |
12bb5b78 CL |
598 | { |
599 | unsigned long st; | |
600 | struct snd_ad1889 *chip = dev_id; | |
601 | ||
602 | st = ad1889_readl(chip, AD_DMA_DISR); | |
603 | ||
604 | /* clear ISR */ | |
605 | ad1889_writel(chip, AD_DMA_DISR, st); | |
606 | ||
607 | st &= AD_INTR_MASK; | |
608 | ||
609 | if (unlikely(!st)) | |
610 | return IRQ_NONE; | |
611 | ||
612 | if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI)) | |
29633004 TI |
613 | dev_dbg(chip->card->dev, |
614 | "Unexpected master or target abort interrupt!\n"); | |
12bb5b78 CL |
615 | |
616 | if ((st & AD_DMA_DISR_WAVI) && chip->psubs) | |
617 | snd_pcm_period_elapsed(chip->psubs); | |
618 | if ((st & AD_DMA_DISR_ADCI) && chip->csubs) | |
619 | snd_pcm_period_elapsed(chip->csubs); | |
620 | ||
621 | return IRQ_HANDLED; | |
622 | } | |
623 | ||
2f5c1302 | 624 | static int |
a0880094 | 625 | snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device) |
12bb5b78 CL |
626 | { |
627 | int err; | |
02c2de69 | 628 | struct snd_pcm *pcm; |
12bb5b78 | 629 | |
12bb5b78 CL |
630 | err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm); |
631 | if (err < 0) | |
632 | return err; | |
633 | ||
634 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, | |
635 | &snd_ad1889_playback_ops); | |
636 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, | |
637 | &snd_ad1889_capture_ops); | |
638 | ||
639 | pcm->private_data = chip; | |
12bb5b78 CL |
640 | pcm->info_flags = 0; |
641 | strcpy(pcm->name, chip->card->shortname); | |
642 | ||
643 | chip->pcm = pcm; | |
644 | chip->psubs = NULL; | |
645 | chip->csubs = NULL; | |
646 | ||
5116b94a | 647 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, |
12bb5b78 CL |
648 | snd_dma_pci_data(chip->pci), |
649 | BUFFER_BYTES_MAX / 2, | |
650 | BUFFER_BYTES_MAX); | |
651 | ||
12bb5b78 CL |
652 | return 0; |
653 | } | |
654 | ||
655 | static void | |
02c2de69 | 656 | snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) |
12bb5b78 CL |
657 | { |
658 | struct snd_ad1889 *chip = entry->private_data; | |
659 | u16 reg; | |
660 | int tmp; | |
661 | ||
662 | reg = ad1889_readw(chip, AD_DS_WSMC); | |
663 | snd_iprintf(buffer, "Wave output: %s\n", | |
664 | (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled"); | |
665 | snd_iprintf(buffer, "Wave Channels: %s\n", | |
666 | (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); | |
667 | snd_iprintf(buffer, "Wave Quality: %d-bit linear\n", | |
668 | (reg & AD_DS_WSMC_WA16) ? 16 : 8); | |
669 | ||
670 | /* WARQ is at offset 12 */ | |
671 | tmp = (reg & AD_DS_WSMC_WARQ) ? | |
ccbec5ea | 672 | ((((reg & AD_DS_WSMC_WARQ) >> 12) & 0x01) ? 12 : 18) : 4; |
12bb5b78 CL |
673 | tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1; |
674 | ||
675 | snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp, | |
676 | (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); | |
677 | ||
678 | ||
679 | snd_iprintf(buffer, "Synthesis output: %s\n", | |
680 | reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled"); | |
681 | ||
682 | /* SYRQ is at offset 4 */ | |
683 | tmp = (reg & AD_DS_WSMC_SYRQ) ? | |
ccbec5ea | 684 | ((((reg & AD_DS_WSMC_SYRQ) >> 4) & 0x01) ? 12 : 18) : 4; |
12bb5b78 CL |
685 | tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1; |
686 | ||
687 | snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp, | |
688 | (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); | |
689 | ||
690 | reg = ad1889_readw(chip, AD_DS_RAMC); | |
691 | snd_iprintf(buffer, "ADC input: %s\n", | |
692 | (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled"); | |
693 | snd_iprintf(buffer, "ADC Channels: %s\n", | |
694 | (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono"); | |
695 | snd_iprintf(buffer, "ADC Quality: %d-bit linear\n", | |
696 | (reg & AD_DS_RAMC_AD16) ? 16 : 8); | |
697 | ||
698 | /* ACRQ is at offset 4 */ | |
699 | tmp = (reg & AD_DS_RAMC_ACRQ) ? | |
ccbec5ea | 700 | ((((reg & AD_DS_RAMC_ACRQ) >> 4) & 0x01) ? 12 : 18) : 4; |
12bb5b78 CL |
701 | tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1; |
702 | ||
703 | snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp, | |
704 | (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono"); | |
705 | ||
706 | snd_iprintf(buffer, "Resampler input: %s\n", | |
707 | reg & AD_DS_RAMC_REEN ? "enabled" : "disabled"); | |
708 | ||
709 | /* RERQ is at offset 12 */ | |
710 | tmp = (reg & AD_DS_RAMC_RERQ) ? | |
ccbec5ea | 711 | ((((reg & AD_DS_RAMC_RERQ) >> 12) & 0x01) ? 12 : 18) : 4; |
12bb5b78 CL |
712 | tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1; |
713 | ||
714 | snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp, | |
715 | (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); | |
716 | ||
717 | ||
718 | /* doc says LSB represents -1.5dB, but the max value (-94.5dB) | |
719 | suggests that LSB is -3dB, which is more coherent with the logarithmic | |
720 | nature of the dB scale */ | |
721 | reg = ad1889_readw(chip, AD_DS_WADA); | |
722 | snd_iprintf(buffer, "Left: %s, -%d dB\n", | |
723 | (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute", | |
724 | ((reg & AD_DS_WADA_LWAA) >> 8) * 3); | |
725 | reg = ad1889_readw(chip, AD_DS_WADA); | |
726 | snd_iprintf(buffer, "Right: %s, -%d dB\n", | |
727 | (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute", | |
9bd0f5c0 | 728 | (reg & AD_DS_WADA_RWAA) * 3); |
12bb5b78 CL |
729 | |
730 | reg = ad1889_readw(chip, AD_DS_WAS); | |
731 | snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg); | |
732 | reg = ad1889_readw(chip, AD_DS_RES); | |
733 | snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg); | |
734 | } | |
735 | ||
2f5c1302 | 736 | static void |
12bb5b78 CL |
737 | snd_ad1889_proc_init(struct snd_ad1889 *chip) |
738 | { | |
47f2769b TI |
739 | snd_card_ro_proc_new(chip->card, chip->card->driver, |
740 | chip, snd_ad1889_proc_read); | |
12bb5b78 CL |
741 | } |
742 | ||
eab0fbfa | 743 | static const struct ac97_quirk ac97_quirks[] = { |
12bb5b78 CL |
744 | { |
745 | .subvendor = 0x11d4, /* AD */ | |
746 | .subdevice = 0x1889, /* AD1889 */ | |
747 | .codec_id = AC97_ID_AD1819, | |
748 | .name = "AD1889", | |
749 | .type = AC97_TUNE_HP_ONLY | |
750 | }, | |
751 | { } /* terminator */ | |
752 | }; | |
753 | ||
2f5c1302 | 754 | static void |
12bb5b78 CL |
755 | snd_ad1889_ac97_xinit(struct snd_ad1889 *chip) |
756 | { | |
757 | u16 reg; | |
758 | ||
759 | reg = ad1889_readw(chip, AD_AC97_ACIC); | |
760 | reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */ | |
761 | ad1889_writew(chip, AD_AC97_ACIC, reg); | |
762 | ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ | |
763 | udelay(10); | |
764 | /* Interface Enable */ | |
765 | reg |= AD_AC97_ACIC_ACIE; | |
766 | ad1889_writew(chip, AD_AC97_ACIC, reg); | |
767 | ||
768 | snd_ad1889_ac97_ready(chip); | |
769 | ||
770 | /* Audio Stream Output | Variable Sample Rate Mode */ | |
771 | reg = ad1889_readw(chip, AD_AC97_ACIC); | |
772 | reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM; | |
773 | ad1889_writew(chip, AD_AC97_ACIC, reg); | |
774 | ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ | |
775 | ||
776 | } | |
777 | ||
778 | static void | |
02c2de69 | 779 | snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus) |
12bb5b78 CL |
780 | { |
781 | struct snd_ad1889 *chip = bus->private_data; | |
782 | chip->ac97_bus = NULL; | |
783 | } | |
784 | ||
785 | static void | |
02c2de69 | 786 | snd_ad1889_ac97_free(struct snd_ac97 *ac97) |
12bb5b78 CL |
787 | { |
788 | struct snd_ad1889 *chip = ac97->private_data; | |
789 | chip->ac97 = NULL; | |
790 | } | |
791 | ||
2f5c1302 | 792 | static int |
12bb5b78 CL |
793 | snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override) |
794 | { | |
795 | int err; | |
02c2de69 TI |
796 | struct snd_ac97_template ac97; |
797 | static struct snd_ac97_bus_ops ops = { | |
12bb5b78 CL |
798 | .write = snd_ad1889_ac97_write, |
799 | .read = snd_ad1889_ac97_read, | |
800 | }; | |
801 | ||
802 | /* doing that here, it works. */ | |
803 | snd_ad1889_ac97_xinit(chip); | |
804 | ||
805 | err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus); | |
806 | if (err < 0) | |
807 | return err; | |
808 | ||
809 | chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free; | |
810 | ||
811 | memset(&ac97, 0, sizeof(ac97)); | |
812 | ac97.private_data = chip; | |
813 | ac97.private_free = snd_ad1889_ac97_free; | |
814 | ac97.pci = chip->pci; | |
815 | ||
816 | err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97); | |
817 | if (err < 0) | |
818 | return err; | |
819 | ||
820 | snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override); | |
821 | ||
822 | return 0; | |
823 | } | |
824 | ||
825 | static int | |
826 | snd_ad1889_free(struct snd_ad1889 *chip) | |
827 | { | |
828 | if (chip->irq < 0) | |
829 | goto skip_hw; | |
830 | ||
831 | spin_lock_irq(&chip->lock); | |
832 | ||
833 | ad1889_mute(chip); | |
834 | ||
835 | /* Turn off interrupt on count and zero DMA registers */ | |
836 | ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC); | |
837 | ||
838 | /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */ | |
839 | ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI); | |
840 | ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */ | |
841 | ||
842 | spin_unlock_irq(&chip->lock); | |
843 | ||
12bb5b78 | 844 | if (chip->irq >= 0) |
437a5a46 | 845 | free_irq(chip->irq, chip); |
12bb5b78 CL |
846 | |
847 | skip_hw: | |
ff6defa6 | 848 | iounmap(chip->iobase); |
12bb5b78 CL |
849 | pci_release_regions(chip->pci); |
850 | pci_disable_device(chip->pci); | |
12bb5b78 CL |
851 | kfree(chip); |
852 | return 0; | |
853 | } | |
854 | ||
f40b6890 | 855 | static int |
02c2de69 | 856 | snd_ad1889_dev_free(struct snd_device *device) |
12bb5b78 CL |
857 | { |
858 | struct snd_ad1889 *chip = device->device_data; | |
859 | return snd_ad1889_free(chip); | |
860 | } | |
861 | ||
2f5c1302 | 862 | static int |
12bb5b78 CL |
863 | snd_ad1889_init(struct snd_ad1889 *chip) |
864 | { | |
865 | ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */ | |
866 | ad1889_readw(chip, AD_DS_CCS); /* flush posted write */ | |
867 | ||
621fdf60 | 868 | usleep_range(10000, 11000); |
12bb5b78 CL |
869 | |
870 | /* enable Master and Target abort interrupts */ | |
871 | ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE); | |
872 | ||
873 | return 0; | |
874 | } | |
875 | ||
2f5c1302 | 876 | static int |
02c2de69 | 877 | snd_ad1889_create(struct snd_card *card, |
12bb5b78 CL |
878 | struct pci_dev *pci, |
879 | struct snd_ad1889 **rchip) | |
880 | { | |
881 | int err; | |
882 | ||
883 | struct snd_ad1889 *chip; | |
02c2de69 | 884 | static struct snd_device_ops ops = { |
12bb5b78 CL |
885 | .dev_free = snd_ad1889_dev_free, |
886 | }; | |
887 | ||
888 | *rchip = NULL; | |
889 | ||
890 | if ((err = pci_enable_device(pci)) < 0) | |
891 | return err; | |
9d2f928d | 892 | |
12bb5b78 | 893 | /* check PCI availability (32bit DMA) */ |
412b979c QL |
894 | if (dma_set_mask(&pci->dev, DMA_BIT_MASK(32)) < 0 || |
895 | dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32)) < 0) { | |
29633004 | 896 | dev_err(card->dev, "error setting 32-bit DMA mask.\n"); |
12bb5b78 CL |
897 | pci_disable_device(pci); |
898 | return -ENXIO; | |
899 | } | |
900 | ||
901 | /* allocate chip specific data with zero-filled memory */ | |
e560d8d8 | 902 | if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) { |
12bb5b78 CL |
903 | pci_disable_device(pci); |
904 | return -ENOMEM; | |
905 | } | |
906 | ||
907 | chip->card = card; | |
908 | card->private_data = chip; | |
909 | chip->pci = pci; | |
910 | chip->irq = -1; | |
911 | ||
912 | /* (1) PCI resource allocation */ | |
913 | if ((err = pci_request_regions(pci, card->driver)) < 0) | |
914 | goto free_and_ret; | |
915 | ||
916 | chip->bar = pci_resource_start(pci, 0); | |
2f5ad54e | 917 | chip->iobase = pci_ioremap_bar(pci, 0); |
12bb5b78 | 918 | if (chip->iobase == NULL) { |
29633004 | 919 | dev_err(card->dev, "unable to reserve region.\n"); |
12bb5b78 CL |
920 | err = -EBUSY; |
921 | goto free_and_ret; | |
922 | } | |
923 | ||
924 | pci_set_master(pci); | |
925 | ||
926 | spin_lock_init(&chip->lock); /* only now can we call ad1889_free */ | |
927 | ||
928 | if (request_irq(pci->irq, snd_ad1889_interrupt, | |
934c2b6d | 929 | IRQF_SHARED, KBUILD_MODNAME, chip)) { |
29633004 | 930 | dev_err(card->dev, "cannot obtain IRQ %d\n", pci->irq); |
12bb5b78 CL |
931 | snd_ad1889_free(chip); |
932 | return -EBUSY; | |
933 | } | |
934 | ||
935 | chip->irq = pci->irq; | |
936 | synchronize_irq(chip->irq); | |
937 | ||
938 | /* (2) initialization of the chip hardware */ | |
939 | if ((err = snd_ad1889_init(chip)) < 0) { | |
940 | snd_ad1889_free(chip); | |
941 | return err; | |
942 | } | |
943 | ||
944 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { | |
945 | snd_ad1889_free(chip); | |
946 | return err; | |
947 | } | |
948 | ||
12bb5b78 CL |
949 | *rchip = chip; |
950 | ||
951 | return 0; | |
952 | ||
953 | free_and_ret: | |
fc58422a | 954 | kfree(chip); |
12bb5b78 CL |
955 | pci_disable_device(pci); |
956 | ||
957 | return err; | |
958 | } | |
959 | ||
2f5c1302 | 960 | static int |
12bb5b78 CL |
961 | snd_ad1889_probe(struct pci_dev *pci, |
962 | const struct pci_device_id *pci_id) | |
963 | { | |
964 | int err; | |
965 | static int devno; | |
02c2de69 | 966 | struct snd_card *card; |
12bb5b78 CL |
967 | struct snd_ad1889 *chip; |
968 | ||
969 | /* (1) */ | |
970 | if (devno >= SNDRV_CARDS) | |
971 | return -ENODEV; | |
972 | if (!enable[devno]) { | |
973 | devno++; | |
974 | return -ENOENT; | |
975 | } | |
976 | ||
977 | /* (2) */ | |
60c5772b TI |
978 | err = snd_card_new(&pci->dev, index[devno], id[devno], THIS_MODULE, |
979 | 0, &card); | |
12bb5b78 | 980 | /* XXX REVISIT: we can probably allocate chip in this call */ |
e58de7ba TI |
981 | if (err < 0) |
982 | return err; | |
12bb5b78 CL |
983 | |
984 | strcpy(card->driver, "AD1889"); | |
985 | strcpy(card->shortname, "Analog Devices AD1889"); | |
986 | ||
987 | /* (3) */ | |
988 | err = snd_ad1889_create(card, pci, &chip); | |
989 | if (err < 0) | |
990 | goto free_and_ret; | |
991 | ||
992 | /* (4) */ | |
993 | sprintf(card->longname, "%s at 0x%lx irq %i", | |
994 | card->shortname, chip->bar, chip->irq); | |
995 | ||
996 | /* (5) */ | |
997 | /* register AC97 mixer */ | |
998 | err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]); | |
999 | if (err < 0) | |
1000 | goto free_and_ret; | |
1001 | ||
a0880094 | 1002 | err = snd_ad1889_pcm_init(chip, 0); |
12bb5b78 CL |
1003 | if (err < 0) |
1004 | goto free_and_ret; | |
1005 | ||
1006 | /* register proc interface */ | |
1007 | snd_ad1889_proc_init(chip); | |
1008 | ||
1009 | /* (6) */ | |
1010 | err = snd_card_register(card); | |
1011 | if (err < 0) | |
1012 | goto free_and_ret; | |
1013 | ||
1014 | /* (7) */ | |
1015 | pci_set_drvdata(pci, card); | |
1016 | ||
1017 | devno++; | |
1018 | return 0; | |
1019 | ||
1020 | free_and_ret: | |
1021 | snd_card_free(card); | |
1022 | return err; | |
1023 | } | |
1024 | ||
2f5c1302 | 1025 | static void |
12bb5b78 CL |
1026 | snd_ad1889_remove(struct pci_dev *pci) |
1027 | { | |
1028 | snd_card_free(pci_get_drvdata(pci)); | |
12bb5b78 CL |
1029 | } |
1030 | ||
9baa3c34 | 1031 | static const struct pci_device_id snd_ad1889_ids[] = { |
12bb5b78 CL |
1032 | { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) }, |
1033 | { 0, }, | |
1034 | }; | |
1035 | MODULE_DEVICE_TABLE(pci, snd_ad1889_ids); | |
1036 | ||
e4d76815 | 1037 | static struct pci_driver ad1889_pci_driver = { |
3733e424 | 1038 | .name = KBUILD_MODNAME, |
12bb5b78 CL |
1039 | .id_table = snd_ad1889_ids, |
1040 | .probe = snd_ad1889_probe, | |
2f5c1302 | 1041 | .remove = snd_ad1889_remove, |
12bb5b78 CL |
1042 | }; |
1043 | ||
e9f66d9b | 1044 | module_pci_driver(ad1889_pci_driver); |