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[ALSA] Changed Jaroslav Kysela's e-mail from perex@suse.cz to perex@perex.cz
[linux-2.6-block.git] / sound / isa / ad1848 / ad1848_lib.c
CommitLineData
1da177e4 1/*
c1017a4c 2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 3 * Routines for control of AD1848/AD1847/CS4248
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#define SNDRV_MAIN_OBJECT_FILE
23#include <sound/driver.h>
24#include <linux/delay.h>
25#include <linux/init.h>
26#include <linux/interrupt.h>
1da177e4
LT		 27#include <linux/slab.h>
28#include <linux/ioport.h>
29#include <sound/core.h>
30#include <sound/ad1848.h>
31#include <sound/control.h>
eac06a10 32#include <sound/tlv.h>
1da177e4
LT		 33#include <sound/pcm_params.h>
34
35#include <asm/io.h>
36#include <asm/dma.h>
37
c1017a4c 38MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4
LT		 39MODULE_DESCRIPTION("Routines for control of AD1848/AD1847/CS4248");
40MODULE_LICENSE("GPL");
41
42#if 0
43#define SNDRV_DEBUG_MCE
44#endif
45
46/*
47 * Some variables
48 */
49
50static unsigned char freq_bits[14] = {
51 /* 5510 */ 0x00 | AD1848_XTAL2,
52 /* 6620 */ 0x0E | AD1848_XTAL2,
53 /* 8000 */ 0x00 | AD1848_XTAL1,
54 /* 9600 */ 0x0E | AD1848_XTAL1,
55 /* 11025 */ 0x02 | AD1848_XTAL2,
56 /* 16000 */ 0x02 | AD1848_XTAL1,
57 /* 18900 */ 0x04 | AD1848_XTAL2,
58 /* 22050 */ 0x06 | AD1848_XTAL2,
59 /* 27042 */ 0x04 | AD1848_XTAL1,
60 /* 32000 */ 0x06 | AD1848_XTAL1,
61 /* 33075 */ 0x0C | AD1848_XTAL2,
62 /* 37800 */ 0x08 | AD1848_XTAL2,
63 /* 44100 */ 0x0A | AD1848_XTAL2,
64 /* 48000 */ 0x0C | AD1848_XTAL1
65};
66
67static unsigned int rates[14] = {
68 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
69 27042, 32000, 33075, 37800, 44100, 48000
70};
71
c8ff6647 72static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
8e6a2c2e 73 .count = ARRAY_SIZE(rates),
1da177e4
LT		 74 .list = rates,
75 .mask = 0,
76};
77
78static unsigned char snd_ad1848_original_image[16] =
79{
80 0x00, /* 00 - lic */
81 0x00, /* 01 - ric */
82 0x9f, /* 02 - la1ic */
83 0x9f, /* 03 - ra1ic */
84 0x9f, /* 04 - la2ic */
85 0x9f, /* 05 - ra2ic */
86 0xbf, /* 06 - loc */
87 0xbf, /* 07 - roc */
88 0x20, /* 08 - dfr */
89 AD1848_AUTOCALIB, /* 09 - ic */
90 0x00, /* 0a - pc */
91 0x00, /* 0b - ti */
92 0x00, /* 0c - mi */
93 0x00, /* 0d - lbc */
94 0x00, /* 0e - dru */
95 0x00, /* 0f - drl */
96};
97
98/*
99 * Basic I/O functions
100 */
101
8e6a2c2e 102static void snd_ad1848_wait(struct snd_ad1848 *chip)
1da177e4
LT		 103{
104 int timeout;
105
8e6a2c2e
KH		 106 for (timeout = 250; timeout > 0; timeout--) {
107 if ((inb(AD1848P(chip, REGSEL)) & AD1848_INIT) == 0)
108 break;
1da177e4 109 udelay(100);
8e6a2c2e
KH		 110 }
111}
112
113void snd_ad1848_out(struct snd_ad1848 *chip,
114 unsigned char reg,
115 unsigned char value)
116{
117 snd_ad1848_wait(chip);
1da177e4
LT		 118#ifdef CONFIG_SND_DEBUG
119 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
8e6a2c2e
KH		 120 snd_printk(KERN_WARNING "auto calibration time out - "
121 "reg = 0x%x, value = 0x%x\n", reg, value);
1da177e4
LT		 122#endif
123 outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
124 outb(chip->image[reg] = value, AD1848P(chip, REG));
125 mb();
8e6a2c2e
KH		 126 snd_printdd("codec out - reg 0x%x = 0x%x\n",
127 chip->mce_bit | reg, value);
1da177e4
LT		 128}
129
eac06a10
TI		 130EXPORT_SYMBOL(snd_ad1848_out);
131
c8ff6647 132static void snd_ad1848_dout(struct snd_ad1848 *chip,
1da177e4
LT		 133 unsigned char reg, unsigned char value)
134{
8e6a2c2e 135 snd_ad1848_wait(chip);
1da177e4
LT		 136 outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
137 outb(value, AD1848P(chip, REG));
138 mb();
139}
140
c8ff6647 141static unsigned char snd_ad1848_in(struct snd_ad1848 *chip, unsigned char reg)
1da177e4 142{
8e6a2c2e 143 snd_ad1848_wait(chip);
1da177e4
LT		 144#ifdef CONFIG_SND_DEBUG
145 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
8e6a2c2e
KH		 146 snd_printk(KERN_WARNING "auto calibration time out - "
147 "reg = 0x%x\n", reg);
1da177e4
LT		 148#endif
149 outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
150 mb();
151 return inb(AD1848P(chip, REG));
152}
153
154#if 0
155
c8ff6647 156static void snd_ad1848_debug(struct snd_ad1848 *chip)
1da177e4
LT		 157{
158 printk("AD1848 REGS: INDEX = 0x%02x ", inb(AD1848P(chip, REGSEL)));
159 printk(" STATUS = 0x%02x\n", inb(AD1848P(chip, STATUS)));
160 printk(" 0x00: left input = 0x%02x ", snd_ad1848_in(chip, 0x00));
161 printk(" 0x08: playback format = 0x%02x\n", snd_ad1848_in(chip, 0x08));
162 printk(" 0x01: right input = 0x%02x ", snd_ad1848_in(chip, 0x01));
163 printk(" 0x09: iface (CFIG 1) = 0x%02x\n", snd_ad1848_in(chip, 0x09));
164 printk(" 0x02: AUXA left = 0x%02x ", snd_ad1848_in(chip, 0x02));
165 printk(" 0x0a: pin control = 0x%02x\n", snd_ad1848_in(chip, 0x0a));
166 printk(" 0x03: AUXA right = 0x%02x ", snd_ad1848_in(chip, 0x03));
167 printk(" 0x0b: init & status = 0x%02x\n", snd_ad1848_in(chip, 0x0b));
168 printk(" 0x04: AUXB left = 0x%02x ", snd_ad1848_in(chip, 0x04));
169 printk(" 0x0c: revision & mode = 0x%02x\n", snd_ad1848_in(chip, 0x0c));
170 printk(" 0x05: AUXB right = 0x%02x ", snd_ad1848_in(chip, 0x05));
171 printk(" 0x0d: loopback = 0x%02x\n", snd_ad1848_in(chip, 0x0d));
172 printk(" 0x06: left output = 0x%02x ", snd_ad1848_in(chip, 0x06));
173 printk(" 0x0e: data upr count = 0x%02x\n", snd_ad1848_in(chip, 0x0e));
174 printk(" 0x07: right output = 0x%02x ", snd_ad1848_in(chip, 0x07));
175 printk(" 0x0f: data lwr count = 0x%02x\n", snd_ad1848_in(chip, 0x0f));
176}
177
178#endif
179
180/*
181 * AD1848 detection / MCE routines
182 */
183
c8ff6647 184static void snd_ad1848_mce_up(struct snd_ad1848 *chip)
1da177e4
LT		 185{
186 unsigned long flags;
187 int timeout;
188
8e6a2c2e 189 snd_ad1848_wait(chip);
1da177e4
LT		 190#ifdef CONFIG_SND_DEBUG
191 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
99b359ba 192 snd_printk(KERN_WARNING "mce_up - auto calibration time out (0)\n");
1da177e4
LT		 193#endif
194 spin_lock_irqsave(&chip->reg_lock, flags);
195 chip->mce_bit |= AD1848_MCE;
196 timeout = inb(AD1848P(chip, REGSEL));
197 if (timeout == 0x80)
99b359ba 198 snd_printk(KERN_WARNING "mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
1da177e4
LT		 199 if (!(timeout & AD1848_MCE))
200 outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
201 spin_unlock_irqrestore(&chip->reg_lock, flags);
202}
203
c8ff6647 204static void snd_ad1848_mce_down(struct snd_ad1848 *chip)
1da177e4 205{
fe1b5e87
TP		 206 unsigned long flags, timeout;
207 int reg;
1da177e4
LT		 208
209 spin_lock_irqsave(&chip->reg_lock, flags);
210 for (timeout = 5; timeout > 0; timeout--)
211 inb(AD1848P(chip, REGSEL));
212 /* end of cleanup sequence */
213 for (timeout = 12000; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
214 udelay(100);
d44df2d0
RH		 215
216 snd_printdd("(1) timeout = %d\n", timeout);
217
1da177e4
LT		 218#ifdef CONFIG_SND_DEBUG
219 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
99b359ba 220 snd_printk(KERN_WARNING "mce_down [0x%lx] - auto calibration time out (0)\n", AD1848P(chip, REGSEL));
1da177e4 221#endif
d44df2d0 222
1da177e4 223 chip->mce_bit &= ~AD1848_MCE;
fe1b5e87
TP		 224 reg = inb(AD1848P(chip, REGSEL));
225 outb(chip->mce_bit | (reg & 0x1f), AD1848P(chip, REGSEL));
226 if (reg == 0x80)
99b359ba 227 snd_printk(KERN_WARNING "mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
fe1b5e87 228 if ((reg & AD1848_MCE) == 0) {
1da177e4
LT		 229 spin_unlock_irqrestore(&chip->reg_lock, flags);
230 return;
231 }
1da177e4 232
90cf9b85 233 /*
fe1b5e87
TP		 234 * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
235 * It may take up to 5 sample periods (at most 907 us @ 5.5125 kHz) for
236 * the process to _start_, so it is important to wait at least that long
237 * before checking. Otherwise we might think AC has finished when it
238 * has in fact not begun. It could take 128 (no AC) or 384 (AC) cycles
239 * for ACI to drop. This gives a wait of at most 70 ms with a more
240 * typical value of 3-9 ms.
90cf9b85 241 */
fe1b5e87
TP		 242 timeout = jiffies + msecs_to_jiffies(250);
243 do {
1da177e4 244 spin_unlock_irqrestore(&chip->reg_lock, flags);
f7941520 245 msleep(1);
1da177e4 246 spin_lock_irqsave(&chip->reg_lock, flags);
fe1b5e87
TP		 247 reg = snd_ad1848_in(chip, AD1848_TEST_INIT) &
248 AD1848_CALIB_IN_PROGRESS;
249 } while (reg && time_before(jiffies, timeout));
1da177e4 250 spin_unlock_irqrestore(&chip->reg_lock, flags);
fe1b5e87
TP		 251 if (reg)
252 snd_printk(KERN_ERR
253 "mce_down - auto calibration time out (2)\n");
d44df2d0
RH		 254
255 snd_printdd("(4) jiffies = %lu\n", jiffies);
256 snd_printd("mce_down - exit = 0x%x\n", inb(AD1848P(chip, REGSEL)));
1da177e4
LT		 257}
258
259static unsigned int snd_ad1848_get_count(unsigned char format,
260 unsigned int size)
261{
262 switch (format & 0xe0) {
263 case AD1848_LINEAR_16:
264 size >>= 1;
265 break;
266 }
267 if (format & AD1848_STEREO)
268 size >>= 1;
269 return size;
270}
271
c8ff6647 272static int snd_ad1848_trigger(struct snd_ad1848 *chip, unsigned char what,
1da177e4
LT		 273 int channel, int cmd)
274{
275 int result = 0;
276
277#if 0
278 printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, inb(AD1848P(card, STATUS)));
279#endif
280 spin_lock(&chip->reg_lock);
281 if (cmd == SNDRV_PCM_TRIGGER_START) {
282 if (chip->image[AD1848_IFACE_CTRL] & what) {
283 spin_unlock(&chip->reg_lock);
284 return 0;
285 }
286 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] |= what);
287 chip->mode |= AD1848_MODE_RUNNING;
288 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
289 if (!(chip->image[AD1848_IFACE_CTRL] & what)) {
290 spin_unlock(&chip->reg_lock);
291 return 0;
292 }
293 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] &= ~what);
294 chip->mode &= ~AD1848_MODE_RUNNING;
295 } else {
296 result = -EINVAL;
297 }
298 spin_unlock(&chip->reg_lock);
299 return result;
300}
301
302/*
303 * CODEC I/O
304 */
305
306static unsigned char snd_ad1848_get_rate(unsigned int rate)
307{
308 int i;
309
8e6a2c2e 310 for (i = 0; i < ARRAY_SIZE(rates); i++)
1da177e4
LT		 311 if (rate == rates[i])
312 return freq_bits[i];
313 snd_BUG();
8e6a2c2e 314 return freq_bits[ARRAY_SIZE(rates) - 1];
1da177e4
LT		 315}
316
c8ff6647 317static int snd_ad1848_ioctl(struct snd_pcm_substream *substream,
1da177e4
LT		 318 unsigned int cmd, void *arg)
319{
320 return snd_pcm_lib_ioctl(substream, cmd, arg);
321}
322
323static unsigned char snd_ad1848_get_format(int format, int channels)
324{
325 unsigned char rformat;
326
327 rformat = AD1848_LINEAR_8;
328 switch (format) {
329 case SNDRV_PCM_FORMAT_A_LAW: rformat = AD1848_ALAW_8; break;
330 case SNDRV_PCM_FORMAT_MU_LAW: rformat = AD1848_ULAW_8; break;
331 case SNDRV_PCM_FORMAT_S16_LE: rformat = AD1848_LINEAR_16; break;
332 }
333 if (channels > 1)
334 rformat |= AD1848_STEREO;
335#if 0
336 snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
337#endif
338 return rformat;
339}
340
c8ff6647 341static void snd_ad1848_calibrate_mute(struct snd_ad1848 *chip, int mute)
1da177e4
LT		 342{
343 unsigned long flags;
344
345 mute = mute ? 1 : 0;
346 spin_lock_irqsave(&chip->reg_lock, flags);
347 if (chip->calibrate_mute == mute) {
348 spin_unlock_irqrestore(&chip->reg_lock, flags);
349 return;
350 }
351 if (!mute) {
352 snd_ad1848_dout(chip, AD1848_LEFT_INPUT, chip->image[AD1848_LEFT_INPUT]);
353 snd_ad1848_dout(chip, AD1848_RIGHT_INPUT, chip->image[AD1848_RIGHT_INPUT]);
354 }
355 snd_ad1848_dout(chip, AD1848_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_LEFT_INPUT]);
356 snd_ad1848_dout(chip, AD1848_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_RIGHT_INPUT]);
357 snd_ad1848_dout(chip, AD1848_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_LEFT_INPUT]);
358 snd_ad1848_dout(chip, AD1848_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_RIGHT_INPUT]);
359 snd_ad1848_dout(chip, AD1848_LEFT_OUTPUT, mute ? 0x80 : chip->image[AD1848_LEFT_OUTPUT]);
360 snd_ad1848_dout(chip, AD1848_RIGHT_OUTPUT, mute ? 0x80 : chip->image[AD1848_RIGHT_OUTPUT]);
361 chip->calibrate_mute = mute;
362 spin_unlock_irqrestore(&chip->reg_lock, flags);
363}
364
c8ff6647 365static void snd_ad1848_set_data_format(struct snd_ad1848 *chip, struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 366{
367 if (hw_params == NULL) {
368 chip->image[AD1848_DATA_FORMAT] = 0x20;
369 } else {
370 chip->image[AD1848_DATA_FORMAT] =
371 snd_ad1848_get_format(params_format(hw_params), params_channels(hw_params)) |
372 snd_ad1848_get_rate(params_rate(hw_params));
373 }
374 // snd_printk(">>> pmode = 0x%x, dfr = 0x%x\n", pstr->mode, chip->image[AD1848_DATA_FORMAT]);
375}
376
c8ff6647 377static int snd_ad1848_open(struct snd_ad1848 *chip, unsigned int mode)
1da177e4
LT		 378{
379 unsigned long flags;
380
8b7547f9 381 mutex_lock(&chip->open_mutex);
1da177e4 382 if (chip->mode & AD1848_MODE_OPEN) {
8b7547f9 383 mutex_unlock(&chip->open_mutex);
1da177e4
LT		 384 return -EAGAIN;
385 }
386 snd_ad1848_mce_down(chip);
387
388#ifdef SNDRV_DEBUG_MCE
389 snd_printk("open: (1)\n");
390#endif
391 snd_ad1848_mce_up(chip);
392 spin_lock_irqsave(&chip->reg_lock, flags);
393 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
394 AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO |
395 AD1848_CALIB_MODE);
396 chip->image[AD1848_IFACE_CTRL] |= AD1848_AUTOCALIB;
397 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
398 spin_unlock_irqrestore(&chip->reg_lock, flags);
399 snd_ad1848_mce_down(chip);
400
401#ifdef SNDRV_DEBUG_MCE
402 snd_printk("open: (2)\n");
403#endif
404
405 snd_ad1848_set_data_format(chip, NULL);
406
407 snd_ad1848_mce_up(chip);
408 spin_lock_irqsave(&chip->reg_lock, flags);
409 snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
410 spin_unlock_irqrestore(&chip->reg_lock, flags);
411 snd_ad1848_mce_down(chip);
412
413#ifdef SNDRV_DEBUG_MCE
414 snd_printk("open: (3)\n");
415#endif
416
417 /* ok. now enable and ack CODEC IRQ */
418 spin_lock_irqsave(&chip->reg_lock, flags);
419 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
420 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
421 chip->image[AD1848_PIN_CTRL] |= AD1848_IRQ_ENABLE;
422 snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
423 spin_unlock_irqrestore(&chip->reg_lock, flags);
424
425 chip->mode = mode;
8b7547f9 426 mutex_unlock(&chip->open_mutex);
1da177e4
LT		 427
428 return 0;
429}
430
c8ff6647 431static void snd_ad1848_close(struct snd_ad1848 *chip)
1da177e4
LT		 432{
433 unsigned long flags;
434
8b7547f9 435 mutex_lock(&chip->open_mutex);
1da177e4 436 if (!chip->mode) {
8b7547f9 437 mutex_unlock(&chip->open_mutex);
1da177e4
LT		 438 return;
439 }
440 /* disable IRQ */
441 spin_lock_irqsave(&chip->reg_lock, flags);
442 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
443 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
444 chip->image[AD1848_PIN_CTRL] &= ~AD1848_IRQ_ENABLE;
445 snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
446 spin_unlock_irqrestore(&chip->reg_lock, flags);
447
448 /* now disable capture & playback */
449
450 snd_ad1848_mce_up(chip);
451 spin_lock_irqsave(&chip->reg_lock, flags);
452 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
453 AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
454 snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
455 spin_unlock_irqrestore(&chip->reg_lock, flags);
456 snd_ad1848_mce_down(chip);
457
458 /* clear IRQ again */
459 spin_lock_irqsave(&chip->reg_lock, flags);
460 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
461 outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
462 spin_unlock_irqrestore(&chip->reg_lock, flags);
463
464 chip->mode = 0;
8b7547f9 465 mutex_unlock(&chip->open_mutex);
1da177e4
LT		 466}
467
468/*
469 * ok.. exported functions..
470 */
471
c8ff6647 472static int snd_ad1848_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 473 int cmd)
474{
c8ff6647 475 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 476 return snd_ad1848_trigger(chip, AD1848_PLAYBACK_ENABLE, SNDRV_PCM_STREAM_PLAYBACK, cmd);
477}
478
c8ff6647 479static int snd_ad1848_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 480 int cmd)
481{
c8ff6647 482 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 483 return snd_ad1848_trigger(chip, AD1848_CAPTURE_ENABLE, SNDRV_PCM_STREAM_CAPTURE, cmd);
484}
485
c8ff6647
TI		 486static int snd_ad1848_playback_hw_params(struct snd_pcm_substream *substream,
487 struct snd_pcm_hw_params *hw_params)
1da177e4 488{
c8ff6647 489 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 490 unsigned long flags;
491 int err;
492
493 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
494 return err;
495 snd_ad1848_calibrate_mute(chip, 1);
496 snd_ad1848_set_data_format(chip, hw_params);
497 snd_ad1848_mce_up(chip);
498 spin_lock_irqsave(&chip->reg_lock, flags);
499 snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
500 spin_unlock_irqrestore(&chip->reg_lock, flags);
501 snd_ad1848_mce_down(chip);
502 snd_ad1848_calibrate_mute(chip, 0);
503 return 0;
504}
505
c8ff6647 506static int snd_ad1848_playback_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 507{
508 return snd_pcm_lib_free_pages(substream);
509}
510
c8ff6647 511static int snd_ad1848_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 512{
c8ff6647
TI		 513 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
514 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 515 unsigned long flags;
516 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
517 unsigned int count = snd_pcm_lib_period_bytes(substream);
518
519 chip->dma_size = size;
520 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO);
521 snd_dma_program(chip->dma, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
522 count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
523 spin_lock_irqsave(&chip->reg_lock, flags);
524 snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
525 snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
526 spin_unlock_irqrestore(&chip->reg_lock, flags);
527 return 0;
528}
529
c8ff6647
TI		 530static int snd_ad1848_capture_hw_params(struct snd_pcm_substream *substream,
531 struct snd_pcm_hw_params *hw_params)
1da177e4 532{
c8ff6647 533 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 534 unsigned long flags;
535 int err;
536
537 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
538 return err;
539 snd_ad1848_calibrate_mute(chip, 1);
540 snd_ad1848_set_data_format(chip, hw_params);
541 snd_ad1848_mce_up(chip);
542 spin_lock_irqsave(&chip->reg_lock, flags);
543 snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
544 spin_unlock_irqrestore(&chip->reg_lock, flags);
545 snd_ad1848_mce_down(chip);
546 snd_ad1848_calibrate_mute(chip, 0);
547 return 0;
548}
549
c8ff6647 550static int snd_ad1848_capture_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 551{
552 return snd_pcm_lib_free_pages(substream);
553}
554
c8ff6647 555static int snd_ad1848_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 556{
c8ff6647
TI		 557 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
558 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 559 unsigned long flags;
560 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
561 unsigned int count = snd_pcm_lib_period_bytes(substream);
562
563 chip->dma_size = size;
564 chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
565 snd_dma_program(chip->dma, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
566 count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
567 spin_lock_irqsave(&chip->reg_lock, flags);
568 snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
569 snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
570 spin_unlock_irqrestore(&chip->reg_lock, flags);
571 return 0;
572}
573
7d12e780 574static irqreturn_t snd_ad1848_interrupt(int irq, void *dev_id)
1da177e4 575{
c8ff6647 576 struct snd_ad1848 *chip = dev_id;
1da177e4
LT		 577
578 if ((chip->mode & AD1848_MODE_PLAY) && chip->playback_substream &&
579 (chip->mode & AD1848_MODE_RUNNING))
580 snd_pcm_period_elapsed(chip->playback_substream);
581 if ((chip->mode & AD1848_MODE_CAPTURE) && chip->capture_substream &&
582 (chip->mode & AD1848_MODE_RUNNING))
583 snd_pcm_period_elapsed(chip->capture_substream);
584 outb(0, AD1848P(chip, STATUS)); /* clear global interrupt bit */
585 return IRQ_HANDLED;
586}
587
c8ff6647 588static snd_pcm_uframes_t snd_ad1848_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 589{
c8ff6647 590 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 591 size_t ptr;
592
593 if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_PLAYBACK_ENABLE))
594 return 0;
595 ptr = snd_dma_pointer(chip->dma, chip->dma_size);
596 return bytes_to_frames(substream->runtime, ptr);
597}
598
c8ff6647 599static snd_pcm_uframes_t snd_ad1848_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 600{
c8ff6647 601 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 602 size_t ptr;
603
604 if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_CAPTURE_ENABLE))
605 return 0;
606 ptr = snd_dma_pointer(chip->dma, chip->dma_size);
607 return bytes_to_frames(substream->runtime, ptr);
608}
609
610/*
611
612 */
613
c8ff6647 614static void snd_ad1848_thinkpad_twiddle(struct snd_ad1848 *chip, int on) {
1da177e4
LT		 615
616 int tmp;
617
618 if (!chip->thinkpad_flag) return;
619
620 outb(0x1c, AD1848_THINKPAD_CTL_PORT1);
621 tmp = inb(AD1848_THINKPAD_CTL_PORT2);
622
623 if (on)
624 /* turn it on */
625 tmp |= AD1848_THINKPAD_CS4248_ENABLE_BIT;
626 else
627 /* turn it off */
628 tmp &= ~AD1848_THINKPAD_CS4248_ENABLE_BIT;
629
630 outb(tmp, AD1848_THINKPAD_CTL_PORT2);
631
632}
633
634#ifdef CONFIG_PM
c66d7f72 635static void snd_ad1848_suspend(struct snd_ad1848 *chip)
1da177e4 636{
1da177e4 637 snd_pcm_suspend_all(chip->pcm);
1da177e4
LT		 638 if (chip->thinkpad_flag)
639 snd_ad1848_thinkpad_twiddle(chip, 0);
1da177e4
LT		 640}
641
c66d7f72 642static void snd_ad1848_resume(struct snd_ad1848 *chip)
1da177e4 643{
c66d7f72 644 int i;
1da177e4
LT		 645
646 if (chip->thinkpad_flag)
647 snd_ad1848_thinkpad_twiddle(chip, 1);
648
c66d7f72
TI		 649 /* clear any pendings IRQ */
650 inb(AD1848P(chip, STATUS));
651 outb(0, AD1848P(chip, STATUS));
652 mb();
1da177e4 653
c66d7f72
TI		 654 snd_ad1848_mce_down(chip);
655 for (i = 0; i < 16; i++)
656 snd_ad1848_out(chip, i, chip->image[i]);
657 snd_ad1848_mce_up(chip);
658 snd_ad1848_mce_down(chip);
1da177e4
LT		 659}
660#endif /* CONFIG_PM */
661
c8ff6647 662static int snd_ad1848_probe(struct snd_ad1848 * chip)
1da177e4
LT		 663{
664 unsigned long flags;
665 int i, id, rev, ad1847;
666 unsigned char *ptr;
667
668#if 0
669 snd_ad1848_debug(chip);
670#endif
671 id = ad1847 = 0;
672 for (i = 0; i < 1000; i++) {
673 mb();
674 if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
675 udelay(500);
676 else {
677 spin_lock_irqsave(&chip->reg_lock, flags);
678 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
679 snd_ad1848_out(chip, AD1848_LEFT_INPUT, 0xaa);
680 snd_ad1848_out(chip, AD1848_RIGHT_INPUT, 0x45);
681 rev = snd_ad1848_in(chip, AD1848_RIGHT_INPUT);
682 if (rev == 0x65) {
683 spin_unlock_irqrestore(&chip->reg_lock, flags);
684 id = 1;
685 ad1847 = 1;
686 break;
687 }
688 if (snd_ad1848_in(chip, AD1848_LEFT_INPUT) == 0xaa && rev == 0x45) {
689 spin_unlock_irqrestore(&chip->reg_lock, flags);
690 id = 1;
691 break;
692 }
693 spin_unlock_irqrestore(&chip->reg_lock, flags);
694 }
695 }
696 if (id != 1)
697 return -ENODEV; /* no valid device found */
698 if (chip->hardware == AD1848_HW_DETECT) {
699 if (ad1847) {
700 chip->hardware = AD1848_HW_AD1847;
701 } else {
702 chip->hardware = AD1848_HW_AD1848;
703 rev = snd_ad1848_in(chip, AD1848_MISC_INFO);
704 if (rev & 0x80) {
705 chip->hardware = AD1848_HW_CS4248;
706 } else if ((rev & 0x0f) == 0x0a) {
707 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x40);
708 for (i = 0; i < 16; ++i) {
709 if (snd_ad1848_in(chip, i) != snd_ad1848_in(chip, i + 16)) {
710 chip->hardware = AD1848_HW_CMI8330;
711 break;
712 }
713 }
714 snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
715 }
716 }
717 }
718 spin_lock_irqsave(&chip->reg_lock, flags);
719 inb(AD1848P(chip, STATUS)); /* clear any pendings IRQ */
720 outb(0, AD1848P(chip, STATUS));
721 mb();
722 spin_unlock_irqrestore(&chip->reg_lock, flags);
723
724 chip->image[AD1848_MISC_INFO] = 0x00;
725 chip->image[AD1848_IFACE_CTRL] =
726 (chip->image[AD1848_IFACE_CTRL] & ~AD1848_SINGLE_DMA) | AD1848_SINGLE_DMA;
727 ptr = (unsigned char *) &chip->image;
728 snd_ad1848_mce_down(chip);
729 spin_lock_irqsave(&chip->reg_lock, flags);
730 for (i = 0; i < 16; i++) /* ok.. fill all AD1848 registers */
731 snd_ad1848_out(chip, i, *ptr++);
732 spin_unlock_irqrestore(&chip->reg_lock, flags);
733 snd_ad1848_mce_up(chip);
734 snd_ad1848_mce_down(chip);
735 return 0; /* all things are ok.. */
736}
737
738/*
739
740 */
741
c8ff6647 742static struct snd_pcm_hardware snd_ad1848_playback =
1da177e4
LT		 743{
744 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
745 SNDRV_PCM_INFO_MMAP_VALID),
746 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
747 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
748 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
749 .rate_min = 5510,
750 .rate_max = 48000,
751 .channels_min = 1,
752 .channels_max = 2,
753 .buffer_bytes_max = (128*1024),
754 .period_bytes_min = 64,
755 .period_bytes_max = (128*1024),
756 .periods_min = 1,
757 .periods_max = 1024,
758 .fifo_size = 0,
759};
760
c8ff6647 761static struct snd_pcm_hardware snd_ad1848_capture =
1da177e4
LT		 762{
763 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
764 SNDRV_PCM_INFO_MMAP_VALID),
765 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
766 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
767 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
768 .rate_min = 5510,
769 .rate_max = 48000,
770 .channels_min = 1,
771 .channels_max = 2,
772 .buffer_bytes_max = (128*1024),
773 .period_bytes_min = 64,
774 .period_bytes_max = (128*1024),
775 .periods_min = 1,
776 .periods_max = 1024,
777 .fifo_size = 0,
778};
779
780/*
781
782 */
783
c8ff6647 784static int snd_ad1848_playback_open(struct snd_pcm_substream *substream)
1da177e4 785{
c8ff6647
TI		 786 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
787 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 788 int err;
789
790 if ((err = snd_ad1848_open(chip, AD1848_MODE_PLAY)) < 0)
791 return err;
792 chip->playback_substream = substream;
793 runtime->hw = snd_ad1848_playback;
794 snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.buffer_bytes_max);
795 snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.period_bytes_max);
796 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
797 return 0;
798}
799
c8ff6647 800static int snd_ad1848_capture_open(struct snd_pcm_substream *substream)
1da177e4 801{
c8ff6647
TI		 802 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
803 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 804 int err;
805
806 if ((err = snd_ad1848_open(chip, AD1848_MODE_CAPTURE)) < 0)
807 return err;
808 chip->capture_substream = substream;
809 runtime->hw = snd_ad1848_capture;
810 snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.buffer_bytes_max);
811 snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.period_bytes_max);
812 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
813 return 0;
814}
815
c8ff6647 816static int snd_ad1848_playback_close(struct snd_pcm_substream *substream)
1da177e4 817{
c8ff6647 818 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 819
820 chip->mode &= ~AD1848_MODE_PLAY;
821 chip->playback_substream = NULL;
822 snd_ad1848_close(chip);
823 return 0;
824}
825
c8ff6647 826static int snd_ad1848_capture_close(struct snd_pcm_substream *substream)
1da177e4 827{
c8ff6647 828 struct snd_ad1848 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 829
830 chip->mode &= ~AD1848_MODE_CAPTURE;
831 chip->capture_substream = NULL;
832 snd_ad1848_close(chip);
833 return 0;
834}
835
c8ff6647 836static int snd_ad1848_free(struct snd_ad1848 *chip)
1da177e4 837{
b1d5776d 838 release_and_free_resource(chip->res_port);
1da177e4
LT		 839 if (chip->irq >= 0)
840 free_irq(chip->irq, (void *) chip);
841 if (chip->dma >= 0) {
842 snd_dma_disable(chip->dma);
843 free_dma(chip->dma);
844 }
845 kfree(chip);
846 return 0;
847}
848
c8ff6647 849static int snd_ad1848_dev_free(struct snd_device *device)
1da177e4 850{
c8ff6647 851 struct snd_ad1848 *chip = device->device_data;
1da177e4
LT		 852 return snd_ad1848_free(chip);
853}
854
c8ff6647 855static const char *snd_ad1848_chip_id(struct snd_ad1848 *chip)
1da177e4
LT		 856{
857 switch (chip->hardware) {
858 case AD1848_HW_AD1847: return "AD1847";
859 case AD1848_HW_AD1848: return "AD1848";
860 case AD1848_HW_CS4248: return "CS4248";
861 case AD1848_HW_CMI8330: return "CMI8330/C3D";
862 default: return "???";
863 }
864}
865
c8ff6647 866int snd_ad1848_create(struct snd_card *card,
1da177e4
LT		 867 unsigned long port,
868 int irq, int dma,
869 unsigned short hardware,
c8ff6647 870 struct snd_ad1848 ** rchip)
1da177e4 871{
c8ff6647 872 static struct snd_device_ops ops = {
1da177e4
LT		 873 .dev_free = snd_ad1848_dev_free,
874 };
c8ff6647 875 struct snd_ad1848 *chip;
1da177e4
LT		 876 int err;
877
878 *rchip = NULL;
9e76a76e 879 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 880 if (chip == NULL)
881 return -ENOMEM;
882 spin_lock_init(&chip->reg_lock);
8b7547f9 883 mutex_init(&chip->open_mutex);
1da177e4
LT		 884 chip->card = card;
885 chip->port = port;
886 chip->irq = -1;
887 chip->dma = -1;
888 chip->hardware = hardware;
889 memcpy(&chip->image, &snd_ad1848_original_image, sizeof(snd_ad1848_original_image));
890
891 if ((chip->res_port = request_region(port, 4, "AD1848")) == NULL) {
892 snd_printk(KERN_ERR "ad1848: can't grab port 0x%lx\n", port);
893 snd_ad1848_free(chip);
894 return -EBUSY;
895 }
65ca68b3 896 if (request_irq(irq, snd_ad1848_interrupt, IRQF_DISABLED, "AD1848", (void *) chip)) {
1da177e4
LT		 897 snd_printk(KERN_ERR "ad1848: can't grab IRQ %d\n", irq);
898 snd_ad1848_free(chip);
899 return -EBUSY;
900 }
901 chip->irq = irq;
902 if (request_dma(dma, "AD1848")) {
903 snd_printk(KERN_ERR "ad1848: can't grab DMA %d\n", dma);
904 snd_ad1848_free(chip);
905 return -EBUSY;
906 }
907 chip->dma = dma;
908
909 if (hardware == AD1848_HW_THINKPAD) {
910 chip->thinkpad_flag = 1;
911 chip->hardware = AD1848_HW_DETECT; /* reset */
912 snd_ad1848_thinkpad_twiddle(chip, 1);
1da177e4
LT		 913 }
914
915 if (snd_ad1848_probe(chip) < 0) {
916 snd_ad1848_free(chip);
917 return -ENODEV;
918 }
919
920 /* Register device */
921 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
922 snd_ad1848_free(chip);
923 return err;
924 }
925
9d70d91c 926#ifdef CONFIG_PM
c66d7f72
TI		 927 chip->suspend = snd_ad1848_suspend;
928 chip->resume = snd_ad1848_resume;
9d70d91c 929#endif
c66d7f72 930
1da177e4
LT		 931 *rchip = chip;
932 return 0;
933}
934
eac06a10
TI		 935EXPORT_SYMBOL(snd_ad1848_create);
936
c8ff6647 937static struct snd_pcm_ops snd_ad1848_playback_ops = {
1da177e4
LT		 938 .open = snd_ad1848_playback_open,
939 .close = snd_ad1848_playback_close,
940 .ioctl = snd_ad1848_ioctl,
941 .hw_params = snd_ad1848_playback_hw_params,
942 .hw_free = snd_ad1848_playback_hw_free,
943 .prepare = snd_ad1848_playback_prepare,
944 .trigger = snd_ad1848_playback_trigger,
945 .pointer = snd_ad1848_playback_pointer,
946};
947
c8ff6647 948static struct snd_pcm_ops snd_ad1848_capture_ops = {
1da177e4
LT		 949 .open = snd_ad1848_capture_open,
950 .close = snd_ad1848_capture_close,
951 .ioctl = snd_ad1848_ioctl,
952 .hw_params = snd_ad1848_capture_hw_params,
953 .hw_free = snd_ad1848_capture_hw_free,
954 .prepare = snd_ad1848_capture_prepare,
955 .trigger = snd_ad1848_capture_trigger,
956 .pointer = snd_ad1848_capture_pointer,
957};
958
c8ff6647 959int snd_ad1848_pcm(struct snd_ad1848 *chip, int device, struct snd_pcm **rpcm)
1da177e4 960{
c8ff6647 961 struct snd_pcm *pcm;
1da177e4
LT		 962 int err;
963
964 if ((err = snd_pcm_new(chip->card, "AD1848", device, 1, 1, &pcm)) < 0)
965 return err;
966
967 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1848_playback_ops);
968 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1848_capture_ops);
969
1da177e4
LT		 970 pcm->private_data = chip;
971 pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
972 strcpy(pcm->name, snd_ad1848_chip_id(chip));
973
974 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
975 snd_dma_isa_data(),
976 64*1024, chip->dma > 3 ? 128*1024 : 64*1024);
977
978 chip->pcm = pcm;
979 if (rpcm)
980 *rpcm = pcm;
981 return 0;
982}
983
eac06a10
TI		 984EXPORT_SYMBOL(snd_ad1848_pcm);
985
c8ff6647 986const struct snd_pcm_ops *snd_ad1848_get_pcm_ops(int direction)
1da177e4
LT		 987{
988 return direction == SNDRV_PCM_STREAM_PLAYBACK ?
989 &snd_ad1848_playback_ops : &snd_ad1848_capture_ops;
990}
991
eac06a10
TI		 992EXPORT_SYMBOL(snd_ad1848_get_pcm_ops);
993
1da177e4
LT		 994/*
995 * MIXER part
996 */
997
c8ff6647 998static int snd_ad1848_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 999{
1000 static char *texts[4] = {
1001 "Line", "Aux", "Mic", "Mix"
1002 };
1003
1004 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1005 uinfo->count = 2;
1006 uinfo->value.enumerated.items = 4;
1007 if (uinfo->value.enumerated.item > 3)
1008 uinfo->value.enumerated.item = 3;
1009 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1010 return 0;
1011}
1012
c8ff6647 1013static int snd_ad1848_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1014{
c8ff6647 1015 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1016 unsigned long flags;
1017
1018 spin_lock_irqsave(&chip->reg_lock, flags);
1019 ucontrol->value.enumerated.item[0] = (chip->image[AD1848_LEFT_INPUT] & AD1848_MIXS_ALL) >> 6;
1020 ucontrol->value.enumerated.item[1] = (chip->image[AD1848_RIGHT_INPUT] & AD1848_MIXS_ALL) >> 6;
1021 spin_unlock_irqrestore(&chip->reg_lock, flags);
1022 return 0;
1023}
1024
c8ff6647 1025static int snd_ad1848_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1026{
c8ff6647 1027 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1028 unsigned long flags;
1029 unsigned short left, right;
1030 int change;
1031
1032 if (ucontrol->value.enumerated.item[0] > 3 ||
1033 ucontrol->value.enumerated.item[1] > 3)
1034 return -EINVAL;
1035 left = ucontrol->value.enumerated.item[0] << 6;
1036 right = ucontrol->value.enumerated.item[1] << 6;
1037 spin_lock_irqsave(&chip->reg_lock, flags);
1038 left = (chip->image[AD1848_LEFT_INPUT] & ~AD1848_MIXS_ALL) | left;
1039 right = (chip->image[AD1848_RIGHT_INPUT] & ~AD1848_MIXS_ALL) | right;
1040 change = left != chip->image[AD1848_LEFT_INPUT] ||
1041 right != chip->image[AD1848_RIGHT_INPUT];
1042 snd_ad1848_out(chip, AD1848_LEFT_INPUT, left);
1043 snd_ad1848_out(chip, AD1848_RIGHT_INPUT, right);
1044 spin_unlock_irqrestore(&chip->reg_lock, flags);
1045 return change;
1046}
1047
c8ff6647 1048static int snd_ad1848_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1049{
1050 int mask = (kcontrol->private_value >> 16) & 0xff;
1051
1052 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1053 uinfo->count = 1;
1054 uinfo->value.integer.min = 0;
1055 uinfo->value.integer.max = mask;
1056 return 0;
1057}
1058
c8ff6647 1059static int snd_ad1848_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1060{
c8ff6647 1061 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1062 unsigned long flags;
1063 int reg = kcontrol->private_value & 0xff;
1064 int shift = (kcontrol->private_value >> 8) & 0xff;
1065 int mask = (kcontrol->private_value >> 16) & 0xff;
1066 int invert = (kcontrol->private_value >> 24) & 0xff;
1067
1068 spin_lock_irqsave(&chip->reg_lock, flags);
1069 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1070 spin_unlock_irqrestore(&chip->reg_lock, flags);
1071 if (invert)
1072 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1073 return 0;
1074}
1075
c8ff6647 1076static int snd_ad1848_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1077{
c8ff6647 1078 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1079 unsigned long flags;
1080 int reg = kcontrol->private_value & 0xff;
1081 int shift = (kcontrol->private_value >> 8) & 0xff;
1082 int mask = (kcontrol->private_value >> 16) & 0xff;
1083 int invert = (kcontrol->private_value >> 24) & 0xff;
1084 int change;
1085 unsigned short val;
1086
1087 val = (ucontrol->value.integer.value[0] & mask);
1088 if (invert)
1089 val = mask - val;
1090 val <<= shift;
1091 spin_lock_irqsave(&chip->reg_lock, flags);
1092 val = (chip->image[reg] & ~(mask << shift)) | val;
1093 change = val != chip->image[reg];
1094 snd_ad1848_out(chip, reg, val);
1095 spin_unlock_irqrestore(&chip->reg_lock, flags);
1096 return change;
1097}
1098
c8ff6647 1099static int snd_ad1848_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1100{
1101 int mask = (kcontrol->private_value >> 24) & 0xff;
1102
1103 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1104 uinfo->count = 2;
1105 uinfo->value.integer.min = 0;
1106 uinfo->value.integer.max = mask;
1107 return 0;
1108}
1109
c8ff6647 1110static int snd_ad1848_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1111{
c8ff6647 1112 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1113 unsigned long flags;
1114 int left_reg = kcontrol->private_value & 0xff;
1115 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1116 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1117 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1118 int mask = (kcontrol->private_value >> 24) & 0xff;
1119 int invert = (kcontrol->private_value >> 22) & 1;
1120
1121 spin_lock_irqsave(&chip->reg_lock, flags);
1122 ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1123 ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1124 spin_unlock_irqrestore(&chip->reg_lock, flags);
1125 if (invert) {
1126 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1127 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1128 }
1129 return 0;
1130}
1131
c8ff6647 1132static int snd_ad1848_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 1133{
c8ff6647 1134 struct snd_ad1848 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1135 unsigned long flags;
1136 int left_reg = kcontrol->private_value & 0xff;
1137 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1138 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1139 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1140 int mask = (kcontrol->private_value >> 24) & 0xff;
1141 int invert = (kcontrol->private_value >> 22) & 1;
1142 int change;
1143 unsigned short val1, val2;
1144
1145 val1 = ucontrol->value.integer.value[0] & mask;
1146 val2 = ucontrol->value.integer.value[1] & mask;
1147 if (invert) {
1148 val1 = mask - val1;
1149 val2 = mask - val2;
1150 }
1151 val1 <<= shift_left;
1152 val2 <<= shift_right;
1153 spin_lock_irqsave(&chip->reg_lock, flags);
1154 if (left_reg != right_reg) {
1155 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1156 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1157 change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1158 snd_ad1848_out(chip, left_reg, val1);
1159 snd_ad1848_out(chip, right_reg, val2);
1160 } else {
1161 val1 = (chip->image[left_reg] & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1162 change = val1 != chip->image[left_reg];
1163 snd_ad1848_out(chip, left_reg, val1);
1164 }
1165 spin_unlock_irqrestore(&chip->reg_lock, flags);
1166 return change;
1167}
1168
1169/*
1170 */
eac06a10
TI		 1171int snd_ad1848_add_ctl_elem(struct snd_ad1848 *chip,
1172 const struct ad1848_mix_elem *c)
1da177e4 1173{
c8ff6647 1174 static struct snd_kcontrol_new newctls[] = {
1da177e4
LT		 1175 [AD1848_MIX_SINGLE] = {
1176 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1177 .info = snd_ad1848_info_single,
1178 .get = snd_ad1848_get_single,
1179 .put = snd_ad1848_put_single,
1180 },
1181 [AD1848_MIX_DOUBLE] = {
1182 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1183 .info = snd_ad1848_info_double,
1184 .get = snd_ad1848_get_double,
1185 .put = snd_ad1848_put_double,
1186 },
1187 [AD1848_MIX_CAPTURE] = {
67ed4161 1188 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1da177e4
LT		 1189 .info = snd_ad1848_info_mux,
1190 .get = snd_ad1848_get_mux,
1191 .put = snd_ad1848_put_mux,
1192 },
1193 };
c8ff6647 1194 struct snd_kcontrol *ctl;
1da177e4
LT		 1195 int err;
1196
eac06a10 1197 ctl = snd_ctl_new1(&newctls[c->type], chip);
1da177e4
LT		 1198 if (! ctl)
1199 return -ENOMEM;
eac06a10
TI		 1200 strlcpy(ctl->id.name, c->name, sizeof(ctl->id.name));
1201 ctl->id.index = c->index;
1202 ctl->private_value = c->private_value;
1203 if (c->tlv) {
1204 ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
1205 ctl->tlv.p = c->tlv;
1206 }
3de4414e 1207 if ((err = snd_ctl_add(chip->card, ctl)) < 0)
1da177e4 1208 return err;
1da177e4
LT		 1209 return 0;
1210}
1211
eac06a10
TI		 1212EXPORT_SYMBOL(snd_ad1848_add_ctl_elem);
1213
0cb29ea0
TI		 1214static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
1215static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
1216static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
1da177e4
LT		 1217
1218static struct ad1848_mix_elem snd_ad1848_controls[] = {
1219AD1848_DOUBLE("PCM Playback Switch", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 7, 7, 1, 1),
eac06a10
TI		 1220AD1848_DOUBLE_TLV("PCM Playback Volume", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 0, 0, 63, 1,
1221 db_scale_6bit),
1da177e4 1222AD1848_DOUBLE("Aux Playback Switch", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
eac06a10
TI		 1223AD1848_DOUBLE_TLV("Aux Playback Volume", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 0, 0, 31, 1,
1224 db_scale_5bit_12db_max),
1da177e4 1225AD1848_DOUBLE("Aux Playback Switch", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
eac06a10
TI		 1226AD1848_DOUBLE_TLV("Aux Playback Volume", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 0, 0, 31, 1,
1227 db_scale_5bit_12db_max),
1228AD1848_DOUBLE_TLV("Capture Volume", 0, AD1848_LEFT_INPUT, AD1848_RIGHT_INPUT, 0, 0, 15, 0,
1229 db_scale_rec_gain),
1da177e4
LT		 1230{
1231 .name = "Capture Source",
1232 .type = AD1848_MIX_CAPTURE,
1233},
1234AD1848_SINGLE("Loopback Capture Switch", 0, AD1848_LOOPBACK, 0, 1, 0),
eac06a10
TI		 1235AD1848_SINGLE_TLV("Loopback Capture Volume", 0, AD1848_LOOPBACK, 1, 63, 0,
1236 db_scale_6bit),
1da177e4
LT		 1237};
1238
c8ff6647 1239int snd_ad1848_mixer(struct snd_ad1848 *chip)
1da177e4 1240{
c8ff6647
TI		 1241 struct snd_card *card;
1242 struct snd_pcm *pcm;
1da177e4
LT		 1243 unsigned int idx;
1244 int err;
1245
1246 snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1247
1248 pcm = chip->pcm;
1249 card = chip->card;
1250
1251 strcpy(card->mixername, pcm->name);
1252
1253 for (idx = 0; idx < ARRAY_SIZE(snd_ad1848_controls); idx++)
1254 if ((err = snd_ad1848_add_ctl_elem(chip, &snd_ad1848_controls[idx])) < 0)
1255 return err;
1256
1257 return 0;
1258}
1259
1da177e4 1260EXPORT_SYMBOL(snd_ad1848_mixer);
1da177e4
LT		 1261
1262/*
1263 * INIT part
1264 */
1265
1266static int __init alsa_ad1848_init(void)
1267{
1268 return 0;
1269}
1270
1271static void __exit alsa_ad1848_exit(void)
1272{
1273}
1274
1275module_init(alsa_ad1848_init)
1276module_exit(alsa_ad1848_exit)
Linux 6.x block layer and io_uring tree(s)