ALSA: firewire-digi00x: add PCM functionality
[linux-2.6-block.git] / sound / firewire / digi00x / digi00x.h
CommitLineData
9edf723f
TS
1/*
2 * digi00x.h - a part of driver for Digidesign Digi 002/003 family
3 *
4 * Copyright (c) 2014-2015 Takashi Sakamoto
5 *
6 * Licensed under the terms of the GNU General Public License, version 2.
7 */
8
9#ifndef SOUND_DIGI00X_H_INCLUDED
10#define SOUND_DIGI00X_H_INCLUDED
11
12#include <linux/compat.h>
13#include <linux/device.h>
14#include <linux/firewire.h>
15#include <linux/module.h>
16#include <linux/mod_devicetable.h>
17#include <linux/delay.h>
18#include <linux/slab.h>
19
20#include <sound/core.h>
21#include <sound/initval.h>
927f17dc 22#include <sound/info.h>
163ae6f3
TS
23#include <sound/pcm.h>
24#include <sound/pcm_params.h>
9edf723f
TS
25
26#include "../lib.h"
163ae6f3
TS
27#include "../iso-resources.h"
28#include "../amdtp-stream.h"
9edf723f
TS
29
30struct snd_dg00x {
31 struct snd_card *card;
32 struct fw_unit *unit;
33
34 struct mutex mutex;
3a2a1797
TS
35
36 struct amdtp_stream tx_stream;
37 struct fw_iso_resources tx_resources;
38
39 struct amdtp_stream rx_stream;
40 struct fw_iso_resources rx_resources;
41
42 unsigned int substreams_counter;
43};
44
45#define DG00X_ADDR_BASE 0xffffe0000000ull
46
47#define DG00X_OFFSET_STREAMING_STATE 0x0000
48#define DG00X_OFFSET_STREAMING_SET 0x0004
49#define DG00X_OFFSET_MIDI_CTL_ADDR 0x0008
50/* For LSB of the address 0x000c */
51/* unknown 0x0010 */
52#define DG00X_OFFSET_MESSAGE_ADDR 0x0014
53/* For LSB of the address 0x0018 */
54/* unknown 0x001c */
55/* unknown 0x0020 */
56/* not used 0x0024--0x00ff */
57#define DG00X_OFFSET_ISOC_CHANNELS 0x0100
58/* unknown 0x0104 */
59/* unknown 0x0108 */
60/* unknown 0x010c */
61#define DG00X_OFFSET_LOCAL_RATE 0x0110
62#define DG00X_OFFSET_EXTERNAL_RATE 0x0114
63#define DG00X_OFFSET_CLOCK_SOURCE 0x0118
64#define DG00X_OFFSET_OPT_IFACE_MODE 0x011c
65/* unknown 0x0120 */
66/* Mixer control on/off 0x0124 */
67/* unknown 0x0128 */
68#define DG00X_OFFSET_DETECT_EXTERNAL 0x012c
69/* unknown 0x0138 */
70#define DG00X_OFFSET_MMC 0x0400
71
72enum snd_dg00x_rate {
73 SND_DG00X_RATE_44100 = 0,
74 SND_DG00X_RATE_48000,
75 SND_DG00X_RATE_88200,
76 SND_DG00X_RATE_96000,
77 SND_DG00X_RATE_COUNT,
78};
79
80enum snd_dg00x_clock {
81 SND_DG00X_CLOCK_INTERNAL = 0,
82 SND_DG00X_CLOCK_SPDIF,
83 SND_DG00X_CLOCK_ADAT,
84 SND_DG00X_CLOCK_WORD,
85 SND_DG00X_CLOCK_COUNT,
9edf723f
TS
86};
87
927f17dc
TS
88enum snd_dg00x_optical_mode {
89 SND_DG00X_OPT_IFACE_MODE_ADAT = 0,
90 SND_DG00X_OPT_IFACE_MODE_SPDIF,
91 SND_DG00X_OPT_IFACE_MODE_COUNT,
92};
93
163ae6f3
TS
94int amdtp_dot_init(struct amdtp_stream *s, struct fw_unit *unit,
95 enum amdtp_stream_direction dir);
96int amdtp_dot_set_parameters(struct amdtp_stream *s, unsigned int rate,
97 unsigned int pcm_channels,
98 unsigned int midi_ports);
99void amdtp_dot_reset(struct amdtp_stream *s);
100int amdtp_dot_add_pcm_hw_constraints(struct amdtp_stream *s,
101 struct snd_pcm_runtime *runtime);
102void amdtp_dot_set_pcm_format(struct amdtp_stream *s, snd_pcm_format_t format);
103
3a2a1797
TS
104extern const unsigned int snd_dg00x_stream_rates[SND_DG00X_RATE_COUNT];
105extern const unsigned int snd_dg00x_stream_pcm_channels[SND_DG00X_RATE_COUNT];
106int snd_dg00x_stream_get_external_rate(struct snd_dg00x *dg00x,
107 unsigned int *rate);
108int snd_dg00x_stream_get_local_rate(struct snd_dg00x *dg00x,
109 unsigned int *rate);
110int snd_dg00x_stream_set_local_rate(struct snd_dg00x *dg00x, unsigned int rate);
111int snd_dg00x_stream_get_clock(struct snd_dg00x *dg00x,
112 enum snd_dg00x_clock *clock);
113int snd_dg00x_stream_check_external_clock(struct snd_dg00x *dg00x,
114 bool *detect);
115int snd_dg00x_stream_init_duplex(struct snd_dg00x *dg00x);
116int snd_dg00x_stream_start_duplex(struct snd_dg00x *dg00x, unsigned int rate);
117void snd_dg00x_stream_stop_duplex(struct snd_dg00x *dg00x);
118void snd_dg00x_stream_update_duplex(struct snd_dg00x *dg00x);
119void snd_dg00x_stream_destroy_duplex(struct snd_dg00x *dg00x);
120
927f17dc 121void snd_dg00x_proc_init(struct snd_dg00x *dg00x);
0120d0f1
TS
122
123int snd_dg00x_create_pcm_devices(struct snd_dg00x *dg00x);
124
9edf723f 125#endif