Merge tag 'zynqmp-soc-for-v5.2' of https://github.com/Xilinx/linux-xlnx into arm...
[linux-2.6-block.git] / sound / firewire / amdtp-stream.c
CommitLineData
31ef9134
CL
1/*
2 * Audio and Music Data Transmission Protocol (IEC 61883-6) streams
3 * with Common Isochronous Packet (IEC 61883-1) headers
4 *
5 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
6 * Licensed under the terms of the GNU General Public License, version 2.
7 */
8
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/firewire.h>
12#include <linux/module.h>
13#include <linux/slab.h>
14#include <sound/pcm.h>
7b2d99fa 15#include <sound/pcm_params.h>
d67c46b9 16#include "amdtp-stream.h"
31ef9134
CL
17
18#define TICKS_PER_CYCLE 3072
19#define CYCLES_PER_SECOND 8000
20#define TICKS_PER_SECOND (TICKS_PER_CYCLE * CYCLES_PER_SECOND)
21
0c95c1d6
TS
22/* Always support Linux tracing subsystem. */
23#define CREATE_TRACE_POINTS
24#include "amdtp-stream-trace.h"
25
ca5b5050 26#define TRANSFER_DELAY_TICKS 0x2e00 /* 479.17 microseconds */
31ef9134 27
b445db44
TS
28/* isochronous header parameters */
29#define ISO_DATA_LENGTH_SHIFT 16
3b196c39 30#define TAG_NO_CIP_HEADER 0
31ef9134
CL
31#define TAG_CIP 1
32
b445db44 33/* common isochronous packet header parameters */
9a2820c1
TS
34#define CIP_EOH_SHIFT 31
35#define CIP_EOH (1u << CIP_EOH_SHIFT)
b445db44 36#define CIP_EOH_MASK 0x80000000
9a2820c1
TS
37#define CIP_SID_SHIFT 24
38#define CIP_SID_MASK 0x3f000000
39#define CIP_DBS_MASK 0x00ff0000
40#define CIP_DBS_SHIFT 16
9863874f
TS
41#define CIP_SPH_MASK 0x00000400
42#define CIP_SPH_SHIFT 10
9a2820c1
TS
43#define CIP_DBC_MASK 0x000000ff
44#define CIP_FMT_SHIFT 24
b445db44 45#define CIP_FMT_MASK 0x3f000000
9a2820c1
TS
46#define CIP_FDF_MASK 0x00ff0000
47#define CIP_FDF_SHIFT 16
b445db44
TS
48#define CIP_SYT_MASK 0x0000ffff
49#define CIP_SYT_NO_INFO 0xffff
b445db44 50
51c29fd2 51/* Audio and Music transfer protocol specific parameters */
414ba022 52#define CIP_FMT_AM 0x10
2b3fc456 53#define AMDTP_FDF_NO_DATA 0xff
31ef9134
CL
54
55/* TODO: make these configurable */
56#define INTERRUPT_INTERVAL 16
57#define QUEUE_LENGTH 48
58
2b3fc456 59#define IN_PACKET_HEADER_SIZE 4
4b7da117
TS
60#define OUT_PACKET_HEADER_SIZE 0
61
76fb8789
CL
62static void pcm_period_tasklet(unsigned long data);
63
31ef9134 64/**
be4a2894
TS
65 * amdtp_stream_init - initialize an AMDTP stream structure
66 * @s: the AMDTP stream to initialize
31ef9134 67 * @unit: the target of the stream
3ff7e8f0 68 * @dir: the direction of stream
31ef9134 69 * @flags: the packet transmission method to use
5955815e 70 * @fmt: the value of fmt field in CIP header
df075fee
TS
71 * @process_data_blocks: callback handler to process data blocks
72 * @protocol_size: the size to allocate newly for protocol
31ef9134 73 */
be4a2894 74int amdtp_stream_init(struct amdtp_stream *s, struct fw_unit *unit,
5955815e 75 enum amdtp_stream_direction dir, enum cip_flags flags,
df075fee
TS
76 unsigned int fmt,
77 amdtp_stream_process_data_blocks_t process_data_blocks,
78 unsigned int protocol_size)
31ef9134 79{
df075fee
TS
80 if (process_data_blocks == NULL)
81 return -EINVAL;
82
83 s->protocol = kzalloc(protocol_size, GFP_KERNEL);
84 if (!s->protocol)
85 return -ENOMEM;
86
c6f224dc 87 s->unit = unit;
3ff7e8f0 88 s->direction = dir;
31ef9134
CL
89 s->flags = flags;
90 s->context = ERR_PTR(-1);
91 mutex_init(&s->mutex);
76fb8789 92 tasklet_init(&s->period_tasklet, pcm_period_tasklet, (unsigned long)s);
ec00f5e4 93 s->packet_index = 0;
31ef9134 94
7b3b0d85
TS
95 init_waitqueue_head(&s->callback_wait);
96 s->callbacked = false;
7b3b0d85 97
5955815e 98 s->fmt = fmt;
df075fee 99 s->process_data_blocks = process_data_blocks;
414ba022 100
31ef9134
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101 return 0;
102}
be4a2894 103EXPORT_SYMBOL(amdtp_stream_init);
31ef9134
CL
104
105/**
be4a2894
TS
106 * amdtp_stream_destroy - free stream resources
107 * @s: the AMDTP stream to destroy
31ef9134 108 */
be4a2894 109void amdtp_stream_destroy(struct amdtp_stream *s)
31ef9134 110{
44c376b9
TS
111 /* Not initialized. */
112 if (s->protocol == NULL)
113 return;
114
be4a2894 115 WARN_ON(amdtp_stream_running(s));
df075fee 116 kfree(s->protocol);
31ef9134 117 mutex_destroy(&s->mutex);
31ef9134 118}
be4a2894 119EXPORT_SYMBOL(amdtp_stream_destroy);
31ef9134 120
c5280e99 121const unsigned int amdtp_syt_intervals[CIP_SFC_COUNT] = {
a7304e3b
CL
122 [CIP_SFC_32000] = 8,
123 [CIP_SFC_44100] = 8,
124 [CIP_SFC_48000] = 8,
125 [CIP_SFC_88200] = 16,
126 [CIP_SFC_96000] = 16,
127 [CIP_SFC_176400] = 32,
128 [CIP_SFC_192000] = 32,
129};
130EXPORT_SYMBOL(amdtp_syt_intervals);
131
f9503a68 132const unsigned int amdtp_rate_table[CIP_SFC_COUNT] = {
1017abed
TS
133 [CIP_SFC_32000] = 32000,
134 [CIP_SFC_44100] = 44100,
135 [CIP_SFC_48000] = 48000,
136 [CIP_SFC_88200] = 88200,
137 [CIP_SFC_96000] = 96000,
138 [CIP_SFC_176400] = 176400,
139 [CIP_SFC_192000] = 192000,
140};
141EXPORT_SYMBOL(amdtp_rate_table);
142
59502295
TS
143static int apply_constraint_to_size(struct snd_pcm_hw_params *params,
144 struct snd_pcm_hw_rule *rule)
145{
146 struct snd_interval *s = hw_param_interval(params, rule->var);
147 const struct snd_interval *r =
148 hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_RATE);
826b5de9
TS
149 struct snd_interval t = {0};
150 unsigned int step = 0;
59502295
TS
151 int i;
152
153 for (i = 0; i < CIP_SFC_COUNT; ++i) {
826b5de9
TS
154 if (snd_interval_test(r, amdtp_rate_table[i]))
155 step = max(step, amdtp_syt_intervals[i]);
59502295
TS
156 }
157
826b5de9
TS
158 t.min = roundup(s->min, step);
159 t.max = rounddown(s->max, step);
160 t.integer = 1;
59502295
TS
161
162 return snd_interval_refine(s, &t);
163}
164
7b2d99fa
TS
165/**
166 * amdtp_stream_add_pcm_hw_constraints - add hw constraints for PCM substream
167 * @s: the AMDTP stream, which must be initialized.
168 * @runtime: the PCM substream runtime
169 */
170int amdtp_stream_add_pcm_hw_constraints(struct amdtp_stream *s,
171 struct snd_pcm_runtime *runtime)
172{
55799c5a 173 struct snd_pcm_hardware *hw = &runtime->hw;
7b2d99fa
TS
174 int err;
175
55799c5a
TS
176 hw->info = SNDRV_PCM_INFO_BATCH |
177 SNDRV_PCM_INFO_BLOCK_TRANSFER |
178 SNDRV_PCM_INFO_INTERLEAVED |
179 SNDRV_PCM_INFO_JOINT_DUPLEX |
180 SNDRV_PCM_INFO_MMAP |
181 SNDRV_PCM_INFO_MMAP_VALID;
182
183 /* SNDRV_PCM_INFO_BATCH */
184 hw->periods_min = 2;
185 hw->periods_max = UINT_MAX;
186
187 /* bytes for a frame */
188 hw->period_bytes_min = 4 * hw->channels_max;
189
190 /* Just to prevent from allocating much pages. */
191 hw->period_bytes_max = hw->period_bytes_min * 2048;
192 hw->buffer_bytes_max = hw->period_bytes_max * hw->periods_min;
193
7b2d99fa
TS
194 /*
195 * Currently firewire-lib processes 16 packets in one software
196 * interrupt callback. This equals to 2msec but actually the
197 * interval of the interrupts has a jitter.
198 * Additionally, even if adding a constraint to fit period size to
199 * 2msec, actual calculated frames per period doesn't equal to 2msec,
200 * depending on sampling rate.
201 * Anyway, the interval to call snd_pcm_period_elapsed() cannot 2msec.
202 * Here let us use 5msec for safe period interrupt.
203 */
204 err = snd_pcm_hw_constraint_minmax(runtime,
205 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
206 5000, UINT_MAX);
207 if (err < 0)
208 goto end;
209
210 /* Non-Blocking stream has no more constraints */
211 if (!(s->flags & CIP_BLOCKING))
212 goto end;
213
214 /*
215 * One AMDTP packet can include some frames. In blocking mode, the
216 * number equals to SYT_INTERVAL. So the number is 8, 16 or 32,
217 * depending on its sampling rate. For accurate period interrupt, it's
ce991981 218 * preferrable to align period/buffer sizes to current SYT_INTERVAL.
7b2d99fa 219 */
59502295
TS
220 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
221 apply_constraint_to_size, NULL,
826b5de9 222 SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
59502295
TS
223 SNDRV_PCM_HW_PARAM_RATE, -1);
224 if (err < 0)
225 goto end;
59502295
TS
226 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
227 apply_constraint_to_size, NULL,
826b5de9 228 SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
59502295
TS
229 SNDRV_PCM_HW_PARAM_RATE, -1);
230 if (err < 0)
231 goto end;
7b2d99fa
TS
232end:
233 return err;
234}
235EXPORT_SYMBOL(amdtp_stream_add_pcm_hw_constraints);
236
31ef9134 237/**
be4a2894
TS
238 * amdtp_stream_set_parameters - set stream parameters
239 * @s: the AMDTP stream to configure
31ef9134 240 * @rate: the sample rate
df075fee 241 * @data_block_quadlets: the size of a data block in quadlet unit
31ef9134 242 *
a7304e3b 243 * The parameters must be set before the stream is started, and must not be
31ef9134
CL
244 * changed while the stream is running.
245 */
df075fee
TS
246int amdtp_stream_set_parameters(struct amdtp_stream *s, unsigned int rate,
247 unsigned int data_block_quadlets)
31ef9134 248{
df075fee 249 unsigned int sfc;
31ef9134 250
547e631c 251 for (sfc = 0; sfc < ARRAY_SIZE(amdtp_rate_table); ++sfc) {
1017abed 252 if (amdtp_rate_table[sfc] == rate)
547e631c
TS
253 break;
254 }
255 if (sfc == ARRAY_SIZE(amdtp_rate_table))
256 return -EINVAL;
e84d15f6 257
e84d15f6 258 s->sfc = sfc;
df075fee 259 s->data_block_quadlets = data_block_quadlets;
a7304e3b 260 s->syt_interval = amdtp_syt_intervals[sfc];
e84d15f6
CL
261
262 /* default buffering in the device */
263 s->transfer_delay = TRANSFER_DELAY_TICKS - TICKS_PER_CYCLE;
264 if (s->flags & CIP_BLOCKING)
265 /* additional buffering needed to adjust for no-data packets */
266 s->transfer_delay += TICKS_PER_SECOND * s->syt_interval / rate;
77d2a8a4 267
547e631c 268 return 0;
31ef9134 269}
be4a2894 270EXPORT_SYMBOL(amdtp_stream_set_parameters);
31ef9134
CL
271
272/**
be4a2894
TS
273 * amdtp_stream_get_max_payload - get the stream's packet size
274 * @s: the AMDTP stream
31ef9134
CL
275 *
276 * This function must not be called before the stream has been configured
be4a2894 277 * with amdtp_stream_set_parameters().
31ef9134 278 */
be4a2894 279unsigned int amdtp_stream_get_max_payload(struct amdtp_stream *s)
31ef9134 280{
a2064710 281 unsigned int multiplier = 1;
3b196c39 282 unsigned int header_size = 0;
a2064710
TS
283
284 if (s->flags & CIP_JUMBO_PAYLOAD)
285 multiplier = 5;
3b196c39
TS
286 if (!(s->flags & CIP_NO_HEADER))
287 header_size = 8;
a2064710 288
3b196c39
TS
289 return header_size +
290 s->syt_interval * s->data_block_quadlets * 4 * multiplier;
31ef9134 291}
be4a2894 292EXPORT_SYMBOL(amdtp_stream_get_max_payload);
31ef9134 293
76fb8789 294/**
be4a2894
TS
295 * amdtp_stream_pcm_prepare - prepare PCM device for running
296 * @s: the AMDTP stream
76fb8789
CL
297 *
298 * This function should be called from the PCM device's .prepare callback.
299 */
be4a2894 300void amdtp_stream_pcm_prepare(struct amdtp_stream *s)
76fb8789
CL
301{
302 tasklet_kill(&s->period_tasklet);
303 s->pcm_buffer_pointer = 0;
304 s->pcm_period_pointer = 0;
305}
be4a2894 306EXPORT_SYMBOL(amdtp_stream_pcm_prepare);
76fb8789 307
875be091
TS
308static unsigned int calculate_data_blocks(struct amdtp_stream *s,
309 unsigned int syt)
31ef9134
CL
310{
311 unsigned int phase, data_blocks;
312
875be091
TS
313 /* Blocking mode. */
314 if (s->flags & CIP_BLOCKING) {
315 /* This module generate empty packet for 'no data'. */
316 if (syt == CIP_SYT_NO_INFO)
317 data_blocks = 0;
318 else
319 data_blocks = s->syt_interval;
320 /* Non-blocking mode. */
31ef9134 321 } else {
875be091
TS
322 if (!cip_sfc_is_base_44100(s->sfc)) {
323 /* Sample_rate / 8000 is an integer, and precomputed. */
324 data_blocks = s->data_block_state;
325 } else {
326 phase = s->data_block_state;
31ef9134
CL
327
328 /*
329 * This calculates the number of data blocks per packet so that
330 * 1) the overall rate is correct and exactly synchronized to
331 * the bus clock, and
332 * 2) packets with a rounded-up number of blocks occur as early
333 * as possible in the sequence (to prevent underruns of the
334 * device's buffer).
335 */
875be091
TS
336 if (s->sfc == CIP_SFC_44100)
337 /* 6 6 5 6 5 6 5 ... */
338 data_blocks = 5 + ((phase & 1) ^
339 (phase == 0 || phase >= 40));
340 else
341 /* 12 11 11 11 11 ... or 23 22 22 22 22 ... */
342 data_blocks = 11 * (s->sfc >> 1) + (phase == 0);
343 if (++phase >= (80 >> (s->sfc >> 1)))
344 phase = 0;
345 s->data_block_state = phase;
346 }
31ef9134
CL
347 }
348
349 return data_blocks;
350}
351
be4a2894 352static unsigned int calculate_syt(struct amdtp_stream *s,
31ef9134
CL
353 unsigned int cycle)
354{
355 unsigned int syt_offset, phase, index, syt;
356
357 if (s->last_syt_offset < TICKS_PER_CYCLE) {
358 if (!cip_sfc_is_base_44100(s->sfc))
359 syt_offset = s->last_syt_offset + s->syt_offset_state;
360 else {
361 /*
362 * The time, in ticks, of the n'th SYT_INTERVAL sample is:
363 * n * SYT_INTERVAL * 24576000 / sample_rate
364 * Modulo TICKS_PER_CYCLE, the difference between successive
365 * elements is about 1386.23. Rounding the results of this
366 * formula to the SYT precision results in a sequence of
367 * differences that begins with:
368 * 1386 1386 1387 1386 1386 1386 1387 1386 1386 1386 1387 ...
369 * This code generates _exactly_ the same sequence.
370 */
371 phase = s->syt_offset_state;
372 index = phase % 13;
373 syt_offset = s->last_syt_offset;
374 syt_offset += 1386 + ((index && !(index & 3)) ||
375 phase == 146);
376 if (++phase >= 147)
377 phase = 0;
378 s->syt_offset_state = phase;
379 }
380 } else
381 syt_offset = s->last_syt_offset - TICKS_PER_CYCLE;
382 s->last_syt_offset = syt_offset;
383
be454366 384 if (syt_offset < TICKS_PER_CYCLE) {
e84d15f6 385 syt_offset += s->transfer_delay;
be454366
CL
386 syt = (cycle + syt_offset / TICKS_PER_CYCLE) << 12;
387 syt += syt_offset % TICKS_PER_CYCLE;
31ef9134 388
b445db44 389 return syt & CIP_SYT_MASK;
be454366 390 } else {
b445db44 391 return CIP_SYT_NO_INFO;
be454366 392 }
31ef9134
CL
393}
394
4b7da117
TS
395static void update_pcm_pointers(struct amdtp_stream *s,
396 struct snd_pcm_substream *pcm,
397 unsigned int frames)
65845f29
TS
398{
399 unsigned int ptr;
400
4b7da117
TS
401 ptr = s->pcm_buffer_pointer + frames;
402 if (ptr >= pcm->runtime->buffer_size)
403 ptr -= pcm->runtime->buffer_size;
6aa7de05 404 WRITE_ONCE(s->pcm_buffer_pointer, ptr);
4b7da117
TS
405
406 s->pcm_period_pointer += frames;
407 if (s->pcm_period_pointer >= pcm->runtime->period_size) {
408 s->pcm_period_pointer -= pcm->runtime->period_size;
4b7da117
TS
409 tasklet_hi_schedule(&s->period_tasklet);
410 }
411}
412
413static void pcm_period_tasklet(unsigned long data)
414{
415 struct amdtp_stream *s = (void *)data;
6aa7de05 416 struct snd_pcm_substream *pcm = READ_ONCE(s->pcm);
4b7da117
TS
417
418 if (pcm)
419 snd_pcm_period_elapsed(pcm);
420}
421
ff38e0c7
TS
422static int queue_packet(struct amdtp_stream *s, unsigned int header_length,
423 unsigned int payload_length)
4b7da117
TS
424{
425 struct fw_iso_packet p = {0};
7b3b0d85
TS
426 int err = 0;
427
428 if (IS_ERR(s->context))
429 goto end;
4b7da117
TS
430
431 p.interrupt = IS_ALIGNED(s->packet_index + 1, INTERRUPT_INTERVAL);
3b196c39 432 p.tag = s->tag;
4b7da117 433 p.header_length = header_length;
ff38e0c7
TS
434 if (payload_length > 0)
435 p.payload_length = payload_length;
436 else
437 p.skip = true;
4b7da117
TS
438 err = fw_iso_context_queue(s->context, &p, &s->buffer.iso_buffer,
439 s->buffer.packets[s->packet_index].offset);
440 if (err < 0) {
441 dev_err(&s->unit->device, "queueing error: %d\n", err);
442 goto end;
443 }
444
445 if (++s->packet_index >= QUEUE_LENGTH)
446 s->packet_index = 0;
447end:
448 return err;
449}
450
451static inline int queue_out_packet(struct amdtp_stream *s,
ff38e0c7 452 unsigned int payload_length)
4b7da117 453{
ff38e0c7 454 return queue_packet(s, OUT_PACKET_HEADER_SIZE, payload_length);
4b7da117
TS
455}
456
2b3fc456
TS
457static inline int queue_in_packet(struct amdtp_stream *s)
458{
f91c9d76 459 return queue_packet(s, IN_PACKET_HEADER_SIZE, s->max_payload_length);
2b3fc456
TS
460}
461
ff0fb5aa
TS
462static int handle_out_packet(struct amdtp_stream *s,
463 unsigned int payload_length, unsigned int cycle,
a9c4284b 464 unsigned int index)
31ef9134
CL
465{
466 __be32 *buffer;
390a1512
TS
467 unsigned int syt;
468 unsigned int data_blocks;
20e44577 469 unsigned int pcm_frames;
31ef9134 470 struct snd_pcm_substream *pcm;
31ef9134 471
ccccad86 472 buffer = s->buffer.packets[s->packet_index].buffer;
390a1512
TS
473 syt = calculate_syt(s, cycle);
474 data_blocks = calculate_data_blocks(s, syt);
df075fee 475 pcm_frames = s->process_data_blocks(s, buffer + 2, data_blocks, &syt);
20e44577 476
9dae017b
TS
477 if (s->flags & CIP_DBC_IS_END_EVENT)
478 s->data_block_counter =
479 (s->data_block_counter + data_blocks) & 0xff;
480
6aa7de05 481 buffer[0] = cpu_to_be32(READ_ONCE(s->source_node_id_field) |
9a2820c1 482 (s->data_block_quadlets << CIP_DBS_SHIFT) |
9863874f 483 ((s->sph << CIP_SPH_SHIFT) & CIP_SPH_MASK) |
31ef9134 484 s->data_block_counter);
414ba022
TS
485 buffer[1] = cpu_to_be32(CIP_EOH |
486 ((s->fmt << CIP_FMT_SHIFT) & CIP_FMT_MASK) |
487 ((s->fdf << CIP_FDF_SHIFT) & CIP_FDF_MASK) |
488 (syt & CIP_SYT_MASK));
31ef9134 489
9dae017b
TS
490 if (!(s->flags & CIP_DBC_IS_END_EVENT))
491 s->data_block_counter =
492 (s->data_block_counter + data_blocks) & 0xff;
4b7da117 493 payload_length = 8 + data_blocks * 4 * s->data_block_quadlets;
0c95c1d6 494
a9c4284b 495 trace_out_packet(s, cycle, buffer, payload_length, index);
0c95c1d6 496
ff38e0c7 497 if (queue_out_packet(s, payload_length) < 0)
a4103bd7 498 return -EIO;
31ef9134 499
6aa7de05 500 pcm = READ_ONCE(s->pcm);
20e44577
TS
501 if (pcm && pcm_frames > 0)
502 update_pcm_pointers(s, pcm, pcm_frames);
a4103bd7
TS
503
504 /* No need to return the number of handled data blocks. */
505 return 0;
76fb8789
CL
506}
507
3b196c39
TS
508static int handle_out_packet_without_header(struct amdtp_stream *s,
509 unsigned int payload_length, unsigned int cycle,
510 unsigned int index)
511{
512 __be32 *buffer;
513 unsigned int syt;
514 unsigned int data_blocks;
515 unsigned int pcm_frames;
516 struct snd_pcm_substream *pcm;
517
518 buffer = s->buffer.packets[s->packet_index].buffer;
519 syt = calculate_syt(s, cycle);
520 data_blocks = calculate_data_blocks(s, syt);
521 pcm_frames = s->process_data_blocks(s, buffer, data_blocks, &syt);
522 s->data_block_counter = (s->data_block_counter + data_blocks) & 0xff;
523
524 payload_length = data_blocks * 4 * s->data_block_quadlets;
b164d2fd
TS
525
526 trace_out_packet_without_header(s, cycle, payload_length, data_blocks,
527 index);
528
3b196c39
TS
529 if (queue_out_packet(s, payload_length) < 0)
530 return -EIO;
531
6aa7de05 532 pcm = READ_ONCE(s->pcm);
3b196c39
TS
533 if (pcm && pcm_frames > 0)
534 update_pcm_pointers(s, pcm, pcm_frames);
535
536 /* No need to return the number of handled data blocks. */
537 return 0;
538}
539
6fc6b9ce 540static int handle_in_packet(struct amdtp_stream *s,
ff0fb5aa 541 unsigned int payload_length, unsigned int cycle,
a9c4284b 542 unsigned int index)
2b3fc456 543{
d9a16fc9 544 __be32 *buffer;
2b3fc456 545 u32 cip_header[2];
9863874f 546 unsigned int sph, fmt, fdf, syt;
6fc6b9ce 547 unsigned int data_block_quadlets, data_block_counter, dbc_interval;
d9a16fc9 548 unsigned int data_blocks;
20e44577
TS
549 struct snd_pcm_substream *pcm;
550 unsigned int pcm_frames;
c8bdf49b 551 bool lost;
2b3fc456 552
d9a16fc9 553 buffer = s->buffer.packets[s->packet_index].buffer;
2b3fc456
TS
554 cip_header[0] = be32_to_cpu(buffer[0]);
555 cip_header[1] = be32_to_cpu(buffer[1]);
556
ff0fb5aa 557 trace_in_packet(s, cycle, cip_header, payload_length, index);
0c95c1d6 558
2b3fc456
TS
559 /*
560 * This module supports 'Two-quadlet CIP header with SYT field'.
77d2a8a4 561 * For convenience, also check FMT field is AM824 or not.
2b3fc456 562 */
2128f78f
TS
563 if ((((cip_header[0] & CIP_EOH_MASK) == CIP_EOH) ||
564 ((cip_header[1] & CIP_EOH_MASK) != CIP_EOH)) &&
565 (!(s->flags & CIP_HEADER_WITHOUT_EOH))) {
2b3fc456
TS
566 dev_info_ratelimited(&s->unit->device,
567 "Invalid CIP header for AMDTP: %08X:%08X\n",
568 cip_header[0], cip_header[1]);
d9a16fc9 569 data_blocks = 0;
20e44577 570 pcm_frames = 0;
2b3fc456
TS
571 goto end;
572 }
573
414ba022 574 /* Check valid protocol or not. */
9863874f 575 sph = (cip_header[0] & CIP_SPH_MASK) >> CIP_SPH_SHIFT;
414ba022 576 fmt = (cip_header[1] & CIP_FMT_MASK) >> CIP_FMT_SHIFT;
9863874f 577 if (sph != s->sph || fmt != s->fmt) {
2a7e1713
TS
578 dev_info_ratelimited(&s->unit->device,
579 "Detect unexpected protocol: %08x %08x\n",
580 cip_header[0], cip_header[1]);
d9a16fc9 581 data_blocks = 0;
2a7e1713
TS
582 pcm_frames = 0;
583 goto end;
414ba022
TS
584 }
585
2b3fc456 586 /* Calculate data blocks */
414ba022 587 fdf = (cip_header[1] & CIP_FDF_MASK) >> CIP_FDF_SHIFT;
ff0fb5aa 588 if (payload_length < 12 ||
414ba022 589 (fmt == CIP_FMT_AM && fdf == AMDTP_FDF_NO_DATA)) {
d9a16fc9 590 data_blocks = 0;
2b3fc456
TS
591 } else {
592 data_block_quadlets =
9a2820c1 593 (cip_header[0] & CIP_DBS_MASK) >> CIP_DBS_SHIFT;
2b3fc456
TS
594 /* avoid division by zero */
595 if (data_block_quadlets == 0) {
12e0f438 596 dev_err(&s->unit->device,
2b3fc456
TS
597 "Detect invalid value in dbs field: %08X\n",
598 cip_header[0]);
a9007054 599 return -EPROTO;
2b3fc456 600 }
69702239
TS
601 if (s->flags & CIP_WRONG_DBS)
602 data_block_quadlets = s->data_block_quadlets;
2b3fc456 603
ff0fb5aa
TS
604 data_blocks = (payload_length / 4 - 2) /
605 data_block_quadlets;
2b3fc456
TS
606 }
607
608 /* Check data block counter continuity */
9a2820c1 609 data_block_counter = cip_header[0] & CIP_DBC_MASK;
d9a16fc9 610 if (data_blocks == 0 && (s->flags & CIP_EMPTY_HAS_WRONG_DBC) &&
9d59124c
TS
611 s->data_block_counter != UINT_MAX)
612 data_block_counter = s->data_block_counter;
613
18f5ed36
TS
614 if (((s->flags & CIP_SKIP_DBC_ZERO_CHECK) &&
615 data_block_counter == s->tx_first_dbc) ||
616 s->data_block_counter == UINT_MAX) {
b84b1a27
TS
617 lost = false;
618 } else if (!(s->flags & CIP_DBC_IS_END_EVENT)) {
c8bdf49b 619 lost = data_block_counter != s->data_block_counter;
d9cd0065 620 } else {
d9a16fc9 621 if (data_blocks > 0 && s->tx_dbc_interval > 0)
d9cd0065
TS
622 dbc_interval = s->tx_dbc_interval;
623 else
d9a16fc9 624 dbc_interval = data_blocks;
d9cd0065 625
c8bdf49b 626 lost = data_block_counter !=
d9cd0065
TS
627 ((s->data_block_counter + dbc_interval) & 0xff);
628 }
c8bdf49b
TS
629
630 if (lost) {
12e0f438
TS
631 dev_err(&s->unit->device,
632 "Detect discontinuity of CIP: %02X %02X\n",
633 s->data_block_counter, data_block_counter);
6fc6b9ce 634 return -EIO;
2b3fc456
TS
635 }
636
d9a16fc9
TS
637 syt = be32_to_cpu(buffer[1]) & CIP_SYT_MASK;
638 pcm_frames = s->process_data_blocks(s, buffer + 2, data_blocks, &syt);
2b3fc456 639
c8bdf49b
TS
640 if (s->flags & CIP_DBC_IS_END_EVENT)
641 s->data_block_counter = data_block_counter;
642 else
643 s->data_block_counter =
d9a16fc9 644 (data_block_counter + data_blocks) & 0xff;
2b3fc456
TS
645end:
646 if (queue_in_packet(s) < 0)
6fc6b9ce 647 return -EIO;
2b3fc456 648
6aa7de05 649 pcm = READ_ONCE(s->pcm);
20e44577
TS
650 if (pcm && pcm_frames > 0)
651 update_pcm_pointers(s, pcm, pcm_frames);
2b3fc456 652
31ea49ba 653 return 0;
2b3fc456
TS
654}
655
3b196c39 656static int handle_in_packet_without_header(struct amdtp_stream *s,
ada79fa5 657 unsigned int payload_length, unsigned int cycle,
3b196c39
TS
658 unsigned int index)
659{
660 __be32 *buffer;
ada79fa5 661 unsigned int payload_quadlets;
3b196c39
TS
662 unsigned int data_blocks;
663 struct snd_pcm_substream *pcm;
664 unsigned int pcm_frames;
665
666 buffer = s->buffer.packets[s->packet_index].buffer;
ada79fa5 667 payload_quadlets = payload_length / 4;
3b196c39 668 data_blocks = payload_quadlets / s->data_block_quadlets;
b164d2fd
TS
669
670 trace_in_packet_without_header(s, cycle, payload_quadlets, data_blocks,
671 index);
672
3b196c39
TS
673 pcm_frames = s->process_data_blocks(s, buffer, data_blocks, NULL);
674 s->data_block_counter = (s->data_block_counter + data_blocks) & 0xff;
675
676 if (queue_in_packet(s) < 0)
677 return -EIO;
678
6aa7de05 679 pcm = READ_ONCE(s->pcm);
3b196c39
TS
680 if (pcm && pcm_frames > 0)
681 update_pcm_pointers(s, pcm, pcm_frames);
682
683 return 0;
684}
685
73fc7f08
TS
686/*
687 * In CYCLE_TIMER register of IEEE 1394, 7 bits are used to represent second. On
688 * the other hand, in DMA descriptors of 1394 OHCI, 3 bits are used to represent
689 * it. Thus, via Linux firewire subsystem, we can get the 3 bits for second.
690 */
691static inline u32 compute_cycle_count(u32 tstamp)
692{
693 return (((tstamp >> 13) & 0x07) * 8000) + (tstamp & 0x1fff);
694}
695
696static inline u32 increment_cycle_count(u32 cycle, unsigned int addend)
697{
698 cycle += addend;
699 if (cycle >= 8 * CYCLES_PER_SECOND)
700 cycle -= 8 * CYCLES_PER_SECOND;
701 return cycle;
702}
703
f90e2ded
TS
704static inline u32 decrement_cycle_count(u32 cycle, unsigned int subtrahend)
705{
706 if (cycle < subtrahend)
707 cycle += 8 * CYCLES_PER_SECOND;
708 return cycle - subtrahend;
709}
710
73fc7f08 711static void out_stream_callback(struct fw_iso_context *context, u32 tstamp,
4b7da117
TS
712 size_t header_length, void *header,
713 void *private_data)
31ef9134 714{
be4a2894 715 struct amdtp_stream *s = private_data;
390a1512 716 unsigned int i, packets = header_length / 4;
73fc7f08 717 u32 cycle;
31ef9134 718
a4103bd7
TS
719 if (s->packet_index < 0)
720 return;
721
73fc7f08
TS
722 cycle = compute_cycle_count(tstamp);
723
724 /* Align to actual cycle count for the last packet. */
725 cycle = increment_cycle_count(cycle, QUEUE_LENGTH - packets);
31ef9134 726
ccccad86 727 for (i = 0; i < packets; ++i) {
73fc7f08 728 cycle = increment_cycle_count(cycle, 1);
3b196c39 729 if (s->handle_packet(s, 0, cycle, i) < 0) {
a4103bd7 730 s->packet_index = -1;
4a9bfafc
TS
731 if (in_interrupt())
732 amdtp_stream_pcm_abort(s);
733 WRITE_ONCE(s->pcm_buffer_pointer, SNDRV_PCM_POS_XRUN);
a4103bd7
TS
734 return;
735 }
ccccad86 736 }
a4103bd7 737
13882a82 738 fw_iso_context_queue_flush(s->context);
31ef9134
CL
739}
740
73fc7f08 741static void in_stream_callback(struct fw_iso_context *context, u32 tstamp,
2b3fc456
TS
742 size_t header_length, void *header,
743 void *private_data)
744{
745 struct amdtp_stream *s = private_data;
d9a16fc9 746 unsigned int i, packets;
ff0fb5aa 747 unsigned int payload_length, max_payload_length;
d9a16fc9 748 __be32 *headers = header;
f90e2ded 749 u32 cycle;
2b3fc456 750
a4103bd7
TS
751 if (s->packet_index < 0)
752 return;
753
2b3fc456
TS
754 /* The number of packets in buffer */
755 packets = header_length / IN_PACKET_HEADER_SIZE;
756
f90e2ded
TS
757 cycle = compute_cycle_count(tstamp);
758
759 /* Align to actual cycle count for the last packet. */
760 cycle = decrement_cycle_count(cycle, packets);
761
a2064710 762 /* For buffer-over-run prevention. */
f91c9d76 763 max_payload_length = s->max_payload_length;
a2064710 764
d9a16fc9 765 for (i = 0; i < packets; i++) {
f90e2ded 766 cycle = increment_cycle_count(cycle, 1);
2b3fc456 767
f91c9d76 768 /* The number of bytes in this packet */
ff0fb5aa
TS
769 payload_length =
770 (be32_to_cpu(headers[i]) >> ISO_DATA_LENGTH_SHIFT);
771 if (payload_length > max_payload_length) {
a2064710 772 dev_err(&s->unit->device,
ff0fb5aa
TS
773 "Detect jumbo payload: %04x %04x\n",
774 payload_length, max_payload_length);
a2064710
TS
775 break;
776 }
777
3b196c39 778 if (s->handle_packet(s, payload_length, cycle, i) < 0)
6fc6b9ce 779 break;
2b3fc456
TS
780 }
781
dec63cc8 782 /* Queueing error or detecting invalid payload. */
d9a16fc9 783 if (i < packets) {
dec63cc8 784 s->packet_index = -1;
4a9bfafc
TS
785 if (in_interrupt())
786 amdtp_stream_pcm_abort(s);
787 WRITE_ONCE(s->pcm_buffer_pointer, SNDRV_PCM_POS_XRUN);
7b3b0d85
TS
788 return;
789 }
790
2b3fc456
TS
791 fw_iso_context_queue_flush(s->context);
792}
793
7b3b0d85
TS
794/* this is executed one time */
795static void amdtp_stream_first_callback(struct fw_iso_context *context,
73fc7f08 796 u32 tstamp, size_t header_length,
7b3b0d85
TS
797 void *header, void *private_data)
798{
799 struct amdtp_stream *s = private_data;
a04513f8
TS
800 u32 cycle;
801 unsigned int packets;
7b3b0d85
TS
802
803 /*
804 * For in-stream, first packet has come.
805 * For out-stream, prepared to transmit first packet
806 */
807 s->callbacked = true;
808 wake_up(&s->callback_wait);
809
a04513f8
TS
810 cycle = compute_cycle_count(tstamp);
811
812 if (s->direction == AMDTP_IN_STREAM) {
813 packets = header_length / IN_PACKET_HEADER_SIZE;
814 cycle = decrement_cycle_count(cycle, packets);
7b3b0d85 815 context->callback.sc = in_stream_callback;
3b196c39
TS
816 if (s->flags & CIP_NO_HEADER)
817 s->handle_packet = handle_in_packet_without_header;
818 else
819 s->handle_packet = handle_in_packet;
a04513f8
TS
820 } else {
821 packets = header_length / 4;
822 cycle = increment_cycle_count(cycle, QUEUE_LENGTH - packets);
7b3b0d85 823 context->callback.sc = out_stream_callback;
3b196c39
TS
824 if (s->flags & CIP_NO_HEADER)
825 s->handle_packet = handle_out_packet_without_header;
826 else
827 s->handle_packet = handle_out_packet;
a04513f8
TS
828 }
829
830 s->start_cycle = cycle;
7b3b0d85 831
73fc7f08 832 context->callback.sc(context, tstamp, header_length, header, s);
7b3b0d85
TS
833}
834
31ef9134 835/**
be4a2894
TS
836 * amdtp_stream_start - start transferring packets
837 * @s: the AMDTP stream to start
31ef9134
CL
838 * @channel: the isochronous channel on the bus
839 * @speed: firewire speed code
840 *
841 * The stream cannot be started until it has been configured with
be4a2894
TS
842 * amdtp_stream_set_parameters() and it must be started before any PCM or MIDI
843 * device can be started.
31ef9134 844 */
be4a2894 845int amdtp_stream_start(struct amdtp_stream *s, int channel, int speed)
31ef9134
CL
846{
847 static const struct {
848 unsigned int data_block;
849 unsigned int syt_offset;
850 } initial_state[] = {
851 [CIP_SFC_32000] = { 4, 3072 },
852 [CIP_SFC_48000] = { 6, 1024 },
853 [CIP_SFC_96000] = { 12, 1024 },
854 [CIP_SFC_192000] = { 24, 1024 },
855 [CIP_SFC_44100] = { 0, 67 },
856 [CIP_SFC_88200] = { 0, 67 },
857 [CIP_SFC_176400] = { 0, 67 },
858 };
2b3fc456
TS
859 unsigned int header_size;
860 enum dma_data_direction dir;
7ab56645 861 int type, tag, err;
31ef9134
CL
862
863 mutex_lock(&s->mutex);
864
be4a2894 865 if (WARN_ON(amdtp_stream_running(s) ||
4b7da117 866 (s->data_block_quadlets < 1))) {
31ef9134
CL
867 err = -EBADFD;
868 goto err_unlock;
869 }
870
62f00e40 871 if (s->direction == AMDTP_IN_STREAM)
b6bc8123
TS
872 s->data_block_counter = UINT_MAX;
873 else
874 s->data_block_counter = 0;
31ef9134
CL
875 s->data_block_state = initial_state[s->sfc].data_block;
876 s->syt_offset_state = initial_state[s->sfc].syt_offset;
877 s->last_syt_offset = TICKS_PER_CYCLE;
878
2b3fc456
TS
879 /* initialize packet buffer */
880 if (s->direction == AMDTP_IN_STREAM) {
881 dir = DMA_FROM_DEVICE;
882 type = FW_ISO_CONTEXT_RECEIVE;
883 header_size = IN_PACKET_HEADER_SIZE;
2b3fc456
TS
884 } else {
885 dir = DMA_TO_DEVICE;
886 type = FW_ISO_CONTEXT_TRANSMIT;
887 header_size = OUT_PACKET_HEADER_SIZE;
2b3fc456 888 }
31ef9134 889 err = iso_packets_buffer_init(&s->buffer, s->unit, QUEUE_LENGTH,
2b3fc456 890 amdtp_stream_get_max_payload(s), dir);
31ef9134
CL
891 if (err < 0)
892 goto err_unlock;
893
894 s->context = fw_iso_context_create(fw_parent_device(s->unit)->card,
2b3fc456 895 type, channel, speed, header_size,
7b3b0d85 896 amdtp_stream_first_callback, s);
31ef9134
CL
897 if (IS_ERR(s->context)) {
898 err = PTR_ERR(s->context);
899 if (err == -EBUSY)
900 dev_err(&s->unit->device,
be4a2894 901 "no free stream on this controller\n");
31ef9134
CL
902 goto err_buffer;
903 }
904
be4a2894 905 amdtp_stream_update(s);
31ef9134 906
52759c09
TS
907 if (s->direction == AMDTP_IN_STREAM)
908 s->max_payload_length = amdtp_stream_get_max_payload(s);
909
3b196c39
TS
910 if (s->flags & CIP_NO_HEADER)
911 s->tag = TAG_NO_CIP_HEADER;
912 else
913 s->tag = TAG_CIP;
914
ec00f5e4 915 s->packet_index = 0;
4b7da117 916 do {
2b3fc456
TS
917 if (s->direction == AMDTP_IN_STREAM)
918 err = queue_in_packet(s);
919 else
ff38e0c7 920 err = queue_out_packet(s, 0);
4b7da117
TS
921 if (err < 0)
922 goto err_context;
923 } while (s->packet_index > 0);
31ef9134 924
2b3fc456 925 /* NOTE: TAG1 matches CIP. This just affects in stream. */
7ab56645 926 tag = FW_ISO_CONTEXT_MATCH_TAG1;
3b196c39 927 if ((s->flags & CIP_EMPTY_WITH_TAG0) || (s->flags & CIP_NO_HEADER))
7ab56645
TS
928 tag |= FW_ISO_CONTEXT_MATCH_TAG0;
929
7b3b0d85 930 s->callbacked = false;
7ab56645 931 err = fw_iso_context_start(s->context, -1, 0, tag);
31ef9134
CL
932 if (err < 0)
933 goto err_context;
934
935 mutex_unlock(&s->mutex);
936
937 return 0;
938
939err_context:
940 fw_iso_context_destroy(s->context);
941 s->context = ERR_PTR(-1);
942err_buffer:
943 iso_packets_buffer_destroy(&s->buffer, s->unit);
944err_unlock:
945 mutex_unlock(&s->mutex);
946
947 return err;
948}
be4a2894 949EXPORT_SYMBOL(amdtp_stream_start);
31ef9134 950
e9148ddd 951/**
be4a2894
TS
952 * amdtp_stream_pcm_pointer - get the PCM buffer position
953 * @s: the AMDTP stream that transports the PCM data
e9148ddd
CL
954 *
955 * Returns the current buffer position, in frames.
956 */
be4a2894 957unsigned long amdtp_stream_pcm_pointer(struct amdtp_stream *s)
e9148ddd 958{
1dba9db0
TS
959 /*
960 * This function is called in software IRQ context of period_tasklet or
961 * process context.
962 *
963 * When the software IRQ context was scheduled by software IRQ context
964 * of IR/IT contexts, queued packets were already handled. Therefore,
965 * no need to flush the queue in buffer anymore.
966 *
967 * When the process context reach here, some packets will be already
968 * queued in the buffer. These packets should be handled immediately
969 * to keep better granularity of PCM pointer.
970 *
971 * Later, the process context will sometimes schedules software IRQ
972 * context of the period_tasklet. Then, no need to flush the queue by
973 * the same reason as described for IR/IT contexts.
974 */
975 if (!in_interrupt() && amdtp_stream_running(s))
92b862c7 976 fw_iso_context_flush_completions(s->context);
e9148ddd 977
6aa7de05 978 return READ_ONCE(s->pcm_buffer_pointer);
e9148ddd 979}
be4a2894 980EXPORT_SYMBOL(amdtp_stream_pcm_pointer);
e9148ddd 981
875becf8
TS
982/**
983 * amdtp_stream_pcm_ack - acknowledge queued PCM frames
984 * @s: the AMDTP stream that transfers the PCM frames
985 *
986 * Returns zero always.
987 */
988int amdtp_stream_pcm_ack(struct amdtp_stream *s)
989{
990 /*
991 * Process isochronous packets for recent isochronous cycle to handle
992 * queued PCM frames.
993 */
994 if (amdtp_stream_running(s))
995 fw_iso_context_flush_completions(s->context);
996
997 return 0;
998}
999EXPORT_SYMBOL(amdtp_stream_pcm_ack);
1000
31ef9134 1001/**
be4a2894
TS
1002 * amdtp_stream_update - update the stream after a bus reset
1003 * @s: the AMDTP stream
31ef9134 1004 */
be4a2894 1005void amdtp_stream_update(struct amdtp_stream *s)
31ef9134 1006{
9a2820c1 1007 /* Precomputing. */
6aa7de05
MR
1008 WRITE_ONCE(s->source_node_id_field,
1009 (fw_parent_device(s->unit)->card->node_id << CIP_SID_SHIFT) & CIP_SID_MASK);
31ef9134 1010}
be4a2894 1011EXPORT_SYMBOL(amdtp_stream_update);
31ef9134
CL
1012
1013/**
be4a2894
TS
1014 * amdtp_stream_stop - stop sending packets
1015 * @s: the AMDTP stream to stop
31ef9134
CL
1016 *
1017 * All PCM and MIDI devices of the stream must be stopped before the stream
1018 * itself can be stopped.
1019 */
be4a2894 1020void amdtp_stream_stop(struct amdtp_stream *s)
31ef9134
CL
1021{
1022 mutex_lock(&s->mutex);
1023
be4a2894 1024 if (!amdtp_stream_running(s)) {
31ef9134
CL
1025 mutex_unlock(&s->mutex);
1026 return;
1027 }
1028
76fb8789 1029 tasklet_kill(&s->period_tasklet);
31ef9134
CL
1030 fw_iso_context_stop(s->context);
1031 fw_iso_context_destroy(s->context);
1032 s->context = ERR_PTR(-1);
1033 iso_packets_buffer_destroy(&s->buffer, s->unit);
1034
7b3b0d85
TS
1035 s->callbacked = false;
1036
31ef9134
CL
1037 mutex_unlock(&s->mutex);
1038}
be4a2894 1039EXPORT_SYMBOL(amdtp_stream_stop);
31ef9134
CL
1040
1041/**
be4a2894 1042 * amdtp_stream_pcm_abort - abort the running PCM device
31ef9134
CL
1043 * @s: the AMDTP stream about to be stopped
1044 *
1045 * If the isochronous stream needs to be stopped asynchronously, call this
1046 * function first to stop the PCM device.
1047 */
be4a2894 1048void amdtp_stream_pcm_abort(struct amdtp_stream *s)
31ef9134
CL
1049{
1050 struct snd_pcm_substream *pcm;
1051
6aa7de05 1052 pcm = READ_ONCE(s->pcm);
1fb8510c
TI
1053 if (pcm)
1054 snd_pcm_stop_xrun(pcm);
31ef9134 1055}
be4a2894 1056EXPORT_SYMBOL(amdtp_stream_pcm_abort);