[ALSA] semaphore -> mutex (driver part)
[linux-block.git] / sound / drivers / opl3 / opl3_lib.c
CommitLineData
1da177e4
LT
1/*
2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>,
3 * Hannu Savolainen 1993-1996,
4 * Rob Hooft
5 *
6 * Routines for control of AdLib FM cards (OPL2/OPL3/OPL4 chips)
7 *
8 * Most if code is ported from OSS/Lite.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
26#include <sound/opl3.h>
27#include <asm/io.h>
28#include <linux/delay.h>
29#include <linux/init.h>
30#include <linux/slab.h>
31#include <linux/ioport.h>
32#include <sound/minors.h>
33
34MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>, Hannu Savolainen 1993-1996, Rob Hooft");
35MODULE_DESCRIPTION("Routines for control of AdLib FM cards (OPL2/OPL3/OPL4 chips)");
36MODULE_LICENSE("GPL");
37
38extern char snd_opl3_regmap[MAX_OPL2_VOICES][4];
39
5b1646a8 40static void snd_opl2_command(struct snd_opl3 * opl3, unsigned short cmd, unsigned char val)
1da177e4
LT
41{
42 unsigned long flags;
43 unsigned long port;
44
45 /*
46 * The original 2-OP synth requires a quite long delay
47 * after writing to a register.
48 */
49
50 port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;
51
52 spin_lock_irqsave(&opl3->reg_lock, flags);
53
54 outb((unsigned char) cmd, port);
55 udelay(10);
56
57 outb((unsigned char) val, port + 1);
58 udelay(30);
59
60 spin_unlock_irqrestore(&opl3->reg_lock, flags);
61}
62
5b1646a8 63static void snd_opl3_command(struct snd_opl3 * opl3, unsigned short cmd, unsigned char val)
1da177e4
LT
64{
65 unsigned long flags;
66 unsigned long port;
67
68 /*
69 * The OPL-3 survives with just two INBs
70 * after writing to a register.
71 */
72
73 port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;
74
75 spin_lock_irqsave(&opl3->reg_lock, flags);
76
77 outb((unsigned char) cmd, port);
78 inb(opl3->l_port);
79 inb(opl3->l_port);
80
81 outb((unsigned char) val, port + 1);
82 inb(opl3->l_port);
83 inb(opl3->l_port);
84
85 spin_unlock_irqrestore(&opl3->reg_lock, flags);
86}
87
5b1646a8 88static int snd_opl3_detect(struct snd_opl3 * opl3)
1da177e4
LT
89{
90 /*
91 * This function returns 1 if the FM chip is present at the given I/O port
92 * The detection algorithm plays with the timer built in the FM chip and
93 * looks for a change in the status register.
94 *
95 * Note! The timers of the FM chip are not connected to AdLib (and compatible)
96 * boards.
97 *
98 * Note2! The chip is initialized if detected.
99 */
100
101 unsigned char stat1, stat2, signature;
102
103 /* Reset timers 1 and 2 */
104 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);
105 /* Reset the IRQ of the FM chip */
106 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);
107 signature = stat1 = inb(opl3->l_port); /* Status register */
108 if ((stat1 & 0xe0) != 0x00) { /* Should be 0x00 */
109 snd_printd("OPL3: stat1 = 0x%x\n", stat1);
110 return -ENODEV;
111 }
112 /* Set timer1 to 0xff */
113 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 0xff);
114 /* Unmask and start timer 1 */
115 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER2_MASK | OPL3_TIMER1_START);
116 /* Now we have to delay at least 80us */
117 udelay(200);
118 /* Read status after timers have expired */
119 stat2 = inb(opl3->l_port);
120 /* Stop the timers */
121 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);
122 /* Reset the IRQ of the FM chip */
123 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);
124 if ((stat2 & 0xe0) != 0xc0) { /* There is no YM3812 */
125 snd_printd("OPL3: stat2 = 0x%x\n", stat2);
126 return -ENODEV;
127 }
128
129 /* If the toplevel code knows exactly the type of chip, don't try
130 to detect it. */
131 if (opl3->hardware != OPL3_HW_AUTO)
132 return 0;
133
134 /* There is a FM chip on this address. Detect the type (OPL2 to OPL4) */
135 if (signature == 0x06) { /* OPL2 */
136 opl3->hardware = OPL3_HW_OPL2;
137 } else {
138 /*
139 * If we had an OPL4 chip, opl3->hardware would have been set
140 * by the OPL4 driver; so we can assume OPL3 here.
141 */
142 snd_assert(opl3->r_port != 0, return -ENODEV);
143 opl3->hardware = OPL3_HW_OPL3;
144 }
145 return 0;
146}
147
148/*
149 * AdLib timers
150 */
151
152/*
153 * Timer 1 - 80us
154 */
155
5b1646a8 156static int snd_opl3_timer1_start(struct snd_timer * timer)
1da177e4
LT
157{
158 unsigned long flags;
159 unsigned char tmp;
160 unsigned int ticks;
5b1646a8 161 struct snd_opl3 *opl3;
1da177e4
LT
162
163 opl3 = snd_timer_chip(timer);
164 spin_lock_irqsave(&opl3->timer_lock, flags);
165 ticks = timer->sticks;
166 tmp = (opl3->timer_enable | OPL3_TIMER1_START) & ~OPL3_TIMER1_MASK;
167 opl3->timer_enable = tmp;
168 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 256 - ticks); /* timer 1 count */
169 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* enable timer 1 IRQ */
170 spin_unlock_irqrestore(&opl3->timer_lock, flags);
171 return 0;
172}
173
5b1646a8 174static int snd_opl3_timer1_stop(struct snd_timer * timer)
1da177e4
LT
175{
176 unsigned long flags;
177 unsigned char tmp;
5b1646a8 178 struct snd_opl3 *opl3;
1da177e4
LT
179
180 opl3 = snd_timer_chip(timer);
181 spin_lock_irqsave(&opl3->timer_lock, flags);
182 tmp = (opl3->timer_enable | OPL3_TIMER1_MASK) & ~OPL3_TIMER1_START;
183 opl3->timer_enable = tmp;
184 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* disable timer #1 */
185 spin_unlock_irqrestore(&opl3->timer_lock, flags);
186 return 0;
187}
188
189/*
190 * Timer 2 - 320us
191 */
192
5b1646a8 193static int snd_opl3_timer2_start(struct snd_timer * timer)
1da177e4
LT
194{
195 unsigned long flags;
196 unsigned char tmp;
197 unsigned int ticks;
5b1646a8 198 struct snd_opl3 *opl3;
1da177e4
LT
199
200 opl3 = snd_timer_chip(timer);
201 spin_lock_irqsave(&opl3->timer_lock, flags);
202 ticks = timer->sticks;
203 tmp = (opl3->timer_enable | OPL3_TIMER2_START) & ~OPL3_TIMER2_MASK;
204 opl3->timer_enable = tmp;
205 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER2, 256 - ticks); /* timer 1 count */
206 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* enable timer 1 IRQ */
207 spin_unlock_irqrestore(&opl3->timer_lock, flags);
208 return 0;
209}
210
5b1646a8 211static int snd_opl3_timer2_stop(struct snd_timer * timer)
1da177e4
LT
212{
213 unsigned long flags;
214 unsigned char tmp;
5b1646a8 215 struct snd_opl3 *opl3;
1da177e4
LT
216
217 opl3 = snd_timer_chip(timer);
218 spin_lock_irqsave(&opl3->timer_lock, flags);
219 tmp = (opl3->timer_enable | OPL3_TIMER2_MASK) & ~OPL3_TIMER2_START;
220 opl3->timer_enable = tmp;
221 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* disable timer #1 */
222 spin_unlock_irqrestore(&opl3->timer_lock, flags);
223 return 0;
224}
225
226/*
227
228 */
229
5b1646a8 230static struct snd_timer_hardware snd_opl3_timer1 =
1da177e4
LT
231{
232 .flags = SNDRV_TIMER_HW_STOP,
233 .resolution = 80000,
234 .ticks = 256,
235 .start = snd_opl3_timer1_start,
236 .stop = snd_opl3_timer1_stop,
237};
238
5b1646a8 239static struct snd_timer_hardware snd_opl3_timer2 =
1da177e4
LT
240{
241 .flags = SNDRV_TIMER_HW_STOP,
242 .resolution = 320000,
243 .ticks = 256,
244 .start = snd_opl3_timer2_start,
245 .stop = snd_opl3_timer2_stop,
246};
247
5b1646a8 248static int snd_opl3_timer1_init(struct snd_opl3 * opl3, int timer_no)
1da177e4 249{
5b1646a8
TI
250 struct snd_timer *timer = NULL;
251 struct snd_timer_id tid;
1da177e4
LT
252 int err;
253
254 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
255 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
256 tid.card = opl3->card->number;
257 tid.device = timer_no;
258 tid.subdevice = 0;
259 if ((err = snd_timer_new(opl3->card, "AdLib timer #1", &tid, &timer)) >= 0) {
260 strcpy(timer->name, "AdLib timer #1");
261 timer->private_data = opl3;
262 timer->hw = snd_opl3_timer1;
263 }
264 opl3->timer1 = timer;
265 return err;
266}
267
5b1646a8 268static int snd_opl3_timer2_init(struct snd_opl3 * opl3, int timer_no)
1da177e4 269{
5b1646a8
TI
270 struct snd_timer *timer = NULL;
271 struct snd_timer_id tid;
1da177e4
LT
272 int err;
273
274 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
275 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
276 tid.card = opl3->card->number;
277 tid.device = timer_no;
278 tid.subdevice = 0;
279 if ((err = snd_timer_new(opl3->card, "AdLib timer #2", &tid, &timer)) >= 0) {
280 strcpy(timer->name, "AdLib timer #2");
281 timer->private_data = opl3;
282 timer->hw = snd_opl3_timer2;
283 }
284 opl3->timer2 = timer;
285 return err;
286}
287
288/*
289
290 */
291
5b1646a8 292void snd_opl3_interrupt(struct snd_hwdep * hw)
1da177e4
LT
293{
294 unsigned char status;
5b1646a8
TI
295 struct snd_opl3 *opl3;
296 struct snd_timer *timer;
1da177e4
LT
297
298 if (hw == NULL)
299 return;
300
301 opl3 = hw->private_data;
302 status = inb(opl3->l_port);
303#if 0
304 snd_printk("AdLib IRQ status = 0x%x\n", status);
305#endif
306 if (!(status & 0x80))
307 return;
308
309 if (status & 0x40) {
310 timer = opl3->timer1;
311 snd_timer_interrupt(timer, timer->sticks);
312 }
313 if (status & 0x20) {
314 timer = opl3->timer2;
315 snd_timer_interrupt(timer, timer->sticks);
316 }
317}
318
319/*
320
321 */
322
5b1646a8 323static int snd_opl3_free(struct snd_opl3 *opl3)
1da177e4
LT
324{
325 snd_assert(opl3 != NULL, return -ENXIO);
326 if (opl3->private_free)
327 opl3->private_free(opl3);
b1d5776d
TI
328 release_and_free_resource(opl3->res_l_port);
329 release_and_free_resource(opl3->res_r_port);
1da177e4
LT
330 kfree(opl3);
331 return 0;
332}
333
5b1646a8 334static int snd_opl3_dev_free(struct snd_device *device)
1da177e4 335{
5b1646a8 336 struct snd_opl3 *opl3 = device->device_data;
1da177e4
LT
337 return snd_opl3_free(opl3);
338}
339
5b1646a8 340int snd_opl3_new(struct snd_card *card,
1da177e4 341 unsigned short hardware,
5b1646a8 342 struct snd_opl3 **ropl3)
1da177e4 343{
5b1646a8 344 static struct snd_device_ops ops = {
1da177e4
LT
345 .dev_free = snd_opl3_dev_free,
346 };
5b1646a8 347 struct snd_opl3 *opl3;
1da177e4
LT
348 int err;
349
350 *ropl3 = NULL;
561b220a 351 opl3 = kzalloc(sizeof(*opl3), GFP_KERNEL);
73e77ba0
TI
352 if (opl3 == NULL) {
353 snd_printk(KERN_ERR "opl3: cannot allocate\n");
1da177e4 354 return -ENOMEM;
73e77ba0 355 }
1da177e4
LT
356
357 opl3->card = card;
358 opl3->hardware = hardware;
359 spin_lock_init(&opl3->reg_lock);
360 spin_lock_init(&opl3->timer_lock);
ef9f0a42 361 mutex_init(&opl3->access_mutex);
1da177e4
LT
362
363 if ((err = snd_device_new(card, SNDRV_DEV_CODEC, opl3, &ops)) < 0) {
364 snd_opl3_free(opl3);
365 return err;
366 }
367
368 *ropl3 = opl3;
369 return 0;
370}
371
5b1646a8 372int snd_opl3_init(struct snd_opl3 *opl3)
1da177e4
LT
373{
374 if (! opl3->command) {
375 printk(KERN_ERR "snd_opl3_init: command not defined!\n");
376 return -EINVAL;
377 }
378
379 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TEST, OPL3_ENABLE_WAVE_SELECT);
380 /* Melodic mode */
381 opl3->command(opl3, OPL3_LEFT | OPL3_REG_PERCUSSION, 0x00);
382
383 switch (opl3->hardware & OPL3_HW_MASK) {
384 case OPL3_HW_OPL2:
385 opl3->max_voices = MAX_OPL2_VOICES;
386 break;
387 case OPL3_HW_OPL3:
388 case OPL3_HW_OPL4:
389 opl3->max_voices = MAX_OPL3_VOICES;
390 /* Enter OPL3 mode */
391 opl3->command(opl3, OPL3_RIGHT | OPL3_REG_MODE, OPL3_OPL3_ENABLE);
392 }
393 return 0;
394}
395
5b1646a8 396int snd_opl3_create(struct snd_card *card,
1da177e4
LT
397 unsigned long l_port,
398 unsigned long r_port,
399 unsigned short hardware,
400 int integrated,
5b1646a8 401 struct snd_opl3 ** ropl3)
1da177e4 402{
5b1646a8 403 struct snd_opl3 *opl3;
1da177e4
LT
404 int err;
405
406 *ropl3 = NULL;
407 if ((err = snd_opl3_new(card, hardware, &opl3)) < 0)
408 return err;
409 if (! integrated) {
410 if ((opl3->res_l_port = request_region(l_port, 2, "OPL2/3 (left)")) == NULL) {
411 snd_printk(KERN_ERR "opl3: can't grab left port 0x%lx\n", l_port);
676338a1 412 snd_device_free(card, opl3);
1da177e4
LT
413 return -EBUSY;
414 }
415 if (r_port != 0 &&
416 (opl3->res_r_port = request_region(r_port, 2, "OPL2/3 (right)")) == NULL) {
417 snd_printk(KERN_ERR "opl3: can't grab right port 0x%lx\n", r_port);
676338a1 418 snd_device_free(card, opl3);
1da177e4
LT
419 return -EBUSY;
420 }
421 }
422 opl3->l_port = l_port;
423 opl3->r_port = r_port;
424
425 switch (opl3->hardware) {
426 /* some hardware doesn't support timers */
427 case OPL3_HW_OPL3_SV:
428 case OPL3_HW_OPL3_CS:
429 case OPL3_HW_OPL3_FM801:
430 opl3->command = &snd_opl3_command;
431 break;
432 default:
433 opl3->command = &snd_opl2_command;
434 if ((err = snd_opl3_detect(opl3)) < 0) {
435 snd_printd("OPL2/3 chip not detected at 0x%lx/0x%lx\n",
436 opl3->l_port, opl3->r_port);
676338a1 437 snd_device_free(card, opl3);
1da177e4
LT
438 return err;
439 }
440 /* detect routine returns correct hardware type */
441 switch (opl3->hardware & OPL3_HW_MASK) {
442 case OPL3_HW_OPL3:
443 case OPL3_HW_OPL4:
444 opl3->command = &snd_opl3_command;
445 }
446 }
447
448 snd_opl3_init(opl3);
449
450 *ropl3 = opl3;
451 return 0;
452}
453
5b1646a8 454int snd_opl3_timer_new(struct snd_opl3 * opl3, int timer1_dev, int timer2_dev)
1da177e4
LT
455{
456 int err;
457
458 if (timer1_dev >= 0)
459 if ((err = snd_opl3_timer1_init(opl3, timer1_dev)) < 0)
460 return err;
461 if (timer2_dev >= 0) {
462 if ((err = snd_opl3_timer2_init(opl3, timer2_dev)) < 0) {
463 snd_device_free(opl3->card, opl3->timer1);
464 opl3->timer1 = NULL;
465 return err;
466 }
467 }
468 return 0;
469}
470
5b1646a8 471int snd_opl3_hwdep_new(struct snd_opl3 * opl3,
1da177e4 472 int device, int seq_device,
5b1646a8 473 struct snd_hwdep ** rhwdep)
1da177e4 474{
5b1646a8
TI
475 struct snd_hwdep *hw;
476 struct snd_card *card = opl3->card;
1da177e4
LT
477 int err;
478
479 if (rhwdep)
480 *rhwdep = NULL;
481
482 /* create hardware dependent device (direct FM) */
483
484 if ((err = snd_hwdep_new(card, "OPL2/OPL3", device, &hw)) < 0) {
485 snd_device_free(card, opl3);
486 return err;
487 }
488 hw->private_data = opl3;
489#ifdef CONFIG_SND_OSSEMUL
490 if (device == 0) {
491 hw->oss_type = SNDRV_OSS_DEVICE_TYPE_DMFM;
492 sprintf(hw->oss_dev, "dmfm%i", card->number);
493 }
494#endif
495 strcpy(hw->name, hw->id);
496 switch (opl3->hardware & OPL3_HW_MASK) {
497 case OPL3_HW_OPL2:
498 strcpy(hw->name, "OPL2 FM");
499 hw->iface = SNDRV_HWDEP_IFACE_OPL2;
500 break;
501 case OPL3_HW_OPL3:
502 strcpy(hw->name, "OPL3 FM");
503 hw->iface = SNDRV_HWDEP_IFACE_OPL3;
504 break;
505 case OPL3_HW_OPL4:
506 strcpy(hw->name, "OPL4 FM");
507 hw->iface = SNDRV_HWDEP_IFACE_OPL4;
508 break;
509 }
510
511 /* operators - only ioctl */
512 hw->ops.open = snd_opl3_open;
513 hw->ops.ioctl = snd_opl3_ioctl;
514 hw->ops.release = snd_opl3_release;
515
516 opl3->seq_dev_num = seq_device;
517#if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
518 if (snd_seq_device_new(card, seq_device, SNDRV_SEQ_DEV_ID_OPL3,
5b1646a8 519 sizeof(struct snd_opl3 *), &opl3->seq_dev) >= 0) {
1da177e4 520 strcpy(opl3->seq_dev->name, hw->name);
5b1646a8 521 *(struct snd_opl3 **)SNDRV_SEQ_DEVICE_ARGPTR(opl3->seq_dev) = opl3;
1da177e4
LT
522 }
523#endif
524 if (rhwdep)
525 *rhwdep = hw;
526 return 0;
527}
528
529EXPORT_SYMBOL(snd_opl3_interrupt);
530EXPORT_SYMBOL(snd_opl3_new);
531EXPORT_SYMBOL(snd_opl3_init);
532EXPORT_SYMBOL(snd_opl3_create);
533EXPORT_SYMBOL(snd_opl3_timer_new);
534EXPORT_SYMBOL(snd_opl3_hwdep_new);
535
536/* opl3_synth.c */
537EXPORT_SYMBOL(snd_opl3_regmap);
538EXPORT_SYMBOL(snd_opl3_reset);
539
540/*
541 * INIT part
542 */
543
544static int __init alsa_opl3_init(void)
545{
546 return 0;
547}
548
549static void __exit alsa_opl3_exit(void)
550{
551}
552
553module_init(alsa_opl3_init)
554module_exit(alsa_opl3_exit)