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ALSA: AC97: add AC97 support for AT91.
[linux-2.6-block.git] / sound / atmel / ac97c.c
CommitLineData
4ede028f 1/*
128ed6a9 2 * Driver for Atmel AC97C
4ede028f
HCE		 3 *
4 * Copyright (C) 2005-2009 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by
8 * the Free Software Foundation.
9 */
10#include <linux/clk.h>
11#include <linux/delay.h>
12#include <linux/bitmap.h>
128ed6a9 13#include <linux/device.h>
4ede028f
HCE		 14#include <linux/dmaengine.h>
15#include <linux/dma-mapping.h>
7177395f 16#include <linux/atmel_pdc.h>
4ede028f
HCE		 17#include <linux/init.h>
18#include <linux/interrupt.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
21#include <linux/mutex.h>
22#include <linux/gpio.h>
23#include <linux/io.h>
24
25#include <sound/core.h>
26#include <sound/initval.h>
27#include <sound/pcm.h>
28#include <sound/pcm_params.h>
29#include <sound/ac97_codec.h>
30#include <sound/atmel-ac97c.h>
31#include <sound/memalloc.h>
32
33#include <linux/dw_dmac.h>
34
7177395f
SG		 35#include <mach/cpu.h>
36#include <mach/hardware.h>
37#include <mach/gpio.h>
38
4ede028f
HCE		 39#include "ac97c.h"
40
41enum {
42 DMA_TX_READY = 0,
43 DMA_RX_READY,
44 DMA_TX_CHAN_PRESENT,
45 DMA_RX_CHAN_PRESENT,
46};
47
48/* Serialize access to opened variable */
49static DEFINE_MUTEX(opened_mutex);
50
51struct atmel_ac97c_dma {
52 struct dma_chan *rx_chan;
53 struct dma_chan *tx_chan;
54};
55
56struct atmel_ac97c {
57 struct clk *pclk;
58 struct platform_device *pdev;
59 struct atmel_ac97c_dma dma;
60
61 struct snd_pcm_substream *playback_substream;
62 struct snd_pcm_substream *capture_substream;
63 struct snd_card *card;
64 struct snd_pcm *pcm;
65 struct snd_ac97 *ac97;
66 struct snd_ac97_bus *ac97_bus;
67
68 u64 cur_format;
69 unsigned int cur_rate;
70 unsigned long flags;
7177395f 71 int playback_period, capture_period;
4ede028f
HCE		 72 /* Serialize access to opened variable */
73 spinlock_t lock;
74 void __iomem *regs;
df163587 75 int irq;
4ede028f
HCE		 76 int opened;
77 int reset_pin;
78};
79
80#define get_chip(card) ((struct atmel_ac97c *)(card)->private_data)
81
82#define ac97c_writel(chip, reg, val) \
83 __raw_writel((val), (chip)->regs + AC97C_##reg)
84#define ac97c_readl(chip, reg) \
85 __raw_readl((chip)->regs + AC97C_##reg)
86
87/* This function is called by the DMA driver. */
88static void atmel_ac97c_dma_playback_period_done(void *arg)
89{
90 struct atmel_ac97c *chip = arg;
91 snd_pcm_period_elapsed(chip->playback_substream);
92}
93
94static void atmel_ac97c_dma_capture_period_done(void *arg)
95{
96 struct atmel_ac97c *chip = arg;
97 snd_pcm_period_elapsed(chip->capture_substream);
98}
99
100static int atmel_ac97c_prepare_dma(struct atmel_ac97c *chip,
101 struct snd_pcm_substream *substream,
102 enum dma_data_direction direction)
103{
104 struct dma_chan *chan;
105 struct dw_cyclic_desc *cdesc;
106 struct snd_pcm_runtime *runtime = substream->runtime;
107 unsigned long buffer_len, period_len;
108
109 /*
110 * We don't do DMA on "complex" transfers, i.e. with
111 * non-halfword-aligned buffers or lengths.
112 */
113 if (runtime->dma_addr & 1 || runtime->buffer_size & 1) {
114 dev_dbg(&chip->pdev->dev, "too complex transfer\n");
115 return -EINVAL;
116 }
117
118 if (direction == DMA_TO_DEVICE)
119 chan = chip->dma.tx_chan;
120 else
121 chan = chip->dma.rx_chan;
122
123 buffer_len = frames_to_bytes(runtime, runtime->buffer_size);
124 period_len = frames_to_bytes(runtime, runtime->period_size);
125
126 cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len,
127 period_len, direction);
128 if (IS_ERR(cdesc)) {
129 dev_dbg(&chip->pdev->dev, "could not prepare cyclic DMA\n");
130 return PTR_ERR(cdesc);
131 }
132
133 if (direction == DMA_TO_DEVICE) {
134 cdesc->period_callback = atmel_ac97c_dma_playback_period_done;
135 set_bit(DMA_TX_READY, &chip->flags);
136 } else {
137 cdesc->period_callback = atmel_ac97c_dma_capture_period_done;
138 set_bit(DMA_RX_READY, &chip->flags);
139 }
140
141 cdesc->period_callback_param = chip;
142
143 return 0;
144}
145
146static struct snd_pcm_hardware atmel_ac97c_hw = {
147 .info = (SNDRV_PCM_INFO_MMAP
148 | SNDRV_PCM_INFO_MMAP_VALID
149 | SNDRV_PCM_INFO_INTERLEAVED
150 | SNDRV_PCM_INFO_BLOCK_TRANSFER
151 | SNDRV_PCM_INFO_JOINT_DUPLEX
152 | SNDRV_PCM_INFO_RESUME
153 | SNDRV_PCM_INFO_PAUSE),
154 .formats = (SNDRV_PCM_FMTBIT_S16_BE
155 | SNDRV_PCM_FMTBIT_S16_LE),
156 .rates = (SNDRV_PCM_RATE_CONTINUOUS),
157 .rate_min = 4000,
158 .rate_max = 48000,
159 .channels_min = 1,
160 .channels_max = 2,
c42eec0f 161 .buffer_bytes_max = 2 * 2 * 64 * 2048,
4ede028f
HCE		 162 .period_bytes_min = 4096,
163 .period_bytes_max = 4096,
c42eec0f 164 .periods_min = 6,
4ede028f
HCE		 165 .periods_max = 64,
166};
167
168static int atmel_ac97c_playback_open(struct snd_pcm_substream *substream)
169{
170 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
171 struct snd_pcm_runtime *runtime = substream->runtime;
172
173 mutex_lock(&opened_mutex);
174 chip->opened++;
175 runtime->hw = atmel_ac97c_hw;
176 if (chip->cur_rate) {
177 runtime->hw.rate_min = chip->cur_rate;
178 runtime->hw.rate_max = chip->cur_rate;
179 }
180 if (chip->cur_format)
181 runtime->hw.formats = (1ULL << chip->cur_format);
182 mutex_unlock(&opened_mutex);
183 chip->playback_substream = substream;
184 return 0;
185}
186
187static int atmel_ac97c_capture_open(struct snd_pcm_substream *substream)
188{
189 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
190 struct snd_pcm_runtime *runtime = substream->runtime;
191
192 mutex_lock(&opened_mutex);
193 chip->opened++;
194 runtime->hw = atmel_ac97c_hw;
195 if (chip->cur_rate) {
196 runtime->hw.rate_min = chip->cur_rate;
197 runtime->hw.rate_max = chip->cur_rate;
198 }
199 if (chip->cur_format)
200 runtime->hw.formats = (1ULL << chip->cur_format);
201 mutex_unlock(&opened_mutex);
202 chip->capture_substream = substream;
203 return 0;
204}
205
206static int atmel_ac97c_playback_close(struct snd_pcm_substream *substream)
207{
208 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
209
210 mutex_lock(&opened_mutex);
211 chip->opened--;
212 if (!chip->opened) {
213 chip->cur_rate = 0;
214 chip->cur_format = 0;
215 }
216 mutex_unlock(&opened_mutex);
217
218 chip->playback_substream = NULL;
219
220 return 0;
221}
222
223static int atmel_ac97c_capture_close(struct snd_pcm_substream *substream)
224{
225 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
226
227 mutex_lock(&opened_mutex);
228 chip->opened--;
229 if (!chip->opened) {
230 chip->cur_rate = 0;
231 chip->cur_format = 0;
232 }
233 mutex_unlock(&opened_mutex);
234
235 chip->capture_substream = NULL;
236
237 return 0;
238}
239
240static int atmel_ac97c_playback_hw_params(struct snd_pcm_substream *substream,
241 struct snd_pcm_hw_params *hw_params)
242{
243 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
244 int retval;
245
246 retval = snd_pcm_lib_malloc_pages(substream,
247 params_buffer_bytes(hw_params));
248 if (retval < 0)
249 return retval;
250 /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
7177395f
SG		 251 if (cpu_is_at32ap7000()) {
252 /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
253 if (retval == 1)
254 if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
255 dw_dma_cyclic_free(chip->dma.tx_chan);
256 }
4ede028f
HCE		 257 /* Set restrictions to params. */
258 mutex_lock(&opened_mutex);
259 chip->cur_rate = params_rate(hw_params);
260 chip->cur_format = params_format(hw_params);
261 mutex_unlock(&opened_mutex);
262
263 return retval;
264}
265
266static int atmel_ac97c_capture_hw_params(struct snd_pcm_substream *substream,
267 struct snd_pcm_hw_params *hw_params)
268{
269 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
270 int retval;
271
272 retval = snd_pcm_lib_malloc_pages(substream,
273 params_buffer_bytes(hw_params));
274 if (retval < 0)
275 return retval;
276 /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
7177395f
SG		 277 if (cpu_is_at32ap7000()) {
278 if (retval < 0)
279 return retval;
280 /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
281 if (retval == 1)
282 if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
283 dw_dma_cyclic_free(chip->dma.rx_chan);
284 }
4ede028f
HCE		 285
286 /* Set restrictions to params. */
287 mutex_lock(&opened_mutex);
288 chip->cur_rate = params_rate(hw_params);
289 chip->cur_format = params_format(hw_params);
290 mutex_unlock(&opened_mutex);
291
292 return retval;
293}
294
295static int atmel_ac97c_playback_hw_free(struct snd_pcm_substream *substream)
296{
297 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
7177395f
SG		 298 if (cpu_is_at32ap7000()) {
299 if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
300 dw_dma_cyclic_free(chip->dma.tx_chan);
301 }
4ede028f
HCE		 302 return snd_pcm_lib_free_pages(substream);
303}
304
305static int atmel_ac97c_capture_hw_free(struct snd_pcm_substream *substream)
306{
307 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
7177395f
SG		 308 if (cpu_is_at32ap7000()) {
309 if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
310 dw_dma_cyclic_free(chip->dma.rx_chan);
311 }
4ede028f
HCE		 312 return snd_pcm_lib_free_pages(substream);
313}
314
315static int atmel_ac97c_playback_prepare(struct snd_pcm_substream *substream)
316{
317 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
318 struct snd_pcm_runtime *runtime = substream->runtime;
7177395f 319 int block_size = frames_to_bytes(runtime, runtime->period_size);
128ed6a9 320 unsigned long word = ac97c_readl(chip, OCA);
4ede028f
HCE		 321 int retval;
322
7177395f 323 chip->playback_period = 0;
128ed6a9
HCE		 324 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
325
4ede028f
HCE		 326 /* assign channels to AC97C channel A */
327 switch (runtime->channels) {
328 case 1:
329 word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
330 break;
331 case 2:
332 word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
333 | AC97C_CH_ASSIGN(PCM_RIGHT, A);
334 break;
335 default:
336 /* TODO: support more than two channels */
337 return -EINVAL;
4ede028f
HCE		 338 }
339 ac97c_writel(chip, OCA, word);
340
341 /* configure sample format and size */
342 word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
343
344 switch (runtime->format) {
345 case SNDRV_PCM_FORMAT_S16_LE:
7177395f
SG		 346 if (cpu_is_at32ap7000())
347 word |= AC97C_CMR_CEM_LITTLE;
4ede028f
HCE		 348 break;
349 case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
4ede028f
HCE		 350 word &= ~(AC97C_CMR_CEM_LITTLE);
351 break;
128ed6a9
HCE		 352 default:
353 word = ac97c_readl(chip, OCA);
354 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
355 ac97c_writel(chip, OCA, word);
356 return -EINVAL;
4ede028f
HCE		 357 }
358
df163587
HCE		 359 /* Enable underrun interrupt on channel A */
360 word |= AC97C_CSR_UNRUN;
361
4ede028f
HCE		 362 ac97c_writel(chip, CAMR, word);
363
df163587
HCE		 364 /* Enable channel A event interrupt */
365 word = ac97c_readl(chip, IMR);
366 word |= AC97C_SR_CAEVT;
367 ac97c_writel(chip, IER, word);
368
4ede028f
HCE		 369 /* set variable rate if needed */
370 if (runtime->rate != 48000) {
371 word = ac97c_readl(chip, MR);
372 word |= AC97C_MR_VRA;
373 ac97c_writel(chip, MR, word);
374 } else {
375 word = ac97c_readl(chip, MR);
376 word &= ~(AC97C_MR_VRA);
377 ac97c_writel(chip, MR, word);
378 }
379
380 retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
381 runtime->rate);
382 if (retval)
383 dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
384 runtime->rate);
385
7177395f
SG		 386 if (cpu_is_at32ap7000()) {
387 if (!test_bit(DMA_TX_READY, &chip->flags))
388 retval = atmel_ac97c_prepare_dma(chip, substream,
389 DMA_TO_DEVICE);
390 } else {
391 /* Initialize and start the PDC */
392 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR);
393 writel(block_size / 2, chip->regs + ATMEL_PDC_TCR);
394 writel(runtime->dma_addr + block_size,
395 chip->regs + ATMEL_PDC_TNPR);
396 writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR);
397 }
4ede028f
HCE		 398
399 return retval;
400}
401
402static int atmel_ac97c_capture_prepare(struct snd_pcm_substream *substream)
403{
404 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
405 struct snd_pcm_runtime *runtime = substream->runtime;
7177395f 406 int block_size = frames_to_bytes(runtime, runtime->period_size);
128ed6a9 407 unsigned long word = ac97c_readl(chip, ICA);
4ede028f
HCE		 408 int retval;
409
7177395f 410 chip->capture_period = 0;
128ed6a9
HCE		 411 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
412
4ede028f
HCE		 413 /* assign channels to AC97C channel A */
414 switch (runtime->channels) {
415 case 1:
416 word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
417 break;
418 case 2:
419 word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
420 | AC97C_CH_ASSIGN(PCM_RIGHT, A);
421 break;
422 default:
423 /* TODO: support more than two channels */
424 return -EINVAL;
4ede028f
HCE		 425 }
426 ac97c_writel(chip, ICA, word);
427
428 /* configure sample format and size */
429 word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
430
431 switch (runtime->format) {
432 case SNDRV_PCM_FORMAT_S16_LE:
7177395f
SG		 433 if (cpu_is_at32ap7000())
434 word |= AC97C_CMR_CEM_LITTLE;
4ede028f
HCE		 435 break;
436 case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
4ede028f
HCE		 437 word &= ~(AC97C_CMR_CEM_LITTLE);
438 break;
128ed6a9
HCE		 439 default:
440 word = ac97c_readl(chip, ICA);
441 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
442 ac97c_writel(chip, ICA, word);
443 return -EINVAL;
4ede028f
HCE		 444 }
445
df163587
HCE		 446 /* Enable overrun interrupt on channel A */
447 word |= AC97C_CSR_OVRUN;
448
4ede028f
HCE		 449 ac97c_writel(chip, CAMR, word);
450
df163587
HCE		 451 /* Enable channel A event interrupt */
452 word = ac97c_readl(chip, IMR);
453 word |= AC97C_SR_CAEVT;
454 ac97c_writel(chip, IER, word);
455
4ede028f
HCE		 456 /* set variable rate if needed */
457 if (runtime->rate != 48000) {
458 word = ac97c_readl(chip, MR);
459 word |= AC97C_MR_VRA;
460 ac97c_writel(chip, MR, word);
461 } else {
462 word = ac97c_readl(chip, MR);
463 word &= ~(AC97C_MR_VRA);
464 ac97c_writel(chip, MR, word);
465 }
466
467 retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE,
468 runtime->rate);
469 if (retval)
470 dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
471 runtime->rate);
472
7177395f
SG		 473 if (cpu_is_at32ap7000()) {
474 if (!test_bit(DMA_RX_READY, &chip->flags))
475 retval = atmel_ac97c_prepare_dma(chip, substream,
476 DMA_FROM_DEVICE);
477 } else {
478 /* Initialize and start the PDC */
479 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR);
480 writel(block_size / 2, chip->regs + ATMEL_PDC_RCR);
481 writel(runtime->dma_addr + block_size,
482 chip->regs + ATMEL_PDC_RNPR);
483 writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR);
484 }
4ede028f
HCE		 485
486 return retval;
487}
488
489static int
490atmel_ac97c_playback_trigger(struct snd_pcm_substream *substream, int cmd)
491{
492 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
7177395f 493 unsigned long camr, ptcr = 0;
4ede028f
HCE		 494 int retval = 0;
495
496 camr = ac97c_readl(chip, CAMR);
497
498 switch (cmd) {
499 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
500 case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
501 case SNDRV_PCM_TRIGGER_START:
7177395f
SG		 502 if (cpu_is_at32ap7000()) {
503 retval = dw_dma_cyclic_start(chip->dma.tx_chan);
504 if (retval)
505 goto out;
506 } else {
507 ptcr = ATMEL_PDC_TXTEN;
508 }
4ede028f
HCE		 509 camr |= AC97C_CMR_CENA;
510 break;
511 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
512 case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
513 case SNDRV_PCM_TRIGGER_STOP:
7177395f
SG		 514 if (cpu_is_at32ap7000())
515 dw_dma_cyclic_stop(chip->dma.tx_chan);
516 else
517 ptcr |= ATMEL_PDC_TXTDIS;
4ede028f
HCE		 518 if (chip->opened <= 1)
519 camr &= ~AC97C_CMR_CENA;
520 break;
521 default:
522 retval = -EINVAL;
523 goto out;
524 }
525
526 ac97c_writel(chip, CAMR, camr);
7177395f
SG		 527 if (!cpu_is_at32ap7000())
528 writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
4ede028f
HCE		 529out:
530 return retval;
531}
532
533static int
534atmel_ac97c_capture_trigger(struct snd_pcm_substream *substream, int cmd)
535{
536 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
7177395f 537 unsigned long camr, ptcr = 0;
4ede028f
HCE		 538 int retval = 0;
539
540 camr = ac97c_readl(chip, CAMR);
7177395f 541 ptcr = readl(chip->regs + ATMEL_PDC_PTSR);
4ede028f
HCE		 542
543 switch (cmd) {
544 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
545 case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
546 case SNDRV_PCM_TRIGGER_START:
7177395f
SG		 547 if (cpu_is_at32ap7000()) {
548 retval = dw_dma_cyclic_start(chip->dma.rx_chan);
549 if (retval)
550 goto out;
551 } else {
552 ptcr = ATMEL_PDC_RXTEN;
553 }
4ede028f
HCE		 554 camr |= AC97C_CMR_CENA;
555 break;
556 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
557 case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
558 case SNDRV_PCM_TRIGGER_STOP:
7177395f
SG		 559 if (cpu_is_at32ap7000())
560 dw_dma_cyclic_stop(chip->dma.rx_chan);
561 else
562 ptcr |= (ATMEL_PDC_RXTDIS);
4ede028f
HCE		 563 if (chip->opened <= 1)
564 camr &= ~AC97C_CMR_CENA;
565 break;
566 default:
567 retval = -EINVAL;
568 break;
569 }
570
571 ac97c_writel(chip, CAMR, camr);
7177395f
SG		 572 if (!cpu_is_at32ap7000())
573 writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
4ede028f
HCE		 574out:
575 return retval;
576}
577
578static snd_pcm_uframes_t
579atmel_ac97c_playback_pointer(struct snd_pcm_substream *substream)
580{
581 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
582 struct snd_pcm_runtime *runtime = substream->runtime;
583 snd_pcm_uframes_t frames;
584 unsigned long bytes;
585
7177395f
SG		 586 if (cpu_is_at32ap7000())
587 bytes = dw_dma_get_src_addr(chip->dma.tx_chan);
588 else
589 bytes = readl(chip->regs + ATMEL_PDC_TPR);
4ede028f
HCE		 590 bytes -= runtime->dma_addr;
591
592 frames = bytes_to_frames(runtime, bytes);
593 if (frames >= runtime->buffer_size)
594 frames -= runtime->buffer_size;
595 return frames;
596}
597
598static snd_pcm_uframes_t
599atmel_ac97c_capture_pointer(struct snd_pcm_substream *substream)
600{
601 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
602 struct snd_pcm_runtime *runtime = substream->runtime;
603 snd_pcm_uframes_t frames;
604 unsigned long bytes;
605
7177395f
SG		 606 if (cpu_is_at32ap7000())
607 bytes = dw_dma_get_dst_addr(chip->dma.rx_chan);
608 else
609 bytes = readl(chip->regs + ATMEL_PDC_RPR);
4ede028f
HCE		 610 bytes -= runtime->dma_addr;
611
612 frames = bytes_to_frames(runtime, bytes);
613 if (frames >= runtime->buffer_size)
614 frames -= runtime->buffer_size;
615 return frames;
616}
617
618static struct snd_pcm_ops atmel_ac97_playback_ops = {
619 .open = atmel_ac97c_playback_open,
620 .close = atmel_ac97c_playback_close,
621 .ioctl = snd_pcm_lib_ioctl,
622 .hw_params = atmel_ac97c_playback_hw_params,
623 .hw_free = atmel_ac97c_playback_hw_free,
624 .prepare = atmel_ac97c_playback_prepare,
625 .trigger = atmel_ac97c_playback_trigger,
626 .pointer = atmel_ac97c_playback_pointer,
627};
628
629static struct snd_pcm_ops atmel_ac97_capture_ops = {
630 .open = atmel_ac97c_capture_open,
631 .close = atmel_ac97c_capture_close,
632 .ioctl = snd_pcm_lib_ioctl,
633 .hw_params = atmel_ac97c_capture_hw_params,
634 .hw_free = atmel_ac97c_capture_hw_free,
635 .prepare = atmel_ac97c_capture_prepare,
636 .trigger = atmel_ac97c_capture_trigger,
637 .pointer = atmel_ac97c_capture_pointer,
638};
639
df163587
HCE		 640static irqreturn_t atmel_ac97c_interrupt(int irq, void *dev)
641{
642 struct atmel_ac97c *chip = (struct atmel_ac97c *)dev;
643 irqreturn_t retval = IRQ_NONE;
644 u32 sr = ac97c_readl(chip, SR);
645 u32 casr = ac97c_readl(chip, CASR);
646 u32 cosr = ac97c_readl(chip, COSR);
7177395f 647 u32 camr = ac97c_readl(chip, CAMR);
df163587
HCE		 648
649 if (sr & AC97C_SR_CAEVT) {
7177395f
SG		 650 struct snd_pcm_runtime *runtime;
651 int offset, next_period, block_size;
df163587
HCE		 652 dev_info(&chip->pdev->dev, "channel A event%s%s%s%s%s%s\n",
653 casr & AC97C_CSR_OVRUN ? " OVRUN" : "",
654 casr & AC97C_CSR_RXRDY ? " RXRDY" : "",
655 casr & AC97C_CSR_UNRUN ? " UNRUN" : "",
656 casr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
657 casr & AC97C_CSR_TXRDY ? " TXRDY" : "",
658 !casr ? " NONE" : "");
7177395f
SG		 659 if (!cpu_is_at32ap7000()) {
660 if ((casr & camr) & AC97C_CSR_ENDTX) {
661 runtime = chip->playback_substream->runtime;
662 block_size = frames_to_bytes(runtime,
663 runtime->period_size);
664 chip->playback_period++;
665
666 if (chip->playback_period == runtime->periods)
667 chip->playback_period = 0;
668 next_period = chip->playback_period + 1;
669 if (next_period == runtime->periods)
670 next_period = 0;
671
672 offset = block_size * next_period;
673
674 writel(runtime->dma_addr + offset,
675 chip->regs + ATMEL_PDC_TNPR);
676 writel(block_size / 2,
677 chip->regs + ATMEL_PDC_TNCR);
678
679 snd_pcm_period_elapsed(
680 chip->playback_substream);
681 }
682 if ((casr & camr) & AC97C_CSR_ENDRX) {
683 runtime = chip->capture_substream->runtime;
684 block_size = frames_to_bytes(runtime,
685 runtime->period_size);
686 chip->capture_period++;
687
688 if (chip->capture_period == runtime->periods)
689 chip->capture_period = 0;
690 next_period = chip->capture_period + 1;
691 if (next_period == runtime->periods)
692 next_period = 0;
693
694 offset = block_size * next_period;
695
696 writel(runtime->dma_addr + offset,
697 chip->regs + ATMEL_PDC_RNPR);
698 writel(block_size / 2,
699 chip->regs + ATMEL_PDC_RNCR);
700 snd_pcm_period_elapsed(chip->capture_substream);
701 }
702 }
df163587
HCE		 703 retval = IRQ_HANDLED;
704 }
705
706 if (sr & AC97C_SR_COEVT) {
707 dev_info(&chip->pdev->dev, "codec channel event%s%s%s%s%s\n",
708 cosr & AC97C_CSR_OVRUN ? " OVRUN" : "",
709 cosr & AC97C_CSR_RXRDY ? " RXRDY" : "",
710 cosr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
711 cosr & AC97C_CSR_TXRDY ? " TXRDY" : "",
712 !cosr ? " NONE" : "");
713 retval = IRQ_HANDLED;
714 }
715
716 if (retval == IRQ_NONE) {
717 dev_err(&chip->pdev->dev, "spurious interrupt sr 0x%08x "
718 "casr 0x%08x cosr 0x%08x\n", sr, casr, cosr);
719 }
720
721 return retval;
722}
723
7177395f
SG		 724static struct ac97_pcm at91_ac97_pcm_defs[] __devinitdata = {
725 /* Playback */
726 {
727 .exclusive = 1,
728 .r = { {
729 .slots = ((1 << AC97_SLOT_PCM_LEFT)
730 | (1 << AC97_SLOT_PCM_RIGHT)),
731 } },
732 },
733 /* PCM in */
734 {
735 .stream = 1,
736 .exclusive = 1,
737 .r = { {
738 .slots = ((1 << AC97_SLOT_PCM_LEFT)
739 | (1 << AC97_SLOT_PCM_RIGHT)),
740 } }
741 },
742 /* Mic in */
743 {
744 .stream = 1,
745 .exclusive = 1,
746 .r = { {
747 .slots = (1<<AC97_SLOT_MIC),
748 } }
749 },
750};
751
4ede028f
HCE		 752static int __devinit atmel_ac97c_pcm_new(struct atmel_ac97c *chip)
753{
754 struct snd_pcm *pcm;
755 struct snd_pcm_hardware hw = atmel_ac97c_hw;
7177395f 756 int capture, playback, retval, err;
4ede028f
HCE		 757
758 capture = test_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
759 playback = test_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
760
7177395f
SG		 761 if (!cpu_is_at32ap7000()) {
762 err = snd_ac97_pcm_assign(chip->ac97_bus,
763 ARRAY_SIZE(at91_ac97_pcm_defs),
764 at91_ac97_pcm_defs);
765 if (err)
766 return err;
767 }
4ede028f
HCE		 768 retval = snd_pcm_new(chip->card, chip->card->shortname,
769 chip->pdev->id, playback, capture, &pcm);
770 if (retval)
771 return retval;
772
773 if (capture)
774 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
775 &atmel_ac97_capture_ops);
776 if (playback)
777 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
778 &atmel_ac97_playback_ops);
779
780 retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
781 &chip->pdev->dev, hw.periods_min * hw.period_bytes_min,
782 hw.buffer_bytes_max);
783 if (retval)
784 return retval;
785
786 pcm->private_data = chip;
787 pcm->info_flags = 0;
788 strcpy(pcm->name, chip->card->shortname);
789 chip->pcm = pcm;
790
791 return 0;
792}
793
794static int atmel_ac97c_mixer_new(struct atmel_ac97c *chip)
795{
796 struct snd_ac97_template template;
797 memset(&template, 0, sizeof(template));
798 template.private_data = chip;
799 return snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
800}
801
802static void atmel_ac97c_write(struct snd_ac97 *ac97, unsigned short reg,
803 unsigned short val)
804{
805 struct atmel_ac97c *chip = get_chip(ac97);
806 unsigned long word;
807 int timeout = 40;
808
809 word = (reg & 0x7f) << 16 | val;
810
811 do {
812 if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
813 ac97c_writel(chip, COTHR, word);
814 return;
815 }
816 udelay(1);
817 } while (--timeout);
818
819 dev_dbg(&chip->pdev->dev, "codec write timeout\n");
820}
821
822static unsigned short atmel_ac97c_read(struct snd_ac97 *ac97,
823 unsigned short reg)
824{
825 struct atmel_ac97c *chip = get_chip(ac97);
826 unsigned long word;
827 int timeout = 40;
828 int write = 10;
829
830 word = (0x80 | (reg & 0x7f)) << 16;
831
832 if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
833 ac97c_readl(chip, CORHR);
834
835retry_write:
836 timeout = 40;
837
838 do {
839 if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
840 ac97c_writel(chip, COTHR, word);
841 goto read_reg;
842 }
843 udelay(10);
844 } while (--timeout);
845
846 if (!--write)
847 goto timed_out;
848 goto retry_write;
849
850read_reg:
851 do {
852 if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
853 unsigned short val = ac97c_readl(chip, CORHR);
854 return val;
855 }
856 udelay(10);
857 } while (--timeout);
858
859 if (!--write)
860 goto timed_out;
861 goto retry_write;
862
863timed_out:
864 dev_dbg(&chip->pdev->dev, "codec read timeout\n");
865 return 0xffff;
866}
867
868static bool filter(struct dma_chan *chan, void *slave)
869{
870 struct dw_dma_slave *dws = slave;
871
872 if (dws->dma_dev == chan->device->dev) {
873 chan->private = dws;
874 return true;
875 } else
876 return false;
877}
878
879static void atmel_ac97c_reset(struct atmel_ac97c *chip)
880{
81baf3a7
HCE		 881 ac97c_writel(chip, MR, 0);
882 ac97c_writel(chip, MR, AC97C_MR_ENA);
883 ac97c_writel(chip, CAMR, 0);
884 ac97c_writel(chip, COMR, 0);
4ede028f
HCE		 885
886 if (gpio_is_valid(chip->reset_pin)) {
887 gpio_set_value(chip->reset_pin, 0);
888 /* AC97 v2.2 specifications says minimum 1 us. */
81baf3a7 889 udelay(2);
4ede028f
HCE		 890 gpio_set_value(chip->reset_pin, 1);
891 }
4ede028f
HCE		 892}
893
894static int __devinit atmel_ac97c_probe(struct platform_device *pdev)
895{
896 struct snd_card *card;
897 struct atmel_ac97c *chip;
898 struct resource *regs;
899 struct ac97c_platform_data *pdata;
900 struct clk *pclk;
901 static struct snd_ac97_bus_ops ops = {
902 .write = atmel_ac97c_write,
903 .read = atmel_ac97c_read,
904 };
905 int retval;
df163587 906 int irq;
4ede028f
HCE		 907
908 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
909 if (!regs) {
910 dev_dbg(&pdev->dev, "no memory resource\n");
911 return -ENXIO;
912 }
913
914 pdata = pdev->dev.platform_data;
915 if (!pdata) {
916 dev_dbg(&pdev->dev, "no platform data\n");
917 return -ENXIO;
918 }
919
df163587
HCE		 920 irq = platform_get_irq(pdev, 0);
921 if (irq < 0) {
922 dev_dbg(&pdev->dev, "could not get irq\n");
923 return -ENXIO;
924 }
925
7177395f
SG		 926 if (cpu_is_at32ap7000()) {
927 pclk = clk_get(&pdev->dev, "pclk");
928 } else {
929 pclk = clk_get(&pdev->dev, "ac97_clk");
930 }
931
4ede028f
HCE		 932 if (IS_ERR(pclk)) {
933 dev_dbg(&pdev->dev, "no peripheral clock\n");
934 return PTR_ERR(pclk);
935 }
936 clk_enable(pclk);
937
938 retval = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
939 THIS_MODULE, sizeof(struct atmel_ac97c), &card);
940 if (retval) {
941 dev_dbg(&pdev->dev, "could not create sound card device\n");
942 goto err_snd_card_new;
943 }
944
945 chip = get_chip(card);
946
df163587
HCE		 947 retval = request_irq(irq, atmel_ac97c_interrupt, 0, "AC97C", chip);
948 if (retval) {
949 dev_dbg(&pdev->dev, "unable to request irq %d\n", irq);
950 goto err_request_irq;
951 }
952 chip->irq = irq;
953
4ede028f
HCE		 954 spin_lock_init(&chip->lock);
955
956 strcpy(card->driver, "Atmel AC97C");
957 strcpy(card->shortname, "Atmel AC97C");
958 sprintf(card->longname, "Atmel AC97 controller");
959
960 chip->card = card;
961 chip->pclk = pclk;
962 chip->pdev = pdev;
963 chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
964
965 if (!chip->regs) {
966 dev_dbg(&pdev->dev, "could not remap register memory\n");
967 goto err_ioremap;
968 }
969
970 if (gpio_is_valid(pdata->reset_pin)) {
971 if (gpio_request(pdata->reset_pin, "reset_pin")) {
972 dev_dbg(&pdev->dev, "reset pin not available\n");
973 chip->reset_pin = -ENODEV;
974 } else {
975 gpio_direction_output(pdata->reset_pin, 1);
976 chip->reset_pin = pdata->reset_pin;
977 }
978 }
979
980 snd_card_set_dev(card, &pdev->dev);
981
81baf3a7
HCE		 982 atmel_ac97c_reset(chip);
983
df163587
HCE		 984 /* Enable overrun interrupt from codec channel */
985 ac97c_writel(chip, COMR, AC97C_CSR_OVRUN);
986 ac97c_writel(chip, IER, ac97c_readl(chip, IMR) | AC97C_SR_COEVT);
987
4ede028f
HCE		 988 retval = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
989 if (retval) {
990 dev_dbg(&pdev->dev, "could not register on ac97 bus\n");
991 goto err_ac97_bus;
992 }
993
4ede028f
HCE		 994 retval = atmel_ac97c_mixer_new(chip);
995 if (retval) {
996 dev_dbg(&pdev->dev, "could not register ac97 mixer\n");
997 goto err_ac97_bus;
998 }
999
7177395f
SG		 1000 if (cpu_is_at32ap7000()) {
1001 if (pdata->rx_dws.dma_dev) {
1002 struct dw_dma_slave *dws = &pdata->rx_dws;
1003 dma_cap_mask_t mask;
4ede028f 1004
7177395f 1005 dws->rx_reg = regs->start + AC97C_CARHR + 2;
4ede028f 1006
7177395f
SG		 1007 dma_cap_zero(mask);
1008 dma_cap_set(DMA_SLAVE, mask);
4ede028f 1009
7177395f
SG		 1010 chip->dma.rx_chan = dma_request_channel(mask, filter,
1011 dws);
4ede028f 1012
7177395f 1013 dev_info(&chip->pdev->dev, "using %s for DMA RX\n",
23572856 1014 dev_name(&chip->dma.rx_chan->dev->device));
7177395f
SG		 1015 set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1016 }
4ede028f 1017
7177395f
SG		 1018 if (pdata->tx_dws.dma_dev) {
1019 struct dw_dma_slave *dws = &pdata->tx_dws;
1020 dma_cap_mask_t mask;
4ede028f 1021
7177395f 1022 dws->tx_reg = regs->start + AC97C_CATHR + 2;
4ede028f 1023
7177395f
SG		 1024 dma_cap_zero(mask);
1025 dma_cap_set(DMA_SLAVE, mask);
4ede028f 1026
7177395f
SG		 1027 chip->dma.tx_chan = dma_request_channel(mask, filter,
1028 dws);
4ede028f 1029
7177395f 1030 dev_info(&chip->pdev->dev, "using %s for DMA TX\n",
23572856 1031 dev_name(&chip->dma.tx_chan->dev->device));
7177395f
SG		 1032 set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1033 }
4ede028f 1034
7177395f
SG		 1035 if (!test_bit(DMA_RX_CHAN_PRESENT, &chip->flags) &&
1036 !test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) {
1037 dev_dbg(&pdev->dev, "DMA not available\n");
1038 retval = -ENODEV;
1039 goto err_dma;
1040 }
1041 } else {
1042 /* Just pretend that we have DMA channel(for at91 i is actually
1043 * the PDC) */
1044 set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1045 set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
4ede028f
HCE		 1046 }
1047
1048 retval = atmel_ac97c_pcm_new(chip);
1049 if (retval) {
1050 dev_dbg(&pdev->dev, "could not register ac97 pcm device\n");
1051 goto err_dma;
1052 }
1053
1054 retval = snd_card_register(card);
1055 if (retval) {
1056 dev_dbg(&pdev->dev, "could not register sound card\n");
df163587 1057 goto err_dma;
4ede028f
HCE		 1058 }
1059
1060 platform_set_drvdata(pdev, card);
1061
7177395f
SG		 1062 dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p, irq = %d\n",
1063 chip->regs, irq);
4ede028f
HCE		 1064
1065 return 0;
1066
1067err_dma:
7177395f
SG		 1068 if (cpu_is_at32ap7000()) {
1069 if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
1070 dma_release_channel(chip->dma.rx_chan);
1071 if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
1072 dma_release_channel(chip->dma.tx_chan);
1073 clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1074 clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1075 chip->dma.rx_chan = NULL;
1076 chip->dma.tx_chan = NULL;
1077 }
4ede028f
HCE		 1078err_ac97_bus:
1079 snd_card_set_dev(card, NULL);
1080
1081 if (gpio_is_valid(chip->reset_pin))
1082 gpio_free(chip->reset_pin);
1083
1084 iounmap(chip->regs);
1085err_ioremap:
df163587
HCE		 1086 free_irq(irq, chip);
1087err_request_irq:
4ede028f
HCE		 1088 snd_card_free(card);
1089err_snd_card_new:
1090 clk_disable(pclk);
1091 clk_put(pclk);
1092 return retval;
1093}
1094
1095#ifdef CONFIG_PM
1096static int atmel_ac97c_suspend(struct platform_device *pdev, pm_message_t msg)
1097{
1098 struct snd_card *card = platform_get_drvdata(pdev);
1099 struct atmel_ac97c *chip = card->private_data;
1100
7177395f
SG		 1101 if (cpu_is_at32ap7000()) {
1102 if (test_bit(DMA_RX_READY, &chip->flags))
1103 dw_dma_cyclic_stop(chip->dma.rx_chan);
1104 if (test_bit(DMA_TX_READY, &chip->flags))
1105 dw_dma_cyclic_stop(chip->dma.tx_chan);
1106 }
4ede028f
HCE		 1107 clk_disable(chip->pclk);
1108
1109 return 0;
1110}
1111
1112static int atmel_ac97c_resume(struct platform_device *pdev)
1113{
1114 struct snd_card *card = platform_get_drvdata(pdev);
1115 struct atmel_ac97c *chip = card->private_data;
1116
1117 clk_enable(chip->pclk);
7177395f
SG		 1118 if (cpu_is_at32ap7000()) {
1119 if (test_bit(DMA_RX_READY, &chip->flags))
1120 dw_dma_cyclic_start(chip->dma.rx_chan);
1121 if (test_bit(DMA_TX_READY, &chip->flags))
1122 dw_dma_cyclic_start(chip->dma.tx_chan);
1123 }
4ede028f
HCE		 1124 return 0;
1125}
1126#else
1127#define atmel_ac97c_suspend NULL
1128#define atmel_ac97c_resume NULL
1129#endif
1130
1131static int __devexit atmel_ac97c_remove(struct platform_device *pdev)
1132{
1133 struct snd_card *card = platform_get_drvdata(pdev);
1134 struct atmel_ac97c *chip = get_chip(card);
1135
1136 if (gpio_is_valid(chip->reset_pin))
1137 gpio_free(chip->reset_pin);
1138
bd74a184
HCE		 1139 ac97c_writel(chip, CAMR, 0);
1140 ac97c_writel(chip, COMR, 0);
1141 ac97c_writel(chip, MR, 0);
1142
4ede028f
HCE		 1143 clk_disable(chip->pclk);
1144 clk_put(chip->pclk);
1145 iounmap(chip->regs);
df163587 1146 free_irq(chip->irq, chip);
4ede028f 1147
7177395f
SG		 1148 if (cpu_is_at32ap7000()) {
1149 if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
1150 dma_release_channel(chip->dma.rx_chan);
1151 if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
1152 dma_release_channel(chip->dma.tx_chan);
1153 clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1154 clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1155 chip->dma.rx_chan = NULL;
1156 chip->dma.tx_chan = NULL;
1157 }
4ede028f
HCE		 1158
1159 snd_card_set_dev(card, NULL);
1160 snd_card_free(card);
1161
1162 platform_set_drvdata(pdev, NULL);
1163
1164 return 0;
1165}
1166
1167static struct platform_driver atmel_ac97c_driver = {
1168 .remove = __devexit_p(atmel_ac97c_remove),
1169 .driver = {
1170 .name = "atmel_ac97c",
1171 },
1172 .suspend = atmel_ac97c_suspend,
1173 .resume = atmel_ac97c_resume,
1174};
1175
1176static int __init atmel_ac97c_init(void)
1177{
1178 return platform_driver_probe(&atmel_ac97c_driver,
1179 atmel_ac97c_probe);
1180}
1181module_init(atmel_ac97c_init);
1182
1183static void __exit atmel_ac97c_exit(void)
1184{
1185 platform_driver_unregister(&atmel_ac97c_driver);
1186}
1187module_exit(atmel_ac97c_exit);
1188
1189MODULE_LICENSE("GPL");
1190MODULE_DESCRIPTION("Driver for Atmel AC97 controller");
1191MODULE_AUTHOR("Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>");
Linux 6.x block layer and io_uring tree(s)