Commit | Line | Data |
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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
4ede028f | 2 | /* |
128ed6a9 | 3 | * Driver for Atmel AC97C |
4ede028f HCE |
4 | * |
5 | * Copyright (C) 2005-2009 Atmel Corporation | |
4ede028f HCE |
6 | */ |
7 | #include <linux/clk.h> | |
8 | #include <linux/delay.h> | |
9 | #include <linux/bitmap.h> | |
128ed6a9 | 10 | #include <linux/device.h> |
7177395f | 11 | #include <linux/atmel_pdc.h> |
5f10e849 | 12 | #include <linux/gpio/consumer.h> |
4ede028f HCE |
13 | #include <linux/init.h> |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/module.h> | |
16 | #include <linux/platform_device.h> | |
17 | #include <linux/mutex.h> | |
e2b35f3d | 18 | #include <linux/types.h> |
4ede028f | 19 | #include <linux/io.h> |
b2d8957f | 20 | #include <linux/of.h> |
b2d8957f | 21 | #include <linux/of_device.h> |
4ede028f HCE |
22 | |
23 | #include <sound/core.h> | |
24 | #include <sound/initval.h> | |
25 | #include <sound/pcm.h> | |
26 | #include <sound/pcm_params.h> | |
27 | #include <sound/ac97_codec.h> | |
4ede028f HCE |
28 | #include <sound/memalloc.h> |
29 | ||
4ede028f HCE |
30 | #include "ac97c.h" |
31 | ||
4ede028f HCE |
32 | /* Serialize access to opened variable */ |
33 | static DEFINE_MUTEX(opened_mutex); | |
34 | ||
4ede028f HCE |
35 | struct atmel_ac97c { |
36 | struct clk *pclk; | |
37 | struct platform_device *pdev; | |
4ede028f HCE |
38 | |
39 | struct snd_pcm_substream *playback_substream; | |
40 | struct snd_pcm_substream *capture_substream; | |
41 | struct snd_card *card; | |
42 | struct snd_pcm *pcm; | |
43 | struct snd_ac97 *ac97; | |
44 | struct snd_ac97_bus *ac97_bus; | |
45 | ||
46 | u64 cur_format; | |
47 | unsigned int cur_rate; | |
7177395f | 48 | int playback_period, capture_period; |
4ede028f HCE |
49 | /* Serialize access to opened variable */ |
50 | spinlock_t lock; | |
51 | void __iomem *regs; | |
df163587 | 52 | int irq; |
4ede028f | 53 | int opened; |
5f10e849 | 54 | struct gpio_desc *reset_pin; |
4ede028f HCE |
55 | }; |
56 | ||
57 | #define get_chip(card) ((struct atmel_ac97c *)(card)->private_data) | |
58 | ||
59 | #define ac97c_writel(chip, reg, val) \ | |
60 | __raw_writel((val), (chip)->regs + AC97C_##reg) | |
61 | #define ac97c_readl(chip, reg) \ | |
62 | __raw_readl((chip)->regs + AC97C_##reg) | |
63 | ||
85ab3738 | 64 | static const struct snd_pcm_hardware atmel_ac97c_hw = { |
4ede028f HCE |
65 | .info = (SNDRV_PCM_INFO_MMAP |
66 | | SNDRV_PCM_INFO_MMAP_VALID | |
67 | | SNDRV_PCM_INFO_INTERLEAVED | |
68 | | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
69 | | SNDRV_PCM_INFO_JOINT_DUPLEX | |
70 | | SNDRV_PCM_INFO_RESUME | |
71 | | SNDRV_PCM_INFO_PAUSE), | |
72 | .formats = (SNDRV_PCM_FMTBIT_S16_BE | |
73 | | SNDRV_PCM_FMTBIT_S16_LE), | |
74 | .rates = (SNDRV_PCM_RATE_CONTINUOUS), | |
75 | .rate_min = 4000, | |
76 | .rate_max = 48000, | |
77 | .channels_min = 1, | |
78 | .channels_max = 2, | |
c42eec0f | 79 | .buffer_bytes_max = 2 * 2 * 64 * 2048, |
4ede028f HCE |
80 | .period_bytes_min = 4096, |
81 | .period_bytes_max = 4096, | |
c42eec0f | 82 | .periods_min = 6, |
4ede028f HCE |
83 | .periods_max = 64, |
84 | }; | |
85 | ||
86 | static int atmel_ac97c_playback_open(struct snd_pcm_substream *substream) | |
87 | { | |
88 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
89 | struct snd_pcm_runtime *runtime = substream->runtime; | |
90 | ||
91 | mutex_lock(&opened_mutex); | |
92 | chip->opened++; | |
93 | runtime->hw = atmel_ac97c_hw; | |
94 | if (chip->cur_rate) { | |
95 | runtime->hw.rate_min = chip->cur_rate; | |
96 | runtime->hw.rate_max = chip->cur_rate; | |
97 | } | |
98 | if (chip->cur_format) | |
74c34ca1 | 99 | runtime->hw.formats = pcm_format_to_bits(chip->cur_format); |
4ede028f HCE |
100 | mutex_unlock(&opened_mutex); |
101 | chip->playback_substream = substream; | |
102 | return 0; | |
103 | } | |
104 | ||
105 | static int atmel_ac97c_capture_open(struct snd_pcm_substream *substream) | |
106 | { | |
107 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
108 | struct snd_pcm_runtime *runtime = substream->runtime; | |
109 | ||
110 | mutex_lock(&opened_mutex); | |
111 | chip->opened++; | |
112 | runtime->hw = atmel_ac97c_hw; | |
113 | if (chip->cur_rate) { | |
114 | runtime->hw.rate_min = chip->cur_rate; | |
115 | runtime->hw.rate_max = chip->cur_rate; | |
116 | } | |
117 | if (chip->cur_format) | |
74c34ca1 | 118 | runtime->hw.formats = pcm_format_to_bits(chip->cur_format); |
4ede028f HCE |
119 | mutex_unlock(&opened_mutex); |
120 | chip->capture_substream = substream; | |
121 | return 0; | |
122 | } | |
123 | ||
124 | static int atmel_ac97c_playback_close(struct snd_pcm_substream *substream) | |
125 | { | |
126 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
127 | ||
128 | mutex_lock(&opened_mutex); | |
129 | chip->opened--; | |
130 | if (!chip->opened) { | |
131 | chip->cur_rate = 0; | |
132 | chip->cur_format = 0; | |
133 | } | |
134 | mutex_unlock(&opened_mutex); | |
135 | ||
136 | chip->playback_substream = NULL; | |
137 | ||
138 | return 0; | |
139 | } | |
140 | ||
141 | static int atmel_ac97c_capture_close(struct snd_pcm_substream *substream) | |
142 | { | |
143 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
144 | ||
145 | mutex_lock(&opened_mutex); | |
146 | chip->opened--; | |
147 | if (!chip->opened) { | |
148 | chip->cur_rate = 0; | |
149 | chip->cur_format = 0; | |
150 | } | |
151 | mutex_unlock(&opened_mutex); | |
152 | ||
153 | chip->capture_substream = NULL; | |
154 | ||
155 | return 0; | |
156 | } | |
157 | ||
158 | static int atmel_ac97c_playback_hw_params(struct snd_pcm_substream *substream, | |
159 | struct snd_pcm_hw_params *hw_params) | |
160 | { | |
161 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
020c5260 | 162 | |
4ede028f HCE |
163 | /* Set restrictions to params. */ |
164 | mutex_lock(&opened_mutex); | |
165 | chip->cur_rate = params_rate(hw_params); | |
166 | chip->cur_format = params_format(hw_params); | |
167 | mutex_unlock(&opened_mutex); | |
168 | ||
37b9b9a5 | 169 | return 0; |
4ede028f HCE |
170 | } |
171 | ||
172 | static int atmel_ac97c_capture_hw_params(struct snd_pcm_substream *substream, | |
173 | struct snd_pcm_hw_params *hw_params) | |
174 | { | |
175 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
4ede028f HCE |
176 | |
177 | /* Set restrictions to params. */ | |
178 | mutex_lock(&opened_mutex); | |
179 | chip->cur_rate = params_rate(hw_params); | |
180 | chip->cur_format = params_format(hw_params); | |
181 | mutex_unlock(&opened_mutex); | |
182 | ||
37b9b9a5 | 183 | return 0; |
4ede028f HCE |
184 | } |
185 | ||
4ede028f HCE |
186 | static int atmel_ac97c_playback_prepare(struct snd_pcm_substream *substream) |
187 | { | |
188 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
189 | struct snd_pcm_runtime *runtime = substream->runtime; | |
7177395f | 190 | int block_size = frames_to_bytes(runtime, runtime->period_size); |
128ed6a9 | 191 | unsigned long word = ac97c_readl(chip, OCA); |
4ede028f HCE |
192 | int retval; |
193 | ||
7177395f | 194 | chip->playback_period = 0; |
128ed6a9 HCE |
195 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); |
196 | ||
4ede028f HCE |
197 | /* assign channels to AC97C channel A */ |
198 | switch (runtime->channels) { | |
199 | case 1: | |
200 | word |= AC97C_CH_ASSIGN(PCM_LEFT, A); | |
201 | break; | |
202 | case 2: | |
203 | word |= AC97C_CH_ASSIGN(PCM_LEFT, A) | |
204 | | AC97C_CH_ASSIGN(PCM_RIGHT, A); | |
205 | break; | |
206 | default: | |
207 | /* TODO: support more than two channels */ | |
208 | return -EINVAL; | |
4ede028f HCE |
209 | } |
210 | ac97c_writel(chip, OCA, word); | |
211 | ||
212 | /* configure sample format and size */ | |
ec2755a9 SG |
213 | word = ac97c_readl(chip, CAMR); |
214 | if (chip->opened <= 1) | |
215 | word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16; | |
216 | else | |
217 | word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16; | |
4ede028f HCE |
218 | |
219 | switch (runtime->format) { | |
220 | case SNDRV_PCM_FORMAT_S16_LE: | |
4ede028f HCE |
221 | break; |
222 | case SNDRV_PCM_FORMAT_S16_BE: /* fall through */ | |
4ede028f HCE |
223 | word &= ~(AC97C_CMR_CEM_LITTLE); |
224 | break; | |
128ed6a9 HCE |
225 | default: |
226 | word = ac97c_readl(chip, OCA); | |
227 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); | |
228 | ac97c_writel(chip, OCA, word); | |
229 | return -EINVAL; | |
4ede028f HCE |
230 | } |
231 | ||
df163587 HCE |
232 | /* Enable underrun interrupt on channel A */ |
233 | word |= AC97C_CSR_UNRUN; | |
234 | ||
4ede028f HCE |
235 | ac97c_writel(chip, CAMR, word); |
236 | ||
df163587 HCE |
237 | /* Enable channel A event interrupt */ |
238 | word = ac97c_readl(chip, IMR); | |
239 | word |= AC97C_SR_CAEVT; | |
240 | ac97c_writel(chip, IER, word); | |
241 | ||
4ede028f HCE |
242 | /* set variable rate if needed */ |
243 | if (runtime->rate != 48000) { | |
244 | word = ac97c_readl(chip, MR); | |
245 | word |= AC97C_MR_VRA; | |
246 | ac97c_writel(chip, MR, word); | |
247 | } else { | |
248 | word = ac97c_readl(chip, MR); | |
249 | word &= ~(AC97C_MR_VRA); | |
250 | ac97c_writel(chip, MR, word); | |
251 | } | |
252 | ||
253 | retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, | |
254 | runtime->rate); | |
255 | if (retval) | |
256 | dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n", | |
257 | runtime->rate); | |
258 | ||
020c5260 AS |
259 | /* Initialize and start the PDC */ |
260 | writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR); | |
261 | writel(block_size / 2, chip->regs + ATMEL_PDC_TCR); | |
262 | writel(runtime->dma_addr + block_size, chip->regs + ATMEL_PDC_TNPR); | |
263 | writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR); | |
4ede028f HCE |
264 | |
265 | return retval; | |
266 | } | |
267 | ||
268 | static int atmel_ac97c_capture_prepare(struct snd_pcm_substream *substream) | |
269 | { | |
270 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
271 | struct snd_pcm_runtime *runtime = substream->runtime; | |
7177395f | 272 | int block_size = frames_to_bytes(runtime, runtime->period_size); |
128ed6a9 | 273 | unsigned long word = ac97c_readl(chip, ICA); |
4ede028f HCE |
274 | int retval; |
275 | ||
7177395f | 276 | chip->capture_period = 0; |
128ed6a9 HCE |
277 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); |
278 | ||
4ede028f HCE |
279 | /* assign channels to AC97C channel A */ |
280 | switch (runtime->channels) { | |
281 | case 1: | |
282 | word |= AC97C_CH_ASSIGN(PCM_LEFT, A); | |
283 | break; | |
284 | case 2: | |
285 | word |= AC97C_CH_ASSIGN(PCM_LEFT, A) | |
286 | | AC97C_CH_ASSIGN(PCM_RIGHT, A); | |
287 | break; | |
288 | default: | |
289 | /* TODO: support more than two channels */ | |
290 | return -EINVAL; | |
4ede028f HCE |
291 | } |
292 | ac97c_writel(chip, ICA, word); | |
293 | ||
294 | /* configure sample format and size */ | |
ec2755a9 SG |
295 | word = ac97c_readl(chip, CAMR); |
296 | if (chip->opened <= 1) | |
297 | word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16; | |
298 | else | |
299 | word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16; | |
4ede028f HCE |
300 | |
301 | switch (runtime->format) { | |
302 | case SNDRV_PCM_FORMAT_S16_LE: | |
4ede028f HCE |
303 | break; |
304 | case SNDRV_PCM_FORMAT_S16_BE: /* fall through */ | |
4ede028f HCE |
305 | word &= ~(AC97C_CMR_CEM_LITTLE); |
306 | break; | |
128ed6a9 HCE |
307 | default: |
308 | word = ac97c_readl(chip, ICA); | |
309 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); | |
310 | ac97c_writel(chip, ICA, word); | |
311 | return -EINVAL; | |
4ede028f HCE |
312 | } |
313 | ||
df163587 HCE |
314 | /* Enable overrun interrupt on channel A */ |
315 | word |= AC97C_CSR_OVRUN; | |
316 | ||
4ede028f HCE |
317 | ac97c_writel(chip, CAMR, word); |
318 | ||
df163587 HCE |
319 | /* Enable channel A event interrupt */ |
320 | word = ac97c_readl(chip, IMR); | |
321 | word |= AC97C_SR_CAEVT; | |
322 | ac97c_writel(chip, IER, word); | |
323 | ||
4ede028f HCE |
324 | /* set variable rate if needed */ |
325 | if (runtime->rate != 48000) { | |
326 | word = ac97c_readl(chip, MR); | |
327 | word |= AC97C_MR_VRA; | |
328 | ac97c_writel(chip, MR, word); | |
329 | } else { | |
330 | word = ac97c_readl(chip, MR); | |
331 | word &= ~(AC97C_MR_VRA); | |
332 | ac97c_writel(chip, MR, word); | |
333 | } | |
334 | ||
335 | retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, | |
336 | runtime->rate); | |
337 | if (retval) | |
338 | dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n", | |
339 | runtime->rate); | |
340 | ||
020c5260 AS |
341 | /* Initialize and start the PDC */ |
342 | writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR); | |
343 | writel(block_size / 2, chip->regs + ATMEL_PDC_RCR); | |
344 | writel(runtime->dma_addr + block_size, chip->regs + ATMEL_PDC_RNPR); | |
345 | writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR); | |
4ede028f HCE |
346 | |
347 | return retval; | |
348 | } | |
349 | ||
350 | static int | |
351 | atmel_ac97c_playback_trigger(struct snd_pcm_substream *substream, int cmd) | |
352 | { | |
353 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
7177395f | 354 | unsigned long camr, ptcr = 0; |
4ede028f HCE |
355 | |
356 | camr = ac97c_readl(chip, CAMR); | |
357 | ||
358 | switch (cmd) { | |
359 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */ | |
360 | case SNDRV_PCM_TRIGGER_RESUME: /* fall through */ | |
361 | case SNDRV_PCM_TRIGGER_START: | |
020c5260 | 362 | ptcr = ATMEL_PDC_TXTEN; |
ec2755a9 | 363 | camr |= AC97C_CMR_CENA | AC97C_CSR_ENDTX; |
4ede028f HCE |
364 | break; |
365 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */ | |
366 | case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */ | |
367 | case SNDRV_PCM_TRIGGER_STOP: | |
020c5260 | 368 | ptcr |= ATMEL_PDC_TXTDIS; |
4ede028f HCE |
369 | if (chip->opened <= 1) |
370 | camr &= ~AC97C_CMR_CENA; | |
371 | break; | |
372 | default: | |
020c5260 | 373 | return -EINVAL; |
4ede028f HCE |
374 | } |
375 | ||
376 | ac97c_writel(chip, CAMR, camr); | |
020c5260 AS |
377 | writel(ptcr, chip->regs + ATMEL_PDC_PTCR); |
378 | return 0; | |
4ede028f HCE |
379 | } |
380 | ||
381 | static int | |
382 | atmel_ac97c_capture_trigger(struct snd_pcm_substream *substream, int cmd) | |
383 | { | |
384 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
7177395f | 385 | unsigned long camr, ptcr = 0; |
4ede028f HCE |
386 | |
387 | camr = ac97c_readl(chip, CAMR); | |
7177395f | 388 | ptcr = readl(chip->regs + ATMEL_PDC_PTSR); |
4ede028f HCE |
389 | |
390 | switch (cmd) { | |
391 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */ | |
392 | case SNDRV_PCM_TRIGGER_RESUME: /* fall through */ | |
393 | case SNDRV_PCM_TRIGGER_START: | |
020c5260 | 394 | ptcr = ATMEL_PDC_RXTEN; |
ec2755a9 | 395 | camr |= AC97C_CMR_CENA | AC97C_CSR_ENDRX; |
4ede028f HCE |
396 | break; |
397 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */ | |
398 | case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */ | |
399 | case SNDRV_PCM_TRIGGER_STOP: | |
020c5260 | 400 | ptcr |= ATMEL_PDC_RXTDIS; |
4ede028f HCE |
401 | if (chip->opened <= 1) |
402 | camr &= ~AC97C_CMR_CENA; | |
403 | break; | |
404 | default: | |
020c5260 | 405 | return -EINVAL; |
4ede028f HCE |
406 | } |
407 | ||
408 | ac97c_writel(chip, CAMR, camr); | |
020c5260 AS |
409 | writel(ptcr, chip->regs + ATMEL_PDC_PTCR); |
410 | return 0; | |
4ede028f HCE |
411 | } |
412 | ||
413 | static snd_pcm_uframes_t | |
414 | atmel_ac97c_playback_pointer(struct snd_pcm_substream *substream) | |
415 | { | |
416 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
417 | struct snd_pcm_runtime *runtime = substream->runtime; | |
418 | snd_pcm_uframes_t frames; | |
419 | unsigned long bytes; | |
420 | ||
020c5260 | 421 | bytes = readl(chip->regs + ATMEL_PDC_TPR); |
4ede028f HCE |
422 | bytes -= runtime->dma_addr; |
423 | ||
424 | frames = bytes_to_frames(runtime, bytes); | |
425 | if (frames >= runtime->buffer_size) | |
426 | frames -= runtime->buffer_size; | |
427 | return frames; | |
428 | } | |
429 | ||
430 | static snd_pcm_uframes_t | |
431 | atmel_ac97c_capture_pointer(struct snd_pcm_substream *substream) | |
432 | { | |
433 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
434 | struct snd_pcm_runtime *runtime = substream->runtime; | |
435 | snd_pcm_uframes_t frames; | |
436 | unsigned long bytes; | |
437 | ||
020c5260 | 438 | bytes = readl(chip->regs + ATMEL_PDC_RPR); |
4ede028f HCE |
439 | bytes -= runtime->dma_addr; |
440 | ||
441 | frames = bytes_to_frames(runtime, bytes); | |
442 | if (frames >= runtime->buffer_size) | |
443 | frames -= runtime->buffer_size; | |
444 | return frames; | |
445 | } | |
446 | ||
10863737 | 447 | static const struct snd_pcm_ops atmel_ac97_playback_ops = { |
4ede028f HCE |
448 | .open = atmel_ac97c_playback_open, |
449 | .close = atmel_ac97c_playback_close, | |
4ede028f | 450 | .hw_params = atmel_ac97c_playback_hw_params, |
4ede028f HCE |
451 | .prepare = atmel_ac97c_playback_prepare, |
452 | .trigger = atmel_ac97c_playback_trigger, | |
453 | .pointer = atmel_ac97c_playback_pointer, | |
454 | }; | |
455 | ||
10863737 | 456 | static const struct snd_pcm_ops atmel_ac97_capture_ops = { |
4ede028f HCE |
457 | .open = atmel_ac97c_capture_open, |
458 | .close = atmel_ac97c_capture_close, | |
4ede028f | 459 | .hw_params = atmel_ac97c_capture_hw_params, |
4ede028f HCE |
460 | .prepare = atmel_ac97c_capture_prepare, |
461 | .trigger = atmel_ac97c_capture_trigger, | |
462 | .pointer = atmel_ac97c_capture_pointer, | |
463 | }; | |
464 | ||
df163587 HCE |
465 | static irqreturn_t atmel_ac97c_interrupt(int irq, void *dev) |
466 | { | |
467 | struct atmel_ac97c *chip = (struct atmel_ac97c *)dev; | |
468 | irqreturn_t retval = IRQ_NONE; | |
469 | u32 sr = ac97c_readl(chip, SR); | |
470 | u32 casr = ac97c_readl(chip, CASR); | |
471 | u32 cosr = ac97c_readl(chip, COSR); | |
7177395f | 472 | u32 camr = ac97c_readl(chip, CAMR); |
df163587 HCE |
473 | |
474 | if (sr & AC97C_SR_CAEVT) { | |
7177395f SG |
475 | struct snd_pcm_runtime *runtime; |
476 | int offset, next_period, block_size; | |
f5341163 | 477 | dev_dbg(&chip->pdev->dev, "channel A event%s%s%s%s%s%s\n", |
df163587 HCE |
478 | casr & AC97C_CSR_OVRUN ? " OVRUN" : "", |
479 | casr & AC97C_CSR_RXRDY ? " RXRDY" : "", | |
480 | casr & AC97C_CSR_UNRUN ? " UNRUN" : "", | |
481 | casr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "", | |
482 | casr & AC97C_CSR_TXRDY ? " TXRDY" : "", | |
483 | !casr ? " NONE" : ""); | |
020c5260 AS |
484 | if ((casr & camr) & AC97C_CSR_ENDTX) { |
485 | runtime = chip->playback_substream->runtime; | |
486 | block_size = frames_to_bytes(runtime, runtime->period_size); | |
487 | chip->playback_period++; | |
488 | ||
489 | if (chip->playback_period == runtime->periods) | |
490 | chip->playback_period = 0; | |
491 | next_period = chip->playback_period + 1; | |
492 | if (next_period == runtime->periods) | |
493 | next_period = 0; | |
494 | ||
495 | offset = block_size * next_period; | |
496 | ||
497 | writel(runtime->dma_addr + offset, chip->regs + ATMEL_PDC_TNPR); | |
498 | writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR); | |
499 | ||
500 | snd_pcm_period_elapsed(chip->playback_substream); | |
501 | } | |
502 | if ((casr & camr) & AC97C_CSR_ENDRX) { | |
503 | runtime = chip->capture_substream->runtime; | |
504 | block_size = frames_to_bytes(runtime, runtime->period_size); | |
505 | chip->capture_period++; | |
506 | ||
507 | if (chip->capture_period == runtime->periods) | |
508 | chip->capture_period = 0; | |
509 | next_period = chip->capture_period + 1; | |
510 | if (next_period == runtime->periods) | |
511 | next_period = 0; | |
512 | ||
513 | offset = block_size * next_period; | |
514 | ||
515 | writel(runtime->dma_addr + offset, chip->regs + ATMEL_PDC_RNPR); | |
516 | writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR); | |
517 | snd_pcm_period_elapsed(chip->capture_substream); | |
7177395f | 518 | } |
df163587 HCE |
519 | retval = IRQ_HANDLED; |
520 | } | |
521 | ||
522 | if (sr & AC97C_SR_COEVT) { | |
523 | dev_info(&chip->pdev->dev, "codec channel event%s%s%s%s%s\n", | |
524 | cosr & AC97C_CSR_OVRUN ? " OVRUN" : "", | |
525 | cosr & AC97C_CSR_RXRDY ? " RXRDY" : "", | |
526 | cosr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "", | |
527 | cosr & AC97C_CSR_TXRDY ? " TXRDY" : "", | |
528 | !cosr ? " NONE" : ""); | |
529 | retval = IRQ_HANDLED; | |
530 | } | |
531 | ||
532 | if (retval == IRQ_NONE) { | |
533 | dev_err(&chip->pdev->dev, "spurious interrupt sr 0x%08x " | |
534 | "casr 0x%08x cosr 0x%08x\n", sr, casr, cosr); | |
535 | } | |
536 | ||
537 | return retval; | |
538 | } | |
539 | ||
3ca8590b | 540 | static const struct ac97_pcm at91_ac97_pcm_defs[] = { |
7177395f SG |
541 | /* Playback */ |
542 | { | |
543 | .exclusive = 1, | |
544 | .r = { { | |
545 | .slots = ((1 << AC97_SLOT_PCM_LEFT) | |
546 | | (1 << AC97_SLOT_PCM_RIGHT)), | |
547 | } }, | |
548 | }, | |
549 | /* PCM in */ | |
550 | { | |
551 | .stream = 1, | |
552 | .exclusive = 1, | |
553 | .r = { { | |
554 | .slots = ((1 << AC97_SLOT_PCM_LEFT) | |
555 | | (1 << AC97_SLOT_PCM_RIGHT)), | |
556 | } } | |
557 | }, | |
558 | /* Mic in */ | |
559 | { | |
560 | .stream = 1, | |
561 | .exclusive = 1, | |
562 | .r = { { | |
563 | .slots = (1<<AC97_SLOT_MIC), | |
564 | } } | |
565 | }, | |
566 | }; | |
567 | ||
61dc674c | 568 | static int atmel_ac97c_pcm_new(struct atmel_ac97c *chip) |
4ede028f HCE |
569 | { |
570 | struct snd_pcm *pcm; | |
571 | struct snd_pcm_hardware hw = atmel_ac97c_hw; | |
020c5260 | 572 | int retval; |
4ede028f | 573 | |
020c5260 AS |
574 | retval = snd_ac97_pcm_assign(chip->ac97_bus, |
575 | ARRAY_SIZE(at91_ac97_pcm_defs), | |
576 | at91_ac97_pcm_defs); | |
577 | if (retval) | |
578 | return retval; | |
4ede028f | 579 | |
020c5260 | 580 | retval = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm); |
4ede028f HCE |
581 | if (retval) |
582 | return retval; | |
583 | ||
020c5260 AS |
584 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &atmel_ac97_capture_ops); |
585 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &atmel_ac97_playback_ops); | |
4ede028f | 586 | |
37b9b9a5 | 587 | snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, |
4ede028f HCE |
588 | &chip->pdev->dev, hw.periods_min * hw.period_bytes_min, |
589 | hw.buffer_bytes_max); | |
4ede028f HCE |
590 | |
591 | pcm->private_data = chip; | |
592 | pcm->info_flags = 0; | |
593 | strcpy(pcm->name, chip->card->shortname); | |
594 | chip->pcm = pcm; | |
595 | ||
596 | return 0; | |
597 | } | |
598 | ||
599 | static int atmel_ac97c_mixer_new(struct atmel_ac97c *chip) | |
600 | { | |
601 | struct snd_ac97_template template; | |
602 | memset(&template, 0, sizeof(template)); | |
603 | template.private_data = chip; | |
604 | return snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97); | |
605 | } | |
606 | ||
607 | static void atmel_ac97c_write(struct snd_ac97 *ac97, unsigned short reg, | |
608 | unsigned short val) | |
609 | { | |
610 | struct atmel_ac97c *chip = get_chip(ac97); | |
611 | unsigned long word; | |
612 | int timeout = 40; | |
613 | ||
614 | word = (reg & 0x7f) << 16 | val; | |
615 | ||
616 | do { | |
617 | if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) { | |
618 | ac97c_writel(chip, COTHR, word); | |
619 | return; | |
620 | } | |
621 | udelay(1); | |
622 | } while (--timeout); | |
623 | ||
624 | dev_dbg(&chip->pdev->dev, "codec write timeout\n"); | |
625 | } | |
626 | ||
627 | static unsigned short atmel_ac97c_read(struct snd_ac97 *ac97, | |
628 | unsigned short reg) | |
629 | { | |
630 | struct atmel_ac97c *chip = get_chip(ac97); | |
631 | unsigned long word; | |
632 | int timeout = 40; | |
633 | int write = 10; | |
634 | ||
635 | word = (0x80 | (reg & 0x7f)) << 16; | |
636 | ||
637 | if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) | |
638 | ac97c_readl(chip, CORHR); | |
639 | ||
640 | retry_write: | |
641 | timeout = 40; | |
642 | ||
643 | do { | |
644 | if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) { | |
645 | ac97c_writel(chip, COTHR, word); | |
646 | goto read_reg; | |
647 | } | |
648 | udelay(10); | |
649 | } while (--timeout); | |
650 | ||
651 | if (!--write) | |
652 | goto timed_out; | |
653 | goto retry_write; | |
654 | ||
655 | read_reg: | |
656 | do { | |
657 | if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) { | |
658 | unsigned short val = ac97c_readl(chip, CORHR); | |
659 | return val; | |
660 | } | |
661 | udelay(10); | |
662 | } while (--timeout); | |
663 | ||
664 | if (!--write) | |
665 | goto timed_out; | |
666 | goto retry_write; | |
667 | ||
668 | timed_out: | |
669 | dev_dbg(&chip->pdev->dev, "codec read timeout\n"); | |
670 | return 0xffff; | |
671 | } | |
672 | ||
4ede028f HCE |
673 | static void atmel_ac97c_reset(struct atmel_ac97c *chip) |
674 | { | |
81baf3a7 HCE |
675 | ac97c_writel(chip, MR, 0); |
676 | ac97c_writel(chip, MR, AC97C_MR_ENA); | |
677 | ac97c_writel(chip, CAMR, 0); | |
678 | ac97c_writel(chip, COMR, 0); | |
4ede028f | 679 | |
5f10e849 AS |
680 | if (!IS_ERR(chip->reset_pin)) { |
681 | gpiod_set_value(chip->reset_pin, 0); | |
4ede028f | 682 | /* AC97 v2.2 specifications says minimum 1 us. */ |
81baf3a7 | 683 | udelay(2); |
5f10e849 | 684 | gpiod_set_value(chip->reset_pin, 1); |
8015e3de BS |
685 | } else { |
686 | ac97c_writel(chip, MR, AC97C_MR_WRST | AC97C_MR_ENA); | |
687 | udelay(2); | |
688 | ac97c_writel(chip, MR, AC97C_MR_ENA); | |
4ede028f | 689 | } |
4ede028f HCE |
690 | } |
691 | ||
b2d8957f AS |
692 | static const struct of_device_id atmel_ac97c_dt_ids[] = { |
693 | { .compatible = "atmel,at91sam9263-ac97c", }, | |
694 | { } | |
695 | }; | |
696 | MODULE_DEVICE_TABLE(of, atmel_ac97c_dt_ids); | |
697 | ||
61dc674c | 698 | static int atmel_ac97c_probe(struct platform_device *pdev) |
4ede028f | 699 | { |
5f10e849 | 700 | struct device *dev = &pdev->dev; |
4ede028f HCE |
701 | struct snd_card *card; |
702 | struct atmel_ac97c *chip; | |
703 | struct resource *regs; | |
4ede028f | 704 | struct clk *pclk; |
3a3fac8b | 705 | static const struct snd_ac97_bus_ops ops = { |
4ede028f HCE |
706 | .write = atmel_ac97c_write, |
707 | .read = atmel_ac97c_read, | |
708 | }; | |
709 | int retval; | |
df163587 | 710 | int irq; |
4ede028f HCE |
711 | |
712 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
713 | if (!regs) { | |
714 | dev_dbg(&pdev->dev, "no memory resource\n"); | |
715 | return -ENXIO; | |
716 | } | |
717 | ||
df163587 HCE |
718 | irq = platform_get_irq(pdev, 0); |
719 | if (irq < 0) { | |
77201135 GS |
720 | dev_dbg(&pdev->dev, "could not get irq: %d\n", irq); |
721 | return irq; | |
df163587 HCE |
722 | } |
723 | ||
020c5260 | 724 | pclk = clk_get(&pdev->dev, "ac97_clk"); |
4ede028f HCE |
725 | if (IS_ERR(pclk)) { |
726 | dev_dbg(&pdev->dev, "no peripheral clock\n"); | |
727 | return PTR_ERR(pclk); | |
728 | } | |
260ea95c AY |
729 | retval = clk_prepare_enable(pclk); |
730 | if (retval) | |
0515760f | 731 | goto err_prepare_enable; |
4ede028f | 732 | |
a4f2473d TI |
733 | retval = snd_card_new(&pdev->dev, SNDRV_DEFAULT_IDX1, |
734 | SNDRV_DEFAULT_STR1, THIS_MODULE, | |
735 | sizeof(struct atmel_ac97c), &card); | |
4ede028f HCE |
736 | if (retval) { |
737 | dev_dbg(&pdev->dev, "could not create sound card device\n"); | |
738 | goto err_snd_card_new; | |
739 | } | |
740 | ||
741 | chip = get_chip(card); | |
742 | ||
df163587 HCE |
743 | retval = request_irq(irq, atmel_ac97c_interrupt, 0, "AC97C", chip); |
744 | if (retval) { | |
745 | dev_dbg(&pdev->dev, "unable to request irq %d\n", irq); | |
746 | goto err_request_irq; | |
747 | } | |
748 | chip->irq = irq; | |
749 | ||
4ede028f HCE |
750 | spin_lock_init(&chip->lock); |
751 | ||
752 | strcpy(card->driver, "Atmel AC97C"); | |
753 | strcpy(card->shortname, "Atmel AC97C"); | |
754 | sprintf(card->longname, "Atmel AC97 controller"); | |
755 | ||
756 | chip->card = card; | |
757 | chip->pclk = pclk; | |
758 | chip->pdev = pdev; | |
28f65c11 | 759 | chip->regs = ioremap(regs->start, resource_size(regs)); |
4ede028f HCE |
760 | |
761 | if (!chip->regs) { | |
762 | dev_dbg(&pdev->dev, "could not remap register memory\n"); | |
0c23e46e | 763 | retval = -ENOMEM; |
4ede028f HCE |
764 | goto err_ioremap; |
765 | } | |
766 | ||
5f10e849 AS |
767 | chip->reset_pin = devm_gpiod_get_index(dev, "ac97", 2, GPIOD_OUT_HIGH); |
768 | if (IS_ERR(chip->reset_pin)) | |
769 | dev_dbg(dev, "reset pin not available\n"); | |
4ede028f | 770 | |
81baf3a7 HCE |
771 | atmel_ac97c_reset(chip); |
772 | ||
df163587 HCE |
773 | /* Enable overrun interrupt from codec channel */ |
774 | ac97c_writel(chip, COMR, AC97C_CSR_OVRUN); | |
775 | ac97c_writel(chip, IER, ac97c_readl(chip, IMR) | AC97C_SR_COEVT); | |
776 | ||
4ede028f HCE |
777 | retval = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus); |
778 | if (retval) { | |
779 | dev_dbg(&pdev->dev, "could not register on ac97 bus\n"); | |
780 | goto err_ac97_bus; | |
781 | } | |
782 | ||
4ede028f HCE |
783 | retval = atmel_ac97c_mixer_new(chip); |
784 | if (retval) { | |
785 | dev_dbg(&pdev->dev, "could not register ac97 mixer\n"); | |
786 | goto err_ac97_bus; | |
787 | } | |
788 | ||
4ede028f HCE |
789 | retval = atmel_ac97c_pcm_new(chip); |
790 | if (retval) { | |
791 | dev_dbg(&pdev->dev, "could not register ac97 pcm device\n"); | |
020c5260 | 792 | goto err_ac97_bus; |
4ede028f HCE |
793 | } |
794 | ||
795 | retval = snd_card_register(card); | |
796 | if (retval) { | |
797 | dev_dbg(&pdev->dev, "could not register sound card\n"); | |
020c5260 | 798 | goto err_ac97_bus; |
4ede028f HCE |
799 | } |
800 | ||
801 | platform_set_drvdata(pdev, card); | |
802 | ||
7177395f SG |
803 | dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p, irq = %d\n", |
804 | chip->regs, irq); | |
4ede028f HCE |
805 | |
806 | return 0; | |
807 | ||
4ede028f | 808 | err_ac97_bus: |
4ede028f HCE |
809 | iounmap(chip->regs); |
810 | err_ioremap: | |
df163587 HCE |
811 | free_irq(irq, chip); |
812 | err_request_irq: | |
4ede028f HCE |
813 | snd_card_free(card); |
814 | err_snd_card_new: | |
1132015b | 815 | clk_disable_unprepare(pclk); |
0515760f | 816 | err_prepare_enable: |
4ede028f HCE |
817 | clk_put(pclk); |
818 | return retval; | |
819 | } | |
820 | ||
d34e4e00 | 821 | #ifdef CONFIG_PM_SLEEP |
284e7ca7 | 822 | static int atmel_ac97c_suspend(struct device *pdev) |
4ede028f | 823 | { |
284e7ca7 | 824 | struct snd_card *card = dev_get_drvdata(pdev); |
4ede028f HCE |
825 | struct atmel_ac97c *chip = card->private_data; |
826 | ||
1132015b | 827 | clk_disable_unprepare(chip->pclk); |
4ede028f HCE |
828 | return 0; |
829 | } | |
830 | ||
284e7ca7 | 831 | static int atmel_ac97c_resume(struct device *pdev) |
4ede028f | 832 | { |
284e7ca7 | 833 | struct snd_card *card = dev_get_drvdata(pdev); |
4ede028f | 834 | struct atmel_ac97c *chip = card->private_data; |
260ea95c | 835 | int ret = clk_prepare_enable(chip->pclk); |
4ede028f | 836 | |
260ea95c | 837 | return ret; |
4ede028f | 838 | } |
284e7ca7 TI |
839 | |
840 | static SIMPLE_DEV_PM_OPS(atmel_ac97c_pm, atmel_ac97c_suspend, atmel_ac97c_resume); | |
841 | #define ATMEL_AC97C_PM_OPS &atmel_ac97c_pm | |
4ede028f | 842 | #else |
284e7ca7 | 843 | #define ATMEL_AC97C_PM_OPS NULL |
4ede028f HCE |
844 | #endif |
845 | ||
61dc674c | 846 | static int atmel_ac97c_remove(struct platform_device *pdev) |
4ede028f HCE |
847 | { |
848 | struct snd_card *card = platform_get_drvdata(pdev); | |
849 | struct atmel_ac97c *chip = get_chip(card); | |
850 | ||
bd74a184 HCE |
851 | ac97c_writel(chip, CAMR, 0); |
852 | ac97c_writel(chip, COMR, 0); | |
853 | ac97c_writel(chip, MR, 0); | |
854 | ||
1132015b | 855 | clk_disable_unprepare(chip->pclk); |
4ede028f HCE |
856 | clk_put(chip->pclk); |
857 | iounmap(chip->regs); | |
df163587 | 858 | free_irq(chip->irq, chip); |
4ede028f | 859 | |
4ede028f HCE |
860 | snd_card_free(card); |
861 | ||
4ede028f HCE |
862 | return 0; |
863 | } | |
864 | ||
865 | static struct platform_driver atmel_ac97c_driver = { | |
4b973ee0 | 866 | .probe = atmel_ac97c_probe, |
61dc674c | 867 | .remove = atmel_ac97c_remove, |
4ede028f HCE |
868 | .driver = { |
869 | .name = "atmel_ac97c", | |
284e7ca7 | 870 | .pm = ATMEL_AC97C_PM_OPS, |
5f10e849 | 871 | .of_match_table = atmel_ac97c_dt_ids, |
4ede028f | 872 | }, |
4ede028f | 873 | }; |
4b973ee0 | 874 | module_platform_driver(atmel_ac97c_driver); |
4ede028f HCE |
875 | |
876 | MODULE_LICENSE("GPL"); | |
877 | MODULE_DESCRIPTION("Driver for Atmel AC97 controller"); | |
0cfae7c9 | 878 | MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>"); |