Commit | Line | Data |
---|---|---|
4ede028f | 1 | /* |
128ed6a9 | 2 | * Driver for Atmel AC97C |
4ede028f HCE |
3 | * |
4 | * Copyright (C) 2005-2009 Atmel Corporation | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License version 2 as published by | |
8 | * the Free Software Foundation. | |
9 | */ | |
10 | #include <linux/clk.h> | |
11 | #include <linux/delay.h> | |
12 | #include <linux/bitmap.h> | |
128ed6a9 | 13 | #include <linux/device.h> |
4ede028f HCE |
14 | #include <linux/dmaengine.h> |
15 | #include <linux/dma-mapping.h> | |
7177395f | 16 | #include <linux/atmel_pdc.h> |
4ede028f HCE |
17 | #include <linux/init.h> |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/mutex.h> | |
22 | #include <linux/gpio.h> | |
23 | #include <linux/io.h> | |
24 | ||
25 | #include <sound/core.h> | |
26 | #include <sound/initval.h> | |
27 | #include <sound/pcm.h> | |
28 | #include <sound/pcm_params.h> | |
29 | #include <sound/ac97_codec.h> | |
30 | #include <sound/atmel-ac97c.h> | |
31 | #include <sound/memalloc.h> | |
32 | ||
33 | #include <linux/dw_dmac.h> | |
34 | ||
7177395f SG |
35 | #include <mach/cpu.h> |
36 | #include <mach/hardware.h> | |
37 | #include <mach/gpio.h> | |
38 | ||
4ede028f HCE |
39 | #include "ac97c.h" |
40 | ||
41 | enum { | |
42 | DMA_TX_READY = 0, | |
43 | DMA_RX_READY, | |
44 | DMA_TX_CHAN_PRESENT, | |
45 | DMA_RX_CHAN_PRESENT, | |
46 | }; | |
47 | ||
48 | /* Serialize access to opened variable */ | |
49 | static DEFINE_MUTEX(opened_mutex); | |
50 | ||
51 | struct atmel_ac97c_dma { | |
52 | struct dma_chan *rx_chan; | |
53 | struct dma_chan *tx_chan; | |
54 | }; | |
55 | ||
56 | struct atmel_ac97c { | |
57 | struct clk *pclk; | |
58 | struct platform_device *pdev; | |
59 | struct atmel_ac97c_dma dma; | |
60 | ||
61 | struct snd_pcm_substream *playback_substream; | |
62 | struct snd_pcm_substream *capture_substream; | |
63 | struct snd_card *card; | |
64 | struct snd_pcm *pcm; | |
65 | struct snd_ac97 *ac97; | |
66 | struct snd_ac97_bus *ac97_bus; | |
67 | ||
68 | u64 cur_format; | |
69 | unsigned int cur_rate; | |
70 | unsigned long flags; | |
7177395f | 71 | int playback_period, capture_period; |
4ede028f HCE |
72 | /* Serialize access to opened variable */ |
73 | spinlock_t lock; | |
74 | void __iomem *regs; | |
df163587 | 75 | int irq; |
4ede028f HCE |
76 | int opened; |
77 | int reset_pin; | |
78 | }; | |
79 | ||
80 | #define get_chip(card) ((struct atmel_ac97c *)(card)->private_data) | |
81 | ||
82 | #define ac97c_writel(chip, reg, val) \ | |
83 | __raw_writel((val), (chip)->regs + AC97C_##reg) | |
84 | #define ac97c_readl(chip, reg) \ | |
85 | __raw_readl((chip)->regs + AC97C_##reg) | |
86 | ||
87 | /* This function is called by the DMA driver. */ | |
88 | static void atmel_ac97c_dma_playback_period_done(void *arg) | |
89 | { | |
90 | struct atmel_ac97c *chip = arg; | |
91 | snd_pcm_period_elapsed(chip->playback_substream); | |
92 | } | |
93 | ||
94 | static void atmel_ac97c_dma_capture_period_done(void *arg) | |
95 | { | |
96 | struct atmel_ac97c *chip = arg; | |
97 | snd_pcm_period_elapsed(chip->capture_substream); | |
98 | } | |
99 | ||
100 | static int atmel_ac97c_prepare_dma(struct atmel_ac97c *chip, | |
101 | struct snd_pcm_substream *substream, | |
102 | enum dma_data_direction direction) | |
103 | { | |
104 | struct dma_chan *chan; | |
105 | struct dw_cyclic_desc *cdesc; | |
106 | struct snd_pcm_runtime *runtime = substream->runtime; | |
107 | unsigned long buffer_len, period_len; | |
108 | ||
109 | /* | |
110 | * We don't do DMA on "complex" transfers, i.e. with | |
111 | * non-halfword-aligned buffers or lengths. | |
112 | */ | |
113 | if (runtime->dma_addr & 1 || runtime->buffer_size & 1) { | |
114 | dev_dbg(&chip->pdev->dev, "too complex transfer\n"); | |
115 | return -EINVAL; | |
116 | } | |
117 | ||
118 | if (direction == DMA_TO_DEVICE) | |
119 | chan = chip->dma.tx_chan; | |
120 | else | |
121 | chan = chip->dma.rx_chan; | |
122 | ||
123 | buffer_len = frames_to_bytes(runtime, runtime->buffer_size); | |
124 | period_len = frames_to_bytes(runtime, runtime->period_size); | |
125 | ||
126 | cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len, | |
127 | period_len, direction); | |
128 | if (IS_ERR(cdesc)) { | |
129 | dev_dbg(&chip->pdev->dev, "could not prepare cyclic DMA\n"); | |
130 | return PTR_ERR(cdesc); | |
131 | } | |
132 | ||
133 | if (direction == DMA_TO_DEVICE) { | |
134 | cdesc->period_callback = atmel_ac97c_dma_playback_period_done; | |
135 | set_bit(DMA_TX_READY, &chip->flags); | |
136 | } else { | |
137 | cdesc->period_callback = atmel_ac97c_dma_capture_period_done; | |
138 | set_bit(DMA_RX_READY, &chip->flags); | |
139 | } | |
140 | ||
141 | cdesc->period_callback_param = chip; | |
142 | ||
143 | return 0; | |
144 | } | |
145 | ||
146 | static struct snd_pcm_hardware atmel_ac97c_hw = { | |
147 | .info = (SNDRV_PCM_INFO_MMAP | |
148 | | SNDRV_PCM_INFO_MMAP_VALID | |
149 | | SNDRV_PCM_INFO_INTERLEAVED | |
150 | | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
151 | | SNDRV_PCM_INFO_JOINT_DUPLEX | |
152 | | SNDRV_PCM_INFO_RESUME | |
153 | | SNDRV_PCM_INFO_PAUSE), | |
154 | .formats = (SNDRV_PCM_FMTBIT_S16_BE | |
155 | | SNDRV_PCM_FMTBIT_S16_LE), | |
156 | .rates = (SNDRV_PCM_RATE_CONTINUOUS), | |
157 | .rate_min = 4000, | |
158 | .rate_max = 48000, | |
159 | .channels_min = 1, | |
160 | .channels_max = 2, | |
c42eec0f | 161 | .buffer_bytes_max = 2 * 2 * 64 * 2048, |
4ede028f HCE |
162 | .period_bytes_min = 4096, |
163 | .period_bytes_max = 4096, | |
c42eec0f | 164 | .periods_min = 6, |
4ede028f HCE |
165 | .periods_max = 64, |
166 | }; | |
167 | ||
168 | static int atmel_ac97c_playback_open(struct snd_pcm_substream *substream) | |
169 | { | |
170 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
171 | struct snd_pcm_runtime *runtime = substream->runtime; | |
172 | ||
173 | mutex_lock(&opened_mutex); | |
174 | chip->opened++; | |
175 | runtime->hw = atmel_ac97c_hw; | |
176 | if (chip->cur_rate) { | |
177 | runtime->hw.rate_min = chip->cur_rate; | |
178 | runtime->hw.rate_max = chip->cur_rate; | |
179 | } | |
180 | if (chip->cur_format) | |
181 | runtime->hw.formats = (1ULL << chip->cur_format); | |
182 | mutex_unlock(&opened_mutex); | |
183 | chip->playback_substream = substream; | |
184 | return 0; | |
185 | } | |
186 | ||
187 | static int atmel_ac97c_capture_open(struct snd_pcm_substream *substream) | |
188 | { | |
189 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
190 | struct snd_pcm_runtime *runtime = substream->runtime; | |
191 | ||
192 | mutex_lock(&opened_mutex); | |
193 | chip->opened++; | |
194 | runtime->hw = atmel_ac97c_hw; | |
195 | if (chip->cur_rate) { | |
196 | runtime->hw.rate_min = chip->cur_rate; | |
197 | runtime->hw.rate_max = chip->cur_rate; | |
198 | } | |
199 | if (chip->cur_format) | |
200 | runtime->hw.formats = (1ULL << chip->cur_format); | |
201 | mutex_unlock(&opened_mutex); | |
202 | chip->capture_substream = substream; | |
203 | return 0; | |
204 | } | |
205 | ||
206 | static int atmel_ac97c_playback_close(struct snd_pcm_substream *substream) | |
207 | { | |
208 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
209 | ||
210 | mutex_lock(&opened_mutex); | |
211 | chip->opened--; | |
212 | if (!chip->opened) { | |
213 | chip->cur_rate = 0; | |
214 | chip->cur_format = 0; | |
215 | } | |
216 | mutex_unlock(&opened_mutex); | |
217 | ||
218 | chip->playback_substream = NULL; | |
219 | ||
220 | return 0; | |
221 | } | |
222 | ||
223 | static int atmel_ac97c_capture_close(struct snd_pcm_substream *substream) | |
224 | { | |
225 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
226 | ||
227 | mutex_lock(&opened_mutex); | |
228 | chip->opened--; | |
229 | if (!chip->opened) { | |
230 | chip->cur_rate = 0; | |
231 | chip->cur_format = 0; | |
232 | } | |
233 | mutex_unlock(&opened_mutex); | |
234 | ||
235 | chip->capture_substream = NULL; | |
236 | ||
237 | return 0; | |
238 | } | |
239 | ||
240 | static int atmel_ac97c_playback_hw_params(struct snd_pcm_substream *substream, | |
241 | struct snd_pcm_hw_params *hw_params) | |
242 | { | |
243 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
244 | int retval; | |
245 | ||
246 | retval = snd_pcm_lib_malloc_pages(substream, | |
247 | params_buffer_bytes(hw_params)); | |
248 | if (retval < 0) | |
249 | return retval; | |
250 | /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */ | |
7177395f SG |
251 | if (cpu_is_at32ap7000()) { |
252 | /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */ | |
253 | if (retval == 1) | |
254 | if (test_and_clear_bit(DMA_TX_READY, &chip->flags)) | |
255 | dw_dma_cyclic_free(chip->dma.tx_chan); | |
256 | } | |
4ede028f HCE |
257 | /* Set restrictions to params. */ |
258 | mutex_lock(&opened_mutex); | |
259 | chip->cur_rate = params_rate(hw_params); | |
260 | chip->cur_format = params_format(hw_params); | |
261 | mutex_unlock(&opened_mutex); | |
262 | ||
263 | return retval; | |
264 | } | |
265 | ||
266 | static int atmel_ac97c_capture_hw_params(struct snd_pcm_substream *substream, | |
267 | struct snd_pcm_hw_params *hw_params) | |
268 | { | |
269 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
270 | int retval; | |
271 | ||
272 | retval = snd_pcm_lib_malloc_pages(substream, | |
273 | params_buffer_bytes(hw_params)); | |
274 | if (retval < 0) | |
275 | return retval; | |
276 | /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */ | |
7177395f SG |
277 | if (cpu_is_at32ap7000()) { |
278 | if (retval < 0) | |
279 | return retval; | |
280 | /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */ | |
281 | if (retval == 1) | |
282 | if (test_and_clear_bit(DMA_RX_READY, &chip->flags)) | |
283 | dw_dma_cyclic_free(chip->dma.rx_chan); | |
284 | } | |
4ede028f HCE |
285 | |
286 | /* Set restrictions to params. */ | |
287 | mutex_lock(&opened_mutex); | |
288 | chip->cur_rate = params_rate(hw_params); | |
289 | chip->cur_format = params_format(hw_params); | |
290 | mutex_unlock(&opened_mutex); | |
291 | ||
292 | return retval; | |
293 | } | |
294 | ||
295 | static int atmel_ac97c_playback_hw_free(struct snd_pcm_substream *substream) | |
296 | { | |
297 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
7177395f SG |
298 | if (cpu_is_at32ap7000()) { |
299 | if (test_and_clear_bit(DMA_TX_READY, &chip->flags)) | |
300 | dw_dma_cyclic_free(chip->dma.tx_chan); | |
301 | } | |
4ede028f HCE |
302 | return snd_pcm_lib_free_pages(substream); |
303 | } | |
304 | ||
305 | static int atmel_ac97c_capture_hw_free(struct snd_pcm_substream *substream) | |
306 | { | |
307 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
7177395f SG |
308 | if (cpu_is_at32ap7000()) { |
309 | if (test_and_clear_bit(DMA_RX_READY, &chip->flags)) | |
310 | dw_dma_cyclic_free(chip->dma.rx_chan); | |
311 | } | |
4ede028f HCE |
312 | return snd_pcm_lib_free_pages(substream); |
313 | } | |
314 | ||
315 | static int atmel_ac97c_playback_prepare(struct snd_pcm_substream *substream) | |
316 | { | |
317 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
318 | struct snd_pcm_runtime *runtime = substream->runtime; | |
7177395f | 319 | int block_size = frames_to_bytes(runtime, runtime->period_size); |
128ed6a9 | 320 | unsigned long word = ac97c_readl(chip, OCA); |
4ede028f HCE |
321 | int retval; |
322 | ||
7177395f | 323 | chip->playback_period = 0; |
128ed6a9 HCE |
324 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); |
325 | ||
4ede028f HCE |
326 | /* assign channels to AC97C channel A */ |
327 | switch (runtime->channels) { | |
328 | case 1: | |
329 | word |= AC97C_CH_ASSIGN(PCM_LEFT, A); | |
330 | break; | |
331 | case 2: | |
332 | word |= AC97C_CH_ASSIGN(PCM_LEFT, A) | |
333 | | AC97C_CH_ASSIGN(PCM_RIGHT, A); | |
334 | break; | |
335 | default: | |
336 | /* TODO: support more than two channels */ | |
337 | return -EINVAL; | |
4ede028f HCE |
338 | } |
339 | ac97c_writel(chip, OCA, word); | |
340 | ||
341 | /* configure sample format and size */ | |
ec2755a9 SG |
342 | word = ac97c_readl(chip, CAMR); |
343 | if (chip->opened <= 1) | |
344 | word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16; | |
345 | else | |
346 | word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16; | |
4ede028f HCE |
347 | |
348 | switch (runtime->format) { | |
349 | case SNDRV_PCM_FORMAT_S16_LE: | |
7177395f SG |
350 | if (cpu_is_at32ap7000()) |
351 | word |= AC97C_CMR_CEM_LITTLE; | |
4ede028f HCE |
352 | break; |
353 | case SNDRV_PCM_FORMAT_S16_BE: /* fall through */ | |
4ede028f HCE |
354 | word &= ~(AC97C_CMR_CEM_LITTLE); |
355 | break; | |
128ed6a9 HCE |
356 | default: |
357 | word = ac97c_readl(chip, OCA); | |
358 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); | |
359 | ac97c_writel(chip, OCA, word); | |
360 | return -EINVAL; | |
4ede028f HCE |
361 | } |
362 | ||
df163587 HCE |
363 | /* Enable underrun interrupt on channel A */ |
364 | word |= AC97C_CSR_UNRUN; | |
365 | ||
4ede028f HCE |
366 | ac97c_writel(chip, CAMR, word); |
367 | ||
df163587 HCE |
368 | /* Enable channel A event interrupt */ |
369 | word = ac97c_readl(chip, IMR); | |
370 | word |= AC97C_SR_CAEVT; | |
371 | ac97c_writel(chip, IER, word); | |
372 | ||
4ede028f HCE |
373 | /* set variable rate if needed */ |
374 | if (runtime->rate != 48000) { | |
375 | word = ac97c_readl(chip, MR); | |
376 | word |= AC97C_MR_VRA; | |
377 | ac97c_writel(chip, MR, word); | |
378 | } else { | |
379 | word = ac97c_readl(chip, MR); | |
380 | word &= ~(AC97C_MR_VRA); | |
381 | ac97c_writel(chip, MR, word); | |
382 | } | |
383 | ||
384 | retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, | |
385 | runtime->rate); | |
386 | if (retval) | |
387 | dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n", | |
388 | runtime->rate); | |
389 | ||
7177395f SG |
390 | if (cpu_is_at32ap7000()) { |
391 | if (!test_bit(DMA_TX_READY, &chip->flags)) | |
392 | retval = atmel_ac97c_prepare_dma(chip, substream, | |
393 | DMA_TO_DEVICE); | |
394 | } else { | |
395 | /* Initialize and start the PDC */ | |
396 | writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR); | |
397 | writel(block_size / 2, chip->regs + ATMEL_PDC_TCR); | |
398 | writel(runtime->dma_addr + block_size, | |
399 | chip->regs + ATMEL_PDC_TNPR); | |
400 | writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR); | |
401 | } | |
4ede028f HCE |
402 | |
403 | return retval; | |
404 | } | |
405 | ||
406 | static int atmel_ac97c_capture_prepare(struct snd_pcm_substream *substream) | |
407 | { | |
408 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
409 | struct snd_pcm_runtime *runtime = substream->runtime; | |
7177395f | 410 | int block_size = frames_to_bytes(runtime, runtime->period_size); |
128ed6a9 | 411 | unsigned long word = ac97c_readl(chip, ICA); |
4ede028f HCE |
412 | int retval; |
413 | ||
7177395f | 414 | chip->capture_period = 0; |
128ed6a9 HCE |
415 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); |
416 | ||
4ede028f HCE |
417 | /* assign channels to AC97C channel A */ |
418 | switch (runtime->channels) { | |
419 | case 1: | |
420 | word |= AC97C_CH_ASSIGN(PCM_LEFT, A); | |
421 | break; | |
422 | case 2: | |
423 | word |= AC97C_CH_ASSIGN(PCM_LEFT, A) | |
424 | | AC97C_CH_ASSIGN(PCM_RIGHT, A); | |
425 | break; | |
426 | default: | |
427 | /* TODO: support more than two channels */ | |
428 | return -EINVAL; | |
4ede028f HCE |
429 | } |
430 | ac97c_writel(chip, ICA, word); | |
431 | ||
432 | /* configure sample format and size */ | |
ec2755a9 SG |
433 | word = ac97c_readl(chip, CAMR); |
434 | if (chip->opened <= 1) | |
435 | word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16; | |
436 | else | |
437 | word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16; | |
4ede028f HCE |
438 | |
439 | switch (runtime->format) { | |
440 | case SNDRV_PCM_FORMAT_S16_LE: | |
7177395f SG |
441 | if (cpu_is_at32ap7000()) |
442 | word |= AC97C_CMR_CEM_LITTLE; | |
4ede028f HCE |
443 | break; |
444 | case SNDRV_PCM_FORMAT_S16_BE: /* fall through */ | |
4ede028f HCE |
445 | word &= ~(AC97C_CMR_CEM_LITTLE); |
446 | break; | |
128ed6a9 HCE |
447 | default: |
448 | word = ac97c_readl(chip, ICA); | |
449 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); | |
450 | ac97c_writel(chip, ICA, word); | |
451 | return -EINVAL; | |
4ede028f HCE |
452 | } |
453 | ||
df163587 HCE |
454 | /* Enable overrun interrupt on channel A */ |
455 | word |= AC97C_CSR_OVRUN; | |
456 | ||
4ede028f HCE |
457 | ac97c_writel(chip, CAMR, word); |
458 | ||
df163587 HCE |
459 | /* Enable channel A event interrupt */ |
460 | word = ac97c_readl(chip, IMR); | |
461 | word |= AC97C_SR_CAEVT; | |
462 | ac97c_writel(chip, IER, word); | |
463 | ||
4ede028f HCE |
464 | /* set variable rate if needed */ |
465 | if (runtime->rate != 48000) { | |
466 | word = ac97c_readl(chip, MR); | |
467 | word |= AC97C_MR_VRA; | |
468 | ac97c_writel(chip, MR, word); | |
469 | } else { | |
470 | word = ac97c_readl(chip, MR); | |
471 | word &= ~(AC97C_MR_VRA); | |
472 | ac97c_writel(chip, MR, word); | |
473 | } | |
474 | ||
475 | retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, | |
476 | runtime->rate); | |
477 | if (retval) | |
478 | dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n", | |
479 | runtime->rate); | |
480 | ||
7177395f SG |
481 | if (cpu_is_at32ap7000()) { |
482 | if (!test_bit(DMA_RX_READY, &chip->flags)) | |
483 | retval = atmel_ac97c_prepare_dma(chip, substream, | |
484 | DMA_FROM_DEVICE); | |
485 | } else { | |
486 | /* Initialize and start the PDC */ | |
487 | writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR); | |
488 | writel(block_size / 2, chip->regs + ATMEL_PDC_RCR); | |
489 | writel(runtime->dma_addr + block_size, | |
490 | chip->regs + ATMEL_PDC_RNPR); | |
491 | writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR); | |
492 | } | |
4ede028f HCE |
493 | |
494 | return retval; | |
495 | } | |
496 | ||
497 | static int | |
498 | atmel_ac97c_playback_trigger(struct snd_pcm_substream *substream, int cmd) | |
499 | { | |
500 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
7177395f | 501 | unsigned long camr, ptcr = 0; |
4ede028f HCE |
502 | int retval = 0; |
503 | ||
504 | camr = ac97c_readl(chip, CAMR); | |
505 | ||
506 | switch (cmd) { | |
507 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */ | |
508 | case SNDRV_PCM_TRIGGER_RESUME: /* fall through */ | |
509 | case SNDRV_PCM_TRIGGER_START: | |
7177395f SG |
510 | if (cpu_is_at32ap7000()) { |
511 | retval = dw_dma_cyclic_start(chip->dma.tx_chan); | |
512 | if (retval) | |
513 | goto out; | |
514 | } else { | |
515 | ptcr = ATMEL_PDC_TXTEN; | |
516 | } | |
ec2755a9 | 517 | camr |= AC97C_CMR_CENA | AC97C_CSR_ENDTX; |
4ede028f HCE |
518 | break; |
519 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */ | |
520 | case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */ | |
521 | case SNDRV_PCM_TRIGGER_STOP: | |
7177395f SG |
522 | if (cpu_is_at32ap7000()) |
523 | dw_dma_cyclic_stop(chip->dma.tx_chan); | |
524 | else | |
525 | ptcr |= ATMEL_PDC_TXTDIS; | |
4ede028f HCE |
526 | if (chip->opened <= 1) |
527 | camr &= ~AC97C_CMR_CENA; | |
528 | break; | |
529 | default: | |
530 | retval = -EINVAL; | |
531 | goto out; | |
532 | } | |
533 | ||
534 | ac97c_writel(chip, CAMR, camr); | |
7177395f SG |
535 | if (!cpu_is_at32ap7000()) |
536 | writel(ptcr, chip->regs + ATMEL_PDC_PTCR); | |
4ede028f HCE |
537 | out: |
538 | return retval; | |
539 | } | |
540 | ||
541 | static int | |
542 | atmel_ac97c_capture_trigger(struct snd_pcm_substream *substream, int cmd) | |
543 | { | |
544 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
7177395f | 545 | unsigned long camr, ptcr = 0; |
4ede028f HCE |
546 | int retval = 0; |
547 | ||
548 | camr = ac97c_readl(chip, CAMR); | |
7177395f | 549 | ptcr = readl(chip->regs + ATMEL_PDC_PTSR); |
4ede028f HCE |
550 | |
551 | switch (cmd) { | |
552 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */ | |
553 | case SNDRV_PCM_TRIGGER_RESUME: /* fall through */ | |
554 | case SNDRV_PCM_TRIGGER_START: | |
7177395f SG |
555 | if (cpu_is_at32ap7000()) { |
556 | retval = dw_dma_cyclic_start(chip->dma.rx_chan); | |
557 | if (retval) | |
558 | goto out; | |
559 | } else { | |
560 | ptcr = ATMEL_PDC_RXTEN; | |
561 | } | |
ec2755a9 | 562 | camr |= AC97C_CMR_CENA | AC97C_CSR_ENDRX; |
4ede028f HCE |
563 | break; |
564 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */ | |
565 | case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */ | |
566 | case SNDRV_PCM_TRIGGER_STOP: | |
7177395f SG |
567 | if (cpu_is_at32ap7000()) |
568 | dw_dma_cyclic_stop(chip->dma.rx_chan); | |
569 | else | |
570 | ptcr |= (ATMEL_PDC_RXTDIS); | |
4ede028f HCE |
571 | if (chip->opened <= 1) |
572 | camr &= ~AC97C_CMR_CENA; | |
573 | break; | |
574 | default: | |
575 | retval = -EINVAL; | |
576 | break; | |
577 | } | |
578 | ||
579 | ac97c_writel(chip, CAMR, camr); | |
7177395f SG |
580 | if (!cpu_is_at32ap7000()) |
581 | writel(ptcr, chip->regs + ATMEL_PDC_PTCR); | |
4ede028f HCE |
582 | out: |
583 | return retval; | |
584 | } | |
585 | ||
586 | static snd_pcm_uframes_t | |
587 | atmel_ac97c_playback_pointer(struct snd_pcm_substream *substream) | |
588 | { | |
589 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
590 | struct snd_pcm_runtime *runtime = substream->runtime; | |
591 | snd_pcm_uframes_t frames; | |
592 | unsigned long bytes; | |
593 | ||
7177395f SG |
594 | if (cpu_is_at32ap7000()) |
595 | bytes = dw_dma_get_src_addr(chip->dma.tx_chan); | |
596 | else | |
597 | bytes = readl(chip->regs + ATMEL_PDC_TPR); | |
4ede028f HCE |
598 | bytes -= runtime->dma_addr; |
599 | ||
600 | frames = bytes_to_frames(runtime, bytes); | |
601 | if (frames >= runtime->buffer_size) | |
602 | frames -= runtime->buffer_size; | |
603 | return frames; | |
604 | } | |
605 | ||
606 | static snd_pcm_uframes_t | |
607 | atmel_ac97c_capture_pointer(struct snd_pcm_substream *substream) | |
608 | { | |
609 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); | |
610 | struct snd_pcm_runtime *runtime = substream->runtime; | |
611 | snd_pcm_uframes_t frames; | |
612 | unsigned long bytes; | |
613 | ||
7177395f SG |
614 | if (cpu_is_at32ap7000()) |
615 | bytes = dw_dma_get_dst_addr(chip->dma.rx_chan); | |
616 | else | |
617 | bytes = readl(chip->regs + ATMEL_PDC_RPR); | |
4ede028f HCE |
618 | bytes -= runtime->dma_addr; |
619 | ||
620 | frames = bytes_to_frames(runtime, bytes); | |
621 | if (frames >= runtime->buffer_size) | |
622 | frames -= runtime->buffer_size; | |
623 | return frames; | |
624 | } | |
625 | ||
626 | static struct snd_pcm_ops atmel_ac97_playback_ops = { | |
627 | .open = atmel_ac97c_playback_open, | |
628 | .close = atmel_ac97c_playback_close, | |
629 | .ioctl = snd_pcm_lib_ioctl, | |
630 | .hw_params = atmel_ac97c_playback_hw_params, | |
631 | .hw_free = atmel_ac97c_playback_hw_free, | |
632 | .prepare = atmel_ac97c_playback_prepare, | |
633 | .trigger = atmel_ac97c_playback_trigger, | |
634 | .pointer = atmel_ac97c_playback_pointer, | |
635 | }; | |
636 | ||
637 | static struct snd_pcm_ops atmel_ac97_capture_ops = { | |
638 | .open = atmel_ac97c_capture_open, | |
639 | .close = atmel_ac97c_capture_close, | |
640 | .ioctl = snd_pcm_lib_ioctl, | |
641 | .hw_params = atmel_ac97c_capture_hw_params, | |
642 | .hw_free = atmel_ac97c_capture_hw_free, | |
643 | .prepare = atmel_ac97c_capture_prepare, | |
644 | .trigger = atmel_ac97c_capture_trigger, | |
645 | .pointer = atmel_ac97c_capture_pointer, | |
646 | }; | |
647 | ||
df163587 HCE |
648 | static irqreturn_t atmel_ac97c_interrupt(int irq, void *dev) |
649 | { | |
650 | struct atmel_ac97c *chip = (struct atmel_ac97c *)dev; | |
651 | irqreturn_t retval = IRQ_NONE; | |
652 | u32 sr = ac97c_readl(chip, SR); | |
653 | u32 casr = ac97c_readl(chip, CASR); | |
654 | u32 cosr = ac97c_readl(chip, COSR); | |
7177395f | 655 | u32 camr = ac97c_readl(chip, CAMR); |
df163587 HCE |
656 | |
657 | if (sr & AC97C_SR_CAEVT) { | |
7177395f SG |
658 | struct snd_pcm_runtime *runtime; |
659 | int offset, next_period, block_size; | |
f5341163 | 660 | dev_dbg(&chip->pdev->dev, "channel A event%s%s%s%s%s%s\n", |
df163587 HCE |
661 | casr & AC97C_CSR_OVRUN ? " OVRUN" : "", |
662 | casr & AC97C_CSR_RXRDY ? " RXRDY" : "", | |
663 | casr & AC97C_CSR_UNRUN ? " UNRUN" : "", | |
664 | casr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "", | |
665 | casr & AC97C_CSR_TXRDY ? " TXRDY" : "", | |
666 | !casr ? " NONE" : ""); | |
7177395f SG |
667 | if (!cpu_is_at32ap7000()) { |
668 | if ((casr & camr) & AC97C_CSR_ENDTX) { | |
669 | runtime = chip->playback_substream->runtime; | |
670 | block_size = frames_to_bytes(runtime, | |
671 | runtime->period_size); | |
672 | chip->playback_period++; | |
673 | ||
674 | if (chip->playback_period == runtime->periods) | |
675 | chip->playback_period = 0; | |
676 | next_period = chip->playback_period + 1; | |
677 | if (next_period == runtime->periods) | |
678 | next_period = 0; | |
679 | ||
680 | offset = block_size * next_period; | |
681 | ||
682 | writel(runtime->dma_addr + offset, | |
683 | chip->regs + ATMEL_PDC_TNPR); | |
684 | writel(block_size / 2, | |
685 | chip->regs + ATMEL_PDC_TNCR); | |
686 | ||
687 | snd_pcm_period_elapsed( | |
688 | chip->playback_substream); | |
689 | } | |
690 | if ((casr & camr) & AC97C_CSR_ENDRX) { | |
691 | runtime = chip->capture_substream->runtime; | |
692 | block_size = frames_to_bytes(runtime, | |
693 | runtime->period_size); | |
694 | chip->capture_period++; | |
695 | ||
696 | if (chip->capture_period == runtime->periods) | |
697 | chip->capture_period = 0; | |
698 | next_period = chip->capture_period + 1; | |
699 | if (next_period == runtime->periods) | |
700 | next_period = 0; | |
701 | ||
702 | offset = block_size * next_period; | |
703 | ||
704 | writel(runtime->dma_addr + offset, | |
705 | chip->regs + ATMEL_PDC_RNPR); | |
706 | writel(block_size / 2, | |
707 | chip->regs + ATMEL_PDC_RNCR); | |
708 | snd_pcm_period_elapsed(chip->capture_substream); | |
709 | } | |
710 | } | |
df163587 HCE |
711 | retval = IRQ_HANDLED; |
712 | } | |
713 | ||
714 | if (sr & AC97C_SR_COEVT) { | |
715 | dev_info(&chip->pdev->dev, "codec channel event%s%s%s%s%s\n", | |
716 | cosr & AC97C_CSR_OVRUN ? " OVRUN" : "", | |
717 | cosr & AC97C_CSR_RXRDY ? " RXRDY" : "", | |
718 | cosr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "", | |
719 | cosr & AC97C_CSR_TXRDY ? " TXRDY" : "", | |
720 | !cosr ? " NONE" : ""); | |
721 | retval = IRQ_HANDLED; | |
722 | } | |
723 | ||
724 | if (retval == IRQ_NONE) { | |
725 | dev_err(&chip->pdev->dev, "spurious interrupt sr 0x%08x " | |
726 | "casr 0x%08x cosr 0x%08x\n", sr, casr, cosr); | |
727 | } | |
728 | ||
729 | return retval; | |
730 | } | |
731 | ||
7177395f SG |
732 | static struct ac97_pcm at91_ac97_pcm_defs[] __devinitdata = { |
733 | /* Playback */ | |
734 | { | |
735 | .exclusive = 1, | |
736 | .r = { { | |
737 | .slots = ((1 << AC97_SLOT_PCM_LEFT) | |
738 | | (1 << AC97_SLOT_PCM_RIGHT)), | |
739 | } }, | |
740 | }, | |
741 | /* PCM in */ | |
742 | { | |
743 | .stream = 1, | |
744 | .exclusive = 1, | |
745 | .r = { { | |
746 | .slots = ((1 << AC97_SLOT_PCM_LEFT) | |
747 | | (1 << AC97_SLOT_PCM_RIGHT)), | |
748 | } } | |
749 | }, | |
750 | /* Mic in */ | |
751 | { | |
752 | .stream = 1, | |
753 | .exclusive = 1, | |
754 | .r = { { | |
755 | .slots = (1<<AC97_SLOT_MIC), | |
756 | } } | |
757 | }, | |
758 | }; | |
759 | ||
4ede028f HCE |
760 | static int __devinit atmel_ac97c_pcm_new(struct atmel_ac97c *chip) |
761 | { | |
762 | struct snd_pcm *pcm; | |
763 | struct snd_pcm_hardware hw = atmel_ac97c_hw; | |
7177395f | 764 | int capture, playback, retval, err; |
4ede028f HCE |
765 | |
766 | capture = test_bit(DMA_RX_CHAN_PRESENT, &chip->flags); | |
767 | playback = test_bit(DMA_TX_CHAN_PRESENT, &chip->flags); | |
768 | ||
7177395f SG |
769 | if (!cpu_is_at32ap7000()) { |
770 | err = snd_ac97_pcm_assign(chip->ac97_bus, | |
771 | ARRAY_SIZE(at91_ac97_pcm_defs), | |
772 | at91_ac97_pcm_defs); | |
773 | if (err) | |
774 | return err; | |
775 | } | |
4ede028f HCE |
776 | retval = snd_pcm_new(chip->card, chip->card->shortname, |
777 | chip->pdev->id, playback, capture, &pcm); | |
778 | if (retval) | |
779 | return retval; | |
780 | ||
781 | if (capture) | |
782 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, | |
783 | &atmel_ac97_capture_ops); | |
784 | if (playback) | |
785 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, | |
786 | &atmel_ac97_playback_ops); | |
787 | ||
788 | retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
789 | &chip->pdev->dev, hw.periods_min * hw.period_bytes_min, | |
790 | hw.buffer_bytes_max); | |
791 | if (retval) | |
792 | return retval; | |
793 | ||
794 | pcm->private_data = chip; | |
795 | pcm->info_flags = 0; | |
796 | strcpy(pcm->name, chip->card->shortname); | |
797 | chip->pcm = pcm; | |
798 | ||
799 | return 0; | |
800 | } | |
801 | ||
802 | static int atmel_ac97c_mixer_new(struct atmel_ac97c *chip) | |
803 | { | |
804 | struct snd_ac97_template template; | |
805 | memset(&template, 0, sizeof(template)); | |
806 | template.private_data = chip; | |
807 | return snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97); | |
808 | } | |
809 | ||
810 | static void atmel_ac97c_write(struct snd_ac97 *ac97, unsigned short reg, | |
811 | unsigned short val) | |
812 | { | |
813 | struct atmel_ac97c *chip = get_chip(ac97); | |
814 | unsigned long word; | |
815 | int timeout = 40; | |
816 | ||
817 | word = (reg & 0x7f) << 16 | val; | |
818 | ||
819 | do { | |
820 | if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) { | |
821 | ac97c_writel(chip, COTHR, word); | |
822 | return; | |
823 | } | |
824 | udelay(1); | |
825 | } while (--timeout); | |
826 | ||
827 | dev_dbg(&chip->pdev->dev, "codec write timeout\n"); | |
828 | } | |
829 | ||
830 | static unsigned short atmel_ac97c_read(struct snd_ac97 *ac97, | |
831 | unsigned short reg) | |
832 | { | |
833 | struct atmel_ac97c *chip = get_chip(ac97); | |
834 | unsigned long word; | |
835 | int timeout = 40; | |
836 | int write = 10; | |
837 | ||
838 | word = (0x80 | (reg & 0x7f)) << 16; | |
839 | ||
840 | if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) | |
841 | ac97c_readl(chip, CORHR); | |
842 | ||
843 | retry_write: | |
844 | timeout = 40; | |
845 | ||
846 | do { | |
847 | if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) { | |
848 | ac97c_writel(chip, COTHR, word); | |
849 | goto read_reg; | |
850 | } | |
851 | udelay(10); | |
852 | } while (--timeout); | |
853 | ||
854 | if (!--write) | |
855 | goto timed_out; | |
856 | goto retry_write; | |
857 | ||
858 | read_reg: | |
859 | do { | |
860 | if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) { | |
861 | unsigned short val = ac97c_readl(chip, CORHR); | |
862 | return val; | |
863 | } | |
864 | udelay(10); | |
865 | } while (--timeout); | |
866 | ||
867 | if (!--write) | |
868 | goto timed_out; | |
869 | goto retry_write; | |
870 | ||
871 | timed_out: | |
872 | dev_dbg(&chip->pdev->dev, "codec read timeout\n"); | |
873 | return 0xffff; | |
874 | } | |
875 | ||
876 | static bool filter(struct dma_chan *chan, void *slave) | |
877 | { | |
878 | struct dw_dma_slave *dws = slave; | |
879 | ||
880 | if (dws->dma_dev == chan->device->dev) { | |
881 | chan->private = dws; | |
882 | return true; | |
883 | } else | |
884 | return false; | |
885 | } | |
886 | ||
887 | static void atmel_ac97c_reset(struct atmel_ac97c *chip) | |
888 | { | |
81baf3a7 HCE |
889 | ac97c_writel(chip, MR, 0); |
890 | ac97c_writel(chip, MR, AC97C_MR_ENA); | |
891 | ac97c_writel(chip, CAMR, 0); | |
892 | ac97c_writel(chip, COMR, 0); | |
4ede028f HCE |
893 | |
894 | if (gpio_is_valid(chip->reset_pin)) { | |
895 | gpio_set_value(chip->reset_pin, 0); | |
896 | /* AC97 v2.2 specifications says minimum 1 us. */ | |
81baf3a7 | 897 | udelay(2); |
4ede028f HCE |
898 | gpio_set_value(chip->reset_pin, 1); |
899 | } | |
4ede028f HCE |
900 | } |
901 | ||
902 | static int __devinit atmel_ac97c_probe(struct platform_device *pdev) | |
903 | { | |
904 | struct snd_card *card; | |
905 | struct atmel_ac97c *chip; | |
906 | struct resource *regs; | |
907 | struct ac97c_platform_data *pdata; | |
908 | struct clk *pclk; | |
909 | static struct snd_ac97_bus_ops ops = { | |
910 | .write = atmel_ac97c_write, | |
911 | .read = atmel_ac97c_read, | |
912 | }; | |
913 | int retval; | |
df163587 | 914 | int irq; |
4ede028f HCE |
915 | |
916 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
917 | if (!regs) { | |
918 | dev_dbg(&pdev->dev, "no memory resource\n"); | |
919 | return -ENXIO; | |
920 | } | |
921 | ||
922 | pdata = pdev->dev.platform_data; | |
923 | if (!pdata) { | |
924 | dev_dbg(&pdev->dev, "no platform data\n"); | |
925 | return -ENXIO; | |
926 | } | |
927 | ||
df163587 HCE |
928 | irq = platform_get_irq(pdev, 0); |
929 | if (irq < 0) { | |
930 | dev_dbg(&pdev->dev, "could not get irq\n"); | |
931 | return -ENXIO; | |
932 | } | |
933 | ||
7177395f SG |
934 | if (cpu_is_at32ap7000()) { |
935 | pclk = clk_get(&pdev->dev, "pclk"); | |
936 | } else { | |
937 | pclk = clk_get(&pdev->dev, "ac97_clk"); | |
938 | } | |
939 | ||
4ede028f HCE |
940 | if (IS_ERR(pclk)) { |
941 | dev_dbg(&pdev->dev, "no peripheral clock\n"); | |
942 | return PTR_ERR(pclk); | |
943 | } | |
944 | clk_enable(pclk); | |
945 | ||
946 | retval = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1, | |
947 | THIS_MODULE, sizeof(struct atmel_ac97c), &card); | |
948 | if (retval) { | |
949 | dev_dbg(&pdev->dev, "could not create sound card device\n"); | |
950 | goto err_snd_card_new; | |
951 | } | |
952 | ||
953 | chip = get_chip(card); | |
954 | ||
df163587 HCE |
955 | retval = request_irq(irq, atmel_ac97c_interrupt, 0, "AC97C", chip); |
956 | if (retval) { | |
957 | dev_dbg(&pdev->dev, "unable to request irq %d\n", irq); | |
958 | goto err_request_irq; | |
959 | } | |
960 | chip->irq = irq; | |
961 | ||
4ede028f HCE |
962 | spin_lock_init(&chip->lock); |
963 | ||
964 | strcpy(card->driver, "Atmel AC97C"); | |
965 | strcpy(card->shortname, "Atmel AC97C"); | |
966 | sprintf(card->longname, "Atmel AC97 controller"); | |
967 | ||
968 | chip->card = card; | |
969 | chip->pclk = pclk; | |
970 | chip->pdev = pdev; | |
971 | chip->regs = ioremap(regs->start, regs->end - regs->start + 1); | |
972 | ||
973 | if (!chip->regs) { | |
974 | dev_dbg(&pdev->dev, "could not remap register memory\n"); | |
975 | goto err_ioremap; | |
976 | } | |
977 | ||
978 | if (gpio_is_valid(pdata->reset_pin)) { | |
979 | if (gpio_request(pdata->reset_pin, "reset_pin")) { | |
980 | dev_dbg(&pdev->dev, "reset pin not available\n"); | |
981 | chip->reset_pin = -ENODEV; | |
982 | } else { | |
983 | gpio_direction_output(pdata->reset_pin, 1); | |
984 | chip->reset_pin = pdata->reset_pin; | |
985 | } | |
986 | } | |
987 | ||
988 | snd_card_set_dev(card, &pdev->dev); | |
989 | ||
81baf3a7 HCE |
990 | atmel_ac97c_reset(chip); |
991 | ||
df163587 HCE |
992 | /* Enable overrun interrupt from codec channel */ |
993 | ac97c_writel(chip, COMR, AC97C_CSR_OVRUN); | |
994 | ac97c_writel(chip, IER, ac97c_readl(chip, IMR) | AC97C_SR_COEVT); | |
995 | ||
4ede028f HCE |
996 | retval = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus); |
997 | if (retval) { | |
998 | dev_dbg(&pdev->dev, "could not register on ac97 bus\n"); | |
999 | goto err_ac97_bus; | |
1000 | } | |
1001 | ||
4ede028f HCE |
1002 | retval = atmel_ac97c_mixer_new(chip); |
1003 | if (retval) { | |
1004 | dev_dbg(&pdev->dev, "could not register ac97 mixer\n"); | |
1005 | goto err_ac97_bus; | |
1006 | } | |
1007 | ||
7177395f SG |
1008 | if (cpu_is_at32ap7000()) { |
1009 | if (pdata->rx_dws.dma_dev) { | |
1010 | struct dw_dma_slave *dws = &pdata->rx_dws; | |
1011 | dma_cap_mask_t mask; | |
4ede028f | 1012 | |
7177395f | 1013 | dws->rx_reg = regs->start + AC97C_CARHR + 2; |
4ede028f | 1014 | |
7177395f SG |
1015 | dma_cap_zero(mask); |
1016 | dma_cap_set(DMA_SLAVE, mask); | |
4ede028f | 1017 | |
7177395f SG |
1018 | chip->dma.rx_chan = dma_request_channel(mask, filter, |
1019 | dws); | |
4ede028f | 1020 | |
7177395f | 1021 | dev_info(&chip->pdev->dev, "using %s for DMA RX\n", |
23572856 | 1022 | dev_name(&chip->dma.rx_chan->dev->device)); |
7177395f SG |
1023 | set_bit(DMA_RX_CHAN_PRESENT, &chip->flags); |
1024 | } | |
4ede028f | 1025 | |
7177395f SG |
1026 | if (pdata->tx_dws.dma_dev) { |
1027 | struct dw_dma_slave *dws = &pdata->tx_dws; | |
1028 | dma_cap_mask_t mask; | |
4ede028f | 1029 | |
7177395f | 1030 | dws->tx_reg = regs->start + AC97C_CATHR + 2; |
4ede028f | 1031 | |
7177395f SG |
1032 | dma_cap_zero(mask); |
1033 | dma_cap_set(DMA_SLAVE, mask); | |
4ede028f | 1034 | |
7177395f SG |
1035 | chip->dma.tx_chan = dma_request_channel(mask, filter, |
1036 | dws); | |
4ede028f | 1037 | |
7177395f | 1038 | dev_info(&chip->pdev->dev, "using %s for DMA TX\n", |
23572856 | 1039 | dev_name(&chip->dma.tx_chan->dev->device)); |
7177395f SG |
1040 | set_bit(DMA_TX_CHAN_PRESENT, &chip->flags); |
1041 | } | |
4ede028f | 1042 | |
7177395f SG |
1043 | if (!test_bit(DMA_RX_CHAN_PRESENT, &chip->flags) && |
1044 | !test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) { | |
1045 | dev_dbg(&pdev->dev, "DMA not available\n"); | |
1046 | retval = -ENODEV; | |
1047 | goto err_dma; | |
1048 | } | |
1049 | } else { | |
1050 | /* Just pretend that we have DMA channel(for at91 i is actually | |
1051 | * the PDC) */ | |
1052 | set_bit(DMA_RX_CHAN_PRESENT, &chip->flags); | |
1053 | set_bit(DMA_TX_CHAN_PRESENT, &chip->flags); | |
4ede028f HCE |
1054 | } |
1055 | ||
1056 | retval = atmel_ac97c_pcm_new(chip); | |
1057 | if (retval) { | |
1058 | dev_dbg(&pdev->dev, "could not register ac97 pcm device\n"); | |
1059 | goto err_dma; | |
1060 | } | |
1061 | ||
1062 | retval = snd_card_register(card); | |
1063 | if (retval) { | |
1064 | dev_dbg(&pdev->dev, "could not register sound card\n"); | |
df163587 | 1065 | goto err_dma; |
4ede028f HCE |
1066 | } |
1067 | ||
1068 | platform_set_drvdata(pdev, card); | |
1069 | ||
7177395f SG |
1070 | dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p, irq = %d\n", |
1071 | chip->regs, irq); | |
4ede028f HCE |
1072 | |
1073 | return 0; | |
1074 | ||
1075 | err_dma: | |
7177395f SG |
1076 | if (cpu_is_at32ap7000()) { |
1077 | if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags)) | |
1078 | dma_release_channel(chip->dma.rx_chan); | |
1079 | if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) | |
1080 | dma_release_channel(chip->dma.tx_chan); | |
1081 | clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags); | |
1082 | clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags); | |
1083 | chip->dma.rx_chan = NULL; | |
1084 | chip->dma.tx_chan = NULL; | |
1085 | } | |
4ede028f HCE |
1086 | err_ac97_bus: |
1087 | snd_card_set_dev(card, NULL); | |
1088 | ||
1089 | if (gpio_is_valid(chip->reset_pin)) | |
1090 | gpio_free(chip->reset_pin); | |
1091 | ||
1092 | iounmap(chip->regs); | |
1093 | err_ioremap: | |
df163587 HCE |
1094 | free_irq(irq, chip); |
1095 | err_request_irq: | |
4ede028f HCE |
1096 | snd_card_free(card); |
1097 | err_snd_card_new: | |
1098 | clk_disable(pclk); | |
1099 | clk_put(pclk); | |
1100 | return retval; | |
1101 | } | |
1102 | ||
1103 | #ifdef CONFIG_PM | |
1104 | static int atmel_ac97c_suspend(struct platform_device *pdev, pm_message_t msg) | |
1105 | { | |
1106 | struct snd_card *card = platform_get_drvdata(pdev); | |
1107 | struct atmel_ac97c *chip = card->private_data; | |
1108 | ||
7177395f SG |
1109 | if (cpu_is_at32ap7000()) { |
1110 | if (test_bit(DMA_RX_READY, &chip->flags)) | |
1111 | dw_dma_cyclic_stop(chip->dma.rx_chan); | |
1112 | if (test_bit(DMA_TX_READY, &chip->flags)) | |
1113 | dw_dma_cyclic_stop(chip->dma.tx_chan); | |
1114 | } | |
4ede028f HCE |
1115 | clk_disable(chip->pclk); |
1116 | ||
1117 | return 0; | |
1118 | } | |
1119 | ||
1120 | static int atmel_ac97c_resume(struct platform_device *pdev) | |
1121 | { | |
1122 | struct snd_card *card = platform_get_drvdata(pdev); | |
1123 | struct atmel_ac97c *chip = card->private_data; | |
1124 | ||
1125 | clk_enable(chip->pclk); | |
7177395f SG |
1126 | if (cpu_is_at32ap7000()) { |
1127 | if (test_bit(DMA_RX_READY, &chip->flags)) | |
1128 | dw_dma_cyclic_start(chip->dma.rx_chan); | |
1129 | if (test_bit(DMA_TX_READY, &chip->flags)) | |
1130 | dw_dma_cyclic_start(chip->dma.tx_chan); | |
1131 | } | |
4ede028f HCE |
1132 | return 0; |
1133 | } | |
1134 | #else | |
1135 | #define atmel_ac97c_suspend NULL | |
1136 | #define atmel_ac97c_resume NULL | |
1137 | #endif | |
1138 | ||
1139 | static int __devexit atmel_ac97c_remove(struct platform_device *pdev) | |
1140 | { | |
1141 | struct snd_card *card = platform_get_drvdata(pdev); | |
1142 | struct atmel_ac97c *chip = get_chip(card); | |
1143 | ||
1144 | if (gpio_is_valid(chip->reset_pin)) | |
1145 | gpio_free(chip->reset_pin); | |
1146 | ||
bd74a184 HCE |
1147 | ac97c_writel(chip, CAMR, 0); |
1148 | ac97c_writel(chip, COMR, 0); | |
1149 | ac97c_writel(chip, MR, 0); | |
1150 | ||
4ede028f HCE |
1151 | clk_disable(chip->pclk); |
1152 | clk_put(chip->pclk); | |
1153 | iounmap(chip->regs); | |
df163587 | 1154 | free_irq(chip->irq, chip); |
4ede028f | 1155 | |
7177395f SG |
1156 | if (cpu_is_at32ap7000()) { |
1157 | if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags)) | |
1158 | dma_release_channel(chip->dma.rx_chan); | |
1159 | if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) | |
1160 | dma_release_channel(chip->dma.tx_chan); | |
1161 | clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags); | |
1162 | clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags); | |
1163 | chip->dma.rx_chan = NULL; | |
1164 | chip->dma.tx_chan = NULL; | |
1165 | } | |
4ede028f HCE |
1166 | |
1167 | snd_card_set_dev(card, NULL); | |
1168 | snd_card_free(card); | |
1169 | ||
1170 | platform_set_drvdata(pdev, NULL); | |
1171 | ||
1172 | return 0; | |
1173 | } | |
1174 | ||
1175 | static struct platform_driver atmel_ac97c_driver = { | |
1176 | .remove = __devexit_p(atmel_ac97c_remove), | |
1177 | .driver = { | |
1178 | .name = "atmel_ac97c", | |
1179 | }, | |
1180 | .suspend = atmel_ac97c_suspend, | |
1181 | .resume = atmel_ac97c_resume, | |
1182 | }; | |
1183 | ||
1184 | static int __init atmel_ac97c_init(void) | |
1185 | { | |
1186 | return platform_driver_probe(&atmel_ac97c_driver, | |
1187 | atmel_ac97c_probe); | |
1188 | } | |
1189 | module_init(atmel_ac97c_init); | |
1190 | ||
1191 | static void __exit atmel_ac97c_exit(void) | |
1192 | { | |
1193 | platform_driver_unregister(&atmel_ac97c_driver); | |
1194 | } | |
1195 | module_exit(atmel_ac97c_exit); | |
1196 | ||
1197 | MODULE_LICENSE("GPL"); | |
1198 | MODULE_DESCRIPTION("Driver for Atmel AC97 controller"); | |
1199 | MODULE_AUTHOR("Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>"); |