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d6869352 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
f3d9478b JB |
2 | /* |
3 | * Apple Onboard Audio driver for Onyx codec (header) | |
4 | * | |
5 | * Copyright 2006 Johannes Berg <johannes@sipsolutions.net> | |
f3d9478b JB |
6 | */ |
7 | #ifndef __SND_AOA_CODEC_ONYX_H | |
8 | #define __SND_AOA_CODEC_ONYX_H | |
f3d9478b | 9 | #include <linux/i2c.h> |
f3d9478b JB |
10 | #include <asm/pmac_low_i2c.h> |
11 | #include <asm/prom.h> | |
12 | ||
13 | /* PCM3052 register definitions */ | |
14 | ||
15 | /* the attenuation registers take values from | |
16 | * -1 (0dB) to -127 (-63.0 dB) or others (muted) */ | |
17 | #define ONYX_REG_DAC_ATTEN_LEFT 65 | |
18 | #define FIRSTREGISTER ONYX_REG_DAC_ATTEN_LEFT | |
19 | #define ONYX_REG_DAC_ATTEN_RIGHT 66 | |
20 | ||
21 | #define ONYX_REG_CONTROL 67 | |
22 | # define ONYX_MRST (1<<7) | |
23 | # define ONYX_SRST (1<<6) | |
24 | # define ONYX_ADPSV (1<<5) | |
25 | # define ONYX_DAPSV (1<<4) | |
26 | # define ONYX_SILICONVERSION (1<<0) | |
27 | /* all others reserved */ | |
28 | ||
29 | #define ONYX_REG_DAC_CONTROL 68 | |
30 | # define ONYX_OVR1 (1<<6) | |
31 | # define ONYX_MUTE_RIGHT (1<<1) | |
32 | # define ONYX_MUTE_LEFT (1<<0) | |
33 | ||
34 | #define ONYX_REG_DAC_DEEMPH 69 | |
35 | # define ONYX_DIGDEEMPH_SHIFT 5 | |
36 | # define ONYX_DIGDEEMPH_MASK (3<<ONYX_DIGDEEMPH_SHIFT) | |
37 | # define ONYX_DIGDEEMPH_CTRL (1<<4) | |
38 | ||
39 | #define ONYX_REG_DAC_FILTER 70 | |
40 | # define ONYX_ROLLOFF_FAST (1<<5) | |
41 | # define ONYX_DAC_FILTER_ALWAYS (1<<2) | |
42 | ||
43 | #define ONYX_REG_DAC_OUTPHASE 71 | |
44 | # define ONYX_OUTPHASE_INVERTED (1<<0) | |
45 | ||
46 | #define ONYX_REG_ADC_CONTROL 72 | |
47 | # define ONYX_ADC_INPUT_MIC (1<<5) | |
48 | /* 8 + input gain in dB, valid range for input gain is -4 .. 20 dB */ | |
49 | # define ONYX_ADC_PGA_GAIN_MASK 0x1f | |
50 | ||
51 | #define ONYX_REG_ADC_HPF_BYPASS 75 | |
52 | # define ONYX_HPF_DISABLE (1<<3) | |
53 | # define ONYX_ADC_HPF_ALWAYS (1<<2) | |
54 | ||
55 | #define ONYX_REG_DIG_INFO1 77 | |
56 | # define ONYX_MASK_DIN_TO_BPZ (1<<7) | |
57 | /* bits 1-5 control channel bits 1-5 */ | |
58 | # define ONYX_DIGOUT_DISABLE (1<<0) | |
59 | ||
60 | #define ONYX_REG_DIG_INFO2 78 | |
61 | /* controls channel bits 8-15 */ | |
62 | ||
63 | #define ONYX_REG_DIG_INFO3 79 | |
64 | /* control channel bits 24-29, high 2 bits reserved */ | |
65 | ||
66 | #define ONYX_REG_DIG_INFO4 80 | |
67 | # define ONYX_VALIDL (1<<7) | |
68 | # define ONYX_VALIDR (1<<6) | |
69 | # define ONYX_SPDIF_ENABLE (1<<5) | |
70 | /* lower 4 bits control bits 32-35 of channel control and word length */ | |
71 | # define ONYX_WORDLEN_MASK (0xF) | |
72 | ||
73 | #endif /* __SND_AOA_CODEC_ONYX_H */ |