Merge tag 'block-6.1-2022-10-20' of git://git.kernel.dk/linux
[linux-block.git] / samples / vfio-mdev / mbochs.c
CommitLineData
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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Mediated virtual PCI display host device driver
4 *
5 * Emulate enough of qemu stdvga to make bochs-drm.ko happy. That is
6 * basically the vram memory bar and the bochs dispi interface vbe
7 * registers in the mmio register bar. Specifically it does *not*
8 * include any legacy vga stuff. Device looks a lot like "qemu -device
9 * secondary-vga".
10 *
11 * (c) Gerd Hoffmann <kraxel@redhat.com>
12 *
13 * based on mtty driver which is:
14 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
15 * Author: Neo Jia <cjia@nvidia.com>
16 * Kirti Wankhede <kwankhede@nvidia.com>
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22#include <linux/init.h>
23#include <linux/module.h>
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24#include <linux/kernel.h>
25#include <linux/slab.h>
26#include <linux/vmalloc.h>
27#include <linux/cdev.h>
28#include <linux/vfio.h>
29#include <linux/iommu.h>
30#include <linux/sysfs.h>
31#include <linux/mdev.h>
32#include <linux/pci.h>
33#include <linux/dma-buf.h>
34#include <linux/highmem.h>
35#include <drm/drm_fourcc.h>
36#include <drm/drm_rect.h>
37#include <drm/drm_modeset_lock.h>
38#include <drm/drm_property.h>
39#include <drm/drm_plane.h>
40
41
42#define VBE_DISPI_INDEX_ID 0x0
43#define VBE_DISPI_INDEX_XRES 0x1
44#define VBE_DISPI_INDEX_YRES 0x2
45#define VBE_DISPI_INDEX_BPP 0x3
46#define VBE_DISPI_INDEX_ENABLE 0x4
47#define VBE_DISPI_INDEX_BANK 0x5
48#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
49#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
50#define VBE_DISPI_INDEX_X_OFFSET 0x8
51#define VBE_DISPI_INDEX_Y_OFFSET 0x9
52#define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa
53#define VBE_DISPI_INDEX_COUNT 0xb
54
55#define VBE_DISPI_ID0 0xB0C0
56#define VBE_DISPI_ID1 0xB0C1
57#define VBE_DISPI_ID2 0xB0C2
58#define VBE_DISPI_ID3 0xB0C3
59#define VBE_DISPI_ID4 0xB0C4
60#define VBE_DISPI_ID5 0xB0C5
61
62#define VBE_DISPI_DISABLED 0x00
63#define VBE_DISPI_ENABLED 0x01
64#define VBE_DISPI_GETCAPS 0x02
65#define VBE_DISPI_8BIT_DAC 0x20
66#define VBE_DISPI_LFB_ENABLED 0x40
67#define VBE_DISPI_NOCLEARMEM 0x80
68
69
70#define MBOCHS_NAME "mbochs"
71#define MBOCHS_CLASS_NAME "mbochs"
72
104c7405
GH
73#define MBOCHS_EDID_REGION_INDEX VFIO_PCI_NUM_REGIONS
74#define MBOCHS_NUM_REGIONS (MBOCHS_EDID_REGION_INDEX+1)
75
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GH
76#define MBOCHS_CONFIG_SPACE_SIZE 0xff
77#define MBOCHS_MMIO_BAR_OFFSET PAGE_SIZE
78#define MBOCHS_MMIO_BAR_SIZE PAGE_SIZE
104c7405 79#define MBOCHS_EDID_OFFSET (MBOCHS_MMIO_BAR_OFFSET + \
a5e6e650 80 MBOCHS_MMIO_BAR_SIZE)
104c7405
GH
81#define MBOCHS_EDID_SIZE PAGE_SIZE
82#define MBOCHS_MEMORY_BAR_OFFSET (MBOCHS_EDID_OFFSET + \
83 MBOCHS_EDID_SIZE)
84
85#define MBOCHS_EDID_BLOB_OFFSET (MBOCHS_EDID_SIZE/2)
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86
87#define STORE_LE16(addr, val) (*(u16 *)addr = val)
88#define STORE_LE32(addr, val) (*(u32 *)addr = val)
89
90
91MODULE_LICENSE("GPL v2");
92
93static int max_mbytes = 256;
94module_param_named(count, max_mbytes, int, 0444);
95MODULE_PARM_DESC(mem, "megabytes available to " MBOCHS_NAME " devices");
96
97
98#define MBOCHS_TYPE_1 "small"
99#define MBOCHS_TYPE_2 "medium"
100#define MBOCHS_TYPE_3 "large"
101
da44c340
CH
102static struct mbochs_type {
103 struct mdev_type type;
a5e6e650 104 u32 mbytes;
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GH
105 u32 max_x;
106 u32 max_y;
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107} mbochs_types[] = {
108 {
da44c340 109 .type.sysfs_name = MBOCHS_TYPE_1,
0bc79069 110 .type.pretty_name = MBOCHS_CLASS_NAME "-" MBOCHS_TYPE_1,
a5e6e650 111 .mbytes = 4,
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GH
112 .max_x = 800,
113 .max_y = 600,
a5e6e650 114 }, {
da44c340 115 .type.sysfs_name = MBOCHS_TYPE_2,
0bc79069 116 .type.pretty_name = MBOCHS_CLASS_NAME "-" MBOCHS_TYPE_2,
a5e6e650 117 .mbytes = 16,
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GH
118 .max_x = 1920,
119 .max_y = 1440,
a5e6e650 120 }, {
da44c340 121 .type.sysfs_name = MBOCHS_TYPE_3,
0bc79069 122 .type.pretty_name = MBOCHS_CLASS_NAME "-" MBOCHS_TYPE_3,
a5e6e650 123 .mbytes = 64,
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GH
124 .max_x = 0,
125 .max_y = 0,
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GH
126 },
127};
128
da44c340
CH
129static struct mdev_type *mbochs_mdev_types[] = {
130 &mbochs_types[0].type,
131 &mbochs_types[1].type,
132 &mbochs_types[2].type,
133};
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134
135static dev_t mbochs_devt;
136static struct class *mbochs_class;
137static struct cdev mbochs_cdev;
138static struct device mbochs_dev;
89345d51 139static struct mdev_parent mbochs_parent;
de5494af 140static atomic_t mbochs_avail_mbytes;
681c1615 141static const struct vfio_device_ops mbochs_dev_ops;
a5e6e650 142
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GH
143struct vfio_region_info_ext {
144 struct vfio_region_info base;
145 struct vfio_region_info_cap_type type;
146};
147
a5e6e650
GH
148struct mbochs_mode {
149 u32 drm_format;
150 u32 bytepp;
151 u32 width;
152 u32 height;
153 u32 stride;
154 u32 __pad;
155 u64 offset;
156 u64 size;
157};
158
159struct mbochs_dmabuf {
160 struct mbochs_mode mode;
161 u32 id;
162 struct page **pages;
163 pgoff_t pagecount;
164 struct dma_buf *buf;
165 struct mdev_state *mdev_state;
166 struct list_head next;
167 bool unlinked;
168};
169
170/* State of each mdev device */
171struct mdev_state {
681c1615 172 struct vfio_device vdev;
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173 u8 *vconfig;
174 u64 bar_mask[3];
175 u32 memory_bar_mask;
176 struct mutex ops_lock;
177 struct mdev_device *mdev;
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178
179 const struct mbochs_type *type;
180 u16 vbe[VBE_DISPI_INDEX_COUNT];
181 u64 memsize;
182 struct page **pages;
183 pgoff_t pagecount;
104c7405
GH
184 struct vfio_region_gfx_edid edid_regs;
185 u8 edid_blob[0x400];
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GH
186
187 struct list_head dmabufs;
188 u32 active_id;
189 u32 next_id;
190};
191
192static const char *vbe_name_list[VBE_DISPI_INDEX_COUNT] = {
193 [VBE_DISPI_INDEX_ID] = "id",
194 [VBE_DISPI_INDEX_XRES] = "xres",
195 [VBE_DISPI_INDEX_YRES] = "yres",
196 [VBE_DISPI_INDEX_BPP] = "bpp",
197 [VBE_DISPI_INDEX_ENABLE] = "enable",
198 [VBE_DISPI_INDEX_BANK] = "bank",
199 [VBE_DISPI_INDEX_VIRT_WIDTH] = "virt-width",
200 [VBE_DISPI_INDEX_VIRT_HEIGHT] = "virt-height",
201 [VBE_DISPI_INDEX_X_OFFSET] = "x-offset",
202 [VBE_DISPI_INDEX_Y_OFFSET] = "y-offset",
203 [VBE_DISPI_INDEX_VIDEO_MEMORY_64K] = "video-mem",
204};
205
206static const char *vbe_name(u32 index)
207{
208 if (index < ARRAY_SIZE(vbe_name_list))
209 return vbe_name_list[index];
210 return "(invalid)";
211}
212
498e8bf5
AK
213static struct page *__mbochs_get_page(struct mdev_state *mdev_state,
214 pgoff_t pgoff);
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GH
215static struct page *mbochs_get_page(struct mdev_state *mdev_state,
216 pgoff_t pgoff);
217
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GH
218static void mbochs_create_config_space(struct mdev_state *mdev_state)
219{
220 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_VENDOR_ID],
221 0x1234);
222 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_DEVICE_ID],
223 0x1111);
224 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_SUBSYSTEM_VENDOR_ID],
225 PCI_SUBVENDOR_ID_REDHAT_QUMRANET);
226 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_SUBSYSTEM_ID],
227 PCI_SUBDEVICE_ID_QEMU);
228
229 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_COMMAND],
230 PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
231 STORE_LE16((u16 *) &mdev_state->vconfig[PCI_CLASS_DEVICE],
232 PCI_CLASS_DISPLAY_OTHER);
233 mdev_state->vconfig[PCI_CLASS_REVISION] = 0x01;
234
235 STORE_LE32((u32 *) &mdev_state->vconfig[PCI_BASE_ADDRESS_0],
236 PCI_BASE_ADDRESS_SPACE_MEMORY |
237 PCI_BASE_ADDRESS_MEM_TYPE_32 |
238 PCI_BASE_ADDRESS_MEM_PREFETCH);
239 mdev_state->bar_mask[0] = ~(mdev_state->memsize) + 1;
240
241 STORE_LE32((u32 *) &mdev_state->vconfig[PCI_BASE_ADDRESS_2],
242 PCI_BASE_ADDRESS_SPACE_MEMORY |
243 PCI_BASE_ADDRESS_MEM_TYPE_32);
244 mdev_state->bar_mask[2] = ~(MBOCHS_MMIO_BAR_SIZE) + 1;
245}
246
247static int mbochs_check_framebuffer(struct mdev_state *mdev_state,
248 struct mbochs_mode *mode)
249{
250 struct device *dev = mdev_dev(mdev_state->mdev);
251 u16 *vbe = mdev_state->vbe;
252 u32 virt_width;
253
254 WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
255
256 if (!(vbe[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED))
257 goto nofb;
258
259 memset(mode, 0, sizeof(*mode));
260 switch (vbe[VBE_DISPI_INDEX_BPP]) {
261 case 32:
262 mode->drm_format = DRM_FORMAT_XRGB8888;
263 mode->bytepp = 4;
264 break;
265 default:
266 dev_info_ratelimited(dev, "%s: bpp %d not supported\n",
267 __func__, vbe[VBE_DISPI_INDEX_BPP]);
268 goto nofb;
269 }
270
271 mode->width = vbe[VBE_DISPI_INDEX_XRES];
272 mode->height = vbe[VBE_DISPI_INDEX_YRES];
273 virt_width = vbe[VBE_DISPI_INDEX_VIRT_WIDTH];
274 if (virt_width < mode->width)
275 virt_width = mode->width;
276 mode->stride = virt_width * mode->bytepp;
277 mode->size = (u64)mode->stride * mode->height;
278 mode->offset = ((u64)vbe[VBE_DISPI_INDEX_X_OFFSET] * mode->bytepp +
279 (u64)vbe[VBE_DISPI_INDEX_Y_OFFSET] * mode->stride);
280
281 if (mode->width < 64 || mode->height < 64) {
282 dev_info_ratelimited(dev, "%s: invalid resolution %dx%d\n",
283 __func__, mode->width, mode->height);
284 goto nofb;
285 }
286 if (mode->offset + mode->size > mdev_state->memsize) {
287 dev_info_ratelimited(dev, "%s: framebuffer memory overflow\n",
288 __func__);
289 goto nofb;
290 }
291
292 return 0;
293
294nofb:
295 memset(mode, 0, sizeof(*mode));
296 return -EINVAL;
297}
298
299static bool mbochs_modes_equal(struct mbochs_mode *mode1,
300 struct mbochs_mode *mode2)
301{
302 return memcmp(mode1, mode2, sizeof(struct mbochs_mode)) == 0;
303}
304
305static void handle_pci_cfg_write(struct mdev_state *mdev_state, u16 offset,
306 char *buf, u32 count)
307{
308 struct device *dev = mdev_dev(mdev_state->mdev);
309 int index = (offset - PCI_BASE_ADDRESS_0) / 0x04;
310 u32 cfg_addr;
311
312 switch (offset) {
313 case PCI_BASE_ADDRESS_0:
314 case PCI_BASE_ADDRESS_2:
315 cfg_addr = *(u32 *)buf;
316
317 if (cfg_addr == 0xffffffff) {
318 cfg_addr = (cfg_addr & mdev_state->bar_mask[index]);
319 } else {
320 cfg_addr &= PCI_BASE_ADDRESS_MEM_MASK;
321 if (cfg_addr)
322 dev_info(dev, "BAR #%d @ 0x%x\n",
323 index, cfg_addr);
324 }
325
326 cfg_addr |= (mdev_state->vconfig[offset] &
327 ~PCI_BASE_ADDRESS_MEM_MASK);
328 STORE_LE32(&mdev_state->vconfig[offset], cfg_addr);
329 break;
330 }
331}
332
333static void handle_mmio_write(struct mdev_state *mdev_state, u16 offset,
334 char *buf, u32 count)
335{
336 struct device *dev = mdev_dev(mdev_state->mdev);
337 int index;
338 u16 reg16;
339
340 switch (offset) {
341 case 0x400 ... 0x41f: /* vga ioports remapped */
342 goto unhandled;
343 case 0x500 ... 0x515: /* bochs dispi interface */
344 if (count != 2)
345 goto unhandled;
346 index = (offset - 0x500) / 2;
347 reg16 = *(u16 *)buf;
348 if (index < ARRAY_SIZE(mdev_state->vbe))
349 mdev_state->vbe[index] = reg16;
350 dev_dbg(dev, "%s: vbe write %d = %d (%s)\n",
351 __func__, index, reg16, vbe_name(index));
352 break;
353 case 0x600 ... 0x607: /* qemu extended regs */
354 goto unhandled;
355 default:
356unhandled:
357 dev_dbg(dev, "%s: @0x%03x, count %d (unhandled)\n",
358 __func__, offset, count);
359 break;
360 }
361}
362
363static void handle_mmio_read(struct mdev_state *mdev_state, u16 offset,
364 char *buf, u32 count)
365{
366 struct device *dev = mdev_dev(mdev_state->mdev);
104c7405 367 struct vfio_region_gfx_edid *edid;
a5e6e650
GH
368 u16 reg16 = 0;
369 int index;
370
371 switch (offset) {
104c7405
GH
372 case 0x000 ... 0x3ff: /* edid block */
373 edid = &mdev_state->edid_regs;
374 if (edid->link_state != VFIO_DEVICE_GFX_LINK_STATE_UP ||
375 offset >= edid->edid_size) {
376 memset(buf, 0, count);
377 break;
378 }
379 memcpy(buf, mdev_state->edid_blob + offset, count);
380 break;
a5e6e650
GH
381 case 0x500 ... 0x515: /* bochs dispi interface */
382 if (count != 2)
383 goto unhandled;
384 index = (offset - 0x500) / 2;
385 if (index < ARRAY_SIZE(mdev_state->vbe))
386 reg16 = mdev_state->vbe[index];
387 dev_dbg(dev, "%s: vbe read %d = %d (%s)\n",
388 __func__, index, reg16, vbe_name(index));
389 *(u16 *)buf = reg16;
390 break;
391 default:
392unhandled:
393 dev_dbg(dev, "%s: @0x%03x, count %d (unhandled)\n",
394 __func__, offset, count);
395 memset(buf, 0, count);
396 break;
397 }
398}
399
104c7405
GH
400static void handle_edid_regs(struct mdev_state *mdev_state, u16 offset,
401 char *buf, u32 count, bool is_write)
402{
403 char *regs = (void *)&mdev_state->edid_regs;
404
405 if (offset + count > sizeof(mdev_state->edid_regs))
406 return;
407 if (count != 4)
408 return;
409 if (offset % 4)
410 return;
411
412 if (is_write) {
413 switch (offset) {
414 case offsetof(struct vfio_region_gfx_edid, link_state):
415 case offsetof(struct vfio_region_gfx_edid, edid_size):
416 memcpy(regs + offset, buf, count);
417 break;
418 default:
419 /* read-only regs */
420 break;
421 }
422 } else {
423 memcpy(buf, regs + offset, count);
424 }
425}
426
427static void handle_edid_blob(struct mdev_state *mdev_state, u16 offset,
428 char *buf, u32 count, bool is_write)
429{
430 if (offset + count > mdev_state->edid_regs.edid_max_size)
431 return;
432 if (is_write)
433 memcpy(mdev_state->edid_blob + offset, buf, count);
434 else
435 memcpy(buf, mdev_state->edid_blob + offset, count);
436}
437
681c1615
JG
438static ssize_t mdev_access(struct mdev_state *mdev_state, char *buf,
439 size_t count, loff_t pos, bool is_write)
a5e6e650 440{
a5e6e650
GH
441 struct page *pg;
442 loff_t poff;
443 char *map;
444 int ret = 0;
445
446 mutex_lock(&mdev_state->ops_lock);
447
448 if (pos < MBOCHS_CONFIG_SPACE_SIZE) {
449 if (is_write)
450 handle_pci_cfg_write(mdev_state, pos, buf, count);
451 else
452 memcpy(buf, (mdev_state->vconfig + pos), count);
453
454 } else if (pos >= MBOCHS_MMIO_BAR_OFFSET &&
104c7405
GH
455 pos + count <= (MBOCHS_MMIO_BAR_OFFSET +
456 MBOCHS_MMIO_BAR_SIZE)) {
a5e6e650
GH
457 pos -= MBOCHS_MMIO_BAR_OFFSET;
458 if (is_write)
459 handle_mmio_write(mdev_state, pos, buf, count);
460 else
461 handle_mmio_read(mdev_state, pos, buf, count);
462
104c7405
GH
463 } else if (pos >= MBOCHS_EDID_OFFSET &&
464 pos + count <= (MBOCHS_EDID_OFFSET +
465 MBOCHS_EDID_SIZE)) {
466 pos -= MBOCHS_EDID_OFFSET;
467 if (pos < MBOCHS_EDID_BLOB_OFFSET) {
468 handle_edid_regs(mdev_state, pos, buf, count, is_write);
469 } else {
470 pos -= MBOCHS_EDID_BLOB_OFFSET;
471 handle_edid_blob(mdev_state, pos, buf, count, is_write);
472 }
473
a5e6e650
GH
474 } else if (pos >= MBOCHS_MEMORY_BAR_OFFSET &&
475 pos + count <=
476 MBOCHS_MEMORY_BAR_OFFSET + mdev_state->memsize) {
477 pos -= MBOCHS_MMIO_BAR_OFFSET;
478 poff = pos & ~PAGE_MASK;
498e8bf5 479 pg = __mbochs_get_page(mdev_state, pos >> PAGE_SHIFT);
a5e6e650
GH
480 map = kmap(pg);
481 if (is_write)
482 memcpy(map + poff, buf, count);
483 else
484 memcpy(buf, map + poff, count);
485 kunmap(pg);
486 put_page(pg);
487
488 } else {
681c1615 489 dev_dbg(mdev_state->vdev.dev, "%s: %s @0x%llx (unhandled)\n",
a5e6e650
GH
490 __func__, is_write ? "WR" : "RD", pos);
491 ret = -1;
492 goto accessfailed;
493 }
494
495 ret = count;
496
497
498accessfailed:
499 mutex_unlock(&mdev_state->ops_lock);
500
501 return ret;
502}
503
681c1615 504static int mbochs_reset(struct mdev_state *mdev_state)
a5e6e650 505{
a5e6e650
GH
506 u32 size64k = mdev_state->memsize / (64 * 1024);
507 int i;
508
509 for (i = 0; i < ARRAY_SIZE(mdev_state->vbe); i++)
510 mdev_state->vbe[i] = 0;
511 mdev_state->vbe[VBE_DISPI_INDEX_ID] = VBE_DISPI_ID5;
512 mdev_state->vbe[VBE_DISPI_INDEX_VIDEO_MEMORY_64K] = size64k;
513 return 0;
514}
515
3d5d18e1 516static int mbochs_init_dev(struct vfio_device *vdev)
a5e6e650 517{
3d5d18e1
YL
518 struct mdev_state *mdev_state =
519 container_of(vdev, struct mdev_state, vdev);
520 struct mdev_device *mdev = to_mdev_device(vdev->dev);
da44c340
CH
521 struct mbochs_type *type =
522 container_of(mdev->type, struct mbochs_type, type);
3d5d18e1 523 int avail_mbytes = atomic_read(&mbochs_avail_mbytes);
681c1615 524 int ret = -ENOMEM;
a5e6e650 525
de5494af
JG
526 do {
527 if (avail_mbytes < type->mbytes)
528 return -ENOSPC;
529 } while (!atomic_try_cmpxchg(&mbochs_avail_mbytes, &avail_mbytes,
530 avail_mbytes - type->mbytes));
a5e6e650 531
a5e6e650 532 mdev_state->vconfig = kzalloc(MBOCHS_CONFIG_SPACE_SIZE, GFP_KERNEL);
3d5d18e1
YL
533 if (!mdev_state->vconfig)
534 goto err_avail;
a5e6e650
GH
535
536 mdev_state->memsize = type->mbytes * 1024 * 1024;
537 mdev_state->pagecount = mdev_state->memsize >> PAGE_SHIFT;
538 mdev_state->pages = kcalloc(mdev_state->pagecount,
539 sizeof(struct page *),
540 GFP_KERNEL);
541 if (!mdev_state->pages)
3d5d18e1 542 goto err_vconfig;
a5e6e650
GH
543
544 mutex_init(&mdev_state->ops_lock);
545 mdev_state->mdev = mdev;
a5e6e650
GH
546 INIT_LIST_HEAD(&mdev_state->dmabufs);
547 mdev_state->next_id = 1;
548
549 mdev_state->type = type;
104c7405
GH
550 mdev_state->edid_regs.max_xres = type->max_x;
551 mdev_state->edid_regs.max_yres = type->max_y;
552 mdev_state->edid_regs.edid_offset = MBOCHS_EDID_BLOB_OFFSET;
553 mdev_state->edid_regs.edid_max_size = sizeof(mdev_state->edid_blob);
a5e6e650 554 mbochs_create_config_space(mdev_state);
681c1615 555 mbochs_reset(mdev_state);
a5e6e650 556
3d5d18e1 557 dev_info(vdev->dev, "%s: %s, %d MB, %ld pages\n", __func__,
0bc79069 558 type->type.pretty_name, type->mbytes, mdev_state->pagecount);
3d5d18e1
YL
559 return 0;
560
561err_vconfig:
562 kfree(mdev_state->vconfig);
563err_avail:
564 atomic_add(type->mbytes, &mbochs_avail_mbytes);
565 return ret;
566}
567
568static int mbochs_probe(struct mdev_device *mdev)
569{
570 struct mdev_state *mdev_state;
571 int ret = -ENOMEM;
572
573 mdev_state = vfio_alloc_device(mdev_state, vdev, &mdev->dev,
574 &mbochs_dev_ops);
575 if (IS_ERR(mdev_state))
576 return PTR_ERR(mdev_state);
577
c68ea0d0 578 ret = vfio_register_emulated_iommu_dev(&mdev_state->vdev);
681c1615 579 if (ret)
3d5d18e1 580 goto err_put_vdev;
681c1615 581 dev_set_drvdata(&mdev->dev, mdev_state);
a5e6e650 582 return 0;
3d5d18e1
YL
583
584err_put_vdev:
585 vfio_put_device(&mdev_state->vdev);
586 return ret;
587}
588
589static void mbochs_release_dev(struct vfio_device *vdev)
590{
591 struct mdev_state *mdev_state =
592 container_of(vdev, struct mdev_state, vdev);
593
594 atomic_add(mdev_state->type->mbytes, &mbochs_avail_mbytes);
de5494af 595 kfree(mdev_state->pages);
a5e6e650 596 kfree(mdev_state->vconfig);
3d5d18e1 597 vfio_free_device(vdev);
a5e6e650
GH
598}
599
681c1615 600static void mbochs_remove(struct mdev_device *mdev)
a5e6e650 601{
681c1615 602 struct mdev_state *mdev_state = dev_get_drvdata(&mdev->dev);
a5e6e650 603
681c1615 604 vfio_unregister_group_dev(&mdev_state->vdev);
3d5d18e1 605 vfio_put_device(&mdev_state->vdev);
a5e6e650
GH
606}
607
681c1615 608static ssize_t mbochs_read(struct vfio_device *vdev, char __user *buf,
a5e6e650
GH
609 size_t count, loff_t *ppos)
610{
681c1615
JG
611 struct mdev_state *mdev_state =
612 container_of(vdev, struct mdev_state, vdev);
a5e6e650
GH
613 unsigned int done = 0;
614 int ret;
615
616 while (count) {
617 size_t filled;
618
619 if (count >= 4 && !(*ppos % 4)) {
620 u32 val;
621
681c1615 622 ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
a5e6e650
GH
623 *ppos, false);
624 if (ret <= 0)
625 goto read_err;
626
627 if (copy_to_user(buf, &val, sizeof(val)))
628 goto read_err;
629
630 filled = 4;
631 } else if (count >= 2 && !(*ppos % 2)) {
632 u16 val;
633
681c1615 634 ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
a5e6e650
GH
635 *ppos, false);
636 if (ret <= 0)
637 goto read_err;
638
639 if (copy_to_user(buf, &val, sizeof(val)))
640 goto read_err;
641
642 filled = 2;
643 } else {
644 u8 val;
645
681c1615 646 ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
a5e6e650
GH
647 *ppos, false);
648 if (ret <= 0)
649 goto read_err;
650
651 if (copy_to_user(buf, &val, sizeof(val)))
652 goto read_err;
653
654 filled = 1;
655 }
656
657 count -= filled;
658 done += filled;
659 *ppos += filled;
660 buf += filled;
661 }
662
663 return done;
664
665read_err:
666 return -EFAULT;
667}
668
681c1615 669static ssize_t mbochs_write(struct vfio_device *vdev, const char __user *buf,
a5e6e650
GH
670 size_t count, loff_t *ppos)
671{
681c1615
JG
672 struct mdev_state *mdev_state =
673 container_of(vdev, struct mdev_state, vdev);
a5e6e650
GH
674 unsigned int done = 0;
675 int ret;
676
677 while (count) {
678 size_t filled;
679
680 if (count >= 4 && !(*ppos % 4)) {
681 u32 val;
682
683 if (copy_from_user(&val, buf, sizeof(val)))
684 goto write_err;
685
681c1615 686 ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
a5e6e650
GH
687 *ppos, true);
688 if (ret <= 0)
689 goto write_err;
690
691 filled = 4;
692 } else if (count >= 2 && !(*ppos % 2)) {
693 u16 val;
694
695 if (copy_from_user(&val, buf, sizeof(val)))
696 goto write_err;
697
681c1615 698 ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
a5e6e650
GH
699 *ppos, true);
700 if (ret <= 0)
701 goto write_err;
702
703 filled = 2;
704 } else {
705 u8 val;
706
707 if (copy_from_user(&val, buf, sizeof(val)))
708 goto write_err;
709
681c1615 710 ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
a5e6e650
GH
711 *ppos, true);
712 if (ret <= 0)
713 goto write_err;
714
715 filled = 1;
716 }
717 count -= filled;
718 done += filled;
719 *ppos += filled;
720 buf += filled;
721 }
722
723 return done;
724write_err:
725 return -EFAULT;
726}
727
728static struct page *__mbochs_get_page(struct mdev_state *mdev_state,
729 pgoff_t pgoff)
730{
731 WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
732
733 if (!mdev_state->pages[pgoff]) {
734 mdev_state->pages[pgoff] =
735 alloc_pages(GFP_HIGHUSER | __GFP_ZERO, 0);
736 if (!mdev_state->pages[pgoff])
737 return NULL;
738 }
739
740 get_page(mdev_state->pages[pgoff]);
741 return mdev_state->pages[pgoff];
742}
743
744static struct page *mbochs_get_page(struct mdev_state *mdev_state,
745 pgoff_t pgoff)
746{
747 struct page *page;
748
749 if (WARN_ON(pgoff >= mdev_state->pagecount))
750 return NULL;
751
752 mutex_lock(&mdev_state->ops_lock);
753 page = __mbochs_get_page(mdev_state, pgoff);
754 mutex_unlock(&mdev_state->ops_lock);
755
756 return page;
757}
758
759static void mbochs_put_pages(struct mdev_state *mdev_state)
760{
761 struct device *dev = mdev_dev(mdev_state->mdev);
762 int i, count = 0;
763
764 WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
765
766 for (i = 0; i < mdev_state->pagecount; i++) {
767 if (!mdev_state->pages[i])
768 continue;
769 put_page(mdev_state->pages[i]);
770 mdev_state->pages[i] = NULL;
771 count++;
772 }
773 dev_dbg(dev, "%s: %d pages released\n", __func__, count);
774}
775
d7ef4899 776static vm_fault_t mbochs_region_vm_fault(struct vm_fault *vmf)
a5e6e650
GH
777{
778 struct vm_area_struct *vma = vmf->vma;
779 struct mdev_state *mdev_state = vma->vm_private_data;
780 pgoff_t page_offset = (vmf->address - vma->vm_start) >> PAGE_SHIFT;
781
782 if (page_offset >= mdev_state->pagecount)
783 return VM_FAULT_SIGBUS;
784
785 vmf->page = mbochs_get_page(mdev_state, page_offset);
786 if (!vmf->page)
787 return VM_FAULT_SIGBUS;
788
789 return 0;
790}
791
792static const struct vm_operations_struct mbochs_region_vm_ops = {
793 .fault = mbochs_region_vm_fault,
794};
795
681c1615 796static int mbochs_mmap(struct vfio_device *vdev, struct vm_area_struct *vma)
a5e6e650 797{
681c1615
JG
798 struct mdev_state *mdev_state =
799 container_of(vdev, struct mdev_state, vdev);
a5e6e650
GH
800
801 if (vma->vm_pgoff != MBOCHS_MEMORY_BAR_OFFSET >> PAGE_SHIFT)
802 return -EINVAL;
803 if (vma->vm_end < vma->vm_start)
804 return -EINVAL;
805 if (vma->vm_end - vma->vm_start > mdev_state->memsize)
806 return -EINVAL;
807 if ((vma->vm_flags & VM_SHARED) == 0)
808 return -EINVAL;
809
810 vma->vm_ops = &mbochs_region_vm_ops;
811 vma->vm_private_data = mdev_state;
812 return 0;
813}
814
d7ef4899 815static vm_fault_t mbochs_dmabuf_vm_fault(struct vm_fault *vmf)
a5e6e650
GH
816{
817 struct vm_area_struct *vma = vmf->vma;
818 struct mbochs_dmabuf *dmabuf = vma->vm_private_data;
819
820 if (WARN_ON(vmf->pgoff >= dmabuf->pagecount))
821 return VM_FAULT_SIGBUS;
822
823 vmf->page = dmabuf->pages[vmf->pgoff];
824 get_page(vmf->page);
825 return 0;
826}
827
828static const struct vm_operations_struct mbochs_dmabuf_vm_ops = {
829 .fault = mbochs_dmabuf_vm_fault,
830};
831
832static int mbochs_mmap_dmabuf(struct dma_buf *buf, struct vm_area_struct *vma)
833{
834 struct mbochs_dmabuf *dmabuf = buf->priv;
835 struct device *dev = mdev_dev(dmabuf->mdev_state->mdev);
836
837 dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
838
839 if ((vma->vm_flags & VM_SHARED) == 0)
840 return -EINVAL;
841
842 vma->vm_ops = &mbochs_dmabuf_vm_ops;
843 vma->vm_private_data = dmabuf;
844 return 0;
845}
846
847static void mbochs_print_dmabuf(struct mbochs_dmabuf *dmabuf,
848 const char *prefix)
849{
850 struct device *dev = mdev_dev(dmabuf->mdev_state->mdev);
851 u32 fourcc = dmabuf->mode.drm_format;
852
853 dev_dbg(dev, "%s/%d: %c%c%c%c, %dx%d, stride %d, off 0x%llx, size 0x%llx, pages %ld\n",
854 prefix, dmabuf->id,
855 fourcc ? ((fourcc >> 0) & 0xff) : '-',
856 fourcc ? ((fourcc >> 8) & 0xff) : '-',
857 fourcc ? ((fourcc >> 16) & 0xff) : '-',
858 fourcc ? ((fourcc >> 24) & 0xff) : '-',
859 dmabuf->mode.width, dmabuf->mode.height, dmabuf->mode.stride,
860 dmabuf->mode.offset, dmabuf->mode.size, dmabuf->pagecount);
861}
862
863static struct sg_table *mbochs_map_dmabuf(struct dma_buf_attachment *at,
864 enum dma_data_direction direction)
865{
866 struct mbochs_dmabuf *dmabuf = at->dmabuf->priv;
867 struct device *dev = mdev_dev(dmabuf->mdev_state->mdev);
868 struct sg_table *sg;
869
870 dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
871
872 sg = kzalloc(sizeof(*sg), GFP_KERNEL);
873 if (!sg)
874 goto err1;
875 if (sg_alloc_table_from_pages(sg, dmabuf->pages, dmabuf->pagecount,
876 0, dmabuf->mode.size, GFP_KERNEL) < 0)
877 goto err2;
be0704be 878 if (dma_map_sgtable(at->dev, sg, direction, 0))
a5e6e650
GH
879 goto err3;
880
881 return sg;
882
883err3:
884 sg_free_table(sg);
885err2:
886 kfree(sg);
887err1:
888 return ERR_PTR(-ENOMEM);
889}
890
891static void mbochs_unmap_dmabuf(struct dma_buf_attachment *at,
892 struct sg_table *sg,
893 enum dma_data_direction direction)
894{
895 struct mbochs_dmabuf *dmabuf = at->dmabuf->priv;
896 struct device *dev = mdev_dev(dmabuf->mdev_state->mdev);
897
898 dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
899
be0704be 900 dma_unmap_sgtable(at->dev, sg, direction, 0);
a5e6e650
GH
901 sg_free_table(sg);
902 kfree(sg);
903}
904
905static void mbochs_release_dmabuf(struct dma_buf *buf)
906{
907 struct mbochs_dmabuf *dmabuf = buf->priv;
908 struct mdev_state *mdev_state = dmabuf->mdev_state;
909 struct device *dev = mdev_dev(mdev_state->mdev);
910 pgoff_t pg;
911
912 dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
913
914 for (pg = 0; pg < dmabuf->pagecount; pg++)
915 put_page(dmabuf->pages[pg]);
916
917 mutex_lock(&mdev_state->ops_lock);
918 dmabuf->buf = NULL;
919 if (dmabuf->unlinked)
920 kfree(dmabuf);
921 mutex_unlock(&mdev_state->ops_lock);
922}
923
a5e6e650
GH
924static struct dma_buf_ops mbochs_dmabuf_ops = {
925 .map_dma_buf = mbochs_map_dmabuf,
926 .unmap_dma_buf = mbochs_unmap_dmabuf,
927 .release = mbochs_release_dmabuf,
a5e6e650
GH
928 .mmap = mbochs_mmap_dmabuf,
929};
930
931static struct mbochs_dmabuf *mbochs_dmabuf_alloc(struct mdev_state *mdev_state,
932 struct mbochs_mode *mode)
933{
934 struct mbochs_dmabuf *dmabuf;
935 pgoff_t page_offset, pg;
936
937 WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
938
939 dmabuf = kzalloc(sizeof(struct mbochs_dmabuf), GFP_KERNEL);
940 if (!dmabuf)
941 return NULL;
942
943 dmabuf->mode = *mode;
944 dmabuf->id = mdev_state->next_id++;
945 dmabuf->pagecount = DIV_ROUND_UP(mode->size, PAGE_SIZE);
946 dmabuf->pages = kcalloc(dmabuf->pagecount, sizeof(struct page *),
947 GFP_KERNEL);
948 if (!dmabuf->pages)
949 goto err_free_dmabuf;
950
951 page_offset = dmabuf->mode.offset >> PAGE_SHIFT;
952 for (pg = 0; pg < dmabuf->pagecount; pg++) {
953 dmabuf->pages[pg] = __mbochs_get_page(mdev_state,
954 page_offset + pg);
955 if (!dmabuf->pages[pg])
956 goto err_free_pages;
957 }
958
959 dmabuf->mdev_state = mdev_state;
960 list_add(&dmabuf->next, &mdev_state->dmabufs);
961
962 mbochs_print_dmabuf(dmabuf, __func__);
963 return dmabuf;
964
965err_free_pages:
966 while (pg > 0)
967 put_page(dmabuf->pages[--pg]);
968 kfree(dmabuf->pages);
969err_free_dmabuf:
970 kfree(dmabuf);
971 return NULL;
972}
973
974static struct mbochs_dmabuf *
975mbochs_dmabuf_find_by_mode(struct mdev_state *mdev_state,
976 struct mbochs_mode *mode)
977{
978 struct mbochs_dmabuf *dmabuf;
979
980 WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
981
982 list_for_each_entry(dmabuf, &mdev_state->dmabufs, next)
983 if (mbochs_modes_equal(&dmabuf->mode, mode))
984 return dmabuf;
985
986 return NULL;
987}
988
989static struct mbochs_dmabuf *
990mbochs_dmabuf_find_by_id(struct mdev_state *mdev_state, u32 id)
991{
992 struct mbochs_dmabuf *dmabuf;
993
994 WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
995
996 list_for_each_entry(dmabuf, &mdev_state->dmabufs, next)
997 if (dmabuf->id == id)
998 return dmabuf;
999
1000 return NULL;
1001}
1002
1003static int mbochs_dmabuf_export(struct mbochs_dmabuf *dmabuf)
1004{
1005 struct mdev_state *mdev_state = dmabuf->mdev_state;
681c1615 1006 struct device *dev = mdev_state->vdev.dev;
a5e6e650
GH
1007 DEFINE_DMA_BUF_EXPORT_INFO(exp_info);
1008 struct dma_buf *buf;
1009
1010 WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
1011
1012 if (!IS_ALIGNED(dmabuf->mode.offset, PAGE_SIZE)) {
1013 dev_info_ratelimited(dev, "%s: framebuffer not page-aligned\n",
1014 __func__);
1015 return -EINVAL;
1016 }
1017
1018 exp_info.ops = &mbochs_dmabuf_ops;
1019 exp_info.size = dmabuf->mode.size;
1020 exp_info.priv = dmabuf;
1021
1022 buf = dma_buf_export(&exp_info);
1023 if (IS_ERR(buf)) {
1024 dev_info_ratelimited(dev, "%s: dma_buf_export failed: %ld\n",
1025 __func__, PTR_ERR(buf));
1026 return PTR_ERR(buf);
1027 }
1028
1029 dmabuf->buf = buf;
1030 dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
1031 return 0;
1032}
1033
681c1615 1034static int mbochs_get_region_info(struct mdev_state *mdev_state,
104c7405 1035 struct vfio_region_info_ext *ext)
a5e6e650 1036{
104c7405 1037 struct vfio_region_info *region_info = &ext->base;
a5e6e650 1038
104c7405 1039 if (region_info->index >= MBOCHS_NUM_REGIONS)
a5e6e650
GH
1040 return -EINVAL;
1041
1042 switch (region_info->index) {
1043 case VFIO_PCI_CONFIG_REGION_INDEX:
1044 region_info->offset = 0;
1045 region_info->size = MBOCHS_CONFIG_SPACE_SIZE;
1046 region_info->flags = (VFIO_REGION_INFO_FLAG_READ |
1047 VFIO_REGION_INFO_FLAG_WRITE);
1048 break;
1049 case VFIO_PCI_BAR0_REGION_INDEX:
1050 region_info->offset = MBOCHS_MEMORY_BAR_OFFSET;
1051 region_info->size = mdev_state->memsize;
1052 region_info->flags = (VFIO_REGION_INFO_FLAG_READ |
1053 VFIO_REGION_INFO_FLAG_WRITE |
1054 VFIO_REGION_INFO_FLAG_MMAP);
1055 break;
1056 case VFIO_PCI_BAR2_REGION_INDEX:
1057 region_info->offset = MBOCHS_MMIO_BAR_OFFSET;
1058 region_info->size = MBOCHS_MMIO_BAR_SIZE;
1059 region_info->flags = (VFIO_REGION_INFO_FLAG_READ |
1060 VFIO_REGION_INFO_FLAG_WRITE);
1061 break;
104c7405
GH
1062 case MBOCHS_EDID_REGION_INDEX:
1063 ext->base.argsz = sizeof(*ext);
1064 ext->base.offset = MBOCHS_EDID_OFFSET;
1065 ext->base.size = MBOCHS_EDID_SIZE;
1066 ext->base.flags = (VFIO_REGION_INFO_FLAG_READ |
1067 VFIO_REGION_INFO_FLAG_WRITE |
1068 VFIO_REGION_INFO_FLAG_CAPS);
1069 ext->base.cap_offset = offsetof(typeof(*ext), type);
1070 ext->type.header.id = VFIO_REGION_INFO_CAP_TYPE;
1071 ext->type.header.version = 1;
1072 ext->type.header.next = 0;
1073 ext->type.type = VFIO_REGION_TYPE_GFX;
1074 ext->type.subtype = VFIO_REGION_SUBTYPE_GFX_EDID;
1075 break;
a5e6e650
GH
1076 default:
1077 region_info->size = 0;
1078 region_info->offset = 0;
1079 region_info->flags = 0;
1080 }
1081
1082 return 0;
1083}
1084
681c1615 1085static int mbochs_get_irq_info(struct vfio_irq_info *irq_info)
a5e6e650
GH
1086{
1087 irq_info->count = 0;
1088 return 0;
1089}
1090
681c1615 1091static int mbochs_get_device_info(struct vfio_device_info *dev_info)
a5e6e650
GH
1092{
1093 dev_info->flags = VFIO_DEVICE_FLAGS_PCI;
104c7405 1094 dev_info->num_regions = MBOCHS_NUM_REGIONS;
a5e6e650
GH
1095 dev_info->num_irqs = VFIO_PCI_NUM_IRQS;
1096 return 0;
1097}
1098
681c1615 1099static int mbochs_query_gfx_plane(struct mdev_state *mdev_state,
a5e6e650
GH
1100 struct vfio_device_gfx_plane_info *plane)
1101{
a5e6e650
GH
1102 struct mbochs_dmabuf *dmabuf;
1103 struct mbochs_mode mode;
1104 int ret;
1105
1106 if (plane->flags & VFIO_GFX_PLANE_TYPE_PROBE) {
1107 if (plane->flags == (VFIO_GFX_PLANE_TYPE_PROBE |
1108 VFIO_GFX_PLANE_TYPE_DMABUF))
1109 return 0;
1110 return -EINVAL;
1111 }
1112
1113 if (plane->flags != VFIO_GFX_PLANE_TYPE_DMABUF)
1114 return -EINVAL;
1115
1116 plane->drm_format_mod = 0;
1117 plane->x_pos = 0;
1118 plane->y_pos = 0;
1119 plane->x_hot = 0;
1120 plane->y_hot = 0;
1121
1122 mutex_lock(&mdev_state->ops_lock);
1123
1124 ret = -EINVAL;
1125 if (plane->drm_plane_type == DRM_PLANE_TYPE_PRIMARY)
1126 ret = mbochs_check_framebuffer(mdev_state, &mode);
1127 if (ret < 0) {
1128 plane->drm_format = 0;
1129 plane->width = 0;
1130 plane->height = 0;
1131 plane->stride = 0;
1132 plane->size = 0;
1133 plane->dmabuf_id = 0;
1134 goto done;
1135 }
1136
1137 dmabuf = mbochs_dmabuf_find_by_mode(mdev_state, &mode);
1138 if (!dmabuf)
1139 mbochs_dmabuf_alloc(mdev_state, &mode);
1140 if (!dmabuf) {
1141 mutex_unlock(&mdev_state->ops_lock);
1142 return -ENOMEM;
1143 }
1144
1145 plane->drm_format = dmabuf->mode.drm_format;
1146 plane->width = dmabuf->mode.width;
1147 plane->height = dmabuf->mode.height;
1148 plane->stride = dmabuf->mode.stride;
1149 plane->size = dmabuf->mode.size;
1150 plane->dmabuf_id = dmabuf->id;
1151
1152done:
1153 if (plane->drm_plane_type == DRM_PLANE_TYPE_PRIMARY &&
1154 mdev_state->active_id != plane->dmabuf_id) {
681c1615
JG
1155 dev_dbg(mdev_state->vdev.dev, "%s: primary: %d => %d\n",
1156 __func__, mdev_state->active_id, plane->dmabuf_id);
a5e6e650
GH
1157 mdev_state->active_id = plane->dmabuf_id;
1158 }
1159 mutex_unlock(&mdev_state->ops_lock);
1160 return 0;
1161}
1162
681c1615 1163static int mbochs_get_gfx_dmabuf(struct mdev_state *mdev_state, u32 id)
a5e6e650 1164{
a5e6e650
GH
1165 struct mbochs_dmabuf *dmabuf;
1166
1167 mutex_lock(&mdev_state->ops_lock);
1168
1169 dmabuf = mbochs_dmabuf_find_by_id(mdev_state, id);
1170 if (!dmabuf) {
1171 mutex_unlock(&mdev_state->ops_lock);
1172 return -ENOENT;
1173 }
1174
1175 if (!dmabuf->buf)
1176 mbochs_dmabuf_export(dmabuf);
1177
1178 mutex_unlock(&mdev_state->ops_lock);
1179
1180 if (!dmabuf->buf)
1181 return -EINVAL;
1182
1183 return dma_buf_fd(dmabuf->buf, 0);
1184}
1185
681c1615
JG
1186static long mbochs_ioctl(struct vfio_device *vdev, unsigned int cmd,
1187 unsigned long arg)
a5e6e650 1188{
681c1615
JG
1189 struct mdev_state *mdev_state =
1190 container_of(vdev, struct mdev_state, vdev);
a5e6e650 1191 int ret = 0;
104c7405 1192 unsigned long minsz, outsz;
a5e6e650
GH
1193
1194 switch (cmd) {
1195 case VFIO_DEVICE_GET_INFO:
1196 {
1197 struct vfio_device_info info;
1198
1199 minsz = offsetofend(struct vfio_device_info, num_irqs);
1200
1201 if (copy_from_user(&info, (void __user *)arg, minsz))
1202 return -EFAULT;
1203
1204 if (info.argsz < minsz)
1205 return -EINVAL;
1206
681c1615 1207 ret = mbochs_get_device_info(&info);
a5e6e650
GH
1208 if (ret)
1209 return ret;
1210
a5e6e650
GH
1211 if (copy_to_user((void __user *)arg, &info, minsz))
1212 return -EFAULT;
1213
1214 return 0;
1215 }
1216 case VFIO_DEVICE_GET_REGION_INFO:
1217 {
104c7405 1218 struct vfio_region_info_ext info;
a5e6e650 1219
104c7405 1220 minsz = offsetofend(typeof(info), base.offset);
a5e6e650
GH
1221
1222 if (copy_from_user(&info, (void __user *)arg, minsz))
1223 return -EFAULT;
1224
104c7405
GH
1225 outsz = info.base.argsz;
1226 if (outsz < minsz)
1227 return -EINVAL;
1228 if (outsz > sizeof(info))
a5e6e650
GH
1229 return -EINVAL;
1230
681c1615 1231 ret = mbochs_get_region_info(mdev_state, &info);
a5e6e650
GH
1232 if (ret)
1233 return ret;
1234
104c7405 1235 if (copy_to_user((void __user *)arg, &info, outsz))
a5e6e650
GH
1236 return -EFAULT;
1237
1238 return 0;
1239 }
1240
1241 case VFIO_DEVICE_GET_IRQ_INFO:
1242 {
1243 struct vfio_irq_info info;
1244
1245 minsz = offsetofend(struct vfio_irq_info, count);
1246
1247 if (copy_from_user(&info, (void __user *)arg, minsz))
1248 return -EFAULT;
1249
1250 if ((info.argsz < minsz) ||
104c7405 1251 (info.index >= VFIO_PCI_NUM_IRQS))
a5e6e650
GH
1252 return -EINVAL;
1253
681c1615 1254 ret = mbochs_get_irq_info(&info);
a5e6e650
GH
1255 if (ret)
1256 return ret;
1257
1258 if (copy_to_user((void __user *)arg, &info, minsz))
1259 return -EFAULT;
1260
1261 return 0;
1262 }
1263
1264 case VFIO_DEVICE_QUERY_GFX_PLANE:
1265 {
1266 struct vfio_device_gfx_plane_info plane;
1267
1268 minsz = offsetofend(struct vfio_device_gfx_plane_info,
1269 region_index);
1270
1271 if (copy_from_user(&plane, (void __user *)arg, minsz))
1272 return -EFAULT;
1273
1274 if (plane.argsz < minsz)
1275 return -EINVAL;
1276
681c1615 1277 ret = mbochs_query_gfx_plane(mdev_state, &plane);
a5e6e650
GH
1278 if (ret)
1279 return ret;
1280
1281 if (copy_to_user((void __user *)arg, &plane, minsz))
1282 return -EFAULT;
1283
1284 return 0;
1285 }
1286
1287 case VFIO_DEVICE_GET_GFX_DMABUF:
1288 {
1289 u32 dmabuf_id;
1290
1291 if (get_user(dmabuf_id, (__u32 __user *)arg))
1292 return -EFAULT;
1293
681c1615 1294 return mbochs_get_gfx_dmabuf(mdev_state, dmabuf_id);
a5e6e650
GH
1295 }
1296
1297 case VFIO_DEVICE_SET_IRQS:
1298 return -EINVAL;
1299
1300 case VFIO_DEVICE_RESET:
681c1615 1301 return mbochs_reset(mdev_state);
a5e6e650
GH
1302 }
1303 return -ENOTTY;
1304}
1305
3cb24827 1306static void mbochs_close_device(struct vfio_device *vdev)
a5e6e650 1307{
681c1615
JG
1308 struct mdev_state *mdev_state =
1309 container_of(vdev, struct mdev_state, vdev);
a5e6e650
GH
1310 struct mbochs_dmabuf *dmabuf, *tmp;
1311
1312 mutex_lock(&mdev_state->ops_lock);
1313
1314 list_for_each_entry_safe(dmabuf, tmp, &mdev_state->dmabufs, next) {
1315 list_del(&dmabuf->next);
1316 if (dmabuf->buf) {
1317 /* free in mbochs_release_dmabuf() */
1318 dmabuf->unlinked = true;
1319 } else {
1320 kfree(dmabuf);
1321 }
1322 }
1323 mbochs_put_pages(mdev_state);
1324
1325 mutex_unlock(&mdev_state->ops_lock);
a5e6e650
GH
1326}
1327
1328static ssize_t
1329memory_show(struct device *dev, struct device_attribute *attr,
1330 char *buf)
1331{
681c1615 1332 struct mdev_state *mdev_state = dev_get_drvdata(dev);
a5e6e650
GH
1333
1334 return sprintf(buf, "%d MB\n", mdev_state->type->mbytes);
1335}
1336static DEVICE_ATTR_RO(memory);
1337
1338static struct attribute *mdev_dev_attrs[] = {
1339 &dev_attr_memory.attr,
1340 NULL,
1341};
1342
1343static const struct attribute_group mdev_dev_group = {
1344 .name = "vendor",
1345 .attrs = mdev_dev_attrs,
1346};
1347
6cbf507f 1348static const struct attribute_group *mdev_dev_groups[] = {
a5e6e650
GH
1349 &mdev_dev_group,
1350 NULL,
1351};
1352
685a1537 1353static ssize_t mbochs_show_description(struct mdev_type *mtype, char *buf)
a5e6e650 1354{
da44c340
CH
1355 struct mbochs_type *type =
1356 container_of(mtype, struct mbochs_type, type);
a5e6e650
GH
1357
1358 return sprintf(buf, "virtual display, %d MB video memory\n",
1359 type ? type->mbytes : 0);
1360}
a5e6e650 1361
f2fbc72e 1362static unsigned int mbochs_get_available(struct mdev_type *mtype)
a5e6e650 1363{
da44c340
CH
1364 struct mbochs_type *type =
1365 container_of(mtype, struct mbochs_type, type);
a5e6e650 1366
f2fbc72e 1367 return atomic_read(&mbochs_avail_mbytes) / type->mbytes;
a5e6e650 1368}
a5e6e650 1369
681c1615 1370static const struct vfio_device_ops mbochs_dev_ops = {
3cb24827 1371 .close_device = mbochs_close_device,
3d5d18e1
YL
1372 .init = mbochs_init_dev,
1373 .release = mbochs_release_dev,
681c1615
JG
1374 .read = mbochs_read,
1375 .write = mbochs_write,
1376 .ioctl = mbochs_ioctl,
1377 .mmap = mbochs_mmap,
1378};
1379
1380static struct mdev_driver mbochs_driver = {
290aac5d 1381 .device_api = VFIO_DEVICE_API_PCI_STRING,
681c1615
JG
1382 .driver = {
1383 .name = "mbochs",
1384 .owner = THIS_MODULE,
1385 .mod_name = KBUILD_MODNAME,
1386 .dev_groups = mdev_dev_groups,
1387 },
1388 .probe = mbochs_probe,
1389 .remove = mbochs_remove,
f2fbc72e 1390 .get_available = mbochs_get_available,
685a1537 1391 .show_description = mbochs_show_description,
a5e6e650
GH
1392};
1393
1394static const struct file_operations vd_fops = {
1395 .owner = THIS_MODULE,
1396};
1397
1398static void mbochs_device_release(struct device *dev)
1399{
1400 /* nothing */
1401}
1402
1403static int __init mbochs_dev_init(void)
1404{
1405 int ret = 0;
1406
de5494af
JG
1407 atomic_set(&mbochs_avail_mbytes, max_mbytes);
1408
16355214 1409 ret = alloc_chrdev_region(&mbochs_devt, 0, MINORMASK + 1, MBOCHS_NAME);
a5e6e650
GH
1410 if (ret < 0) {
1411 pr_err("Error: failed to register mbochs_dev, err: %d\n", ret);
1412 return ret;
1413 }
1414 cdev_init(&mbochs_cdev, &vd_fops);
16355214 1415 cdev_add(&mbochs_cdev, mbochs_devt, MINORMASK + 1);
a5e6e650
GH
1416 pr_info("%s: major %d\n", __func__, MAJOR(mbochs_devt));
1417
681c1615
JG
1418 ret = mdev_register_driver(&mbochs_driver);
1419 if (ret)
1420 goto err_cdev;
1421
a5e6e650
GH
1422 mbochs_class = class_create(THIS_MODULE, MBOCHS_CLASS_NAME);
1423 if (IS_ERR(mbochs_class)) {
1424 pr_err("Error: failed to register mbochs_dev class\n");
1425 ret = PTR_ERR(mbochs_class);
681c1615 1426 goto err_driver;
a5e6e650
GH
1427 }
1428 mbochs_dev.class = mbochs_class;
1429 mbochs_dev.release = mbochs_device_release;
1430 dev_set_name(&mbochs_dev, "%s", MBOCHS_NAME);
1431
1432 ret = device_register(&mbochs_dev);
1433 if (ret)
681c1615 1434 goto err_class;
a5e6e650 1435
da44c340
CH
1436 ret = mdev_register_parent(&mbochs_parent, &mbochs_dev, &mbochs_driver,
1437 mbochs_mdev_types,
1438 ARRAY_SIZE(mbochs_mdev_types));
a5e6e650 1439 if (ret)
681c1615 1440 goto err_device;
a5e6e650
GH
1441
1442 return 0;
1443
681c1615 1444err_device:
a5e6e650 1445 device_unregister(&mbochs_dev);
681c1615 1446err_class:
a5e6e650 1447 class_destroy(mbochs_class);
681c1615
JG
1448err_driver:
1449 mdev_unregister_driver(&mbochs_driver);
1450err_cdev:
a5e6e650 1451 cdev_del(&mbochs_cdev);
16355214 1452 unregister_chrdev_region(mbochs_devt, MINORMASK + 1);
a5e6e650
GH
1453 return ret;
1454}
1455
1456static void __exit mbochs_dev_exit(void)
1457{
1458 mbochs_dev.bus = NULL;
89345d51 1459 mdev_unregister_parent(&mbochs_parent);
a5e6e650
GH
1460
1461 device_unregister(&mbochs_dev);
681c1615 1462 mdev_unregister_driver(&mbochs_driver);
a5e6e650 1463 cdev_del(&mbochs_cdev);
16355214 1464 unregister_chrdev_region(mbochs_devt, MINORMASK + 1);
a5e6e650
GH
1465 class_destroy(mbochs_class);
1466 mbochs_class = NULL;
1467}
1468
16b0314a 1469MODULE_IMPORT_NS(DMA_BUF);
a5e6e650
GH
1470module_init(mbochs_dev_init)
1471module_exit(mbochs_dev_exit)