projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| d44e1310 MK |
1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | ||
| c7d759eb | 3 | #include <linux/ethtool_netlink.h> |
| f76510b4 | 4 | #include <linux/net_tstamp.h> |
| 5b071c59 | 5 | #include <linux/phy.h> |
| 4895d780 | 6 | #include <linux/rtnetlink.h> |
| c156174a | 7 | #include <linux/ptp_clock_kernel.h> |
| f76510b4 | 8 | |
| d44e1310 MK |
9 | #include "common.h" |
| 10 | ||
| 11 | const char netdev_features_strings[NETDEV_FEATURE_COUNT][ETH_GSTRING_LEN] = { | |
| 12 | [NETIF_F_SG_BIT] = "tx-scatter-gather", | |
| 13 | [NETIF_F_IP_CSUM_BIT] = "tx-checksum-ipv4", | |
| 14 | [NETIF_F_HW_CSUM_BIT] = "tx-checksum-ip-generic", | |
| 15 | [NETIF_F_IPV6_CSUM_BIT] = "tx-checksum-ipv6", | |
| 16 | [NETIF_F_HIGHDMA_BIT] = "highdma", | |
| 17 | [NETIF_F_FRAGLIST_BIT] = "tx-scatter-gather-fraglist", | |
| 18 | [NETIF_F_HW_VLAN_CTAG_TX_BIT] = "tx-vlan-hw-insert", | |
| 19 | ||
| 20 | [NETIF_F_HW_VLAN_CTAG_RX_BIT] = "rx-vlan-hw-parse", | |
| 21 | [NETIF_F_HW_VLAN_CTAG_FILTER_BIT] = "rx-vlan-filter", | |
| 22 | [NETIF_F_HW_VLAN_STAG_TX_BIT] = "tx-vlan-stag-hw-insert", | |
| 23 | [NETIF_F_HW_VLAN_STAG_RX_BIT] = "rx-vlan-stag-hw-parse", | |
| 24 | [NETIF_F_HW_VLAN_STAG_FILTER_BIT] = "rx-vlan-stag-filter", | |
| 25 | [NETIF_F_VLAN_CHALLENGED_BIT] = "vlan-challenged", | |
| 26 | [NETIF_F_GSO_BIT] = "tx-generic-segmentation", | |
| 27 | [NETIF_F_LLTX_BIT] = "tx-lockless", | |
| 28 | [NETIF_F_NETNS_LOCAL_BIT] = "netns-local", | |
| 29 | [NETIF_F_GRO_BIT] = "rx-gro", | |
| 30 | [NETIF_F_GRO_HW_BIT] = "rx-gro-hw", | |
| 31 | [NETIF_F_LRO_BIT] = "rx-lro", | |
| 32 | ||
| 33 | [NETIF_F_TSO_BIT] = "tx-tcp-segmentation", | |
| 34 | [NETIF_F_GSO_ROBUST_BIT] = "tx-gso-robust", | |
| 35 | [NETIF_F_TSO_ECN_BIT] = "tx-tcp-ecn-segmentation", | |
| 36 | [NETIF_F_TSO_MANGLEID_BIT] = "tx-tcp-mangleid-segmentation", | |
| 37 | [NETIF_F_TSO6_BIT] = "tx-tcp6-segmentation", | |
| 38 | [NETIF_F_FSO_BIT] = "tx-fcoe-segmentation", | |
| 39 | [NETIF_F_GSO_GRE_BIT] = "tx-gre-segmentation", | |
| 40 | [NETIF_F_GSO_GRE_CSUM_BIT] = "tx-gre-csum-segmentation", | |
| 41 | [NETIF_F_GSO_IPXIP4_BIT] = "tx-ipxip4-segmentation", | |
| 42 | [NETIF_F_GSO_IPXIP6_BIT] = "tx-ipxip6-segmentation", | |
| 43 | [NETIF_F_GSO_UDP_TUNNEL_BIT] = "tx-udp_tnl-segmentation", | |
| 44 | [NETIF_F_GSO_UDP_TUNNEL_CSUM_BIT] = "tx-udp_tnl-csum-segmentation", | |
| 45 | [NETIF_F_GSO_PARTIAL_BIT] = "tx-gso-partial", | |
| b4730ae6 | 46 | [NETIF_F_GSO_TUNNEL_REMCSUM_BIT] = "tx-tunnel-remcsum-segmentation", |
| d44e1310 MK |
47 | [NETIF_F_GSO_SCTP_BIT] = "tx-sctp-segmentation", |
| 48 | [NETIF_F_GSO_ESP_BIT] = "tx-esp-segmentation", | |
| 49 | [NETIF_F_GSO_UDP_L4_BIT] = "tx-udp-segmentation", | |
| eddbf5d0 | 50 | [NETIF_F_GSO_FRAGLIST_BIT] = "tx-gso-list", |
| d44e1310 MK |
51 | |
| 52 | [NETIF_F_FCOE_CRC_BIT] = "tx-checksum-fcoe-crc", | |
| 53 | [NETIF_F_SCTP_CRC_BIT] = "tx-checksum-sctp", | |
| 54 | [NETIF_F_FCOE_MTU_BIT] = "fcoe-mtu", | |
| 55 | [NETIF_F_NTUPLE_BIT] = "rx-ntuple-filter", | |
| 56 | [NETIF_F_RXHASH_BIT] = "rx-hashing", | |
| 57 | [NETIF_F_RXCSUM_BIT] = "rx-checksum", | |
| 58 | [NETIF_F_NOCACHE_COPY_BIT] = "tx-nocache-copy", | |
| 59 | [NETIF_F_LOOPBACK_BIT] = "loopback", | |
| 60 | [NETIF_F_RXFCS_BIT] = "rx-fcs", | |
| 61 | [NETIF_F_RXALL_BIT] = "rx-all", | |
| 62 | [NETIF_F_HW_L2FW_DOFFLOAD_BIT] = "l2-fwd-offload", | |
| 63 | [NETIF_F_HW_TC_BIT] = "hw-tc-offload", | |
| 64 | [NETIF_F_HW_ESP_BIT] = "esp-hw-offload", | |
| 65 | [NETIF_F_HW_ESP_TX_CSUM_BIT] = "esp-tx-csum-hw-offload", | |
| 66 | [NETIF_F_RX_UDP_TUNNEL_PORT_BIT] = "rx-udp_tunnel-port-offload", | |
| 67 | [NETIF_F_HW_TLS_RECORD_BIT] = "tls-hw-record", | |
| 68 | [NETIF_F_HW_TLS_TX_BIT] = "tls-hw-tx-offload", | |
| 69 | [NETIF_F_HW_TLS_RX_BIT] = "tls-hw-rx-offload", | |
| 3b335832 | 70 | [NETIF_F_GRO_FRAGLIST_BIT] = "rx-gro-list", |
| 5908220b | 71 | [NETIF_F_HW_MACSEC_BIT] = "macsec-hw-offload", |
| 6f1c0ea1 | 72 | [NETIF_F_GRO_UDP_FWD_BIT] = "rx-udp-gro-forwarding", |
| dcf0cd1c GM |
73 | [NETIF_F_HW_HSR_TAG_INS_BIT] = "hsr-tag-ins-offload", |
| 74 | [NETIF_F_HW_HSR_TAG_RM_BIT] = "hsr-tag-rm-offload", | |
| 75 | [NETIF_F_HW_HSR_FWD_BIT] = "hsr-fwd-offload", | |
| 76 | [NETIF_F_HW_HSR_DUP_BIT] = "hsr-dup-offload", | |
| d44e1310 MK |
77 | }; |
| 78 | ||
| 79 | const char | |
| 80 | rss_hash_func_strings[ETH_RSS_HASH_FUNCS_COUNT][ETH_GSTRING_LEN] = { | |
| 81 | [ETH_RSS_HASH_TOP_BIT] = "toeplitz", | |
| 82 | [ETH_RSS_HASH_XOR_BIT] = "xor", | |
| 83 | [ETH_RSS_HASH_CRC32_BIT] = "crc32", | |
| 84 | }; | |
| 85 | ||
| 86 | const char | |
| 87 | tunable_strings[__ETHTOOL_TUNABLE_COUNT][ETH_GSTRING_LEN] = { | |
| 88 | [ETHTOOL_ID_UNSPEC] = "Unspec", | |
| 89 | [ETHTOOL_RX_COPYBREAK] = "rx-copybreak", | |
| 90 | [ETHTOOL_TX_COPYBREAK] = "tx-copybreak", | |
| 91 | [ETHTOOL_PFC_PREVENTION_TOUT] = "pfc-prevention-tout", | |
| 448f413a | 92 | [ETHTOOL_TX_COPYBREAK_BUF_SIZE] = "tx-copybreak-buf-size", |
| d44e1310 MK |
93 | }; |
| 94 | ||
| 95 | const char | |
| 96 | phy_tunable_strings[__ETHTOOL_PHY_TUNABLE_COUNT][ETH_GSTRING_LEN] = { | |
| 97 | [ETHTOOL_ID_UNSPEC] = "Unspec", | |
| 98 | [ETHTOOL_PHY_DOWNSHIFT] = "phy-downshift", | |
| 99 | [ETHTOOL_PHY_FAST_LINK_DOWN] = "phy-fast-link-down", | |
| 100 | [ETHTOOL_PHY_EDPD] = "phy-energy-detect-power-down", | |
| 101 | }; | |
| 428c122f MK |
102 | |
| 103 | #define __LINK_MODE_NAME(speed, type, duplex) \ | |
| 104 | #speed "base" #type "/" #duplex | |
| 105 | #define __DEFINE_LINK_MODE_NAME(speed, type, duplex) \ | |
| 106 | [ETHTOOL_LINK_MODE(speed, type, duplex)] = \ | |
| 107 | __LINK_MODE_NAME(speed, type, duplex) | |
| 108 | #define __DEFINE_SPECIAL_MODE_NAME(_mode, _name) \ | |
| 109 | [ETHTOOL_LINK_MODE_ ## _mode ## _BIT] = _name | |
| 110 | ||
| 111 | const char link_mode_names[][ETH_GSTRING_LEN] = { | |
| 112 | __DEFINE_LINK_MODE_NAME(10, T, Half), | |
| 113 | __DEFINE_LINK_MODE_NAME(10, T, Full), | |
| 114 | __DEFINE_LINK_MODE_NAME(100, T, Half), | |
| 115 | __DEFINE_LINK_MODE_NAME(100, T, Full), | |
| 116 | __DEFINE_LINK_MODE_NAME(1000, T, Half), | |
| 117 | __DEFINE_LINK_MODE_NAME(1000, T, Full), | |
| 118 | __DEFINE_SPECIAL_MODE_NAME(Autoneg, "Autoneg"), | |
| 119 | __DEFINE_SPECIAL_MODE_NAME(TP, "TP"), | |
| 120 | __DEFINE_SPECIAL_MODE_NAME(AUI, "AUI"), | |
| 121 | __DEFINE_SPECIAL_MODE_NAME(MII, "MII"), | |
| 122 | __DEFINE_SPECIAL_MODE_NAME(FIBRE, "FIBRE"), | |
| 123 | __DEFINE_SPECIAL_MODE_NAME(BNC, "BNC"), | |
| 124 | __DEFINE_LINK_MODE_NAME(10000, T, Full), | |
| 125 | __DEFINE_SPECIAL_MODE_NAME(Pause, "Pause"), | |
| 126 | __DEFINE_SPECIAL_MODE_NAME(Asym_Pause, "Asym_Pause"), | |
| 127 | __DEFINE_LINK_MODE_NAME(2500, X, Full), | |
| 128 | __DEFINE_SPECIAL_MODE_NAME(Backplane, "Backplane"), | |
| 129 | __DEFINE_LINK_MODE_NAME(1000, KX, Full), | |
| 130 | __DEFINE_LINK_MODE_NAME(10000, KX4, Full), | |
| 131 | __DEFINE_LINK_MODE_NAME(10000, KR, Full), | |
| 132 | __DEFINE_SPECIAL_MODE_NAME(10000baseR_FEC, "10000baseR_FEC"), | |
| 133 | __DEFINE_LINK_MODE_NAME(20000, MLD2, Full), | |
| 134 | __DEFINE_LINK_MODE_NAME(20000, KR2, Full), | |
| 135 | __DEFINE_LINK_MODE_NAME(40000, KR4, Full), | |
| 136 | __DEFINE_LINK_MODE_NAME(40000, CR4, Full), | |
| 137 | __DEFINE_LINK_MODE_NAME(40000, SR4, Full), | |
| 138 | __DEFINE_LINK_MODE_NAME(40000, LR4, Full), | |
| 139 | __DEFINE_LINK_MODE_NAME(56000, KR4, Full), | |
| 140 | __DEFINE_LINK_MODE_NAME(56000, CR4, Full), | |
| 141 | __DEFINE_LINK_MODE_NAME(56000, SR4, Full), | |
| 142 | __DEFINE_LINK_MODE_NAME(56000, LR4, Full), | |
| 143 | __DEFINE_LINK_MODE_NAME(25000, CR, Full), | |
| 144 | __DEFINE_LINK_MODE_NAME(25000, KR, Full), | |
| 145 | __DEFINE_LINK_MODE_NAME(25000, SR, Full), | |
| 146 | __DEFINE_LINK_MODE_NAME(50000, CR2, Full), | |
| 147 | __DEFINE_LINK_MODE_NAME(50000, KR2, Full), | |
| 148 | __DEFINE_LINK_MODE_NAME(100000, KR4, Full), | |
| 149 | __DEFINE_LINK_MODE_NAME(100000, SR4, Full), | |
| 150 | __DEFINE_LINK_MODE_NAME(100000, CR4, Full), | |
| 151 | __DEFINE_LINK_MODE_NAME(100000, LR4_ER4, Full), | |
| 152 | __DEFINE_LINK_MODE_NAME(50000, SR2, Full), | |
| 153 | __DEFINE_LINK_MODE_NAME(1000, X, Full), | |
| 154 | __DEFINE_LINK_MODE_NAME(10000, CR, Full), | |
| 155 | __DEFINE_LINK_MODE_NAME(10000, SR, Full), | |
| 156 | __DEFINE_LINK_MODE_NAME(10000, LR, Full), | |
| 157 | __DEFINE_LINK_MODE_NAME(10000, LRM, Full), | |
| 158 | __DEFINE_LINK_MODE_NAME(10000, ER, Full), | |
| 159 | __DEFINE_LINK_MODE_NAME(2500, T, Full), | |
| 160 | __DEFINE_LINK_MODE_NAME(5000, T, Full), | |
| 161 | __DEFINE_SPECIAL_MODE_NAME(FEC_NONE, "None"), | |
| 162 | __DEFINE_SPECIAL_MODE_NAME(FEC_RS, "RS"), | |
| 163 | __DEFINE_SPECIAL_MODE_NAME(FEC_BASER, "BASER"), | |
| 164 | __DEFINE_LINK_MODE_NAME(50000, KR, Full), | |
| 165 | __DEFINE_LINK_MODE_NAME(50000, SR, Full), | |
| 166 | __DEFINE_LINK_MODE_NAME(50000, CR, Full), | |
| 167 | __DEFINE_LINK_MODE_NAME(50000, LR_ER_FR, Full), | |
| 168 | __DEFINE_LINK_MODE_NAME(50000, DR, Full), | |
| 169 | __DEFINE_LINK_MODE_NAME(100000, KR2, Full), | |
| 170 | __DEFINE_LINK_MODE_NAME(100000, SR2, Full), | |
| 171 | __DEFINE_LINK_MODE_NAME(100000, CR2, Full), | |
| 172 | __DEFINE_LINK_MODE_NAME(100000, LR2_ER2_FR2, Full), | |
| 173 | __DEFINE_LINK_MODE_NAME(100000, DR2, Full), | |
| 174 | __DEFINE_LINK_MODE_NAME(200000, KR4, Full), | |
| 175 | __DEFINE_LINK_MODE_NAME(200000, SR4, Full), | |
| 176 | __DEFINE_LINK_MODE_NAME(200000, LR4_ER4_FR4, Full), | |
| 177 | __DEFINE_LINK_MODE_NAME(200000, DR4, Full), | |
| 178 | __DEFINE_LINK_MODE_NAME(200000, CR4, Full), | |
| 179 | __DEFINE_LINK_MODE_NAME(100, T1, Full), | |
| 180 | __DEFINE_LINK_MODE_NAME(1000, T1, Full), | |
| 181 | __DEFINE_LINK_MODE_NAME(400000, KR8, Full), | |
| 182 | __DEFINE_LINK_MODE_NAME(400000, SR8, Full), | |
| 183 | __DEFINE_LINK_MODE_NAME(400000, LR8_ER8_FR8, Full), | |
| 184 | __DEFINE_LINK_MODE_NAME(400000, DR8, Full), | |
| 185 | __DEFINE_LINK_MODE_NAME(400000, CR8, Full), | |
| f623e597 | 186 | __DEFINE_SPECIAL_MODE_NAME(FEC_LLRS, "LLRS"), |
| 065e0d42 ML |
187 | __DEFINE_LINK_MODE_NAME(100000, KR, Full), |
| 188 | __DEFINE_LINK_MODE_NAME(100000, SR, Full), | |
| 189 | __DEFINE_LINK_MODE_NAME(100000, LR_ER_FR, Full), | |
| 190 | __DEFINE_LINK_MODE_NAME(100000, DR, Full), | |
| 191 | __DEFINE_LINK_MODE_NAME(100000, CR, Full), | |
| 192 | __DEFINE_LINK_MODE_NAME(200000, KR2, Full), | |
| 193 | __DEFINE_LINK_MODE_NAME(200000, SR2, Full), | |
| 194 | __DEFINE_LINK_MODE_NAME(200000, LR2_ER2_FR2, Full), | |
| 195 | __DEFINE_LINK_MODE_NAME(200000, DR2, Full), | |
| 196 | __DEFINE_LINK_MODE_NAME(200000, CR2, Full), | |
| 197 | __DEFINE_LINK_MODE_NAME(400000, KR4, Full), | |
| 198 | __DEFINE_LINK_MODE_NAME(400000, SR4, Full), | |
| 199 | __DEFINE_LINK_MODE_NAME(400000, LR4_ER4_FR4, Full), | |
| 200 | __DEFINE_LINK_MODE_NAME(400000, DR4, Full), | |
| 201 | __DEFINE_LINK_MODE_NAME(400000, CR4, Full), | |
| 55f13311 DM |
202 | __DEFINE_LINK_MODE_NAME(100, FX, Half), |
| 203 | __DEFINE_LINK_MODE_NAME(100, FX, Full), | |
| 428c122f MK |
204 | }; |
| 205 | static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS); | |
| 459e0b81 | 206 | |
| c8907043 DR |
207 | #define __LINK_MODE_LANES_CR 1 |
| 208 | #define __LINK_MODE_LANES_CR2 2 | |
| 209 | #define __LINK_MODE_LANES_CR4 4 | |
| 210 | #define __LINK_MODE_LANES_CR8 8 | |
| 211 | #define __LINK_MODE_LANES_DR 1 | |
| 212 | #define __LINK_MODE_LANES_DR2 2 | |
| 213 | #define __LINK_MODE_LANES_DR4 4 | |
| 214 | #define __LINK_MODE_LANES_DR8 8 | |
| 215 | #define __LINK_MODE_LANES_KR 1 | |
| 216 | #define __LINK_MODE_LANES_KR2 2 | |
| 217 | #define __LINK_MODE_LANES_KR4 4 | |
| 218 | #define __LINK_MODE_LANES_KR8 8 | |
| 219 | #define __LINK_MODE_LANES_SR 1 | |
| 220 | #define __LINK_MODE_LANES_SR2 2 | |
| 221 | #define __LINK_MODE_LANES_SR4 4 | |
| 222 | #define __LINK_MODE_LANES_SR8 8 | |
| 223 | #define __LINK_MODE_LANES_ER 1 | |
| 224 | #define __LINK_MODE_LANES_KX 1 | |
| 225 | #define __LINK_MODE_LANES_KX4 4 | |
| 226 | #define __LINK_MODE_LANES_LR 1 | |
| 227 | #define __LINK_MODE_LANES_LR4 4 | |
| 228 | #define __LINK_MODE_LANES_LR4_ER4 4 | |
| 229 | #define __LINK_MODE_LANES_LR_ER_FR 1 | |
| 230 | #define __LINK_MODE_LANES_LR2_ER2_FR2 2 | |
| 231 | #define __LINK_MODE_LANES_LR4_ER4_FR4 4 | |
| 232 | #define __LINK_MODE_LANES_LR8_ER8_FR8 8 | |
| 233 | #define __LINK_MODE_LANES_LRM 1 | |
| 234 | #define __LINK_MODE_LANES_MLD2 2 | |
| 235 | #define __LINK_MODE_LANES_T 1 | |
| 236 | #define __LINK_MODE_LANES_T1 1 | |
| 237 | #define __LINK_MODE_LANES_X 1 | |
| 238 | #define __LINK_MODE_LANES_FX 1 | |
| 239 | ||
| 240 | #define __DEFINE_LINK_MODE_PARAMS(_speed, _type, _duplex) \ | |
| 241 | [ETHTOOL_LINK_MODE(_speed, _type, _duplex)] = { \ | |
| 242 | .speed = SPEED_ ## _speed, \ | |
| 243 | .lanes = __LINK_MODE_LANES_ ## _type, \ | |
| 244 | .duplex = __DUPLEX_ ## _duplex \ | |
| 245 | } | |
| 246 | #define __DUPLEX_Half DUPLEX_HALF | |
| 247 | #define __DUPLEX_Full DUPLEX_FULL | |
| 248 | #define __DEFINE_SPECIAL_MODE_PARAMS(_mode) \ | |
| 249 | [ETHTOOL_LINK_MODE_ ## _mode ## _BIT] = { \ | |
| 250 | .speed = SPEED_UNKNOWN, \ | |
| 251 | .lanes = 0, \ | |
| 252 | .duplex = DUPLEX_UNKNOWN, \ | |
| 253 | } | |
| 254 | ||
| 255 | const struct link_mode_info link_mode_params[] = { | |
| 256 | __DEFINE_LINK_MODE_PARAMS(10, T, Half), | |
| 257 | __DEFINE_LINK_MODE_PARAMS(10, T, Full), | |
| 258 | __DEFINE_LINK_MODE_PARAMS(100, T, Half), | |
| 259 | __DEFINE_LINK_MODE_PARAMS(100, T, Full), | |
| 260 | __DEFINE_LINK_MODE_PARAMS(1000, T, Half), | |
| 261 | __DEFINE_LINK_MODE_PARAMS(1000, T, Full), | |
| 262 | __DEFINE_SPECIAL_MODE_PARAMS(Autoneg), | |
| 263 | __DEFINE_SPECIAL_MODE_PARAMS(TP), | |
| 264 | __DEFINE_SPECIAL_MODE_PARAMS(AUI), | |
| 265 | __DEFINE_SPECIAL_MODE_PARAMS(MII), | |
| 266 | __DEFINE_SPECIAL_MODE_PARAMS(FIBRE), | |
| 267 | __DEFINE_SPECIAL_MODE_PARAMS(BNC), | |
| 268 | __DEFINE_LINK_MODE_PARAMS(10000, T, Full), | |
| 269 | __DEFINE_SPECIAL_MODE_PARAMS(Pause), | |
| 270 | __DEFINE_SPECIAL_MODE_PARAMS(Asym_Pause), | |
| 271 | __DEFINE_LINK_MODE_PARAMS(2500, X, Full), | |
| 272 | __DEFINE_SPECIAL_MODE_PARAMS(Backplane), | |
| 273 | __DEFINE_LINK_MODE_PARAMS(1000, KX, Full), | |
| 274 | __DEFINE_LINK_MODE_PARAMS(10000, KX4, Full), | |
| 275 | __DEFINE_LINK_MODE_PARAMS(10000, KR, Full), | |
| 276 | [ETHTOOL_LINK_MODE_10000baseR_FEC_BIT] = { | |
| 277 | .speed = SPEED_10000, | |
| fde32dbe | 278 | .lanes = 1, |
| c8907043 DR |
279 | .duplex = DUPLEX_FULL, |
| 280 | }, | |
| 281 | __DEFINE_LINK_MODE_PARAMS(20000, MLD2, Full), | |
| 282 | __DEFINE_LINK_MODE_PARAMS(20000, KR2, Full), | |
| 283 | __DEFINE_LINK_MODE_PARAMS(40000, KR4, Full), | |
| 284 | __DEFINE_LINK_MODE_PARAMS(40000, CR4, Full), | |
| 285 | __DEFINE_LINK_MODE_PARAMS(40000, SR4, Full), | |
| 286 | __DEFINE_LINK_MODE_PARAMS(40000, LR4, Full), | |
| 287 | __DEFINE_LINK_MODE_PARAMS(56000, KR4, Full), | |
| 288 | __DEFINE_LINK_MODE_PARAMS(56000, CR4, Full), | |
| 289 | __DEFINE_LINK_MODE_PARAMS(56000, SR4, Full), | |
| 290 | __DEFINE_LINK_MODE_PARAMS(56000, LR4, Full), | |
| 291 | __DEFINE_LINK_MODE_PARAMS(25000, CR, Full), | |
| 292 | __DEFINE_LINK_MODE_PARAMS(25000, KR, Full), | |
| 293 | __DEFINE_LINK_MODE_PARAMS(25000, SR, Full), | |
| 294 | __DEFINE_LINK_MODE_PARAMS(50000, CR2, Full), | |
| 295 | __DEFINE_LINK_MODE_PARAMS(50000, KR2, Full), | |
| 296 | __DEFINE_LINK_MODE_PARAMS(100000, KR4, Full), | |
| 297 | __DEFINE_LINK_MODE_PARAMS(100000, SR4, Full), | |
| 298 | __DEFINE_LINK_MODE_PARAMS(100000, CR4, Full), | |
| 299 | __DEFINE_LINK_MODE_PARAMS(100000, LR4_ER4, Full), | |
| 300 | __DEFINE_LINK_MODE_PARAMS(50000, SR2, Full), | |
| 301 | __DEFINE_LINK_MODE_PARAMS(1000, X, Full), | |
| 302 | __DEFINE_LINK_MODE_PARAMS(10000, CR, Full), | |
| 303 | __DEFINE_LINK_MODE_PARAMS(10000, SR, Full), | |
| 304 | __DEFINE_LINK_MODE_PARAMS(10000, LR, Full), | |
| 305 | __DEFINE_LINK_MODE_PARAMS(10000, LRM, Full), | |
| 306 | __DEFINE_LINK_MODE_PARAMS(10000, ER, Full), | |
| 307 | __DEFINE_LINK_MODE_PARAMS(2500, T, Full), | |
| 308 | __DEFINE_LINK_MODE_PARAMS(5000, T, Full), | |
| 309 | __DEFINE_SPECIAL_MODE_PARAMS(FEC_NONE), | |
| 310 | __DEFINE_SPECIAL_MODE_PARAMS(FEC_RS), | |
| 311 | __DEFINE_SPECIAL_MODE_PARAMS(FEC_BASER), | |
| 312 | __DEFINE_LINK_MODE_PARAMS(50000, KR, Full), | |
| 313 | __DEFINE_LINK_MODE_PARAMS(50000, SR, Full), | |
| 314 | __DEFINE_LINK_MODE_PARAMS(50000, CR, Full), | |
| 315 | __DEFINE_LINK_MODE_PARAMS(50000, LR_ER_FR, Full), | |
| 316 | __DEFINE_LINK_MODE_PARAMS(50000, DR, Full), | |
| 317 | __DEFINE_LINK_MODE_PARAMS(100000, KR2, Full), | |
| 318 | __DEFINE_LINK_MODE_PARAMS(100000, SR2, Full), | |
| 319 | __DEFINE_LINK_MODE_PARAMS(100000, CR2, Full), | |
| 320 | __DEFINE_LINK_MODE_PARAMS(100000, LR2_ER2_FR2, Full), | |
| 321 | __DEFINE_LINK_MODE_PARAMS(100000, DR2, Full), | |
| 322 | __DEFINE_LINK_MODE_PARAMS(200000, KR4, Full), | |
| 323 | __DEFINE_LINK_MODE_PARAMS(200000, SR4, Full), | |
| 324 | __DEFINE_LINK_MODE_PARAMS(200000, LR4_ER4_FR4, Full), | |
| 325 | __DEFINE_LINK_MODE_PARAMS(200000, DR4, Full), | |
| 326 | __DEFINE_LINK_MODE_PARAMS(200000, CR4, Full), | |
| 327 | __DEFINE_LINK_MODE_PARAMS(100, T1, Full), | |
| 328 | __DEFINE_LINK_MODE_PARAMS(1000, T1, Full), | |
| 329 | __DEFINE_LINK_MODE_PARAMS(400000, KR8, Full), | |
| 330 | __DEFINE_LINK_MODE_PARAMS(400000, SR8, Full), | |
| 331 | __DEFINE_LINK_MODE_PARAMS(400000, LR8_ER8_FR8, Full), | |
| 332 | __DEFINE_LINK_MODE_PARAMS(400000, DR8, Full), | |
| 333 | __DEFINE_LINK_MODE_PARAMS(400000, CR8, Full), | |
| 334 | __DEFINE_SPECIAL_MODE_PARAMS(FEC_LLRS), | |
| 335 | __DEFINE_LINK_MODE_PARAMS(100000, KR, Full), | |
| 336 | __DEFINE_LINK_MODE_PARAMS(100000, SR, Full), | |
| 337 | __DEFINE_LINK_MODE_PARAMS(100000, LR_ER_FR, Full), | |
| 338 | __DEFINE_LINK_MODE_PARAMS(100000, DR, Full), | |
| 339 | __DEFINE_LINK_MODE_PARAMS(100000, CR, Full), | |
| 340 | __DEFINE_LINK_MODE_PARAMS(200000, KR2, Full), | |
| 341 | __DEFINE_LINK_MODE_PARAMS(200000, SR2, Full), | |
| 342 | __DEFINE_LINK_MODE_PARAMS(200000, LR2_ER2_FR2, Full), | |
| 343 | __DEFINE_LINK_MODE_PARAMS(200000, DR2, Full), | |
| 344 | __DEFINE_LINK_MODE_PARAMS(200000, CR2, Full), | |
| 345 | __DEFINE_LINK_MODE_PARAMS(400000, KR4, Full), | |
| 346 | __DEFINE_LINK_MODE_PARAMS(400000, SR4, Full), | |
| 347 | __DEFINE_LINK_MODE_PARAMS(400000, LR4_ER4_FR4, Full), | |
| 348 | __DEFINE_LINK_MODE_PARAMS(400000, DR4, Full), | |
| 349 | __DEFINE_LINK_MODE_PARAMS(400000, CR4, Full), | |
| 350 | __DEFINE_LINK_MODE_PARAMS(100, FX, Half), | |
| 351 | __DEFINE_LINK_MODE_PARAMS(100, FX, Full), | |
| 352 | }; | |
| 353 | static_assert(ARRAY_SIZE(link_mode_params) == __ETHTOOL_LINK_MODE_MASK_NBITS); | |
| 354 | ||
| 6a94b8cc MK |
355 | const char netif_msg_class_names[][ETH_GSTRING_LEN] = { |
| 356 | [NETIF_MSG_DRV_BIT] = "drv", | |
| 357 | [NETIF_MSG_PROBE_BIT] = "probe", | |
| 358 | [NETIF_MSG_LINK_BIT] = "link", | |
| 359 | [NETIF_MSG_TIMER_BIT] = "timer", | |
| 360 | [NETIF_MSG_IFDOWN_BIT] = "ifdown", | |
| 361 | [NETIF_MSG_IFUP_BIT] = "ifup", | |
| 362 | [NETIF_MSG_RX_ERR_BIT] = "rx_err", | |
| 363 | [NETIF_MSG_TX_ERR_BIT] = "tx_err", | |
| 364 | [NETIF_MSG_TX_QUEUED_BIT] = "tx_queued", | |
| 365 | [NETIF_MSG_INTR_BIT] = "intr", | |
| 366 | [NETIF_MSG_TX_DONE_BIT] = "tx_done", | |
| 367 | [NETIF_MSG_RX_STATUS_BIT] = "rx_status", | |
| 368 | [NETIF_MSG_PKTDATA_BIT] = "pktdata", | |
| 369 | [NETIF_MSG_HW_BIT] = "hw", | |
| 370 | [NETIF_MSG_WOL_BIT] = "wol", | |
| 371 | }; | |
| 372 | static_assert(ARRAY_SIZE(netif_msg_class_names) == NETIF_MSG_CLASS_COUNT); | |
| 373 | ||
| 51ea22b0 MK |
374 | const char wol_mode_names[][ETH_GSTRING_LEN] = { |
| 375 | [const_ilog2(WAKE_PHY)] = "phy", | |
| 376 | [const_ilog2(WAKE_UCAST)] = "ucast", | |
| 377 | [const_ilog2(WAKE_MCAST)] = "mcast", | |
| 378 | [const_ilog2(WAKE_BCAST)] = "bcast", | |
| 379 | [const_ilog2(WAKE_ARP)] = "arp", | |
| 380 | [const_ilog2(WAKE_MAGIC)] = "magic", | |
| 381 | [const_ilog2(WAKE_MAGICSECURE)] = "magicsecure", | |
| 382 | [const_ilog2(WAKE_FILTER)] = "filter", | |
| 383 | }; | |
| 384 | static_assert(ARRAY_SIZE(wol_mode_names) == WOL_MODE_COUNT); | |
| 385 | ||
| f76510b4 MK |
386 | const char sof_timestamping_names[][ETH_GSTRING_LEN] = { |
| 387 | [const_ilog2(SOF_TIMESTAMPING_TX_HARDWARE)] = "hardware-transmit", | |
| 388 | [const_ilog2(SOF_TIMESTAMPING_TX_SOFTWARE)] = "software-transmit", | |
| 389 | [const_ilog2(SOF_TIMESTAMPING_RX_HARDWARE)] = "hardware-receive", | |
| 390 | [const_ilog2(SOF_TIMESTAMPING_RX_SOFTWARE)] = "software-receive", | |
| 391 | [const_ilog2(SOF_TIMESTAMPING_SOFTWARE)] = "software-system-clock", | |
| 392 | [const_ilog2(SOF_TIMESTAMPING_SYS_HARDWARE)] = "hardware-legacy-clock", | |
| 393 | [const_ilog2(SOF_TIMESTAMPING_RAW_HARDWARE)] = "hardware-raw-clock", | |
| 394 | [const_ilog2(SOF_TIMESTAMPING_OPT_ID)] = "option-id", | |
| 395 | [const_ilog2(SOF_TIMESTAMPING_TX_SCHED)] = "sched-transmit", | |
| 396 | [const_ilog2(SOF_TIMESTAMPING_TX_ACK)] = "ack-transmit", | |
| 397 | [const_ilog2(SOF_TIMESTAMPING_OPT_CMSG)] = "option-cmsg", | |
| 398 | [const_ilog2(SOF_TIMESTAMPING_OPT_TSONLY)] = "option-tsonly", | |
| 399 | [const_ilog2(SOF_TIMESTAMPING_OPT_STATS)] = "option-stats", | |
| 400 | [const_ilog2(SOF_TIMESTAMPING_OPT_PKTINFO)] = "option-pktinfo", | |
| 401 | [const_ilog2(SOF_TIMESTAMPING_OPT_TX_SWHW)] = "option-tx-swhw", | |
| d463126e | 402 | [const_ilog2(SOF_TIMESTAMPING_BIND_PHC)] = "bind-phc", |
| f76510b4 MK |
403 | }; |
| 404 | static_assert(ARRAY_SIZE(sof_timestamping_names) == __SOF_TIMESTAMPING_CNT); | |
| 405 | ||
| 406 | const char ts_tx_type_names[][ETH_GSTRING_LEN] = { | |
| 407 | [HWTSTAMP_TX_OFF] = "off", | |
| 408 | [HWTSTAMP_TX_ON] = "on", | |
| 409 | [HWTSTAMP_TX_ONESTEP_SYNC] = "onestep-sync", | |
| 410 | [HWTSTAMP_TX_ONESTEP_P2P] = "onestep-p2p", | |
| 411 | }; | |
| 412 | static_assert(ARRAY_SIZE(ts_tx_type_names) == __HWTSTAMP_TX_CNT); | |
| 413 | ||
| 414 | const char ts_rx_filter_names[][ETH_GSTRING_LEN] = { | |
| 415 | [HWTSTAMP_FILTER_NONE] = "none", | |
| 416 | [HWTSTAMP_FILTER_ALL] = "all", | |
| 417 | [HWTSTAMP_FILTER_SOME] = "some", | |
| 418 | [HWTSTAMP_FILTER_PTP_V1_L4_EVENT] = "ptpv1-l4-event", | |
| 419 | [HWTSTAMP_FILTER_PTP_V1_L4_SYNC] = "ptpv1-l4-sync", | |
| 420 | [HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ] = "ptpv1-l4-delay-req", | |
| 421 | [HWTSTAMP_FILTER_PTP_V2_L4_EVENT] = "ptpv2-l4-event", | |
| 422 | [HWTSTAMP_FILTER_PTP_V2_L4_SYNC] = "ptpv2-l4-sync", | |
| 423 | [HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ] = "ptpv2-l4-delay-req", | |
| 424 | [HWTSTAMP_FILTER_PTP_V2_L2_EVENT] = "ptpv2-l2-event", | |
| 425 | [HWTSTAMP_FILTER_PTP_V2_L2_SYNC] = "ptpv2-l2-sync", | |
| 426 | [HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ] = "ptpv2-l2-delay-req", | |
| 427 | [HWTSTAMP_FILTER_PTP_V2_EVENT] = "ptpv2-event", | |
| 428 | [HWTSTAMP_FILTER_PTP_V2_SYNC] = "ptpv2-sync", | |
| 429 | [HWTSTAMP_FILTER_PTP_V2_DELAY_REQ] = "ptpv2-delay-req", | |
| 430 | [HWTSTAMP_FILTER_NTP_ALL] = "ntp-all", | |
| 431 | }; | |
| 432 | static_assert(ARRAY_SIZE(ts_rx_filter_names) == __HWTSTAMP_FILTER_CNT); | |
| 433 | ||
| c7d759eb JK |
434 | const char udp_tunnel_type_names[][ETH_GSTRING_LEN] = { |
| 435 | [ETHTOOL_UDP_TUNNEL_TYPE_VXLAN] = "vxlan", | |
| 436 | [ETHTOOL_UDP_TUNNEL_TYPE_GENEVE] = "geneve", | |
| 437 | [ETHTOOL_UDP_TUNNEL_TYPE_VXLAN_GPE] = "vxlan-gpe", | |
| 438 | }; | |
| 439 | static_assert(ARRAY_SIZE(udp_tunnel_type_names) == | |
| 440 | __ETHTOOL_UDP_TUNNEL_TYPE_CNT); | |
| 441 | ||
| 459e0b81 MK |
442 | /* return false if legacy contained non-0 deprecated fields |
| 443 | * maxtxpkt/maxrxpkt. rest of ksettings always updated | |
| 444 | */ | |
| 445 | bool | |
| 446 | convert_legacy_settings_to_link_ksettings( | |
| 447 | struct ethtool_link_ksettings *link_ksettings, | |
| 448 | const struct ethtool_cmd *legacy_settings) | |
| 449 | { | |
| 450 | bool retval = true; | |
| 451 | ||
| 452 | memset(link_ksettings, 0, sizeof(*link_ksettings)); | |
| 453 | ||
| 454 | /* This is used to tell users that driver is still using these | |
| 455 | * deprecated legacy fields, and they should not use | |
| 456 | * %ETHTOOL_GLINKSETTINGS/%ETHTOOL_SLINKSETTINGS | |
| 457 | */ | |
| 458 | if (legacy_settings->maxtxpkt || | |
| 459 | legacy_settings->maxrxpkt) | |
| 460 | retval = false; | |
| 461 | ||
| 462 | ethtool_convert_legacy_u32_to_link_mode( | |
| 463 | link_ksettings->link_modes.supported, | |
| 464 | legacy_settings->supported); | |
| 465 | ethtool_convert_legacy_u32_to_link_mode( | |
| 466 | link_ksettings->link_modes.advertising, | |
| 467 | legacy_settings->advertising); | |
| 468 | ethtool_convert_legacy_u32_to_link_mode( | |
| 469 | link_ksettings->link_modes.lp_advertising, | |
| 470 | legacy_settings->lp_advertising); | |
| 471 | link_ksettings->base.speed | |
| 472 | = ethtool_cmd_speed(legacy_settings); | |
| 473 | link_ksettings->base.duplex | |
| 474 | = legacy_settings->duplex; | |
| 475 | link_ksettings->base.port | |
| 476 | = legacy_settings->port; | |
| 477 | link_ksettings->base.phy_address | |
| 478 | = legacy_settings->phy_address; | |
| 479 | link_ksettings->base.autoneg | |
| 480 | = legacy_settings->autoneg; | |
| 481 | link_ksettings->base.mdio_support | |
| 482 | = legacy_settings->mdio_support; | |
| 483 | link_ksettings->base.eth_tp_mdix | |
| 484 | = legacy_settings->eth_tp_mdix; | |
| 485 | link_ksettings->base.eth_tp_mdix_ctrl | |
| 486 | = legacy_settings->eth_tp_mdix_ctrl; | |
| 487 | return retval; | |
| 488 | } | |
| 3d2b847f MK |
489 | |
| 490 | int __ethtool_get_link(struct net_device *dev) | |
| 491 | { | |
| 492 | if (!dev->ethtool_ops->get_link) | |
| 493 | return -EOPNOTSUPP; | |
| 494 | ||
| 495 | return netif_running(dev) && dev->ethtool_ops->get_link(dev); | |
| 496 | } | |
| e19c591e MK |
497 | |
| 498 | int ethtool_get_max_rxfh_channel(struct net_device *dev, u32 *max) | |
| 499 | { | |
| 500 | u32 dev_size, current_max = 0; | |
| 501 | u32 *indir; | |
| 502 | int ret; | |
| 503 | ||
| 504 | if (!dev->ethtool_ops->get_rxfh_indir_size || | |
| 505 | !dev->ethtool_ops->get_rxfh) | |
| 506 | return -EOPNOTSUPP; | |
| 507 | dev_size = dev->ethtool_ops->get_rxfh_indir_size(dev); | |
| 508 | if (dev_size == 0) | |
| 509 | return -EOPNOTSUPP; | |
| 510 | ||
| 511 | indir = kcalloc(dev_size, sizeof(indir[0]), GFP_USER); | |
| 512 | if (!indir) | |
| 513 | return -ENOMEM; | |
| 514 | ||
| 515 | ret = dev->ethtool_ops->get_rxfh(dev, indir, NULL, NULL); | |
| 516 | if (ret) | |
| 517 | goto out; | |
| 518 | ||
| 519 | while (dev_size--) | |
| 520 | current_max = max(current_max, indir[dev_size]); | |
| 521 | ||
| 522 | *max = current_max; | |
| 523 | ||
| 524 | out: | |
| 525 | kfree(indir); | |
| 526 | return ret; | |
| 527 | } | |
| 9000edb7 JK |
528 | |
| 529 | int ethtool_check_ops(const struct ethtool_ops *ops) | |
| 530 | { | |
| 531 | if (WARN_ON(ops->set_coalesce && !ops->supported_coalesce_params)) | |
| 532 | return -EINVAL; | |
| 533 | /* NOTE: sufficiently insane drivers may swap ethtool_ops at runtime, | |
| 534 | * the fact that ops are checked at registration time does not | |
| 535 | * mean the ops attached to a netdev later on are sane. | |
| 536 | */ | |
| 537 | return 0; | |
| 538 | } | |
| 5b071c59 MK |
539 | |
| 540 | int __ethtool_get_ts_info(struct net_device *dev, struct ethtool_ts_info *info) | |
| 541 | { | |
| 542 | const struct ethtool_ops *ops = dev->ethtool_ops; | |
| 543 | struct phy_device *phydev = dev->phydev; | |
| 544 | ||
| 545 | memset(info, 0, sizeof(*info)); | |
| 546 | info->cmd = ETHTOOL_GET_TS_INFO; | |
| 547 | ||
| 548 | if (phy_has_tsinfo(phydev)) | |
| 549 | return phy_ts_info(phydev, info); | |
| 550 | if (ops->get_ts_info) | |
| 551 | return ops->get_ts_info(dev, info); | |
| 552 | ||
| 553 | info->so_timestamping = SOF_TIMESTAMPING_RX_SOFTWARE | | |
| 554 | SOF_TIMESTAMPING_SOFTWARE; | |
| 555 | info->phc_index = -1; | |
| 556 | ||
| 557 | return 0; | |
| 558 | } | |
| 4895d780 | 559 | |
| c156174a YL |
560 | int ethtool_get_phc_vclocks(struct net_device *dev, int **vclock_index) |
| 561 | { | |
| 562 | struct ethtool_ts_info info = { }; | |
| 563 | int num = 0; | |
| 564 | ||
| 565 | if (!__ethtool_get_ts_info(dev, &info)) | |
| 566 | num = ptp_get_vclocks_index(info.phc_index, vclock_index); | |
| 567 | ||
| 568 | return num; | |
| 569 | } | |
| 570 | EXPORT_SYMBOL(ethtool_get_phc_vclocks); | |
| 571 | ||
| 4895d780 FF |
572 | const struct ethtool_phy_ops *ethtool_phy_ops; |
| 573 | ||
| 574 | void ethtool_set_ethtool_phy_ops(const struct ethtool_phy_ops *ops) | |
| 575 | { | |
| 576 | rtnl_lock(); | |
| 577 | ethtool_phy_ops = ops; | |
| 578 | rtnl_unlock(); | |
| 579 | } | |
| 580 | EXPORT_SYMBOL_GPL(ethtool_set_ethtool_phy_ops); | |
| a975d7d8 DR |
581 | |
| 582 | void | |
| 583 | ethtool_params_from_link_mode(struct ethtool_link_ksettings *link_ksettings, | |
| 584 | enum ethtool_link_mode_bit_indices link_mode) | |
| 585 | { | |
| 586 | const struct link_mode_info *link_info; | |
| 587 | ||
| 588 | if (WARN_ON_ONCE(link_mode >= __ETHTOOL_LINK_MODE_MASK_NBITS)) | |
| 589 | return; | |
| 590 | ||
| 591 | link_info = &link_mode_params[link_mode]; | |
| 592 | link_ksettings->base.speed = link_info->speed; | |
| 593 | link_ksettings->lanes = link_info->lanes; | |
| 594 | link_ksettings->base.duplex = link_info->duplex; | |
| 595 | } | |
| 596 | EXPORT_SYMBOL_GPL(ethtool_params_from_link_mode); |