swiotlb: comment corrections
[linux-block.git] / lib / swiotlb.c
CommitLineData
1da177e4
LT
1/*
2 * Dynamic DMA mapping support.
3 *
563aaf06 4 * This implementation is a fallback for platforms that do not support
1da177e4
LT
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
569c8bf5
JL
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
fb05a379 17 * 08/12/11 beckyb Add highmem support
1da177e4
LT
18 */
19
20#include <linux/cache.h>
17e5ad6c 21#include <linux/dma-mapping.h>
1da177e4
LT
22#include <linux/mm.h>
23#include <linux/module.h>
1da177e4
LT
24#include <linux/spinlock.h>
25#include <linux/string.h>
0016fdee 26#include <linux/swiotlb.h>
fb05a379 27#include <linux/pfn.h>
1da177e4
LT
28#include <linux/types.h>
29#include <linux/ctype.h>
ef9b1893 30#include <linux/highmem.h>
1da177e4
LT
31
32#include <asm/io.h>
1da177e4 33#include <asm/dma.h>
17e5ad6c 34#include <asm/scatterlist.h>
1da177e4
LT
35
36#include <linux/init.h>
37#include <linux/bootmem.h>
a8522509 38#include <linux/iommu-helper.h>
1da177e4
LT
39
40#define OFFSET(val,align) ((unsigned long) \
41 ( (val) & ( (align) - 1)))
42
0b9afede
AW
43#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
44
45/*
46 * Minimum IO TLB size to bother booting with. Systems with mainly
47 * 64bit capable cards will only lightly use the swiotlb. If we can't
48 * allocate a contiguous 1MB, we're probably in trouble anyway.
49 */
50#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
51
de69e0f0
JL
52/*
53 * Enumeration for sync targets
54 */
55enum dma_sync_target {
56 SYNC_FOR_CPU = 0,
57 SYNC_FOR_DEVICE = 1,
58};
59
1da177e4
LT
60int swiotlb_force;
61
62/*
ceb5ac32
BB
63 * Used to do a quick range check in unmap_single and
64 * sync_single_*, to see if the memory was in fact allocated by this
1da177e4
LT
65 * API.
66 */
67static char *io_tlb_start, *io_tlb_end;
68
69/*
70 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
71 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
72 */
73static unsigned long io_tlb_nslabs;
74
75/*
76 * When the IOMMU overflows we return a fallback buffer. This sets the size.
77 */
78static unsigned long io_tlb_overflow = 32*1024;
79
80void *io_tlb_overflow_buffer;
81
82/*
83 * This is a free list describing the number of free entries available from
84 * each index
85 */
86static unsigned int *io_tlb_list;
87static unsigned int io_tlb_index;
88
89/*
90 * We need to save away the original address corresponding to a mapped entry
91 * for the sync operations.
92 */
bc40ac66 93static phys_addr_t *io_tlb_orig_addr;
1da177e4
LT
94
95/*
96 * Protect the above data structures in the map and unmap calls
97 */
98static DEFINE_SPINLOCK(io_tlb_lock);
99
100static int __init
101setup_io_tlb_npages(char *str)
102{
103 if (isdigit(*str)) {
e8579e72 104 io_tlb_nslabs = simple_strtoul(str, &str, 0);
1da177e4
LT
105 /* avoid tail segment of size < IO_TLB_SEGSIZE */
106 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
107 }
108 if (*str == ',')
109 ++str;
110 if (!strcmp(str, "force"))
111 swiotlb_force = 1;
112 return 1;
113}
114__setup("swiotlb=", setup_io_tlb_npages);
115/* make io_tlb_overflow tunable too? */
116
79ff56eb 117void * __weak __init swiotlb_alloc_boot(size_t size, unsigned long nslabs)
8c5df16b
JF
118{
119 return alloc_bootmem_low_pages(size);
120}
121
122void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs)
123{
124 return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
125}
126
70a7d3cc 127dma_addr_t __weak swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr)
e08e1f7a
IC
128{
129 return paddr;
130}
131
132phys_addr_t __weak swiotlb_bus_to_phys(dma_addr_t baddr)
133{
134 return baddr;
135}
136
70a7d3cc
JF
137static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
138 volatile void *address)
e08e1f7a 139{
70a7d3cc 140 return swiotlb_phys_to_bus(hwdev, virt_to_phys(address));
e08e1f7a
IC
141}
142
143static void *swiotlb_bus_to_virt(dma_addr_t address)
144{
145 return phys_to_virt(swiotlb_bus_to_phys(address));
146}
147
0b8698ab 148int __weak swiotlb_arch_range_needs_mapping(phys_addr_t paddr, size_t size)
b81ea27b
IC
149{
150 return 0;
151}
152
2e5b2b86
IC
153static void swiotlb_print_info(unsigned long bytes)
154{
155 phys_addr_t pstart, pend;
2e5b2b86
IC
156
157 pstart = virt_to_phys(io_tlb_start);
158 pend = virt_to_phys(io_tlb_end);
159
2e5b2b86
IC
160 printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
161 bytes >> 20, io_tlb_start, io_tlb_end);
70a7d3cc
JF
162 printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
163 (unsigned long long)pstart,
164 (unsigned long long)pend);
2e5b2b86
IC
165}
166
1da177e4
LT
167/*
168 * Statically reserve bounce buffer space and initialize bounce buffer data
17e5ad6c 169 * structures for the software IO TLB used to implement the DMA API.
1da177e4 170 */
563aaf06
JB
171void __init
172swiotlb_init_with_default_size(size_t default_size)
1da177e4 173{
563aaf06 174 unsigned long i, bytes;
1da177e4
LT
175
176 if (!io_tlb_nslabs) {
e8579e72 177 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
1da177e4
LT
178 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
179 }
180
563aaf06
JB
181 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
182
1da177e4
LT
183 /*
184 * Get IO TLB memory from the low pages
185 */
8c5df16b 186 io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs);
1da177e4
LT
187 if (!io_tlb_start)
188 panic("Cannot allocate SWIOTLB buffer");
563aaf06 189 io_tlb_end = io_tlb_start + bytes;
1da177e4
LT
190
191 /*
192 * Allocate and initialize the free list array. This array is used
193 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
194 * between io_tlb_start and io_tlb_end.
195 */
196 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
25667d67 197 for (i = 0; i < io_tlb_nslabs; i++)
1da177e4
LT
198 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
199 io_tlb_index = 0;
bc40ac66 200 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t));
1da177e4
LT
201
202 /*
203 * Get the overflow emergency buffer
204 */
205 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
563aaf06
JB
206 if (!io_tlb_overflow_buffer)
207 panic("Cannot allocate SWIOTLB overflow buffer!\n");
208
2e5b2b86 209 swiotlb_print_info(bytes);
1da177e4
LT
210}
211
563aaf06
JB
212void __init
213swiotlb_init(void)
1da177e4 214{
25667d67 215 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
1da177e4
LT
216}
217
0b9afede
AW
218/*
219 * Systems with larger DMA zones (those that don't support ISA) can
220 * initialize the swiotlb later using the slab allocator if needed.
221 * This should be just like above, but with some error catching.
222 */
223int
563aaf06 224swiotlb_late_init_with_default_size(size_t default_size)
0b9afede 225{
563aaf06 226 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
0b9afede
AW
227 unsigned int order;
228
229 if (!io_tlb_nslabs) {
230 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
231 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
232 }
233
234 /*
235 * Get IO TLB memory from the low pages
236 */
563aaf06 237 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
0b9afede 238 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 239 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede
AW
240
241 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
8c5df16b 242 io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs);
0b9afede
AW
243 if (io_tlb_start)
244 break;
245 order--;
246 }
247
248 if (!io_tlb_start)
249 goto cleanup1;
250
563aaf06 251 if (order != get_order(bytes)) {
0b9afede
AW
252 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
253 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
254 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 255 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede 256 }
563aaf06
JB
257 io_tlb_end = io_tlb_start + bytes;
258 memset(io_tlb_start, 0, bytes);
0b9afede
AW
259
260 /*
261 * Allocate and initialize the free list array. This array is used
262 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
263 * between io_tlb_start and io_tlb_end.
264 */
265 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
266 get_order(io_tlb_nslabs * sizeof(int)));
267 if (!io_tlb_list)
268 goto cleanup2;
269
270 for (i = 0; i < io_tlb_nslabs; i++)
271 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
272 io_tlb_index = 0;
273
bc40ac66
BB
274 io_tlb_orig_addr = (phys_addr_t *)
275 __get_free_pages(GFP_KERNEL,
276 get_order(io_tlb_nslabs *
277 sizeof(phys_addr_t)));
0b9afede
AW
278 if (!io_tlb_orig_addr)
279 goto cleanup3;
280
bc40ac66 281 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
0b9afede
AW
282
283 /*
284 * Get the overflow emergency buffer
285 */
286 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
287 get_order(io_tlb_overflow));
288 if (!io_tlb_overflow_buffer)
289 goto cleanup4;
290
2e5b2b86 291 swiotlb_print_info(bytes);
0b9afede
AW
292
293 return 0;
294
295cleanup4:
bc40ac66
BB
296 free_pages((unsigned long)io_tlb_orig_addr,
297 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
0b9afede
AW
298 io_tlb_orig_addr = NULL;
299cleanup3:
25667d67
TL
300 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
301 sizeof(int)));
0b9afede 302 io_tlb_list = NULL;
0b9afede 303cleanup2:
563aaf06 304 io_tlb_end = NULL;
0b9afede
AW
305 free_pages((unsigned long)io_tlb_start, order);
306 io_tlb_start = NULL;
307cleanup1:
308 io_tlb_nslabs = req_nslabs;
309 return -ENOMEM;
310}
311
be6b0267 312static int
2797982e 313address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
1da177e4 314{
07a2c01a 315 return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
1da177e4
LT
316}
317
0b8698ab 318static inline int range_needs_mapping(phys_addr_t paddr, size_t size)
b81ea27b 319{
0b8698ab 320 return swiotlb_force || swiotlb_arch_range_needs_mapping(paddr, size);
b81ea27b
IC
321}
322
640aebfe
FT
323static int is_swiotlb_buffer(char *addr)
324{
325 return addr >= io_tlb_start && addr < io_tlb_end;
326}
327
fb05a379
BB
328/*
329 * Bounce: copy the swiotlb buffer back to the original dma location
330 */
331static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
332 enum dma_data_direction dir)
333{
334 unsigned long pfn = PFN_DOWN(phys);
335
336 if (PageHighMem(pfn_to_page(pfn))) {
337 /* The buffer does not have a mapping. Map it in and copy */
338 unsigned int offset = phys & ~PAGE_MASK;
339 char *buffer;
340 unsigned int sz = 0;
341 unsigned long flags;
342
343 while (size) {
344 sz = min(PAGE_SIZE - offset, size);
345
346 local_irq_save(flags);
347 buffer = kmap_atomic(pfn_to_page(pfn),
348 KM_BOUNCE_READ);
349 if (dir == DMA_TO_DEVICE)
350 memcpy(dma_addr, buffer + offset, sz);
ef9b1893 351 else
fb05a379
BB
352 memcpy(buffer + offset, dma_addr, sz);
353 kunmap_atomic(buffer, KM_BOUNCE_READ);
ef9b1893 354 local_irq_restore(flags);
fb05a379
BB
355
356 size -= sz;
357 pfn++;
358 dma_addr += sz;
359 offset = 0;
ef9b1893
JF
360 }
361 } else {
ef9b1893 362 if (dir == DMA_TO_DEVICE)
fb05a379 363 memcpy(dma_addr, phys_to_virt(phys), size);
ef9b1893 364 else
fb05a379 365 memcpy(phys_to_virt(phys), dma_addr, size);
ef9b1893 366 }
1b548f66
JF
367}
368
1da177e4
LT
369/*
370 * Allocates bounce buffer and returns its kernel virtual address.
371 */
372static void *
bc40ac66 373map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir)
1da177e4
LT
374{
375 unsigned long flags;
376 char *dma_addr;
377 unsigned int nslots, stride, index, wrap;
378 int i;
681cc5cd
FT
379 unsigned long start_dma_addr;
380 unsigned long mask;
381 unsigned long offset_slots;
382 unsigned long max_slots;
383
384 mask = dma_get_seg_boundary(hwdev);
70a7d3cc 385 start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask;
681cc5cd
FT
386
387 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
a5ddde4a
IC
388
389 /*
390 * Carefully handle integer overflow which can occur when mask == ~0UL.
391 */
b15a3891
JB
392 max_slots = mask + 1
393 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
394 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
1da177e4
LT
395
396 /*
397 * For mappings greater than a page, we limit the stride (and
398 * hence alignment) to a page size.
399 */
400 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
401 if (size > PAGE_SIZE)
402 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
403 else
404 stride = 1;
405
34814545 406 BUG_ON(!nslots);
1da177e4
LT
407
408 /*
409 * Find suitable number of IO TLB entries size that will fit this
410 * request and allocate a buffer from that IO TLB pool.
411 */
412 spin_lock_irqsave(&io_tlb_lock, flags);
a7133a15
AM
413 index = ALIGN(io_tlb_index, stride);
414 if (index >= io_tlb_nslabs)
415 index = 0;
416 wrap = index;
417
418 do {
a8522509
FT
419 while (iommu_is_span_boundary(index, nslots, offset_slots,
420 max_slots)) {
b15a3891
JB
421 index += stride;
422 if (index >= io_tlb_nslabs)
423 index = 0;
a7133a15
AM
424 if (index == wrap)
425 goto not_found;
426 }
427
428 /*
429 * If we find a slot that indicates we have 'nslots' number of
430 * contiguous buffers, we allocate the buffers from that slot
431 * and mark the entries as '0' indicating unavailable.
432 */
433 if (io_tlb_list[index] >= nslots) {
434 int count = 0;
435
436 for (i = index; i < (int) (index + nslots); i++)
437 io_tlb_list[i] = 0;
438 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
439 io_tlb_list[i] = ++count;
440 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
1da177e4 441
a7133a15
AM
442 /*
443 * Update the indices to avoid searching in the next
444 * round.
445 */
446 io_tlb_index = ((index + nslots) < io_tlb_nslabs
447 ? (index + nslots) : 0);
448
449 goto found;
450 }
451 index += stride;
452 if (index >= io_tlb_nslabs)
453 index = 0;
454 } while (index != wrap);
455
456not_found:
457 spin_unlock_irqrestore(&io_tlb_lock, flags);
458 return NULL;
459found:
1da177e4
LT
460 spin_unlock_irqrestore(&io_tlb_lock, flags);
461
462 /*
463 * Save away the mapping from the original address to the DMA address.
464 * This is needed when we sync the memory. Then we sync the buffer if
465 * needed.
466 */
bc40ac66
BB
467 for (i = 0; i < nslots; i++)
468 io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
1da177e4 469 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
fb05a379 470 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
1da177e4
LT
471
472 return dma_addr;
473}
474
475/*
476 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
477 */
478static void
479unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
480{
481 unsigned long flags;
482 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
483 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
bc40ac66 484 phys_addr_t phys = io_tlb_orig_addr[index];
1da177e4
LT
485
486 /*
487 * First, sync the memory before unmapping the entry
488 */
bc40ac66 489 if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
fb05a379 490 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
1da177e4
LT
491
492 /*
493 * Return the buffer to the free list by setting the corresponding
494 * entries to indicate the number of contigous entries available.
495 * While returning the entries to the free list, we merge the entries
496 * with slots below and above the pool being returned.
497 */
498 spin_lock_irqsave(&io_tlb_lock, flags);
499 {
500 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
501 io_tlb_list[index + nslots] : 0);
502 /*
503 * Step 1: return the slots to the free list, merging the
504 * slots with superceeding slots
505 */
506 for (i = index + nslots - 1; i >= index; i--)
507 io_tlb_list[i] = ++count;
508 /*
509 * Step 2: merge the returned slots with the preceding slots,
510 * if available (non zero)
511 */
512 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
513 io_tlb_list[i] = ++count;
514 }
515 spin_unlock_irqrestore(&io_tlb_lock, flags);
516}
517
518static void
de69e0f0
JL
519sync_single(struct device *hwdev, char *dma_addr, size_t size,
520 int dir, int target)
1da177e4 521{
bc40ac66
BB
522 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
523 phys_addr_t phys = io_tlb_orig_addr[index];
524
525 phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
df336d1c 526
de69e0f0
JL
527 switch (target) {
528 case SYNC_FOR_CPU:
529 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
fb05a379 530 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
34814545
ES
531 else
532 BUG_ON(dir != DMA_TO_DEVICE);
de69e0f0
JL
533 break;
534 case SYNC_FOR_DEVICE:
535 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
fb05a379 536 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
34814545
ES
537 else
538 BUG_ON(dir != DMA_FROM_DEVICE);
de69e0f0
JL
539 break;
540 default:
1da177e4 541 BUG();
de69e0f0 542 }
1da177e4
LT
543}
544
545void *
546swiotlb_alloc_coherent(struct device *hwdev, size_t size,
06a54497 547 dma_addr_t *dma_handle, gfp_t flags)
1da177e4 548{
563aaf06 549 dma_addr_t dev_addr;
1da177e4
LT
550 void *ret;
551 int order = get_order(size);
284901a9 552 u64 dma_mask = DMA_BIT_MASK(32);
1e74f300
FT
553
554 if (hwdev && hwdev->coherent_dma_mask)
555 dma_mask = hwdev->coherent_dma_mask;
1da177e4 556
25667d67 557 ret = (void *)__get_free_pages(flags, order);
70a7d3cc
JF
558 if (ret &&
559 !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(hwdev, ret),
560 size)) {
1da177e4
LT
561 /*
562 * The allocated memory isn't reachable by the device.
1da177e4
LT
563 */
564 free_pages((unsigned long) ret, order);
565 ret = NULL;
566 }
567 if (!ret) {
568 /*
569 * We are either out of memory or the device can't DMA
ceb5ac32
BB
570 * to GFP_DMA memory; fall back on map_single(), which
571 * will grab memory from the lowest available address range.
1da177e4 572 */
bc40ac66 573 ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
9dfda12b 574 if (!ret)
1da177e4 575 return NULL;
1da177e4
LT
576 }
577
578 memset(ret, 0, size);
70a7d3cc 579 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
1da177e4
LT
580
581 /* Confirm address can be DMA'd by device */
1e74f300 582 if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) {
563aaf06 583 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
1e74f300 584 (unsigned long long)dma_mask,
563aaf06 585 (unsigned long long)dev_addr);
a2b89b59
FT
586
587 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
588 unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
589 return NULL;
1da177e4
LT
590 }
591 *dma_handle = dev_addr;
592 return ret;
593}
874d6a95 594EXPORT_SYMBOL(swiotlb_alloc_coherent);
1da177e4
LT
595
596void
597swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
598 dma_addr_t dma_handle)
599{
aa24886e 600 WARN_ON(irqs_disabled());
640aebfe 601 if (!is_swiotlb_buffer(vaddr))
1da177e4
LT
602 free_pages((unsigned long) vaddr, get_order(size));
603 else
604 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
21f6c4de 605 unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
1da177e4 606}
874d6a95 607EXPORT_SYMBOL(swiotlb_free_coherent);
1da177e4
LT
608
609static void
610swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
611{
612 /*
613 * Ran out of IOMMU space for this operation. This is very bad.
614 * Unfortunately the drivers cannot handle this operation properly.
17e5ad6c 615 * unless they check for dma_mapping_error (most don't)
1da177e4
LT
616 * When the mapping is small enough return a static buffer to limit
617 * the damage, or panic when the transfer is too big.
618 */
563aaf06 619 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
94b32486 620 "device %s\n", size, dev ? dev_name(dev) : "?");
1da177e4
LT
621
622 if (size > io_tlb_overflow && do_panic) {
17e5ad6c
TL
623 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
624 panic("DMA: Memory would be corrupted\n");
625 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
626 panic("DMA: Random memory would be DMAed\n");
1da177e4
LT
627 }
628}
629
630/*
631 * Map a single buffer of the indicated size for DMA in streaming mode. The
17e5ad6c 632 * physical address to use is returned.
1da177e4
LT
633 *
634 * Once the device is given the dma address, the device owns this memory until
ceb5ac32 635 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
1da177e4 636 */
f98eee8e
FT
637dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
638 unsigned long offset, size_t size,
639 enum dma_data_direction dir,
640 struct dma_attrs *attrs)
1da177e4 641{
f98eee8e
FT
642 phys_addr_t phys = page_to_phys(page) + offset;
643 void *ptr = page_address(page) + offset;
644 dma_addr_t dev_addr = swiotlb_phys_to_bus(dev, phys);
1da177e4
LT
645 void *map;
646
34814545 647 BUG_ON(dir == DMA_NONE);
1da177e4 648 /*
ceb5ac32 649 * If the address happens to be in the device's DMA window,
1da177e4
LT
650 * we can safely return the device addr and not worry about bounce
651 * buffering it.
652 */
f98eee8e 653 if (!address_needs_mapping(dev, dev_addr, size) &&
0b8698ab 654 !range_needs_mapping(virt_to_phys(ptr), size))
1da177e4
LT
655 return dev_addr;
656
657 /*
658 * Oh well, have to allocate and map a bounce buffer.
659 */
f98eee8e 660 map = map_single(dev, phys, size, dir);
1da177e4 661 if (!map) {
f98eee8e 662 swiotlb_full(dev, size, dir, 1);
1da177e4
LT
663 map = io_tlb_overflow_buffer;
664 }
665
f98eee8e 666 dev_addr = swiotlb_virt_to_bus(dev, map);
1da177e4
LT
667
668 /*
669 * Ensure that the address returned is DMA'ble
670 */
f98eee8e 671 if (address_needs_mapping(dev, dev_addr, size))
1da177e4
LT
672 panic("map_single: bounce buffer is not DMA'ble");
673
674 return dev_addr;
675}
f98eee8e 676EXPORT_SYMBOL_GPL(swiotlb_map_page);
1da177e4 677
1da177e4
LT
678/*
679 * Unmap a single streaming mode DMA translation. The dma_addr and size must
ceb5ac32 680 * match what was provided for in a previous swiotlb_map_page call. All
1da177e4
LT
681 * other usages are undefined.
682 *
683 * After this call, reads by the cpu to the buffer are guaranteed to see
684 * whatever the device wrote there.
685 */
f98eee8e
FT
686void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
687 size_t size, enum dma_data_direction dir,
688 struct dma_attrs *attrs)
1da177e4 689{
e08e1f7a 690 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
1da177e4 691
34814545 692 BUG_ON(dir == DMA_NONE);
640aebfe 693 if (is_swiotlb_buffer(dma_addr))
1da177e4
LT
694 unmap_single(hwdev, dma_addr, size, dir);
695 else if (dir == DMA_FROM_DEVICE)
cde14bbf 696 dma_mark_clean(dma_addr, size);
1da177e4 697}
f98eee8e 698EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
874d6a95 699
1da177e4
LT
700/*
701 * Make physical memory consistent for a single streaming mode DMA translation
702 * after a transfer.
703 *
ceb5ac32 704 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
17e5ad6c
TL
705 * using the cpu, yet do not wish to teardown the dma mapping, you must
706 * call this function before doing so. At the next point you give the dma
1da177e4
LT
707 * address back to the card, you must first perform a
708 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
709 */
be6b0267 710static void
8270f3f1 711swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0 712 size_t size, int dir, int target)
1da177e4 713{
e08e1f7a 714 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
1da177e4 715
34814545 716 BUG_ON(dir == DMA_NONE);
640aebfe 717 if (is_swiotlb_buffer(dma_addr))
de69e0f0 718 sync_single(hwdev, dma_addr, size, dir, target);
1da177e4 719 else if (dir == DMA_FROM_DEVICE)
cde14bbf 720 dma_mark_clean(dma_addr, size);
1da177e4
LT
721}
722
8270f3f1
JL
723void
724swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
160c1d8e 725 size_t size, enum dma_data_direction dir)
8270f3f1 726{
de69e0f0 727 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
8270f3f1 728}
874d6a95 729EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
8270f3f1 730
1da177e4
LT
731void
732swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
160c1d8e 733 size_t size, enum dma_data_direction dir)
1da177e4 734{
de69e0f0 735 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
1da177e4 736}
874d6a95 737EXPORT_SYMBOL(swiotlb_sync_single_for_device);
1da177e4 738
878a97cf
JL
739/*
740 * Same as above, but for a sub-range of the mapping.
741 */
be6b0267 742static void
878a97cf 743swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0
JL
744 unsigned long offset, size_t size,
745 int dir, int target)
878a97cf 746{
e08e1f7a 747 char *dma_addr = swiotlb_bus_to_virt(dev_addr) + offset;
878a97cf 748
34814545 749 BUG_ON(dir == DMA_NONE);
640aebfe 750 if (is_swiotlb_buffer(dma_addr))
de69e0f0 751 sync_single(hwdev, dma_addr, size, dir, target);
878a97cf 752 else if (dir == DMA_FROM_DEVICE)
cde14bbf 753 dma_mark_clean(dma_addr, size);
878a97cf
JL
754}
755
756void
757swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
160c1d8e
FT
758 unsigned long offset, size_t size,
759 enum dma_data_direction dir)
878a97cf 760{
de69e0f0
JL
761 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
762 SYNC_FOR_CPU);
878a97cf 763}
874d6a95 764EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
878a97cf
JL
765
766void
767swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
160c1d8e
FT
768 unsigned long offset, size_t size,
769 enum dma_data_direction dir)
878a97cf 770{
de69e0f0
JL
771 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
772 SYNC_FOR_DEVICE);
878a97cf 773}
874d6a95 774EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
878a97cf 775
1da177e4
LT
776/*
777 * Map a set of buffers described by scatterlist in streaming mode for DMA.
ceb5ac32 778 * This is the scatter-gather version of the above swiotlb_map_page
1da177e4
LT
779 * interface. Here the scatter gather list elements are each tagged with the
780 * appropriate dma address and length. They are obtained via
781 * sg_dma_{address,length}(SG).
782 *
783 * NOTE: An implementation may be able to use a smaller number of
784 * DMA address/length pairs than there are SG table elements.
785 * (for example via virtual mapping capabilities)
786 * The routine returns the number of addr/length pairs actually
787 * used, at most nents.
788 *
ceb5ac32 789 * Device ownership issues as mentioned above for swiotlb_map_page are the
1da177e4
LT
790 * same here.
791 */
792int
309df0c5 793swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
160c1d8e 794 enum dma_data_direction dir, struct dma_attrs *attrs)
1da177e4 795{
dbfd49fe 796 struct scatterlist *sg;
1da177e4
LT
797 int i;
798
34814545 799 BUG_ON(dir == DMA_NONE);
1da177e4 800
dbfd49fe 801 for_each_sg(sgl, sg, nelems, i) {
961d7d0e
IC
802 phys_addr_t paddr = sg_phys(sg);
803 dma_addr_t dev_addr = swiotlb_phys_to_bus(hwdev, paddr);
bc40ac66 804
961d7d0e 805 if (range_needs_mapping(paddr, sg->length) ||
2797982e 806 address_needs_mapping(hwdev, dev_addr, sg->length)) {
bc40ac66
BB
807 void *map = map_single(hwdev, sg_phys(sg),
808 sg->length, dir);
7e870233 809 if (!map) {
1da177e4
LT
810 /* Don't panic here, we expect map_sg users
811 to do proper error handling. */
812 swiotlb_full(hwdev, sg->length, dir, 0);
309df0c5
AK
813 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
814 attrs);
dbfd49fe 815 sgl[0].dma_length = 0;
1da177e4
LT
816 return 0;
817 }
70a7d3cc 818 sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
1da177e4
LT
819 } else
820 sg->dma_address = dev_addr;
821 sg->dma_length = sg->length;
822 }
823 return nelems;
824}
309df0c5
AK
825EXPORT_SYMBOL(swiotlb_map_sg_attrs);
826
827int
828swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
829 int dir)
830{
831 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
832}
874d6a95 833EXPORT_SYMBOL(swiotlb_map_sg);
1da177e4
LT
834
835/*
836 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
ceb5ac32 837 * concerning calls here are the same as for swiotlb_unmap_page() above.
1da177e4
LT
838 */
839void
309df0c5 840swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
160c1d8e 841 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
1da177e4 842{
dbfd49fe 843 struct scatterlist *sg;
1da177e4
LT
844 int i;
845
34814545 846 BUG_ON(dir == DMA_NONE);
1da177e4 847
dbfd49fe 848 for_each_sg(sgl, sg, nelems, i) {
961d7d0e 849 if (sg->dma_address != swiotlb_phys_to_bus(hwdev, sg_phys(sg)))
e08e1f7a 850 unmap_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
93fbff63 851 sg->dma_length, dir);
1da177e4 852 else if (dir == DMA_FROM_DEVICE)
961d7d0e 853 dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length);
dbfd49fe 854 }
1da177e4 855}
309df0c5
AK
856EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
857
858void
859swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
860 int dir)
861{
862 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
863}
874d6a95 864EXPORT_SYMBOL(swiotlb_unmap_sg);
1da177e4
LT
865
866/*
867 * Make physical memory consistent for a set of streaming mode DMA translations
868 * after a transfer.
869 *
870 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
871 * and usage.
872 */
be6b0267 873static void
dbfd49fe 874swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
de69e0f0 875 int nelems, int dir, int target)
1da177e4 876{
dbfd49fe 877 struct scatterlist *sg;
1da177e4
LT
878 int i;
879
34814545 880 BUG_ON(dir == DMA_NONE);
1da177e4 881
dbfd49fe 882 for_each_sg(sgl, sg, nelems, i) {
961d7d0e 883 if (sg->dma_address != swiotlb_phys_to_bus(hwdev, sg_phys(sg)))
e08e1f7a 884 sync_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
de69e0f0 885 sg->dma_length, dir, target);
cde14bbf 886 else if (dir == DMA_FROM_DEVICE)
961d7d0e 887 dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length);
dbfd49fe 888 }
1da177e4
LT
889}
890
8270f3f1
JL
891void
892swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
160c1d8e 893 int nelems, enum dma_data_direction dir)
8270f3f1 894{
de69e0f0 895 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
8270f3f1 896}
874d6a95 897EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
8270f3f1 898
1da177e4
LT
899void
900swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
160c1d8e 901 int nelems, enum dma_data_direction dir)
1da177e4 902{
de69e0f0 903 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
1da177e4 904}
874d6a95 905EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
1da177e4
LT
906
907int
8d8bb39b 908swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
1da177e4 909{
70a7d3cc 910 return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
1da177e4 911}
874d6a95 912EXPORT_SYMBOL(swiotlb_dma_mapping_error);
1da177e4
LT
913
914/*
17e5ad6c 915 * Return whether the given device DMA address mask can be supported
1da177e4 916 * properly. For example, if your device can only drive the low 24-bits
17e5ad6c 917 * during bus mastering, then you would pass 0x00ffffff as the mask to
1da177e4
LT
918 * this function.
919 */
920int
563aaf06 921swiotlb_dma_supported(struct device *hwdev, u64 mask)
1da177e4 922{
70a7d3cc 923 return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
1da177e4 924}
1da177e4 925EXPORT_SYMBOL(swiotlb_dma_supported);