x86/swiotlb: add default swiotlb_arch_range_needs_mapping
[linux-2.6-block.git] / lib / swiotlb.c
CommitLineData
1da177e4
LT
1/*
2 * Dynamic DMA mapping support.
3 *
563aaf06 4 * This implementation is a fallback for platforms that do not support
1da177e4
LT
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
569c8bf5
JL
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
1da177e4
LT
17 */
18
19#include <linux/cache.h>
17e5ad6c 20#include <linux/dma-mapping.h>
1da177e4
LT
21#include <linux/mm.h>
22#include <linux/module.h>
1da177e4 23#include <linux/spinlock.h>
8c5df16b 24#include <linux/swiotlb.h>
1da177e4 25#include <linux/string.h>
0016fdee 26#include <linux/swiotlb.h>
1da177e4
LT
27#include <linux/types.h>
28#include <linux/ctype.h>
ef9b1893 29#include <linux/highmem.h>
1da177e4
LT
30
31#include <asm/io.h>
1da177e4 32#include <asm/dma.h>
17e5ad6c 33#include <asm/scatterlist.h>
1da177e4
LT
34
35#include <linux/init.h>
36#include <linux/bootmem.h>
a8522509 37#include <linux/iommu-helper.h>
1da177e4
LT
38
39#define OFFSET(val,align) ((unsigned long) \
40 ( (val) & ( (align) - 1)))
41
0b9afede
AW
42#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
43
44/*
45 * Minimum IO TLB size to bother booting with. Systems with mainly
46 * 64bit capable cards will only lightly use the swiotlb. If we can't
47 * allocate a contiguous 1MB, we're probably in trouble anyway.
48 */
49#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
50
de69e0f0
JL
51/*
52 * Enumeration for sync targets
53 */
54enum dma_sync_target {
55 SYNC_FOR_CPU = 0,
56 SYNC_FOR_DEVICE = 1,
57};
58
1da177e4
LT
59int swiotlb_force;
60
61/*
62 * Used to do a quick range check in swiotlb_unmap_single and
63 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
64 * API.
65 */
66static char *io_tlb_start, *io_tlb_end;
67
68/*
69 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
70 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
71 */
72static unsigned long io_tlb_nslabs;
73
74/*
75 * When the IOMMU overflows we return a fallback buffer. This sets the size.
76 */
77static unsigned long io_tlb_overflow = 32*1024;
78
79void *io_tlb_overflow_buffer;
80
81/*
82 * This is a free list describing the number of free entries available from
83 * each index
84 */
85static unsigned int *io_tlb_list;
86static unsigned int io_tlb_index;
87
88/*
89 * We need to save away the original address corresponding to a mapped entry
90 * for the sync operations.
91 */
ef9b1893
JF
92static struct swiotlb_phys_addr {
93 struct page *page;
94 unsigned int offset;
95} *io_tlb_orig_addr;
1da177e4
LT
96
97/*
98 * Protect the above data structures in the map and unmap calls
99 */
100static DEFINE_SPINLOCK(io_tlb_lock);
101
102static int __init
103setup_io_tlb_npages(char *str)
104{
105 if (isdigit(*str)) {
e8579e72 106 io_tlb_nslabs = simple_strtoul(str, &str, 0);
1da177e4
LT
107 /* avoid tail segment of size < IO_TLB_SEGSIZE */
108 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
109 }
110 if (*str == ',')
111 ++str;
112 if (!strcmp(str, "force"))
113 swiotlb_force = 1;
114 return 1;
115}
116__setup("swiotlb=", setup_io_tlb_npages);
117/* make io_tlb_overflow tunable too? */
118
8c5df16b
JF
119void * __weak swiotlb_alloc_boot(size_t size, unsigned long nslabs)
120{
121 return alloc_bootmem_low_pages(size);
122}
123
124void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs)
125{
126 return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
127}
128
e08e1f7a
IC
129dma_addr_t __weak swiotlb_phys_to_bus(phys_addr_t paddr)
130{
131 return paddr;
132}
133
134phys_addr_t __weak swiotlb_bus_to_phys(dma_addr_t baddr)
135{
136 return baddr;
137}
138
139static dma_addr_t swiotlb_virt_to_bus(volatile void *address)
140{
141 return swiotlb_phys_to_bus(virt_to_phys(address));
142}
143
144static void *swiotlb_bus_to_virt(dma_addr_t address)
145{
146 return phys_to_virt(swiotlb_bus_to_phys(address));
147}
148
b81ea27b
IC
149int __weak swiotlb_arch_range_needs_mapping(void *ptr, size_t size)
150{
151 return 0;
152}
153
ef9b1893
JF
154static dma_addr_t swiotlb_sg_to_bus(struct scatterlist *sg)
155{
156 return swiotlb_phys_to_bus(page_to_phys(sg_page(sg)) + sg->offset);
157}
158
2e5b2b86
IC
159static void swiotlb_print_info(unsigned long bytes)
160{
161 phys_addr_t pstart, pend;
162 dma_addr_t bstart, bend;
163
164 pstart = virt_to_phys(io_tlb_start);
165 pend = virt_to_phys(io_tlb_end);
166
167 bstart = swiotlb_phys_to_bus(pstart);
168 bend = swiotlb_phys_to_bus(pend);
169
170 printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
171 bytes >> 20, io_tlb_start, io_tlb_end);
172 if (pstart != bstart || pend != bend)
173 printk(KERN_INFO "software IO TLB at phys %#llx - %#llx"
174 " bus %#llx - %#llx\n",
175 (unsigned long long)pstart,
176 (unsigned long long)pend,
177 (unsigned long long)bstart,
178 (unsigned long long)bend);
179 else
180 printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
181 (unsigned long long)pstart,
182 (unsigned long long)pend);
183}
184
1da177e4
LT
185/*
186 * Statically reserve bounce buffer space and initialize bounce buffer data
17e5ad6c 187 * structures for the software IO TLB used to implement the DMA API.
1da177e4 188 */
563aaf06
JB
189void __init
190swiotlb_init_with_default_size(size_t default_size)
1da177e4 191{
563aaf06 192 unsigned long i, bytes;
1da177e4
LT
193
194 if (!io_tlb_nslabs) {
e8579e72 195 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
1da177e4
LT
196 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
197 }
198
563aaf06
JB
199 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
200
1da177e4
LT
201 /*
202 * Get IO TLB memory from the low pages
203 */
8c5df16b 204 io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs);
1da177e4
LT
205 if (!io_tlb_start)
206 panic("Cannot allocate SWIOTLB buffer");
563aaf06 207 io_tlb_end = io_tlb_start + bytes;
1da177e4
LT
208
209 /*
210 * Allocate and initialize the free list array. This array is used
211 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
212 * between io_tlb_start and io_tlb_end.
213 */
214 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
25667d67 215 for (i = 0; i < io_tlb_nslabs; i++)
1da177e4
LT
216 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
217 io_tlb_index = 0;
ef9b1893 218 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(struct swiotlb_phys_addr));
1da177e4
LT
219
220 /*
221 * Get the overflow emergency buffer
222 */
223 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
563aaf06
JB
224 if (!io_tlb_overflow_buffer)
225 panic("Cannot allocate SWIOTLB overflow buffer!\n");
226
2e5b2b86 227 swiotlb_print_info(bytes);
1da177e4
LT
228}
229
563aaf06
JB
230void __init
231swiotlb_init(void)
1da177e4 232{
25667d67 233 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
1da177e4
LT
234}
235
0b9afede
AW
236/*
237 * Systems with larger DMA zones (those that don't support ISA) can
238 * initialize the swiotlb later using the slab allocator if needed.
239 * This should be just like above, but with some error catching.
240 */
241int
563aaf06 242swiotlb_late_init_with_default_size(size_t default_size)
0b9afede 243{
563aaf06 244 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
0b9afede
AW
245 unsigned int order;
246
247 if (!io_tlb_nslabs) {
248 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
249 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
250 }
251
252 /*
253 * Get IO TLB memory from the low pages
254 */
563aaf06 255 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
0b9afede 256 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 257 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede
AW
258
259 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
8c5df16b 260 io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs);
0b9afede
AW
261 if (io_tlb_start)
262 break;
263 order--;
264 }
265
266 if (!io_tlb_start)
267 goto cleanup1;
268
563aaf06 269 if (order != get_order(bytes)) {
0b9afede
AW
270 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
271 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
272 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 273 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede 274 }
563aaf06
JB
275 io_tlb_end = io_tlb_start + bytes;
276 memset(io_tlb_start, 0, bytes);
0b9afede
AW
277
278 /*
279 * Allocate and initialize the free list array. This array is used
280 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
281 * between io_tlb_start and io_tlb_end.
282 */
283 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
284 get_order(io_tlb_nslabs * sizeof(int)));
285 if (!io_tlb_list)
286 goto cleanup2;
287
288 for (i = 0; i < io_tlb_nslabs; i++)
289 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
290 io_tlb_index = 0;
291
ef9b1893
JF
292 io_tlb_orig_addr = (struct swiotlb_phys_addr *)__get_free_pages(GFP_KERNEL,
293 get_order(io_tlb_nslabs * sizeof(struct swiotlb_phys_addr)));
0b9afede
AW
294 if (!io_tlb_orig_addr)
295 goto cleanup3;
296
ef9b1893 297 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(struct swiotlb_phys_addr));
0b9afede
AW
298
299 /*
300 * Get the overflow emergency buffer
301 */
302 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
303 get_order(io_tlb_overflow));
304 if (!io_tlb_overflow_buffer)
305 goto cleanup4;
306
2e5b2b86 307 swiotlb_print_info(bytes);
0b9afede
AW
308
309 return 0;
310
311cleanup4:
25667d67
TL
312 free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
313 sizeof(char *)));
0b9afede
AW
314 io_tlb_orig_addr = NULL;
315cleanup3:
25667d67
TL
316 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
317 sizeof(int)));
0b9afede 318 io_tlb_list = NULL;
0b9afede 319cleanup2:
563aaf06 320 io_tlb_end = NULL;
0b9afede
AW
321 free_pages((unsigned long)io_tlb_start, order);
322 io_tlb_start = NULL;
323cleanup1:
324 io_tlb_nslabs = req_nslabs;
325 return -ENOMEM;
326}
327
be6b0267 328static int
2797982e 329address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
1da177e4 330{
07a2c01a 331 return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
1da177e4
LT
332}
333
b81ea27b
IC
334static inline int range_needs_mapping(void *ptr, size_t size)
335{
336 return swiotlb_force || swiotlb_arch_range_needs_mapping(ptr, size);
337}
338
640aebfe
FT
339static int is_swiotlb_buffer(char *addr)
340{
341 return addr >= io_tlb_start && addr < io_tlb_end;
342}
343
ef9b1893 344static struct swiotlb_phys_addr swiotlb_bus_to_phys_addr(char *dma_addr)
1b548f66 345{
ef9b1893
JF
346 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
347 struct swiotlb_phys_addr buffer = io_tlb_orig_addr[index];
348 buffer.offset += (long)dma_addr & ((1 << IO_TLB_SHIFT) - 1);
349 buffer.page += buffer.offset >> PAGE_SHIFT;
350 buffer.offset &= PAGE_SIZE - 1;
351 return buffer;
352}
353
354static void
355__sync_single(struct swiotlb_phys_addr buffer, char *dma_addr, size_t size, int dir)
356{
357 if (PageHighMem(buffer.page)) {
358 size_t len, bytes;
359 char *dev, *host, *kmp;
360
361 len = size;
362 while (len != 0) {
363 unsigned long flags;
364
365 bytes = len;
366 if ((bytes + buffer.offset) > PAGE_SIZE)
367 bytes = PAGE_SIZE - buffer.offset;
368 local_irq_save(flags); /* protects KM_BOUNCE_READ */
369 kmp = kmap_atomic(buffer.page, KM_BOUNCE_READ);
370 dev = dma_addr + size - len;
371 host = kmp + buffer.offset;
372 if (dir == DMA_FROM_DEVICE)
373 memcpy(host, dev, bytes);
374 else
375 memcpy(dev, host, bytes);
376 kunmap_atomic(kmp, KM_BOUNCE_READ);
377 local_irq_restore(flags);
378 len -= bytes;
379 buffer.page++;
380 buffer.offset = 0;
381 }
382 } else {
383 void *v = page_address(buffer.page) + buffer.offset;
384
385 if (dir == DMA_TO_DEVICE)
386 memcpy(dma_addr, v, size);
387 else
388 memcpy(v, dma_addr, size);
389 }
1b548f66
JF
390}
391
1da177e4
LT
392/*
393 * Allocates bounce buffer and returns its kernel virtual address.
394 */
395static void *
ef9b1893 396map_single(struct device *hwdev, struct swiotlb_phys_addr buffer, size_t size, int dir)
1da177e4
LT
397{
398 unsigned long flags;
399 char *dma_addr;
400 unsigned int nslots, stride, index, wrap;
401 int i;
681cc5cd
FT
402 unsigned long start_dma_addr;
403 unsigned long mask;
404 unsigned long offset_slots;
405 unsigned long max_slots;
ef9b1893 406 struct swiotlb_phys_addr slot_buf;
681cc5cd
FT
407
408 mask = dma_get_seg_boundary(hwdev);
e08e1f7a 409 start_dma_addr = swiotlb_virt_to_bus(io_tlb_start) & mask;
681cc5cd
FT
410
411 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
a5ddde4a
IC
412
413 /*
414 * Carefully handle integer overflow which can occur when mask == ~0UL.
415 */
b15a3891
JB
416 max_slots = mask + 1
417 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
418 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
1da177e4
LT
419
420 /*
421 * For mappings greater than a page, we limit the stride (and
422 * hence alignment) to a page size.
423 */
424 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
425 if (size > PAGE_SIZE)
426 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
427 else
428 stride = 1;
429
34814545 430 BUG_ON(!nslots);
1da177e4
LT
431
432 /*
433 * Find suitable number of IO TLB entries size that will fit this
434 * request and allocate a buffer from that IO TLB pool.
435 */
436 spin_lock_irqsave(&io_tlb_lock, flags);
a7133a15
AM
437 index = ALIGN(io_tlb_index, stride);
438 if (index >= io_tlb_nslabs)
439 index = 0;
440 wrap = index;
441
442 do {
a8522509
FT
443 while (iommu_is_span_boundary(index, nslots, offset_slots,
444 max_slots)) {
b15a3891
JB
445 index += stride;
446 if (index >= io_tlb_nslabs)
447 index = 0;
a7133a15
AM
448 if (index == wrap)
449 goto not_found;
450 }
451
452 /*
453 * If we find a slot that indicates we have 'nslots' number of
454 * contiguous buffers, we allocate the buffers from that slot
455 * and mark the entries as '0' indicating unavailable.
456 */
457 if (io_tlb_list[index] >= nslots) {
458 int count = 0;
459
460 for (i = index; i < (int) (index + nslots); i++)
461 io_tlb_list[i] = 0;
462 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
463 io_tlb_list[i] = ++count;
464 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
1da177e4 465
a7133a15
AM
466 /*
467 * Update the indices to avoid searching in the next
468 * round.
469 */
470 io_tlb_index = ((index + nslots) < io_tlb_nslabs
471 ? (index + nslots) : 0);
472
473 goto found;
474 }
475 index += stride;
476 if (index >= io_tlb_nslabs)
477 index = 0;
478 } while (index != wrap);
479
480not_found:
481 spin_unlock_irqrestore(&io_tlb_lock, flags);
482 return NULL;
483found:
1da177e4
LT
484 spin_unlock_irqrestore(&io_tlb_lock, flags);
485
486 /*
487 * Save away the mapping from the original address to the DMA address.
488 * This is needed when we sync the memory. Then we sync the buffer if
489 * needed.
490 */
ef9b1893
JF
491 slot_buf = buffer;
492 for (i = 0; i < nslots; i++) {
493 slot_buf.page += slot_buf.offset >> PAGE_SHIFT;
494 slot_buf.offset &= PAGE_SIZE - 1;
495 io_tlb_orig_addr[index+i] = slot_buf;
496 slot_buf.offset += 1 << IO_TLB_SHIFT;
497 }
1da177e4 498 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
1b548f66 499 __sync_single(buffer, dma_addr, size, DMA_TO_DEVICE);
1da177e4
LT
500
501 return dma_addr;
502}
503
504/*
505 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
506 */
507static void
508unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
509{
510 unsigned long flags;
511 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
512 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
ef9b1893 513 struct swiotlb_phys_addr buffer = swiotlb_bus_to_phys_addr(dma_addr);
1da177e4
LT
514
515 /*
516 * First, sync the memory before unmapping the entry
517 */
ef9b1893 518 if ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))
1da177e4
LT
519 /*
520 * bounce... copy the data back into the original buffer * and
521 * delete the bounce buffer.
522 */
1b548f66 523 __sync_single(buffer, dma_addr, size, DMA_FROM_DEVICE);
1da177e4
LT
524
525 /*
526 * Return the buffer to the free list by setting the corresponding
527 * entries to indicate the number of contigous entries available.
528 * While returning the entries to the free list, we merge the entries
529 * with slots below and above the pool being returned.
530 */
531 spin_lock_irqsave(&io_tlb_lock, flags);
532 {
533 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
534 io_tlb_list[index + nslots] : 0);
535 /*
536 * Step 1: return the slots to the free list, merging the
537 * slots with superceeding slots
538 */
539 for (i = index + nslots - 1; i >= index; i--)
540 io_tlb_list[i] = ++count;
541 /*
542 * Step 2: merge the returned slots with the preceding slots,
543 * if available (non zero)
544 */
545 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
546 io_tlb_list[i] = ++count;
547 }
548 spin_unlock_irqrestore(&io_tlb_lock, flags);
549}
550
551static void
de69e0f0
JL
552sync_single(struct device *hwdev, char *dma_addr, size_t size,
553 int dir, int target)
1da177e4 554{
ef9b1893 555 struct swiotlb_phys_addr buffer = swiotlb_bus_to_phys_addr(dma_addr);
df336d1c 556
de69e0f0
JL
557 switch (target) {
558 case SYNC_FOR_CPU:
559 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
1b548f66 560 __sync_single(buffer, dma_addr, size, DMA_FROM_DEVICE);
34814545
ES
561 else
562 BUG_ON(dir != DMA_TO_DEVICE);
de69e0f0
JL
563 break;
564 case SYNC_FOR_DEVICE:
565 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
1b548f66 566 __sync_single(buffer, dma_addr, size, DMA_TO_DEVICE);
34814545
ES
567 else
568 BUG_ON(dir != DMA_FROM_DEVICE);
de69e0f0
JL
569 break;
570 default:
1da177e4 571 BUG();
de69e0f0 572 }
1da177e4
LT
573}
574
575void *
576swiotlb_alloc_coherent(struct device *hwdev, size_t size,
06a54497 577 dma_addr_t *dma_handle, gfp_t flags)
1da177e4 578{
563aaf06 579 dma_addr_t dev_addr;
1da177e4
LT
580 void *ret;
581 int order = get_order(size);
1e74f300
FT
582 u64 dma_mask = DMA_32BIT_MASK;
583
584 if (hwdev && hwdev->coherent_dma_mask)
585 dma_mask = hwdev->coherent_dma_mask;
1da177e4 586
25667d67 587 ret = (void *)__get_free_pages(flags, order);
e08e1f7a 588 if (ret && !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(ret), size)) {
1da177e4
LT
589 /*
590 * The allocated memory isn't reachable by the device.
591 * Fall back on swiotlb_map_single().
592 */
593 free_pages((unsigned long) ret, order);
594 ret = NULL;
595 }
596 if (!ret) {
597 /*
598 * We are either out of memory or the device can't DMA
599 * to GFP_DMA memory; fall back on
600 * swiotlb_map_single(), which will grab memory from
601 * the lowest available address range.
602 */
ef9b1893
JF
603 struct swiotlb_phys_addr buffer;
604 buffer.page = virt_to_page(NULL);
605 buffer.offset = 0;
606 ret = map_single(hwdev, buffer, size, DMA_FROM_DEVICE);
9dfda12b 607 if (!ret)
1da177e4 608 return NULL;
1da177e4
LT
609 }
610
611 memset(ret, 0, size);
e08e1f7a 612 dev_addr = swiotlb_virt_to_bus(ret);
1da177e4
LT
613
614 /* Confirm address can be DMA'd by device */
1e74f300 615 if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) {
563aaf06 616 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
1e74f300 617 (unsigned long long)dma_mask,
563aaf06 618 (unsigned long long)dev_addr);
a2b89b59
FT
619
620 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
621 unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
622 return NULL;
1da177e4
LT
623 }
624 *dma_handle = dev_addr;
625 return ret;
626}
627
628void
629swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
630 dma_addr_t dma_handle)
631{
aa24886e 632 WARN_ON(irqs_disabled());
640aebfe 633 if (!is_swiotlb_buffer(vaddr))
1da177e4
LT
634 free_pages((unsigned long) vaddr, get_order(size));
635 else
636 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
21f6c4de 637 unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
1da177e4
LT
638}
639
640static void
641swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
642{
643 /*
644 * Ran out of IOMMU space for this operation. This is very bad.
645 * Unfortunately the drivers cannot handle this operation properly.
17e5ad6c 646 * unless they check for dma_mapping_error (most don't)
1da177e4
LT
647 * When the mapping is small enough return a static buffer to limit
648 * the damage, or panic when the transfer is too big.
649 */
563aaf06 650 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
1da177e4
LT
651 "device %s\n", size, dev ? dev->bus_id : "?");
652
653 if (size > io_tlb_overflow && do_panic) {
17e5ad6c
TL
654 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
655 panic("DMA: Memory would be corrupted\n");
656 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
657 panic("DMA: Random memory would be DMAed\n");
1da177e4
LT
658 }
659}
660
661/*
662 * Map a single buffer of the indicated size for DMA in streaming mode. The
17e5ad6c 663 * physical address to use is returned.
1da177e4
LT
664 *
665 * Once the device is given the dma address, the device owns this memory until
666 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
667 */
668dma_addr_t
309df0c5
AK
669swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size,
670 int dir, struct dma_attrs *attrs)
1da177e4 671{
e08e1f7a 672 dma_addr_t dev_addr = swiotlb_virt_to_bus(ptr);
1da177e4 673 void *map;
ef9b1893 674 struct swiotlb_phys_addr buffer;
1da177e4 675
34814545 676 BUG_ON(dir == DMA_NONE);
1da177e4
LT
677 /*
678 * If the pointer passed in happens to be in the device's DMA window,
679 * we can safely return the device addr and not worry about bounce
680 * buffering it.
681 */
b81ea27b
IC
682 if (!address_needs_mapping(hwdev, dev_addr, size) &&
683 !range_needs_mapping(ptr, size))
1da177e4
LT
684 return dev_addr;
685
686 /*
687 * Oh well, have to allocate and map a bounce buffer.
688 */
ef9b1893
JF
689 buffer.page = virt_to_page(ptr);
690 buffer.offset = (unsigned long)ptr & ~PAGE_MASK;
691 map = map_single(hwdev, buffer, size, dir);
1da177e4
LT
692 if (!map) {
693 swiotlb_full(hwdev, size, dir, 1);
694 map = io_tlb_overflow_buffer;
695 }
696
e08e1f7a 697 dev_addr = swiotlb_virt_to_bus(map);
1da177e4
LT
698
699 /*
700 * Ensure that the address returned is DMA'ble
701 */
2797982e 702 if (address_needs_mapping(hwdev, dev_addr, size))
1da177e4
LT
703 panic("map_single: bounce buffer is not DMA'ble");
704
705 return dev_addr;
706}
309df0c5
AK
707EXPORT_SYMBOL(swiotlb_map_single_attrs);
708
709dma_addr_t
710swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
711{
712 return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL);
713}
1da177e4 714
1da177e4
LT
715/*
716 * Unmap a single streaming mode DMA translation. The dma_addr and size must
717 * match what was provided for in a previous swiotlb_map_single call. All
718 * other usages are undefined.
719 *
720 * After this call, reads by the cpu to the buffer are guaranteed to see
721 * whatever the device wrote there.
722 */
723void
309df0c5
AK
724swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr,
725 size_t size, int dir, struct dma_attrs *attrs)
1da177e4 726{
e08e1f7a 727 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
1da177e4 728
34814545 729 BUG_ON(dir == DMA_NONE);
640aebfe 730 if (is_swiotlb_buffer(dma_addr))
1da177e4
LT
731 unmap_single(hwdev, dma_addr, size, dir);
732 else if (dir == DMA_FROM_DEVICE)
cde14bbf 733 dma_mark_clean(dma_addr, size);
1da177e4 734}
309df0c5 735EXPORT_SYMBOL(swiotlb_unmap_single_attrs);
1da177e4 736
309df0c5
AK
737void
738swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
739 int dir)
740{
741 return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL);
742}
1da177e4
LT
743/*
744 * Make physical memory consistent for a single streaming mode DMA translation
745 * after a transfer.
746 *
747 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
17e5ad6c
TL
748 * using the cpu, yet do not wish to teardown the dma mapping, you must
749 * call this function before doing so. At the next point you give the dma
1da177e4
LT
750 * address back to the card, you must first perform a
751 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
752 */
be6b0267 753static void
8270f3f1 754swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0 755 size_t size, int dir, int target)
1da177e4 756{
e08e1f7a 757 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
1da177e4 758
34814545 759 BUG_ON(dir == DMA_NONE);
640aebfe 760 if (is_swiotlb_buffer(dma_addr))
de69e0f0 761 sync_single(hwdev, dma_addr, size, dir, target);
1da177e4 762 else if (dir == DMA_FROM_DEVICE)
cde14bbf 763 dma_mark_clean(dma_addr, size);
1da177e4
LT
764}
765
8270f3f1
JL
766void
767swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
768 size_t size, int dir)
769{
de69e0f0 770 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
8270f3f1
JL
771}
772
1da177e4
LT
773void
774swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
775 size_t size, int dir)
776{
de69e0f0 777 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
1da177e4
LT
778}
779
878a97cf
JL
780/*
781 * Same as above, but for a sub-range of the mapping.
782 */
be6b0267 783static void
878a97cf 784swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0
JL
785 unsigned long offset, size_t size,
786 int dir, int target)
878a97cf 787{
e08e1f7a 788 char *dma_addr = swiotlb_bus_to_virt(dev_addr) + offset;
878a97cf 789
34814545 790 BUG_ON(dir == DMA_NONE);
640aebfe 791 if (is_swiotlb_buffer(dma_addr))
de69e0f0 792 sync_single(hwdev, dma_addr, size, dir, target);
878a97cf 793 else if (dir == DMA_FROM_DEVICE)
cde14bbf 794 dma_mark_clean(dma_addr, size);
878a97cf
JL
795}
796
797void
798swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
799 unsigned long offset, size_t size, int dir)
800{
de69e0f0
JL
801 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
802 SYNC_FOR_CPU);
878a97cf
JL
803}
804
805void
806swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
807 unsigned long offset, size_t size, int dir)
808{
de69e0f0
JL
809 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
810 SYNC_FOR_DEVICE);
878a97cf
JL
811}
812
309df0c5
AK
813void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int,
814 struct dma_attrs *);
1da177e4
LT
815/*
816 * Map a set of buffers described by scatterlist in streaming mode for DMA.
817 * This is the scatter-gather version of the above swiotlb_map_single
818 * interface. Here the scatter gather list elements are each tagged with the
819 * appropriate dma address and length. They are obtained via
820 * sg_dma_{address,length}(SG).
821 *
822 * NOTE: An implementation may be able to use a smaller number of
823 * DMA address/length pairs than there are SG table elements.
824 * (for example via virtual mapping capabilities)
825 * The routine returns the number of addr/length pairs actually
826 * used, at most nents.
827 *
828 * Device ownership issues as mentioned above for swiotlb_map_single are the
829 * same here.
830 */
831int
309df0c5
AK
832swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
833 int dir, struct dma_attrs *attrs)
1da177e4 834{
dbfd49fe 835 struct scatterlist *sg;
ef9b1893 836 struct swiotlb_phys_addr buffer;
563aaf06 837 dma_addr_t dev_addr;
1da177e4
LT
838 int i;
839
34814545 840 BUG_ON(dir == DMA_NONE);
1da177e4 841
dbfd49fe 842 for_each_sg(sgl, sg, nelems, i) {
ef9b1893 843 dev_addr = swiotlb_sg_to_bus(sg);
b81ea27b 844 if (range_needs_mapping(sg_virt(sg), sg->length) ||
2797982e 845 address_needs_mapping(hwdev, dev_addr, sg->length)) {
ef9b1893
JF
846 void *map;
847 buffer.page = sg_page(sg);
848 buffer.offset = sg->offset;
849 map = map_single(hwdev, buffer, sg->length, dir);
7e870233 850 if (!map) {
1da177e4
LT
851 /* Don't panic here, we expect map_sg users
852 to do proper error handling. */
853 swiotlb_full(hwdev, sg->length, dir, 0);
309df0c5
AK
854 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
855 attrs);
dbfd49fe 856 sgl[0].dma_length = 0;
1da177e4
LT
857 return 0;
858 }
e08e1f7a 859 sg->dma_address = swiotlb_virt_to_bus(map);
1da177e4
LT
860 } else
861 sg->dma_address = dev_addr;
862 sg->dma_length = sg->length;
863 }
864 return nelems;
865}
309df0c5
AK
866EXPORT_SYMBOL(swiotlb_map_sg_attrs);
867
868int
869swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
870 int dir)
871{
872 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
873}
1da177e4
LT
874
875/*
876 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
877 * concerning calls here are the same as for swiotlb_unmap_single() above.
878 */
879void
309df0c5
AK
880swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
881 int nelems, int dir, struct dma_attrs *attrs)
1da177e4 882{
dbfd49fe 883 struct scatterlist *sg;
1da177e4
LT
884 int i;
885
34814545 886 BUG_ON(dir == DMA_NONE);
1da177e4 887
dbfd49fe 888 for_each_sg(sgl, sg, nelems, i) {
ef9b1893 889 if (sg->dma_address != swiotlb_sg_to_bus(sg))
e08e1f7a 890 unmap_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
93fbff63 891 sg->dma_length, dir);
1da177e4 892 else if (dir == DMA_FROM_DEVICE)
ef9b1893 893 dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length);
dbfd49fe 894 }
1da177e4 895}
309df0c5
AK
896EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
897
898void
899swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
900 int dir)
901{
902 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
903}
1da177e4
LT
904
905/*
906 * Make physical memory consistent for a set of streaming mode DMA translations
907 * after a transfer.
908 *
909 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
910 * and usage.
911 */
be6b0267 912static void
dbfd49fe 913swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
de69e0f0 914 int nelems, int dir, int target)
1da177e4 915{
dbfd49fe 916 struct scatterlist *sg;
1da177e4
LT
917 int i;
918
34814545 919 BUG_ON(dir == DMA_NONE);
1da177e4 920
dbfd49fe 921 for_each_sg(sgl, sg, nelems, i) {
ef9b1893 922 if (sg->dma_address != swiotlb_sg_to_bus(sg))
e08e1f7a 923 sync_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
de69e0f0 924 sg->dma_length, dir, target);
cde14bbf 925 else if (dir == DMA_FROM_DEVICE)
ef9b1893 926 dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length);
dbfd49fe 927 }
1da177e4
LT
928}
929
8270f3f1
JL
930void
931swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
932 int nelems, int dir)
933{
de69e0f0 934 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
8270f3f1
JL
935}
936
1da177e4
LT
937void
938swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
939 int nelems, int dir)
940{
de69e0f0 941 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
1da177e4
LT
942}
943
944int
8d8bb39b 945swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
1da177e4 946{
e08e1f7a 947 return (dma_addr == swiotlb_virt_to_bus(io_tlb_overflow_buffer));
1da177e4
LT
948}
949
950/*
17e5ad6c 951 * Return whether the given device DMA address mask can be supported
1da177e4 952 * properly. For example, if your device can only drive the low 24-bits
17e5ad6c 953 * during bus mastering, then you would pass 0x00ffffff as the mask to
1da177e4
LT
954 * this function.
955 */
956int
563aaf06 957swiotlb_dma_supported(struct device *hwdev, u64 mask)
1da177e4 958{
e08e1f7a 959 return swiotlb_virt_to_bus(io_tlb_end - 1) <= mask;
1da177e4
LT
960}
961
1da177e4
LT
962EXPORT_SYMBOL(swiotlb_map_single);
963EXPORT_SYMBOL(swiotlb_unmap_single);
964EXPORT_SYMBOL(swiotlb_map_sg);
965EXPORT_SYMBOL(swiotlb_unmap_sg);
966EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
967EXPORT_SYMBOL(swiotlb_sync_single_for_device);
878a97cf
JL
968EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
969EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
1da177e4
LT
970EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
971EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
972EXPORT_SYMBOL(swiotlb_dma_mapping_error);
25667d67
TL
973EXPORT_SYMBOL(swiotlb_alloc_coherent);
974EXPORT_SYMBOL(swiotlb_free_coherent);
1da177e4 975EXPORT_SYMBOL(swiotlb_dma_supported);