Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Dynamic DMA mapping support. | |
3 | * | |
563aaf06 | 4 | * This implementation is a fallback for platforms that do not support |
1da177e4 LT |
5 | * I/O TLBs (aka DMA address translation hardware). |
6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | |
7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | |
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
9 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
10 | * | |
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
13 | * unnecessary i-cache flushing. | |
569c8bf5 JL |
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. |
15 | * 05/09/10 linville Add support for syncing ranges, support syncing for | |
16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. | |
fb05a379 | 17 | * 08/12/11 beckyb Add highmem support |
1da177e4 LT |
18 | */ |
19 | ||
20 | #include <linux/cache.h> | |
17e5ad6c | 21 | #include <linux/dma-mapping.h> |
1da177e4 LT |
22 | #include <linux/mm.h> |
23 | #include <linux/module.h> | |
1da177e4 LT |
24 | #include <linux/spinlock.h> |
25 | #include <linux/string.h> | |
0016fdee | 26 | #include <linux/swiotlb.h> |
fb05a379 | 27 | #include <linux/pfn.h> |
1da177e4 LT |
28 | #include <linux/types.h> |
29 | #include <linux/ctype.h> | |
ef9b1893 | 30 | #include <linux/highmem.h> |
1da177e4 LT |
31 | |
32 | #include <asm/io.h> | |
1da177e4 | 33 | #include <asm/dma.h> |
17e5ad6c | 34 | #include <asm/scatterlist.h> |
1da177e4 LT |
35 | |
36 | #include <linux/init.h> | |
37 | #include <linux/bootmem.h> | |
a8522509 | 38 | #include <linux/iommu-helper.h> |
1da177e4 LT |
39 | |
40 | #define OFFSET(val,align) ((unsigned long) \ | |
41 | ( (val) & ( (align) - 1))) | |
42 | ||
0b9afede AW |
43 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) |
44 | ||
45 | /* | |
46 | * Minimum IO TLB size to bother booting with. Systems with mainly | |
47 | * 64bit capable cards will only lightly use the swiotlb. If we can't | |
48 | * allocate a contiguous 1MB, we're probably in trouble anyway. | |
49 | */ | |
50 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
51 | ||
de69e0f0 JL |
52 | /* |
53 | * Enumeration for sync targets | |
54 | */ | |
55 | enum dma_sync_target { | |
56 | SYNC_FOR_CPU = 0, | |
57 | SYNC_FOR_DEVICE = 1, | |
58 | }; | |
59 | ||
1da177e4 LT |
60 | int swiotlb_force; |
61 | ||
62 | /* | |
ceb5ac32 BB |
63 | * Used to do a quick range check in unmap_single and |
64 | * sync_single_*, to see if the memory was in fact allocated by this | |
1da177e4 LT |
65 | * API. |
66 | */ | |
67 | static char *io_tlb_start, *io_tlb_end; | |
68 | ||
69 | /* | |
70 | * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and | |
71 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. | |
72 | */ | |
73 | static unsigned long io_tlb_nslabs; | |
74 | ||
75 | /* | |
76 | * When the IOMMU overflows we return a fallback buffer. This sets the size. | |
77 | */ | |
78 | static unsigned long io_tlb_overflow = 32*1024; | |
79 | ||
80 | void *io_tlb_overflow_buffer; | |
81 | ||
82 | /* | |
83 | * This is a free list describing the number of free entries available from | |
84 | * each index | |
85 | */ | |
86 | static unsigned int *io_tlb_list; | |
87 | static unsigned int io_tlb_index; | |
88 | ||
89 | /* | |
90 | * We need to save away the original address corresponding to a mapped entry | |
91 | * for the sync operations. | |
92 | */ | |
bc40ac66 | 93 | static phys_addr_t *io_tlb_orig_addr; |
1da177e4 LT |
94 | |
95 | /* | |
96 | * Protect the above data structures in the map and unmap calls | |
97 | */ | |
98 | static DEFINE_SPINLOCK(io_tlb_lock); | |
99 | ||
100 | static int __init | |
101 | setup_io_tlb_npages(char *str) | |
102 | { | |
103 | if (isdigit(*str)) { | |
e8579e72 | 104 | io_tlb_nslabs = simple_strtoul(str, &str, 0); |
1da177e4 LT |
105 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ |
106 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
107 | } | |
108 | if (*str == ',') | |
109 | ++str; | |
110 | if (!strcmp(str, "force")) | |
111 | swiotlb_force = 1; | |
112 | return 1; | |
113 | } | |
114 | __setup("swiotlb=", setup_io_tlb_npages); | |
115 | /* make io_tlb_overflow tunable too? */ | |
116 | ||
70a7d3cc | 117 | dma_addr_t __weak swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr) |
e08e1f7a IC |
118 | { |
119 | return paddr; | |
120 | } | |
121 | ||
42d7c5e3 | 122 | phys_addr_t __weak swiotlb_bus_to_phys(struct device *hwdev, dma_addr_t baddr) |
e08e1f7a IC |
123 | { |
124 | return baddr; | |
125 | } | |
126 | ||
02ca646e | 127 | /* Note that this doesn't work with highmem page */ |
70a7d3cc JF |
128 | static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev, |
129 | volatile void *address) | |
e08e1f7a | 130 | { |
70a7d3cc | 131 | return swiotlb_phys_to_bus(hwdev, virt_to_phys(address)); |
e08e1f7a IC |
132 | } |
133 | ||
ef5722f6 BB |
134 | int __weak swiotlb_arch_address_needs_mapping(struct device *hwdev, |
135 | dma_addr_t addr, size_t size) | |
136 | { | |
137 | return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size); | |
138 | } | |
139 | ||
2e5b2b86 IC |
140 | static void swiotlb_print_info(unsigned long bytes) |
141 | { | |
142 | phys_addr_t pstart, pend; | |
2e5b2b86 IC |
143 | |
144 | pstart = virt_to_phys(io_tlb_start); | |
145 | pend = virt_to_phys(io_tlb_end); | |
146 | ||
2e5b2b86 IC |
147 | printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n", |
148 | bytes >> 20, io_tlb_start, io_tlb_end); | |
70a7d3cc JF |
149 | printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n", |
150 | (unsigned long long)pstart, | |
151 | (unsigned long long)pend); | |
2e5b2b86 IC |
152 | } |
153 | ||
1da177e4 LT |
154 | /* |
155 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
17e5ad6c | 156 | * structures for the software IO TLB used to implement the DMA API. |
1da177e4 | 157 | */ |
563aaf06 JB |
158 | void __init |
159 | swiotlb_init_with_default_size(size_t default_size) | |
1da177e4 | 160 | { |
563aaf06 | 161 | unsigned long i, bytes; |
1da177e4 LT |
162 | |
163 | if (!io_tlb_nslabs) { | |
e8579e72 | 164 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); |
1da177e4 LT |
165 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); |
166 | } | |
167 | ||
563aaf06 JB |
168 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
169 | ||
1da177e4 LT |
170 | /* |
171 | * Get IO TLB memory from the low pages | |
172 | */ | |
3885123d | 173 | io_tlb_start = alloc_bootmem_low_pages(bytes); |
1da177e4 LT |
174 | if (!io_tlb_start) |
175 | panic("Cannot allocate SWIOTLB buffer"); | |
563aaf06 | 176 | io_tlb_end = io_tlb_start + bytes; |
1da177e4 LT |
177 | |
178 | /* | |
179 | * Allocate and initialize the free list array. This array is used | |
180 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
181 | * between io_tlb_start and io_tlb_end. | |
182 | */ | |
183 | io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int)); | |
25667d67 | 184 | for (i = 0; i < io_tlb_nslabs; i++) |
1da177e4 LT |
185 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); |
186 | io_tlb_index = 0; | |
bc40ac66 | 187 | io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t)); |
1da177e4 LT |
188 | |
189 | /* | |
190 | * Get the overflow emergency buffer | |
191 | */ | |
192 | io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow); | |
563aaf06 JB |
193 | if (!io_tlb_overflow_buffer) |
194 | panic("Cannot allocate SWIOTLB overflow buffer!\n"); | |
195 | ||
2e5b2b86 | 196 | swiotlb_print_info(bytes); |
1da177e4 LT |
197 | } |
198 | ||
563aaf06 JB |
199 | void __init |
200 | swiotlb_init(void) | |
1da177e4 | 201 | { |
25667d67 | 202 | swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */ |
1da177e4 LT |
203 | } |
204 | ||
0b9afede AW |
205 | /* |
206 | * Systems with larger DMA zones (those that don't support ISA) can | |
207 | * initialize the swiotlb later using the slab allocator if needed. | |
208 | * This should be just like above, but with some error catching. | |
209 | */ | |
210 | int | |
563aaf06 | 211 | swiotlb_late_init_with_default_size(size_t default_size) |
0b9afede | 212 | { |
563aaf06 | 213 | unsigned long i, bytes, req_nslabs = io_tlb_nslabs; |
0b9afede AW |
214 | unsigned int order; |
215 | ||
216 | if (!io_tlb_nslabs) { | |
217 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
218 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
219 | } | |
220 | ||
221 | /* | |
222 | * Get IO TLB memory from the low pages | |
223 | */ | |
563aaf06 | 224 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); |
0b9afede | 225 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
563aaf06 | 226 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede AW |
227 | |
228 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
bb52196b FT |
229 | io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, |
230 | order); | |
0b9afede AW |
231 | if (io_tlb_start) |
232 | break; | |
233 | order--; | |
234 | } | |
235 | ||
236 | if (!io_tlb_start) | |
237 | goto cleanup1; | |
238 | ||
563aaf06 | 239 | if (order != get_order(bytes)) { |
0b9afede AW |
240 | printk(KERN_WARNING "Warning: only able to allocate %ld MB " |
241 | "for software IO TLB\n", (PAGE_SIZE << order) >> 20); | |
242 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
563aaf06 | 243 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede | 244 | } |
563aaf06 JB |
245 | io_tlb_end = io_tlb_start + bytes; |
246 | memset(io_tlb_start, 0, bytes); | |
0b9afede AW |
247 | |
248 | /* | |
249 | * Allocate and initialize the free list array. This array is used | |
250 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
251 | * between io_tlb_start and io_tlb_end. | |
252 | */ | |
253 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | |
254 | get_order(io_tlb_nslabs * sizeof(int))); | |
255 | if (!io_tlb_list) | |
256 | goto cleanup2; | |
257 | ||
258 | for (i = 0; i < io_tlb_nslabs; i++) | |
259 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
260 | io_tlb_index = 0; | |
261 | ||
bc40ac66 BB |
262 | io_tlb_orig_addr = (phys_addr_t *) |
263 | __get_free_pages(GFP_KERNEL, | |
264 | get_order(io_tlb_nslabs * | |
265 | sizeof(phys_addr_t))); | |
0b9afede AW |
266 | if (!io_tlb_orig_addr) |
267 | goto cleanup3; | |
268 | ||
bc40ac66 | 269 | memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t)); |
0b9afede AW |
270 | |
271 | /* | |
272 | * Get the overflow emergency buffer | |
273 | */ | |
274 | io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA, | |
275 | get_order(io_tlb_overflow)); | |
276 | if (!io_tlb_overflow_buffer) | |
277 | goto cleanup4; | |
278 | ||
2e5b2b86 | 279 | swiotlb_print_info(bytes); |
0b9afede AW |
280 | |
281 | return 0; | |
282 | ||
283 | cleanup4: | |
bc40ac66 BB |
284 | free_pages((unsigned long)io_tlb_orig_addr, |
285 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); | |
0b9afede AW |
286 | io_tlb_orig_addr = NULL; |
287 | cleanup3: | |
25667d67 TL |
288 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * |
289 | sizeof(int))); | |
0b9afede | 290 | io_tlb_list = NULL; |
0b9afede | 291 | cleanup2: |
563aaf06 | 292 | io_tlb_end = NULL; |
0b9afede AW |
293 | free_pages((unsigned long)io_tlb_start, order); |
294 | io_tlb_start = NULL; | |
295 | cleanup1: | |
296 | io_tlb_nslabs = req_nslabs; | |
297 | return -ENOMEM; | |
298 | } | |
299 | ||
ef5722f6 | 300 | static inline int |
2797982e | 301 | address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size) |
1da177e4 | 302 | { |
ef5722f6 | 303 | return swiotlb_arch_address_needs_mapping(hwdev, addr, size); |
1da177e4 LT |
304 | } |
305 | ||
02ca646e | 306 | static int is_swiotlb_buffer(phys_addr_t paddr) |
640aebfe | 307 | { |
02ca646e FT |
308 | return paddr >= virt_to_phys(io_tlb_start) && |
309 | paddr < virt_to_phys(io_tlb_end); | |
640aebfe FT |
310 | } |
311 | ||
fb05a379 BB |
312 | /* |
313 | * Bounce: copy the swiotlb buffer back to the original dma location | |
314 | */ | |
315 | static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size, | |
316 | enum dma_data_direction dir) | |
317 | { | |
318 | unsigned long pfn = PFN_DOWN(phys); | |
319 | ||
320 | if (PageHighMem(pfn_to_page(pfn))) { | |
321 | /* The buffer does not have a mapping. Map it in and copy */ | |
322 | unsigned int offset = phys & ~PAGE_MASK; | |
323 | char *buffer; | |
324 | unsigned int sz = 0; | |
325 | unsigned long flags; | |
326 | ||
327 | while (size) { | |
67131ad0 | 328 | sz = min_t(size_t, PAGE_SIZE - offset, size); |
fb05a379 BB |
329 | |
330 | local_irq_save(flags); | |
331 | buffer = kmap_atomic(pfn_to_page(pfn), | |
332 | KM_BOUNCE_READ); | |
333 | if (dir == DMA_TO_DEVICE) | |
334 | memcpy(dma_addr, buffer + offset, sz); | |
ef9b1893 | 335 | else |
fb05a379 BB |
336 | memcpy(buffer + offset, dma_addr, sz); |
337 | kunmap_atomic(buffer, KM_BOUNCE_READ); | |
ef9b1893 | 338 | local_irq_restore(flags); |
fb05a379 BB |
339 | |
340 | size -= sz; | |
341 | pfn++; | |
342 | dma_addr += sz; | |
343 | offset = 0; | |
ef9b1893 JF |
344 | } |
345 | } else { | |
ef9b1893 | 346 | if (dir == DMA_TO_DEVICE) |
fb05a379 | 347 | memcpy(dma_addr, phys_to_virt(phys), size); |
ef9b1893 | 348 | else |
fb05a379 | 349 | memcpy(phys_to_virt(phys), dma_addr, size); |
ef9b1893 | 350 | } |
1b548f66 JF |
351 | } |
352 | ||
1da177e4 LT |
353 | /* |
354 | * Allocates bounce buffer and returns its kernel virtual address. | |
355 | */ | |
356 | static void * | |
bc40ac66 | 357 | map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir) |
1da177e4 LT |
358 | { |
359 | unsigned long flags; | |
360 | char *dma_addr; | |
361 | unsigned int nslots, stride, index, wrap; | |
362 | int i; | |
681cc5cd FT |
363 | unsigned long start_dma_addr; |
364 | unsigned long mask; | |
365 | unsigned long offset_slots; | |
366 | unsigned long max_slots; | |
367 | ||
368 | mask = dma_get_seg_boundary(hwdev); | |
70a7d3cc | 369 | start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask; |
681cc5cd FT |
370 | |
371 | offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
a5ddde4a IC |
372 | |
373 | /* | |
374 | * Carefully handle integer overflow which can occur when mask == ~0UL. | |
375 | */ | |
b15a3891 JB |
376 | max_slots = mask + 1 |
377 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT | |
378 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); | |
1da177e4 LT |
379 | |
380 | /* | |
381 | * For mappings greater than a page, we limit the stride (and | |
382 | * hence alignment) to a page size. | |
383 | */ | |
384 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
385 | if (size > PAGE_SIZE) | |
386 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); | |
387 | else | |
388 | stride = 1; | |
389 | ||
34814545 | 390 | BUG_ON(!nslots); |
1da177e4 LT |
391 | |
392 | /* | |
393 | * Find suitable number of IO TLB entries size that will fit this | |
394 | * request and allocate a buffer from that IO TLB pool. | |
395 | */ | |
396 | spin_lock_irqsave(&io_tlb_lock, flags); | |
a7133a15 AM |
397 | index = ALIGN(io_tlb_index, stride); |
398 | if (index >= io_tlb_nslabs) | |
399 | index = 0; | |
400 | wrap = index; | |
401 | ||
402 | do { | |
a8522509 FT |
403 | while (iommu_is_span_boundary(index, nslots, offset_slots, |
404 | max_slots)) { | |
b15a3891 JB |
405 | index += stride; |
406 | if (index >= io_tlb_nslabs) | |
407 | index = 0; | |
a7133a15 AM |
408 | if (index == wrap) |
409 | goto not_found; | |
410 | } | |
411 | ||
412 | /* | |
413 | * If we find a slot that indicates we have 'nslots' number of | |
414 | * contiguous buffers, we allocate the buffers from that slot | |
415 | * and mark the entries as '0' indicating unavailable. | |
416 | */ | |
417 | if (io_tlb_list[index] >= nslots) { | |
418 | int count = 0; | |
419 | ||
420 | for (i = index; i < (int) (index + nslots); i++) | |
421 | io_tlb_list[i] = 0; | |
422 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) | |
423 | io_tlb_list[i] = ++count; | |
424 | dma_addr = io_tlb_start + (index << IO_TLB_SHIFT); | |
1da177e4 | 425 | |
a7133a15 AM |
426 | /* |
427 | * Update the indices to avoid searching in the next | |
428 | * round. | |
429 | */ | |
430 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | |
431 | ? (index + nslots) : 0); | |
432 | ||
433 | goto found; | |
434 | } | |
435 | index += stride; | |
436 | if (index >= io_tlb_nslabs) | |
437 | index = 0; | |
438 | } while (index != wrap); | |
439 | ||
440 | not_found: | |
441 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
442 | return NULL; | |
443 | found: | |
1da177e4 LT |
444 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
445 | ||
446 | /* | |
447 | * Save away the mapping from the original address to the DMA address. | |
448 | * This is needed when we sync the memory. Then we sync the buffer if | |
449 | * needed. | |
450 | */ | |
bc40ac66 BB |
451 | for (i = 0; i < nslots; i++) |
452 | io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT); | |
1da177e4 | 453 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) |
fb05a379 | 454 | swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); |
1da177e4 LT |
455 | |
456 | return dma_addr; | |
457 | } | |
458 | ||
459 | /* | |
460 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. | |
461 | */ | |
462 | static void | |
7fcebbd2 | 463 | do_unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir) |
1da177e4 LT |
464 | { |
465 | unsigned long flags; | |
466 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
467 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
bc40ac66 | 468 | phys_addr_t phys = io_tlb_orig_addr[index]; |
1da177e4 LT |
469 | |
470 | /* | |
471 | * First, sync the memory before unmapping the entry | |
472 | */ | |
bc40ac66 | 473 | if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) |
fb05a379 | 474 | swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); |
1da177e4 LT |
475 | |
476 | /* | |
477 | * Return the buffer to the free list by setting the corresponding | |
478 | * entries to indicate the number of contigous entries available. | |
479 | * While returning the entries to the free list, we merge the entries | |
480 | * with slots below and above the pool being returned. | |
481 | */ | |
482 | spin_lock_irqsave(&io_tlb_lock, flags); | |
483 | { | |
484 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | |
485 | io_tlb_list[index + nslots] : 0); | |
486 | /* | |
487 | * Step 1: return the slots to the free list, merging the | |
488 | * slots with superceeding slots | |
489 | */ | |
490 | for (i = index + nslots - 1; i >= index; i--) | |
491 | io_tlb_list[i] = ++count; | |
492 | /* | |
493 | * Step 2: merge the returned slots with the preceding slots, | |
494 | * if available (non zero) | |
495 | */ | |
496 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
497 | io_tlb_list[i] = ++count; | |
498 | } | |
499 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
500 | } | |
501 | ||
502 | static void | |
de69e0f0 JL |
503 | sync_single(struct device *hwdev, char *dma_addr, size_t size, |
504 | int dir, int target) | |
1da177e4 | 505 | { |
bc40ac66 BB |
506 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; |
507 | phys_addr_t phys = io_tlb_orig_addr[index]; | |
508 | ||
509 | phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1)); | |
df336d1c | 510 | |
de69e0f0 JL |
511 | switch (target) { |
512 | case SYNC_FOR_CPU: | |
513 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
fb05a379 | 514 | swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); |
34814545 ES |
515 | else |
516 | BUG_ON(dir != DMA_TO_DEVICE); | |
de69e0f0 JL |
517 | break; |
518 | case SYNC_FOR_DEVICE: | |
519 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
fb05a379 | 520 | swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); |
34814545 ES |
521 | else |
522 | BUG_ON(dir != DMA_FROM_DEVICE); | |
de69e0f0 JL |
523 | break; |
524 | default: | |
1da177e4 | 525 | BUG(); |
de69e0f0 | 526 | } |
1da177e4 LT |
527 | } |
528 | ||
529 | void * | |
530 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, | |
06a54497 | 531 | dma_addr_t *dma_handle, gfp_t flags) |
1da177e4 | 532 | { |
563aaf06 | 533 | dma_addr_t dev_addr; |
1da177e4 LT |
534 | void *ret; |
535 | int order = get_order(size); | |
284901a9 | 536 | u64 dma_mask = DMA_BIT_MASK(32); |
1e74f300 FT |
537 | |
538 | if (hwdev && hwdev->coherent_dma_mask) | |
539 | dma_mask = hwdev->coherent_dma_mask; | |
1da177e4 | 540 | |
25667d67 | 541 | ret = (void *)__get_free_pages(flags, order); |
70a7d3cc JF |
542 | if (ret && |
543 | !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(hwdev, ret), | |
544 | size)) { | |
1da177e4 LT |
545 | /* |
546 | * The allocated memory isn't reachable by the device. | |
1da177e4 LT |
547 | */ |
548 | free_pages((unsigned long) ret, order); | |
549 | ret = NULL; | |
550 | } | |
551 | if (!ret) { | |
552 | /* | |
553 | * We are either out of memory or the device can't DMA | |
ceb5ac32 BB |
554 | * to GFP_DMA memory; fall back on map_single(), which |
555 | * will grab memory from the lowest available address range. | |
1da177e4 | 556 | */ |
bc40ac66 | 557 | ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE); |
9dfda12b | 558 | if (!ret) |
1da177e4 | 559 | return NULL; |
1da177e4 LT |
560 | } |
561 | ||
562 | memset(ret, 0, size); | |
70a7d3cc | 563 | dev_addr = swiotlb_virt_to_bus(hwdev, ret); |
1da177e4 LT |
564 | |
565 | /* Confirm address can be DMA'd by device */ | |
1e74f300 | 566 | if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) { |
563aaf06 | 567 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", |
1e74f300 | 568 | (unsigned long long)dma_mask, |
563aaf06 | 569 | (unsigned long long)dev_addr); |
a2b89b59 FT |
570 | |
571 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
7fcebbd2 | 572 | do_unmap_single(hwdev, ret, size, DMA_TO_DEVICE); |
a2b89b59 | 573 | return NULL; |
1da177e4 LT |
574 | } |
575 | *dma_handle = dev_addr; | |
576 | return ret; | |
577 | } | |
874d6a95 | 578 | EXPORT_SYMBOL(swiotlb_alloc_coherent); |
1da177e4 LT |
579 | |
580 | void | |
581 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | |
02ca646e | 582 | dma_addr_t dev_addr) |
1da177e4 | 583 | { |
02ca646e FT |
584 | phys_addr_t paddr = swiotlb_bus_to_phys(hwdev, dev_addr); |
585 | ||
aa24886e | 586 | WARN_ON(irqs_disabled()); |
02ca646e FT |
587 | if (!is_swiotlb_buffer(paddr)) |
588 | free_pages((unsigned long)vaddr, get_order(size)); | |
1da177e4 LT |
589 | else |
590 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
7fcebbd2 | 591 | do_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE); |
1da177e4 | 592 | } |
874d6a95 | 593 | EXPORT_SYMBOL(swiotlb_free_coherent); |
1da177e4 LT |
594 | |
595 | static void | |
596 | swiotlb_full(struct device *dev, size_t size, int dir, int do_panic) | |
597 | { | |
598 | /* | |
599 | * Ran out of IOMMU space for this operation. This is very bad. | |
600 | * Unfortunately the drivers cannot handle this operation properly. | |
17e5ad6c | 601 | * unless they check for dma_mapping_error (most don't) |
1da177e4 LT |
602 | * When the mapping is small enough return a static buffer to limit |
603 | * the damage, or panic when the transfer is too big. | |
604 | */ | |
563aaf06 | 605 | printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at " |
94b32486 | 606 | "device %s\n", size, dev ? dev_name(dev) : "?"); |
1da177e4 LT |
607 | |
608 | if (size > io_tlb_overflow && do_panic) { | |
17e5ad6c TL |
609 | if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) |
610 | panic("DMA: Memory would be corrupted\n"); | |
611 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) | |
612 | panic("DMA: Random memory would be DMAed\n"); | |
1da177e4 LT |
613 | } |
614 | } | |
615 | ||
616 | /* | |
617 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
17e5ad6c | 618 | * physical address to use is returned. |
1da177e4 LT |
619 | * |
620 | * Once the device is given the dma address, the device owns this memory until | |
ceb5ac32 | 621 | * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed. |
1da177e4 | 622 | */ |
f98eee8e FT |
623 | dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, |
624 | unsigned long offset, size_t size, | |
625 | enum dma_data_direction dir, | |
626 | struct dma_attrs *attrs) | |
1da177e4 | 627 | { |
f98eee8e | 628 | phys_addr_t phys = page_to_phys(page) + offset; |
f98eee8e | 629 | dma_addr_t dev_addr = swiotlb_phys_to_bus(dev, phys); |
1da177e4 LT |
630 | void *map; |
631 | ||
34814545 | 632 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 633 | /* |
ceb5ac32 | 634 | * If the address happens to be in the device's DMA window, |
1da177e4 LT |
635 | * we can safely return the device addr and not worry about bounce |
636 | * buffering it. | |
637 | */ | |
cf56e3f2 | 638 | if (!address_needs_mapping(dev, dev_addr, size) && !swiotlb_force) |
1da177e4 LT |
639 | return dev_addr; |
640 | ||
641 | /* | |
642 | * Oh well, have to allocate and map a bounce buffer. | |
643 | */ | |
f98eee8e | 644 | map = map_single(dev, phys, size, dir); |
1da177e4 | 645 | if (!map) { |
f98eee8e | 646 | swiotlb_full(dev, size, dir, 1); |
1da177e4 LT |
647 | map = io_tlb_overflow_buffer; |
648 | } | |
649 | ||
f98eee8e | 650 | dev_addr = swiotlb_virt_to_bus(dev, map); |
1da177e4 LT |
651 | |
652 | /* | |
653 | * Ensure that the address returned is DMA'ble | |
654 | */ | |
f98eee8e | 655 | if (address_needs_mapping(dev, dev_addr, size)) |
1da177e4 LT |
656 | panic("map_single: bounce buffer is not DMA'ble"); |
657 | ||
658 | return dev_addr; | |
659 | } | |
f98eee8e | 660 | EXPORT_SYMBOL_GPL(swiotlb_map_page); |
1da177e4 | 661 | |
1da177e4 LT |
662 | /* |
663 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
ceb5ac32 | 664 | * match what was provided for in a previous swiotlb_map_page call. All |
1da177e4 LT |
665 | * other usages are undefined. |
666 | * | |
667 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
668 | * whatever the device wrote there. | |
669 | */ | |
7fcebbd2 BB |
670 | static void unmap_single(struct device *hwdev, dma_addr_t dev_addr, |
671 | size_t size, int dir) | |
1da177e4 | 672 | { |
02ca646e | 673 | phys_addr_t paddr = swiotlb_bus_to_phys(hwdev, dev_addr); |
1da177e4 | 674 | |
34814545 | 675 | BUG_ON(dir == DMA_NONE); |
7fcebbd2 | 676 | |
02ca646e FT |
677 | if (is_swiotlb_buffer(paddr)) { |
678 | do_unmap_single(hwdev, phys_to_virt(paddr), size, dir); | |
7fcebbd2 BB |
679 | return; |
680 | } | |
681 | ||
682 | if (dir != DMA_FROM_DEVICE) | |
683 | return; | |
684 | ||
02ca646e FT |
685 | /* |
686 | * phys_to_virt doesn't work with hihgmem page but we could | |
687 | * call dma_mark_clean() with hihgmem page here. However, we | |
688 | * are fine since dma_mark_clean() is null on POWERPC. We can | |
689 | * make dma_mark_clean() take a physical address if necessary. | |
690 | */ | |
691 | dma_mark_clean(phys_to_virt(paddr), size); | |
7fcebbd2 BB |
692 | } |
693 | ||
694 | void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, | |
695 | size_t size, enum dma_data_direction dir, | |
696 | struct dma_attrs *attrs) | |
697 | { | |
698 | unmap_single(hwdev, dev_addr, size, dir); | |
1da177e4 | 699 | } |
f98eee8e | 700 | EXPORT_SYMBOL_GPL(swiotlb_unmap_page); |
874d6a95 | 701 | |
1da177e4 LT |
702 | /* |
703 | * Make physical memory consistent for a single streaming mode DMA translation | |
704 | * after a transfer. | |
705 | * | |
ceb5ac32 | 706 | * If you perform a swiotlb_map_page() but wish to interrogate the buffer |
17e5ad6c TL |
707 | * using the cpu, yet do not wish to teardown the dma mapping, you must |
708 | * call this function before doing so. At the next point you give the dma | |
1da177e4 LT |
709 | * address back to the card, you must first perform a |
710 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer | |
711 | */ | |
be6b0267 | 712 | static void |
8270f3f1 | 713 | swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, |
de69e0f0 | 714 | size_t size, int dir, int target) |
1da177e4 | 715 | { |
02ca646e | 716 | phys_addr_t paddr = swiotlb_bus_to_phys(hwdev, dev_addr); |
1da177e4 | 717 | |
34814545 | 718 | BUG_ON(dir == DMA_NONE); |
380d6878 | 719 | |
02ca646e FT |
720 | if (is_swiotlb_buffer(paddr)) { |
721 | sync_single(hwdev, phys_to_virt(paddr), size, dir, target); | |
380d6878 BB |
722 | return; |
723 | } | |
724 | ||
725 | if (dir != DMA_FROM_DEVICE) | |
726 | return; | |
727 | ||
02ca646e | 728 | dma_mark_clean(phys_to_virt(paddr), size); |
1da177e4 LT |
729 | } |
730 | ||
8270f3f1 JL |
731 | void |
732 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e | 733 | size_t size, enum dma_data_direction dir) |
8270f3f1 | 734 | { |
de69e0f0 | 735 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); |
8270f3f1 | 736 | } |
874d6a95 | 737 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); |
8270f3f1 | 738 | |
1da177e4 LT |
739 | void |
740 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e | 741 | size_t size, enum dma_data_direction dir) |
1da177e4 | 742 | { |
de69e0f0 | 743 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); |
1da177e4 | 744 | } |
874d6a95 | 745 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); |
1da177e4 | 746 | |
878a97cf JL |
747 | /* |
748 | * Same as above, but for a sub-range of the mapping. | |
749 | */ | |
be6b0267 | 750 | static void |
878a97cf | 751 | swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr, |
de69e0f0 JL |
752 | unsigned long offset, size_t size, |
753 | int dir, int target) | |
878a97cf | 754 | { |
380d6878 | 755 | swiotlb_sync_single(hwdev, dev_addr + offset, size, dir, target); |
878a97cf JL |
756 | } |
757 | ||
758 | void | |
759 | swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e FT |
760 | unsigned long offset, size_t size, |
761 | enum dma_data_direction dir) | |
878a97cf | 762 | { |
de69e0f0 JL |
763 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
764 | SYNC_FOR_CPU); | |
878a97cf | 765 | } |
874d6a95 | 766 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu); |
878a97cf JL |
767 | |
768 | void | |
769 | swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e FT |
770 | unsigned long offset, size_t size, |
771 | enum dma_data_direction dir) | |
878a97cf | 772 | { |
de69e0f0 JL |
773 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
774 | SYNC_FOR_DEVICE); | |
878a97cf | 775 | } |
874d6a95 | 776 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device); |
878a97cf | 777 | |
1da177e4 LT |
778 | /* |
779 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
ceb5ac32 | 780 | * This is the scatter-gather version of the above swiotlb_map_page |
1da177e4 LT |
781 | * interface. Here the scatter gather list elements are each tagged with the |
782 | * appropriate dma address and length. They are obtained via | |
783 | * sg_dma_{address,length}(SG). | |
784 | * | |
785 | * NOTE: An implementation may be able to use a smaller number of | |
786 | * DMA address/length pairs than there are SG table elements. | |
787 | * (for example via virtual mapping capabilities) | |
788 | * The routine returns the number of addr/length pairs actually | |
789 | * used, at most nents. | |
790 | * | |
ceb5ac32 | 791 | * Device ownership issues as mentioned above for swiotlb_map_page are the |
1da177e4 LT |
792 | * same here. |
793 | */ | |
794 | int | |
309df0c5 | 795 | swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, |
160c1d8e | 796 | enum dma_data_direction dir, struct dma_attrs *attrs) |
1da177e4 | 797 | { |
dbfd49fe | 798 | struct scatterlist *sg; |
1da177e4 LT |
799 | int i; |
800 | ||
34814545 | 801 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 802 | |
dbfd49fe | 803 | for_each_sg(sgl, sg, nelems, i) { |
961d7d0e IC |
804 | phys_addr_t paddr = sg_phys(sg); |
805 | dma_addr_t dev_addr = swiotlb_phys_to_bus(hwdev, paddr); | |
bc40ac66 | 806 | |
cf56e3f2 | 807 | if (swiotlb_force || |
2797982e | 808 | address_needs_mapping(hwdev, dev_addr, sg->length)) { |
bc40ac66 BB |
809 | void *map = map_single(hwdev, sg_phys(sg), |
810 | sg->length, dir); | |
7e870233 | 811 | if (!map) { |
1da177e4 LT |
812 | /* Don't panic here, we expect map_sg users |
813 | to do proper error handling. */ | |
814 | swiotlb_full(hwdev, sg->length, dir, 0); | |
309df0c5 AK |
815 | swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, |
816 | attrs); | |
dbfd49fe | 817 | sgl[0].dma_length = 0; |
1da177e4 LT |
818 | return 0; |
819 | } | |
70a7d3cc | 820 | sg->dma_address = swiotlb_virt_to_bus(hwdev, map); |
1da177e4 LT |
821 | } else |
822 | sg->dma_address = dev_addr; | |
823 | sg->dma_length = sg->length; | |
824 | } | |
825 | return nelems; | |
826 | } | |
309df0c5 AK |
827 | EXPORT_SYMBOL(swiotlb_map_sg_attrs); |
828 | ||
829 | int | |
830 | swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
831 | int dir) | |
832 | { | |
833 | return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
834 | } | |
874d6a95 | 835 | EXPORT_SYMBOL(swiotlb_map_sg); |
1da177e4 LT |
836 | |
837 | /* | |
838 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
ceb5ac32 | 839 | * concerning calls here are the same as for swiotlb_unmap_page() above. |
1da177e4 LT |
840 | */ |
841 | void | |
309df0c5 | 842 | swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, |
160c1d8e | 843 | int nelems, enum dma_data_direction dir, struct dma_attrs *attrs) |
1da177e4 | 844 | { |
dbfd49fe | 845 | struct scatterlist *sg; |
1da177e4 LT |
846 | int i; |
847 | ||
34814545 | 848 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 849 | |
7fcebbd2 BB |
850 | for_each_sg(sgl, sg, nelems, i) |
851 | unmap_single(hwdev, sg->dma_address, sg->dma_length, dir); | |
852 | ||
1da177e4 | 853 | } |
309df0c5 AK |
854 | EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); |
855 | ||
856 | void | |
857 | swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
858 | int dir) | |
859 | { | |
860 | return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
861 | } | |
874d6a95 | 862 | EXPORT_SYMBOL(swiotlb_unmap_sg); |
1da177e4 LT |
863 | |
864 | /* | |
865 | * Make physical memory consistent for a set of streaming mode DMA translations | |
866 | * after a transfer. | |
867 | * | |
868 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | |
869 | * and usage. | |
870 | */ | |
be6b0267 | 871 | static void |
dbfd49fe | 872 | swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, |
de69e0f0 | 873 | int nelems, int dir, int target) |
1da177e4 | 874 | { |
dbfd49fe | 875 | struct scatterlist *sg; |
1da177e4 LT |
876 | int i; |
877 | ||
380d6878 BB |
878 | for_each_sg(sgl, sg, nelems, i) |
879 | swiotlb_sync_single(hwdev, sg->dma_address, | |
de69e0f0 | 880 | sg->dma_length, dir, target); |
1da177e4 LT |
881 | } |
882 | ||
8270f3f1 JL |
883 | void |
884 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | |
160c1d8e | 885 | int nelems, enum dma_data_direction dir) |
8270f3f1 | 886 | { |
de69e0f0 | 887 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); |
8270f3f1 | 888 | } |
874d6a95 | 889 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); |
8270f3f1 | 890 | |
1da177e4 LT |
891 | void |
892 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | |
160c1d8e | 893 | int nelems, enum dma_data_direction dir) |
1da177e4 | 894 | { |
de69e0f0 | 895 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); |
1da177e4 | 896 | } |
874d6a95 | 897 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); |
1da177e4 LT |
898 | |
899 | int | |
8d8bb39b | 900 | swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) |
1da177e4 | 901 | { |
70a7d3cc | 902 | return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer)); |
1da177e4 | 903 | } |
874d6a95 | 904 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); |
1da177e4 LT |
905 | |
906 | /* | |
17e5ad6c | 907 | * Return whether the given device DMA address mask can be supported |
1da177e4 | 908 | * properly. For example, if your device can only drive the low 24-bits |
17e5ad6c | 909 | * during bus mastering, then you would pass 0x00ffffff as the mask to |
1da177e4 LT |
910 | * this function. |
911 | */ | |
912 | int | |
563aaf06 | 913 | swiotlb_dma_supported(struct device *hwdev, u64 mask) |
1da177e4 | 914 | { |
70a7d3cc | 915 | return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask; |
1da177e4 | 916 | } |
1da177e4 | 917 | EXPORT_SYMBOL(swiotlb_dma_supported); |