Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Dynamic DMA mapping support. | |
3 | * | |
563aaf06 | 4 | * This implementation is a fallback for platforms that do not support |
1da177e4 LT |
5 | * I/O TLBs (aka DMA address translation hardware). |
6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | |
7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | |
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
9 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
10 | * | |
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
13 | * unnecessary i-cache flushing. | |
569c8bf5 JL |
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. |
15 | * 05/09/10 linville Add support for syncing ranges, support syncing for | |
16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. | |
fb05a379 | 17 | * 08/12/11 beckyb Add highmem support |
1da177e4 LT |
18 | */ |
19 | ||
20 | #include <linux/cache.h> | |
17e5ad6c | 21 | #include <linux/dma-mapping.h> |
1da177e4 LT |
22 | #include <linux/mm.h> |
23 | #include <linux/module.h> | |
1da177e4 LT |
24 | #include <linux/spinlock.h> |
25 | #include <linux/string.h> | |
0016fdee | 26 | #include <linux/swiotlb.h> |
fb05a379 | 27 | #include <linux/pfn.h> |
1da177e4 LT |
28 | #include <linux/types.h> |
29 | #include <linux/ctype.h> | |
ef9b1893 | 30 | #include <linux/highmem.h> |
1da177e4 LT |
31 | |
32 | #include <asm/io.h> | |
1da177e4 | 33 | #include <asm/dma.h> |
17e5ad6c | 34 | #include <asm/scatterlist.h> |
1da177e4 LT |
35 | |
36 | #include <linux/init.h> | |
37 | #include <linux/bootmem.h> | |
a8522509 | 38 | #include <linux/iommu-helper.h> |
1da177e4 LT |
39 | |
40 | #define OFFSET(val,align) ((unsigned long) \ | |
41 | ( (val) & ( (align) - 1))) | |
42 | ||
0b9afede AW |
43 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) |
44 | ||
45 | /* | |
46 | * Minimum IO TLB size to bother booting with. Systems with mainly | |
47 | * 64bit capable cards will only lightly use the swiotlb. If we can't | |
48 | * allocate a contiguous 1MB, we're probably in trouble anyway. | |
49 | */ | |
50 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
51 | ||
de69e0f0 JL |
52 | /* |
53 | * Enumeration for sync targets | |
54 | */ | |
55 | enum dma_sync_target { | |
56 | SYNC_FOR_CPU = 0, | |
57 | SYNC_FOR_DEVICE = 1, | |
58 | }; | |
59 | ||
1da177e4 LT |
60 | int swiotlb_force; |
61 | ||
62 | /* | |
ceb5ac32 BB |
63 | * Used to do a quick range check in unmap_single and |
64 | * sync_single_*, to see if the memory was in fact allocated by this | |
1da177e4 LT |
65 | * API. |
66 | */ | |
67 | static char *io_tlb_start, *io_tlb_end; | |
68 | ||
69 | /* | |
70 | * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and | |
71 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. | |
72 | */ | |
73 | static unsigned long io_tlb_nslabs; | |
74 | ||
75 | /* | |
76 | * When the IOMMU overflows we return a fallback buffer. This sets the size. | |
77 | */ | |
78 | static unsigned long io_tlb_overflow = 32*1024; | |
79 | ||
80 | void *io_tlb_overflow_buffer; | |
81 | ||
82 | /* | |
83 | * This is a free list describing the number of free entries available from | |
84 | * each index | |
85 | */ | |
86 | static unsigned int *io_tlb_list; | |
87 | static unsigned int io_tlb_index; | |
88 | ||
89 | /* | |
90 | * We need to save away the original address corresponding to a mapped entry | |
91 | * for the sync operations. | |
92 | */ | |
bc40ac66 | 93 | static phys_addr_t *io_tlb_orig_addr; |
1da177e4 LT |
94 | |
95 | /* | |
96 | * Protect the above data structures in the map and unmap calls | |
97 | */ | |
98 | static DEFINE_SPINLOCK(io_tlb_lock); | |
99 | ||
100 | static int __init | |
101 | setup_io_tlb_npages(char *str) | |
102 | { | |
103 | if (isdigit(*str)) { | |
e8579e72 | 104 | io_tlb_nslabs = simple_strtoul(str, &str, 0); |
1da177e4 LT |
105 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ |
106 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
107 | } | |
108 | if (*str == ',') | |
109 | ++str; | |
110 | if (!strcmp(str, "force")) | |
111 | swiotlb_force = 1; | |
112 | return 1; | |
113 | } | |
114 | __setup("swiotlb=", setup_io_tlb_npages); | |
115 | /* make io_tlb_overflow tunable too? */ | |
116 | ||
70a7d3cc | 117 | dma_addr_t __weak swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr) |
e08e1f7a IC |
118 | { |
119 | return paddr; | |
120 | } | |
121 | ||
42d7c5e3 | 122 | phys_addr_t __weak swiotlb_bus_to_phys(struct device *hwdev, dma_addr_t baddr) |
e08e1f7a IC |
123 | { |
124 | return baddr; | |
125 | } | |
126 | ||
02ca646e | 127 | /* Note that this doesn't work with highmem page */ |
70a7d3cc JF |
128 | static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev, |
129 | volatile void *address) | |
e08e1f7a | 130 | { |
70a7d3cc | 131 | return swiotlb_phys_to_bus(hwdev, virt_to_phys(address)); |
e08e1f7a IC |
132 | } |
133 | ||
2e5b2b86 IC |
134 | static void swiotlb_print_info(unsigned long bytes) |
135 | { | |
136 | phys_addr_t pstart, pend; | |
2e5b2b86 IC |
137 | |
138 | pstart = virt_to_phys(io_tlb_start); | |
139 | pend = virt_to_phys(io_tlb_end); | |
140 | ||
2e5b2b86 IC |
141 | printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n", |
142 | bytes >> 20, io_tlb_start, io_tlb_end); | |
70a7d3cc JF |
143 | printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n", |
144 | (unsigned long long)pstart, | |
145 | (unsigned long long)pend); | |
2e5b2b86 IC |
146 | } |
147 | ||
1da177e4 LT |
148 | /* |
149 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
17e5ad6c | 150 | * structures for the software IO TLB used to implement the DMA API. |
1da177e4 | 151 | */ |
563aaf06 JB |
152 | void __init |
153 | swiotlb_init_with_default_size(size_t default_size) | |
1da177e4 | 154 | { |
563aaf06 | 155 | unsigned long i, bytes; |
1da177e4 LT |
156 | |
157 | if (!io_tlb_nslabs) { | |
e8579e72 | 158 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); |
1da177e4 LT |
159 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); |
160 | } | |
161 | ||
563aaf06 JB |
162 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
163 | ||
1da177e4 LT |
164 | /* |
165 | * Get IO TLB memory from the low pages | |
166 | */ | |
3885123d | 167 | io_tlb_start = alloc_bootmem_low_pages(bytes); |
1da177e4 LT |
168 | if (!io_tlb_start) |
169 | panic("Cannot allocate SWIOTLB buffer"); | |
563aaf06 | 170 | io_tlb_end = io_tlb_start + bytes; |
1da177e4 LT |
171 | |
172 | /* | |
173 | * Allocate and initialize the free list array. This array is used | |
174 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
175 | * between io_tlb_start and io_tlb_end. | |
176 | */ | |
177 | io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int)); | |
25667d67 | 178 | for (i = 0; i < io_tlb_nslabs; i++) |
1da177e4 LT |
179 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); |
180 | io_tlb_index = 0; | |
bc40ac66 | 181 | io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t)); |
1da177e4 LT |
182 | |
183 | /* | |
184 | * Get the overflow emergency buffer | |
185 | */ | |
186 | io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow); | |
563aaf06 JB |
187 | if (!io_tlb_overflow_buffer) |
188 | panic("Cannot allocate SWIOTLB overflow buffer!\n"); | |
189 | ||
2e5b2b86 | 190 | swiotlb_print_info(bytes); |
1da177e4 LT |
191 | } |
192 | ||
563aaf06 JB |
193 | void __init |
194 | swiotlb_init(void) | |
1da177e4 | 195 | { |
25667d67 | 196 | swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */ |
1da177e4 LT |
197 | } |
198 | ||
0b9afede AW |
199 | /* |
200 | * Systems with larger DMA zones (those that don't support ISA) can | |
201 | * initialize the swiotlb later using the slab allocator if needed. | |
202 | * This should be just like above, but with some error catching. | |
203 | */ | |
204 | int | |
563aaf06 | 205 | swiotlb_late_init_with_default_size(size_t default_size) |
0b9afede | 206 | { |
563aaf06 | 207 | unsigned long i, bytes, req_nslabs = io_tlb_nslabs; |
0b9afede AW |
208 | unsigned int order; |
209 | ||
210 | if (!io_tlb_nslabs) { | |
211 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
212 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
213 | } | |
214 | ||
215 | /* | |
216 | * Get IO TLB memory from the low pages | |
217 | */ | |
563aaf06 | 218 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); |
0b9afede | 219 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
563aaf06 | 220 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede AW |
221 | |
222 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
bb52196b FT |
223 | io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, |
224 | order); | |
0b9afede AW |
225 | if (io_tlb_start) |
226 | break; | |
227 | order--; | |
228 | } | |
229 | ||
230 | if (!io_tlb_start) | |
231 | goto cleanup1; | |
232 | ||
563aaf06 | 233 | if (order != get_order(bytes)) { |
0b9afede AW |
234 | printk(KERN_WARNING "Warning: only able to allocate %ld MB " |
235 | "for software IO TLB\n", (PAGE_SIZE << order) >> 20); | |
236 | io_tlb_nslabs = SLABS_PER_PAGE << order; | |
563aaf06 | 237 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede | 238 | } |
563aaf06 JB |
239 | io_tlb_end = io_tlb_start + bytes; |
240 | memset(io_tlb_start, 0, bytes); | |
0b9afede AW |
241 | |
242 | /* | |
243 | * Allocate and initialize the free list array. This array is used | |
244 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
245 | * between io_tlb_start and io_tlb_end. | |
246 | */ | |
247 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | |
248 | get_order(io_tlb_nslabs * sizeof(int))); | |
249 | if (!io_tlb_list) | |
250 | goto cleanup2; | |
251 | ||
252 | for (i = 0; i < io_tlb_nslabs; i++) | |
253 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
254 | io_tlb_index = 0; | |
255 | ||
bc40ac66 BB |
256 | io_tlb_orig_addr = (phys_addr_t *) |
257 | __get_free_pages(GFP_KERNEL, | |
258 | get_order(io_tlb_nslabs * | |
259 | sizeof(phys_addr_t))); | |
0b9afede AW |
260 | if (!io_tlb_orig_addr) |
261 | goto cleanup3; | |
262 | ||
bc40ac66 | 263 | memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t)); |
0b9afede AW |
264 | |
265 | /* | |
266 | * Get the overflow emergency buffer | |
267 | */ | |
268 | io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA, | |
269 | get_order(io_tlb_overflow)); | |
270 | if (!io_tlb_overflow_buffer) | |
271 | goto cleanup4; | |
272 | ||
2e5b2b86 | 273 | swiotlb_print_info(bytes); |
0b9afede AW |
274 | |
275 | return 0; | |
276 | ||
277 | cleanup4: | |
bc40ac66 BB |
278 | free_pages((unsigned long)io_tlb_orig_addr, |
279 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); | |
0b9afede AW |
280 | io_tlb_orig_addr = NULL; |
281 | cleanup3: | |
25667d67 TL |
282 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * |
283 | sizeof(int))); | |
0b9afede | 284 | io_tlb_list = NULL; |
0b9afede | 285 | cleanup2: |
563aaf06 | 286 | io_tlb_end = NULL; |
0b9afede AW |
287 | free_pages((unsigned long)io_tlb_start, order); |
288 | io_tlb_start = NULL; | |
289 | cleanup1: | |
290 | io_tlb_nslabs = req_nslabs; | |
291 | return -ENOMEM; | |
292 | } | |
293 | ||
02ca646e | 294 | static int is_swiotlb_buffer(phys_addr_t paddr) |
640aebfe | 295 | { |
02ca646e FT |
296 | return paddr >= virt_to_phys(io_tlb_start) && |
297 | paddr < virt_to_phys(io_tlb_end); | |
640aebfe FT |
298 | } |
299 | ||
fb05a379 BB |
300 | /* |
301 | * Bounce: copy the swiotlb buffer back to the original dma location | |
302 | */ | |
303 | static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size, | |
304 | enum dma_data_direction dir) | |
305 | { | |
306 | unsigned long pfn = PFN_DOWN(phys); | |
307 | ||
308 | if (PageHighMem(pfn_to_page(pfn))) { | |
309 | /* The buffer does not have a mapping. Map it in and copy */ | |
310 | unsigned int offset = phys & ~PAGE_MASK; | |
311 | char *buffer; | |
312 | unsigned int sz = 0; | |
313 | unsigned long flags; | |
314 | ||
315 | while (size) { | |
67131ad0 | 316 | sz = min_t(size_t, PAGE_SIZE - offset, size); |
fb05a379 BB |
317 | |
318 | local_irq_save(flags); | |
319 | buffer = kmap_atomic(pfn_to_page(pfn), | |
320 | KM_BOUNCE_READ); | |
321 | if (dir == DMA_TO_DEVICE) | |
322 | memcpy(dma_addr, buffer + offset, sz); | |
ef9b1893 | 323 | else |
fb05a379 BB |
324 | memcpy(buffer + offset, dma_addr, sz); |
325 | kunmap_atomic(buffer, KM_BOUNCE_READ); | |
ef9b1893 | 326 | local_irq_restore(flags); |
fb05a379 BB |
327 | |
328 | size -= sz; | |
329 | pfn++; | |
330 | dma_addr += sz; | |
331 | offset = 0; | |
ef9b1893 JF |
332 | } |
333 | } else { | |
ef9b1893 | 334 | if (dir == DMA_TO_DEVICE) |
fb05a379 | 335 | memcpy(dma_addr, phys_to_virt(phys), size); |
ef9b1893 | 336 | else |
fb05a379 | 337 | memcpy(phys_to_virt(phys), dma_addr, size); |
ef9b1893 | 338 | } |
1b548f66 JF |
339 | } |
340 | ||
1da177e4 LT |
341 | /* |
342 | * Allocates bounce buffer and returns its kernel virtual address. | |
343 | */ | |
344 | static void * | |
bc40ac66 | 345 | map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir) |
1da177e4 LT |
346 | { |
347 | unsigned long flags; | |
348 | char *dma_addr; | |
349 | unsigned int nslots, stride, index, wrap; | |
350 | int i; | |
681cc5cd FT |
351 | unsigned long start_dma_addr; |
352 | unsigned long mask; | |
353 | unsigned long offset_slots; | |
354 | unsigned long max_slots; | |
355 | ||
356 | mask = dma_get_seg_boundary(hwdev); | |
70a7d3cc | 357 | start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask; |
681cc5cd FT |
358 | |
359 | offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
a5ddde4a IC |
360 | |
361 | /* | |
362 | * Carefully handle integer overflow which can occur when mask == ~0UL. | |
363 | */ | |
b15a3891 JB |
364 | max_slots = mask + 1 |
365 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT | |
366 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); | |
1da177e4 LT |
367 | |
368 | /* | |
369 | * For mappings greater than a page, we limit the stride (and | |
370 | * hence alignment) to a page size. | |
371 | */ | |
372 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
373 | if (size > PAGE_SIZE) | |
374 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); | |
375 | else | |
376 | stride = 1; | |
377 | ||
34814545 | 378 | BUG_ON(!nslots); |
1da177e4 LT |
379 | |
380 | /* | |
381 | * Find suitable number of IO TLB entries size that will fit this | |
382 | * request and allocate a buffer from that IO TLB pool. | |
383 | */ | |
384 | spin_lock_irqsave(&io_tlb_lock, flags); | |
a7133a15 AM |
385 | index = ALIGN(io_tlb_index, stride); |
386 | if (index >= io_tlb_nslabs) | |
387 | index = 0; | |
388 | wrap = index; | |
389 | ||
390 | do { | |
a8522509 FT |
391 | while (iommu_is_span_boundary(index, nslots, offset_slots, |
392 | max_slots)) { | |
b15a3891 JB |
393 | index += stride; |
394 | if (index >= io_tlb_nslabs) | |
395 | index = 0; | |
a7133a15 AM |
396 | if (index == wrap) |
397 | goto not_found; | |
398 | } | |
399 | ||
400 | /* | |
401 | * If we find a slot that indicates we have 'nslots' number of | |
402 | * contiguous buffers, we allocate the buffers from that slot | |
403 | * and mark the entries as '0' indicating unavailable. | |
404 | */ | |
405 | if (io_tlb_list[index] >= nslots) { | |
406 | int count = 0; | |
407 | ||
408 | for (i = index; i < (int) (index + nslots); i++) | |
409 | io_tlb_list[i] = 0; | |
410 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) | |
411 | io_tlb_list[i] = ++count; | |
412 | dma_addr = io_tlb_start + (index << IO_TLB_SHIFT); | |
1da177e4 | 413 | |
a7133a15 AM |
414 | /* |
415 | * Update the indices to avoid searching in the next | |
416 | * round. | |
417 | */ | |
418 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | |
419 | ? (index + nslots) : 0); | |
420 | ||
421 | goto found; | |
422 | } | |
423 | index += stride; | |
424 | if (index >= io_tlb_nslabs) | |
425 | index = 0; | |
426 | } while (index != wrap); | |
427 | ||
428 | not_found: | |
429 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
430 | return NULL; | |
431 | found: | |
1da177e4 LT |
432 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
433 | ||
434 | /* | |
435 | * Save away the mapping from the original address to the DMA address. | |
436 | * This is needed when we sync the memory. Then we sync the buffer if | |
437 | * needed. | |
438 | */ | |
bc40ac66 BB |
439 | for (i = 0; i < nslots; i++) |
440 | io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT); | |
1da177e4 | 441 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) |
fb05a379 | 442 | swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); |
1da177e4 LT |
443 | |
444 | return dma_addr; | |
445 | } | |
446 | ||
447 | /* | |
448 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. | |
449 | */ | |
450 | static void | |
7fcebbd2 | 451 | do_unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir) |
1da177e4 LT |
452 | { |
453 | unsigned long flags; | |
454 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
455 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; | |
bc40ac66 | 456 | phys_addr_t phys = io_tlb_orig_addr[index]; |
1da177e4 LT |
457 | |
458 | /* | |
459 | * First, sync the memory before unmapping the entry | |
460 | */ | |
bc40ac66 | 461 | if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) |
fb05a379 | 462 | swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); |
1da177e4 LT |
463 | |
464 | /* | |
465 | * Return the buffer to the free list by setting the corresponding | |
466 | * entries to indicate the number of contigous entries available. | |
467 | * While returning the entries to the free list, we merge the entries | |
468 | * with slots below and above the pool being returned. | |
469 | */ | |
470 | spin_lock_irqsave(&io_tlb_lock, flags); | |
471 | { | |
472 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | |
473 | io_tlb_list[index + nslots] : 0); | |
474 | /* | |
475 | * Step 1: return the slots to the free list, merging the | |
476 | * slots with superceeding slots | |
477 | */ | |
478 | for (i = index + nslots - 1; i >= index; i--) | |
479 | io_tlb_list[i] = ++count; | |
480 | /* | |
481 | * Step 2: merge the returned slots with the preceding slots, | |
482 | * if available (non zero) | |
483 | */ | |
484 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
485 | io_tlb_list[i] = ++count; | |
486 | } | |
487 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
488 | } | |
489 | ||
490 | static void | |
de69e0f0 JL |
491 | sync_single(struct device *hwdev, char *dma_addr, size_t size, |
492 | int dir, int target) | |
1da177e4 | 493 | { |
bc40ac66 BB |
494 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; |
495 | phys_addr_t phys = io_tlb_orig_addr[index]; | |
496 | ||
497 | phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1)); | |
df336d1c | 498 | |
de69e0f0 JL |
499 | switch (target) { |
500 | case SYNC_FOR_CPU: | |
501 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
fb05a379 | 502 | swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); |
34814545 ES |
503 | else |
504 | BUG_ON(dir != DMA_TO_DEVICE); | |
de69e0f0 JL |
505 | break; |
506 | case SYNC_FOR_DEVICE: | |
507 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
fb05a379 | 508 | swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); |
34814545 ES |
509 | else |
510 | BUG_ON(dir != DMA_FROM_DEVICE); | |
de69e0f0 JL |
511 | break; |
512 | default: | |
1da177e4 | 513 | BUG(); |
de69e0f0 | 514 | } |
1da177e4 LT |
515 | } |
516 | ||
517 | void * | |
518 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, | |
06a54497 | 519 | dma_addr_t *dma_handle, gfp_t flags) |
1da177e4 | 520 | { |
563aaf06 | 521 | dma_addr_t dev_addr; |
1da177e4 LT |
522 | void *ret; |
523 | int order = get_order(size); | |
284901a9 | 524 | u64 dma_mask = DMA_BIT_MASK(32); |
1e74f300 FT |
525 | |
526 | if (hwdev && hwdev->coherent_dma_mask) | |
527 | dma_mask = hwdev->coherent_dma_mask; | |
1da177e4 | 528 | |
25667d67 | 529 | ret = (void *)__get_free_pages(flags, order); |
b9394647 | 530 | if (ret && swiotlb_virt_to_bus(hwdev, ret) + size > dma_mask) { |
1da177e4 LT |
531 | /* |
532 | * The allocated memory isn't reachable by the device. | |
1da177e4 LT |
533 | */ |
534 | free_pages((unsigned long) ret, order); | |
535 | ret = NULL; | |
536 | } | |
537 | if (!ret) { | |
538 | /* | |
539 | * We are either out of memory or the device can't DMA | |
ceb5ac32 BB |
540 | * to GFP_DMA memory; fall back on map_single(), which |
541 | * will grab memory from the lowest available address range. | |
1da177e4 | 542 | */ |
bc40ac66 | 543 | ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE); |
9dfda12b | 544 | if (!ret) |
1da177e4 | 545 | return NULL; |
1da177e4 LT |
546 | } |
547 | ||
548 | memset(ret, 0, size); | |
70a7d3cc | 549 | dev_addr = swiotlb_virt_to_bus(hwdev, ret); |
1da177e4 LT |
550 | |
551 | /* Confirm address can be DMA'd by device */ | |
b9394647 | 552 | if (dev_addr + size > dma_mask) { |
563aaf06 | 553 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", |
1e74f300 | 554 | (unsigned long long)dma_mask, |
563aaf06 | 555 | (unsigned long long)dev_addr); |
a2b89b59 FT |
556 | |
557 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
7fcebbd2 | 558 | do_unmap_single(hwdev, ret, size, DMA_TO_DEVICE); |
a2b89b59 | 559 | return NULL; |
1da177e4 LT |
560 | } |
561 | *dma_handle = dev_addr; | |
562 | return ret; | |
563 | } | |
874d6a95 | 564 | EXPORT_SYMBOL(swiotlb_alloc_coherent); |
1da177e4 LT |
565 | |
566 | void | |
567 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | |
02ca646e | 568 | dma_addr_t dev_addr) |
1da177e4 | 569 | { |
02ca646e FT |
570 | phys_addr_t paddr = swiotlb_bus_to_phys(hwdev, dev_addr); |
571 | ||
aa24886e | 572 | WARN_ON(irqs_disabled()); |
02ca646e FT |
573 | if (!is_swiotlb_buffer(paddr)) |
574 | free_pages((unsigned long)vaddr, get_order(size)); | |
1da177e4 LT |
575 | else |
576 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | |
7fcebbd2 | 577 | do_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE); |
1da177e4 | 578 | } |
874d6a95 | 579 | EXPORT_SYMBOL(swiotlb_free_coherent); |
1da177e4 LT |
580 | |
581 | static void | |
582 | swiotlb_full(struct device *dev, size_t size, int dir, int do_panic) | |
583 | { | |
584 | /* | |
585 | * Ran out of IOMMU space for this operation. This is very bad. | |
586 | * Unfortunately the drivers cannot handle this operation properly. | |
17e5ad6c | 587 | * unless they check for dma_mapping_error (most don't) |
1da177e4 LT |
588 | * When the mapping is small enough return a static buffer to limit |
589 | * the damage, or panic when the transfer is too big. | |
590 | */ | |
563aaf06 | 591 | printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at " |
94b32486 | 592 | "device %s\n", size, dev ? dev_name(dev) : "?"); |
1da177e4 LT |
593 | |
594 | if (size > io_tlb_overflow && do_panic) { | |
17e5ad6c TL |
595 | if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) |
596 | panic("DMA: Memory would be corrupted\n"); | |
597 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) | |
598 | panic("DMA: Random memory would be DMAed\n"); | |
1da177e4 LT |
599 | } |
600 | } | |
601 | ||
602 | /* | |
603 | * Map a single buffer of the indicated size for DMA in streaming mode. The | |
17e5ad6c | 604 | * physical address to use is returned. |
1da177e4 LT |
605 | * |
606 | * Once the device is given the dma address, the device owns this memory until | |
ceb5ac32 | 607 | * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed. |
1da177e4 | 608 | */ |
f98eee8e FT |
609 | dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, |
610 | unsigned long offset, size_t size, | |
611 | enum dma_data_direction dir, | |
612 | struct dma_attrs *attrs) | |
1da177e4 | 613 | { |
f98eee8e | 614 | phys_addr_t phys = page_to_phys(page) + offset; |
f98eee8e | 615 | dma_addr_t dev_addr = swiotlb_phys_to_bus(dev, phys); |
1da177e4 LT |
616 | void *map; |
617 | ||
34814545 | 618 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 619 | /* |
ceb5ac32 | 620 | * If the address happens to be in the device's DMA window, |
1da177e4 LT |
621 | * we can safely return the device addr and not worry about bounce |
622 | * buffering it. | |
623 | */ | |
b9394647 | 624 | if (dma_capable(dev, dev_addr, size) && !swiotlb_force) |
1da177e4 LT |
625 | return dev_addr; |
626 | ||
627 | /* | |
628 | * Oh well, have to allocate and map a bounce buffer. | |
629 | */ | |
f98eee8e | 630 | map = map_single(dev, phys, size, dir); |
1da177e4 | 631 | if (!map) { |
f98eee8e | 632 | swiotlb_full(dev, size, dir, 1); |
1da177e4 LT |
633 | map = io_tlb_overflow_buffer; |
634 | } | |
635 | ||
f98eee8e | 636 | dev_addr = swiotlb_virt_to_bus(dev, map); |
1da177e4 LT |
637 | |
638 | /* | |
639 | * Ensure that the address returned is DMA'ble | |
640 | */ | |
b9394647 | 641 | if (!dma_capable(dev, dev_addr, size)) |
1da177e4 LT |
642 | panic("map_single: bounce buffer is not DMA'ble"); |
643 | ||
644 | return dev_addr; | |
645 | } | |
f98eee8e | 646 | EXPORT_SYMBOL_GPL(swiotlb_map_page); |
1da177e4 | 647 | |
1da177e4 LT |
648 | /* |
649 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | |
ceb5ac32 | 650 | * match what was provided for in a previous swiotlb_map_page call. All |
1da177e4 LT |
651 | * other usages are undefined. |
652 | * | |
653 | * After this call, reads by the cpu to the buffer are guaranteed to see | |
654 | * whatever the device wrote there. | |
655 | */ | |
7fcebbd2 BB |
656 | static void unmap_single(struct device *hwdev, dma_addr_t dev_addr, |
657 | size_t size, int dir) | |
1da177e4 | 658 | { |
02ca646e | 659 | phys_addr_t paddr = swiotlb_bus_to_phys(hwdev, dev_addr); |
1da177e4 | 660 | |
34814545 | 661 | BUG_ON(dir == DMA_NONE); |
7fcebbd2 | 662 | |
02ca646e FT |
663 | if (is_swiotlb_buffer(paddr)) { |
664 | do_unmap_single(hwdev, phys_to_virt(paddr), size, dir); | |
7fcebbd2 BB |
665 | return; |
666 | } | |
667 | ||
668 | if (dir != DMA_FROM_DEVICE) | |
669 | return; | |
670 | ||
02ca646e FT |
671 | /* |
672 | * phys_to_virt doesn't work with hihgmem page but we could | |
673 | * call dma_mark_clean() with hihgmem page here. However, we | |
674 | * are fine since dma_mark_clean() is null on POWERPC. We can | |
675 | * make dma_mark_clean() take a physical address if necessary. | |
676 | */ | |
677 | dma_mark_clean(phys_to_virt(paddr), size); | |
7fcebbd2 BB |
678 | } |
679 | ||
680 | void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, | |
681 | size_t size, enum dma_data_direction dir, | |
682 | struct dma_attrs *attrs) | |
683 | { | |
684 | unmap_single(hwdev, dev_addr, size, dir); | |
1da177e4 | 685 | } |
f98eee8e | 686 | EXPORT_SYMBOL_GPL(swiotlb_unmap_page); |
874d6a95 | 687 | |
1da177e4 LT |
688 | /* |
689 | * Make physical memory consistent for a single streaming mode DMA translation | |
690 | * after a transfer. | |
691 | * | |
ceb5ac32 | 692 | * If you perform a swiotlb_map_page() but wish to interrogate the buffer |
17e5ad6c TL |
693 | * using the cpu, yet do not wish to teardown the dma mapping, you must |
694 | * call this function before doing so. At the next point you give the dma | |
1da177e4 LT |
695 | * address back to the card, you must first perform a |
696 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer | |
697 | */ | |
be6b0267 | 698 | static void |
8270f3f1 | 699 | swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, |
de69e0f0 | 700 | size_t size, int dir, int target) |
1da177e4 | 701 | { |
02ca646e | 702 | phys_addr_t paddr = swiotlb_bus_to_phys(hwdev, dev_addr); |
1da177e4 | 703 | |
34814545 | 704 | BUG_ON(dir == DMA_NONE); |
380d6878 | 705 | |
02ca646e FT |
706 | if (is_swiotlb_buffer(paddr)) { |
707 | sync_single(hwdev, phys_to_virt(paddr), size, dir, target); | |
380d6878 BB |
708 | return; |
709 | } | |
710 | ||
711 | if (dir != DMA_FROM_DEVICE) | |
712 | return; | |
713 | ||
02ca646e | 714 | dma_mark_clean(phys_to_virt(paddr), size); |
1da177e4 LT |
715 | } |
716 | ||
8270f3f1 JL |
717 | void |
718 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e | 719 | size_t size, enum dma_data_direction dir) |
8270f3f1 | 720 | { |
de69e0f0 | 721 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); |
8270f3f1 | 722 | } |
874d6a95 | 723 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); |
8270f3f1 | 724 | |
1da177e4 LT |
725 | void |
726 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e | 727 | size_t size, enum dma_data_direction dir) |
1da177e4 | 728 | { |
de69e0f0 | 729 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); |
1da177e4 | 730 | } |
874d6a95 | 731 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); |
1da177e4 | 732 | |
878a97cf JL |
733 | /* |
734 | * Same as above, but for a sub-range of the mapping. | |
735 | */ | |
be6b0267 | 736 | static void |
878a97cf | 737 | swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr, |
de69e0f0 JL |
738 | unsigned long offset, size_t size, |
739 | int dir, int target) | |
878a97cf | 740 | { |
380d6878 | 741 | swiotlb_sync_single(hwdev, dev_addr + offset, size, dir, target); |
878a97cf JL |
742 | } |
743 | ||
744 | void | |
745 | swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e FT |
746 | unsigned long offset, size_t size, |
747 | enum dma_data_direction dir) | |
878a97cf | 748 | { |
de69e0f0 JL |
749 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
750 | SYNC_FOR_CPU); | |
878a97cf | 751 | } |
874d6a95 | 752 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu); |
878a97cf JL |
753 | |
754 | void | |
755 | swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr, | |
160c1d8e FT |
756 | unsigned long offset, size_t size, |
757 | enum dma_data_direction dir) | |
878a97cf | 758 | { |
de69e0f0 JL |
759 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
760 | SYNC_FOR_DEVICE); | |
878a97cf | 761 | } |
874d6a95 | 762 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device); |
878a97cf | 763 | |
1da177e4 LT |
764 | /* |
765 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
ceb5ac32 | 766 | * This is the scatter-gather version of the above swiotlb_map_page |
1da177e4 LT |
767 | * interface. Here the scatter gather list elements are each tagged with the |
768 | * appropriate dma address and length. They are obtained via | |
769 | * sg_dma_{address,length}(SG). | |
770 | * | |
771 | * NOTE: An implementation may be able to use a smaller number of | |
772 | * DMA address/length pairs than there are SG table elements. | |
773 | * (for example via virtual mapping capabilities) | |
774 | * The routine returns the number of addr/length pairs actually | |
775 | * used, at most nents. | |
776 | * | |
ceb5ac32 | 777 | * Device ownership issues as mentioned above for swiotlb_map_page are the |
1da177e4 LT |
778 | * same here. |
779 | */ | |
780 | int | |
309df0c5 | 781 | swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, |
160c1d8e | 782 | enum dma_data_direction dir, struct dma_attrs *attrs) |
1da177e4 | 783 | { |
dbfd49fe | 784 | struct scatterlist *sg; |
1da177e4 LT |
785 | int i; |
786 | ||
34814545 | 787 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 788 | |
dbfd49fe | 789 | for_each_sg(sgl, sg, nelems, i) { |
961d7d0e IC |
790 | phys_addr_t paddr = sg_phys(sg); |
791 | dma_addr_t dev_addr = swiotlb_phys_to_bus(hwdev, paddr); | |
bc40ac66 | 792 | |
cf56e3f2 | 793 | if (swiotlb_force || |
b9394647 | 794 | !dma_capable(hwdev, dev_addr, sg->length)) { |
bc40ac66 BB |
795 | void *map = map_single(hwdev, sg_phys(sg), |
796 | sg->length, dir); | |
7e870233 | 797 | if (!map) { |
1da177e4 LT |
798 | /* Don't panic here, we expect map_sg users |
799 | to do proper error handling. */ | |
800 | swiotlb_full(hwdev, sg->length, dir, 0); | |
309df0c5 AK |
801 | swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, |
802 | attrs); | |
dbfd49fe | 803 | sgl[0].dma_length = 0; |
1da177e4 LT |
804 | return 0; |
805 | } | |
70a7d3cc | 806 | sg->dma_address = swiotlb_virt_to_bus(hwdev, map); |
1da177e4 LT |
807 | } else |
808 | sg->dma_address = dev_addr; | |
809 | sg->dma_length = sg->length; | |
810 | } | |
811 | return nelems; | |
812 | } | |
309df0c5 AK |
813 | EXPORT_SYMBOL(swiotlb_map_sg_attrs); |
814 | ||
815 | int | |
816 | swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
817 | int dir) | |
818 | { | |
819 | return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
820 | } | |
874d6a95 | 821 | EXPORT_SYMBOL(swiotlb_map_sg); |
1da177e4 LT |
822 | |
823 | /* | |
824 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | |
ceb5ac32 | 825 | * concerning calls here are the same as for swiotlb_unmap_page() above. |
1da177e4 LT |
826 | */ |
827 | void | |
309df0c5 | 828 | swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, |
160c1d8e | 829 | int nelems, enum dma_data_direction dir, struct dma_attrs *attrs) |
1da177e4 | 830 | { |
dbfd49fe | 831 | struct scatterlist *sg; |
1da177e4 LT |
832 | int i; |
833 | ||
34814545 | 834 | BUG_ON(dir == DMA_NONE); |
1da177e4 | 835 | |
7fcebbd2 BB |
836 | for_each_sg(sgl, sg, nelems, i) |
837 | unmap_single(hwdev, sg->dma_address, sg->dma_length, dir); | |
838 | ||
1da177e4 | 839 | } |
309df0c5 AK |
840 | EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); |
841 | ||
842 | void | |
843 | swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, | |
844 | int dir) | |
845 | { | |
846 | return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL); | |
847 | } | |
874d6a95 | 848 | EXPORT_SYMBOL(swiotlb_unmap_sg); |
1da177e4 LT |
849 | |
850 | /* | |
851 | * Make physical memory consistent for a set of streaming mode DMA translations | |
852 | * after a transfer. | |
853 | * | |
854 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | |
855 | * and usage. | |
856 | */ | |
be6b0267 | 857 | static void |
dbfd49fe | 858 | swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, |
de69e0f0 | 859 | int nelems, int dir, int target) |
1da177e4 | 860 | { |
dbfd49fe | 861 | struct scatterlist *sg; |
1da177e4 LT |
862 | int i; |
863 | ||
380d6878 BB |
864 | for_each_sg(sgl, sg, nelems, i) |
865 | swiotlb_sync_single(hwdev, sg->dma_address, | |
de69e0f0 | 866 | sg->dma_length, dir, target); |
1da177e4 LT |
867 | } |
868 | ||
8270f3f1 JL |
869 | void |
870 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | |
160c1d8e | 871 | int nelems, enum dma_data_direction dir) |
8270f3f1 | 872 | { |
de69e0f0 | 873 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); |
8270f3f1 | 874 | } |
874d6a95 | 875 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); |
8270f3f1 | 876 | |
1da177e4 LT |
877 | void |
878 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | |
160c1d8e | 879 | int nelems, enum dma_data_direction dir) |
1da177e4 | 880 | { |
de69e0f0 | 881 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); |
1da177e4 | 882 | } |
874d6a95 | 883 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); |
1da177e4 LT |
884 | |
885 | int | |
8d8bb39b | 886 | swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) |
1da177e4 | 887 | { |
70a7d3cc | 888 | return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer)); |
1da177e4 | 889 | } |
874d6a95 | 890 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); |
1da177e4 LT |
891 | |
892 | /* | |
17e5ad6c | 893 | * Return whether the given device DMA address mask can be supported |
1da177e4 | 894 | * properly. For example, if your device can only drive the low 24-bits |
17e5ad6c | 895 | * during bus mastering, then you would pass 0x00ffffff as the mask to |
1da177e4 LT |
896 | * this function. |
897 | */ | |
898 | int | |
563aaf06 | 899 | swiotlb_dma_supported(struct device *hwdev, u64 mask) |
1da177e4 | 900 | { |
70a7d3cc | 901 | return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask; |
1da177e4 | 902 | } |
1da177e4 | 903 | EXPORT_SYMBOL(swiotlb_dma_supported); |