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dd165a65 | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
1da177e4 LT |
2 | /* ----------------------------------------------------------------------- * |
3 | * | |
4 | * Copyright 2002-2004 H. Peter Anvin - All Rights Reserved | |
5 | * | |
1da177e4 LT |
6 | * ----------------------------------------------------------------------- */ |
7 | ||
8 | /* | |
a8e026c7 | 9 | * raid6/x86.h |
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10 | * |
11 | * Definitions common to x86 and x86-64 RAID-6 code only | |
12 | */ | |
13 | ||
14 | #ifndef LINUX_RAID_RAID6X86_H | |
15 | #define LINUX_RAID_RAID6X86_H | |
16 | ||
ca5cd877 | 17 | #if (defined(__i386__) || defined(__x86_64__)) && !defined(__arch_um__) |
1da177e4 | 18 | |
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19 | #ifdef __KERNEL__ /* Real code */ |
20 | ||
df6b35f4 | 21 | #include <asm/fpu/api.h> |
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22 | |
23 | #else /* Dummy code for user space testing */ | |
24 | ||
a723406c | 25 | static inline void kernel_fpu_begin(void) |
1da177e4 | 26 | { |
1da177e4 LT |
27 | } |
28 | ||
a723406c | 29 | static inline void kernel_fpu_end(void) |
1da177e4 | 30 | { |
1da177e4 LT |
31 | } |
32 | ||
2dbf7084 JK |
33 | #define __aligned(x) __attribute__((aligned(x))) |
34 | ||
a723406c PA |
35 | #define X86_FEATURE_MMX (0*32+23) /* Multimedia Extensions */ |
36 | #define X86_FEATURE_FXSR (0*32+24) /* FXSAVE and FXRSTOR instructions | |
37 | * (fast save and restore) */ | |
38 | #define X86_FEATURE_XMM (0*32+25) /* Streaming SIMD Extensions */ | |
39 | #define X86_FEATURE_XMM2 (0*32+26) /* Streaming SIMD Extensions-2 */ | |
2dbf7084 JK |
40 | #define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */ |
41 | #define X86_FEATURE_SSSE3 (4*32+ 9) /* Supplemental SSE-3 */ | |
42 | #define X86_FEATURE_AVX (4*32+28) /* Advanced Vector Extensions */ | |
7056741f | 43 | #define X86_FEATURE_AVX2 (9*32+ 5) /* AVX2 instructions */ |
e0a491c1 GK |
44 | #define X86_FEATURE_AVX512F (9*32+16) /* AVX-512 Foundation */ |
45 | #define X86_FEATURE_AVX512DQ (9*32+17) /* AVX-512 DQ (Double/Quad granular) | |
46 | * Instructions | |
47 | */ | |
48 | #define X86_FEATURE_AVX512BW (9*32+30) /* AVX-512 BW (Byte/Word granular) | |
49 | * Instructions | |
50 | */ | |
51 | #define X86_FEATURE_AVX512VL (9*32+31) /* AVX-512 VL (128/256 Vector Length) | |
52 | * Extensions | |
53 | */ | |
a723406c | 54 | #define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */ |
1da177e4 | 55 | |
a723406c PA |
56 | /* Should work well enough on modern CPUs for testing */ |
57 | static inline int boot_cpu_has(int flag) | |
1da177e4 | 58 | { |
7056741f JK |
59 | u32 eax, ebx, ecx, edx; |
60 | ||
61 | eax = (flag & 0x100) ? 7 : | |
62 | (flag & 0x20) ? 0x80000001 : 1; | |
63 | ecx = 0; | |
1da177e4 | 64 | |
a723406c | 65 | asm volatile("cpuid" |
7056741f | 66 | : "+a" (eax), "=b" (ebx), "=d" (edx), "+c" (ecx)); |
1da177e4 | 67 | |
7056741f JK |
68 | return ((flag & 0x100 ? ebx : |
69 | (flag & 0x80) ? ecx : edx) >> (flag & 31)) & 1; | |
1da177e4 LT |
70 | } |
71 | ||
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72 | #endif /* ndef __KERNEL__ */ |
73 | ||
74 | #endif | |
75 | #endif |