Commit | Line | Data |
---|---|---|
b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
f4a18312 | 2 | #include <linux/err.h> |
5ea81769 AV |
3 | #include <linux/pci.h> |
4 | #include <linux/io.h> | |
5a0e3ad6 | 5 | #include <linux/gfp.h> |
8bc3bcc9 | 6 | #include <linux/export.h> |
d5e83827 | 7 | #include <linux/of_address.h> |
5ea81769 | 8 | |
1b723413 YX |
9 | enum devm_ioremap_type { |
10 | DEVM_IOREMAP = 0, | |
11 | DEVM_IOREMAP_NC, | |
e537654b | 12 | DEVM_IOREMAP_UC, |
1b723413 YX |
13 | DEVM_IOREMAP_WC, |
14 | }; | |
15 | ||
b41e5fff | 16 | void devm_ioremap_release(struct device *dev, void *res) |
5ea81769 AV |
17 | { |
18 | iounmap(*(void __iomem **)res); | |
19 | } | |
20 | ||
21 | static int devm_ioremap_match(struct device *dev, void *res, void *match_data) | |
22 | { | |
23 | return *(void **)res == match_data; | |
24 | } | |
25 | ||
1b723413 YX |
26 | static void __iomem *__devm_ioremap(struct device *dev, resource_size_t offset, |
27 | resource_size_t size, | |
28 | enum devm_ioremap_type type) | |
5ea81769 | 29 | { |
1b723413 | 30 | void __iomem **ptr, *addr = NULL; |
5ea81769 AV |
31 | |
32 | ptr = devres_alloc(devm_ioremap_release, sizeof(*ptr), GFP_KERNEL); | |
33 | if (!ptr) | |
34 | return NULL; | |
35 | ||
1b723413 YX |
36 | switch (type) { |
37 | case DEVM_IOREMAP: | |
38 | addr = ioremap(offset, size); | |
39 | break; | |
40 | case DEVM_IOREMAP_NC: | |
41 | addr = ioremap_nocache(offset, size); | |
42 | break; | |
e537654b TZ |
43 | case DEVM_IOREMAP_UC: |
44 | addr = ioremap_uc(offset, size); | |
45 | break; | |
1b723413 YX |
46 | case DEVM_IOREMAP_WC: |
47 | addr = ioremap_wc(offset, size); | |
48 | break; | |
49 | } | |
50 | ||
5ea81769 AV |
51 | if (addr) { |
52 | *ptr = addr; | |
53 | devres_add(dev, ptr); | |
54 | } else | |
55 | devres_free(ptr); | |
56 | ||
57 | return addr; | |
58 | } | |
1b723413 YX |
59 | |
60 | /** | |
61 | * devm_ioremap - Managed ioremap() | |
62 | * @dev: Generic device to remap IO address for | |
63 | * @offset: Resource address to map | |
64 | * @size: Size of map | |
65 | * | |
66 | * Managed ioremap(). Map is automatically unmapped on driver detach. | |
67 | */ | |
68 | void __iomem *devm_ioremap(struct device *dev, resource_size_t offset, | |
69 | resource_size_t size) | |
70 | { | |
71 | return __devm_ioremap(dev, offset, size, DEVM_IOREMAP); | |
72 | } | |
5ea81769 AV |
73 | EXPORT_SYMBOL(devm_ioremap); |
74 | ||
e537654b TZ |
75 | /** |
76 | * devm_ioremap_uc - Managed ioremap_uc() | |
77 | * @dev: Generic device to remap IO address for | |
78 | * @offset: Resource address to map | |
79 | * @size: Size of map | |
80 | * | |
81 | * Managed ioremap_uc(). Map is automatically unmapped on driver detach. | |
82 | */ | |
83 | void __iomem *devm_ioremap_uc(struct device *dev, resource_size_t offset, | |
84 | resource_size_t size) | |
85 | { | |
86 | return __devm_ioremap(dev, offset, size, DEVM_IOREMAP_UC); | |
87 | } | |
88 | EXPORT_SYMBOL_GPL(devm_ioremap_uc); | |
89 | ||
5ea81769 AV |
90 | /** |
91 | * devm_ioremap_nocache - Managed ioremap_nocache() | |
92 | * @dev: Generic device to remap IO address for | |
6524754e | 93 | * @offset: Resource address to map |
5ea81769 AV |
94 | * @size: Size of map |
95 | * | |
96 | * Managed ioremap_nocache(). Map is automatically unmapped on driver | |
97 | * detach. | |
98 | */ | |
4f452e8a | 99 | void __iomem *devm_ioremap_nocache(struct device *dev, resource_size_t offset, |
5559b7bc | 100 | resource_size_t size) |
5ea81769 | 101 | { |
1b723413 | 102 | return __devm_ioremap(dev, offset, size, DEVM_IOREMAP_NC); |
5ea81769 AV |
103 | } |
104 | EXPORT_SYMBOL(devm_ioremap_nocache); | |
105 | ||
34644524 AK |
106 | /** |
107 | * devm_ioremap_wc - Managed ioremap_wc() | |
108 | * @dev: Generic device to remap IO address for | |
6524754e | 109 | * @offset: Resource address to map |
34644524 AK |
110 | * @size: Size of map |
111 | * | |
112 | * Managed ioremap_wc(). Map is automatically unmapped on driver detach. | |
113 | */ | |
114 | void __iomem *devm_ioremap_wc(struct device *dev, resource_size_t offset, | |
115 | resource_size_t size) | |
116 | { | |
1b723413 | 117 | return __devm_ioremap(dev, offset, size, DEVM_IOREMAP_WC); |
34644524 AK |
118 | } |
119 | EXPORT_SYMBOL(devm_ioremap_wc); | |
120 | ||
5ea81769 AV |
121 | /** |
122 | * devm_iounmap - Managed iounmap() | |
123 | * @dev: Generic device to unmap for | |
124 | * @addr: Address to unmap | |
125 | * | |
126 | * Managed iounmap(). @addr must have been mapped using devm_ioremap*(). | |
127 | */ | |
128 | void devm_iounmap(struct device *dev, void __iomem *addr) | |
129 | { | |
5ea81769 | 130 | WARN_ON(devres_destroy(dev, devm_ioremap_release, devm_ioremap_match, |
b104d6a5 | 131 | (__force void *)addr)); |
ae891a1b | 132 | iounmap(addr); |
5ea81769 AV |
133 | } |
134 | EXPORT_SYMBOL(devm_iounmap); | |
135 | ||
6e924822 BG |
136 | static void __iomem * |
137 | __devm_ioremap_resource(struct device *dev, const struct resource *res, | |
138 | enum devm_ioremap_type type) | |
72f8c0bf WS |
139 | { |
140 | resource_size_t size; | |
72f8c0bf WS |
141 | void __iomem *dest_ptr; |
142 | ||
143 | BUG_ON(!dev); | |
144 | ||
145 | if (!res || resource_type(res) != IORESOURCE_MEM) { | |
146 | dev_err(dev, "invalid resource\n"); | |
b104d6a5 | 147 | return IOMEM_ERR_PTR(-EINVAL); |
72f8c0bf WS |
148 | } |
149 | ||
150 | size = resource_size(res); | |
72f8c0bf | 151 | |
8d84b18f | 152 | if (!devm_request_mem_region(dev, res->start, size, dev_name(dev))) { |
72f8c0bf | 153 | dev_err(dev, "can't request region for resource %pR\n", res); |
b104d6a5 | 154 | return IOMEM_ERR_PTR(-EBUSY); |
72f8c0bf WS |
155 | } |
156 | ||
6e924822 | 157 | dest_ptr = __devm_ioremap(dev, res->start, size, type); |
72f8c0bf WS |
158 | if (!dest_ptr) { |
159 | dev_err(dev, "ioremap failed for resource %pR\n", res); | |
160 | devm_release_mem_region(dev, res->start, size); | |
b104d6a5 | 161 | dest_ptr = IOMEM_ERR_PTR(-ENOMEM); |
72f8c0bf WS |
162 | } |
163 | ||
164 | return dest_ptr; | |
165 | } | |
6e924822 BG |
166 | |
167 | /** | |
168 | * devm_ioremap_resource() - check, request region, and ioremap resource | |
169 | * @dev: generic device to handle the resource for | |
170 | * @res: resource to be handled | |
171 | * | |
172 | * Checks that a resource is a valid memory region, requests the memory | |
173 | * region and ioremaps it. All operations are managed and will be undone | |
174 | * on driver detach. | |
175 | * | |
176 | * Returns a pointer to the remapped memory or an ERR_PTR() encoded error code | |
177 | * on failure. Usage example: | |
178 | * | |
179 | * res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
180 | * base = devm_ioremap_resource(&pdev->dev, res); | |
181 | * if (IS_ERR(base)) | |
182 | * return PTR_ERR(base); | |
183 | */ | |
184 | void __iomem *devm_ioremap_resource(struct device *dev, | |
185 | const struct resource *res) | |
186 | { | |
187 | return __devm_ioremap_resource(dev, res, DEVM_IOREMAP); | |
188 | } | |
75096579 TR |
189 | EXPORT_SYMBOL(devm_ioremap_resource); |
190 | ||
b873af62 BG |
191 | /** |
192 | * devm_ioremap_resource_wc() - write-combined variant of | |
193 | * devm_ioremap_resource() | |
194 | * @dev: generic device to handle the resource for | |
195 | * @res: resource to be handled | |
196 | * | |
197 | * Returns a pointer to the remapped memory or an ERR_PTR() encoded error code | |
198 | * on failure. Usage example: | |
199 | */ | |
200 | void __iomem *devm_ioremap_resource_wc(struct device *dev, | |
201 | const struct resource *res) | |
202 | { | |
203 | return __devm_ioremap_resource(dev, res, DEVM_IOREMAP_WC); | |
204 | } | |
205 | ||
d5e83827 BH |
206 | /* |
207 | * devm_of_iomap - Requests a resource and maps the memory mapped IO | |
208 | * for a given device_node managed by a given device | |
209 | * | |
210 | * Checks that a resource is a valid memory region, requests the memory | |
211 | * region and ioremaps it. All operations are managed and will be undone | |
212 | * on driver detach of the device. | |
213 | * | |
214 | * This is to be used when a device requests/maps resources described | |
215 | * by other device tree nodes (children or otherwise). | |
216 | * | |
217 | * @dev: The device "managing" the resource | |
218 | * @node: The device-tree node where the resource resides | |
219 | * @index: index of the MMIO range in the "reg" property | |
220 | * @size: Returns the size of the resource (pass NULL if not needed) | |
221 | * Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded | |
222 | * error code on failure. Usage example: | |
223 | * | |
224 | * base = devm_of_iomap(&pdev->dev, node, 0, NULL); | |
225 | * if (IS_ERR(base)) | |
226 | * return PTR_ERR(base); | |
227 | */ | |
228 | void __iomem *devm_of_iomap(struct device *dev, struct device_node *node, int index, | |
229 | resource_size_t *size) | |
230 | { | |
231 | struct resource res; | |
232 | ||
233 | if (of_address_to_resource(node, index, &res)) | |
234 | return IOMEM_ERR_PTR(-EINVAL); | |
235 | if (size) | |
236 | *size = resource_size(&res); | |
237 | return devm_ioremap_resource(dev, &res); | |
238 | } | |
239 | EXPORT_SYMBOL(devm_of_iomap); | |
240 | ||
ce816fa8 | 241 | #ifdef CONFIG_HAS_IOPORT_MAP |
5ea81769 AV |
242 | /* |
243 | * Generic iomap devres | |
244 | */ | |
245 | static void devm_ioport_map_release(struct device *dev, void *res) | |
246 | { | |
247 | ioport_unmap(*(void __iomem **)res); | |
248 | } | |
249 | ||
250 | static int devm_ioport_map_match(struct device *dev, void *res, | |
251 | void *match_data) | |
252 | { | |
253 | return *(void **)res == match_data; | |
254 | } | |
255 | ||
256 | /** | |
257 | * devm_ioport_map - Managed ioport_map() | |
258 | * @dev: Generic device to map ioport for | |
259 | * @port: Port to map | |
260 | * @nr: Number of ports to map | |
261 | * | |
262 | * Managed ioport_map(). Map is automatically unmapped on driver | |
263 | * detach. | |
264 | */ | |
5cbb00cc | 265 | void __iomem *devm_ioport_map(struct device *dev, unsigned long port, |
5ea81769 AV |
266 | unsigned int nr) |
267 | { | |
268 | void __iomem **ptr, *addr; | |
269 | ||
270 | ptr = devres_alloc(devm_ioport_map_release, sizeof(*ptr), GFP_KERNEL); | |
271 | if (!ptr) | |
272 | return NULL; | |
273 | ||
274 | addr = ioport_map(port, nr); | |
275 | if (addr) { | |
276 | *ptr = addr; | |
277 | devres_add(dev, ptr); | |
278 | } else | |
279 | devres_free(ptr); | |
280 | ||
281 | return addr; | |
282 | } | |
283 | EXPORT_SYMBOL(devm_ioport_map); | |
284 | ||
285 | /** | |
286 | * devm_ioport_unmap - Managed ioport_unmap() | |
287 | * @dev: Generic device to unmap for | |
288 | * @addr: Address to unmap | |
289 | * | |
290 | * Managed ioport_unmap(). @addr must have been mapped using | |
291 | * devm_ioport_map(). | |
292 | */ | |
293 | void devm_ioport_unmap(struct device *dev, void __iomem *addr) | |
294 | { | |
295 | ioport_unmap(addr); | |
296 | WARN_ON(devres_destroy(dev, devm_ioport_map_release, | |
b104d6a5 | 297 | devm_ioport_map_match, (__force void *)addr)); |
5ea81769 AV |
298 | } |
299 | EXPORT_SYMBOL(devm_ioport_unmap); | |
ce816fa8 | 300 | #endif /* CONFIG_HAS_IOPORT_MAP */ |
5ea81769 AV |
301 | |
302 | #ifdef CONFIG_PCI | |
303 | /* | |
304 | * PCI iomap devres | |
305 | */ | |
c9c13ba4 | 306 | #define PCIM_IOMAP_MAX PCI_STD_NUM_BARS |
5ea81769 AV |
307 | |
308 | struct pcim_iomap_devres { | |
309 | void __iomem *table[PCIM_IOMAP_MAX]; | |
310 | }; | |
311 | ||
312 | static void pcim_iomap_release(struct device *gendev, void *res) | |
313 | { | |
20af74ef | 314 | struct pci_dev *dev = to_pci_dev(gendev); |
5ea81769 AV |
315 | struct pcim_iomap_devres *this = res; |
316 | int i; | |
317 | ||
318 | for (i = 0; i < PCIM_IOMAP_MAX; i++) | |
319 | if (this->table[i]) | |
320 | pci_iounmap(dev, this->table[i]); | |
321 | } | |
322 | ||
323 | /** | |
324 | * pcim_iomap_table - access iomap allocation table | |
325 | * @pdev: PCI device to access iomap table for | |
326 | * | |
327 | * Access iomap allocation table for @dev. If iomap table doesn't | |
328 | * exist and @pdev is managed, it will be allocated. All iomaps | |
329 | * recorded in the iomap table are automatically unmapped on driver | |
330 | * detach. | |
331 | * | |
332 | * This function might sleep when the table is first allocated but can | |
333 | * be safely called without context and guaranteed to succed once | |
334 | * allocated. | |
335 | */ | |
5cbb00cc | 336 | void __iomem * const *pcim_iomap_table(struct pci_dev *pdev) |
5ea81769 AV |
337 | { |
338 | struct pcim_iomap_devres *dr, *new_dr; | |
339 | ||
340 | dr = devres_find(&pdev->dev, pcim_iomap_release, NULL, NULL); | |
341 | if (dr) | |
342 | return dr->table; | |
343 | ||
344 | new_dr = devres_alloc(pcim_iomap_release, sizeof(*new_dr), GFP_KERNEL); | |
345 | if (!new_dr) | |
346 | return NULL; | |
347 | dr = devres_get(&pdev->dev, new_dr, NULL, NULL); | |
348 | return dr->table; | |
349 | } | |
350 | EXPORT_SYMBOL(pcim_iomap_table); | |
351 | ||
352 | /** | |
353 | * pcim_iomap - Managed pcim_iomap() | |
354 | * @pdev: PCI device to iomap for | |
355 | * @bar: BAR to iomap | |
356 | * @maxlen: Maximum length of iomap | |
357 | * | |
358 | * Managed pci_iomap(). Map is automatically unmapped on driver | |
359 | * detach. | |
360 | */ | |
5cbb00cc | 361 | void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen) |
5ea81769 AV |
362 | { |
363 | void __iomem **tbl; | |
364 | ||
365 | BUG_ON(bar >= PCIM_IOMAP_MAX); | |
366 | ||
367 | tbl = (void __iomem **)pcim_iomap_table(pdev); | |
368 | if (!tbl || tbl[bar]) /* duplicate mappings not allowed */ | |
369 | return NULL; | |
370 | ||
371 | tbl[bar] = pci_iomap(pdev, bar, maxlen); | |
372 | return tbl[bar]; | |
373 | } | |
374 | EXPORT_SYMBOL(pcim_iomap); | |
375 | ||
376 | /** | |
377 | * pcim_iounmap - Managed pci_iounmap() | |
378 | * @pdev: PCI device to iounmap for | |
379 | * @addr: Address to unmap | |
380 | * | |
381 | * Managed pci_iounmap(). @addr must have been mapped using pcim_iomap(). | |
382 | */ | |
383 | void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr) | |
384 | { | |
385 | void __iomem **tbl; | |
386 | int i; | |
387 | ||
388 | pci_iounmap(pdev, addr); | |
389 | ||
390 | tbl = (void __iomem **)pcim_iomap_table(pdev); | |
391 | BUG_ON(!tbl); | |
392 | ||
393 | for (i = 0; i < PCIM_IOMAP_MAX; i++) | |
394 | if (tbl[i] == addr) { | |
395 | tbl[i] = NULL; | |
396 | return; | |
397 | } | |
398 | WARN_ON(1); | |
399 | } | |
400 | EXPORT_SYMBOL(pcim_iounmap); | |
401 | ||
402 | /** | |
403 | * pcim_iomap_regions - Request and iomap PCI BARs | |
404 | * @pdev: PCI device to map IO resources for | |
405 | * @mask: Mask of BARs to request and iomap | |
406 | * @name: Name used when requesting regions | |
407 | * | |
408 | * Request and iomap regions specified by @mask. | |
409 | */ | |
fb7ebfe4 | 410 | int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name) |
5ea81769 AV |
411 | { |
412 | void __iomem * const *iomap; | |
413 | int i, rc; | |
414 | ||
415 | iomap = pcim_iomap_table(pdev); | |
416 | if (!iomap) | |
417 | return -ENOMEM; | |
418 | ||
419 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { | |
420 | unsigned long len; | |
421 | ||
422 | if (!(mask & (1 << i))) | |
423 | continue; | |
424 | ||
425 | rc = -EINVAL; | |
426 | len = pci_resource_len(pdev, i); | |
427 | if (!len) | |
428 | goto err_inval; | |
429 | ||
430 | rc = pci_request_region(pdev, i, name); | |
431 | if (rc) | |
fb4d64e7 | 432 | goto err_inval; |
5ea81769 AV |
433 | |
434 | rc = -ENOMEM; | |
435 | if (!pcim_iomap(pdev, i, 0)) | |
fb4d64e7 | 436 | goto err_region; |
5ea81769 AV |
437 | } |
438 | ||
439 | return 0; | |
440 | ||
5ea81769 AV |
441 | err_region: |
442 | pci_release_region(pdev, i); | |
443 | err_inval: | |
444 | while (--i >= 0) { | |
fb4d64e7 FD |
445 | if (!(mask & (1 << i))) |
446 | continue; | |
5ea81769 AV |
447 | pcim_iounmap(pdev, iomap[i]); |
448 | pci_release_region(pdev, i); | |
449 | } | |
450 | ||
451 | return rc; | |
452 | } | |
453 | EXPORT_SYMBOL(pcim_iomap_regions); | |
ec04b075 | 454 | |
916fbfb7 TH |
455 | /** |
456 | * pcim_iomap_regions_request_all - Request all BARs and iomap specified ones | |
457 | * @pdev: PCI device to map IO resources for | |
458 | * @mask: Mask of BARs to iomap | |
459 | * @name: Name used when requesting regions | |
460 | * | |
461 | * Request all PCI BARs and iomap regions specified by @mask. | |
462 | */ | |
fb7ebfe4 | 463 | int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask, |
916fbfb7 TH |
464 | const char *name) |
465 | { | |
466 | int request_mask = ((1 << 6) - 1) & ~mask; | |
467 | int rc; | |
468 | ||
469 | rc = pci_request_selected_regions(pdev, request_mask, name); | |
470 | if (rc) | |
471 | return rc; | |
472 | ||
473 | rc = pcim_iomap_regions(pdev, mask, name); | |
474 | if (rc) | |
475 | pci_release_selected_regions(pdev, request_mask); | |
476 | return rc; | |
477 | } | |
478 | EXPORT_SYMBOL(pcim_iomap_regions_request_all); | |
479 | ||
ec04b075 TH |
480 | /** |
481 | * pcim_iounmap_regions - Unmap and release PCI BARs | |
482 | * @pdev: PCI device to map IO resources for | |
483 | * @mask: Mask of BARs to unmap and release | |
484 | * | |
4d45ada3 | 485 | * Unmap and release regions specified by @mask. |
ec04b075 | 486 | */ |
fb7ebfe4 | 487 | void pcim_iounmap_regions(struct pci_dev *pdev, int mask) |
ec04b075 TH |
488 | { |
489 | void __iomem * const *iomap; | |
490 | int i; | |
491 | ||
492 | iomap = pcim_iomap_table(pdev); | |
493 | if (!iomap) | |
494 | return; | |
495 | ||
1f35d04a | 496 | for (i = 0; i < PCIM_IOMAP_MAX; i++) { |
ec04b075 TH |
497 | if (!(mask & (1 << i))) |
498 | continue; | |
499 | ||
500 | pcim_iounmap(pdev, iomap[i]); | |
501 | pci_release_region(pdev, i); | |
502 | } | |
503 | } | |
504 | EXPORT_SYMBOL(pcim_iounmap_regions); | |
571806a9 | 505 | #endif /* CONFIG_PCI */ |