Merge tag 'drm-next-2020-04-08' of git://anongit.freedesktop.org/drm/drm
[linux-block.git] / kernel / sched / topology.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
f2cb1360
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2/*
3 * Scheduler topology setup/handling methods
4 */
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5#include "sched.h"
6
7DEFINE_MUTEX(sched_domains_mutex);
8
9/* Protected by sched_domains_mutex: */
ace80310 10static cpumask_var_t sched_domains_tmpmask;
11static cpumask_var_t sched_domains_tmpmask2;
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12
13#ifdef CONFIG_SCHED_DEBUG
14
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15static int __init sched_debug_setup(char *str)
16{
9469eb01 17 sched_debug_enabled = true;
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18
19 return 0;
20}
21early_param("sched_debug", sched_debug_setup);
22
23static inline bool sched_debug(void)
24{
25 return sched_debug_enabled;
26}
27
28static int sched_domain_debug_one(struct sched_domain *sd, int cpu, int level,
29 struct cpumask *groupmask)
30{
31 struct sched_group *group = sd->groups;
32
33 cpumask_clear(groupmask);
34
005f874d 35 printk(KERN_DEBUG "%*s domain-%d: ", level, "", level);
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36
37 if (!(sd->flags & SD_LOAD_BALANCE)) {
38 printk("does not load-balance\n");
39 if (sd->parent)
97fb7a0a 40 printk(KERN_ERR "ERROR: !SD_LOAD_BALANCE domain has parent");
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41 return -1;
42 }
43
005f874d 44 printk(KERN_CONT "span=%*pbl level=%s\n",
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45 cpumask_pr_args(sched_domain_span(sd)), sd->name);
46
47 if (!cpumask_test_cpu(cpu, sched_domain_span(sd))) {
97fb7a0a 48 printk(KERN_ERR "ERROR: domain->span does not contain CPU%d\n", cpu);
f2cb1360 49 }
6cd0c583 50 if (group && !cpumask_test_cpu(cpu, sched_group_span(group))) {
97fb7a0a 51 printk(KERN_ERR "ERROR: domain->groups does not contain CPU%d\n", cpu);
f2cb1360
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52 }
53
54 printk(KERN_DEBUG "%*s groups:", level + 1, "");
55 do {
56 if (!group) {
57 printk("\n");
58 printk(KERN_ERR "ERROR: group is NULL\n");
59 break;
60 }
61
ae4df9d6 62 if (!cpumask_weight(sched_group_span(group))) {
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63 printk(KERN_CONT "\n");
64 printk(KERN_ERR "ERROR: empty group\n");
65 break;
66 }
67
68 if (!(sd->flags & SD_OVERLAP) &&
ae4df9d6 69 cpumask_intersects(groupmask, sched_group_span(group))) {
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70 printk(KERN_CONT "\n");
71 printk(KERN_ERR "ERROR: repeated CPUs\n");
72 break;
73 }
74
ae4df9d6 75 cpumask_or(groupmask, groupmask, sched_group_span(group));
f2cb1360 76
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PZ
77 printk(KERN_CONT " %d:{ span=%*pbl",
78 group->sgc->id,
ae4df9d6 79 cpumask_pr_args(sched_group_span(group)));
b0151c25 80
af218122 81 if ((sd->flags & SD_OVERLAP) &&
ae4df9d6 82 !cpumask_equal(group_balance_mask(group), sched_group_span(group))) {
005f874d 83 printk(KERN_CONT " mask=%*pbl",
e5c14b1f 84 cpumask_pr_args(group_balance_mask(group)));
b0151c25
PZ
85 }
86
005f874d
PZ
87 if (group->sgc->capacity != SCHED_CAPACITY_SCALE)
88 printk(KERN_CONT " cap=%lu", group->sgc->capacity);
f2cb1360 89
a420b063
PZ
90 if (group == sd->groups && sd->child &&
91 !cpumask_equal(sched_domain_span(sd->child),
ae4df9d6 92 sched_group_span(group))) {
a420b063
PZ
93 printk(KERN_ERR "ERROR: domain->groups does not match domain->child\n");
94 }
95
005f874d
PZ
96 printk(KERN_CONT " }");
97
f2cb1360 98 group = group->next;
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PZ
99
100 if (group != sd->groups)
101 printk(KERN_CONT ",");
102
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103 } while (group != sd->groups);
104 printk(KERN_CONT "\n");
105
106 if (!cpumask_equal(sched_domain_span(sd), groupmask))
107 printk(KERN_ERR "ERROR: groups don't span domain->span\n");
108
109 if (sd->parent &&
110 !cpumask_subset(groupmask, sched_domain_span(sd->parent)))
97fb7a0a 111 printk(KERN_ERR "ERROR: parent span is not a superset of domain->span\n");
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112 return 0;
113}
114
115static void sched_domain_debug(struct sched_domain *sd, int cpu)
116{
117 int level = 0;
118
119 if (!sched_debug_enabled)
120 return;
121
122 if (!sd) {
123 printk(KERN_DEBUG "CPU%d attaching NULL sched-domain.\n", cpu);
124 return;
125 }
126
005f874d 127 printk(KERN_DEBUG "CPU%d attaching sched-domain(s):\n", cpu);
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128
129 for (;;) {
130 if (sched_domain_debug_one(sd, cpu, level, sched_domains_tmpmask))
131 break;
132 level++;
133 sd = sd->parent;
134 if (!sd)
135 break;
136 }
137}
138#else /* !CONFIG_SCHED_DEBUG */
139
140# define sched_debug_enabled 0
141# define sched_domain_debug(sd, cpu) do { } while (0)
142static inline bool sched_debug(void)
143{
144 return false;
145}
146#endif /* CONFIG_SCHED_DEBUG */
147
148static int sd_degenerate(struct sched_domain *sd)
149{
150 if (cpumask_weight(sched_domain_span(sd)) == 1)
151 return 1;
152
153 /* Following flags need at least 2 groups */
154 if (sd->flags & (SD_LOAD_BALANCE |
155 SD_BALANCE_NEWIDLE |
156 SD_BALANCE_FORK |
157 SD_BALANCE_EXEC |
158 SD_SHARE_CPUCAPACITY |
159 SD_ASYM_CPUCAPACITY |
160 SD_SHARE_PKG_RESOURCES |
161 SD_SHARE_POWERDOMAIN)) {
162 if (sd->groups != sd->groups->next)
163 return 0;
164 }
165
166 /* Following flags don't use groups */
167 if (sd->flags & (SD_WAKE_AFFINE))
168 return 0;
169
170 return 1;
171}
172
173static int
174sd_parent_degenerate(struct sched_domain *sd, struct sched_domain *parent)
175{
176 unsigned long cflags = sd->flags, pflags = parent->flags;
177
178 if (sd_degenerate(parent))
179 return 1;
180
181 if (!cpumask_equal(sched_domain_span(sd), sched_domain_span(parent)))
182 return 0;
183
184 /* Flags needing groups don't count if only 1 group in parent */
185 if (parent->groups == parent->groups->next) {
186 pflags &= ~(SD_LOAD_BALANCE |
187 SD_BALANCE_NEWIDLE |
188 SD_BALANCE_FORK |
189 SD_BALANCE_EXEC |
190 SD_ASYM_CPUCAPACITY |
191 SD_SHARE_CPUCAPACITY |
192 SD_SHARE_PKG_RESOURCES |
193 SD_PREFER_SIBLING |
194 SD_SHARE_POWERDOMAIN);
195 if (nr_node_ids == 1)
196 pflags &= ~SD_SERIALIZE;
197 }
198 if (~cflags & pflags)
199 return 0;
200
201 return 1;
202}
203
531b5c9f 204#if defined(CONFIG_ENERGY_MODEL) && defined(CONFIG_CPU_FREQ_GOV_SCHEDUTIL)
f8a696f2 205DEFINE_STATIC_KEY_FALSE(sched_energy_present);
8d5d0cfb 206unsigned int sysctl_sched_energy_aware = 1;
531b5c9f
QP
207DEFINE_MUTEX(sched_energy_mutex);
208bool sched_energy_update;
209
8d5d0cfb
QP
210#ifdef CONFIG_PROC_SYSCTL
211int sched_energy_aware_handler(struct ctl_table *table, int write,
212 void __user *buffer, size_t *lenp, loff_t *ppos)
213{
214 int ret, state;
215
216 if (write && !capable(CAP_SYS_ADMIN))
217 return -EPERM;
218
219 ret = proc_dointvec_minmax(table, write, buffer, lenp, ppos);
220 if (!ret && write) {
221 state = static_branch_unlikely(&sched_energy_present);
222 if (state != sysctl_sched_energy_aware) {
223 mutex_lock(&sched_energy_mutex);
224 sched_energy_update = 1;
225 rebuild_sched_domains();
226 sched_energy_update = 0;
227 mutex_unlock(&sched_energy_mutex);
228 }
229 }
230
231 return ret;
232}
233#endif
234
6aa140fa
QP
235static void free_pd(struct perf_domain *pd)
236{
237 struct perf_domain *tmp;
238
239 while (pd) {
240 tmp = pd->next;
241 kfree(pd);
242 pd = tmp;
243 }
244}
245
246static struct perf_domain *find_pd(struct perf_domain *pd, int cpu)
247{
248 while (pd) {
249 if (cpumask_test_cpu(cpu, perf_domain_span(pd)))
250 return pd;
251 pd = pd->next;
252 }
253
254 return NULL;
255}
256
257static struct perf_domain *pd_init(int cpu)
258{
259 struct em_perf_domain *obj = em_cpu_get(cpu);
260 struct perf_domain *pd;
261
262 if (!obj) {
263 if (sched_debug())
264 pr_info("%s: no EM found for CPU%d\n", __func__, cpu);
265 return NULL;
266 }
267
268 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
269 if (!pd)
270 return NULL;
271 pd->em_pd = obj;
272
273 return pd;
274}
275
276static void perf_domain_debug(const struct cpumask *cpu_map,
277 struct perf_domain *pd)
278{
279 if (!sched_debug() || !pd)
280 return;
281
282 printk(KERN_DEBUG "root_domain %*pbl:", cpumask_pr_args(cpu_map));
283
284 while (pd) {
285 printk(KERN_CONT " pd%d:{ cpus=%*pbl nr_cstate=%d }",
286 cpumask_first(perf_domain_span(pd)),
287 cpumask_pr_args(perf_domain_span(pd)),
288 em_pd_nr_cap_states(pd->em_pd));
289 pd = pd->next;
290 }
291
292 printk(KERN_CONT "\n");
293}
294
295static void destroy_perf_domain_rcu(struct rcu_head *rp)
296{
297 struct perf_domain *pd;
298
299 pd = container_of(rp, struct perf_domain, rcu);
300 free_pd(pd);
301}
302
1f74de87
QP
303static void sched_energy_set(bool has_eas)
304{
305 if (!has_eas && static_branch_unlikely(&sched_energy_present)) {
306 if (sched_debug())
307 pr_info("%s: stopping EAS\n", __func__);
308 static_branch_disable_cpuslocked(&sched_energy_present);
309 } else if (has_eas && !static_branch_unlikely(&sched_energy_present)) {
310 if (sched_debug())
311 pr_info("%s: starting EAS\n", __func__);
312 static_branch_enable_cpuslocked(&sched_energy_present);
313 }
314}
315
b68a4c0d
QP
316/*
317 * EAS can be used on a root domain if it meets all the following conditions:
318 * 1. an Energy Model (EM) is available;
319 * 2. the SD_ASYM_CPUCAPACITY flag is set in the sched_domain hierarchy.
38502ab4
VS
320 * 3. no SMT is detected.
321 * 4. the EM complexity is low enough to keep scheduling overheads low;
322 * 5. schedutil is driving the frequency of all CPUs of the rd;
b68a4c0d
QP
323 *
324 * The complexity of the Energy Model is defined as:
325 *
326 * C = nr_pd * (nr_cpus + nr_cs)
327 *
328 * with parameters defined as:
329 * - nr_pd: the number of performance domains
330 * - nr_cpus: the number of CPUs
331 * - nr_cs: the sum of the number of capacity states of all performance
332 * domains (for example, on a system with 2 performance domains,
333 * with 10 capacity states each, nr_cs = 2 * 10 = 20).
334 *
335 * It is generally not a good idea to use such a model in the wake-up path on
336 * very complex platforms because of the associated scheduling overheads. The
337 * arbitrary constraint below prevents that. It makes EAS usable up to 16 CPUs
338 * with per-CPU DVFS and less than 8 capacity states each, for example.
339 */
340#define EM_MAX_COMPLEXITY 2048
341
531b5c9f 342extern struct cpufreq_governor schedutil_gov;
1f74de87 343static bool build_perf_domains(const struct cpumask *cpu_map)
6aa140fa 344{
b68a4c0d 345 int i, nr_pd = 0, nr_cs = 0, nr_cpus = cpumask_weight(cpu_map);
6aa140fa
QP
346 struct perf_domain *pd = NULL, *tmp;
347 int cpu = cpumask_first(cpu_map);
348 struct root_domain *rd = cpu_rq(cpu)->rd;
531b5c9f
QP
349 struct cpufreq_policy *policy;
350 struct cpufreq_governor *gov;
b68a4c0d 351
8d5d0cfb
QP
352 if (!sysctl_sched_energy_aware)
353 goto free;
354
b68a4c0d
QP
355 /* EAS is enabled for asymmetric CPU capacity topologies. */
356 if (!per_cpu(sd_asym_cpucapacity, cpu)) {
357 if (sched_debug()) {
358 pr_info("rd %*pbl: CPUs do not have asymmetric capacities\n",
359 cpumask_pr_args(cpu_map));
360 }
361 goto free;
362 }
6aa140fa 363
38502ab4
VS
364 /* EAS definitely does *not* handle SMT */
365 if (sched_smt_active()) {
366 pr_warn("rd %*pbl: Disabling EAS, SMT is not supported\n",
367 cpumask_pr_args(cpu_map));
368 goto free;
369 }
370
6aa140fa
QP
371 for_each_cpu(i, cpu_map) {
372 /* Skip already covered CPUs. */
373 if (find_pd(pd, i))
374 continue;
375
531b5c9f
QP
376 /* Do not attempt EAS if schedutil is not being used. */
377 policy = cpufreq_cpu_get(i);
378 if (!policy)
379 goto free;
380 gov = policy->governor;
381 cpufreq_cpu_put(policy);
382 if (gov != &schedutil_gov) {
383 if (rd->pd)
384 pr_warn("rd %*pbl: Disabling EAS, schedutil is mandatory\n",
385 cpumask_pr_args(cpu_map));
386 goto free;
387 }
388
6aa140fa
QP
389 /* Create the new pd and add it to the local list. */
390 tmp = pd_init(i);
391 if (!tmp)
392 goto free;
393 tmp->next = pd;
394 pd = tmp;
b68a4c0d
QP
395
396 /*
397 * Count performance domains and capacity states for the
398 * complexity check.
399 */
400 nr_pd++;
401 nr_cs += em_pd_nr_cap_states(pd->em_pd);
402 }
403
404 /* Bail out if the Energy Model complexity is too high. */
405 if (nr_pd * (nr_cs + nr_cpus) > EM_MAX_COMPLEXITY) {
406 WARN(1, "rd %*pbl: Failed to start EAS, EM complexity is too high\n",
407 cpumask_pr_args(cpu_map));
408 goto free;
6aa140fa
QP
409 }
410
411 perf_domain_debug(cpu_map, pd);
412
413 /* Attach the new list of performance domains to the root domain. */
414 tmp = rd->pd;
415 rcu_assign_pointer(rd->pd, pd);
416 if (tmp)
417 call_rcu(&tmp->rcu, destroy_perf_domain_rcu);
418
1f74de87 419 return !!pd;
6aa140fa
QP
420
421free:
422 free_pd(pd);
423 tmp = rd->pd;
424 rcu_assign_pointer(rd->pd, NULL);
425 if (tmp)
426 call_rcu(&tmp->rcu, destroy_perf_domain_rcu);
1f74de87
QP
427
428 return false;
6aa140fa
QP
429}
430#else
431static void free_pd(struct perf_domain *pd) { }
531b5c9f 432#endif /* CONFIG_ENERGY_MODEL && CONFIG_CPU_FREQ_GOV_SCHEDUTIL*/
6aa140fa 433
f2cb1360
IM
434static void free_rootdomain(struct rcu_head *rcu)
435{
436 struct root_domain *rd = container_of(rcu, struct root_domain, rcu);
437
438 cpupri_cleanup(&rd->cpupri);
439 cpudl_cleanup(&rd->cpudl);
440 free_cpumask_var(rd->dlo_mask);
441 free_cpumask_var(rd->rto_mask);
442 free_cpumask_var(rd->online);
443 free_cpumask_var(rd->span);
6aa140fa 444 free_pd(rd->pd);
f2cb1360
IM
445 kfree(rd);
446}
447
448void rq_attach_root(struct rq *rq, struct root_domain *rd)
449{
450 struct root_domain *old_rd = NULL;
451 unsigned long flags;
452
453 raw_spin_lock_irqsave(&rq->lock, flags);
454
455 if (rq->rd) {
456 old_rd = rq->rd;
457
458 if (cpumask_test_cpu(rq->cpu, old_rd->online))
459 set_rq_offline(rq);
460
461 cpumask_clear_cpu(rq->cpu, old_rd->span);
462
463 /*
464 * If we dont want to free the old_rd yet then
465 * set old_rd to NULL to skip the freeing later
466 * in this function:
467 */
468 if (!atomic_dec_and_test(&old_rd->refcount))
469 old_rd = NULL;
470 }
471
472 atomic_inc(&rd->refcount);
473 rq->rd = rd;
474
475 cpumask_set_cpu(rq->cpu, rd->span);
476 if (cpumask_test_cpu(rq->cpu, cpu_active_mask))
477 set_rq_online(rq);
478
479 raw_spin_unlock_irqrestore(&rq->lock, flags);
480
481 if (old_rd)
337e9b07 482 call_rcu(&old_rd->rcu, free_rootdomain);
f2cb1360
IM
483}
484
364f5665
SRV
485void sched_get_rd(struct root_domain *rd)
486{
487 atomic_inc(&rd->refcount);
488}
489
490void sched_put_rd(struct root_domain *rd)
491{
492 if (!atomic_dec_and_test(&rd->refcount))
493 return;
494
337e9b07 495 call_rcu(&rd->rcu, free_rootdomain);
364f5665
SRV
496}
497
f2cb1360
IM
498static int init_rootdomain(struct root_domain *rd)
499{
f2cb1360
IM
500 if (!zalloc_cpumask_var(&rd->span, GFP_KERNEL))
501 goto out;
502 if (!zalloc_cpumask_var(&rd->online, GFP_KERNEL))
503 goto free_span;
504 if (!zalloc_cpumask_var(&rd->dlo_mask, GFP_KERNEL))
505 goto free_online;
506 if (!zalloc_cpumask_var(&rd->rto_mask, GFP_KERNEL))
507 goto free_dlo_mask;
508
4bdced5c
SRRH
509#ifdef HAVE_RT_PUSH_IPI
510 rd->rto_cpu = -1;
511 raw_spin_lock_init(&rd->rto_lock);
512 init_irq_work(&rd->rto_push_work, rto_push_irq_work_func);
513#endif
514
f2cb1360
IM
515 init_dl_bw(&rd->dl_bw);
516 if (cpudl_init(&rd->cpudl) != 0)
517 goto free_rto_mask;
518
519 if (cpupri_init(&rd->cpupri) != 0)
520 goto free_cpudl;
521 return 0;
522
523free_cpudl:
524 cpudl_cleanup(&rd->cpudl);
525free_rto_mask:
526 free_cpumask_var(rd->rto_mask);
527free_dlo_mask:
528 free_cpumask_var(rd->dlo_mask);
529free_online:
530 free_cpumask_var(rd->online);
531free_span:
532 free_cpumask_var(rd->span);
533out:
534 return -ENOMEM;
535}
536
537/*
538 * By default the system creates a single root-domain with all CPUs as
539 * members (mimicking the global state we have today).
540 */
541struct root_domain def_root_domain;
542
543void init_defrootdomain(void)
544{
545 init_rootdomain(&def_root_domain);
546
547 atomic_set(&def_root_domain.refcount, 1);
548}
549
550static struct root_domain *alloc_rootdomain(void)
551{
552 struct root_domain *rd;
553
4d13a06d 554 rd = kzalloc(sizeof(*rd), GFP_KERNEL);
f2cb1360
IM
555 if (!rd)
556 return NULL;
557
558 if (init_rootdomain(rd) != 0) {
559 kfree(rd);
560 return NULL;
561 }
562
563 return rd;
564}
565
566static void free_sched_groups(struct sched_group *sg, int free_sgc)
567{
568 struct sched_group *tmp, *first;
569
570 if (!sg)
571 return;
572
573 first = sg;
574 do {
575 tmp = sg->next;
576
577 if (free_sgc && atomic_dec_and_test(&sg->sgc->ref))
578 kfree(sg->sgc);
579
213c5a45
SW
580 if (atomic_dec_and_test(&sg->ref))
581 kfree(sg);
f2cb1360
IM
582 sg = tmp;
583 } while (sg != first);
584}
585
586static void destroy_sched_domain(struct sched_domain *sd)
587{
588 /*
a090c4f2
PZ
589 * A normal sched domain may have multiple group references, an
590 * overlapping domain, having private groups, only one. Iterate,
591 * dropping group/capacity references, freeing where none remain.
f2cb1360 592 */
213c5a45
SW
593 free_sched_groups(sd->groups, 1);
594
f2cb1360
IM
595 if (sd->shared && atomic_dec_and_test(&sd->shared->ref))
596 kfree(sd->shared);
597 kfree(sd);
598}
599
600static void destroy_sched_domains_rcu(struct rcu_head *rcu)
601{
602 struct sched_domain *sd = container_of(rcu, struct sched_domain, rcu);
603
604 while (sd) {
605 struct sched_domain *parent = sd->parent;
606 destroy_sched_domain(sd);
607 sd = parent;
608 }
609}
610
611static void destroy_sched_domains(struct sched_domain *sd)
612{
613 if (sd)
614 call_rcu(&sd->rcu, destroy_sched_domains_rcu);
615}
616
617/*
618 * Keep a special pointer to the highest sched_domain that has
619 * SD_SHARE_PKG_RESOURCE set (Last Level Cache Domain) for this
620 * allows us to avoid some pointer chasing select_idle_sibling().
621 *
622 * Also keep a unique ID per domain (we use the first CPU number in
623 * the cpumask of the domain), this allows us to quickly tell if
624 * two CPUs are in the same cache domain, see cpus_share_cache().
625 */
994aeb7a 626DEFINE_PER_CPU(struct sched_domain __rcu *, sd_llc);
f2cb1360
IM
627DEFINE_PER_CPU(int, sd_llc_size);
628DEFINE_PER_CPU(int, sd_llc_id);
994aeb7a
JFG
629DEFINE_PER_CPU(struct sched_domain_shared __rcu *, sd_llc_shared);
630DEFINE_PER_CPU(struct sched_domain __rcu *, sd_numa);
631DEFINE_PER_CPU(struct sched_domain __rcu *, sd_asym_packing);
632DEFINE_PER_CPU(struct sched_domain __rcu *, sd_asym_cpucapacity);
df054e84 633DEFINE_STATIC_KEY_FALSE(sched_asym_cpucapacity);
f2cb1360
IM
634
635static void update_top_cache_domain(int cpu)
636{
637 struct sched_domain_shared *sds = NULL;
638 struct sched_domain *sd;
639 int id = cpu;
640 int size = 1;
641
642 sd = highest_flag_domain(cpu, SD_SHARE_PKG_RESOURCES);
643 if (sd) {
644 id = cpumask_first(sched_domain_span(sd));
645 size = cpumask_weight(sched_domain_span(sd));
646 sds = sd->shared;
647 }
648
649 rcu_assign_pointer(per_cpu(sd_llc, cpu), sd);
650 per_cpu(sd_llc_size, cpu) = size;
651 per_cpu(sd_llc_id, cpu) = id;
652 rcu_assign_pointer(per_cpu(sd_llc_shared, cpu), sds);
653
654 sd = lowest_flag_domain(cpu, SD_NUMA);
655 rcu_assign_pointer(per_cpu(sd_numa, cpu), sd);
656
657 sd = highest_flag_domain(cpu, SD_ASYM_PACKING);
011b27bb
QP
658 rcu_assign_pointer(per_cpu(sd_asym_packing, cpu), sd);
659
660 sd = lowest_flag_domain(cpu, SD_ASYM_CPUCAPACITY);
661 rcu_assign_pointer(per_cpu(sd_asym_cpucapacity, cpu), sd);
f2cb1360
IM
662}
663
664/*
665 * Attach the domain 'sd' to 'cpu' as its base domain. Callers must
666 * hold the hotplug lock.
667 */
668static void
669cpu_attach_domain(struct sched_domain *sd, struct root_domain *rd, int cpu)
670{
671 struct rq *rq = cpu_rq(cpu);
672 struct sched_domain *tmp;
673
674 /* Remove the sched domains which do not contribute to scheduling. */
675 for (tmp = sd; tmp; ) {
676 struct sched_domain *parent = tmp->parent;
677 if (!parent)
678 break;
679
680 if (sd_parent_degenerate(tmp, parent)) {
681 tmp->parent = parent->parent;
682 if (parent->parent)
683 parent->parent->child = tmp;
684 /*
685 * Transfer SD_PREFER_SIBLING down in case of a
686 * degenerate parent; the spans match for this
687 * so the property transfers.
688 */
689 if (parent->flags & SD_PREFER_SIBLING)
690 tmp->flags |= SD_PREFER_SIBLING;
691 destroy_sched_domain(parent);
692 } else
693 tmp = tmp->parent;
694 }
695
696 if (sd && sd_degenerate(sd)) {
697 tmp = sd;
698 sd = sd->parent;
699 destroy_sched_domain(tmp);
700 if (sd)
701 sd->child = NULL;
702 }
703
704 sched_domain_debug(sd, cpu);
705
706 rq_attach_root(rq, rd);
707 tmp = rq->sd;
708 rcu_assign_pointer(rq->sd, sd);
bbdacdfe 709 dirty_sched_domain_sysctl(cpu);
f2cb1360
IM
710 destroy_sched_domains(tmp);
711
712 update_top_cache_domain(cpu);
713}
714
f2cb1360 715struct s_data {
99687cdb 716 struct sched_domain * __percpu *sd;
f2cb1360
IM
717 struct root_domain *rd;
718};
719
720enum s_alloc {
721 sa_rootdomain,
722 sa_sd,
723 sa_sd_storage,
724 sa_none,
725};
726
35a566e6
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727/*
728 * Return the canonical balance CPU for this group, this is the first CPU
e5c14b1f 729 * of this group that's also in the balance mask.
35a566e6 730 *
e5c14b1f
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731 * The balance mask are all those CPUs that could actually end up at this
732 * group. See build_balance_mask().
35a566e6
PZ
733 *
734 * Also see should_we_balance().
735 */
736int group_balance_cpu(struct sched_group *sg)
737{
e5c14b1f 738 return cpumask_first(group_balance_mask(sg));
35a566e6
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739}
740
741
742/*
743 * NUMA topology (first read the regular topology blurb below)
744 *
745 * Given a node-distance table, for example:
746 *
747 * node 0 1 2 3
748 * 0: 10 20 30 20
749 * 1: 20 10 20 30
750 * 2: 30 20 10 20
751 * 3: 20 30 20 10
752 *
753 * which represents a 4 node ring topology like:
754 *
755 * 0 ----- 1
756 * | |
757 * | |
758 * | |
759 * 3 ----- 2
760 *
761 * We want to construct domains and groups to represent this. The way we go
762 * about doing this is to build the domains on 'hops'. For each NUMA level we
763 * construct the mask of all nodes reachable in @level hops.
764 *
765 * For the above NUMA topology that gives 3 levels:
766 *
767 * NUMA-2 0-3 0-3 0-3 0-3
768 * groups: {0-1,3},{1-3} {0-2},{0,2-3} {1-3},{0-1,3} {0,2-3},{0-2}
769 *
770 * NUMA-1 0-1,3 0-2 1-3 0,2-3
771 * groups: {0},{1},{3} {0},{1},{2} {1},{2},{3} {0},{2},{3}
772 *
773 * NUMA-0 0 1 2 3
774 *
775 *
776 * As can be seen; things don't nicely line up as with the regular topology.
777 * When we iterate a domain in child domain chunks some nodes can be
778 * represented multiple times -- hence the "overlap" naming for this part of
779 * the topology.
780 *
781 * In order to minimize this overlap, we only build enough groups to cover the
782 * domain. For instance Node-0 NUMA-2 would only get groups: 0-1,3 and 1-3.
783 *
784 * Because:
785 *
786 * - the first group of each domain is its child domain; this
787 * gets us the first 0-1,3
788 * - the only uncovered node is 2, who's child domain is 1-3.
789 *
790 * However, because of the overlap, computing a unique CPU for each group is
791 * more complicated. Consider for instance the groups of NODE-1 NUMA-2, both
792 * groups include the CPUs of Node-0, while those CPUs would not in fact ever
793 * end up at those groups (they would end up in group: 0-1,3).
794 *
e5c14b1f 795 * To correct this we have to introduce the group balance mask. This mask
35a566e6
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796 * will contain those CPUs in the group that can reach this group given the
797 * (child) domain tree.
798 *
799 * With this we can once again compute balance_cpu and sched_group_capacity
800 * relations.
801 *
802 * XXX include words on how balance_cpu is unique and therefore can be
803 * used for sched_group_capacity links.
804 *
805 *
806 * Another 'interesting' topology is:
807 *
808 * node 0 1 2 3
809 * 0: 10 20 20 30
810 * 1: 20 10 20 20
811 * 2: 20 20 10 20
812 * 3: 30 20 20 10
813 *
814 * Which looks a little like:
815 *
816 * 0 ----- 1
817 * | / |
818 * | / |
819 * | / |
820 * 2 ----- 3
821 *
822 * This topology is asymmetric, nodes 1,2 are fully connected, but nodes 0,3
823 * are not.
824 *
825 * This leads to a few particularly weird cases where the sched_domain's are
97fb7a0a 826 * not of the same number for each CPU. Consider:
35a566e6
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827 *
828 * NUMA-2 0-3 0-3
829 * groups: {0-2},{1-3} {1-3},{0-2}
830 *
831 * NUMA-1 0-2 0-3 0-3 1-3
832 *
833 * NUMA-0 0 1 2 3
834 *
835 */
836
837
f2cb1360 838/*
e5c14b1f
PZ
839 * Build the balance mask; it contains only those CPUs that can arrive at this
840 * group and should be considered to continue balancing.
35a566e6
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841 *
842 * We do this during the group creation pass, therefore the group information
843 * isn't complete yet, however since each group represents a (child) domain we
844 * can fully construct this using the sched_domain bits (which are already
845 * complete).
f2cb1360 846 */
1676330e 847static void
e5c14b1f 848build_balance_mask(struct sched_domain *sd, struct sched_group *sg, struct cpumask *mask)
f2cb1360 849{
ae4df9d6 850 const struct cpumask *sg_span = sched_group_span(sg);
f2cb1360
IM
851 struct sd_data *sdd = sd->private;
852 struct sched_domain *sibling;
853 int i;
854
1676330e
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855 cpumask_clear(mask);
856
f32d782e 857 for_each_cpu(i, sg_span) {
f2cb1360 858 sibling = *per_cpu_ptr(sdd->sd, i);
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859
860 /*
861 * Can happen in the asymmetric case, where these siblings are
862 * unused. The mask will not be empty because those CPUs that
863 * do have the top domain _should_ span the domain.
864 */
865 if (!sibling->child)
866 continue;
867
868 /* If we would not end up here, we can't continue from here */
869 if (!cpumask_equal(sg_span, sched_domain_span(sibling->child)))
f2cb1360
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870 continue;
871
1676330e 872 cpumask_set_cpu(i, mask);
f2cb1360 873 }
73bb059f
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874
875 /* We must not have empty masks here */
1676330e 876 WARN_ON_ONCE(cpumask_empty(mask));
f2cb1360
IM
877}
878
879/*
35a566e6
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880 * XXX: This creates per-node group entries; since the load-balancer will
881 * immediately access remote memory to construct this group's load-balance
882 * statistics having the groups node local is of dubious benefit.
f2cb1360 883 */
8c033469
LRV
884static struct sched_group *
885build_group_from_child_sched_domain(struct sched_domain *sd, int cpu)
886{
887 struct sched_group *sg;
888 struct cpumask *sg_span;
889
890 sg = kzalloc_node(sizeof(struct sched_group) + cpumask_size(),
891 GFP_KERNEL, cpu_to_node(cpu));
892
893 if (!sg)
894 return NULL;
895
ae4df9d6 896 sg_span = sched_group_span(sg);
8c033469
LRV
897 if (sd->child)
898 cpumask_copy(sg_span, sched_domain_span(sd->child));
899 else
900 cpumask_copy(sg_span, sched_domain_span(sd));
901
213c5a45 902 atomic_inc(&sg->ref);
8c033469
LRV
903 return sg;
904}
905
906static void init_overlap_sched_group(struct sched_domain *sd,
1676330e 907 struct sched_group *sg)
8c033469 908{
1676330e 909 struct cpumask *mask = sched_domains_tmpmask2;
8c033469
LRV
910 struct sd_data *sdd = sd->private;
911 struct cpumask *sg_span;
1676330e
PZ
912 int cpu;
913
e5c14b1f 914 build_balance_mask(sd, sg, mask);
ae4df9d6 915 cpu = cpumask_first_and(sched_group_span(sg), mask);
8c033469
LRV
916
917 sg->sgc = *per_cpu_ptr(sdd->sgc, cpu);
918 if (atomic_inc_return(&sg->sgc->ref) == 1)
e5c14b1f 919 cpumask_copy(group_balance_mask(sg), mask);
35a566e6 920 else
e5c14b1f 921 WARN_ON_ONCE(!cpumask_equal(group_balance_mask(sg), mask));
8c033469
LRV
922
923 /*
924 * Initialize sgc->capacity such that even if we mess up the
925 * domains and no possible iteration will get us here, we won't
926 * die on a /0 trap.
927 */
ae4df9d6 928 sg_span = sched_group_span(sg);
8c033469
LRV
929 sg->sgc->capacity = SCHED_CAPACITY_SCALE * cpumask_weight(sg_span);
930 sg->sgc->min_capacity = SCHED_CAPACITY_SCALE;
e3d6d0cb 931 sg->sgc->max_capacity = SCHED_CAPACITY_SCALE;
8c033469
LRV
932}
933
f2cb1360
IM
934static int
935build_overlap_sched_groups(struct sched_domain *sd, int cpu)
936{
91eaed0d 937 struct sched_group *first = NULL, *last = NULL, *sg;
f2cb1360
IM
938 const struct cpumask *span = sched_domain_span(sd);
939 struct cpumask *covered = sched_domains_tmpmask;
940 struct sd_data *sdd = sd->private;
941 struct sched_domain *sibling;
942 int i;
943
944 cpumask_clear(covered);
945
0372dd27 946 for_each_cpu_wrap(i, span, cpu) {
f2cb1360
IM
947 struct cpumask *sg_span;
948
949 if (cpumask_test_cpu(i, covered))
950 continue;
951
952 sibling = *per_cpu_ptr(sdd->sd, i);
953
c20e1ea4
LRV
954 /*
955 * Asymmetric node setups can result in situations where the
956 * domain tree is of unequal depth, make sure to skip domains
957 * that already cover the entire range.
958 *
959 * In that case build_sched_domains() will have terminated the
960 * iteration early and our sibling sd spans will be empty.
961 * Domains should always include the CPU they're built on, so
962 * check that.
963 */
f2cb1360
IM
964 if (!cpumask_test_cpu(i, sched_domain_span(sibling)))
965 continue;
966
8c033469 967 sg = build_group_from_child_sched_domain(sibling, cpu);
f2cb1360
IM
968 if (!sg)
969 goto fail;
970
ae4df9d6 971 sg_span = sched_group_span(sg);
f2cb1360
IM
972 cpumask_or(covered, covered, sg_span);
973
1676330e 974 init_overlap_sched_group(sd, sg);
f2cb1360 975
f2cb1360
IM
976 if (!first)
977 first = sg;
978 if (last)
979 last->next = sg;
980 last = sg;
981 last->next = first;
982 }
91eaed0d 983 sd->groups = first;
f2cb1360
IM
984
985 return 0;
986
987fail:
988 free_sched_groups(first, 0);
989
990 return -ENOMEM;
991}
992
35a566e6
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993
994/*
995 * Package topology (also see the load-balance blurb in fair.c)
996 *
997 * The scheduler builds a tree structure to represent a number of important
998 * topology features. By default (default_topology[]) these include:
999 *
1000 * - Simultaneous multithreading (SMT)
1001 * - Multi-Core Cache (MC)
1002 * - Package (DIE)
1003 *
1004 * Where the last one more or less denotes everything up to a NUMA node.
1005 *
1006 * The tree consists of 3 primary data structures:
1007 *
1008 * sched_domain -> sched_group -> sched_group_capacity
1009 * ^ ^ ^ ^
1010 * `-' `-'
1011 *
97fb7a0a 1012 * The sched_domains are per-CPU and have a two way link (parent & child) and
35a566e6
PZ
1013 * denote the ever growing mask of CPUs belonging to that level of topology.
1014 *
1015 * Each sched_domain has a circular (double) linked list of sched_group's, each
1016 * denoting the domains of the level below (or individual CPUs in case of the
1017 * first domain level). The sched_group linked by a sched_domain includes the
1018 * CPU of that sched_domain [*].
1019 *
1020 * Take for instance a 2 threaded, 2 core, 2 cache cluster part:
1021 *
1022 * CPU 0 1 2 3 4 5 6 7
1023 *
1024 * DIE [ ]
1025 * MC [ ] [ ]
1026 * SMT [ ] [ ] [ ] [ ]
1027 *
1028 * - or -
1029 *
1030 * DIE 0-7 0-7 0-7 0-7 0-7 0-7 0-7 0-7
1031 * MC 0-3 0-3 0-3 0-3 4-7 4-7 4-7 4-7
1032 * SMT 0-1 0-1 2-3 2-3 4-5 4-5 6-7 6-7
1033 *
1034 * CPU 0 1 2 3 4 5 6 7
1035 *
1036 * One way to think about it is: sched_domain moves you up and down among these
1037 * topology levels, while sched_group moves you sideways through it, at child
1038 * domain granularity.
1039 *
1040 * sched_group_capacity ensures each unique sched_group has shared storage.
1041 *
1042 * There are two related construction problems, both require a CPU that
1043 * uniquely identify each group (for a given domain):
1044 *
1045 * - The first is the balance_cpu (see should_we_balance() and the
1046 * load-balance blub in fair.c); for each group we only want 1 CPU to
1047 * continue balancing at a higher domain.
1048 *
1049 * - The second is the sched_group_capacity; we want all identical groups
1050 * to share a single sched_group_capacity.
1051 *
1052 * Since these topologies are exclusive by construction. That is, its
1053 * impossible for an SMT thread to belong to multiple cores, and cores to
1054 * be part of multiple caches. There is a very clear and unique location
1055 * for each CPU in the hierarchy.
1056 *
1057 * Therefore computing a unique CPU for each group is trivial (the iteration
1058 * mask is redundant and set all 1s; all CPUs in a group will end up at _that_
1059 * group), we can simply pick the first CPU in each group.
1060 *
1061 *
1062 * [*] in other words, the first group of each domain is its child domain.
1063 */
1064
0c0e776a 1065static struct sched_group *get_group(int cpu, struct sd_data *sdd)
f2cb1360
IM
1066{
1067 struct sched_domain *sd = *per_cpu_ptr(sdd->sd, cpu);
1068 struct sched_domain *child = sd->child;
0c0e776a 1069 struct sched_group *sg;
67d4f6ff 1070 bool already_visited;
f2cb1360
IM
1071
1072 if (child)
1073 cpu = cpumask_first(sched_domain_span(child));
1074
0c0e776a
PZ
1075 sg = *per_cpu_ptr(sdd->sg, cpu);
1076 sg->sgc = *per_cpu_ptr(sdd->sgc, cpu);
1077
67d4f6ff
VS
1078 /* Increase refcounts for claim_allocations: */
1079 already_visited = atomic_inc_return(&sg->ref) > 1;
1080 /* sgc visits should follow a similar trend as sg */
1081 WARN_ON(already_visited != (atomic_inc_return(&sg->sgc->ref) > 1));
1082
1083 /* If we have already visited that group, it's already initialized. */
1084 if (already_visited)
1085 return sg;
f2cb1360 1086
0c0e776a 1087 if (child) {
ae4df9d6
PZ
1088 cpumask_copy(sched_group_span(sg), sched_domain_span(child));
1089 cpumask_copy(group_balance_mask(sg), sched_group_span(sg));
0c0e776a 1090 } else {
ae4df9d6 1091 cpumask_set_cpu(cpu, sched_group_span(sg));
e5c14b1f 1092 cpumask_set_cpu(cpu, group_balance_mask(sg));
f2cb1360
IM
1093 }
1094
ae4df9d6 1095 sg->sgc->capacity = SCHED_CAPACITY_SCALE * cpumask_weight(sched_group_span(sg));
0c0e776a 1096 sg->sgc->min_capacity = SCHED_CAPACITY_SCALE;
e3d6d0cb 1097 sg->sgc->max_capacity = SCHED_CAPACITY_SCALE;
0c0e776a
PZ
1098
1099 return sg;
f2cb1360
IM
1100}
1101
1102/*
1103 * build_sched_groups will build a circular linked list of the groups
d8743230
VS
1104 * covered by the given span, will set each group's ->cpumask correctly,
1105 * and will initialize their ->sgc.
f2cb1360
IM
1106 *
1107 * Assumes the sched_domain tree is fully constructed
1108 */
1109static int
1110build_sched_groups(struct sched_domain *sd, int cpu)
1111{
1112 struct sched_group *first = NULL, *last = NULL;
1113 struct sd_data *sdd = sd->private;
1114 const struct cpumask *span = sched_domain_span(sd);
1115 struct cpumask *covered;
1116 int i;
1117
f2cb1360
IM
1118 lockdep_assert_held(&sched_domains_mutex);
1119 covered = sched_domains_tmpmask;
1120
1121 cpumask_clear(covered);
1122
0c0e776a 1123 for_each_cpu_wrap(i, span, cpu) {
f2cb1360 1124 struct sched_group *sg;
f2cb1360
IM
1125
1126 if (cpumask_test_cpu(i, covered))
1127 continue;
1128
0c0e776a 1129 sg = get_group(i, sdd);
f2cb1360 1130
ae4df9d6 1131 cpumask_or(covered, covered, sched_group_span(sg));
f2cb1360
IM
1132
1133 if (!first)
1134 first = sg;
1135 if (last)
1136 last->next = sg;
1137 last = sg;
1138 }
1139 last->next = first;
0c0e776a 1140 sd->groups = first;
f2cb1360
IM
1141
1142 return 0;
1143}
1144
1145/*
1146 * Initialize sched groups cpu_capacity.
1147 *
1148 * cpu_capacity indicates the capacity of sched group, which is used while
1149 * distributing the load between different sched groups in a sched domain.
1150 * Typically cpu_capacity for all the groups in a sched domain will be same
1151 * unless there are asymmetries in the topology. If there are asymmetries,
1152 * group having more cpu_capacity will pickup more load compared to the
1153 * group having less cpu_capacity.
1154 */
1155static void init_sched_groups_capacity(int cpu, struct sched_domain *sd)
1156{
1157 struct sched_group *sg = sd->groups;
1158
1159 WARN_ON(!sg);
1160
1161 do {
1162 int cpu, max_cpu = -1;
1163
ae4df9d6 1164 sg->group_weight = cpumask_weight(sched_group_span(sg));
f2cb1360
IM
1165
1166 if (!(sd->flags & SD_ASYM_PACKING))
1167 goto next;
1168
ae4df9d6 1169 for_each_cpu(cpu, sched_group_span(sg)) {
f2cb1360
IM
1170 if (max_cpu < 0)
1171 max_cpu = cpu;
1172 else if (sched_asym_prefer(cpu, max_cpu))
1173 max_cpu = cpu;
1174 }
1175 sg->asym_prefer_cpu = max_cpu;
1176
1177next:
1178 sg = sg->next;
1179 } while (sg != sd->groups);
1180
1181 if (cpu != group_balance_cpu(sg))
1182 return;
1183
1184 update_group_capacity(sd, cpu);
1185}
1186
1187/*
1188 * Initializers for schedule domains
1189 * Non-inlined to reduce accumulated stack pressure in build_sched_domains()
1190 */
1191
1192static int default_relax_domain_level = -1;
1193int sched_domain_level_max;
1194
1195static int __init setup_relax_domain_level(char *str)
1196{
1197 if (kstrtoint(str, 0, &default_relax_domain_level))
1198 pr_warn("Unable to set relax_domain_level\n");
1199
1200 return 1;
1201}
1202__setup("relax_domain_level=", setup_relax_domain_level);
1203
1204static void set_domain_attribute(struct sched_domain *sd,
1205 struct sched_domain_attr *attr)
1206{
1207 int request;
1208
1209 if (!attr || attr->relax_domain_level < 0) {
1210 if (default_relax_domain_level < 0)
1211 return;
9ae7ab20 1212 request = default_relax_domain_level;
f2cb1360
IM
1213 } else
1214 request = attr->relax_domain_level;
9ae7ab20
VS
1215
1216 if (sd->level > request) {
f2cb1360
IM
1217 /* Turn off idle balance on this domain: */
1218 sd->flags &= ~(SD_BALANCE_WAKE|SD_BALANCE_NEWIDLE);
f2cb1360
IM
1219 }
1220}
1221
1222static void __sdt_free(const struct cpumask *cpu_map);
1223static int __sdt_alloc(const struct cpumask *cpu_map);
1224
1225static void __free_domain_allocs(struct s_data *d, enum s_alloc what,
1226 const struct cpumask *cpu_map)
1227{
1228 switch (what) {
1229 case sa_rootdomain:
1230 if (!atomic_read(&d->rd->refcount))
1231 free_rootdomain(&d->rd->rcu);
1232 /* Fall through */
1233 case sa_sd:
1234 free_percpu(d->sd);
1235 /* Fall through */
1236 case sa_sd_storage:
1237 __sdt_free(cpu_map);
1238 /* Fall through */
1239 case sa_none:
1240 break;
1241 }
1242}
1243
1244static enum s_alloc
1245__visit_domain_allocation_hell(struct s_data *d, const struct cpumask *cpu_map)
1246{
1247 memset(d, 0, sizeof(*d));
1248
1249 if (__sdt_alloc(cpu_map))
1250 return sa_sd_storage;
1251 d->sd = alloc_percpu(struct sched_domain *);
1252 if (!d->sd)
1253 return sa_sd_storage;
1254 d->rd = alloc_rootdomain();
1255 if (!d->rd)
1256 return sa_sd;
97fb7a0a 1257
f2cb1360
IM
1258 return sa_rootdomain;
1259}
1260
1261/*
1262 * NULL the sd_data elements we've used to build the sched_domain and
1263 * sched_group structure so that the subsequent __free_domain_allocs()
1264 * will not free the data we're using.
1265 */
1266static void claim_allocations(int cpu, struct sched_domain *sd)
1267{
1268 struct sd_data *sdd = sd->private;
1269
1270 WARN_ON_ONCE(*per_cpu_ptr(sdd->sd, cpu) != sd);
1271 *per_cpu_ptr(sdd->sd, cpu) = NULL;
1272
1273 if (atomic_read(&(*per_cpu_ptr(sdd->sds, cpu))->ref))
1274 *per_cpu_ptr(sdd->sds, cpu) = NULL;
1275
1276 if (atomic_read(&(*per_cpu_ptr(sdd->sg, cpu))->ref))
1277 *per_cpu_ptr(sdd->sg, cpu) = NULL;
1278
1279 if (atomic_read(&(*per_cpu_ptr(sdd->sgc, cpu))->ref))
1280 *per_cpu_ptr(sdd->sgc, cpu) = NULL;
1281}
1282
1283#ifdef CONFIG_NUMA
f2cb1360 1284enum numa_topology_type sched_numa_topology_type;
97fb7a0a
IM
1285
1286static int sched_domains_numa_levels;
1287static int sched_domains_curr_level;
1288
1289int sched_max_numa_distance;
1290static int *sched_domains_numa_distance;
1291static struct cpumask ***sched_domains_numa_masks;
a55c7454 1292int __read_mostly node_reclaim_distance = RECLAIM_DISTANCE;
f2cb1360
IM
1293#endif
1294
1295/*
1296 * SD_flags allowed in topology descriptions.
1297 *
1298 * These flags are purely descriptive of the topology and do not prescribe
1299 * behaviour. Behaviour is artificial and mapped in the below sd_init()
1300 * function:
1301 *
1302 * SD_SHARE_CPUCAPACITY - describes SMT topologies
1303 * SD_SHARE_PKG_RESOURCES - describes shared caches
1304 * SD_NUMA - describes NUMA topologies
1305 * SD_SHARE_POWERDOMAIN - describes shared power domain
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1306 *
1307 * Odd one out, which beside describing the topology has a quirk also
1308 * prescribes the desired behaviour that goes along with it:
1309 *
1310 * SD_ASYM_PACKING - describes SMT quirks
1311 */
1312#define TOPOLOGY_SD_FLAGS \
97fb7a0a 1313 (SD_SHARE_CPUCAPACITY | \
f2cb1360 1314 SD_SHARE_PKG_RESOURCES | \
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1315 SD_NUMA | \
1316 SD_ASYM_PACKING | \
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1317 SD_SHARE_POWERDOMAIN)
1318
1319static struct sched_domain *
1320sd_init(struct sched_domain_topology_level *tl,
1321 const struct cpumask *cpu_map,
05484e09 1322 struct sched_domain *child, int dflags, int cpu)
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1323{
1324 struct sd_data *sdd = &tl->data;
1325 struct sched_domain *sd = *per_cpu_ptr(sdd->sd, cpu);
1326 int sd_id, sd_weight, sd_flags = 0;
1327
1328#ifdef CONFIG_NUMA
1329 /*
1330 * Ugly hack to pass state to sd_numa_mask()...
1331 */
1332 sched_domains_curr_level = tl->numa_level;
1333#endif
1334
1335 sd_weight = cpumask_weight(tl->mask(cpu));
1336
1337 if (tl->sd_flags)
1338 sd_flags = (*tl->sd_flags)();
1339 if (WARN_ONCE(sd_flags & ~TOPOLOGY_SD_FLAGS,
1340 "wrong sd_flags in topology description\n"))
1341 sd_flags &= ~TOPOLOGY_SD_FLAGS;
1342
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1343 /* Apply detected topology flags */
1344 sd_flags |= dflags;
1345
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1346 *sd = (struct sched_domain){
1347 .min_interval = sd_weight,
1348 .max_interval = 2*sd_weight,
1349 .busy_factor = 32,
1350 .imbalance_pct = 125,
1351
1352 .cache_nice_tries = 0,
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1353
1354 .flags = 1*SD_LOAD_BALANCE
1355 | 1*SD_BALANCE_NEWIDLE
1356 | 1*SD_BALANCE_EXEC
1357 | 1*SD_BALANCE_FORK
1358 | 0*SD_BALANCE_WAKE
1359 | 1*SD_WAKE_AFFINE
1360 | 0*SD_SHARE_CPUCAPACITY
1361 | 0*SD_SHARE_PKG_RESOURCES
1362 | 0*SD_SERIALIZE
9c63e84d 1363 | 1*SD_PREFER_SIBLING
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1364 | 0*SD_NUMA
1365 | sd_flags
1366 ,
1367
1368 .last_balance = jiffies,
1369 .balance_interval = sd_weight,
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1370 .max_newidle_lb_cost = 0,
1371 .next_decay_max_lb_cost = jiffies,
1372 .child = child,
1373#ifdef CONFIG_SCHED_DEBUG
1374 .name = tl->name,
1375#endif
1376 };
1377
1378 cpumask_and(sched_domain_span(sd), cpu_map, tl->mask(cpu));
1379 sd_id = cpumask_first(sched_domain_span(sd));
1380
1381 /*
1382 * Convert topological properties into behaviour.
1383 */
1384
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1385 /* Don't attempt to spread across CPUs of different capacities. */
1386 if ((sd->flags & SD_ASYM_CPUCAPACITY) && sd->child)
1387 sd->child->flags &= ~SD_PREFER_SIBLING;
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1388
1389 if (sd->flags & SD_SHARE_CPUCAPACITY) {
f2cb1360 1390 sd->imbalance_pct = 110;
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1391
1392 } else if (sd->flags & SD_SHARE_PKG_RESOURCES) {
1393 sd->imbalance_pct = 117;
1394 sd->cache_nice_tries = 1;
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1395
1396#ifdef CONFIG_NUMA
1397 } else if (sd->flags & SD_NUMA) {
1398 sd->cache_nice_tries = 2;
f2cb1360 1399
9c63e84d 1400 sd->flags &= ~SD_PREFER_SIBLING;
f2cb1360 1401 sd->flags |= SD_SERIALIZE;
a55c7454 1402 if (sched_domains_numa_distance[tl->numa_level] > node_reclaim_distance) {
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1403 sd->flags &= ~(SD_BALANCE_EXEC |
1404 SD_BALANCE_FORK |
1405 SD_WAKE_AFFINE);
1406 }
1407
1408#endif
1409 } else {
f2cb1360 1410 sd->cache_nice_tries = 1;
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1411 }
1412
1413 /*
1414 * For all levels sharing cache; connect a sched_domain_shared
1415 * instance.
1416 */
1417 if (sd->flags & SD_SHARE_PKG_RESOURCES) {
1418 sd->shared = *per_cpu_ptr(sdd->sds, sd_id);
1419 atomic_inc(&sd->shared->ref);
1420 atomic_set(&sd->shared->nr_busy_cpus, sd_weight);
1421 }
1422
1423 sd->private = sdd;
1424
1425 return sd;
1426}
1427
1428/*
1429 * Topology list, bottom-up.
1430 */
1431static struct sched_domain_topology_level default_topology[] = {
1432#ifdef CONFIG_SCHED_SMT
1433 { cpu_smt_mask, cpu_smt_flags, SD_INIT_NAME(SMT) },
1434#endif
1435#ifdef CONFIG_SCHED_MC
1436 { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
1437#endif
1438 { cpu_cpu_mask, SD_INIT_NAME(DIE) },
1439 { NULL, },
1440};
1441
1442static struct sched_domain_topology_level *sched_domain_topology =
1443 default_topology;
1444
1445#define for_each_sd_topology(tl) \
1446 for (tl = sched_domain_topology; tl->mask; tl++)
1447
1448void set_sched_topology(struct sched_domain_topology_level *tl)
1449{
1450 if (WARN_ON_ONCE(sched_smp_initialized))
1451 return;
1452
1453 sched_domain_topology = tl;
1454}
1455
1456#ifdef CONFIG_NUMA
1457
1458static const struct cpumask *sd_numa_mask(int cpu)
1459{
1460 return sched_domains_numa_masks[sched_domains_curr_level][cpu_to_node(cpu)];
1461}
1462
1463static void sched_numa_warn(const char *str)
1464{
1465 static int done = false;
1466 int i,j;
1467
1468 if (done)
1469 return;
1470
1471 done = true;
1472
1473 printk(KERN_WARNING "ERROR: %s\n\n", str);
1474
1475 for (i = 0; i < nr_node_ids; i++) {
1476 printk(KERN_WARNING " ");
1477 for (j = 0; j < nr_node_ids; j++)
1478 printk(KERN_CONT "%02d ", node_distance(i,j));
1479 printk(KERN_CONT "\n");
1480 }
1481 printk(KERN_WARNING "\n");
1482}
1483
1484bool find_numa_distance(int distance)
1485{
1486 int i;
1487
1488 if (distance == node_distance(0, 0))
1489 return true;
1490
1491 for (i = 0; i < sched_domains_numa_levels; i++) {
1492 if (sched_domains_numa_distance[i] == distance)
1493 return true;
1494 }
1495
1496 return false;
1497}
1498
1499/*
1500 * A system can have three types of NUMA topology:
1501 * NUMA_DIRECT: all nodes are directly connected, or not a NUMA system
1502 * NUMA_GLUELESS_MESH: some nodes reachable through intermediary nodes
1503 * NUMA_BACKPLANE: nodes can reach other nodes through a backplane
1504 *
1505 * The difference between a glueless mesh topology and a backplane
1506 * topology lies in whether communication between not directly
1507 * connected nodes goes through intermediary nodes (where programs
1508 * could run), or through backplane controllers. This affects
1509 * placement of programs.
1510 *
1511 * The type of topology can be discerned with the following tests:
1512 * - If the maximum distance between any nodes is 1 hop, the system
1513 * is directly connected.
1514 * - If for two nodes A and B, located N > 1 hops away from each other,
1515 * there is an intermediary node C, which is < N hops away from both
1516 * nodes A and B, the system is a glueless mesh.
1517 */
1518static void init_numa_topology_type(void)
1519{
1520 int a, b, c, n;
1521
1522 n = sched_max_numa_distance;
1523
e5e96faf 1524 if (sched_domains_numa_levels <= 2) {
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1525 sched_numa_topology_type = NUMA_DIRECT;
1526 return;
1527 }
1528
1529 for_each_online_node(a) {
1530 for_each_online_node(b) {
1531 /* Find two nodes furthest removed from each other. */
1532 if (node_distance(a, b) < n)
1533 continue;
1534
1535 /* Is there an intermediary node between a and b? */
1536 for_each_online_node(c) {
1537 if (node_distance(a, c) < n &&
1538 node_distance(b, c) < n) {
1539 sched_numa_topology_type =
1540 NUMA_GLUELESS_MESH;
1541 return;
1542 }
1543 }
1544
1545 sched_numa_topology_type = NUMA_BACKPLANE;
1546 return;
1547 }
1548 }
1549}
1550
1551void sched_init_numa(void)
1552{
1553 int next_distance, curr_distance = node_distance(0, 0);
1554 struct sched_domain_topology_level *tl;
1555 int level = 0;
1556 int i, j, k;
1557
993f0b05 1558 sched_domains_numa_distance = kzalloc(sizeof(int) * (nr_node_ids + 1), GFP_KERNEL);
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1559 if (!sched_domains_numa_distance)
1560 return;
1561
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SS
1562 /* Includes NUMA identity node at level 0. */
1563 sched_domains_numa_distance[level++] = curr_distance;
1564 sched_domains_numa_levels = level;
1565
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1566 /*
1567 * O(nr_nodes^2) deduplicating selection sort -- in order to find the
1568 * unique distances in the node_distance() table.
1569 *
1570 * Assumes node_distance(0,j) includes all distances in
1571 * node_distance(i,j) in order to avoid cubic time.
1572 */
1573 next_distance = curr_distance;
1574 for (i = 0; i < nr_node_ids; i++) {
1575 for (j = 0; j < nr_node_ids; j++) {
1576 for (k = 0; k < nr_node_ids; k++) {
1577 int distance = node_distance(i, k);
1578
1579 if (distance > curr_distance &&
1580 (distance < next_distance ||
1581 next_distance == curr_distance))
1582 next_distance = distance;
1583
1584 /*
1585 * While not a strong assumption it would be nice to know
1586 * about cases where if node A is connected to B, B is not
1587 * equally connected to A.
1588 */
1589 if (sched_debug() && node_distance(k, i) != distance)
1590 sched_numa_warn("Node-distance not symmetric");
1591
1592 if (sched_debug() && i && !find_numa_distance(distance))
1593 sched_numa_warn("Node-0 not representative");
1594 }
1595 if (next_distance != curr_distance) {
1596 sched_domains_numa_distance[level++] = next_distance;
1597 sched_domains_numa_levels = level;
1598 curr_distance = next_distance;
1599 } else break;
1600 }
1601
1602 /*
1603 * In case of sched_debug() we verify the above assumption.
1604 */
1605 if (!sched_debug())
1606 break;
1607 }
1608
f2cb1360 1609 /*
051f3ca0 1610 * 'level' contains the number of unique distances
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1611 *
1612 * The sched_domains_numa_distance[] array includes the actual distance
1613 * numbers.
1614 */
1615
1616 /*
1617 * Here, we should temporarily reset sched_domains_numa_levels to 0.
1618 * If it fails to allocate memory for array sched_domains_numa_masks[][],
1619 * the array will contain less then 'level' members. This could be
1620 * dangerous when we use it to iterate array sched_domains_numa_masks[][]
1621 * in other functions.
1622 *
1623 * We reset it to 'level' at the end of this function.
1624 */
1625 sched_domains_numa_levels = 0;
1626
1627 sched_domains_numa_masks = kzalloc(sizeof(void *) * level, GFP_KERNEL);
1628 if (!sched_domains_numa_masks)
1629 return;
1630
1631 /*
1632 * Now for each level, construct a mask per node which contains all
1633 * CPUs of nodes that are that many hops away from us.
1634 */
1635 for (i = 0; i < level; i++) {
1636 sched_domains_numa_masks[i] =
1637 kzalloc(nr_node_ids * sizeof(void *), GFP_KERNEL);
1638 if (!sched_domains_numa_masks[i])
1639 return;
1640
1641 for (j = 0; j < nr_node_ids; j++) {
1642 struct cpumask *mask = kzalloc(cpumask_size(), GFP_KERNEL);
1643 if (!mask)
1644 return;
1645
1646 sched_domains_numa_masks[i][j] = mask;
1647
1648 for_each_node(k) {
1649 if (node_distance(j, k) > sched_domains_numa_distance[i])
1650 continue;
1651
1652 cpumask_or(mask, mask, cpumask_of_node(k));
1653 }
1654 }
1655 }
1656
1657 /* Compute default topology size */
1658 for (i = 0; sched_domain_topology[i].mask; i++);
1659
1660 tl = kzalloc((i + level + 1) *
1661 sizeof(struct sched_domain_topology_level), GFP_KERNEL);
1662 if (!tl)
1663 return;
1664
1665 /*
1666 * Copy the default topology bits..
1667 */
1668 for (i = 0; sched_domain_topology[i].mask; i++)
1669 tl[i] = sched_domain_topology[i];
1670
051f3ca0
SS
1671 /*
1672 * Add the NUMA identity distance, aka single NODE.
1673 */
1674 tl[i++] = (struct sched_domain_topology_level){
1675 .mask = sd_numa_mask,
1676 .numa_level = 0,
1677 SD_INIT_NAME(NODE)
1678 };
1679
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1680 /*
1681 * .. and append 'j' levels of NUMA goodness.
1682 */
051f3ca0 1683 for (j = 1; j < level; i++, j++) {
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1684 tl[i] = (struct sched_domain_topology_level){
1685 .mask = sd_numa_mask,
1686 .sd_flags = cpu_numa_flags,
1687 .flags = SDTL_OVERLAP,
1688 .numa_level = j,
1689 SD_INIT_NAME(NUMA)
1690 };
1691 }
1692
1693 sched_domain_topology = tl;
1694
1695 sched_domains_numa_levels = level;
1696 sched_max_numa_distance = sched_domains_numa_distance[level - 1];
1697
1698 init_numa_topology_type();
1699}
1700
1701void sched_domains_numa_masks_set(unsigned int cpu)
1702{
1703 int node = cpu_to_node(cpu);
1704 int i, j;
1705
1706 for (i = 0; i < sched_domains_numa_levels; i++) {
1707 for (j = 0; j < nr_node_ids; j++) {
1708 if (node_distance(j, node) <= sched_domains_numa_distance[i])
1709 cpumask_set_cpu(cpu, sched_domains_numa_masks[i][j]);
1710 }
1711 }
1712}
1713
1714void sched_domains_numa_masks_clear(unsigned int cpu)
1715{
1716 int i, j;
1717
1718 for (i = 0; i < sched_domains_numa_levels; i++) {
1719 for (j = 0; j < nr_node_ids; j++)
1720 cpumask_clear_cpu(cpu, sched_domains_numa_masks[i][j]);
1721 }
1722}
1723
e0e8d491
WL
1724/*
1725 * sched_numa_find_closest() - given the NUMA topology, find the cpu
1726 * closest to @cpu from @cpumask.
1727 * cpumask: cpumask to find a cpu from
1728 * cpu: cpu to be close to
1729 *
1730 * returns: cpu, or nr_cpu_ids when nothing found.
1731 */
1732int sched_numa_find_closest(const struct cpumask *cpus, int cpu)
1733{
1734 int i, j = cpu_to_node(cpu);
1735
1736 for (i = 0; i < sched_domains_numa_levels; i++) {
1737 cpu = cpumask_any_and(cpus, sched_domains_numa_masks[i][j]);
1738 if (cpu < nr_cpu_ids)
1739 return cpu;
1740 }
1741 return nr_cpu_ids;
1742}
1743
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1744#endif /* CONFIG_NUMA */
1745
1746static int __sdt_alloc(const struct cpumask *cpu_map)
1747{
1748 struct sched_domain_topology_level *tl;
1749 int j;
1750
1751 for_each_sd_topology(tl) {
1752 struct sd_data *sdd = &tl->data;
1753
1754 sdd->sd = alloc_percpu(struct sched_domain *);
1755 if (!sdd->sd)
1756 return -ENOMEM;
1757
1758 sdd->sds = alloc_percpu(struct sched_domain_shared *);
1759 if (!sdd->sds)
1760 return -ENOMEM;
1761
1762 sdd->sg = alloc_percpu(struct sched_group *);
1763 if (!sdd->sg)
1764 return -ENOMEM;
1765
1766 sdd->sgc = alloc_percpu(struct sched_group_capacity *);
1767 if (!sdd->sgc)
1768 return -ENOMEM;
1769
1770 for_each_cpu(j, cpu_map) {
1771 struct sched_domain *sd;
1772 struct sched_domain_shared *sds;
1773 struct sched_group *sg;
1774 struct sched_group_capacity *sgc;
1775
1776 sd = kzalloc_node(sizeof(struct sched_domain) + cpumask_size(),
1777 GFP_KERNEL, cpu_to_node(j));
1778 if (!sd)
1779 return -ENOMEM;
1780
1781 *per_cpu_ptr(sdd->sd, j) = sd;
1782
1783 sds = kzalloc_node(sizeof(struct sched_domain_shared),
1784 GFP_KERNEL, cpu_to_node(j));
1785 if (!sds)
1786 return -ENOMEM;
1787
1788 *per_cpu_ptr(sdd->sds, j) = sds;
1789
1790 sg = kzalloc_node(sizeof(struct sched_group) + cpumask_size(),
1791 GFP_KERNEL, cpu_to_node(j));
1792 if (!sg)
1793 return -ENOMEM;
1794
1795 sg->next = sg;
1796
1797 *per_cpu_ptr(sdd->sg, j) = sg;
1798
1799 sgc = kzalloc_node(sizeof(struct sched_group_capacity) + cpumask_size(),
1800 GFP_KERNEL, cpu_to_node(j));
1801 if (!sgc)
1802 return -ENOMEM;
1803
005f874d
PZ
1804#ifdef CONFIG_SCHED_DEBUG
1805 sgc->id = j;
1806#endif
1807
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IM
1808 *per_cpu_ptr(sdd->sgc, j) = sgc;
1809 }
1810 }
1811
1812 return 0;
1813}
1814
1815static void __sdt_free(const struct cpumask *cpu_map)
1816{
1817 struct sched_domain_topology_level *tl;
1818 int j;
1819
1820 for_each_sd_topology(tl) {
1821 struct sd_data *sdd = &tl->data;
1822
1823 for_each_cpu(j, cpu_map) {
1824 struct sched_domain *sd;
1825
1826 if (sdd->sd) {
1827 sd = *per_cpu_ptr(sdd->sd, j);
1828 if (sd && (sd->flags & SD_OVERLAP))
1829 free_sched_groups(sd->groups, 0);
1830 kfree(*per_cpu_ptr(sdd->sd, j));
1831 }
1832
1833 if (sdd->sds)
1834 kfree(*per_cpu_ptr(sdd->sds, j));
1835 if (sdd->sg)
1836 kfree(*per_cpu_ptr(sdd->sg, j));
1837 if (sdd->sgc)
1838 kfree(*per_cpu_ptr(sdd->sgc, j));
1839 }
1840 free_percpu(sdd->sd);
1841 sdd->sd = NULL;
1842 free_percpu(sdd->sds);
1843 sdd->sds = NULL;
1844 free_percpu(sdd->sg);
1845 sdd->sg = NULL;
1846 free_percpu(sdd->sgc);
1847 sdd->sgc = NULL;
1848 }
1849}
1850
181a80d1 1851static struct sched_domain *build_sched_domain(struct sched_domain_topology_level *tl,
f2cb1360 1852 const struct cpumask *cpu_map, struct sched_domain_attr *attr,
05484e09 1853 struct sched_domain *child, int dflags, int cpu)
f2cb1360 1854{
05484e09 1855 struct sched_domain *sd = sd_init(tl, cpu_map, child, dflags, cpu);
f2cb1360
IM
1856
1857 if (child) {
1858 sd->level = child->level + 1;
1859 sched_domain_level_max = max(sched_domain_level_max, sd->level);
1860 child->parent = sd;
1861
1862 if (!cpumask_subset(sched_domain_span(child),
1863 sched_domain_span(sd))) {
1864 pr_err("BUG: arch topology borken\n");
1865#ifdef CONFIG_SCHED_DEBUG
1866 pr_err(" the %s domain not a subset of the %s domain\n",
1867 child->name, sd->name);
1868#endif
97fb7a0a 1869 /* Fixup, ensure @sd has at least @child CPUs. */
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1870 cpumask_or(sched_domain_span(sd),
1871 sched_domain_span(sd),
1872 sched_domain_span(child));
1873 }
1874
1875 }
1876 set_domain_attribute(sd, attr);
1877
1878 return sd;
1879}
1880
ccf74128
VS
1881/*
1882 * Ensure topology masks are sane, i.e. there are no conflicts (overlaps) for
1883 * any two given CPUs at this (non-NUMA) topology level.
1884 */
1885static bool topology_span_sane(struct sched_domain_topology_level *tl,
1886 const struct cpumask *cpu_map, int cpu)
1887{
1888 int i;
1889
1890 /* NUMA levels are allowed to overlap */
1891 if (tl->flags & SDTL_OVERLAP)
1892 return true;
1893
1894 /*
1895 * Non-NUMA levels cannot partially overlap - they must be either
1896 * completely equal or completely disjoint. Otherwise we can end up
1897 * breaking the sched_group lists - i.e. a later get_group() pass
1898 * breaks the linking done for an earlier span.
1899 */
1900 for_each_cpu(i, cpu_map) {
1901 if (i == cpu)
1902 continue;
1903 /*
1904 * We should 'and' all those masks with 'cpu_map' to exactly
1905 * match the topology we're about to build, but that can only
1906 * remove CPUs, which only lessens our ability to detect
1907 * overlaps
1908 */
1909 if (!cpumask_equal(tl->mask(cpu), tl->mask(i)) &&
1910 cpumask_intersects(tl->mask(cpu), tl->mask(i)))
1911 return false;
1912 }
1913
1914 return true;
1915}
1916
05484e09
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1917/*
1918 * Find the sched_domain_topology_level where all CPU capacities are visible
1919 * for all CPUs.
1920 */
1921static struct sched_domain_topology_level
1922*asym_cpu_capacity_level(const struct cpumask *cpu_map)
1923{
1924 int i, j, asym_level = 0;
1925 bool asym = false;
1926 struct sched_domain_topology_level *tl, *asym_tl = NULL;
1927 unsigned long cap;
1928
1929 /* Is there any asymmetry? */
8ec59c0f 1930 cap = arch_scale_cpu_capacity(cpumask_first(cpu_map));
05484e09
MR
1931
1932 for_each_cpu(i, cpu_map) {
8ec59c0f 1933 if (arch_scale_cpu_capacity(i) != cap) {
05484e09
MR
1934 asym = true;
1935 break;
1936 }
1937 }
1938
1939 if (!asym)
1940 return NULL;
1941
1942 /*
1943 * Examine topology from all CPU's point of views to detect the lowest
1944 * sched_domain_topology_level where a highest capacity CPU is visible
1945 * to everyone.
1946 */
1947 for_each_cpu(i, cpu_map) {
8ec59c0f 1948 unsigned long max_capacity = arch_scale_cpu_capacity(i);
05484e09
MR
1949 int tl_id = 0;
1950
1951 for_each_sd_topology(tl) {
1952 if (tl_id < asym_level)
1953 goto next_level;
1954
1955 for_each_cpu_and(j, tl->mask(i), cpu_map) {
1956 unsigned long capacity;
1957
8ec59c0f 1958 capacity = arch_scale_cpu_capacity(j);
05484e09
MR
1959
1960 if (capacity <= max_capacity)
1961 continue;
1962
1963 max_capacity = capacity;
1964 asym_level = tl_id;
1965 asym_tl = tl;
1966 }
1967next_level:
1968 tl_id++;
1969 }
1970 }
1971
1972 return asym_tl;
1973}
1974
1975
f2cb1360
IM
1976/*
1977 * Build sched domains for a given set of CPUs and attach the sched domains
1978 * to the individual CPUs
1979 */
1980static int
1981build_sched_domains(const struct cpumask *cpu_map, struct sched_domain_attr *attr)
1982{
cd1cb335 1983 enum s_alloc alloc_state = sa_none;
f2cb1360
IM
1984 struct sched_domain *sd;
1985 struct s_data d;
1986 struct rq *rq = NULL;
1987 int i, ret = -ENOMEM;
05484e09 1988 struct sched_domain_topology_level *tl_asym;
df054e84 1989 bool has_asym = false;
f2cb1360 1990
cd1cb335
VS
1991 if (WARN_ON(cpumask_empty(cpu_map)))
1992 goto error;
1993
f2cb1360
IM
1994 alloc_state = __visit_domain_allocation_hell(&d, cpu_map);
1995 if (alloc_state != sa_rootdomain)
1996 goto error;
1997
05484e09
MR
1998 tl_asym = asym_cpu_capacity_level(cpu_map);
1999
f2cb1360
IM
2000 /* Set up domains for CPUs specified by the cpu_map: */
2001 for_each_cpu(i, cpu_map) {
2002 struct sched_domain_topology_level *tl;
2003
2004 sd = NULL;
2005 for_each_sd_topology(tl) {
05484e09
MR
2006 int dflags = 0;
2007
df054e84 2008 if (tl == tl_asym) {
05484e09 2009 dflags |= SD_ASYM_CPUCAPACITY;
df054e84
MR
2010 has_asym = true;
2011 }
05484e09 2012
ccf74128
VS
2013 if (WARN_ON(!topology_span_sane(tl, cpu_map, i)))
2014 goto error;
2015
05484e09
MR
2016 sd = build_sched_domain(tl, cpu_map, attr, sd, dflags, i);
2017
f2cb1360
IM
2018 if (tl == sched_domain_topology)
2019 *per_cpu_ptr(d.sd, i) = sd;
af85596c 2020 if (tl->flags & SDTL_OVERLAP)
f2cb1360
IM
2021 sd->flags |= SD_OVERLAP;
2022 if (cpumask_equal(cpu_map, sched_domain_span(sd)))
2023 break;
2024 }
2025 }
2026
2027 /* Build the groups for the domains */
2028 for_each_cpu(i, cpu_map) {
2029 for (sd = *per_cpu_ptr(d.sd, i); sd; sd = sd->parent) {
2030 sd->span_weight = cpumask_weight(sched_domain_span(sd));
2031 if (sd->flags & SD_OVERLAP) {
2032 if (build_overlap_sched_groups(sd, i))
2033 goto error;
2034 } else {
2035 if (build_sched_groups(sd, i))
2036 goto error;
2037 }
2038 }
2039 }
2040
2041 /* Calculate CPU capacity for physical packages and nodes */
2042 for (i = nr_cpumask_bits-1; i >= 0; i--) {
2043 if (!cpumask_test_cpu(i, cpu_map))
2044 continue;
2045
2046 for (sd = *per_cpu_ptr(d.sd, i); sd; sd = sd->parent) {
2047 claim_allocations(i, sd);
2048 init_sched_groups_capacity(i, sd);
2049 }
2050 }
2051
2052 /* Attach the domains */
2053 rcu_read_lock();
2054 for_each_cpu(i, cpu_map) {
2055 rq = cpu_rq(i);
2056 sd = *per_cpu_ptr(d.sd, i);
2057
2058 /* Use READ_ONCE()/WRITE_ONCE() to avoid load/store tearing: */
2059 if (rq->cpu_capacity_orig > READ_ONCE(d.rd->max_cpu_capacity))
2060 WRITE_ONCE(d.rd->max_cpu_capacity, rq->cpu_capacity_orig);
2061
2062 cpu_attach_domain(sd, d.rd, i);
2063 }
2064 rcu_read_unlock();
2065
df054e84 2066 if (has_asym)
e284df70 2067 static_branch_inc_cpuslocked(&sched_asym_cpucapacity);
df054e84 2068
f2cb1360 2069 if (rq && sched_debug_enabled) {
bf5015a5 2070 pr_info("root domain span: %*pbl (max cpu_capacity = %lu)\n",
f2cb1360
IM
2071 cpumask_pr_args(cpu_map), rq->rd->max_cpu_capacity);
2072 }
2073
2074 ret = 0;
2075error:
2076 __free_domain_allocs(&d, alloc_state, cpu_map);
97fb7a0a 2077
f2cb1360
IM
2078 return ret;
2079}
2080
2081/* Current sched domains: */
2082static cpumask_var_t *doms_cur;
2083
2084/* Number of sched domains in 'doms_cur': */
2085static int ndoms_cur;
2086
2087/* Attribues of custom domains in 'doms_cur' */
2088static struct sched_domain_attr *dattr_cur;
2089
2090/*
2091 * Special case: If a kmalloc() of a doms_cur partition (array of
2092 * cpumask) fails, then fallback to a single sched domain,
2093 * as determined by the single cpumask fallback_doms.
2094 */
8d5dc512 2095static cpumask_var_t fallback_doms;
f2cb1360
IM
2096
2097/*
2098 * arch_update_cpu_topology lets virtualized architectures update the
2099 * CPU core maps. It is supposed to return 1 if the topology changed
2100 * or 0 if it stayed the same.
2101 */
2102int __weak arch_update_cpu_topology(void)
2103{
2104 return 0;
2105}
2106
2107cpumask_var_t *alloc_sched_domains(unsigned int ndoms)
2108{
2109 int i;
2110 cpumask_var_t *doms;
2111
6da2ec56 2112 doms = kmalloc_array(ndoms, sizeof(*doms), GFP_KERNEL);
f2cb1360
IM
2113 if (!doms)
2114 return NULL;
2115 for (i = 0; i < ndoms; i++) {
2116 if (!alloc_cpumask_var(&doms[i], GFP_KERNEL)) {
2117 free_sched_domains(doms, i);
2118 return NULL;
2119 }
2120 }
2121 return doms;
2122}
2123
2124void free_sched_domains(cpumask_var_t doms[], unsigned int ndoms)
2125{
2126 unsigned int i;
2127 for (i = 0; i < ndoms; i++)
2128 free_cpumask_var(doms[i]);
2129 kfree(doms);
2130}
2131
2132/*
cb0c0414
JL
2133 * Set up scheduler domains and groups. For now this just excludes isolated
2134 * CPUs, but could be used to exclude other special cases in the future.
f2cb1360 2135 */
8d5dc512 2136int sched_init_domains(const struct cpumask *cpu_map)
f2cb1360
IM
2137{
2138 int err;
2139
8d5dc512 2140 zalloc_cpumask_var(&sched_domains_tmpmask, GFP_KERNEL);
1676330e 2141 zalloc_cpumask_var(&sched_domains_tmpmask2, GFP_KERNEL);
8d5dc512
PZ
2142 zalloc_cpumask_var(&fallback_doms, GFP_KERNEL);
2143
f2cb1360
IM
2144 arch_update_cpu_topology();
2145 ndoms_cur = 1;
2146 doms_cur = alloc_sched_domains(ndoms_cur);
2147 if (!doms_cur)
2148 doms_cur = &fallback_doms;
edb93821 2149 cpumask_and(doms_cur[0], cpu_map, housekeeping_cpumask(HK_FLAG_DOMAIN));
f2cb1360
IM
2150 err = build_sched_domains(doms_cur[0], NULL);
2151 register_sched_domain_sysctl();
2152
2153 return err;
2154}
2155
2156/*
2157 * Detach sched domains from a group of CPUs specified in cpu_map
2158 * These CPUs will now be attached to the NULL domain
2159 */
2160static void detach_destroy_domains(const struct cpumask *cpu_map)
2161{
e284df70 2162 unsigned int cpu = cpumask_any(cpu_map);
f2cb1360
IM
2163 int i;
2164
e284df70
VS
2165 if (rcu_access_pointer(per_cpu(sd_asym_cpucapacity, cpu)))
2166 static_branch_dec_cpuslocked(&sched_asym_cpucapacity);
2167
f2cb1360
IM
2168 rcu_read_lock();
2169 for_each_cpu(i, cpu_map)
2170 cpu_attach_domain(NULL, &def_root_domain, i);
2171 rcu_read_unlock();
2172}
2173
2174/* handle null as "default" */
2175static int dattrs_equal(struct sched_domain_attr *cur, int idx_cur,
2176 struct sched_domain_attr *new, int idx_new)
2177{
2178 struct sched_domain_attr tmp;
2179
2180 /* Fast path: */
2181 if (!new && !cur)
2182 return 1;
2183
2184 tmp = SD_ATTR_INIT;
97fb7a0a 2185
f2cb1360
IM
2186 return !memcmp(cur ? (cur + idx_cur) : &tmp,
2187 new ? (new + idx_new) : &tmp,
2188 sizeof(struct sched_domain_attr));
2189}
2190
2191/*
2192 * Partition sched domains as specified by the 'ndoms_new'
2193 * cpumasks in the array doms_new[] of cpumasks. This compares
2194 * doms_new[] to the current sched domain partitioning, doms_cur[].
2195 * It destroys each deleted domain and builds each new domain.
2196 *
2197 * 'doms_new' is an array of cpumask_var_t's of length 'ndoms_new'.
2198 * The masks don't intersect (don't overlap.) We should setup one
2199 * sched domain for each mask. CPUs not in any of the cpumasks will
2200 * not be load balanced. If the same cpumask appears both in the
2201 * current 'doms_cur' domains and in the new 'doms_new', we can leave
2202 * it as it is.
2203 *
2204 * The passed in 'doms_new' should be allocated using
2205 * alloc_sched_domains. This routine takes ownership of it and will
2206 * free_sched_domains it when done with it. If the caller failed the
2207 * alloc call, then it can pass in doms_new == NULL && ndoms_new == 1,
2208 * and partition_sched_domains() will fallback to the single partition
2209 * 'fallback_doms', it also forces the domains to be rebuilt.
2210 *
2211 * If doms_new == NULL it will be replaced with cpu_online_mask.
2212 * ndoms_new == 0 is a special case for destroying existing domains,
2213 * and it will not create the default domain.
2214 *
c22645f4 2215 * Call with hotplug lock and sched_domains_mutex held
f2cb1360 2216 */
c22645f4
MP
2217void partition_sched_domains_locked(int ndoms_new, cpumask_var_t doms_new[],
2218 struct sched_domain_attr *dattr_new)
f2cb1360 2219{
1f74de87 2220 bool __maybe_unused has_eas = false;
f2cb1360
IM
2221 int i, j, n;
2222 int new_topology;
2223
c22645f4 2224 lockdep_assert_held(&sched_domains_mutex);
f2cb1360
IM
2225
2226 /* Always unregister in case we don't destroy any domains: */
2227 unregister_sched_domain_sysctl();
2228
2229 /* Let the architecture update CPU core mappings: */
2230 new_topology = arch_update_cpu_topology();
2231
09e0dd8e
PZ
2232 if (!doms_new) {
2233 WARN_ON_ONCE(dattr_new);
2234 n = 0;
2235 doms_new = alloc_sched_domains(1);
2236 if (doms_new) {
2237 n = 1;
edb93821
FW
2238 cpumask_and(doms_new[0], cpu_active_mask,
2239 housekeeping_cpumask(HK_FLAG_DOMAIN));
09e0dd8e
PZ
2240 }
2241 } else {
2242 n = ndoms_new;
2243 }
f2cb1360
IM
2244
2245 /* Destroy deleted domains: */
2246 for (i = 0; i < ndoms_cur; i++) {
2247 for (j = 0; j < n && !new_topology; j++) {
6aa140fa 2248 if (cpumask_equal(doms_cur[i], doms_new[j]) &&
f9a25f77
MP
2249 dattrs_equal(dattr_cur, i, dattr_new, j)) {
2250 struct root_domain *rd;
2251
2252 /*
2253 * This domain won't be destroyed and as such
2254 * its dl_bw->total_bw needs to be cleared. It
2255 * will be recomputed in function
2256 * update_tasks_root_domain().
2257 */
2258 rd = cpu_rq(cpumask_any(doms_cur[i]))->rd;
2259 dl_clear_root_domain(rd);
f2cb1360 2260 goto match1;
f9a25f77 2261 }
f2cb1360
IM
2262 }
2263 /* No match - a current sched domain not in new doms_new[] */
2264 detach_destroy_domains(doms_cur[i]);
2265match1:
2266 ;
2267 }
2268
2269 n = ndoms_cur;
09e0dd8e 2270 if (!doms_new) {
f2cb1360
IM
2271 n = 0;
2272 doms_new = &fallback_doms;
edb93821
FW
2273 cpumask_and(doms_new[0], cpu_active_mask,
2274 housekeeping_cpumask(HK_FLAG_DOMAIN));
f2cb1360
IM
2275 }
2276
2277 /* Build new domains: */
2278 for (i = 0; i < ndoms_new; i++) {
2279 for (j = 0; j < n && !new_topology; j++) {
6aa140fa
QP
2280 if (cpumask_equal(doms_new[i], doms_cur[j]) &&
2281 dattrs_equal(dattr_new, i, dattr_cur, j))
f2cb1360
IM
2282 goto match2;
2283 }
2284 /* No match - add a new doms_new */
2285 build_sched_domains(doms_new[i], dattr_new ? dattr_new + i : NULL);
2286match2:
2287 ;
2288 }
2289
531b5c9f 2290#if defined(CONFIG_ENERGY_MODEL) && defined(CONFIG_CPU_FREQ_GOV_SCHEDUTIL)
6aa140fa
QP
2291 /* Build perf. domains: */
2292 for (i = 0; i < ndoms_new; i++) {
531b5c9f 2293 for (j = 0; j < n && !sched_energy_update; j++) {
6aa140fa 2294 if (cpumask_equal(doms_new[i], doms_cur[j]) &&
1f74de87
QP
2295 cpu_rq(cpumask_first(doms_cur[j]))->rd->pd) {
2296 has_eas = true;
6aa140fa 2297 goto match3;
1f74de87 2298 }
6aa140fa
QP
2299 }
2300 /* No match - add perf. domains for a new rd */
1f74de87 2301 has_eas |= build_perf_domains(doms_new[i]);
6aa140fa
QP
2302match3:
2303 ;
2304 }
1f74de87 2305 sched_energy_set(has_eas);
6aa140fa
QP
2306#endif
2307
f2cb1360
IM
2308 /* Remember the new sched domains: */
2309 if (doms_cur != &fallback_doms)
2310 free_sched_domains(doms_cur, ndoms_cur);
2311
2312 kfree(dattr_cur);
2313 doms_cur = doms_new;
2314 dattr_cur = dattr_new;
2315 ndoms_cur = ndoms_new;
2316
2317 register_sched_domain_sysctl();
c22645f4 2318}
f2cb1360 2319
c22645f4
MP
2320/*
2321 * Call with hotplug lock held
2322 */
2323void partition_sched_domains(int ndoms_new, cpumask_var_t doms_new[],
2324 struct sched_domain_attr *dattr_new)
2325{
2326 mutex_lock(&sched_domains_mutex);
2327 partition_sched_domains_locked(ndoms_new, doms_new, dattr_new);
f2cb1360
IM
2328 mutex_unlock(&sched_domains_mutex);
2329}